From: Mathieu Desnoyers Date: Tue, 29 Sep 2009 20:44:10 +0000 (-0400) Subject: Move formal-model to root X-Git-Url: http://git.liburcu.org/?p=userspace-rcu.git;a=commitdiff_plain;h=0fe464cfb57a43a22defa604d951e4e37246b0b1 Move formal-model to root Signed-off-by: Mathieu Desnoyers --- diff --git a/formal-model/.gitignore b/formal-model/.gitignore deleted file mode 100644 index 49fdd8a..0000000 --- a/formal-model/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -pan -pan.* -urcu.spin.trail diff --git a/formal-model/futex-wakeup/DEFINES b/formal-model/futex-wakeup/DEFINES deleted file mode 100644 index e328b55..0000000 --- a/formal-model/futex-wakeup/DEFINES +++ /dev/null @@ -1 +0,0 @@ -#define queue_has_entry (queue[0] == 1 || queue[1] == 1) diff --git a/formal-model/futex-wakeup/Makefile b/formal-model/futex-wakeup/Makefile deleted file mode 100644 index 11d98e8..0000000 --- a/formal-model/futex-wakeup/Makefile +++ /dev/null @@ -1,108 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#CFLAGS=-DHASH64 -DREACH -CFLAGS=-DHASH64 - -#try pan -i to get the smallest trace. - -SPINFILE=futex.spin -SPINFILE_FAIR=futex.spin - -default: - make futex_progress | tee futex_progress.log - make futex_progress_no_wake | tee futex_progress_no_wake.log - make futex_progress_late_dec | tee futex_progress_late_dec.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep error *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w19 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -futex_progress: clean futex_ltl run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -futex_progress_no_wake: clean futex_ltl futex_progress_no_wake_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -futex_progress_no_wake_define: - cp futex_progress_no_wake.define .input.define - -futex_progress_late_dec: clean futex_ltl futex_progress_late_dec_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -futex_progress_late_dec_define: - cp futex_progress_late_dec.define .input.define - -futex_ltl: - touch .input.define - cat DEFINES > pan.ltl - cat .input.define >> pan.ltl - spin -f "!(`cat futex.ltl | grep -v ^//`)" >> pan.ltl - -run: pan - ./pan -a -v -c1 -X -m10000000 -w19 - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -run_weak_fair: pan_fair - ./pan_fair -a -f -v -c1 -X -m10000000 -w20 - -pan_fair: pan_fair.c - gcc -w ${CFLAGS} -o pan_fair pan_fair.c - -pan_fair.c: pan.ltl ${SPINFILE_FAIR} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE_FAIR} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - mv pan.c pan_fair.c - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/futex-wakeup/futex.ltl b/formal-model/futex-wakeup/futex.ltl deleted file mode 100644 index 3d6842e..0000000 --- a/formal-model/futex-wakeup/futex.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> ((!np_) || (!queue_has_entry))) diff --git a/formal-model/futex-wakeup/futex.spin b/formal-model/futex-wakeup/futex.spin deleted file mode 100644 index 5459a53..0000000 --- a/formal-model/futex-wakeup/futex.spin +++ /dev/null @@ -1,124 +0,0 @@ -/* - * futex.spin: Promela code to validate futex wakeup algorithm. - * - * Algorithm verified : - * - * queue = 0; - * fut = 0; - * runvar = 0; - * - * Waker - * queue = 1; - * if (fut == -1) { - * fut = 0; - * } - * - * Waiter - * while (1) { - * progress: - * fut = fut - 1; - * if (queue == 1) { - * fut = 0; - * } else { - * if (fut == -1) { - * while (fut == -1) { } - * } - * } - * queue = 0; - * } - * - * if queue = 1, then !_np - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -#define get_pid() (_pid) - -int queue[2] = 0; -int fut = 0; - -active [2] proctype waker() -{ - assert(get_pid() < 2); - - queue[get_pid()] = 1; - - if - :: (fut == -1) -> - fut = 0; - :: else -> - skip; - fi; - - queue[get_pid()] = 1; - - if - :: (fut == -1) -> - fut = 0; - :: else -> - skip; - fi; - -#ifdef INJ_QUEUE_NO_WAKE - queue[get_pid()] = 1; -#endif -} - - -active proctype waiter() -{ - do - :: 1 -> -#ifndef INJ_LATE_DEC - fut = fut - 1; -#endif - if - :: (queue[0] == 1 || queue[1] == 1) -> -#ifndef INJ_LATE_DEC - fut = 0; -#endif - skip; - :: else -> -#ifdef INJ_LATE_DEC - fut = fut - 1; -#endif - if - :: (fut == -1) -> - do - :: 1 -> - if - :: (fut == -1) -> - skip; - :: else -> - break; - fi; - od; - :: else -> - skip; - fi; - fi; -progress: - if - :: queue[0] == 1 -> - queue[0] = 0; - fi; - if - :: queue[1] == 1 -> - queue[1] = 0; - fi; - od; -} diff --git a/formal-model/futex-wakeup/futex_progress_late_dec.define b/formal-model/futex-wakeup/futex_progress_late_dec.define deleted file mode 100644 index 01361fb..0000000 --- a/formal-model/futex-wakeup/futex_progress_late_dec.define +++ /dev/null @@ -1 +0,0 @@ -#define INJ_LATE_DEC diff --git a/formal-model/futex-wakeup/futex_progress_no_wake.define b/formal-model/futex-wakeup/futex_progress_no_wake.define deleted file mode 100644 index 527bb77..0000000 --- a/formal-model/futex-wakeup/futex_progress_no_wake.define +++ /dev/null @@ -1 +0,0 @@ -#define INJ_QUEUE_NO_WAKE diff --git a/formal-model/ooomem-double-update/DEFINES b/formal-model/ooomem-double-update/DEFINES deleted file mode 100644 index 7cf7b24..0000000 --- a/formal-model/ooomem-double-update/DEFINES +++ /dev/null @@ -1,3 +0,0 @@ -#define read_one_is_one (read_one == 1) -#define read_two_is_one (read_two == 1) -#define read_two_done (read_two != 2) diff --git a/formal-model/ooomem-double-update/Makefile b/formal-model/ooomem-double-update/Makefile deleted file mode 100644 index 37422b5..0000000 --- a/formal-model/ooomem-double-update/Makefile +++ /dev/null @@ -1,93 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#CFLAGS=-DHASH64 -DREACH -CFLAGS=-DHASH64 - -#try pan -i to get the smallest trace. - -SPINFILE=mem.spin - -default: - make read_order | tee read_order.log - make read_order_no_wmb | tee read_order_no_wmb.log - make read_order_no_rmb | tee read_order_no_rmb.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep error *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000 -w19 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order: clean read_order_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_rmb: clean read_order_ltl read_order_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_rmb_define: - cp read_order_no_rmb.define .input.define - -read_order_no_wmb: clean read_order_ltl read_order_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_wmb_define: - cp read_order_no_wmb.define .input.define - -read_order_ltl: - touch .input.define - cat DEFINES > pan.ltl - cat .input.define >> pan.ltl - spin -f "!(`cat read_order.ltl | grep -v ^//`)" >> pan.ltl - -run: pan - ./pan -a -v -c1 -X -m10000 -w19 - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/ooomem-double-update/mem.sh b/formal-model/ooomem-double-update/mem.sh deleted file mode 100644 index 56e8123..0000000 --- a/formal-model/ooomem-double-update/mem.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a mem.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/ooomem-double-update/mem.spin b/formal-model/ooomem-double-update/mem.spin deleted file mode 100644 index e033f67..0000000 --- a/formal-model/ooomem-double-update/mem.spin +++ /dev/null @@ -1,262 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with out-of-order memory - * and out-of-order instruction scheduling. - * - * Algorithm verified : - * - * alpha = 0; - * beta = 0; - * - * Process A Process B - * alpha = 1; x = beta; - * wmb(); rmb(); - * beta = 1; y = alpha; - * - * if x = 1, then y will = 1 when it is read. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) \ - (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -inline ooo_mem() -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(beta, get_pid()); - } -} - -/* must consume all prior read tokens */ -inline smp_rmb() -{ - atomic { - /* todo : consume all read tokens .. ? */ - CACHE_READ_FROM_MEM(alpha, get_pid()); - CACHE_READ_FROM_MEM(beta, get_pid()); - } -} - -/* must consume all prior write tokens */ -inline smp_wmb() -{ - atomic { - CACHE_WRITE_TO_MEM(alpha, get_pid()); - CACHE_WRITE_TO_MEM(beta, get_pid()); - } -} - -/* sync_core() must consume all prior read and write tokens, including rmb/wmb - * tokens */ - -/* must consume all prior read and write tokens */ -inline smp_mb() -{ - atomic { - smp_wmb(); - /* sync_core() */ - smp_rmb(); - } -} - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, alpha, 0); -DECLARE_CACHED_VAR(byte, beta, 0); - -/* value 2 is uninitialized */ -byte read_one = 2; -byte read_two = 2; - -/* - * Bit encoding, proc_one_produced : - */ - -#define P1_PROD_NONE (1 << 0) - -#define P1_READ_ONE (1 << 1) -#define P1_RMB (1 << 2) -#define P1_READ_TWO (1 << 3) - -/* Only need a single color. */ -byte proc_one_produced; - -active proctype test_proc_one() -{ - assert(get_pid() < NR_PROCS); - - PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE); -#ifdef NO_RMB - PRODUCE_TOKENS(proc_one_produced, P1_RMB); -#endif - - do - :: CONSUME_TOKENS(proc_one_produced, - P1_PROD_NONE, P1_READ_ONE) -> - ooo_mem(); - read_one = READ_CACHED_VAR(beta); - ooo_mem(); - PRODUCE_TOKENS(proc_one_produced, P1_READ_ONE); - :: CONSUME_TOKENS(proc_one_produced, - P1_READ_ONE, P1_RMB) -> - smp_rmb(); - PRODUCE_TOKENS(proc_one_produced, P1_RMB); - :: CONSUME_TOKENS(proc_one_produced, - P1_RMB, P1_READ_TWO) -> - ooo_mem(); - read_two = READ_CACHED_VAR(alpha); - ooo_mem(); - PRODUCE_TOKENS(proc_one_produced, P1_READ_TWO); - :: CONSUME_TOKENS(proc_one_produced, - P1_PROD_NONE | P1_READ_ONE | P1_RMB - | P1_READ_TWO, 0) -> - break; - od; - - //CLEAR_TOKENS(proc_one_produced, - // P1_PROD_NONE | P1_READ_ONE | P1_RMB | P1_READ_TWO); - - // test : [] (read_one == 1 -> read_two == 1) - assert(read_one != 1 || read_two == 1); -} - - -/* - * Bit encoding, proc_two_produced : - */ - -#define P2_PROD_NONE (1 << 0) - -#define P2_WRITE_ONE (1 << 1) -#define P2_WMB (1 << 2) -#define P2_WRITE_TWO (1 << 3) - -/* Only need a single color. */ -byte proc_two_produced; - -active proctype test_proc_two() -{ - assert(get_pid() < NR_PROCS); - - PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE); -#ifdef NO_WMB - PRODUCE_TOKENS(proc_two_produced, P2_WMB); -#endif - - do - :: CONSUME_TOKENS(proc_two_produced, - P2_PROD_NONE, P2_WRITE_ONE) -> - ooo_mem(); - WRITE_CACHED_VAR(alpha, 1); - ooo_mem(); - PRODUCE_TOKENS(proc_two_produced, P2_WRITE_ONE); - :: CONSUME_TOKENS(proc_two_produced, - P2_WRITE_ONE, P2_WMB) -> - smp_wmb(); - PRODUCE_TOKENS(proc_two_produced, P2_WMB); - :: CONSUME_TOKENS(proc_two_produced, - P2_WMB, P2_WRITE_TWO) -> - ooo_mem(); - WRITE_CACHED_VAR(beta, 1); - ooo_mem(); - PRODUCE_TOKENS(proc_two_produced, P2_WRITE_TWO); - :: CONSUME_TOKENS(proc_two_produced, - P2_PROD_NONE | P2_WRITE_ONE - | P2_WMB | P2_WRITE_TWO, 0) -> - break; - od; - - //CLEAR_TOKENS(proc_two_produced, - // P2_PROD_NONE | P2_WRITE_ONE | P2_WMB | P2_WRITE_TWO); -} diff --git a/formal-model/ooomem-double-update/read_order.ltl b/formal-model/ooomem-double-update/read_order.ltl deleted file mode 100644 index b201ec4..0000000 --- a/formal-model/ooomem-double-update/read_order.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (read_one_is_one -> (<> read_two_is_one)) diff --git a/formal-model/ooomem-double-update/read_order_no_rmb.define b/formal-model/ooomem-double-update/read_order_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/ooomem-double-update/read_order_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/ooomem-double-update/read_order_no_wmb.define b/formal-model/ooomem-double-update/read_order_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/ooomem-double-update/read_order_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/ooomem-double-update/references.txt b/formal-model/ooomem-double-update/references.txt deleted file mode 100644 index ca6798f..0000000 --- a/formal-model/ooomem-double-update/references.txt +++ /dev/null @@ -1,7 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html diff --git a/formal-model/ooomem-no-sched/DEFINES b/formal-model/ooomem-no-sched/DEFINES deleted file mode 100644 index 04aa898..0000000 --- a/formal-model/ooomem-no-sched/DEFINES +++ /dev/null @@ -1,2 +0,0 @@ -#define first_read_updated (first_read[0] == 6) -#define second_read_updated (second_read[0] == 4) diff --git a/formal-model/ooomem-no-sched/Makefile b/formal-model/ooomem-no-sched/Makefile deleted file mode 100644 index e0aed43..0000000 --- a/formal-model/ooomem-no-sched/Makefile +++ /dev/null @@ -1,90 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -CFLAGS=-DHASH64 - -SPINFILE=mem.spin - -default: - make read_order | tee read_order.log - make read_order_no_wmb | tee read_order_no_wmb.log - make read_order_no_rmb | tee read_order_no_rmb.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep error *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000 -w19 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order: clean read_order_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_rmb: clean read_order_ltl read_order_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_rmb_define: - cp read_order_no_rmb.define .input.define - -read_order_no_wmb: clean read_order_ltl read_order_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_wmb_define: - cp read_order_no_wmb.define .input.define - -read_order_ltl: - touch .input.define - cat DEFINES > pan.ltl - cat .input.define >> pan.ltl - spin -f "!(`cat read_order.ltl | grep -v ^//`)" >> pan.ltl - -run: pan - ./pan -a -v -c1 -X -m10000 -w19 - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/ooomem-no-sched/mem.sh b/formal-model/ooomem-no-sched/mem.sh deleted file mode 100644 index 56e8123..0000000 --- a/formal-model/ooomem-no-sched/mem.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a mem.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/ooomem-no-sched/mem.spin b/formal-model/ooomem-no-sched/mem.spin deleted file mode 100644 index 9359a5a..0000000 --- a/formal-model/ooomem-no-sched/mem.spin +++ /dev/null @@ -1,165 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* - * Out-of-order memory model _without_ out-of-order instruction scheduling. - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -inline smp_rmb() -{ - atomic { - CACHE_READ_FROM_MEM(alpha, get_pid()); - CACHE_READ_FROM_MEM(beta, get_pid()); - } -} - -inline smp_wmb() -{ - atomic { - CACHE_WRITE_TO_MEM(alpha, get_pid()); - CACHE_WRITE_TO_MEM(beta, get_pid()); - } -} - -inline smp_mb() -{ - atomic { - smp_wmb(); - smp_rmb(); - } -} - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, alpha, 0); -DECLARE_CACHED_VAR(byte, beta, 0); - -inline ooo_mem() -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(beta, get_pid()); - } -} - -#define get_readerid() (get_pid()) - -byte first_read[NR_READERS]; -byte second_read[NR_READERS]; - -active [NR_READERS] proctype test_reader() -{ - assert(get_pid() < NR_PROCS); - - ooo_mem(); - first_read[get_readerid()] = READ_CACHED_VAR(beta); - ooo_mem(); -#ifndef NO_RMB - smp_rmb(); - ooo_mem(); -#endif - second_read[get_readerid()] = READ_CACHED_VAR(alpha); - ooo_mem(); - // test : [] (first_read == 6 -> <> second_read == 4) - assert(first_read[get_readerid()] != 6 - || second_read[get_readerid()] == 4); -} - -#define get_writerid() (get_readerid() + NR_READERS) - -active [NR_WRITERS] proctype test_writer() -{ - byte i; - - assert(get_pid() < NR_PROCS); - - ooo_mem(); - WRITE_CACHED_VAR(alpha, 4); - ooo_mem(); -#ifndef NO_WMB - smp_wmb(); - ooo_mem(); -#endif - WRITE_CACHED_VAR(beta, 6); - ooo_mem(); -} diff --git a/formal-model/ooomem-no-sched/read_order.ltl b/formal-model/ooomem-no-sched/read_order.ltl deleted file mode 100644 index b1cdfb7..0000000 --- a/formal-model/ooomem-no-sched/read_order.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (first_read_updated -> <> second_read_updated) diff --git a/formal-model/ooomem-no-sched/read_order_no_rmb.define b/formal-model/ooomem-no-sched/read_order_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/ooomem-no-sched/read_order_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/ooomem-no-sched/read_order_no_wmb.define b/formal-model/ooomem-no-sched/read_order_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/ooomem-no-sched/read_order_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/ooomem-no-sched/references.txt b/formal-model/ooomem-no-sched/references.txt deleted file mode 100644 index ca6798f..0000000 --- a/formal-model/ooomem-no-sched/references.txt +++ /dev/null @@ -1,7 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html diff --git a/formal-model/ooomem-two-writes/DEFINES b/formal-model/ooomem-two-writes/DEFINES deleted file mode 100644 index e7b6f10..0000000 --- a/formal-model/ooomem-two-writes/DEFINES +++ /dev/null @@ -1,4 +0,0 @@ -#define read_one_is_zero (read_one == 0) -#define read_two_is_zero (read_two == 0) -#define read_one_is_one (read_one == 1) -#define read_two_is_one (read_two == 1) diff --git a/formal-model/ooomem-two-writes/Makefile b/formal-model/ooomem-two-writes/Makefile deleted file mode 100644 index 6e91788..0000000 --- a/formal-model/ooomem-two-writes/Makefile +++ /dev/null @@ -1,101 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#CFLAGS=-DHASH64 -DREACH -CFLAGS=-DHASH64 - -#try pan -i to get the smallest trace. - -SPINFILE=mem.spin - -default: - make read_order | tee read_order.log - make read_order_no_wmb | tee read_order_no_wmb.log - make read_order_no_rmb | tee read_order_no_rmb.log - make read_order_no_sync | tee read_order_no_sync.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep error *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000 -w19 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order: clean read_order_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_sync: clean read_order_ltl read_order_no_sync_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_sync_define: - cp read_order_no_sync.define .input.define - -read_order_no_rmb: clean read_order_ltl read_order_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_rmb_define: - cp read_order_no_rmb.define .input.define - -read_order_no_wmb: clean read_order_ltl read_order_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -read_order_no_wmb_define: - cp read_order_no_wmb.define .input.define - -read_order_ltl: - touch .input.define - cat DEFINES > pan.ltl - cat .input.define >> pan.ltl - spin -f "!(`cat read_order.ltl | grep -v ^//`)" >> pan.ltl - -run: pan - ./pan -a -v -c1 -X -m10000 -w19 - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/ooomem-two-writes/mem.sh b/formal-model/ooomem-two-writes/mem.sh deleted file mode 100644 index 56e8123..0000000 --- a/formal-model/ooomem-two-writes/mem.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a mem.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/ooomem-two-writes/mem.spin b/formal-model/ooomem-two-writes/mem.spin deleted file mode 100644 index 304c3f8..0000000 --- a/formal-model/ooomem-two-writes/mem.spin +++ /dev/null @@ -1,291 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with out-of-order memory - * and out-of-order instruction scheduling. - * - * Algorithm verified : - * - * alpha = 0; - * beta = 0; - * x = 1; - * y = 1; - * - * Process A Process B - * alpha = 1; beta = 1; - * mb(); mb(); - * x = beta; y = alpha; - * - * if x = 0, then y != 0 - * if y = 0, then x != 0 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) \ - (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -inline ooo_mem() -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(beta, get_pid()); - } -} - -/* must consume all prior read tokens */ -inline smp_rmb() -{ - atomic { - /* todo : consume all read tokens .. ? */ - CACHE_READ_FROM_MEM(alpha, get_pid()); - CACHE_READ_FROM_MEM(beta, get_pid()); - } -} - -/* must consume all prior write tokens */ -inline smp_wmb() -{ - atomic { - CACHE_WRITE_TO_MEM(alpha, get_pid()); - CACHE_WRITE_TO_MEM(beta, get_pid()); - } -} - -/* sync_core() must consume all prior read and write tokens, including rmb/wmb - * tokens */ - -/* must consume all prior read and write tokens */ -inline smp_mb() -{ - atomic { - smp_wmb(); - /* sync_core() */ - smp_rmb(); - } -} - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, alpha, 0); -DECLARE_CACHED_VAR(byte, beta, 0); - -byte read_one = 1; -byte read_two = 1; - -/* - * Bit encoding, proc_one_produced : - */ - -#define P1_PROD_NONE (1 << 0) - -#define P1_WRITE (1 << 1) -#define P1_WMB (1 << 2) -#define P1_SYNC_CORE (1 << 3) -#define P1_RMB (1 << 4) -#define P1_READ (1 << 5) - -int proc_one_produced; - -active proctype test_proc_one() -{ - assert(get_pid() < NR_PROCS); - - PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_one_produced, P1_WMB); -#endif -#ifdef NO_RMB - PRODUCE_TOKENS(proc_one_produced, P1_RMB); -#endif -#ifdef NO_SYNC - PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE); -#endif - - do - :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE, P1_WRITE) -> - ooo_mem(); - WRITE_CACHED_VAR(alpha, 1); - ooo_mem(); - PRODUCE_TOKENS(proc_one_produced, P1_WRITE); - :: CONSUME_TOKENS(proc_one_produced, P1_WRITE, P1_WMB) -> - smp_wmb(); - PRODUCE_TOKENS(proc_one_produced, P1_WMB); - :: CONSUME_TOKENS(proc_one_produced, P1_WRITE | P1_WMB, P1_SYNC_CORE) -> - /* sync_core(); */ - PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE); - :: CONSUME_TOKENS(proc_one_produced, P1_SYNC_CORE, P1_RMB) -> - smp_rmb(); - PRODUCE_TOKENS(proc_one_produced, P1_RMB); - :: CONSUME_TOKENS(proc_one_produced, P1_RMB | P1_SYNC_CORE, P1_READ) -> - ooo_mem(); - read_one = READ_CACHED_VAR(beta); - ooo_mem(); - PRODUCE_TOKENS(proc_one_produced, P1_READ); - :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE | P1_WRITE - | P1_WMB | P1_SYNC_CORE | P1_RMB | P1_READ, 0) -> - break; - od; - - //CLEAR_TOKENS(proc_one_produced, - // P1_PROD_NONE | P1_WRITE | P1_WMB | P1_SYNC_CORE | P1_RMB | - // P2_READ); - - // test : [] (read_one == 0 -> read_two != 0) - // test : [] (read_two == 0 -> read_one != 0) - assert(!(read_one == 0 && read_two == 0)); -} - - -/* - * Bit encoding, proc_two_produced : - */ - -#define P2_PROD_NONE (1 << 0) - -#define P2_WRITE (1 << 1) -#define P2_WMB (1 << 2) -#define P2_SYNC_CORE (1 << 3) -#define P2_RMB (1 << 4) -#define P2_READ (1 << 5) - -int proc_two_produced; - -active proctype test_proc_two() -{ - assert(get_pid() < NR_PROCS); - - PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_two_produced, P2_WMB); -#endif -#ifdef NO_RMB - PRODUCE_TOKENS(proc_two_produced, P2_RMB); -#endif -#ifdef NO_SYNC - PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE); -#endif - - do - :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE, P2_WRITE) -> - ooo_mem(); - WRITE_CACHED_VAR(beta, 1); - ooo_mem(); - PRODUCE_TOKENS(proc_two_produced, P2_WRITE); - :: CONSUME_TOKENS(proc_two_produced, P2_WRITE, P2_WMB) -> - smp_wmb(); - PRODUCE_TOKENS(proc_two_produced, P2_WMB); - :: CONSUME_TOKENS(proc_two_produced, P2_WRITE | P2_WMB, P2_SYNC_CORE) -> - /* sync_core(); */ - PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE); - :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE, P2_RMB) -> - smp_rmb(); - PRODUCE_TOKENS(proc_two_produced, P2_RMB); - :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE | P2_RMB, P2_READ) -> - ooo_mem(); - read_two = READ_CACHED_VAR(alpha); - ooo_mem(); - PRODUCE_TOKENS(proc_two_produced, P2_READ); - :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE | P2_WRITE - | P2_WMB | P2_SYNC_CORE | P2_RMB | P2_READ, 0) -> - break; - od; - - //CLEAR_TOKENS(proc_two_produced, - // P2_PROD_NONE | P2_WRITE | P2_WMB | P2_SYNC_CORE | P2_RMB | - // P2_READ); - - // test : [] (read_one == 0 -> read_two != 0) - // test : [] (read_two == 0 -> read_one != 0) - assert(!(read_one == 0 && read_two == 0)); -} diff --git a/formal-model/ooomem-two-writes/read_order.ltl b/formal-model/ooomem-two-writes/read_order.ltl deleted file mode 100644 index 6ba2459..0000000 --- a/formal-model/ooomem-two-writes/read_order.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (read_one_is_one || read_two_is_one) diff --git a/formal-model/ooomem-two-writes/read_order_no_rmb.define b/formal-model/ooomem-two-writes/read_order_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/ooomem-two-writes/read_order_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/ooomem-two-writes/read_order_no_sync.define b/formal-model/ooomem-two-writes/read_order_no_sync.define deleted file mode 100644 index 0d2f8cf..0000000 --- a/formal-model/ooomem-two-writes/read_order_no_sync.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_SYNC diff --git a/formal-model/ooomem-two-writes/read_order_no_wmb.define b/formal-model/ooomem-two-writes/read_order_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/ooomem-two-writes/read_order_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/ooomem-two-writes/references.txt b/formal-model/ooomem-two-writes/references.txt deleted file mode 100644 index ca6798f..0000000 --- a/formal-model/ooomem-two-writes/references.txt +++ /dev/null @@ -1,7 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html diff --git a/formal-model/spinlock/DEFINES b/formal-model/spinlock/DEFINES deleted file mode 100644 index 4eb5315..0000000 --- a/formal-model/spinlock/DEFINES +++ /dev/null @@ -1 +0,0 @@ -#define refcount_gt_one (refcount > 1) diff --git a/formal-model/spinlock/Makefile b/formal-model/spinlock/Makefile deleted file mode 100644 index a153e7a..0000000 --- a/formal-model/spinlock/Makefile +++ /dev/null @@ -1,103 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#CFLAGS=-DHASH64 -DREACH -CFLAGS=-DHASH64 - -#try pan -i to get the smallest trace. - -SPINFILE=mem.spin -SPINFILE_FAIR=mem-progress.spin - -default: - make refcount | tee refcount.log - make lock_progress | tee lock_progress.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep error *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000 -w19 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -refcount: clean refcount_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -refcount_ltl: - touch .input.define - cat DEFINES > pan.ltl - cat .input.define >> pan.ltl - spin -f "!(`cat refcount.ltl | grep -v ^//`)" >> pan.ltl - -lock_progress: clean lock_progress_ltl run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -lock_progress_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat lock_progress.ltl | grep -v ^//`)" >> pan.ltl - -run: pan - ./pan -a -v -c1 -X -m10000 -w19 - -run_weak_fair: pan_fair - ./pan_fair -a -f -v -c1 -X -m10000000 -w20 - -pan_fair: pan_fair.c - gcc -w ${CFLAGS} -o pan_fair pan_fair.c - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan_fair.c: pan.ltl ${SPINFILE_FAIR} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE_FAIR} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - mv pan.c pan_fair.c - -pan.c: pan.ltl ${SPINFILE} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/spinlock/lock_progress.ltl b/formal-model/spinlock/lock_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/spinlock/lock_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/spinlock/mem-progress.spin b/formal-model/spinlock/mem-progress.spin deleted file mode 100644 index 7930d04..0000000 --- a/formal-model/spinlock/mem-progress.spin +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -byte lock = 0; -byte refcount = 0; - -inline spin_lock(lock) -{ - do - :: 1 -> atomic { - if - :: (lock) -> - skip; - :: else -> - lock = 1; - break; - fi; - } - od; -} - -inline spin_unlock(lock) -{ - lock = 0; -} - -proctype proc_A() -{ - do - :: 1-> -progress_A: - spin_lock(lock); - refcount = refcount + 1; - refcount = refcount - 1; - spin_unlock(lock); - od; -} - -proctype proc_B() -{ - do - :: 1-> - spin_lock(lock); - refcount = refcount + 1; - refcount = refcount - 1; - spin_unlock(lock); - od; -} - -init -{ - run proc_A(); - run proc_B(); -} diff --git a/formal-model/spinlock/mem.sh b/formal-model/spinlock/mem.sh deleted file mode 100644 index 56e8123..0000000 --- a/formal-model/spinlock/mem.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a mem.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/spinlock/mem.spin b/formal-model/spinlock/mem.spin deleted file mode 100644 index 9e87809..0000000 --- a/formal-model/spinlock/mem.spin +++ /dev/null @@ -1,57 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -byte lock = 0; -byte refcount = 0; - -inline spin_lock(lock) -{ - do - :: 1 -> atomic { - if - :: (lock) -> - skip; - :: else -> - lock = 1; - break; - fi; - } - od; -} - -inline spin_unlock(lock) -{ - lock = 0; -} - -proctype proc_X() -{ - do - :: 1 -> - spin_lock(lock); - refcount = refcount + 1; - refcount = refcount - 1; - spin_unlock(lock); - od; -} - -init -{ - run proc_X(); - run proc_X(); -} diff --git a/formal-model/spinlock/refcount.ltl b/formal-model/spinlock/refcount.ltl deleted file mode 100644 index 48f971f..0000000 --- a/formal-model/spinlock/refcount.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!(refcount_gt_one)) diff --git a/formal-model/spinlock/references.txt b/formal-model/spinlock/references.txt deleted file mode 100644 index ca6798f..0000000 --- a/formal-model/spinlock/references.txt +++ /dev/null @@ -1,7 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html diff --git a/formal-model/ticketlock/DEFINES b/formal-model/ticketlock/DEFINES deleted file mode 100644 index 4eb5315..0000000 --- a/formal-model/ticketlock/DEFINES +++ /dev/null @@ -1 +0,0 @@ -#define refcount_gt_one (refcount > 1) diff --git a/formal-model/ticketlock/Makefile b/formal-model/ticketlock/Makefile deleted file mode 100644 index c41afd3..0000000 --- a/formal-model/ticketlock/Makefile +++ /dev/null @@ -1,112 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#CFLAGS=-DHASH64 -DREACH -CFLAGS=-DHASH64 - -#try pan -i to get the smallest trace. - -SPINFILE=mem.spin -SPINFILE_FAIR=mem-progress.spin - -default: - make refcount | tee refcount.log - make refcount_4_bits_per_byte | tee refcount_4_bits_per_byte.log - make lock_progress | tee lock_progress.log - make lock_progress_4_bits_per_byte | tee lock_progress_4_bits_per_byte.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep error *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w19 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -refcount: clean refcount_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -refcount_ltl: - touch .input.define - cat DEFINES > pan.ltl - cat .input.define >> pan.ltl - spin -f "!(`cat refcount.ltl | grep -v ^//`)" >> pan.ltl - -refcount_4_bits_per_byte: clean refcount_ltl config_4_bits_per_byte_define run - -lock_progress: clean lock_progress_ltl run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -lock_progress_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat lock_progress.ltl | grep -v ^//`)" >> pan.ltl - -lock_progress_4_bits_per_byte: clean lock_progress_ltl config_4_bits_per_byte_define run - -config_4_bits_per_byte_define: - cp config_4_bits_per_byte.define .input.define - -run: pan - ./pan -a -v -c1 -X -m1000000 -w19 - -run_weak_fair: pan_fair - ./pan_fair -a -f -v -c1 -X -m1000000 -w20 - -pan_fair: pan_fair.c - gcc -w ${CFLAGS} -DNFAIR=4 -o pan_fair pan_fair.c - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan_fair.c: pan.ltl ${SPINFILE_FAIR} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE_FAIR} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - mv pan.c pan_fair.c - -pan.c: pan.ltl ${SPINFILE} - cat DEFINES > .input.spin - cat .input.define >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/ticketlock/config_4_bits_per_byte.define b/formal-model/ticketlock/config_4_bits_per_byte.define deleted file mode 100644 index e1d13ca..0000000 --- a/formal-model/ticketlock/config_4_bits_per_byte.define +++ /dev/null @@ -1 +0,0 @@ -#define CONFIG_BITS_PER_BYTE 4 diff --git a/formal-model/ticketlock/lock_progress.ltl b/formal-model/ticketlock/lock_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/ticketlock/lock_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/ticketlock/mem-progress.spin b/formal-model/ticketlock/mem-progress.spin deleted file mode 100644 index dad43a4..0000000 --- a/formal-model/ticketlock/mem-progress.spin +++ /dev/null @@ -1,98 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* 16 CPUs max (byte has 8 bits, divided in two) */ - -#ifndef CONFIG_BITS_PER_BYTE -#define BITS_PER_BYTE 8 -#else -// test progress failure with shorter byte size. Will fail with 5 proc. -#define BITS_PER_BYTE CONFIG_BITS_PER_BYTE -#endif - -#define HBPB (BITS_PER_BYTE / 2) /* 4 */ -#define HMASK ((1 << HBPB) - 1) /* 0x0F */ - -/* for byte type */ -#define LOW_HALF(val) ((val) & HMASK) -#define LOW_HALF_INC 1 - -#define HIGH_HALF(val) ((val) & (HMASK << HBPB)) -#define HIGH_HALF_INC (1 << HBPB) - -byte lock = 0; -byte refcount = 0; - -inline spin_lock(lock, ticket) -{ - atomic { - ticket = HIGH_HALF(lock) >> HBPB; - lock = lock + HIGH_HALF_INC; /* overflow expected */ - } - - do - :: 1 -> - if - :: (LOW_HALF(lock) == ticket) -> - break; - :: else -> - skip; - fi; - od; -} - -inline spin_unlock(lock) -{ - lock = HIGH_HALF(lock) | LOW_HALF(lock + LOW_HALF_INC); -} - -proctype proc_A() -{ - byte ticket; - - do - :: 1 -> -progress_A: - spin_lock(lock, ticket); - refcount = refcount + 1; - refcount = refcount - 1; - spin_unlock(lock); - od; -} - -proctype proc_B() -{ - byte ticket; - - do - :: 1 -> - spin_lock(lock, ticket); - refcount = refcount + 1; - refcount = refcount - 1; - spin_unlock(lock); - od; -} - -init -{ - run proc_A(); - run proc_B(); - run proc_B(); - run proc_B(); - run proc_B(); -} diff --git a/formal-model/ticketlock/mem.sh b/formal-model/ticketlock/mem.sh deleted file mode 100644 index 56e8123..0000000 --- a/formal-model/ticketlock/mem.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a mem.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/ticketlock/mem.spin b/formal-model/ticketlock/mem.spin deleted file mode 100644 index 445ee9a..0000000 --- a/formal-model/ticketlock/mem.spin +++ /dev/null @@ -1,83 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* 16 CPUs max (byte has 8 bits, divided in two) */ - -#ifndef CONFIG_BITS_PER_BYTE -#define BITS_PER_BYTE 8 -#else -#define BITS_PER_BYTE CONFIG_BITS_PER_BYTE -#endif - -#define HBPB (BITS_PER_BYTE / 2) /* 4 */ -#define HMASK ((1 << HBPB) - 1) /* 0x0F */ - -/* for byte type */ -#define LOW_HALF(val) ((val) & HMASK) -#define LOW_HALF_INC 1 - -#define HIGH_HALF(val) ((val) & (HMASK << HBPB)) -#define HIGH_HALF_INC (1 << HBPB) - -byte lock = 0; -byte refcount = 0; - -inline spin_lock(lock, ticket) -{ - atomic { - ticket = HIGH_HALF(lock) >> HBPB; - lock = lock + HIGH_HALF_INC; /* overflow expected */ - } - - do - :: 1 -> - if - :: (LOW_HALF(lock) == ticket) -> - break; - :: else -> - skip; - fi; - od; -} - -inline spin_unlock(lock) -{ - lock = HIGH_HALF(lock) | LOW_HALF(lock + LOW_HALF_INC); -} - -proctype proc_X() -{ - byte ticket; - - do - :: 1-> - spin_lock(lock, ticket); - refcount = refcount + 1; - refcount = refcount - 1; - spin_unlock(lock); - od; -} - -init -{ - run proc_X(); - run proc_X(); - run proc_X(); - run proc_X(); - run proc_X(); -} diff --git a/formal-model/ticketlock/refcount.ltl b/formal-model/ticketlock/refcount.ltl deleted file mode 100644 index 48f971f..0000000 --- a/formal-model/ticketlock/refcount.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!(refcount_gt_one)) diff --git a/formal-model/ticketlock/references.txt b/formal-model/ticketlock/references.txt deleted file mode 100644 index ca6798f..0000000 --- a/formal-model/ticketlock/references.txt +++ /dev/null @@ -1,7 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/.input.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/.input.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/.input.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/.input.spin b/formal-model/urcu-controldataflow-alpha-ipi-compress/.input.spin deleted file mode 100644 index 887b1ad..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/.input.spin +++ /dev/null @@ -1,1340 +0,0 @@ -#define READER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/DEFINES b/formal-model/urcu-controldataflow-alpha-ipi-compress/DEFINES deleted file mode 100644 index 2681f69..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/DEFINES +++ /dev/null @@ -1,18 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/Makefile b/formal-model/urcu-controldataflow-alpha-ipi-compress/Makefile deleted file mode 100644 index f8bfd31..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/Makefile +++ /dev/null @@ -1,171 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 -DCOLLAPSE -#CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - #make urcu_free | tee urcu_free.log - #make urcu_free_no_mb | tee urcu_free_no_mb.log - #make urcu_free_no_rmb | tee urcu_free_no_rmb.log - #make urcu_free_no_wmb | tee urcu_free_no_wmb.log - #make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - #make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/references.txt b/formal-model/urcu-controldataflow-alpha-ipi-compress/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu.sh b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu.spin b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu.spin deleted file mode 100644 index 8075506..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu.spin +++ /dev/null @@ -1,1321 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free.ltl b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_nested.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_mb.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_rmb.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_single_flip.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress.ltl b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.log b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.log deleted file mode 100644 index f11dc83..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.log +++ /dev/null @@ -1,303 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi-compress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -depth 7: Claim reached state 9 (line 1367) -depth 136: Claim reached state 9 (line 1366) -Depth= 115766 States= 1e+06 Transitions= 2.97e+08 Memory= 495.647 t= 461 R= 2e+03 -Depth= 115766 States= 2e+06 Transitions= 5.97e+08 Memory= 525.529 t= 939 R= 2e+03 -Depth= 115766 States= 3e+06 Transitions= 8.86e+08 Memory= 553.264 t= 1.41e+03 R= 2e+03 -pan: resizing hashtable to -w22.. done -Depth= 115766 States= 4e+06 Transitions= 1.18e+09 Memory= 614.463 t= 1.87e+03 R= 2e+03 -Depth= 115766 States= 5e+06 Transitions= 1.48e+09 Memory= 644.541 t= 2.34e+03 R= 2e+03 -Depth= 115766 States= 6e+06 Transitions= 1.77e+09 Memory= 674.424 t= 2.8e+03 R= 2e+03 -Depth= 115766 States= 7e+06 Transitions= 2.07e+09 Memory= 701.865 t= 3.27e+03 R= 2e+03 -Depth= 115766 States= 8e+06 Transitions= 2.36e+09 Memory= 729.404 t= 3.75e+03 R= 2e+03 -Depth= 115766 States= 9e+06 Transitions= 2.66e+09 Memory= 757.920 t= 4.23e+03 R= 2e+03 -pan: resizing hashtable to -w24.. done -Depth= 117893 States= 1e+07 Transitions= 2.95e+09 Memory= 909.846 t= 4.69e+03 R= 2e+03 -Depth= 117893 States= 1.1e+07 Transitions= 3.35e+09 Memory= 937.190 t= 5.31e+03 R= 2e+03 -Depth= 117893 States= 1.2e+07 Transitions= 3.69e+09 Memory= 964.826 t= 5.85e+03 R= 2e+03 -Depth= 117893 States= 1.3e+07 Transitions= 4.02e+09 Memory= 994.026 t= 6.37e+03 R= 2e+03 -Depth= 117893 States= 1.4e+07 Transitions= 4.32e+09 Memory= 1021.858 t= 6.84e+03 R= 2e+03 -Depth= 117893 States= 1.5e+07 Transitions= 4.63e+09 Memory= 1050.080 t= 7.33e+03 R= 2e+03 -Depth= 117893 States= 1.6e+07 Transitions= 4.95e+09 Memory= 1078.693 t= 7.83e+03 R= 2e+03 -Depth= 117893 States= 1.7e+07 Transitions= 5.24e+09 Memory= 1106.135 t= 8.28e+03 R= 2e+03 -Depth= 117893 States= 1.8e+07 Transitions= 5.54e+09 Memory= 1135.920 t= 8.74e+03 R= 2e+03 -Depth= 117893 States= 1.9e+07 Transitions= 5.82e+09 Memory= 1164.338 t= 9.19e+03 R= 2e+03 -Depth= 117893 States= 2e+07 Transitions= 6.12e+09 Memory= 1194.514 t= 9.66e+03 R= 2e+03 -Depth= 117893 States= 2.1e+07 Transitions= 6.42e+09 Memory= 1223.713 t= 1.01e+04 R= 2e+03 -Depth= 117893 States= 2.2e+07 Transitions= 6.72e+09 Memory= 1252.912 t= 1.06e+04 R= 2e+03 -Depth= 117893 States= 2.3e+07 Transitions= 7.01e+09 Memory= 1280.744 t= 1.11e+04 R= 2e+03 -Depth= 117893 States= 2.4e+07 Transitions= 7.3e+09 Memory= 1311.408 t= 1.15e+04 R= 2e+03 -Depth= 117893 States= 2.5e+07 Transitions= 7.61e+09 Memory= 1336.994 t= 1.2e+04 R= 2e+03 -Depth= 117893 States= 2.6e+07 Transitions= 7.89e+09 Memory= 1365.315 t= 1.24e+04 R= 2e+03 -Depth= 117893 States= 2.7e+07 Transitions= 8.35e+09 Memory= 1390.315 t= 1.32e+04 R= 2e+03 -Depth= 117893 States= 2.8e+07 Transitions= 8.84e+09 Memory= 1414.143 t= 1.4e+04 R= 2e+03 -Depth= 117893 States= 2.9e+07 Transitions= 9.64e+09 Memory= 1438.166 t= 1.53e+04 R= 2e+03 -Depth= 117893 States= 3e+07 Transitions= 1.02e+10 Memory= 1462.971 t= 1.62e+04 R= 2e+03 -Depth= 117893 States= 3.1e+07 Transitions= 1.06e+10 Memory= 1488.068 t= 1.69e+04 R= 2e+03 -Depth= 117893 States= 3.2e+07 Transitions= 1.14e+10 Memory= 1512.287 t= 1.82e+04 R= 2e+03 -Depth= 117893 States= 3.3e+07 Transitions= 1.24e+10 Memory= 1536.799 t= 1.99e+04 R= 2e+03 -Depth= 117893 States= 3.4e+07 Transitions= 1.27e+10 Memory= 1567.658 t= 2.04e+04 R= 2e+03 -pan: resizing hashtable to -w26.. done -Depth= 117893 States= 3.5e+07 Transitions= 1.32e+10 Memory= 2089.424 t= 2.13e+04 R= 2e+03 -Depth= 117893 States= 3.6e+07 Transitions= 1.38e+10 Memory= 2116.768 t= 2.22e+04 R= 2e+03 -Depth= 117893 States= 3.7e+07 Transitions= 1.45e+10 Memory= 2142.158 t= 2.33e+04 R= 2e+03 -Depth= 117893 States= 3.8e+07 Transitions= 1.49e+10 Memory= 2170.674 t= 2.41e+04 R= 2e+03 -Depth= 117893 States= 3.9e+07 Transitions= 1.55e+10 Memory= 2197.725 t= 2.49e+04 R= 2e+03 -Depth= 117893 States= 4e+07 Transitions= 1.63e+10 Memory= 2219.014 t= 2.63e+04 R= 2e+03 -Depth= 117893 States= 4.1e+07 Transitions= 1.69e+10 Memory= 2242.061 t= 2.75e+04 R= 1e+03 -Depth= 117893 States= 4.2e+07 Transitions= 1.73e+10 Memory= 2269.600 t= 2.81e+04 R= 1e+03 -Depth= 117893 States= 4.3e+07 Transitions= 1.8e+10 Memory= 2295.967 t= 2.92e+04 R= 1e+03 -Depth= 117893 States= 4.4e+07 Transitions= 1.85e+10 Memory= 2323.213 t= 3e+04 R= 1e+03 -Depth= 117893 States= 4.5e+07 Transitions= 1.91e+10 Memory= 2348.994 t= 3.09e+04 R= 1e+03 -Depth= 117893 States= 4.6e+07 Transitions= 1.97e+10 Memory= 2374.190 t= 3.2e+04 R= 1e+03 -Depth= 117893 States= 4.7e+07 Transitions= 2.03e+10 Memory= 2399.483 t= 3.3e+04 R= 1e+03 -Depth= 117893 States= 4.8e+07 Transitions= 2.07e+10 Memory= 2428.486 t= 3.36e+04 R= 1e+03 -Depth= 117893 States= 4.9e+07 Transitions= 2.13e+10 Memory= 2454.951 t= 3.45e+04 R= 1e+03 -Depth= 117893 States= 5e+07 Transitions= 2.18e+10 Memory= 2482.686 t= 3.54e+04 R= 1e+03 -Depth= 117893 States= 5.1e+07 Transitions= 2.24e+10 Memory= 2509.151 t= 3.62e+04 R= 1e+03 -Depth= 117893 States= 5.2e+07 Transitions= 2.3e+10 Memory= 2535.420 t= 3.72e+04 R= 1e+03 -Depth= 117893 States= 5.3e+07 Transitions= 2.38e+10 Memory= 2560.518 t= 3.86e+04 R= 1e+03 -Depth= 117893 States= 5.4e+07 Transitions= 2.42e+10 Memory= 2586.592 t= 3.94e+04 R= 1e+03 -Depth= 117893 States= 5.5e+07 Transitions= 2.46e+10 Memory= 2610.713 t= 4e+04 R= 1e+03 -Depth= 117893 States= 5.6e+07 Transitions= 2.49e+10 Memory= 2638.545 t= 4.06e+04 R= 1e+03 -Depth= 117893 States= 5.7e+07 Transitions= 2.53e+10 Memory= 2668.135 t= 4.11e+04 R= 1e+03 -Depth= 117893 States= 5.8e+07 Transitions= 2.56e+10 Memory= 2698.213 t= 4.16e+04 R= 1e+03 -Depth= 117893 States= 5.9e+07 Transitions= 2.59e+10 Memory= 2723.897 t= 4.22e+04 R= 1e+03 -Depth= 117893 States= 6e+07 Transitions= 2.66e+10 Memory= 2747.627 t= 4.33e+04 R= 1e+03 -Depth= 117893 States= 6.1e+07 Transitions= 2.7e+10 Memory= 2774.678 t= 4.39e+04 R= 1e+03 -Depth= 117893 States= 6.2e+07 Transitions= 2.73e+10 Memory= 2803.584 t= 4.45e+04 R= 1e+03 -Depth= 117893 States= 6.3e+07 Transitions= 2.77e+10 Memory= 2831.221 t= 4.51e+04 R= 1e+03 -Depth= 117893 States= 6.4e+07 Transitions= 2.8e+10 Memory= 2860.225 t= 4.56e+04 R= 1e+03 -Depth= 117893 States= 6.5e+07 Transitions= 2.84e+10 Memory= 2885.225 t= 4.62e+04 R= 1e+03 -Depth= 117893 States= 6.6e+07 Transitions= 2.89e+10 Memory= 2908.760 t= 4.71e+04 R= 1e+03 -Depth= 117893 States= 6.7e+07 Transitions= 2.96e+10 Memory= 2932.686 t= 4.82e+04 R= 1e+03 -Depth= 117893 States= 6.8e+07 Transitions= 3.03e+10 Memory= 2956.123 t= 4.96e+04 R= 1e+03 -Depth= 117893 States= 6.9e+07 Transitions= 3.14e+10 Memory= 2985.908 t= 5.13e+04 R= 1e+03 -Depth= 117893 States= 7e+07 Transitions= 3.24e+10 Memory= 3015.303 t= 5.31e+04 R= 1e+03 -Depth= 117893 States= 7.1e+07 Transitions= 3.36e+10 Memory= 3039.912 t= 5.5e+04 R= 1e+03 -Depth= 117893 States= 7.2e+07 Transitions= 3.47e+10 Memory= 3065.401 t= 5.69e+04 R= 1e+03 -Depth= 117893 States= 7.3e+07 Transitions= 3.58e+10 Memory= 3086.690 t= 5.87e+04 R= 1e+03 -Depth= 117893 States= 7.4e+07 Transitions= 3.67e+10 Memory= 3108.272 t= 6.02e+04 R= 1e+03 -Depth= 117893 States= 7.5e+07 Transitions= 3.78e+10 Memory= 3127.608 t= 6.21e+04 R= 1e+03 -Depth= 117893 States= 7.6e+07 Transitions= 3.89e+10 Memory= 3147.627 t= 6.39e+04 R= 1e+03 -Depth= 117893 States= 7.7e+07 Transitions= 3.97e+10 Memory= 3167.647 t= 6.53e+04 R= 1e+03 -Depth= 117893 States= 7.8e+07 Transitions= 4.01e+10 Memory= 3195.772 t= 6.6e+04 R= 1e+03 -Depth= 117893 States= 7.9e+07 Transitions= 4.07e+10 Memory= 3221.065 t= 6.69e+04 R= 1e+03 -Depth= 117893 States= 8e+07 Transitions= 4.14e+10 Memory= 3245.869 t= 6.8e+04 R= 1e+03 -Depth= 117893 States= 8.1e+07 Transitions= 4.26e+10 Memory= 3270.186 t= 7e+04 R= 1e+03 -Depth= 117893 States= 8.2e+07 Transitions= 4.33e+10 Memory= 3293.135 t= 7.12e+04 R= 1e+03 -Depth= 117893 States= 8.3e+07 Transitions= 4.38e+10 Memory= 3323.701 t= 7.21e+04 R= 1e+03 -Depth= 117893 States= 8.4e+07 Transitions= 4.41e+10 Memory= 3350.752 t= 7.26e+04 R= 1e+03 -Depth= 117893 States= 8.5e+07 Transitions= 4.45e+10 Memory= 3375.166 t= 7.31e+04 R= 1e+03 -Depth= 117893 States= 8.6e+07 Transitions= 4.49e+10 Memory= 3397.432 t= 7.37e+04 R= 1e+03 -Depth= 117893 States= 8.7e+07 Transitions= 4.53e+10 Memory= 3424.287 t= 7.44e+04 R= 1e+03 -Depth= 117893 States= 8.8e+07 Transitions= 4.61e+10 Memory= 3449.385 t= 7.58e+04 R= 1e+03 -Depth= 117893 States= 8.9e+07 Transitions= 4.71e+10 Memory= 3469.795 t= 7.74e+04 R= 1e+03 -Depth= 117893 States= 9e+07 Transitions= 4.75e+10 Memory= 3498.018 t= 7.81e+04 R= 1e+03 -Depth= 117893 States= 9.1e+07 Transitions= 4.8e+10 Memory= 3524.678 t= 7.88e+04 R= 1e+03 -Depth= 117893 States= 9.2e+07 Transitions= 4.88e+10 Memory= 3549.776 t= 8.02e+04 R= 1e+03 -Depth= 117893 States= 9.3e+07 Transitions= 4.97e+10 Memory= 3573.897 t= 8.16e+04 R= 1e+03 -Depth= 117893 States= 9.4e+07 Transitions= 5.03e+10 Memory= 3598.311 t= 8.26e+04 R= 1e+03 -Depth= 117893 States= 9.5e+07 Transitions= 5.12e+10 Memory= 3621.358 t= 8.41e+04 R= 1e+03 -Depth= 117893 States= 9.6e+07 Transitions= 5.19e+10 Memory= 3645.381 t= 8.52e+04 R= 1e+03 -Depth= 117893 States= 9.7e+07 Transitions= 5.26e+10 Memory= 3669.502 t= 8.64e+04 R= 1e+03 -Depth= 117893 States= 9.8e+07 Transitions= 5.32e+10 Memory= 3693.233 t= 8.75e+04 R= 1e+03 -Depth= 117893 States= 9.9e+07 Transitions= 5.36e+10 Memory= 3723.115 t= 8.8e+04 R= 1e+03 -Depth= 117893 States= 1e+08 Transitions= 5.41e+10 Memory= 3748.799 t= 8.89e+04 R= 1e+03 -Depth= 117893 States= 1.01e+08 Transitions= 5.51e+10 Memory= 3771.943 t= 9.05e+04 R= 1e+03 -Depth= 117893 States= 1.02e+08 Transitions= 5.59e+10 Memory= 3796.651 t= 9.18e+04 R= 1e+03 -Depth= 117893 States= 1.03e+08 Transitions= 5.64e+10 Memory= 3820.967 t= 9.28e+04 R= 1e+03 -Depth= 117893 States= 1.04e+08 Transitions= 5.71e+10 Memory= 3845.283 t= 9.39e+04 R= 1e+03 -Depth= 117893 States= 1.05e+08 Transitions= 5.76e+10 Memory= 3872.041 t= 9.46e+04 R= 1e+03 -Depth= 117893 States= 1.06e+08 Transitions= 5.8e+10 Memory= 3901.436 t= 9.54e+04 R= 1e+03 -Depth= 117893 States= 1.07e+08 Transitions= 5.85e+10 Memory= 3931.026 t= 9.61e+04 R= 1e+03 -Depth= 117893 States= 1.08e+08 Transitions= 5.89e+10 Memory= 3956.318 t= 9.68e+04 R= 1e+03 -Depth= 117893 States= 1.09e+08 Transitions= 5.96e+10 Memory= 3978.486 t= 9.79e+04 R= 1e+03 -Depth= 117893 States= 1.1e+08 Transitions= 6.02e+10 Memory= 4002.901 t= 9.89e+04 R= 1e+03 -Depth= 117893 States= 1.11e+08 Transitions= 6.06e+10 Memory= 4027.803 t= 9.96e+04 R= 1e+03 -Depth= 117893 States= 1.12e+08 Transitions= 6.12e+10 Memory= 4051.924 t= 1.01e+05 R= 1e+03 -Depth= 117893 States= 1.13e+08 Transitions= 6.16e+10 Memory= 4079.365 t= 1.01e+05 R= 1e+03 -Depth= 117893 States= 1.14e+08 Transitions= 6.22e+10 Memory= 4104.756 t= 1.02e+05 R= 1e+03 -Depth= 117893 States= 1.15e+08 Transitions= 6.28e+10 Memory= 4129.268 t= 1.03e+05 R= 1e+03 -Depth= 117893 States= 1.16e+08 Transitions= 6.38e+10 Memory= 4155.537 t= 1.05e+05 R= 1e+03 -Depth= 117893 States= 1.17e+08 Transitions= 6.44e+10 Memory= 4184.443 t= 1.06e+05 R= 1e+03 -Depth= 117893 States= 1.18e+08 Transitions= 6.48e+10 Memory= 4211.397 t= 1.07e+05 R= 1e+03 -Depth= 117893 States= 1.19e+08 Transitions= 6.51e+10 Memory= 4234.248 t= 1.07e+05 R= 1e+03 -Depth= 117893 States= 1.2e+08 Transitions= 6.58e+10 Memory= 4262.471 t= 1.08e+05 R= 1e+03 -Depth= 117893 States= 1.21e+08 Transitions= 6.65e+10 Memory= 4289.912 t= 1.17e+05 R= 1e+03 -Depth= 117893 States= 1.22e+08 Transitions= 6.69e+10 Memory= 4315.791 t= 1.17e+05 R= 1e+03 -Depth= 117893 States= 1.23e+08 Transitions= 6.74e+10 Memory= 4343.330 t= 1.18e+05 R= 1e+03 -Depth= 117893 States= 1.24e+08 Transitions= 6.83e+10 Memory= 4368.623 t= 1.19e+05 R= 1e+03 -Depth= 117893 States= 1.25e+08 Transitions= 6.86e+10 Memory= 4395.674 t= 1.2e+05 R= 1e+03 -Depth= 117893 States= 1.26e+08 Transitions= 6.9e+10 Memory= 4419.990 t= 1.21e+05 R= 1e+03 -Depth= 117893 States= 1.27e+08 Transitions= 6.94e+10 Memory= 4448.115 t= 1.21e+05 R= 1e+03 -Depth= 117893 States= 1.28e+08 Transitions= 7.02e+10 Memory= 4473.994 t= 1.23e+05 R= 1e+03 -Depth= 117893 States= 1.29e+08 Transitions= 7.05e+10 Memory= 4500.947 t= 1.23e+05 R= 1e+03 -Depth= 117893 States= 1.3e+08 Transitions= 7.09e+10 Memory= 4526.826 t= 1.24e+05 R= 1e+03 -Depth= 117893 States= 1.31e+08 Transitions= 7.18e+10 Memory= 4553.291 t= 1.25e+05 R= 1e+03 -Depth= 117893 States= 1.32e+08 Transitions= 7.21e+10 Memory= 4581.221 t= 1.26e+05 R= 1e+03 -Depth= 117893 States= 1.33e+08 Transitions= 7.25e+10 Memory= 4605.830 t= 1.26e+05 R= 1e+03 -Depth= 117893 States= 1.34e+08 Transitions= 7.3e+10 Memory= 4632.197 t= 1.27e+05 R= 1e+03 -Depth= 117893 States= 1.35e+08 Transitions= 7.35e+10 Memory= 4657.588 t= 1.33e+05 R= 1e+03 -pan: resizing hashtable to -w28.. done -Depth= 117893 States= 1.36e+08 Transitions= 7.38e+10 Memory= 6705.588 t= 1.33e+05 R= 1e+03 -Depth= 117893 States= 1.37e+08 Transitions= 7.46e+10 Memory= 6705.588 t= 1.35e+05 R= 1e+03 -Depth= 117893 States= 1.38e+08 Transitions= 7.54e+10 Memory= 6720.627 t= 1.36e+05 R= 1e+03 -Depth= 117893 States= 1.39e+08 Transitions= 7.57e+10 Memory= 6750.217 t= 1.37e+05 R= 1e+03 -Depth= 117893 States= 1.4e+08 Transitions= 7.61e+10 Memory= 6775.803 t= 1.37e+05 R= 1e+03 -Depth= 117893 States= 1.41e+08 Transitions= 7.65e+10 Memory= 6797.190 t= 1.38e+05 R= 1e+03 -Depth= 117893 States= 1.42e+08 Transitions= 7.71e+10 Memory= 6823.068 t= 1.39e+05 R= 1e+03 -Depth= 117893 States= 1.43e+08 Transitions= 7.76e+10 Memory= 6851.682 t= 1.4e+05 R= 1e+03 -Depth= 117893 States= 1.44e+08 Transitions= 7.83e+10 Memory= 6879.611 t= 1.41e+05 R= 1e+03 -Depth= 117893 States= 1.45e+08 Transitions= 7.87e+10 Memory= 6905.100 t= 1.41e+05 R= 1e+03 -Depth= 117893 States= 1.46e+08 Transitions= 7.91e+10 Memory= 6929.318 t= 1.42e+05 R= 1e+03 -Depth= 117893 States= 1.47e+08 Transitions= 7.96e+10 Memory= 6954.709 t= 1.43e+05 R= 1e+03 -Depth= 117893 States= 1.48e+08 Transitions= 8e+10 Memory= 6983.225 t= 1.44e+05 R= 1e+03 -Depth= 117893 States= 1.49e+08 Transitions= 8.05e+10 Memory= 7013.791 t= 1.44e+05 R= 1e+03 -Depth= 117893 States= 1.5e+08 Transitions= 8.15e+10 Memory= 7037.033 t= 1.46e+05 R= 1e+03 -Depth= 117893 States= 1.51e+08 Transitions= 8.19e+10 Memory= 7068.381 t= 1.47e+05 R= 1e+03 -Depth= 117893 States= 1.52e+08 Transitions= 8.22e+10 Memory= 7093.576 t= 1.47e+05 R= 1e+03 -Depth= 117893 States= 1.53e+08 Transitions= 8.26e+10 Memory= 7115.842 t= 1.48e+05 R= 1e+03 -Depth= 117893 States= 1.54e+08 Transitions= 8.3e+10 Memory= 7144.358 t= 1.48e+05 R= 1e+03 -Depth= 117893 States= 1.55e+08 Transitions= 8.39e+10 Memory= 7170.432 t= 1.5e+05 R= 1e+03 -Depth= 117893 States= 1.56e+08 Transitions= 8.42e+10 Memory= 7197.483 t= 1.5e+05 R= 1e+03 -Depth= 117893 States= 1.57e+08 Transitions= 8.46e+10 Memory= 7220.725 t= 1.51e+05 R= 1e+03 -Depth= 117893 States= 1.58e+08 Transitions= 8.51e+10 Memory= 7246.701 t= 1.52e+05 R= 1e+03 -Depth= 117893 States= 1.59e+08 Transitions= 8.55e+10 Memory= 7273.752 t= 1.52e+05 R= 1e+03 -Depth= 117893 States= 1.6e+08 Transitions= 8.58e+10 Memory= 7302.951 t= 1.53e+05 R= 1e+03 -Depth= 117893 States= 1.61e+08 Transitions= 8.64e+10 Memory= 7327.365 t= 1.54e+05 R= 1e+03 -Depth= 117893 States= 1.62e+08 Transitions= 8.69e+10 Memory= 7353.049 t= 1.55e+05 R= 1e+03 -Depth= 117893 States= 1.63e+08 Transitions= 8.73e+10 Memory= 7379.318 t= 1.55e+05 R= 1e+03 -Depth= 117893 States= 1.64e+08 Transitions= 8.77e+10 Memory= 7404.904 t= 1.56e+05 R= 1e+03 -Depth= 117893 States= 1.65e+08 Transitions= 8.82e+10 Memory= 7429.514 t= 1.57e+05 R= 1e+03 -Depth= 117893 States= 1.66e+08 Transitions= 8.87e+10 Memory= 7453.733 t= 1.58e+05 R= 1e+03 -Depth= 117893 States= 1.67e+08 Transitions= 8.95e+10 Memory= 7477.561 t= 1.59e+05 R= 1e+03 -Depth= 117893 States= 1.68e+08 Transitions= 9.02e+10 Memory= 7501.096 t= 1.6e+05 R= 1e+03 -Depth= 117893 States= 1.69e+08 Transitions= 9.07e+10 Memory= 7527.365 t= 1.61e+05 R= 1e+03 -Depth= 117893 States= 1.7e+08 Transitions= 9.11e+10 Memory= 7553.830 t= 1.61e+05 R= 1e+03 -Depth= 117893 States= 1.71e+08 Transitions= 9.16e+10 Memory= 7577.951 t= 1.62e+05 R= 1e+03 -Depth= 117893 States= 1.72e+08 Transitions= 9.24e+10 Memory= 7602.658 t= 1.63e+05 R= 1e+03 -Depth= 117893 States= 1.73e+08 Transitions= 9.35e+10 Memory= 7626.096 t= 1.65e+05 R= 1e+03 -Depth= 117893 States= 1.74e+08 Transitions= 9.39e+10 Memory= 7656.369 t= 1.66e+05 R= 1e+03 -Depth= 117893 States= 1.75e+08 Transitions= 9.43e+10 Memory= 7682.834 t= 1.67e+05 R= 1e+03 -Depth= 117893 States= 1.76e+08 Transitions= 9.49e+10 Memory= 7709.201 t= 1.67e+05 R= 1e+03 -Depth= 117893 States= 1.77e+08 Transitions= 9.55e+10 Memory= 7736.447 t= 1.68e+05 R= 1e+03 -Depth= 117893 States= 1.78e+08 Transitions= 9.61e+10 Memory= 7763.791 t= 1.69e+05 R= 1e+03 -Depth= 117893 States= 1.79e+08 Transitions= 9.66e+10 Memory= 7790.061 t= 1.7e+05 R= 1e+03 -Depth= 117893 States= 1.8e+08 Transitions= 9.72e+10 Memory= 7817.600 t= 1.71e+05 R= 1e+03 -Depth= 117893 States= 1.81e+08 Transitions= 9.8e+10 Memory= 7837.912 t= 1.73e+05 R= 1e+03 -Depth= 117893 States= 1.82e+08 Transitions= 9.88e+10 Memory= 7858.127 t= 1.74e+05 R= 1e+03 -Depth= 117893 States= 1.83e+08 Transitions= 9.95e+10 Memory= 7886.154 t= 1.75e+05 R= 1e+03 -Depth= 117893 States= 1.84e+08 Transitions= 1e+11 Memory= 7912.522 t= 1.76e+05 R= 1e+03 -Depth= 117893 States= 1.85e+08 Transitions= 1.01e+11 Memory= 7937.717 t= 1.77e+05 R= 1e+03 -Depth= 117893 States= 1.86e+08 Transitions= 1.02e+11 Memory= 7962.815 t= 1.78e+05 R= 1e+03 -Depth= 117893 States= 1.87e+08 Transitions= 1.02e+11 Memory= 7988.010 t= 1.79e+05 R= 1e+03 -Depth= 117893 States= 1.88e+08 Transitions= 1.03e+11 Memory= 8014.768 t= 1.8e+05 R= 1e+03 -Depth= 117893 States= 1.89e+08 Transitions= 1.03e+11 Memory= 8040.061 t= 1.81e+05 R= 1e+03 -Depth= 117893 States= 1.9e+08 Transitions= 1.04e+11 Memory= 8066.818 t= 1.82e+05 R= 1e+03 -Depth= 117893 States= 1.91e+08 Transitions= 1.05e+11 Memory= 8090.451 t= 1.83e+05 R= 1e+03 -Depth= 117893 States= 1.92e+08 Transitions= 1.05e+11 Memory= 8116.330 t= 1.84e+05 R= 1e+03 -Depth= 117893 States= 1.93e+08 Transitions= 1.06e+11 Memory= 8144.748 t= 1.85e+05 R= 1e+03 -Depth= 117893 States= 1.94e+08 Transitions= 1.07e+11 Memory= 8170.822 t= 1.86e+05 R= 1e+03 -Depth= 117893 States= 1.95e+08 Transitions= 1.07e+11 Memory= 8196.604 t= 1.87e+05 R= 1e+03 -Depth= 117893 States= 1.96e+08 Transitions= 1.07e+11 Memory= 8222.873 t= 1.87e+05 R= 1e+03 -Depth= 117893 States= 1.97e+08 Transitions= 1.08e+11 Memory= 8252.658 t= 1.88e+05 R= 1e+03 -Depth= 117893 States= 1.98e+08 Transitions= 1.08e+11 Memory= 8278.147 t= 1.89e+05 R= 1e+03 -Depth= 117893 States= 1.99e+08 Transitions= 1.08e+11 Memory= 8305.490 t= 1.89e+05 R= 1e+03 -Depth= 117893 States= 2e+08 Transitions= 1.09e+11 Memory= 8332.151 t= 1.9e+05 R= 1e+03 -Depth= 117893 States= 2.01e+08 Transitions= 1.09e+11 Memory= 8355.979 t= 1.91e+05 R= 1e+03 -Depth= 117893 States= 2.02e+08 Transitions= 1.1e+11 Memory= 8383.225 t= 1.91e+05 R= 1e+03 -Depth= 117893 States= 2.03e+08 Transitions= 1.1e+11 Memory= 8410.959 t= 1.92e+05 R= 1e+03 -Depth= 117893 States= 2.04e+08 Transitions= 1.11e+11 Memory= 8437.912 t= 1.93e+05 R= 1e+03 -Depth= 117893 States= 2.05e+08 Transitions= 1.11e+11 Memory= 8465.256 t= 1.94e+05 R= 1e+03 -Depth= 117893 States= 2.06e+08 Transitions= 1.12e+11 Memory= 8489.670 t= 1.94e+05 R= 1e+03 -Depth= 117893 States= 2.07e+08 Transitions= 1.12e+11 Memory= 8517.600 t= 1.95e+05 R= 1e+03 -Depth= 117893 States= 2.08e+08 Transitions= 1.12e+11 Memory= 8543.088 t= 1.96e+05 R= 1e+03 -Depth= 117893 States= 2.09e+08 Transitions= 1.13e+11 Memory= 8566.233 t= 1.97e+05 R= 1e+03 -Depth= 117893 States= 2.1e+08 Transitions= 1.14e+11 Memory= 8590.744 t= 1.98e+05 R= 1e+03 -Depth= 117893 States= 2.11e+08 Transitions= 1.14e+11 Memory= 8613.693 t= 1.99e+05 R= 1e+03 -Depth= 117893 States= 2.12e+08 Transitions= 1.15e+11 Memory= 8642.502 t= 2.01e+05 R= 1e+03 -Depth= 117893 States= 2.13e+08 Transitions= 1.16e+11 Memory= 8672.873 t= 2.02e+05 R= 1e+03 -Depth= 117893 States= 2.14e+08 Transitions= 1.18e+11 Memory= 8697.483 t= 2.04e+05 R= 1e+03 -Depth= 117893 States= 2.15e+08 Transitions= 1.19e+11 Memory= 8722.190 t= 2.06e+05 R= 1e+03 -Depth= 117893 States= 2.16e+08 Transitions= 1.2e+11 Memory= 8744.455 t= 2.08e+05 R= 1e+03 -Depth= 117893 States= 2.17e+08 Transitions= 1.21e+11 Memory= 8765.842 t= 2.09e+05 R= 1e+03 -Depth= 117893 States= 2.18e+08 Transitions= 1.22e+11 Memory= 8785.861 t= 2.11e+05 R= 1e+03 -Depth= 117893 States= 2.19e+08 Transitions= 1.23e+11 Memory= 8804.904 t= 2.13e+05 R= 1e+03 -Depth= 117893 States= 2.2e+08 Transitions= 1.24e+11 Memory= 8823.850 t= 2.15e+05 R= 1e+03 -Depth= 117893 States= 2.21e+08 Transitions= 1.24e+11 Memory= 8850.705 t= 2.15e+05 R= 1e+03 -Depth= 117893 States= 2.22e+08 Transitions= 1.25e+11 Memory= 8877.365 t= 2.16e+05 R= 1e+03 -Depth= 117893 States= 2.23e+08 Transitions= 1.25e+11 Memory= 8902.268 t= 2.17e+05 R= 1e+03 -Depth= 117893 States= 2.24e+08 Transitions= 1.26e+11 Memory= 8927.268 t= 2.19e+05 R= 1e+03 -Depth= 117893 States= 2.25e+08 Transitions= 1.27e+11 Memory= 8949.143 t= 2.2e+05 R= 1e+03 -Depth= 117893 States= 2.26e+08 Transitions= 1.28e+11 Memory= 8973.459 t= 2.22e+05 R= 1e+03 -Depth= 117893 States= 2.27e+08 Transitions= 1.29e+11 Memory= 9004.807 t= 2.22e+05 R= 1e+03 -Depth= 117893 States= 2.28e+08 Transitions= 1.29e+11 Memory= 9031.174 t= 2.23e+05 R= 1e+03 -Depth= 117893 States= 2.29e+08 Transitions= 1.29e+11 Memory= 9054.709 t= 2.23e+05 R= 1e+03 -Depth= 117893 States= 2.3e+08 Transitions= 1.3e+11 Memory= 9077.756 t= 2.24e+05 R= 1e+03 -Depth= 117893 States= 2.31e+08 Transitions= 1.3e+11 Memory= 9103.830 t= 2.25e+05 R= 1e+03 -Depth= 117893 States= 2.32e+08 Transitions= 1.31e+11 Memory= 9128.830 t= 2.26e+05 R= 1e+03 -Depth= 117893 States= 2.33e+08 Transitions= 1.32e+11 Memory= 9150.315 t= 2.28e+05 R= 1e+03 -Depth= 117893 States= 2.34e+08 Transitions= 1.32e+11 Memory= 9175.705 t= 2.29e+05 R= 1e+03 -Depth= 117893 States= 2.35e+08 Transitions= 1.33e+11 Memory= 9201.096 t= 2.3e+05 R= 1e+03 -Depth= 117893 States= 2.36e+08 Transitions= 1.34e+11 Memory= 9226.682 t= 2.31e+05 R= 1e+03 -Depth= 117893 States= 2.37e+08 Transitions= 1.34e+11 Memory= 9253.049 t= 2.31e+05 R= 1e+03 -Depth= 117893 States= 2.38e+08 Transitions= 1.35e+11 Memory= 9276.291 t= 2.33e+05 R= 1e+03 -Depth= 117893 States= 2.39e+08 Transitions= 1.36e+11 Memory= 9300.608 t= 2.34e+05 R= 1e+03 -Depth= 117893 States= 2.4e+08 Transitions= 1.37e+11 Memory= 9324.240 t= 2.35e+05 R= 1e+03 -Depth= 117893 States= 2.41e+08 Transitions= 1.37e+11 Memory= 9348.361 t= 2.37e+05 R= 1e+03 -Depth= 117893 States= 2.42e+08 Transitions= 1.38e+11 Memory= 9372.873 t= 2.38e+05 R= 1e+03 -Depth= 117893 States= 2.43e+08 Transitions= 1.39e+11 Memory= 9396.604 t= 2.39e+05 R= 1e+03 -Depth= 117893 States= 2.44e+08 Transitions= 1.39e+11 Memory= 9421.994 t= 2.4e+05 R= 1e+03 -Depth= 117893 States= 2.45e+08 Transitions= 1.4e+11 Memory= 9450.998 t= 2.41e+05 R= 1e+03 -Depth= 117893 States= 2.46e+08 Transitions= 1.41e+11 Memory= 9475.217 t= 2.42e+05 R= 1e+03 -Depth= 117893 States= 2.47e+08 Transitions= 1.41e+11 Memory= 9498.264 t= 2.43e+05 R= 1e+03 -Depth= 117893 States= 2.48e+08 Transitions= 1.42e+11 Memory= 9522.580 t= 2.44e+05 R= 1e+03 -Depth= 117893 States= 2.49e+08 Transitions= 1.42e+11 Memory= 9549.924 t= 2.45e+05 R= 1e+03 -Depth= 117893 States= 2.5e+08 Transitions= 1.43e+11 Memory= 9579.807 t= 2.45e+05 R= 1e+03 -Depth= 117893 States= 2.51e+08 Transitions= 1.43e+11 Memory= 9609.104 t= 2.46e+05 R= 1e+03 -Depth= 117893 States= 2.52e+08 Transitions= 1.44e+11 Memory= 9631.858 t= 2.47e+05 R= 1e+03 -Depth= 117893 States= 2.53e+08 Transitions= 1.45e+11 Memory= 9652.756 t= 2.48e+05 R= 1e+03 -Depth= 117893 States= 2.54e+08 Transitions= 1.45e+11 Memory= 9678.733 t= 2.49e+05 R= 1e+03 -Depth= 117893 States= 2.55e+08 Transitions= 1.45e+11 Memory= 9703.733 t= 2.5e+05 R= 1e+03 -Depth= 117893 States= 2.56e+08 Transitions= 1.46e+11 Memory= 9728.440 t= 2.5e+05 R= 1e+03 -Depth= 117893 States= 2.57e+08 Transitions= 1.46e+11 Memory= 9757.834 t= 2.51e+05 R= 1e+03 -Depth= 117893 States= 2.58e+08 Transitions= 1.47e+11 Memory= 9784.006 t= 2.52e+05 R= 1e+03 -Depth= 117893 States= 2.59e+08 Transitions= 1.48e+11 Memory= 9810.959 t= 2.54e+05 R= 1e+03 -Depth= 117893 States= 2.6e+08 Transitions= 1.48e+11 Memory= 9839.475 t= 2.54e+05 R= 1e+03 -Depth= 117893 States= 2.61e+08 Transitions= 1.49e+11 Memory= 9862.717 t= 2.55e+05 R= 1e+03 -Depth= 117893 States= 2.62e+08 Transitions= 1.49e+11 Memory= 9891.428 t= 2.56e+05 R= 1e+03 -Depth= 117893 States= 2.63e+08 Transitions= 1.5e+11 Memory= 9916.623 t= 2.57e+05 R= 1e+03 -Depth= 117893 States= 2.64e+08 Transitions= 1.5e+11 Memory= 9944.162 t= 2.58e+05 R= 1e+03 -Depth= 117893 States= 2.65e+08 Transitions= 1.51e+11 Memory= 9969.358 t= 2.58e+05 R= 1e+03 -Depth= 117893 States= 2.66e+08 Transitions= 1.52e+11 Memory= 9995.432 t= 2.6e+05 R= 1e+03 -Depth= 117893 States= 2.67e+08 Transitions= 1.52e+11 Memory= 10023.654 t= 2.6e+05 R= 1e+03 -Depth= 117893 States= 2.68e+08 Transitions= 1.52e+11 Memory= 10047.580 t= 2.61e+05 R= 1e+03 -Depth= 117893 States= 2.69e+08 Transitions= 1.53e+11 Memory= 10075.022 t= 2.62e+05 R= 1e+03 -Depth= 117893 States= 2.7e+08 Transitions= 1.54e+11 Memory= 10101.779 t= 2.63e+05 R= 1e+03 -Depth= 117893 States= 2.71e+08 Transitions= 1.54e+11 Memory= 10129.221 t= 2.64e+05 R= 1e+03 -Depth= 117893 States= 2.72e+08 Transitions= 1.54e+11 Memory= 10154.416 t= 2.64e+05 R= 1e+03 -Depth= 117893 States= 2.73e+08 Transitions= 1.55e+11 Memory= 10180.393 t= 2.66e+05 R= 1e+03 -Depth= 117893 States= 2.74e+08 Transitions= 1.56e+11 Memory= 10209.104 t= 2.66e+05 R= 1e+03 -Depth= 117893 States= 2.75e+08 Transitions= 1.56e+11 Memory= 10232.541 t= 2.67e+05 R= 1e+03 -Depth= 117893 States= 2.76e+08 Transitions= 1.57e+11 Memory= 10259.690 t= 2.68e+05 R= 1e+03 -Depth= 117893 States= 2.77e+08 Transitions= 1.57e+11 Memory= 10285.080 t= 2.68e+05 R= 1e+03 -Depth= 117893 States= 2.78e+08 Transitions= 1.57e+11 Memory= 10311.154 t= 2.69e+05 R= 1e+03 -Depth= 117893 States= 2.79e+08 Transitions= 1.58e+11 Memory= 10337.033 t= 2.71e+05 R= 1e+03 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.log b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.log deleted file mode 100644 index f9e72c0..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.log +++ /dev/null @@ -1,810 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi-compress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -depth 7: Claim reached state 9 (line 1367) -depth 50: Claim reached state 9 (line 1366) -Depth= 7605 States= 1e+06 Transitions= 3.21e+08 Memory= 493.010 t= 500 R= 2e+03 -Depth= 7605 States= 2e+06 Transitions= 6.35e+08 Memory= 518.401 t= 996 R= 2e+03 -Depth= 7605 States= 3e+06 Transitions= 9.46e+08 Memory= 549.455 t= 1.5e+03 R= 2e+03 -pan: resizing hashtable to -w22.. done -Depth= 7605 States= 4e+06 Transitions= 1.25e+09 Memory= 609.776 t= 1.97e+03 R= 2e+03 -Depth= 9389 States= 5e+06 Transitions= 1.56e+09 Memory= 634.873 t= 2.46e+03 R= 2e+03 -Depth= 9389 States= 6e+06 Transitions= 1.88e+09 Memory= 662.315 t= 2.97e+03 R= 2e+03 -Depth= 9389 States= 7e+06 Transitions= 2.25e+09 Memory= 688.193 t= 3.58e+03 R= 2e+03 -Depth= 9389 States= 8e+06 Transitions= 2.61e+09 Memory= 716.611 t= 4.18e+03 R= 2e+03 -Depth= 9389 States= 9e+06 Transitions= 2.96e+09 Memory= 743.662 t= 4.75e+03 R= 2e+03 -pan: resizing hashtable to -w24.. done -Depth= 9389 States= 1e+07 Transitions= 3.29e+09 Memory= 894.611 t= 5.26e+03 R= 2e+03 -Depth= 9389 States= 1.1e+07 Transitions= 3.62e+09 Memory= 921.076 t= 5.77e+03 R= 2e+03 -Depth= 9389 States= 1.2e+07 Transitions= 3.93e+09 Memory= 947.053 t= 6.27e+03 R= 2e+03 -Depth= 9389 States= 1.3e+07 Transitions= 4.25e+09 Memory= 974.299 t= 6.76e+03 R= 2e+03 -Depth= 9389 States= 1.4e+07 Transitions= 4.55e+09 Memory= 1004.963 t= 7.23e+03 R= 2e+03 -Depth= 9389 States= 1.5e+07 Transitions= 4.87e+09 Memory= 1029.963 t= 7.73e+03 R= 2e+03 -Depth= 9389 States= 1.6e+07 Transitions= 5.18e+09 Memory= 1058.088 t= 8.23e+03 R= 2e+03 -Depth= 9389 States= 1.7e+07 Transitions= 5.48e+09 Memory= 1087.580 t= 8.71e+03 R= 2e+03 -Depth= 9389 States= 1.8e+07 Transitions= 5.79e+09 Memory= 1113.166 t= 9.19e+03 R= 2e+03 -Depth= 9389 States= 1.9e+07 Transitions= 6.1e+09 Memory= 1139.143 t= 9.68e+03 R= 2e+03 -Depth= 9389 States= 2e+07 Transitions= 6.59e+09 Memory= 1164.436 t= 1.05e+04 R= 2e+03 -Depth= 9389 States= 2.1e+07 Transitions= 7.19e+09 Memory= 1188.557 t= 1.15e+04 R= 2e+03 -Depth= 9389 States= 2.2e+07 Transitions= 8.02e+09 Memory= 1210.236 t= 1.28e+04 R= 2e+03 -Depth= 9389 States= 2.3e+07 Transitions= 8.41e+09 Memory= 1237.385 t= 1.35e+04 R= 2e+03 -Depth= 9389 States= 2.4e+07 Transitions= 8.96e+09 Memory= 1261.604 t= 1.44e+04 R= 2e+03 -Depth= 9389 States= 2.5e+07 Transitions= 9.91e+09 Memory= 1287.287 t= 1.6e+04 R= 2e+03 -Depth= 9389 States= 2.6e+07 Transitions= 1.06e+10 Memory= 1312.971 t= 1.71e+04 R= 2e+03 -Depth= 9600 States= 2.7e+07 Transitions= 1.1e+10 Memory= 1340.510 t= 1.78e+04 R= 2e+03 -Depth= 9600 States= 2.8e+07 Transitions= 1.15e+10 Memory= 1367.756 t= 1.86e+04 R= 2e+03 -Depth= 9600 States= 2.9e+07 Transitions= 1.21e+10 Memory= 1395.100 t= 1.96e+04 R= 1e+03 -Depth= 9600 States= 3e+07 Transitions= 1.27e+10 Memory= 1422.639 t= 2.05e+04 R= 1e+03 -Depth= 9600 States= 3.1e+07 Transitions= 1.32e+10 Memory= 1448.908 t= 2.15e+04 R= 1e+03 -Depth= 9600 States= 3.2e+07 Transitions= 1.39e+10 Memory= 1474.494 t= 2.25e+04 R= 1e+03 -Depth= 9600 States= 3.3e+07 Transitions= 1.46e+10 Memory= 1494.807 t= 2.38e+04 R= 1e+03 -Depth= 9600 States= 3.4e+07 Transitions= 1.52e+10 Memory= 1519.709 t= 2.47e+04 R= 1e+03 -pan: resizing hashtable to -w26.. done -Depth= 9600 States= 3.5e+07 Transitions= 1.58e+10 Memory= 2042.061 t= 2.57e+04 R= 1e+03 -Depth= 9600 States= 3.6e+07 Transitions= 1.63e+10 Memory= 2068.916 t= 2.66e+04 R= 1e+03 -Depth= 9600 States= 3.7e+07 Transitions= 1.7e+10 Memory= 2094.404 t= 2.75e+04 R= 1e+03 -Depth= 9600 States= 3.8e+07 Transitions= 1.76e+10 Memory= 2119.893 t= 2.86e+04 R= 1e+03 -Depth= 9600 States= 3.9e+07 Transitions= 1.82e+10 Memory= 2144.697 t= 2.96e+04 R= 1e+03 -Depth= 9600 States= 4e+07 Transitions= 1.87e+10 Memory= 2173.018 t= 3.03e+04 R= 1e+03 -Depth= 9600 States= 4.1e+07 Transitions= 1.93e+10 Memory= 2200.068 t= 3.13e+04 R= 1e+03 -Depth= 9600 States= 4.2e+07 Transitions= 1.98e+10 Memory= 2225.459 t= 3.22e+04 R= 1e+03 -Depth= 9600 States= 4.3e+07 Transitions= 2.05e+10 Memory= 2252.217 t= 3.32e+04 R= 1e+03 -Depth= 9600 States= 4.4e+07 Transitions= 2.13e+10 Memory= 2275.557 t= 3.45e+04 R= 1e+03 -Depth= 9600 States= 4.5e+07 Transitions= 2.18e+10 Memory= 2303.096 t= 3.53e+04 R= 1e+03 -Depth= 9600 States= 4.6e+07 Transitions= 2.22e+10 Memory= 2327.608 t= 3.59e+04 R= 1e+03 -Depth= 9600 States= 4.7e+07 Transitions= 2.25e+10 Memory= 2355.342 t= 3.65e+04 R= 1e+03 -Depth= 9600 States= 4.8e+07 Transitions= 2.28e+10 Memory= 2385.029 t= 3.7e+04 R= 1e+03 -Depth= 9600 States= 4.9e+07 Transitions= 2.32e+10 Memory= 2413.643 t= 3.75e+04 R= 1e+03 -Depth= 9600 States= 5e+07 Transitions= 2.35e+10 Memory= 2439.522 t= 3.81e+04 R= 1e+03 -Depth= 9600 States= 5.1e+07 Transitions= 2.42e+10 Memory= 2462.959 t= 3.91e+04 R= 1e+03 -Depth= 9600 States= 5.2e+07 Transitions= 2.46e+10 Memory= 2490.498 t= 3.97e+04 R= 1e+03 -Depth= 9600 States= 5.3e+07 Transitions= 2.49e+10 Memory= 2519.600 t= 4.03e+04 R= 1e+03 -Depth= 9600 States= 5.4e+07 Transitions= 2.53e+10 Memory= 2545.674 t= 4.09e+04 R= 1e+03 -Depth= 9600 States= 5.5e+07 Transitions= 2.56e+10 Memory= 2574.190 t= 4.13e+04 R= 1e+03 -Depth= 9600 States= 5.6e+07 Transitions= 2.6e+10 Memory= 2598.604 t= 4.2e+04 R= 1e+03 -Depth= 9600 States= 5.7e+07 Transitions= 2.66e+10 Memory= 2622.334 t= 4.3e+04 R= 1e+03 -Depth= 9600 States= 5.8e+07 Transitions= 2.73e+10 Memory= 2645.869 t= 4.41e+04 R= 1e+03 -Depth= 9600 States= 5.9e+07 Transitions= 2.81e+10 Memory= 2668.623 t= 4.54e+04 R= 1e+03 -Depth= 9600 States= 6e+07 Transitions= 2.91e+10 Memory= 2701.631 t= 4.72e+04 R= 1e+03 -Depth= 9600 States= 6.1e+07 Transitions= 3.02e+10 Memory= 2729.170 t= 4.9e+04 R= 1e+03 -Depth= 9600 States= 6.2e+07 Transitions= 3.14e+10 Memory= 2754.072 t= 5.09e+04 R= 1e+03 -Depth= 9600 States= 6.3e+07 Transitions= 3.25e+10 Memory= 2778.682 t= 5.29e+04 R= 1e+03 -Depth= 9600 States= 6.4e+07 Transitions= 3.35e+10 Memory= 2799.190 t= 5.46e+04 R= 1e+03 -Depth= 9600 States= 6.5e+07 Transitions= 3.45e+10 Memory= 2820.869 t= 5.61e+04 R= 1e+03 -Depth= 9600 States= 6.6e+07 Transitions= 3.56e+10 Memory= 2840.401 t= 5.81e+04 R= 1e+03 -Depth= 9600 States= 6.7e+07 Transitions= 3.66e+10 Memory= 2859.443 t= 5.98e+04 R= 1e+03 -Depth= 9600 States= 6.8e+07 Transitions= 3.74e+10 Memory= 2881.807 t= 6.1e+04 R= 1e+03 -Depth= 9600 States= 6.9e+07 Transitions= 3.78e+10 Memory= 2909.053 t= 6.17e+04 R= 1e+03 -Depth= 9600 States= 7e+07 Transitions= 3.84e+10 Memory= 2934.151 t= 6.27e+04 R= 1e+03 -Depth= 9600 States= 7.1e+07 Transitions= 3.94e+10 Memory= 2959.053 t= 6.43e+04 R= 1e+03 -Depth= 9600 States= 7.2e+07 Transitions= 4.05e+10 Memory= 2980.049 t= 6.62e+04 R= 1e+03 -Depth= 9600 States= 7.3e+07 Transitions= 4.11e+10 Memory= 3007.197 t= 6.72e+04 R= 1e+03 -Depth= 9600 States= 7.4e+07 Transitions= 4.14e+10 Memory= 3037.276 t= 6.78e+04 R= 1e+03 -Depth= 9600 States= 7.5e+07 Transitions= 4.18e+10 Memory= 3063.252 t= 6.83e+04 R= 1e+03 -Depth= 9600 States= 7.6e+07 Transitions= 4.21e+10 Memory= 3087.276 t= 6.89e+04 R= 1e+03 -Depth= 9600 States= 7.7e+07 Transitions= 4.26e+10 Memory= 3112.178 t= 6.95e+04 R= 1e+03 -Depth= 9600 States= 7.8e+07 Transitions= 4.3e+10 Memory= 3137.764 t= 7.03e+04 R= 1e+03 -Depth= 9600 States= 7.9e+07 Transitions= 4.4e+10 Memory= 3162.178 t= 7.2e+04 R= 1e+03 -Depth= 9600 States= 8e+07 Transitions= 4.48e+10 Memory= 3185.420 t= 7.32e+04 R= 1e+03 -Depth= 9600 States= 8.1e+07 Transitions= 4.53e+10 Memory= 3212.276 t= 7.4e+04 R= 1e+03 -Depth= 9600 States= 8.2e+07 Transitions= 4.6e+10 Memory= 3237.178 t= 7.52e+04 R= 1e+03 -Depth= 9600 States= 8.3e+07 Transitions= 4.7e+10 Memory= 3261.299 t= 7.69e+04 R= 1e+03 -Depth= 9600 States= 8.4e+07 Transitions= 4.75e+10 Memory= 3286.104 t= 7.76e+04 R= 1e+03 -Depth= 9600 States= 8.5e+07 Transitions= 4.84e+10 Memory= 3309.639 t= 7.91e+04 R= 1e+03 -Depth= 9600 States= 8.6e+07 Transitions= 4.91e+10 Memory= 3333.272 t= 8.04e+04 R= 1e+03 -Depth= 9600 States= 8.7e+07 Transitions= 4.98e+10 Memory= 3358.272 t= 8.15e+04 R= 1e+03 -Depth= 9600 States= 8.8e+07 Transitions= 5.04e+10 Memory= 3382.490 t= 8.25e+04 R= 1e+03 -Depth= 9600 States= 8.9e+07 Transitions= 5.09e+10 Memory= 3410.908 t= 8.32e+04 R= 1e+03 -Depth= 9600 States= 9e+07 Transitions= 5.14e+10 Memory= 3437.959 t= 8.41e+04 R= 1e+03 -Depth= 9600 States= 9.1e+07 Transitions= 5.23e+10 Memory= 3460.908 t= 8.56e+04 R= 1e+03 -Depth= 9600 States= 9.2e+07 Transitions= 5.32e+10 Memory= 3484.639 t= 8.71e+04 R= 1e+03 -Depth= 9600 States= 9.3e+07 Transitions= 5.37e+10 Memory= 3509.932 t= 8.79e+04 R= 1e+03 -Depth= 9600 States= 9.4e+07 Transitions= 5.44e+10 Memory= 3534.346 t= 8.91e+04 R= 1e+03 -Depth= 9600 States= 9.5e+07 Transitions= 5.49e+10 Memory= 3561.299 t= 8.98e+04 R= 1e+03 -Depth= 9600 States= 9.6e+07 Transitions= 5.53e+10 Memory= 3589.522 t= 9.06e+04 R= 1e+03 -Depth= 9600 States= 9.7e+07 Transitions= 5.58e+10 Memory= 3619.209 t= 9.14e+04 R= 1e+03 -Depth= 9600 States= 9.8e+07 Transitions= 5.62e+10 Memory= 3645.576 t= 9.2e+04 R= 1e+03 -Depth= 9600 States= 9.9e+07 Transitions= 5.68e+10 Memory= 3668.623 t= 9.31e+04 R= 1e+03 -Depth= 9600 States= 1e+08 Transitions= 5.75e+10 Memory= 3692.061 t= 9.41e+04 R= 1e+03 -Depth= 9600 States= 1.01e+08 Transitions= 5.79e+10 Memory= 3717.940 t= 9.48e+04 R= 1e+03 -Depth= 9600 States= 1.02e+08 Transitions= 5.85e+10 Memory= 3741.963 t= 9.57e+04 R= 1e+03 -Depth= 9600 States= 1.03e+08 Transitions= 5.89e+10 Memory= 3768.428 t= 9.64e+04 R= 1e+03 -Depth= 9600 States= 1.04e+08 Transitions= 5.95e+10 Memory= 3795.186 t= 9.75e+04 R= 1e+03 -Depth= 9600 States= 1.05e+08 Transitions= 6.01e+10 Memory= 3820.283 t= 9.84e+04 R= 1e+03 -Depth= 9600 States= 1.06e+08 Transitions= 6.09e+10 Memory= 3846.358 t= 9.98e+04 R= 1e+03 -Depth= 10157 States= 1.07e+08 Transitions= 6.17e+10 Memory= 3873.408 t= 1.01e+05 R= 1e+03 -Depth= 10157 States= 1.08e+08 Transitions= 6.21e+10 Memory= 3901.924 t= 1.02e+05 R= 1e+03 -Depth= 10157 States= 1.09e+08 Transitions= 6.24e+10 Memory= 3925.850 t= 1.02e+05 R= 1e+03 -Depth= 10157 States= 1.1e+08 Transitions= 6.29e+10 Memory= 3955.244 t= 1.03e+05 R= 1e+03 -Depth= 10193 States= 1.11e+08 Transitions= 6.38e+10 Memory= 3979.854 t= 1.05e+05 R= 1e+03 -Depth= 10193 States= 1.12e+08 Transitions= 6.42e+10 Memory= 4007.686 t= 1.05e+05 R= 1e+03 -Depth= 10193 States= 1.13e+08 Transitions= 6.45e+10 Memory= 4033.076 t= 1.06e+05 R= 1e+03 -Depth= 10193 States= 1.14e+08 Transitions= 6.55e+10 Memory= 4060.127 t= 1.07e+05 R= 1e+03 -Depth= 10193 States= 1.15e+08 Transitions= 6.59e+10 Memory= 4088.057 t= 1.08e+05 R= 1e+03 -Depth= 10193 States= 1.16e+08 Transitions= 6.63e+10 Memory= 4112.276 t= 1.09e+05 R= 1e+03 -Depth= 10193 States= 1.17e+08 Transitions= 6.66e+10 Memory= 4140.986 t= 1.09e+05 R= 1e+03 -Depth= 10193 States= 1.18e+08 Transitions= 6.73e+10 Memory= 4167.158 t= 1.1e+05 R= 1e+03 -Depth= 10193 States= 1.19e+08 Transitions= 6.78e+10 Memory= 4195.088 t= 1.11e+05 R= 1e+03 -Depth= 10193 States= 1.2e+08 Transitions= 6.82e+10 Memory= 4220.674 t= 1.12e+05 R= 1e+03 -Depth= 10193 States= 1.21e+08 Transitions= 6.9e+10 Memory= 4247.041 t= 1.13e+05 R= 1e+03 -Depth= 10193 States= 1.22e+08 Transitions= 6.94e+10 Memory= 4275.166 t= 1.14e+05 R= 1e+03 -Depth= 10193 States= 1.23e+08 Transitions= 6.98e+10 Memory= 4299.287 t= 1.14e+05 R= 1e+03 -Depth= 10193 States= 1.24e+08 Transitions= 7.03e+10 Memory= 4326.143 t= 1.15e+05 R= 1e+03 -Depth= 10193 States= 1.25e+08 Transitions= 7.08e+10 Memory= 4352.901 t= 1.16e+05 R= 1e+03 -Depth= 10193 States= 1.26e+08 Transitions= 7.11e+10 Memory= 4380.440 t= 1.17e+05 R= 1e+03 -Depth= 10193 States= 1.27e+08 Transitions= 7.17e+10 Memory= 4407.490 t= 1.18e+05 R= 1e+03 -Depth= 10193 States= 1.28e+08 Transitions= 7.26e+10 Memory= 4431.026 t= 1.19e+05 R= 1e+03 -Depth= 10193 States= 1.29e+08 Transitions= 7.3e+10 Memory= 4461.787 t= 1.2e+05 R= 1e+03 -Depth= 10193 States= 1.3e+08 Transitions= 7.34e+10 Memory= 4487.373 t= 1.2e+05 R= 1e+03 -Depth= 10193 States= 1.31e+08 Transitions= 7.37e+10 Memory= 4511.006 t= 1.21e+05 R= 1e+03 -Depth= 10193 States= 1.32e+08 Transitions= 7.43e+10 Memory= 4536.494 t= 1.22e+05 R= 1e+03 -Depth= 10193 States= 1.33e+08 Transitions= 7.47e+10 Memory= 4564.815 t= 1.23e+05 R= 1e+03 -Depth= 10193 States= 1.34e+08 Transitions= 7.56e+10 Memory= 4590.498 t= 1.24e+05 R= 1e+03 -Depth= 10193 States= 1.35e+08 Transitions= 7.6e+10 Memory= 4619.209 t= 1.25e+05 R= 1e+03 -pan: resizing hashtable to -w28.. done -Depth= 10193 States= 1.36e+08 Transitions= 7.63e+10 Memory= 6667.209 t= 1.25e+05 R= 1e+03 -Depth= 10193 States= 1.37e+08 Transitions= 7.68e+10 Memory= 6667.209 t= 1.26e+05 R= 1e+03 -Depth= 10193 States= 1.38e+08 Transitions= 7.73e+10 Memory= 6680.490 t= 1.27e+05 R= 1e+03 -Depth= 10193 States= 1.39e+08 Transitions= 7.76e+10 Memory= 6710.178 t= 1.27e+05 R= 1e+03 -Depth= 10193 States= 1.4e+08 Transitions= 7.86e+10 Memory= 6736.252 t= 1.29e+05 R= 1e+03 -Depth= 10193 States= 1.41e+08 Transitions= 7.91e+10 Memory= 6765.647 t= 1.3e+05 R= 1e+03 -Depth= 10193 States= 1.42e+08 Transitions= 7.95e+10 Memory= 6792.697 t= 1.3e+05 R= 1e+03 -Depth= 10193 States= 1.43e+08 Transitions= 7.98e+10 Memory= 6816.818 t= 1.31e+05 R= 1e+03 -Depth= 10193 States= 1.44e+08 Transitions= 8.02e+10 Memory= 6842.893 t= 1.32e+05 R= 1e+03 -Depth= 10193 States= 1.45e+08 Transitions= 8.1e+10 Memory= 6870.236 t= 1.33e+05 R= 1e+03 -Depth= 10193 States= 1.46e+08 Transitions= 8.15e+10 Memory= 6898.361 t= 1.34e+05 R= 1e+03 -Depth= 10193 States= 1.47e+08 Transitions= 8.18e+10 Memory= 6922.092 t= 1.34e+05 R= 1e+03 -Depth= 10193 States= 1.48e+08 Transitions= 8.23e+10 Memory= 6948.557 t= 1.35e+05 R= 1e+03 -Depth= 10193 States= 1.49e+08 Transitions= 8.28e+10 Memory= 6974.533 t= 1.36e+05 R= 1e+03 -Depth= 10193 States= 1.5e+08 Transitions= 8.31e+10 Memory= 7004.221 t= 1.36e+05 R= 1e+03 -Depth= 10193 States= 1.51e+08 Transitions= 8.36e+10 Memory= 7029.416 t= 1.37e+05 R= 1e+03 -Depth= 10193 States= 1.52e+08 Transitions= 8.41e+10 Memory= 7055.588 t= 1.38e+05 R= 1e+03 -Depth= 10193 States= 1.53e+08 Transitions= 8.45e+10 Memory= 7081.760 t= 1.39e+05 R= 1e+03 -Depth= 10193 States= 1.54e+08 Transitions= 8.5e+10 Memory= 7107.834 t= 1.39e+05 R= 1e+03 -Depth= 10193 States= 1.55e+08 Transitions= 8.54e+10 Memory= 7134.201 t= 1.4e+05 R= 1e+03 -Depth= 10193 States= 1.56e+08 Transitions= 8.59e+10 Memory= 7158.713 t= 1.41e+05 R= 1e+03 -Depth= 10193 States= 1.57e+08 Transitions= 8.66e+10 Memory= 7181.662 t= 1.42e+05 R= 1e+03 -Depth= 10193 States= 1.58e+08 Transitions= 8.74e+10 Memory= 7204.221 t= 1.43e+05 R= 1e+03 -Depth= 10193 States= 1.59e+08 Transitions= 8.78e+10 Memory= 7230.295 t= 1.44e+05 R= 1e+03 -Depth= 10193 States= 1.6e+08 Transitions= 8.83e+10 Memory= 7256.662 t= 1.45e+05 R= 1e+03 -Depth= 10193 States= 1.61e+08 Transitions= 8.87e+10 Memory= 7283.127 t= 1.45e+05 R= 1e+03 -Depth= 10193 States= 1.62e+08 Transitions= 8.94e+10 Memory= 7306.760 t= 1.47e+05 R= 1e+03 -Depth= 10193 States= 1.63e+08 Transitions= 9.03e+10 Memory= 7331.565 t= 1.48e+05 R= 1e+03 -Depth= 10193 States= 1.64e+08 Transitions= 9.12e+10 Memory= 7356.955 t= 1.49e+05 R= 1e+03 -Depth= 10193 States= 1.65e+08 Transitions= 9.15e+10 Memory= 7384.983 t= 1.5e+05 R= 1e+03 -Depth= 10193 States= 1.66e+08 Transitions= 9.2e+10 Memory= 7412.033 t= 1.51e+05 R= 1e+03 -Depth= 10193 States= 1.67e+08 Transitions= 9.26e+10 Memory= 7439.377 t= 1.52e+05 R= 1e+03 -Depth= 10193 States= 1.68e+08 Transitions= 9.32e+10 Memory= 7465.256 t= 1.53e+05 R= 1e+03 -Depth= 10193 States= 1.69e+08 Transitions= 9.37e+10 Memory= 7493.479 t= 1.54e+05 R= 1e+03 -Depth= 10193 States= 1.7e+08 Transitions= 9.44e+10 Memory= 7520.041 t= 1.55e+05 R= 1e+03 -Depth= 10193 States= 1.71e+08 Transitions= 9.5e+10 Memory= 7544.065 t= 1.56e+05 R= 1e+03 -Depth= 10193 States= 1.72e+08 Transitions= 9.59e+10 Memory= 7564.377 t= 1.57e+05 R= 1e+03 -Depth= 10193 States= 1.73e+08 Transitions= 9.66e+10 Memory= 7588.693 t= 1.58e+05 R= 1e+03 -Depth= 10193 States= 1.74e+08 Transitions= 9.73e+10 Memory= 7614.865 t= 1.59e+05 R= 1e+03 -Depth= 10193 States= 1.75e+08 Transitions= 9.81e+10 Memory= 7640.354 t= 1.61e+05 R= 1e+03 -Depth= 10193 States= 1.76e+08 Transitions= 9.87e+10 Memory= 7665.744 t= 1.62e+05 R= 1e+03 -Depth= 10193 States= 1.77e+08 Transitions= 9.93e+10 Memory= 7691.135 t= 1.63e+05 R= 1e+03 -Depth= 10193 States= 1.78e+08 Transitions= 9.99e+10 Memory= 7718.479 t= 1.64e+05 R= 1e+03 -Depth= 10193 States= 1.79e+08 Transitions= 1.01e+11 Memory= 7743.772 t= 1.65e+05 R= 1e+03 -Depth= 10193 States= 1.8e+08 Transitions= 1.01e+11 Memory= 7769.651 t= 1.66e+05 R= 1e+03 -Depth= 10193 States= 1.81e+08 Transitions= 1.02e+11 Memory= 7795.920 t= 1.67e+05 R= 1e+03 -Depth= 10193 States= 1.82e+08 Transitions= 1.03e+11 Memory= 7819.651 t= 1.68e+05 R= 1e+03 -Depth= 10193 States= 1.83e+08 Transitions= 1.03e+11 Memory= 7846.897 t= 1.69e+05 R= 1e+03 -Depth= 10193 States= 1.84e+08 Transitions= 1.04e+11 Memory= 7874.631 t= 1.7e+05 R= 1e+03 -Depth= 10193 States= 1.85e+08 Transitions= 1.04e+11 Memory= 7900.510 t= 1.7e+05 R= 1e+03 -Depth= 10193 States= 1.86e+08 Transitions= 1.05e+11 Memory= 7925.803 t= 1.71e+05 R= 1e+03 -Depth= 10193 States= 1.87e+08 Transitions= 1.05e+11 Memory= 7955.295 t= 1.72e+05 R= 1e+03 -Depth= 10193 States= 1.88e+08 Transitions= 1.05e+11 Memory= 7983.420 t= 1.72e+05 R= 1e+03 -Depth= 10193 States= 1.89e+08 Transitions= 1.06e+11 Memory= 8010.373 t= 1.73e+05 R= 1e+03 -Depth= 10193 States= 1.9e+08 Transitions= 1.06e+11 Memory= 8037.424 t= 1.73e+05 R= 1e+03 -Depth= 10193 States= 1.91e+08 Transitions= 1.07e+11 Memory= 8061.838 t= 1.74e+05 R= 1e+03 -Depth= 10193 States= 1.92e+08 Transitions= 1.07e+11 Memory= 8087.326 t= 1.75e+05 R= 1e+03 -Depth= 10193 States= 1.93e+08 Transitions= 1.08e+11 Memory= 8115.256 t= 1.76e+05 R= 1e+03 -Depth= 10193 States= 1.94e+08 Transitions= 1.08e+11 Memory= 8142.307 t= 1.76e+05 R= 1e+03 -Depth= 10193 States= 1.95e+08 Transitions= 1.08e+11 Memory= 8168.479 t= 1.77e+05 R= 1e+03 -Depth= 10193 States= 1.96e+08 Transitions= 1.09e+11 Memory= 8194.846 t= 1.78e+05 R= 1e+03 -Depth= 10193 States= 1.97e+08 Transitions= 1.09e+11 Memory= 8221.311 t= 1.79e+05 R= 1e+03 -Depth= 10193 States= 1.98e+08 Transitions= 1.1e+11 Memory= 8249.240 t= 1.79e+05 R= 1e+03 -Depth= 10193 States= 1.99e+08 Transitions= 1.1e+11 Memory= 8273.264 t= 1.8e+05 R= 1e+03 -Depth= 10193 States= 2e+08 Transitions= 1.11e+11 Memory= 8295.920 t= 1.81e+05 R= 1e+03 -Depth= 10193 States= 2.01e+08 Transitions= 1.11e+11 Memory= 8320.529 t= 1.82e+05 R= 1e+03 -Depth= 10193 States= 2.02e+08 Transitions= 1.12e+11 Memory= 8345.236 t= 1.84e+05 R= 1e+03 -Depth= 10193 States= 2.03e+08 Transitions= 1.13e+11 Memory= 8379.026 t= 1.86e+05 R= 1e+03 -Depth= 10193 States= 2.04e+08 Transitions= 1.15e+11 Memory= 8403.635 t= 1.87e+05 R= 1e+03 -Depth= 10193 States= 2.05e+08 Transitions= 1.16e+11 Memory= 8427.951 t= 1.89e+05 R= 1e+03 -Depth= 10193 States= 2.06e+08 Transitions= 1.17e+11 Memory= 8452.463 t= 1.91e+05 R= 1e+03 -Depth= 10193 States= 2.07e+08 Transitions= 1.18e+11 Memory= 8472.483 t= 1.93e+05 R= 1e+03 -Depth= 10193 States= 2.08e+08 Transitions= 1.19e+11 Memory= 8493.283 t= 1.94e+05 R= 1e+03 -Depth= 10193 States= 2.09e+08 Transitions= 1.2e+11 Memory= 8513.205 t= 1.96e+05 R= 1e+03 -Depth= 10193 States= 2.1e+08 Transitions= 1.21e+11 Memory= 8532.053 t= 1.98e+05 R= 1e+03 -Depth= 10193 States= 2.11e+08 Transitions= 1.22e+11 Memory= 8555.588 t= 1.99e+05 R= 1e+03 -Depth= 10193 States= 2.12e+08 Transitions= 1.22e+11 Memory= 8582.932 t= 2e+05 R= 1e+03 -Depth= 10193 States= 2.13e+08 Transitions= 1.23e+11 Memory= 8607.834 t= 2.01e+05 R= 1e+03 -Depth= 10193 States= 2.14e+08 Transitions= 1.23e+11 Memory= 8633.029 t= 2.02e+05 R= 1e+03 -Depth= 10193 States= 2.15e+08 Transitions= 1.24e+11 Memory= 8656.858 t= 2.04e+05 R= 1e+03 -Depth= 10193 States= 2.16e+08 Transitions= 1.25e+11 Memory= 8679.904 t= 2.05e+05 R= 1e+03 -Depth= 10193 States= 2.17e+08 Transitions= 1.26e+11 Memory= 8707.932 t= 2.06e+05 R= 1e+03 -Depth= 10193 States= 2.18e+08 Transitions= 1.26e+11 Memory= 8736.740 t= 2.07e+05 R= 1e+03 -Depth= 10193 States= 2.19e+08 Transitions= 1.26e+11 Memory= 8762.229 t= 2.07e+05 R= 1e+03 -Depth= 10193 States= 2.2e+08 Transitions= 1.27e+11 Memory= 8785.764 t= 2.08e+05 R= 1e+03 -Depth= 10193 States= 2.21e+08 Transitions= 1.27e+11 Memory= 8812.619 t= 2.08e+05 R= 1e+03 -Depth= 10193 States= 2.22e+08 Transitions= 1.28e+11 Memory= 8837.326 t= 2.09e+05 R= 1e+03 -Depth= 10193 States= 2.23e+08 Transitions= 1.29e+11 Memory= 8859.006 t= 2.11e+05 R= 1e+03 -Depth= 10193 States= 2.24e+08 Transitions= 1.3e+11 Memory= 8884.104 t= 2.12e+05 R= 1e+03 -Depth= 10193 States= 2.25e+08 Transitions= 1.3e+11 Memory= 8909.006 t= 2.13e+05 R= 1e+03 -Depth= 10193 States= 2.26e+08 Transitions= 1.31e+11 Memory= 8934.787 t= 2.14e+05 R= 1e+03 -Depth= 10193 States= 2.27e+08 Transitions= 1.31e+11 Memory= 8961.057 t= 2.15e+05 R= 1e+03 -Depth= 10193 States= 2.28e+08 Transitions= 1.32e+11 Memory= 8985.666 t= 2.16e+05 R= 1e+03 -Depth= 10193 States= 2.29e+08 Transitions= 1.33e+11 Memory= 9010.080 t= 2.18e+05 R= 1e+03 -Depth= 10193 States= 2.3e+08 Transitions= 1.34e+11 Memory= 9034.885 t= 2.19e+05 R= 1e+03 -Depth= 10193 States= 2.31e+08 Transitions= 1.35e+11 Memory= 9058.127 t= 2.2e+05 R= 1e+03 -Depth= 10193 States= 2.32e+08 Transitions= 1.35e+11 Memory= 9081.760 t= 2.22e+05 R= 1e+03 -Depth= 10193 States= 2.33e+08 Transitions= 1.36e+11 Memory= 9106.467 t= 2.23e+05 R= 1e+03 -Depth= 10193 States= 2.34e+08 Transitions= 1.37e+11 Memory= 9130.295 t= 2.24e+05 R= 1e+03 -Depth= 10193 States= 2.35e+08 Transitions= 1.37e+11 Memory= 9159.690 t= 2.24e+05 R= 1e+03 -Depth= 10193 States= 2.36e+08 Transitions= 1.38e+11 Memory= 9185.471 t= 2.25e+05 R= 1e+03 -Depth= 10193 States= 2.37e+08 Transitions= 1.38e+11 Memory= 9207.639 t= 2.27e+05 R= 1e+03 -Depth= 10193 States= 2.38e+08 Transitions= 1.39e+11 Memory= 9232.443 t= 2.28e+05 R= 1e+03 -Depth= 10193 States= 2.39e+08 Transitions= 1.4e+11 Memory= 9258.811 t= 2.29e+05 R= 1e+03 -Depth= 10193 States= 2.4e+08 Transitions= 1.4e+11 Memory= 9287.619 t= 2.29e+05 R= 1e+03 -Depth= 10193 States= 2.41e+08 Transitions= 1.4e+11 Memory= 9317.209 t= 2.3e+05 R= 1e+03 -Depth= 10193 States= 2.42e+08 Transitions= 1.41e+11 Memory= 9343.088 t= 2.31e+05 R= 1e+03 -Depth= 10193 States= 2.43e+08 Transitions= 1.42e+11 Memory= 9365.354 t= 2.32e+05 R= 1e+03 -Depth= 10193 States= 2.44e+08 Transitions= 1.42e+11 Memory= 9389.182 t= 2.33e+05 R= 1e+03 -Depth= 10193 States= 2.45e+08 Transitions= 1.43e+11 Memory= 9415.256 t= 2.33e+05 R= 1e+03 -Depth= 10193 States= 2.46e+08 Transitions= 1.43e+11 Memory= 9438.596 t= 2.34e+05 R= 1e+03 -Depth= 10193 States= 2.47e+08 Transitions= 1.44e+11 Memory= 9466.623 t= 2.35e+05 R= 1e+03 -Depth= 10193 States= 2.48e+08 Transitions= 1.44e+11 Memory= 9495.041 t= 2.36e+05 R= 1e+03 -Depth= 10193 States= 2.49e+08 Transitions= 1.45e+11 Memory= 9519.651 t= 2.37e+05 R= 1e+03 -Depth= 10193 States= 2.5e+08 Transitions= 1.46e+11 Memory= 9549.436 t= 2.38e+05 R= 1e+03 -Depth= 10193 States= 2.51e+08 Transitions= 1.46e+11 Memory= 9575.022 t= 2.39e+05 R= 1e+03 -Depth= 10193 States= 2.52e+08 Transitions= 1.46e+11 Memory= 9598.752 t= 2.39e+05 R= 1e+03 -Depth= 10193 States= 2.53e+08 Transitions= 1.47e+11 Memory= 9626.584 t= 2.41e+05 R= 1e+03 -Depth= 10193 States= 2.54e+08 Transitions= 1.48e+11 Memory= 9655.588 t= 2.42e+05 R= 1e+03 -Depth= 10193 States= 2.55e+08 Transitions= 1.48e+11 Memory= 9679.904 t= 2.42e+05 R= 1e+03 -Depth= 10193 States= 2.56e+08 Transitions= 1.49e+11 Memory= 9707.834 t= 2.43e+05 R= 1e+03 -Depth= 10193 States= 2.57e+08 Transitions= 1.49e+11 Memory= 9735.568 t= 2.45e+05 R= 1e+03 -Depth= 10193 States= 2.58e+08 Transitions= 1.5e+11 Memory= 9760.861 t= 2.45e+05 R= 1e+03 -Depth= 10193 States= 2.59e+08 Transitions= 1.5e+11 Memory= 9785.959 t= 2.46e+05 R= 1e+03 -Depth= 10193 States= 2.6e+08 Transitions= 1.5e+11 Memory= 9814.182 t= 2.46e+05 R= 1e+03 -Depth= 10193 States= 2.61e+08 Transitions= 1.51e+11 Memory= 9841.428 t= 2.48e+05 R= 1e+03 -Depth= 10193 States= 2.62e+08 Transitions= 1.52e+11 Memory= 9867.014 t= 2.48e+05 R= 1e+03 -Depth= 10193 States= 2.63e+08 Transitions= 1.52e+11 Memory= 9894.846 t= 2.49e+05 R= 1e+03 -Depth= 10193 States= 2.64e+08 Transitions= 1.53e+11 Memory= 9921.604 t= 2.5e+05 R= 1e+03 -Depth= 10193 States= 2.65e+08 Transitions= 1.53e+11 Memory= 9947.287 t= 2.51e+05 R= 1e+03 -Depth= 10193 States= 2.66e+08 Transitions= 1.54e+11 Memory= 9973.361 t= 2.51e+05 R= 1e+03 -Depth= 10193 States= 2.67e+08 Transitions= 1.54e+11 Memory= 9999.240 t= 2.52e+05 R= 1e+03 -Depth= 10193 States= 2.68e+08 Transitions= 1.55e+11 Memory= 10026.584 t= 2.53e+05 R= 1e+03 -Depth= 10193 States= 2.69e+08 Transitions= 1.55e+11 Memory= 10054.416 t= 2.54e+05 R= 1e+03 -Depth= 10193 States= 2.7e+08 Transitions= 1.56e+11 Memory= 10077.658 t= 2.56e+05 R= 1e+03 -Depth= 10193 States= 2.71e+08 Transitions= 1.56e+11 Memory= 10108.615 t= 2.56e+05 R= 1e+03 -Depth= 10193 States= 2.72e+08 Transitions= 1.57e+11 Memory= 10134.494 t= 2.57e+05 R= 1e+03 -Depth= 10193 States= 2.73e+08 Transitions= 1.57e+11 Memory= 10157.639 t= 2.57e+05 R= 1e+03 -Depth= 10193 States= 2.74e+08 Transitions= 1.58e+11 Memory= 10183.127 t= 2.58e+05 R= 1e+03 -Depth= 10193 States= 2.75e+08 Transitions= 1.58e+11 Memory= 10212.522 t= 2.59e+05 R= 1e+03 -Depth= 10193 States= 2.76e+08 Transitions= 1.59e+11 Memory= 10238.596 t= 2.6e+05 R= 1e+03 -Depth= 10193 States= 2.77e+08 Transitions= 1.59e+11 Memory= 10265.647 t= 2.61e+05 R= 1e+03 -Depth= 10193 States= 2.78e+08 Transitions= 1.6e+11 Memory= 10289.963 t= 2.62e+05 R= 1e+03 -Depth= 10193 States= 2.79e+08 Transitions= 1.6e+11 Memory= 10316.233 t= 2.62e+05 R= 1e+03 -Depth= 10193 States= 2.8e+08 Transitions= 1.61e+11 Memory= 10344.651 t= 2.63e+05 R= 1e+03 -Depth= 10193 States= 2.81e+08 Transitions= 1.61e+11 Memory= 10375.315 t= 2.64e+05 R= 1e+03 -Depth= 10193 States= 2.82e+08 Transitions= 1.62e+11 Memory= 10398.654 t= 2.65e+05 R= 1e+03 -Depth= 10193 States= 2.83e+08 Transitions= 1.62e+11 Memory= 10429.611 t= 2.66e+05 R= 1e+03 -Depth= 10193 States= 2.84e+08 Transitions= 1.63e+11 Memory= 10455.588 t= 2.67e+05 R= 1e+03 -Depth= 10193 States= 2.85e+08 Transitions= 1.63e+11 Memory= 10478.830 t= 2.67e+05 R= 1e+03 -Depth= 10193 States= 2.86e+08 Transitions= 1.64e+11 Memory= 10506.760 t= 2.68e+05 R= 1e+03 -Depth= 10193 States= 2.87e+08 Transitions= 1.64e+11 Memory= 10532.443 t= 2.69e+05 R= 1e+03 -Depth= 10193 States= 2.88e+08 Transitions= 1.65e+11 Memory= 10561.252 t= 2.7e+05 R= 1e+03 -Depth= 10193 States= 2.89e+08 Transitions= 1.65e+11 Memory= 10584.983 t= 2.71e+05 R= 1e+03 -Depth= 10193 States= 2.9e+08 Transitions= 1.66e+11 Memory= 10611.252 t= 2.71e+05 R= 1e+03 -Depth= 10193 States= 2.91e+08 Transitions= 1.66e+11 Memory= 10637.033 t= 2.72e+05 R= 1e+03 -Depth= 10193 States= 2.92e+08 Transitions= 1.66e+11 Memory= 10668.674 t= 2.73e+05 R= 1e+03 -Depth= 10193 States= 2.93e+08 Transitions= 1.67e+11 Memory= 10692.111 t= 2.73e+05 R= 1e+03 -Depth= 10193 States= 2.94e+08 Transitions= 1.67e+11 Memory= 10718.283 t= 2.74e+05 R= 1e+03 -Depth= 10193 States= 2.95e+08 Transitions= 1.68e+11 Memory= 10744.748 t= 2.75e+05 R= 1e+03 -Depth= 10193 States= 2.96e+08 Transitions= 1.68e+11 Memory= 10770.920 t= 2.76e+05 R= 1e+03 -Depth= 10193 States= 2.97e+08 Transitions= 1.69e+11 Memory= 10795.139 t= 2.76e+05 R= 1e+03 -Depth= 10193 States= 2.98e+08 Transitions= 1.69e+11 Memory= 10819.358 t= 2.77e+05 R= 1e+03 -Depth= 10193 States= 2.99e+08 Transitions= 1.7e+11 Memory= 10841.721 t= 2.79e+05 R= 1e+03 -Depth= 10193 States= 3e+08 Transitions= 1.71e+11 Memory= 10867.209 t= 2.79e+05 R= 1e+03 -Depth= 10193 States= 3.01e+08 Transitions= 1.71e+11 Memory= 10893.283 t= 2.8e+05 R= 1e+03 -Depth= 10193 States= 3.02e+08 Transitions= 1.72e+11 Memory= 10916.233 t= 2.81e+05 R= 1e+03 -Depth= 10193 States= 3.03e+08 Transitions= 1.73e+11 Memory= 10940.549 t= 2.83e+05 R= 1e+03 -Depth= 10193 States= 3.04e+08 Transitions= 1.73e+11 Memory= 10971.408 t= 2.84e+05 R= 1e+03 -Depth= 10193 States= 3.05e+08 Transitions= 1.74e+11 Memory= 10996.897 t= 2.84e+05 R= 1e+03 -Depth= 10193 States= 3.06e+08 Transitions= 1.74e+11 Memory= 11023.850 t= 2.85e+05 R= 1e+03 -Depth= 10193 States= 3.07e+08 Transitions= 1.75e+11 Memory= 11049.436 t= 2.86e+05 R= 1e+03 -Depth= 10193 States= 3.08e+08 Transitions= 1.75e+11 Memory= 11077.854 t= 2.87e+05 R= 1e+03 -Depth= 10193 States= 3.09e+08 Transitions= 1.76e+11 Memory= 11104.514 t= 2.88e+05 R= 1e+03 -Depth= 10193 States= 3.1e+08 Transitions= 1.77e+11 Memory= 11125.119 t= 2.89e+05 R= 1e+03 -Depth= 10193 States= 3.11e+08 Transitions= 1.77e+11 Memory= 11146.897 t= 2.91e+05 R= 1e+03 -Depth= 10193 States= 3.12e+08 Transitions= 1.78e+11 Memory= 11173.264 t= 2.92e+05 R= 1e+03 -Depth= 10193 States= 3.13e+08 Transitions= 1.79e+11 Memory= 11198.654 t= 2.93e+05 R= 1e+03 -Depth= 10193 States= 3.14e+08 Transitions= 1.8e+11 Memory= 11224.045 t= 2.94e+05 R= 1e+03 -Depth= 10193 States= 3.15e+08 Transitions= 1.8e+11 Memory= 11248.850 t= 2.95e+05 R= 1e+03 -Depth= 10193 States= 3.16e+08 Transitions= 1.81e+11 Memory= 11274.729 t= 2.96e+05 R= 1e+03 -Depth= 10193 States= 3.17e+08 Transitions= 1.82e+11 Memory= 11300.315 t= 2.97e+05 R= 1e+03 -Depth= 10193 States= 3.18e+08 Transitions= 1.82e+11 Memory= 11326.193 t= 2.98e+05 R= 1e+03 -Depth= 10193 States= 3.19e+08 Transitions= 1.83e+11 Memory= 11351.584 t= 2.99e+05 R= 1e+03 -Depth= 10193 States= 3.2e+08 Transitions= 1.83e+11 Memory= 11377.561 t= 3e+05 R= 1e+03 -Depth= 10193 States= 3.21e+08 Transitions= 1.84e+11 Memory= 11400.510 t= 3.01e+05 R= 1e+03 -Depth= 10193 States= 3.22e+08 Transitions= 1.85e+11 Memory= 11425.803 t= 3.02e+05 R= 1e+03 -Depth= 10193 States= 3.23e+08 Transitions= 1.85e+11 Memory= 11453.928 t= 3.03e+05 R= 1e+03 -Depth= 10193 States= 3.24e+08 Transitions= 1.86e+11 Memory= 11478.635 t= 3.04e+05 R= 1e+03 -Depth= 10193 States= 3.25e+08 Transitions= 1.87e+11 Memory= 11503.830 t= 3.05e+05 R= 1e+03 -Depth= 10193 States= 3.26e+08 Transitions= 1.87e+11 Memory= 11528.830 t= 3.06e+05 R= 1e+03 -Depth= 10193 States= 3.27e+08 Transitions= 1.88e+11 Memory= 11554.416 t= 3.07e+05 R= 1e+03 -Depth= 10193 States= 3.28e+08 Transitions= 1.89e+11 Memory= 11580.686 t= 3.08e+05 R= 1e+03 -Depth= 10193 States= 3.29e+08 Transitions= 1.89e+11 Memory= 11606.467 t= 3.09e+05 R= 1e+03 -Depth= 10193 States= 3.3e+08 Transitions= 1.9e+11 Memory= 11632.346 t= 3.1e+05 R= 1e+03 -Depth= 10193 States= 3.31e+08 Transitions= 1.9e+11 Memory= 11658.420 t= 3.11e+05 R= 1e+03 -Depth= 10193 States= 3.32e+08 Transitions= 1.91e+11 Memory= 11681.662 t= 3.13e+05 R= 1e+03 -Depth= 10193 States= 3.33e+08 Transitions= 1.92e+11 Memory= 11708.713 t= 3.13e+05 R= 1e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 10193, errors: 0 -1.8778602e+08 states, stored (3.33973e+08 visited) -1.9159243e+11 states, matched -1.919264e+11 transitions (= visited+matched) -1.0808296e+12 atomic steps -hash conflicts: 3.7119584e+10 (resolved) - -Stats on memory usage (in Megabytes): -20774.057 equivalent memory usage for states (stored*(State-vector + overhead)) - 9228.353 actual memory usage for states (compression: 44.42%) - state-vector as stored = 16 byte + 36 byte overhead - 2048.000 memory used for hash table (-w28) - 457.764 memory used for DFS stack (-m10000000) - 1.576 memory lost to fragmentation -11732.541 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 618104 5194 3828 2 2 ] -unreached in proctype urcu_reader - line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 104, "(1)" - line 249, "pan.___", state 112, "(1)" - line 253, "pan.___", state 124, "(1)" - line 257, "pan.___", state 132, "(1)" - line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 223, "(1)" - line 434, "pan.___", state 253, "(1)" - line 438, "pan.___", state 266, "(1)" - line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 359, "(1)" - line 434, "pan.___", state 389, "(1)" - line 438, "pan.___", state 402, "(1)" - line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 488, "(1)" - line 434, "pan.___", state 518, "(1)" - line 438, "pan.___", state 531, "(1)" - line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 556, "(1)" - line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 557, "else" - line 407, "pan.___", state 560, "(1)" - line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 570, "(1)" - line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 571, "else" - line 411, "pan.___", state 574, "(1)" - line 411, "pan.___", state 575, "(1)" - line 411, "pan.___", state 575, "(1)" - line 409, "pan.___", state 580, "((i<1))" - line 409, "pan.___", state 580, "((i>=1))" - line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 588, "(1)" - line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 589, "else" - line 416, "pan.___", state 592, "(1)" - line 416, "pan.___", state 593, "(1)" - line 416, "pan.___", state 593, "(1)" - line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 602, "(1)" - line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 603, "else" - line 420, "pan.___", state 606, "(1)" - line 420, "pan.___", state 607, "(1)" - line 420, "pan.___", state 607, "(1)" - line 418, "pan.___", state 612, "((i<2))" - line 418, "pan.___", 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"pan.___", state 870, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 889, "(1)" - line 434, "pan.___", state 919, "(1)" - line 438, "pan.___", state 932, "(1)" - line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 955, "(1)" - line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 956, "else" - line 407, "pan.___", state 959, "(1)" - line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 969, "(1)" - line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 970, "else" - line 411, "pan.___", state 973, "(1)" - line 411, "pan.___", state 974, "(1)" - line 411, "pan.___", state 974, "(1)" - line 409, "pan.___", state 979, "((i<1))" - line 409, "pan.___", state 979, "((i>=1))" - line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 987, "(1)" - line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 988, "else" - line 416, "pan.___", state 991, "(1)" - line 416, "pan.___", state 992, "(1)" - line 416, "pan.___", state 992, "(1)" - line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 1001, "(1)" - line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 1002, "else" - line 420, "pan.___", state 1005, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 418, "pan.___", state 1011, "((i<2))" - line 418, "pan.___", state 1011, "((i>=2))" - line 425, "pan.___", state 1018, "(1)" - line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 1019, "else" - line 425, "pan.___", state 1022, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 429, "pan.___", state 1031, "(1)" - line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 1032, "else" - line 429, "pan.___", state 1035, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 427, "pan.___", state 1041, "((i<1))" - line 427, "pan.___", state 1041, "((i>=1))" - line 434, "pan.___", state 1048, "(1)" - line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 1049, "else" - line 434, "pan.___", state 1052, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 438, "pan.___", state 1061, "(1)" - line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 1062, "else" - line 438, "pan.___", state 1065, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 436, "pan.___", state 1071, "((i<2))" - line 436, "pan.___", state 1071, "((i>=2))" - line 446, "pan.___", state 1075, "(1)" - line 446, "pan.___", state 1075, "(1)" - line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1149, "(1)" - line 434, "pan.___", state 1179, "(1)" - line 438, "pan.___", state 1192, "(1)" - line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1281, "(1)" - line 434, "pan.___", state 1311, "(1)" - line 438, "pan.___", state 1324, "(1)" - line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1414, "(1)" - line 434, "pan.___", state 1444, "(1)" - line 438, "pan.___", state 1457, "(1)" - line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1543, "(1)" - line 434, "pan.___", state 1573, "(1)" - line 438, "pan.___", state 1586, "(1)" - line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1677, "(1)" - line 434, "pan.___", state 1707, "(1)" - line 438, "pan.___", state 1720, "(1)" - line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1806, "(1)" - line 434, "pan.___", state 1836, "(1)" - line 438, "pan.___", state 1849, "(1)" - line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1938, "(1)" - line 434, "pan.___", state 1968, "(1)" - line 438, "pan.___", state 1981, "(1)" - line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2074, "(1)" - line 434, "pan.___", state 2104, "(1)" - line 438, "pan.___", state 2117, "(1)" - line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2203, "(1)" - line 434, "pan.___", state 2233, "(1)" - line 438, "pan.___", state 2246, "(1)" - line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 2271, "(1)" - line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 2272, "else" - line 407, "pan.___", state 2275, "(1)" - line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 2286, "else" - line 411, "pan.___", state 2289, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 409, "pan.___", state 2295, "((i<1))" - line 409, "pan.___", state 2295, "((i>=1))" - line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 2303, "(1)" - line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 2304, "else" - line 416, "pan.___", state 2307, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 2317, "(1)" - line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 2318, "else" - line 420, "pan.___", state 2321, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 418, "pan.___", state 2327, "((i<2))" - line 418, "pan.___", state 2327, "((i>=2))" - line 425, "pan.___", state 2334, "(1)" - line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 2335, "else" - line 425, "pan.___", state 2338, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 429, "pan.___", state 2347, "(1)" - line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 2348, "else" - line 429, "pan.___", state 2351, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 427, "pan.___", state 2357, "((i<1))" - line 427, "pan.___", state 2357, "((i>=1))" - line 434, "pan.___", state 2364, "(1)" - line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 2365, "else" - line 434, "pan.___", state 2368, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 438, "pan.___", state 2377, "(1)" - line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 2378, "else" - line 438, "pan.___", state 2381, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 436, "pan.___", state 2387, "((i<2))" - line 436, "pan.___", state 2387, "((i>=2))" - line 446, "pan.___", state 2391, "(1)" - line 446, "pan.___", state 2391, "(1)" - line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" - line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 734, "pan.___", state 2396, "(1)" - line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2468, "(1)" - line 434, "pan.___", state 2498, "(1)" - line 438, "pan.___", state 2511, "(1)" - line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2603, "(1)" - line 434, "pan.___", state 2633, "(1)" - line 438, "pan.___", state 2646, "(1)" - line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2732, "(1)" - line 434, "pan.___", state 2762, "(1)" - line 438, "pan.___", state 2775, "(1)" - line 245, "pan.___", state 2808, "(1)" - line 253, "pan.___", state 2828, "(1)" - line 257, "pan.___", state 2836, "(1)" - line 245, "pan.___", state 2851, "(1)" - line 253, "pan.___", state 2871, "(1)" - line 257, "pan.___", state 2879, "(1)" - line 929, "pan.___", state 2896, "-end-" - (245 of 2896 states) -unreached in proctype urcu_writer - line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 425, "pan.___", state 110, "(1)" - line 429, "pan.___", state 123, "(1)" - line 434, "pan.___", state 140, "(1)" - line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 407, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 303, "(1)" - line 429, "pan.___", state 316, "(1)" - line 434, "pan.___", state 333, "(1)" - line 438, "pan.___", state 346, "(1)" - line 411, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 447, "(1)" - line 434, "pan.___", state 464, "(1)" - line 438, "pan.___", state 477, "(1)" - line 411, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 586, "(1)" - line 434, "pan.___", state 603, "(1)" - line 438, "pan.___", state 616, "(1)" - line 411, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 715, "(1)" - line 434, "pan.___", state 732, "(1)" - line 438, "pan.___", state 745, "(1)" - line 411, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 846, "(1)" - line 434, "pan.___", state 863, "(1)" - line 438, "pan.___", state 876, "(1)" - line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 955, "(1)" - line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 978, "(1)" - line 249, "pan.___", state 986, "(1)" - line 253, "pan.___", state 998, "(1)" - line 257, "pan.___", state 1006, "(1)" - line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1084, "(1)" - line 249, "pan.___", state 1092, "(1)" - line 253, "pan.___", state 1104, "(1)" - line 257, "pan.___", state 1112, "(1)" - line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1176, "(1)" - line 249, "pan.___", state 1184, "(1)" - line 253, "pan.___", state 1196, "(1)" - line 257, "pan.___", state 1204, "(1)" - line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1282, "(1)" - line 249, "pan.___", state 1290, "(1)" - line 253, "pan.___", state 1302, "(1)" - line 257, "pan.___", state 1310, "(1)" - line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1374, "(1)" - line 249, "pan.___", state 1382, "(1)" - line 253, "pan.___", state 1394, "(1)" - line 257, "pan.___", state 1402, "(1)" - line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1480, "(1)" - line 249, "pan.___", state 1488, "(1)" - line 253, "pan.___", state 1500, "(1)" - line 257, "pan.___", state 1508, "(1)" - line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1572, "(1)" - line 249, "pan.___", state 1580, "(1)" - line 253, "pan.___", state 1592, "(1)" - line 257, "pan.___", state 1600, "(1)" - line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1678, "(1)" - line 249, "pan.___", state 1686, "(1)" - line 253, "pan.___", state 1698, "(1)" - line 257, "pan.___", state 1706, "(1)" - line 1304, "pan.___", state 1722, "-end-" - (103 of 1722 states) -unreached in proctype :init: - (0 of 28 states) -unreached in proctype :never: - line 1369, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 3.14e+05 seconds -pan: rate 1063.7031 states/second -pan: avg transition delay 1.6359e-06 usec -cp .input.spin urcu_progress_writer.spin.input -cp .input.spin.trail urcu_progress_writer.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi-compress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.spin.input deleted file mode 100644 index e7f1d2d..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.spin.input +++ /dev/null @@ -1,1340 +0,0 @@ -#define WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/.input.spin b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/.input.spin deleted file mode 100644 index 21196d4..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/.input.spin +++ /dev/null @@ -1,1156 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/DEFINES b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/DEFINES deleted file mode 100644 index 32299c1..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/DEFINES +++ /dev/null @@ -1,18 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/Makefile b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/Makefile deleted file mode 100644 index abf201c..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/Makefile +++ /dev/null @@ -1,171 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 -DCOLLAPSE -#CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.log deleted file mode 100644 index f1445e4..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.log +++ /dev/null @@ -1,266 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 3250 States= 1e+06 Transitions= 2.74e+08 Memory= 500.529 t= 357 R= 3e+03 -Depth= 3250 States= 2e+06 Transitions= 5.69e+08 Memory= 537.248 t= 774 R= 3e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 72 byte, depth reached 3250, errors: 0 - 2668047 states, stored -7.3166567e+08 states, matched -7.3433372e+08 transitions (= stored+matched) -4.2954757e+09 atomic steps -hash conflicts: 4.8630608e+08 (resolved) - -Stats on memory usage (in Megabytes): - 254.445 equivalent memory usage for states (stored*(State-vector + overhead)) - 94.790 actual memory usage for states (compression: 37.25%) - state-vector as stored = 9 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 560.490 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 25912 2128 1970 2 ] -unreached in proctype urcu_reader - line 267, ".input.spin", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 275, ".input.spin", state 77, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 86, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 102, "(1)" - line 248, ".input.spin", state 110, "(1)" - line 252, ".input.spin", state 122, "(1)" - line 256, ".input.spin", state 130, "(1)" - line 403, ".input.spin", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 412, ".input.spin", state 188, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 202, "cache_dirty_rcu_data[i] = 0" - line 421, ".input.spin", state 221, "(1)" - line 430, ".input.spin", state 251, "(1)" - line 434, ".input.spin", state 264, "(1)" - line 613, ".input.spin", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 403, ".input.spin", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 412, ".input.spin", state 324, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 338, "cache_dirty_rcu_data[i] = 0" - line 421, ".input.spin", state 357, "(1)" - line 430, ".input.spin", state 387, "(1)" - line 434, ".input.spin", state 400, "(1)" - line 403, ".input.spin", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 412, ".input.spin", state 453, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 467, "cache_dirty_rcu_data[i] = 0" - line 421, ".input.spin", state 486, "(1)" - line 430, ".input.spin", state 516, "(1)" - line 434, ".input.spin", state 529, "(1)" - line 403, ".input.spin", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 403, ".input.spin", state 554, "(1)" - line 403, ".input.spin", state 555, "(cache_dirty_urcu_gp_ctr)" - line 403, ".input.spin", state 555, "else" - line 403, ".input.spin", state 558, "(1)" - line 407, ".input.spin", state 566, "cache_dirty_urcu_active_readers = 0" - line 407, ".input.spin", state 568, "(1)" - line 407, ".input.spin", state 569, "(cache_dirty_urcu_active_readers)" - line 407, ".input.spin", state 569, "else" - line 407, ".input.spin", state 572, "(1)" - line 407, ".input.spin", state 573, "(1)" - line 407, ".input.spin", state 573, "(1)" - line 405, ".input.spin", state 578, "((i<1))" - line 405, ".input.spin", state 578, "((i>=1))" - line 412, ".input.spin", state 584, "cache_dirty_rcu_ptr = 0" - line 412, ".input.spin", state 586, "(1)" - line 412, ".input.spin", state 587, "(cache_dirty_rcu_ptr)" - line 412, ".input.spin", state 587, "else" - line 412, ".input.spin", state 590, "(1)" - line 412, ".input.spin", state 591, "(1)" - line 412, ".input.spin", state 591, "(1)" - line 416, ".input.spin", state 598, "cache_dirty_rcu_data[i] = 0" - line 416, ".input.spin", state 600, "(1)" - line 416, ".input.spin", state 601, "(cache_dirty_rcu_data[i])" - line 416, ".input.spin", state 601, "else" - line 416, ".input.spin", state 604, "(1)" - line 416, ".input.spin", state 605, "(1)" - line 416, ".input.spin", state 605, "(1)" - line 414, ".input.spin", state 610, "((i<2))" - line 414, ".input.spin", state 610, "((i>=2))" - line 421, ".input.spin", state 617, "(1)" - line 421, ".input.spin", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 421, ".input.spin", state 618, "else" - line 421, ".input.spin", state 621, "(1)" - line 421, ".input.spin", state 622, "(1)" - line 421, ".input.spin", state 622, "(1)" - line 425, ".input.spin", state 630, "(1)" - line 425, ".input.spin", state 631, "(!(cache_dirty_urcu_active_readers))" - line 425, ".input.spin", state 631, "else" - line 425, ".input.spin", state 634, "(1)" - line 425, ".input.spin", state 635, "(1)" - line 425, ".input.spin", state 635, "(1)" - line 423, ".input.spin", state 640, "((i<1))" - line 423, ".input.spin", state 640, "((i>=1))" - line 430, ".input.spin", state 647, "(1)" - line 430, ".input.spin", state 648, "(!(cache_dirty_rcu_ptr))" - line 430, ".input.spin", state 648, "else" - line 430, ".input.spin", state 651, "(1)" - line 430, ".input.spin", state 652, "(1)" - line 430, ".input.spin", state 652, "(1)" - line 434, ".input.spin", state 660, "(1)" - line 434, ".input.spin", state 661, "(!(cache_dirty_rcu_data[i]))" - line 434, ".input.spin", state 661, "else" - line 434, ".input.spin", state 664, "(1)" - line 434, ".input.spin", state 665, "(1)" - line 434, ".input.spin", state 665, "(1)" - line 432, ".input.spin", state 670, "((i<2))" - line 432, ".input.spin", state 670, "((i>=2))" - line 442, ".input.spin", state 674, "(1)" - line 442, ".input.spin", state 674, "(1)" - line 613, ".input.spin", state 677, "cached_urcu_active_readers = (tmp+1)" - line 613, ".input.spin", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 613, ".input.spin", state 679, "(1)" - line 403, ".input.spin", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 412, ".input.spin", state 718, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 732, "cache_dirty_rcu_data[i] = 0" - line 421, ".input.spin", state 751, "(1)" - line 430, ".input.spin", state 781, "(1)" - line 434, ".input.spin", state 794, "(1)" - line 403, ".input.spin", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 412, ".input.spin", state 853, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 867, "cache_dirty_rcu_data[i] = 0" - line 421, ".input.spin", state 886, "(1)" - line 430, ".input.spin", state 916, "(1)" - line 434, ".input.spin", state 929, "(1)" - line 403, ".input.spin", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 412, ".input.spin", state 982, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 996, "cache_dirty_rcu_data[i] = 0" - line 421, ".input.spin", state 1015, "(1)" - line 430, ".input.spin", state 1045, "(1)" - line 434, ".input.spin", state 1058, "(1)" - line 244, ".input.spin", state 1091, "(1)" - line 252, ".input.spin", state 1111, "(1)" - line 256, ".input.spin", state 1119, "(1)" - line 747, ".input.spin", state 1136, "-end-" - (91 of 1136 states) -unreached in proctype urcu_writer - line 403, ".input.spin", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 407, ".input.spin", state 59, "cache_dirty_urcu_active_readers = 0" - line 412, ".input.spin", state 77, "cache_dirty_rcu_ptr = 0" - line 421, ".input.spin", state 110, "(1)" - line 425, ".input.spin", state 123, "(1)" - line 430, ".input.spin", state 140, "(1)" - line 267, ".input.spin", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 185, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 198, "cache_dirty_rcu_ptr = 0" - line 403, ".input.spin", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 407, ".input.spin", state 252, "cache_dirty_urcu_active_readers = 0" - line 412, ".input.spin", state 270, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 284, "cache_dirty_rcu_data[i] = 0" - line 421, ".input.spin", state 303, "(1)" - line 425, ".input.spin", state 316, "(1)" - line 430, ".input.spin", state 333, "(1)" - line 434, ".input.spin", state 346, "(1)" - line 407, ".input.spin", state 383, "cache_dirty_urcu_active_readers = 0" - line 412, ".input.spin", state 401, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 415, "cache_dirty_rcu_data[i] = 0" - line 425, ".input.spin", state 447, "(1)" - line 430, ".input.spin", state 464, "(1)" - line 434, ".input.spin", state 477, "(1)" - line 407, ".input.spin", state 522, "cache_dirty_urcu_active_readers = 0" - line 412, ".input.spin", state 540, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 554, "cache_dirty_rcu_data[i] = 0" - line 425, ".input.spin", state 586, "(1)" - line 430, ".input.spin", state 603, "(1)" - line 434, ".input.spin", state 616, "(1)" - line 407, ".input.spin", state 651, "cache_dirty_urcu_active_readers = 0" - line 412, ".input.spin", state 669, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 683, "cache_dirty_rcu_data[i] = 0" - line 425, ".input.spin", state 715, "(1)" - line 430, ".input.spin", state 732, "(1)" - line 434, ".input.spin", state 745, "(1)" - line 407, ".input.spin", state 782, "cache_dirty_urcu_active_readers = 0" - line 412, ".input.spin", state 800, "cache_dirty_rcu_ptr = 0" - line 416, ".input.spin", state 814, "cache_dirty_rcu_data[i] = 0" - line 425, ".input.spin", state 846, "(1)" - line 430, ".input.spin", state 863, "(1)" - line 434, ".input.spin", state 876, "(1)" - line 267, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 940, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 955, "(1)" - line 279, ".input.spin", state 962, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 978, "(1)" - line 248, ".input.spin", state 986, "(1)" - line 252, ".input.spin", state 998, "(1)" - line 256, ".input.spin", state 1006, "(1)" - line 267, ".input.spin", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1046, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1059, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1068, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1084, "(1)" - line 248, ".input.spin", state 1092, "(1)" - line 252, ".input.spin", state 1104, "(1)" - line 256, ".input.spin", state 1112, "(1)" - line 271, ".input.spin", state 1138, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1151, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1160, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1176, "(1)" - line 248, ".input.spin", state 1184, "(1)" - line 252, ".input.spin", state 1196, "(1)" - line 256, ".input.spin", state 1204, "(1)" - line 267, ".input.spin", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1244, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1257, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1266, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1282, "(1)" - line 248, ".input.spin", state 1290, "(1)" - line 252, ".input.spin", state 1302, "(1)" - line 256, ".input.spin", state 1310, "(1)" - line 271, ".input.spin", state 1336, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1349, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1358, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1374, "(1)" - line 248, ".input.spin", state 1382, "(1)" - line 252, ".input.spin", state 1394, "(1)" - line 256, ".input.spin", state 1402, "(1)" - line 267, ".input.spin", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1442, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1455, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1464, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1480, "(1)" - line 248, ".input.spin", state 1488, "(1)" - line 252, ".input.spin", state 1500, "(1)" - line 256, ".input.spin", state 1508, "(1)" - line 271, ".input.spin", state 1534, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1547, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1556, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1572, "(1)" - line 248, ".input.spin", state 1580, "(1)" - line 252, ".input.spin", state 1592, "(1)" - line 256, ".input.spin", state 1600, "(1)" - line 267, ".input.spin", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1640, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1653, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1662, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1678, "(1)" - line 248, ".input.spin", state 1686, "(1)" - line 252, ".input.spin", state 1698, "(1)" - line 256, ".input.spin", state 1706, "(1)" - line 1122, ".input.spin", state 1722, "-end-" - (103 of 1722 states) -unreached in proctype :init: - (0 of 26 states) - -pan: elapsed time 1.01e+03 seconds -pan: rate 2639.775 states/second -pan: avg transition delay 1.3764e-06 usec -cp .input.spin asserts.spin.input -cp .input.spin.trail asserts.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.spin.input deleted file mode 100644 index 21196d4..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.spin.input +++ /dev/null @@ -1,1156 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/references.txt b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.sh b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.spin b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.spin deleted file mode 100644 index db5ab0e..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.spin +++ /dev/null @@ -1,1138 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.log deleted file mode 100644 index dd99ae5..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.log +++ /dev/null @@ -1,277 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1178) -Depth= 3880 States= 1e+06 Transitions= 2.74e+08 Memory= 512.932 t= 435 R= 2e+03 -Depth= 3880 States= 2e+06 Transitions= 5.69e+08 Memory= 559.318 t= 929 R= 2e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 3880, errors: 0 - 2668047 states, stored -7.3167024e+08 states, matched -7.3433829e+08 transitions (= stored+matched) -4.2954757e+09 atomic steps -hash conflicts: 4.8818996e+08 (resolved) - -Stats on memory usage (in Megabytes): - 295.156 equivalent memory usage for states (stored*(State-vector + overhead)) - 124.292 actual memory usage for states (compression: 42.11%) - state-vector as stored = 13 byte + 36 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 589.983 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 25912 2128 1970 2 1 ] -unreached in proctype urcu_reader - line 267, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 275, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 102, "(1)" - line 248, "pan.___", state 110, "(1)" - line 252, "pan.___", state 122, "(1)" - line 256, "pan.___", state 130, "(1)" - line 403, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 221, "(1)" - line 430, "pan.___", state 251, "(1)" - line 434, "pan.___", state 264, "(1)" - line 613, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 403, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 357, "(1)" - line 430, "pan.___", state 387, "(1)" - line 434, "pan.___", state 400, "(1)" - line 403, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 486, "(1)" - line 430, "pan.___", state 516, "(1)" - line 434, "pan.___", state 529, "(1)" - line 403, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 403, "pan.___", state 554, "(1)" - line 403, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" - line 403, "pan.___", state 555, "else" - line 403, "pan.___", state 558, "(1)" - line 407, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" - line 407, "pan.___", state 568, "(1)" - line 407, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" - line 407, "pan.___", state 569, "else" - line 407, "pan.___", state 572, "(1)" - line 407, "pan.___", state 573, "(1)" - line 407, "pan.___", state 573, "(1)" - line 405, "pan.___", state 578, "((i<1))" - line 405, "pan.___", state 578, "((i>=1))" - line 412, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" - line 412, "pan.___", state 586, "(1)" - line 412, "pan.___", state 587, "(cache_dirty_rcu_ptr)" - line 412, "pan.___", state 587, "else" - line 412, "pan.___", state 590, "(1)" - line 412, "pan.___", state 591, "(1)" - line 412, "pan.___", state 591, "(1)" - line 416, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" - line 416, "pan.___", state 600, "(1)" - line 416, "pan.___", state 601, "(cache_dirty_rcu_data[i])" - line 416, "pan.___", state 601, "else" - line 416, "pan.___", state 604, "(1)" - line 416, "pan.___", state 605, "(1)" - line 416, "pan.___", state 605, "(1)" - line 414, "pan.___", state 610, "((i<2))" - line 414, "pan.___", state 610, "((i>=2))" - line 421, "pan.___", state 617, "(1)" - line 421, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 421, "pan.___", state 618, "else" - line 421, "pan.___", state 621, "(1)" - line 421, "pan.___", state 622, "(1)" - line 421, "pan.___", state 622, "(1)" - line 425, "pan.___", state 630, "(1)" - line 425, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" - line 425, "pan.___", state 631, "else" - line 425, "pan.___", state 634, "(1)" - line 425, "pan.___", state 635, "(1)" - line 425, "pan.___", state 635, "(1)" - line 423, "pan.___", state 640, "((i<1))" - line 423, "pan.___", state 640, "((i>=1))" - line 430, "pan.___", state 647, "(1)" - line 430, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" - line 430, "pan.___", state 648, "else" - line 430, "pan.___", state 651, "(1)" - line 430, "pan.___", state 652, "(1)" - line 430, "pan.___", state 652, "(1)" - line 434, "pan.___", state 660, "(1)" - line 434, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" - line 434, "pan.___", state 661, "else" - line 434, "pan.___", state 664, "(1)" - line 434, "pan.___", state 665, "(1)" - line 434, "pan.___", state 665, "(1)" - line 432, "pan.___", state 670, "((i<2))" - line 432, "pan.___", state 670, "((i>=2))" - line 442, "pan.___", state 674, "(1)" - line 442, "pan.___", state 674, "(1)" - line 613, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" - line 613, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 613, "pan.___", state 679, "(1)" - line 403, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 751, "(1)" - line 430, "pan.___", state 781, "(1)" - line 434, "pan.___", state 794, "(1)" - line 403, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 886, "(1)" - line 430, "pan.___", state 916, "(1)" - line 434, "pan.___", state 929, "(1)" - line 403, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 1015, "(1)" - line 430, "pan.___", state 1045, "(1)" - line 434, "pan.___", state 1058, "(1)" - line 244, "pan.___", state 1091, "(1)" - line 252, "pan.___", state 1111, "(1)" - line 256, "pan.___", state 1119, "(1)" - line 747, "pan.___", state 1136, "-end-" - (91 of 1136 states) -unreached in proctype urcu_writer - line 403, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 110, "(1)" - line 425, "pan.___", state 123, "(1)" - line 430, "pan.___", state 140, "(1)" - line 267, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 403, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 303, "(1)" - line 425, "pan.___", state 316, "(1)" - line 430, "pan.___", state 333, "(1)" - line 434, "pan.___", state 346, "(1)" - line 407, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 447, "(1)" - line 430, "pan.___", state 464, "(1)" - line 434, "pan.___", state 477, "(1)" - line 407, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 586, "(1)" - line 430, "pan.___", state 603, "(1)" - line 434, "pan.___", state 616, "(1)" - line 407, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 715, "(1)" - line 430, "pan.___", state 732, "(1)" - line 434, "pan.___", state 745, "(1)" - line 407, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 846, "(1)" - line 430, "pan.___", state 863, "(1)" - line 434, "pan.___", state 876, "(1)" - line 267, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 955, "(1)" - line 279, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 978, "(1)" - line 248, "pan.___", state 986, "(1)" - line 252, "pan.___", state 998, "(1)" - line 256, "pan.___", state 1006, "(1)" - line 267, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1084, "(1)" - line 248, "pan.___", state 1092, "(1)" - line 252, "pan.___", state 1104, "(1)" - line 256, "pan.___", state 1112, "(1)" - line 271, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1176, "(1)" - line 248, "pan.___", state 1184, "(1)" - line 252, "pan.___", state 1196, "(1)" - line 256, "pan.___", state 1204, "(1)" - line 267, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1282, "(1)" - line 248, "pan.___", state 1290, "(1)" - line 252, "pan.___", state 1302, "(1)" - line 256, "pan.___", state 1310, "(1)" - line 271, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1374, "(1)" - line 248, "pan.___", state 1382, "(1)" - line 252, "pan.___", state 1394, "(1)" - line 256, "pan.___", state 1402, "(1)" - line 267, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1480, "(1)" - line 248, "pan.___", state 1488, "(1)" - line 252, "pan.___", state 1500, "(1)" - line 256, "pan.___", state 1508, "(1)" - line 271, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1572, "(1)" - line 248, "pan.___", state 1580, "(1)" - line 252, "pan.___", state 1592, "(1)" - line 256, "pan.___", state 1600, "(1)" - line 267, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1678, "(1)" - line 248, "pan.___", state 1686, "(1)" - line 252, "pan.___", state 1698, "(1)" - line 256, "pan.___", state 1706, "(1)" - line 1122, "pan.___", state 1722, "-end-" - (103 of 1722 states) -unreached in proctype :init: - (0 of 26 states) -unreached in proctype :never: - line 1183, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.21e+03 seconds -pan: rate 2200.5963 states/second -pan: avg transition delay 1.651e-06 usec -cp .input.spin urcu_free.spin.input -cp .input.spin.trail urcu_free.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.ltl b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.spin.input deleted file mode 100644 index 21196d4..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.spin.input +++ /dev/null @@ -1,1156 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_nested.define b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.define b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.log deleted file mode 100644 index 7fe9c9a..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.log +++ /dev/null @@ -1,628 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1179) -pan: claim violated! (at depth 1246) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 3190, errors: 1 - 124498 states, stored - 15198533 states, matched - 15323031 transitions (= stored+matched) - 86866126 atomic steps -hash conflicts: 473423 (resolved) - -Stats on memory usage (in Megabytes): - 13.773 equivalent memory usage for states (stored*(State-vector + overhead)) - 6.400 actual memory usage for states (compression: 46.47%) - state-vector as stored = 18 byte + 36 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 472.111 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 2572 1245 179 2 2 ] -unreached in proctype urcu_reader - line 713, "pan.___", state 12, "((i<1))" - line 713, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 104, "(1)" - line 249, "pan.___", state 112, "(1)" - line 253, "pan.___", state 124, "(1)" - line 257, "pan.___", state 132, "(1)" - line 404, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 223, "(1)" - line 431, "pan.___", state 253, "(1)" - line 435, "pan.___", state 266, "(1)" - line 614, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 404, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 359, "(1)" - line 431, "pan.___", state 389, "(1)" - line 435, "pan.___", state 402, "(1)" - line 404, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 488, "(1)" - line 431, "pan.___", state 518, "(1)" - line 435, "pan.___", state 531, "(1)" - line 404, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 556, "(1)" - line 404, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 557, "else" - line 404, "pan.___", state 560, "(1)" - line 408, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 570, "(1)" - line 408, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 571, "else" - line 408, "pan.___", state 574, "(1)" - line 408, "pan.___", state 575, "(1)" - line 408, "pan.___", state 575, "(1)" - line 406, "pan.___", state 580, "((i<1))" - line 406, "pan.___", state 580, "((i>=1))" - line 413, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 588, "(1)" - line 413, "pan.___", state 589, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 589, "else" - line 413, "pan.___", state 592, "(1)" - line 413, "pan.___", state 593, "(1)" - line 413, "pan.___", state 593, "(1)" - line 417, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 602, "(1)" - line 417, "pan.___", state 603, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 603, "else" - line 417, "pan.___", state 606, "(1)" - line 417, "pan.___", state 607, "(1)" - line 417, "pan.___", state 607, "(1)" - line 415, "pan.___", state 612, "((i<2))" - line 415, "pan.___", state 612, "((i>=2))" - line 422, "pan.___", state 619, "(1)" - line 422, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 620, "else" - line 422, "pan.___", state 623, "(1)" - line 422, "pan.___", state 624, "(1)" - line 422, "pan.___", state 624, "(1)" - line 426, "pan.___", state 632, "(1)" - line 426, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 633, "else" - line 426, "pan.___", state 636, "(1)" - line 426, "pan.___", state 637, "(1)" - line 426, "pan.___", state 637, "(1)" - line 424, "pan.___", state 642, "((i<1))" - line 424, "pan.___", state 642, "((i>=1))" - line 431, "pan.___", state 649, "(1)" - line 431, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 650, "else" - line 431, "pan.___", state 653, "(1)" - line 431, "pan.___", state 654, "(1)" - line 431, "pan.___", state 654, "(1)" - line 435, "pan.___", state 662, "(1)" - line 435, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 663, "else" - line 435, "pan.___", state 666, "(1)" - line 435, "pan.___", state 667, "(1)" - line 435, "pan.___", state 667, "(1)" - line 433, "pan.___", state 672, "((i<2))" - line 433, "pan.___", state 672, "((i>=2))" - line 443, "pan.___", state 676, "(1)" - line 443, "pan.___", state 676, "(1)" - line 614, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" - line 614, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 614, "pan.___", state 681, "(1)" - line 404, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 753, "(1)" - line 431, "pan.___", state 783, "(1)" - line 435, "pan.___", state 796, "(1)" - line 404, "pan.___", state 823, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 855, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 869, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 888, "(1)" - line 431, "pan.___", state 918, "(1)" - line 435, "pan.___", state 931, "(1)" - line 404, "pan.___", state 952, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 984, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 998, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 1017, "(1)" - line 431, "pan.___", state 1047, "(1)" - line 435, "pan.___", state 1060, "(1)" - line 245, "pan.___", state 1093, "(1)" - line 253, "pan.___", state 1113, "(1)" - line 257, "pan.___", state 1121, "(1)" - line 748, "pan.___", state 1138, "-end-" - (92 of 1138 states) -unreached in proctype urcu_writer - line 837, "pan.___", state 12, "((i<1))" - line 837, "pan.___", state 12, "((i>=1))" - line 404, "pan.___", state 47, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 53, "(1)" - line 408, "pan.___", state 61, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 67, "(1)" - line 408, "pan.___", state 68, "(1)" - line 408, "pan.___", state 68, "(1)" - line 406, "pan.___", state 73, "((i<1))" - line 406, "pan.___", state 73, "((i>=1))" - line 413, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 85, "(1)" - line 413, "pan.___", state 86, "(1)" - line 413, "pan.___", state 86, "(1)" - line 417, "pan.___", state 99, "(1)" - line 417, "pan.___", state 100, "(1)" - line 417, "pan.___", state 100, "(1)" - line 415, "pan.___", state 105, "((i<2))" - line 415, "pan.___", state 105, "((i>=2))" - line 422, "pan.___", state 112, "(1)" - line 422, "pan.___", state 113, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 113, "else" - line 422, "pan.___", state 116, "(1)" - line 422, "pan.___", state 117, "(1)" - line 422, "pan.___", state 117, "(1)" - line 426, "pan.___", state 125, "(1)" - line 426, "pan.___", state 126, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 126, "else" - line 426, "pan.___", state 129, "(1)" - line 426, "pan.___", state 130, "(1)" - line 426, "pan.___", state 130, "(1)" - line 424, "pan.___", state 135, "((i<1))" - line 424, "pan.___", state 135, "((i>=1))" - line 431, "pan.___", state 142, "(1)" - line 431, "pan.___", state 143, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 143, "else" - line 431, "pan.___", state 146, "(1)" - line 431, "pan.___", state 147, "(1)" - line 431, "pan.___", state 147, "(1)" - line 435, "pan.___", state 155, "(1)" - line 435, "pan.___", state 156, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 156, "else" - line 435, "pan.___", state 159, "(1)" - line 435, "pan.___", state 160, "(1)" - line 435, "pan.___", state 160, "(1)" - line 433, "pan.___", state 165, "((i<2))" - line 433, "pan.___", state 165, "((i>=2))" - line 443, "pan.___", state 169, "(1)" - line 443, "pan.___", state 169, "(1)" - line 268, "pan.___", state 178, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 187, "cache_dirty_urcu_active_readers = 0" - line 270, "pan.___", state 195, "((i<1))" - line 270, "pan.___", state 195, "((i>=1))" - line 276, "pan.___", state 200, "cache_dirty_rcu_ptr = 0" - line 907, "pan.___", state 228, "old_data = cached_rcu_ptr" - line 918, "pan.___", state 232, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" - line 404, "pan.___", state 240, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 246, "(1)" - line 408, "pan.___", state 254, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 260, "(1)" - line 408, "pan.___", state 261, "(1)" - line 408, "pan.___", state 261, "(1)" - line 406, "pan.___", state 266, "((i<1))" - line 406, "pan.___", state 266, "((i>=1))" - line 413, "pan.___", state 274, "(1)" - line 413, "pan.___", state 275, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 275, "else" - line 413, "pan.___", state 278, "(1)" - line 413, "pan.___", state 279, "(1)" - line 413, "pan.___", state 279, "(1)" - line 417, "pan.___", state 286, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 292, "(1)" - line 417, "pan.___", state 293, "(1)" - line 417, "pan.___", state 293, "(1)" - line 415, "pan.___", state 298, "((i<2))" - line 415, "pan.___", state 298, "((i>=2))" - line 422, "pan.___", state 305, "(1)" - line 422, "pan.___", state 306, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 306, "else" - line 422, "pan.___", state 309, "(1)" - line 422, "pan.___", state 310, "(1)" - line 422, "pan.___", state 310, "(1)" - line 426, "pan.___", state 318, "(1)" - line 426, "pan.___", state 319, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 319, "else" - line 426, "pan.___", state 322, "(1)" - line 426, "pan.___", state 323, "(1)" - line 426, "pan.___", state 323, "(1)" - line 424, "pan.___", state 328, "((i<1))" - line 424, "pan.___", state 328, "((i>=1))" - line 431, "pan.___", state 335, "(1)" - line 431, "pan.___", state 336, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 336, "else" - line 431, "pan.___", state 339, "(1)" - line 431, "pan.___", state 340, "(1)" - line 431, "pan.___", state 340, "(1)" - line 435, "pan.___", state 348, "(1)" - line 435, "pan.___", state 349, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 349, "else" - line 435, "pan.___", state 352, "(1)" - line 435, "pan.___", state 353, "(1)" - line 435, "pan.___", state 353, "(1)" - line 433, "pan.___", state 358, "((i<2))" - line 433, "pan.___", state 358, "((i>=2))" - line 443, "pan.___", state 362, "(1)" - line 443, "pan.___", state 362, "(1)" - line 404, "pan.___", state 373, "(1)" - line 404, "pan.___", state 374, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 374, "else" - line 404, "pan.___", state 377, "(1)" - line 408, "pan.___", state 385, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 391, "(1)" - line 408, "pan.___", state 392, "(1)" - line 408, "pan.___", state 392, "(1)" - line 406, "pan.___", state 397, "((i<1))" - line 406, "pan.___", state 397, "((i>=1))" - line 413, "pan.___", state 403, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 409, "(1)" - line 413, "pan.___", state 410, "(1)" - line 413, "pan.___", state 410, "(1)" - line 417, "pan.___", state 417, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 423, "(1)" - line 417, "pan.___", state 424, "(1)" - line 417, "pan.___", state 424, "(1)" - line 415, "pan.___", state 429, "((i<2))" - line 415, "pan.___", state 429, "((i>=2))" - line 422, "pan.___", state 436, "(1)" - line 422, "pan.___", state 437, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 437, "else" - line 422, "pan.___", state 440, "(1)" - line 422, "pan.___", state 441, "(1)" - line 422, "pan.___", state 441, "(1)" - line 426, "pan.___", state 449, "(1)" - line 426, "pan.___", state 450, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 450, "else" - line 426, "pan.___", state 453, "(1)" - line 426, "pan.___", state 454, "(1)" - line 426, "pan.___", state 454, "(1)" - line 424, "pan.___", state 459, "((i<1))" - line 424, "pan.___", state 459, "((i>=1))" - line 431, "pan.___", state 466, "(1)" - line 431, "pan.___", state 467, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 467, "else" - line 431, "pan.___", state 470, "(1)" - line 431, "pan.___", state 471, "(1)" - line 431, "pan.___", state 471, "(1)" - line 435, "pan.___", state 479, "(1)" - line 435, "pan.___", state 480, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 480, "else" - line 435, "pan.___", state 483, "(1)" - line 435, "pan.___", state 484, "(1)" - line 435, "pan.___", state 484, "(1)" - line 433, "pan.___", state 489, "((i<2))" - line 433, "pan.___", state 489, "((i>=2))" - line 443, "pan.___", state 493, "(1)" - line 443, "pan.___", state 493, "(1)" - line 972, "pan.___", state 504, "_proc_urcu_writer = (_proc_urcu_writer&~((1<<9)))" - line 977, "pan.___", state 505, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<8)|(1<<7))))" - line 404, "pan.___", state 510, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 516, "(1)" - line 408, "pan.___", state 524, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 530, "(1)" - line 408, "pan.___", state 531, "(1)" - line 408, "pan.___", state 531, "(1)" - line 406, "pan.___", state 536, "((i<1))" - line 406, "pan.___", state 536, "((i>=1))" - line 413, "pan.___", state 542, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 548, "(1)" - line 413, "pan.___", state 549, "(1)" - line 413, "pan.___", state 549, "(1)" - line 417, "pan.___", state 556, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 562, "(1)" - line 417, "pan.___", state 563, "(1)" - line 417, "pan.___", state 563, "(1)" - line 415, "pan.___", state 568, "((i<2))" - line 415, "pan.___", state 568, "((i>=2))" - line 422, "pan.___", state 575, "(1)" - line 422, "pan.___", state 576, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 576, "else" - line 422, "pan.___", state 579, "(1)" - line 422, "pan.___", state 580, "(1)" - line 422, "pan.___", state 580, "(1)" - line 426, "pan.___", state 588, "(1)" - line 426, "pan.___", state 589, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 589, "else" - line 426, "pan.___", state 592, "(1)" - line 426, "pan.___", state 593, "(1)" - line 426, "pan.___", state 593, "(1)" - line 424, "pan.___", state 598, "((i<1))" - line 424, "pan.___", state 598, "((i>=1))" - line 431, "pan.___", state 605, "(1)" - line 431, "pan.___", state 606, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 606, "else" - line 431, "pan.___", state 609, "(1)" - line 431, "pan.___", state 610, "(1)" - line 431, "pan.___", state 610, "(1)" - line 435, "pan.___", state 618, "(1)" - line 435, "pan.___", state 619, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 619, "else" - line 435, "pan.___", state 622, "(1)" - line 435, "pan.___", state 623, "(1)" - line 435, "pan.___", state 623, "(1)" - line 443, "pan.___", state 632, "(1)" - line 443, "pan.___", state 632, "(1)" - line 404, "pan.___", state 639, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 653, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 671, "cache_dirty_rcu_ptr = 0" - line 422, "pan.___", state 704, "(1)" - line 426, "pan.___", state 717, "(1)" - line 431, "pan.___", state 734, "(1)" - line 435, "pan.___", state 747, "(1)" - line 408, "pan.___", state 784, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 802, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 816, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 848, "(1)" - line 431, "pan.___", state 865, "(1)" - line 435, "pan.___", state 878, "(1)" - line 1054, "pan.___", state 905, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" - line 268, "pan.___", state 933, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 935, "(1)" - line 272, "pan.___", state 942, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 944, "(1)" - line 272, "pan.___", state 945, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 945, "else" - line 270, "pan.___", state 950, "((i<1))" - line 270, "pan.___", state 950, "((i>=1))" - line 276, "pan.___", state 955, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 957, "(1)" - line 276, "pan.___", state 958, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 958, "else" - line 280, "pan.___", state 964, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 966, "(1)" - line 280, "pan.___", state 967, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 967, "else" - line 278, "pan.___", state 972, "((i<2))" - line 278, "pan.___", state 972, "((i>=2))" - line 245, "pan.___", state 980, "(1)" - line 249, "pan.___", state 988, "(1)" - line 249, "pan.___", state 989, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 989, "else" - line 247, "pan.___", state 994, "((i<1))" - line 247, "pan.___", state 994, "((i>=1))" - line 253, "pan.___", state 1000, "(1)" - line 253, "pan.___", state 1001, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1001, "else" - line 257, "pan.___", state 1008, "(1)" - line 257, "pan.___", state 1009, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1009, "else" - line 262, "pan.___", state 1018, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1018, "else" - line 1108, "pan.___", state 1034, "((i<1))" - line 1108, "pan.___", state 1034, "((i>=1))" - line 268, "pan.___", state 1039, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1041, "(1)" - line 272, "pan.___", state 1048, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1050, "(1)" - line 272, "pan.___", state 1051, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1051, "else" - line 270, "pan.___", state 1056, "((i<1))" - line 270, "pan.___", state 1056, "((i>=1))" - line 276, "pan.___", state 1061, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1063, "(1)" - line 276, "pan.___", state 1064, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1064, "else" - line 280, "pan.___", state 1070, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1072, "(1)" - line 280, "pan.___", state 1073, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1073, "else" - line 278, "pan.___", state 1078, "((i<2))" - line 278, "pan.___", state 1078, "((i>=2))" - line 245, "pan.___", state 1086, "(1)" - line 249, "pan.___", state 1094, "(1)" - line 249, "pan.___", state 1095, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1095, "else" - line 247, "pan.___", state 1100, "((i<1))" - line 247, "pan.___", state 1100, "((i>=1))" - line 253, "pan.___", state 1106, "(1)" - line 253, "pan.___", state 1107, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1107, "else" - line 257, "pan.___", state 1114, "(1)" - line 257, "pan.___", state 1115, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1115, "else" - line 262, "pan.___", state 1124, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1124, "else" - line 295, "pan.___", state 1126, "(cache_dirty_urcu_gp_ctr)" - line 295, "pan.___", state 1126, "else" - line 1108, "pan.___", state 1127, "(cache_dirty_urcu_gp_ctr)" - line 1108, "pan.___", state 1127, "else" - line 268, "pan.___", state 1131, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1133, "(1)" - line 272, "pan.___", state 1140, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1142, "(1)" - line 272, "pan.___", state 1143, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1143, "else" - line 270, "pan.___", state 1148, "((i<1))" - line 270, "pan.___", state 1148, "((i>=1))" - line 276, "pan.___", state 1153, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1155, "(1)" - line 276, "pan.___", state 1156, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1156, "else" - line 280, "pan.___", state 1162, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1164, "(1)" - line 280, "pan.___", state 1165, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1165, "else" - line 278, "pan.___", state 1170, "((i<2))" - line 278, "pan.___", state 1170, "((i>=2))" - line 245, "pan.___", state 1178, "(1)" - line 249, "pan.___", state 1186, "(1)" - line 249, "pan.___", state 1187, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1187, "else" - line 247, "pan.___", state 1192, "((i<1))" - line 247, "pan.___", state 1192, "((i>=1))" - line 253, "pan.___", state 1198, "(1)" - line 253, "pan.___", state 1199, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1199, "else" - line 257, "pan.___", state 1206, "(1)" - line 257, "pan.___", state 1207, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1207, "else" - line 262, "pan.___", state 1216, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1216, "else" - line 1112, "pan.___", state 1219, "i = 0" - line 1112, "pan.___", state 1221, "reader_barrier = 1" - line 1112, "pan.___", state 1232, "((i<1))" - line 1112, "pan.___", state 1232, "((i>=1))" - line 268, "pan.___", state 1237, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1239, "(1)" - line 272, "pan.___", state 1246, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1248, "(1)" - line 272, "pan.___", state 1249, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1249, "else" - line 270, "pan.___", state 1254, "((i<1))" - line 270, "pan.___", state 1254, "((i>=1))" - line 276, "pan.___", state 1259, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1261, "(1)" - line 276, "pan.___", state 1262, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1262, "else" - line 280, "pan.___", state 1268, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1270, "(1)" - line 280, "pan.___", state 1271, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1271, "else" - line 278, "pan.___", state 1276, "((i<2))" - line 278, "pan.___", state 1276, "((i>=2))" - line 245, "pan.___", state 1284, "(1)" - line 249, "pan.___", state 1292, "(1)" - line 249, "pan.___", state 1293, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1293, "else" - line 247, "pan.___", state 1298, "((i<1))" - line 247, "pan.___", state 1298, "((i>=1))" - line 253, "pan.___", state 1304, "(1)" - line 253, "pan.___", state 1305, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1305, "else" - line 257, "pan.___", state 1312, "(1)" - line 257, "pan.___", state 1313, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1313, "else" - line 262, "pan.___", state 1322, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1322, "else" - line 295, "pan.___", state 1324, "(cache_dirty_urcu_gp_ctr)" - line 295, "pan.___", state 1324, "else" - line 1112, "pan.___", state 1325, "(cache_dirty_urcu_gp_ctr)" - line 1112, "pan.___", state 1325, "else" - line 272, "pan.___", state 1338, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1351, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1360, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1376, "(1)" - line 249, "pan.___", state 1384, "(1)" - line 253, "pan.___", state 1396, "(1)" - line 257, "pan.___", state 1404, "(1)" - line 268, "pan.___", state 1435, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1444, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1457, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1466, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1482, "(1)" - line 249, "pan.___", state 1490, "(1)" - line 253, "pan.___", state 1502, "(1)" - line 257, "pan.___", state 1510, "(1)" - line 268, "pan.___", state 1527, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1529, "(1)" - line 272, "pan.___", state 1536, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1538, "(1)" - line 272, "pan.___", state 1539, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1539, "else" - line 270, "pan.___", state 1544, "((i<1))" - line 270, "pan.___", state 1544, "((i>=1))" - line 276, "pan.___", state 1549, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1551, "(1)" - line 276, "pan.___", state 1552, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1552, "else" - line 280, "pan.___", state 1558, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1560, "(1)" - line 280, "pan.___", state 1561, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1561, "else" - line 278, "pan.___", state 1566, "((i<2))" - line 278, "pan.___", state 1566, "((i>=2))" - line 245, "pan.___", state 1574, "(1)" - line 249, "pan.___", state 1582, "(1)" - line 249, "pan.___", state 1583, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1583, "else" - line 247, "pan.___", state 1588, "((i<1))" - line 247, "pan.___", state 1588, "((i>=1))" - line 253, "pan.___", state 1594, "(1)" - line 253, "pan.___", state 1595, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1595, "else" - line 257, "pan.___", state 1602, "(1)" - line 257, "pan.___", state 1603, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1603, "else" - line 262, "pan.___", state 1612, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1612, "else" - line 1119, "pan.___", state 1615, "i = 0" - line 1119, "pan.___", state 1617, "reader_barrier = 1" - line 1119, "pan.___", state 1628, "((i<1))" - line 1119, "pan.___", state 1628, "((i>=1))" - line 268, "pan.___", state 1633, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1635, "(1)" - line 272, "pan.___", state 1642, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1644, "(1)" - line 272, "pan.___", state 1645, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1645, "else" - line 270, "pan.___", state 1650, "((i<1))" - line 270, "pan.___", state 1650, "((i>=1))" - line 276, "pan.___", state 1655, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1657, "(1)" - line 276, "pan.___", state 1658, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1658, "else" - line 280, "pan.___", state 1664, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1666, "(1)" - line 280, "pan.___", state 1667, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1667, "else" - line 278, "pan.___", state 1672, "((i<2))" - line 278, "pan.___", state 1672, "((i>=2))" - line 245, "pan.___", state 1680, "(1)" - line 249, "pan.___", state 1688, "(1)" - line 249, "pan.___", state 1689, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1689, "else" - line 247, "pan.___", state 1694, "((i<1))" - line 247, "pan.___", state 1694, "((i>=1))" - line 253, "pan.___", state 1700, "(1)" - line 253, "pan.___", state 1701, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1701, "else" - line 257, "pan.___", state 1708, "(1)" - line 257, "pan.___", state 1709, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1709, "else" - line 262, "pan.___", state 1718, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1718, "else" - line 295, "pan.___", state 1720, "(cache_dirty_urcu_gp_ctr)" - line 295, "pan.___", state 1720, "else" - line 1119, "pan.___", state 1721, "(cache_dirty_urcu_gp_ctr)" - line 1119, "pan.___", state 1721, "else" - line 1123, "pan.___", state 1724, "-end-" - (312 of 1724 states) -unreached in proctype :init: - line 1138, "pan.___", state 11, "((i<1))" - line 1138, "pan.___", state 11, "((i>=1))" - (1 of 26 states) -unreached in proctype :never: - line 1184, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 23.7 seconds -pan: rate 5259.7381 states/second -pan: avg transition delay 1.5447e-06 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input deleted file mode 100644 index af4dcf5..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,1157 +0,0 @@ -#define NO_MB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 37c6ecd..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,1249 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2890 -2:2:1138 -3:2:1143 -4:2:1147 -5:2:1155 -6:2:1159 -7:2:1163 -8:0:2890 -9:1:0 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b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.log deleted file mode 100644 index 93939dd..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.log +++ /dev/null @@ -1,329 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1179) -pan: claim violated! (at depth 1476) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 3979, errors: 1 - 430584 states, stored - 99483765 states, matched - 99914349 transitions (= stored+matched) -5.7035561e+08 atomic steps -hash conflicts: 13587432 (resolved) - -Stats on memory usage (in Megabytes): - 47.634 equivalent memory usage for states (stored*(State-vector + overhead)) - 20.652 actual memory usage for states (compression: 43.36%) - state-vector as stored = 14 byte + 36 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 486.369 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 7914 682 569 2 2 ] -unreached in proctype urcu_reader - line 713, "pan.___", state 12, "((i<1))" - line 713, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 102, "(1)" - line 249, "pan.___", state 110, "(1)" - line 253, "pan.___", state 122, "(1)" - line 257, "pan.___", state 130, "(1)" - line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 221, "(1)" - line 431, "pan.___", state 251, "(1)" - line 435, "pan.___", state 264, "(1)" - line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 357, "(1)" - line 431, "pan.___", state 387, "(1)" - line 435, "pan.___", state 400, "(1)" - line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 486, "(1)" - line 431, "pan.___", state 516, "(1)" - line 435, "pan.___", state 529, "(1)" - line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 554, "(1)" - line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 555, "else" - line 404, "pan.___", state 558, "(1)" - line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 568, "(1)" - line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 569, "else" - line 408, "pan.___", state 572, "(1)" - line 408, "pan.___", state 573, "(1)" - line 408, "pan.___", state 573, "(1)" - line 406, "pan.___", state 578, "((i<1))" - line 406, "pan.___", state 578, "((i>=1))" - line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 586, "(1)" - line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 587, "else" - line 413, "pan.___", state 590, "(1)" - line 413, "pan.___", state 591, "(1)" - line 413, "pan.___", state 591, "(1)" - line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 600, "(1)" - line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 601, "else" - line 417, "pan.___", state 604, "(1)" - line 417, "pan.___", state 605, "(1)" - line 417, "pan.___", state 605, "(1)" - line 415, "pan.___", state 610, "((i<2))" - line 415, "pan.___", state 610, "((i>=2))" - line 422, "pan.___", state 617, "(1)" - line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 618, "else" - line 422, "pan.___", state 621, "(1)" - line 422, "pan.___", state 622, "(1)" - line 422, "pan.___", state 622, "(1)" - line 426, "pan.___", state 630, "(1)" - line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 631, "else" - line 426, "pan.___", state 634, "(1)" - line 426, "pan.___", state 635, "(1)" - line 426, "pan.___", state 635, "(1)" - line 424, "pan.___", state 640, "((i<1))" - line 424, "pan.___", state 640, "((i>=1))" - line 431, "pan.___", state 647, "(1)" - line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 648, "else" - line 431, "pan.___", state 651, "(1)" - line 431, "pan.___", state 652, "(1)" - line 431, "pan.___", state 652, "(1)" - line 435, "pan.___", state 660, "(1)" - line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 661, "else" - line 435, "pan.___", state 664, "(1)" - line 435, "pan.___", state 665, "(1)" - line 435, "pan.___", state 665, "(1)" - line 433, "pan.___", state 670, "((i<2))" - line 433, "pan.___", state 670, "((i>=2))" - line 443, "pan.___", state 674, "(1)" - line 443, "pan.___", state 674, "(1)" - line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" - line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 614, "pan.___", state 679, "(1)" - line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 751, "(1)" - line 431, "pan.___", state 781, "(1)" - line 435, "pan.___", state 794, "(1)" - line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 886, "(1)" - line 431, "pan.___", state 916, "(1)" - line 435, "pan.___", state 929, "(1)" - line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 1015, "(1)" - line 431, "pan.___", state 1045, "(1)" - line 435, "pan.___", state 1058, "(1)" - line 404, "pan.___", state 1091, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 1123, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 1137, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 1156, "(1)" - line 431, "pan.___", state 1186, "(1)" - line 435, "pan.___", state 1199, "(1)" - line 748, "pan.___", state 1220, "-end-" - (95 of 1220 states) -unreached in proctype urcu_writer - line 837, "pan.___", state 12, "((i<1))" - line 837, "pan.___", state 12, "((i>=1))" - line 404, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 51, "(1)" - line 408, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 65, "(1)" - line 408, "pan.___", state 66, "(1)" - line 408, "pan.___", state 66, "(1)" - line 406, "pan.___", state 71, "((i<1))" - line 406, "pan.___", state 71, "((i>=1))" - line 413, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 83, "(1)" - line 413, "pan.___", state 84, "(1)" - line 413, "pan.___", state 84, "(1)" - line 417, "pan.___", state 97, "(1)" - line 417, "pan.___", state 98, "(1)" - line 417, "pan.___", state 98, "(1)" - line 415, "pan.___", state 103, "((i<2))" - line 415, "pan.___", state 103, "((i>=2))" - line 422, "pan.___", state 110, "(1)" - line 422, "pan.___", state 111, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 111, "else" - line 422, "pan.___", state 114, "(1)" - line 422, "pan.___", state 115, "(1)" - line 422, "pan.___", state 115, "(1)" - line 426, "pan.___", state 123, "(1)" - line 426, "pan.___", state 124, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 124, "else" - line 426, "pan.___", state 127, "(1)" - line 426, "pan.___", state 128, "(1)" - line 426, "pan.___", state 128, "(1)" - line 424, "pan.___", state 133, "((i<1))" - line 424, "pan.___", state 133, "((i>=1))" - line 431, "pan.___", state 140, "(1)" - line 431, "pan.___", state 141, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 141, "else" - line 431, "pan.___", state 144, "(1)" - line 431, "pan.___", state 145, "(1)" - line 431, "pan.___", state 145, "(1)" - line 435, "pan.___", state 153, "(1)" - line 435, "pan.___", state 154, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 154, "else" - line 435, "pan.___", state 157, "(1)" - line 435, "pan.___", state 158, "(1)" - line 435, "pan.___", state 158, "(1)" - line 433, "pan.___", state 163, "((i<2))" - line 433, "pan.___", state 163, "((i>=2))" - line 443, "pan.___", state 167, "(1)" - line 443, "pan.___", state 167, "(1)" - line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 404, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 303, "(1)" - line 426, "pan.___", state 316, "(1)" - line 431, "pan.___", state 333, "(1)" - line 435, "pan.___", state 346, "(1)" - line 408, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 447, "(1)" - line 431, "pan.___", state 464, "(1)" - line 435, "pan.___", state 477, "(1)" - line 408, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 586, "(1)" - line 431, "pan.___", state 603, "(1)" - line 435, "pan.___", state 616, "(1)" - line 408, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 715, "(1)" - line 431, "pan.___", state 732, "(1)" - line 435, "pan.___", state 745, "(1)" - line 408, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 846, "(1)" - line 431, "pan.___", state 863, "(1)" - line 435, "pan.___", state 876, "(1)" - line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 955, "(1)" - line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 978, "(1)" - line 249, "pan.___", state 986, "(1)" - line 253, "pan.___", state 998, "(1)" - line 257, "pan.___", state 1006, "(1)" - line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1084, "(1)" - line 249, "pan.___", state 1092, "(1)" - line 253, "pan.___", state 1104, "(1)" - line 257, "pan.___", state 1112, "(1)" - line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1176, "(1)" - line 249, "pan.___", state 1184, "(1)" - line 253, "pan.___", state 1196, "(1)" - line 257, "pan.___", state 1204, "(1)" - line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1282, "(1)" - line 249, "pan.___", state 1290, "(1)" - line 253, "pan.___", state 1302, "(1)" - line 257, "pan.___", state 1310, "(1)" - line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1374, "(1)" - line 249, "pan.___", state 1382, "(1)" - line 253, "pan.___", state 1394, "(1)" - line 257, "pan.___", state 1402, "(1)" - line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1480, "(1)" - line 249, "pan.___", state 1488, "(1)" - line 253, "pan.___", state 1500, "(1)" - line 257, "pan.___", state 1508, "(1)" - line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1572, "(1)" - line 249, "pan.___", state 1580, "(1)" - line 253, "pan.___", state 1592, "(1)" - line 257, "pan.___", state 1600, "(1)" - line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1678, "(1)" - line 249, "pan.___", state 1686, "(1)" - line 253, "pan.___", state 1698, "(1)" - line 257, "pan.___", state 1706, "(1)" - line 1123, "pan.___", state 1722, "-end-" - (129 of 1722 states) -unreached in proctype :init: - line 1138, "pan.___", state 11, "((i<1))" - line 1138, "pan.___", state 11, "((i>=1))" - (1 of 26 states) -unreached in proctype :never: - line 1184, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 155 seconds -pan: rate 2784.0683 states/second -pan: avg transition delay 1.5479e-06 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input deleted file mode 100644 index 44977a8..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,1157 +0,0 @@ -#define NO_RMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 931028a..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1479 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2970 -2:2:1220 -3:2:1225 -4:2:1229 -5:2:1237 -6:2:1241 -7:2:1245 -8:0:2970 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-1345:1:524 -1346:1:525 -1347:1:523 -1348:1:531 -1349:1:532 -1350:1:536 -1351:1:543 -1352:0:2970 -1353:1:40 -1354:0:2970 -1355:1:41 -1356:0:2970 -1357:2:2241 -1358:0:2970 -1359:1:42 -1360:0:2970 -1361:2:2242 -1362:0:2970 -1363:1:143 -1364:0:2970 -1365:1:145 -1366:0:2970 -1367:2:2241 -1368:0:2970 -1369:1:44 -1370:0:2970 -1371:2:2242 -1372:0:2970 -1373:1:681 -1374:1:682 -1375:1:686 -1376:1:687 -1377:1:695 -1378:1:696 -1379:1:697 -1380:1:709 -1381:1:714 -1382:1:718 -1383:1:719 -1384:1:727 -1385:1:728 -1386:1:732 -1387:1:733 -1388:1:727 -1389:1:728 -1390:1:732 -1391:1:733 -1392:1:741 -1393:1:746 -1394:1:747 -1395:1:758 -1396:1:759 -1397:1:760 -1398:1:771 -1399:1:776 -1400:1:777 -1401:1:788 -1402:1:789 -1403:1:790 -1404:1:788 -1405:1:796 -1406:1:797 -1407:1:801 -1408:0:2970 -1409:1:40 -1410:0:2970 -1411:1:41 -1412:0:2970 -1413:2:2241 -1414:0:2970 -1415:1:42 -1416:0:2970 -1417:2:2242 -1418:0:2970 -1419:1:143 -1420:0:2970 -1421:1:145 -1422:0:2970 -1423:2:2241 -1424:0:2970 -1425:1:44 -1426:0:2970 -1427:2:2242 -1428:0:2970 -1429:1:810 -1430:0:2970 -1431:2:2241 -1432:0:2970 -1433:1:1087 -1434:1:1091 -1435:1:1092 -1436:1:1100 -1437:1:1101 -1438:1:1105 -1439:1:1106 -1440:1:1114 -1441:1:1119 -1442:1:1123 -1443:1:1124 -1444:1:1132 -1445:1:1133 -1446:1:1137 -1447:1:1138 -1448:1:1132 -1449:1:1133 -1450:1:1137 -1451:1:1138 -1452:1:1146 -1453:1:1151 -1454:1:1152 -1455:1:1163 -1456:1:1164 -1457:1:1165 -1458:1:1176 -1459:1:1181 -1460:1:1182 -1461:1:1193 -1462:1:1194 -1463:1:1195 -1464:1:1193 -1465:1:1201 -1466:1:1202 -1467:1:1206 -1468:1:1210 -1469:0:2970 -1470:2:2242 -1471:0:2970 -1472:1:812 -1473:1:813 -1474:0:2968 -1475:1:40 -1476:0:2974 -1477:1:1060 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.log deleted file mode 100644 index deef6fa..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.log +++ /dev/null @@ -1,298 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1179) -Depth= 3829 States= 1e+06 Transitions= 2.15e+08 Memory= 512.834 t= 341 R= 3e+03 -Depth= 3829 States= 2e+06 Transitions= 5.61e+08 Memory= 559.026 t= 920 R= 2e+03 -pan: claim violated! (at depth 1358) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 3829, errors: 1 - 2932262 states, stored -7.8211443e+08 states, matched -7.850467e+08 transitions (= stored+matched) -4.5802467e+09 atomic steps -hash conflicts: 5.9075827e+08 (resolved) - -Stats on memory usage (in Megabytes): - 324.385 equivalent memory usage for states (stored*(State-vector + overhead)) - 136.208 actual memory usage for states (compression: 41.99%) - state-vector as stored = 13 byte + 36 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 601.897 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 22861 1831 2500 2 2 ] -unreached in proctype urcu_reader - line 713, "pan.___", state 12, "((i<1))" - line 713, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 102, "(1)" - line 249, "pan.___", state 110, "(1)" - line 253, "pan.___", state 122, "(1)" - line 257, "pan.___", state 130, "(1)" - line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 221, "(1)" - line 431, "pan.___", state 251, "(1)" - line 435, "pan.___", state 264, "(1)" - line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 357, "(1)" - line 431, "pan.___", state 387, "(1)" - line 435, "pan.___", state 400, "(1)" - line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 486, "(1)" - line 431, "pan.___", state 516, "(1)" - line 435, "pan.___", state 529, "(1)" - line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 554, "(1)" - line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 555, "else" - line 404, "pan.___", state 558, "(1)" - line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 568, "(1)" - line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 569, "else" - line 408, "pan.___", state 572, "(1)" - line 408, "pan.___", state 573, "(1)" - line 408, "pan.___", state 573, "(1)" - line 406, "pan.___", state 578, "((i<1))" - line 406, "pan.___", state 578, "((i>=1))" - line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 586, "(1)" - line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 587, "else" - line 413, "pan.___", state 590, "(1)" - line 413, "pan.___", state 591, "(1)" - line 413, "pan.___", state 591, "(1)" - line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 600, "(1)" - line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 601, "else" - line 417, "pan.___", state 604, "(1)" - line 417, "pan.___", state 605, "(1)" - line 417, "pan.___", state 605, "(1)" - line 415, "pan.___", state 610, "((i<2))" - line 415, "pan.___", state 610, "((i>=2))" - line 422, "pan.___", state 617, "(1)" - line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 618, "else" - line 422, "pan.___", state 621, "(1)" - line 422, "pan.___", state 622, "(1)" - line 422, "pan.___", state 622, "(1)" - line 426, "pan.___", state 630, "(1)" - line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 631, "else" - line 426, "pan.___", state 634, "(1)" - line 426, "pan.___", state 635, "(1)" - line 426, "pan.___", state 635, "(1)" - line 424, "pan.___", state 640, "((i<1))" - line 424, "pan.___", state 640, "((i>=1))" - line 431, "pan.___", state 647, "(1)" - line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 648, "else" - line 431, "pan.___", state 651, "(1)" - line 431, "pan.___", state 652, "(1)" - line 431, "pan.___", state 652, "(1)" - line 435, "pan.___", state 660, "(1)" - line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 661, "else" - line 435, "pan.___", state 664, "(1)" - line 435, "pan.___", state 665, "(1)" - line 435, "pan.___", state 665, "(1)" - line 433, "pan.___", state 670, "((i<2))" - line 433, "pan.___", state 670, "((i>=2))" - line 443, "pan.___", state 674, "(1)" - line 443, "pan.___", state 674, "(1)" - line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" - line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 614, "pan.___", state 679, "(1)" - line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 751, "(1)" - line 431, "pan.___", state 781, "(1)" - line 435, "pan.___", state 794, "(1)" - line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 886, "(1)" - line 431, "pan.___", state 916, "(1)" - line 435, "pan.___", state 929, "(1)" - line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 1015, "(1)" - line 431, "pan.___", state 1045, "(1)" - line 435, "pan.___", state 1058, "(1)" - line 245, "pan.___", state 1091, "(1)" - line 253, "pan.___", state 1111, "(1)" - line 257, "pan.___", state 1119, "(1)" - line 748, "pan.___", state 1136, "-end-" - (92 of 1136 states) -unreached in proctype urcu_writer - line 837, "pan.___", state 12, "((i<1))" - line 837, "pan.___", state 12, "((i>=1))" - line 404, "pan.___", state 46, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 60, "cache_dirty_urcu_active_readers = 0" - line 422, "pan.___", state 111, "(1)" - line 426, "pan.___", state 124, "(1)" - line 268, "pan.___", state 177, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 179, "(1)" - line 272, "pan.___", state 186, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 188, "(1)" - line 272, "pan.___", state 189, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 189, "else" - line 270, "pan.___", state 194, "((i<1))" - line 270, "pan.___", state 194, "((i>=1))" - line 276, "pan.___", state 199, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 201, "(1)" - line 276, "pan.___", state 202, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 202, "else" - line 280, "pan.___", state 208, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 210, "(1)" - line 280, "pan.___", state 211, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 211, "else" - line 285, "pan.___", state 220, "(cache_dirty_urcu_gp_ctr)" - line 285, "pan.___", state 220, "else" - line 404, "pan.___", state 239, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 253, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 271, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 285, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 304, "(1)" - line 426, "pan.___", state 317, "(1)" - line 431, "pan.___", state 334, "(1)" - line 435, "pan.___", state 347, "(1)" - line 408, "pan.___", state 384, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 402, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 416, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 448, "(1)" - line 431, "pan.___", state 465, "(1)" - line 435, "pan.___", state 478, "(1)" - line 408, "pan.___", state 523, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 541, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 555, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 587, "(1)" - line 431, "pan.___", state 604, "(1)" - line 435, "pan.___", state 617, "(1)" - line 408, "pan.___", state 652, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 670, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 684, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 716, "(1)" - line 431, "pan.___", state 733, "(1)" - line 435, "pan.___", state 746, "(1)" - line 408, "pan.___", state 783, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 801, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 815, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 847, "(1)" - line 431, "pan.___", state 864, "(1)" - line 435, "pan.___", state 877, "(1)" - line 268, "pan.___", state 932, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 941, "cache_dirty_urcu_active_readers = 0" - line 245, "pan.___", state 979, "(1)" - line 249, "pan.___", state 987, "(1)" - line 253, "pan.___", state 999, "(1)" - line 257, "pan.___", state 1007, "(1)" - line 268, "pan.___", state 1038, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1047, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1060, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1069, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1085, "(1)" - line 249, "pan.___", state 1093, "(1)" - line 253, "pan.___", state 1105, "(1)" - line 257, "pan.___", state 1113, "(1)" - line 272, "pan.___", state 1139, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1152, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1161, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1177, "(1)" - line 249, "pan.___", state 1185, "(1)" - line 253, "pan.___", state 1197, "(1)" - line 257, "pan.___", state 1205, "(1)" - line 268, "pan.___", state 1236, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1245, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1258, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1267, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1283, "(1)" - line 249, "pan.___", state 1291, "(1)" - line 253, "pan.___", state 1303, "(1)" - line 257, "pan.___", state 1311, "(1)" - line 272, "pan.___", state 1337, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1350, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1359, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1375, "(1)" - line 249, "pan.___", state 1383, "(1)" - line 253, "pan.___", state 1395, "(1)" - line 257, "pan.___", state 1403, "(1)" - line 268, "pan.___", state 1434, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1443, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1456, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1465, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1481, "(1)" - line 249, "pan.___", state 1489, "(1)" - line 253, "pan.___", state 1501, "(1)" - line 257, "pan.___", state 1509, "(1)" - line 272, "pan.___", state 1535, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1548, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1557, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1573, "(1)" - line 249, "pan.___", state 1581, "(1)" - line 253, "pan.___", state 1593, "(1)" - line 257, "pan.___", state 1601, "(1)" - line 268, "pan.___", state 1632, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1641, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1654, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1663, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1679, "(1)" - line 249, "pan.___", state 1687, "(1)" - line 253, "pan.___", state 1699, "(1)" - line 257, "pan.___", state 1707, "(1)" - line 1123, "pan.___", state 1723, "-end-" - (110 of 1723 states) -unreached in proctype :init: - line 1138, "pan.___", state 11, "((i<1))" - line 1138, "pan.___", state 11, "((i>=1))" - (1 of 26 states) -unreached in proctype :never: - line 1184, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.31e+03 seconds -pan: rate 2245.8255 states/second -pan: avg transition delay 1.6631e-06 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input deleted file mode 100644 index b79ec79..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,1157 +0,0 @@ -#define NO_WMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index 4b13aef..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1361 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2887 -2:2:1136 -3:2:1141 -4:2:1145 -5:2:1153 -6:2:1157 -7:2:1161 -8:0:2887 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-1349:0:2887 -1350:2:2157 -1351:0:2887 -1352:2:2158 -1353:0:2887 -1354:1:812 -1355:1:813 -1356:0:2885 -1357:2:2159 -1358:0:2891 -1359:1:919 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.define b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.log deleted file mode 100644 index b0c3662..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.log +++ /dev/null @@ -1,458 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1179) -Depth= 4014 States= 1e+06 Transitions= 1.62e+08 Memory= 512.736 t= 256 R= 4e+03 -pan: claim violated! (at depth 1235) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 4014, errors: 1 - 1411681 states, stored -2.3165948e+08 states, matched -2.3307116e+08 transitions (= stored+matched) -1.3076596e+09 atomic steps -hash conflicts: 78416855 (resolved) - -Stats on memory usage (in Megabytes): - 156.169 equivalent memory usage for states (stored*(State-vector + overhead)) - 66.078 actual memory usage for states (compression: 42.31%) - state-vector as stored = 13 byte + 36 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 531.779 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 14645 1835 1567 2 2 ] -unreached in proctype urcu_reader - line 713, "pan.___", state 12, "((i<1))" - line 713, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 102, "(1)" - line 249, "pan.___", state 110, "(1)" - line 253, "pan.___", state 122, "(1)" - line 257, "pan.___", state 130, "(1)" - line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 221, "(1)" - line 431, "pan.___", state 251, "(1)" - line 435, "pan.___", state 264, "(1)" - line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 357, "(1)" - line 431, "pan.___", state 387, "(1)" - line 435, "pan.___", state 400, "(1)" - line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 486, "(1)" - line 431, "pan.___", state 516, "(1)" - line 435, "pan.___", state 529, "(1)" - line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 554, "(1)" - line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 555, "else" - line 404, "pan.___", state 558, "(1)" - line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 568, "(1)" - line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 569, "else" - line 408, "pan.___", state 572, "(1)" - line 408, "pan.___", state 573, "(1)" - line 408, "pan.___", state 573, "(1)" - line 406, "pan.___", state 578, "((i<1))" - line 406, "pan.___", state 578, "((i>=1))" - line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 586, "(1)" - line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 587, "else" - line 413, "pan.___", state 590, "(1)" - line 413, "pan.___", state 591, "(1)" - line 413, "pan.___", state 591, "(1)" - line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 600, "(1)" - line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 601, "else" - line 417, "pan.___", state 604, "(1)" - line 417, "pan.___", state 605, "(1)" - line 417, "pan.___", state 605, "(1)" - line 415, "pan.___", state 610, "((i<2))" - line 415, "pan.___", state 610, "((i>=2))" - line 422, "pan.___", state 617, "(1)" - line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 618, "else" - line 422, "pan.___", state 621, "(1)" - line 422, "pan.___", state 622, "(1)" - line 422, "pan.___", state 622, "(1)" - line 426, "pan.___", state 630, "(1)" - line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 631, "else" - line 426, "pan.___", state 634, "(1)" - line 426, "pan.___", state 635, "(1)" - line 426, "pan.___", state 635, "(1)" - line 424, "pan.___", state 640, "((i<1))" - line 424, "pan.___", state 640, "((i>=1))" - line 431, "pan.___", state 647, "(1)" - line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 648, "else" - line 431, "pan.___", state 651, "(1)" - line 431, "pan.___", state 652, "(1)" - line 431, "pan.___", state 652, "(1)" - line 435, "pan.___", state 660, "(1)" - line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 661, "else" - line 435, "pan.___", state 664, "(1)" - line 435, "pan.___", state 665, "(1)" - line 435, "pan.___", state 665, "(1)" - line 433, "pan.___", state 670, "((i<2))" - line 433, "pan.___", state 670, "((i>=2))" - line 443, "pan.___", state 674, "(1)" - line 443, "pan.___", state 674, "(1)" - line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" - line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 614, "pan.___", state 679, "(1)" - line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 751, "(1)" - line 431, "pan.___", state 781, "(1)" - line 435, "pan.___", state 794, "(1)" - line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 886, "(1)" - line 431, "pan.___", state 916, "(1)" - line 435, "pan.___", state 929, "(1)" - line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 1015, "(1)" - line 431, "pan.___", state 1045, "(1)" - line 435, "pan.___", state 1058, "(1)" - line 245, "pan.___", state 1091, "(1)" - line 253, "pan.___", state 1111, "(1)" - line 257, "pan.___", state 1119, "(1)" - line 748, "pan.___", state 1136, "-end-" - (92 of 1136 states) -unreached in proctype urcu_writer - line 837, "pan.___", state 12, "((i<1))" - line 837, "pan.___", state 12, "((i>=1))" - line 404, "pan.___", state 49, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 63, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 81, "cache_dirty_rcu_ptr = 0" - line 422, "pan.___", state 114, "(1)" - line 426, "pan.___", state 127, "(1)" - line 431, "pan.___", state 144, "(1)" - line 268, "pan.___", state 180, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 189, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 202, "cache_dirty_rcu_ptr = 0" - line 404, "pan.___", state 242, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 256, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 274, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 288, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 307, "(1)" - line 426, "pan.___", state 320, "(1)" - line 431, "pan.___", state 337, "(1)" - line 435, "pan.___", state 350, "(1)" - line 408, "pan.___", state 387, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 405, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 419, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 451, "(1)" - line 431, "pan.___", state 468, "(1)" - line 435, "pan.___", state 481, "(1)" - line 404, "pan.___", state 511, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 525, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 543, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 557, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 576, "(1)" - line 426, "pan.___", state 589, "(1)" - line 431, "pan.___", state 606, "(1)" - line 435, "pan.___", state 619, "(1)" - line 404, "pan.___", state 640, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 642, "(1)" - line 404, "pan.___", state 643, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 643, "else" - line 404, "pan.___", state 646, "(1)" - line 408, "pan.___", state 654, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 656, "(1)" - line 408, "pan.___", state 657, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 657, "else" - line 408, "pan.___", state 660, "(1)" - line 408, "pan.___", state 661, "(1)" - line 408, "pan.___", state 661, "(1)" - line 406, "pan.___", state 666, "((i<1))" - line 406, "pan.___", state 666, "((i>=1))" - line 413, "pan.___", state 672, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 674, "(1)" - line 413, "pan.___", state 675, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 675, "else" - line 413, "pan.___", state 678, "(1)" - line 413, "pan.___", state 679, "(1)" - line 413, "pan.___", state 679, "(1)" - line 417, "pan.___", state 686, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 688, "(1)" - line 417, "pan.___", state 689, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 689, "else" - line 417, "pan.___", state 692, "(1)" - line 417, "pan.___", state 693, "(1)" - line 417, "pan.___", state 693, "(1)" - line 415, "pan.___", state 698, "((i<2))" - line 415, "pan.___", state 698, "((i>=2))" - line 422, "pan.___", state 705, "(1)" - line 422, "pan.___", state 706, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 706, "else" - line 422, "pan.___", state 709, "(1)" - line 422, "pan.___", state 710, "(1)" - line 422, "pan.___", state 710, "(1)" - line 426, "pan.___", state 718, "(1)" - line 426, "pan.___", state 719, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 719, "else" - line 426, "pan.___", state 722, "(1)" - line 426, "pan.___", state 723, "(1)" - line 426, "pan.___", state 723, "(1)" - line 424, "pan.___", state 728, "((i<1))" - line 424, "pan.___", state 728, "((i>=1))" - line 431, "pan.___", state 735, "(1)" - line 431, "pan.___", state 736, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 736, "else" - line 431, "pan.___", state 739, "(1)" - line 431, "pan.___", state 740, "(1)" - line 431, "pan.___", state 740, "(1)" - line 435, "pan.___", state 748, "(1)" - line 435, "pan.___", state 749, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 749, "else" - line 435, "pan.___", state 752, "(1)" - line 435, "pan.___", state 753, "(1)" - line 435, "pan.___", state 753, "(1)" - line 433, "pan.___", state 758, "((i<2))" - line 433, "pan.___", state 758, "((i>=2))" - line 443, "pan.___", state 762, "(1)" - line 443, "pan.___", state 762, "(1)" - line 1003, "pan.___", state 766, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" - line 404, "pan.___", state 771, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 773, "(1)" - line 404, "pan.___", state 774, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 774, "else" - line 404, "pan.___", state 777, "(1)" - line 408, "pan.___", state 785, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 787, "(1)" - line 408, "pan.___", state 788, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 788, "else" - line 408, "pan.___", state 791, "(1)" - line 408, "pan.___", state 792, "(1)" - line 408, "pan.___", state 792, "(1)" - line 406, "pan.___", state 797, "((i<1))" - line 406, "pan.___", state 797, "((i>=1))" - line 413, "pan.___", state 803, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 805, "(1)" - line 413, "pan.___", state 806, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 806, "else" - line 413, "pan.___", state 809, "(1)" - line 413, "pan.___", state 810, "(1)" - line 413, "pan.___", state 810, "(1)" - line 417, "pan.___", state 817, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 819, "(1)" - line 417, "pan.___", state 820, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 820, "else" - line 417, "pan.___", state 823, "(1)" - line 417, "pan.___", state 824, "(1)" - line 417, "pan.___", state 824, "(1)" - line 415, "pan.___", state 829, "((i<2))" - line 415, "pan.___", state 829, "((i>=2))" - line 422, "pan.___", state 836, "(1)" - line 422, "pan.___", state 837, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 837, "else" - line 422, "pan.___", state 840, "(1)" - line 422, "pan.___", state 841, "(1)" - line 422, "pan.___", state 841, "(1)" - line 426, "pan.___", state 849, "(1)" - line 426, "pan.___", state 850, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 850, "else" - line 426, "pan.___", state 853, "(1)" - line 426, "pan.___", state 854, "(1)" - line 426, "pan.___", state 854, "(1)" - line 424, "pan.___", state 859, "((i<1))" - line 424, "pan.___", state 859, "((i>=1))" - line 431, "pan.___", state 866, "(1)" - line 431, "pan.___", state 867, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 867, "else" - line 431, "pan.___", state 870, "(1)" - line 431, "pan.___", state 871, "(1)" - line 431, "pan.___", state 871, "(1)" - line 435, "pan.___", state 879, "(1)" - line 435, "pan.___", state 880, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 880, "else" - line 435, "pan.___", state 883, "(1)" - line 435, "pan.___", state 884, "(1)" - line 435, "pan.___", state 884, "(1)" - line 433, "pan.___", state 889, "((i<2))" - line 433, "pan.___", state 889, "((i>=2))" - line 443, "pan.___", state 893, "(1)" - line 443, "pan.___", state 893, "(1)" - line 1019, "pan.___", state 898, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" - line 1014, "pan.___", state 899, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" - line 1014, "pan.___", state 899, "else" - line 1039, "pan.___", state 903, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" - line 268, "pan.___", state 934, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 943, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 958, "(1)" - line 280, "pan.___", state 965, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 981, "(1)" - line 249, "pan.___", state 989, "(1)" - line 253, "pan.___", state 1001, "(1)" - line 257, "pan.___", state 1009, "(1)" - line 268, "pan.___", state 1040, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1049, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1062, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1071, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1087, "(1)" - line 249, "pan.___", state 1095, "(1)" - line 253, "pan.___", state 1107, "(1)" - line 257, "pan.___", state 1115, "(1)" - line 272, "pan.___", state 1141, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1154, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1163, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1179, "(1)" - line 249, "pan.___", state 1187, "(1)" - line 253, "pan.___", state 1199, "(1)" - line 257, "pan.___", state 1207, "(1)" - line 268, "pan.___", state 1238, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1247, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1260, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1269, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1285, "(1)" - line 249, "pan.___", state 1293, "(1)" - line 253, "pan.___", state 1305, "(1)" - line 257, "pan.___", state 1313, "(1)" - line 268, "pan.___", state 1330, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1332, "(1)" - line 272, "pan.___", state 1339, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1341, "(1)" - line 272, "pan.___", state 1342, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1342, "else" - line 270, "pan.___", state 1347, "((i<1))" - line 270, "pan.___", state 1347, "((i>=1))" - line 276, "pan.___", state 1352, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1354, "(1)" - line 276, "pan.___", state 1355, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1355, "else" - line 280, "pan.___", state 1361, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1363, "(1)" - line 280, "pan.___", state 1364, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1364, "else" - line 278, "pan.___", state 1369, "((i<2))" - line 278, "pan.___", state 1369, "((i>=2))" - line 245, "pan.___", state 1377, "(1)" - line 249, "pan.___", state 1385, "(1)" - line 249, "pan.___", state 1386, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1386, "else" - line 247, "pan.___", state 1391, "((i<1))" - line 247, "pan.___", state 1391, "((i>=1))" - line 253, "pan.___", state 1397, "(1)" - line 253, "pan.___", state 1398, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1398, "else" - line 257, "pan.___", state 1405, "(1)" - line 257, "pan.___", state 1406, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1406, "else" - line 262, "pan.___", state 1415, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1415, "else" - line 1115, "pan.___", state 1418, "i = 0" - line 1115, "pan.___", state 1420, "reader_barrier = 1" - line 1115, "pan.___", state 1431, "((i<1))" - line 1115, "pan.___", state 1431, "((i>=1))" - line 268, "pan.___", state 1436, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1438, "(1)" - line 272, "pan.___", state 1445, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1447, "(1)" - line 272, "pan.___", state 1448, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1448, "else" - line 270, "pan.___", state 1453, "((i<1))" - line 270, "pan.___", state 1453, "((i>=1))" - line 276, "pan.___", state 1458, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1460, "(1)" - line 276, "pan.___", state 1461, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1461, "else" - line 280, "pan.___", state 1467, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1469, "(1)" - line 280, "pan.___", state 1470, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1470, "else" - line 278, "pan.___", state 1475, "((i<2))" - line 278, "pan.___", state 1475, "((i>=2))" - line 245, "pan.___", state 1483, "(1)" - line 249, "pan.___", state 1491, "(1)" - line 249, "pan.___", state 1492, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1492, "else" - line 247, "pan.___", state 1497, "((i<1))" - line 247, "pan.___", state 1497, "((i>=1))" - line 253, "pan.___", state 1503, "(1)" - line 253, "pan.___", state 1504, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1504, "else" - line 257, "pan.___", state 1511, "(1)" - line 257, "pan.___", state 1512, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1512, "else" - line 262, "pan.___", state 1521, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1521, "else" - line 295, "pan.___", state 1523, "(cache_dirty_urcu_gp_ctr)" - line 295, "pan.___", state 1523, "else" - line 1115, "pan.___", state 1524, "(cache_dirty_urcu_gp_ctr)" - line 1115, "pan.___", state 1524, "else" - line 272, "pan.___", state 1537, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1550, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1559, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1575, "(1)" - line 249, "pan.___", state 1583, "(1)" - line 253, "pan.___", state 1595, "(1)" - line 257, "pan.___", state 1603, "(1)" - line 268, "pan.___", state 1634, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1643, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1656, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1665, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1681, "(1)" - line 249, "pan.___", state 1689, "(1)" - line 253, "pan.___", state 1701, "(1)" - line 257, "pan.___", state 1709, "(1)" - line 1123, "pan.___", state 1725, "-end-" - (212 of 1725 states) -unreached in proctype :init: - line 1138, "pan.___", state 11, "((i<1))" - line 1138, "pan.___", state 11, "((i>=1))" - (1 of 26 states) -unreached in proctype :never: - line 1184, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 372 seconds -pan: rate 3796.6785 states/second -pan: avg transition delay 1.5953e-06 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input deleted file mode 100644 index 3af0fbc..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,1157 +0,0 @@ -#define SINGLE_FLIP - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 53de47d..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1238 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2889 -2:2:1136 -3:2:1141 -4:2:1145 -5:2:1153 -6:2:1157 -7:2:1161 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-1196:0:2889 -1197:2:2070 -1198:2:2071 -1199:2:2075 -1200:2:2079 -1201:2:2080 -1202:2:2084 -1203:2:2089 -1204:2:2097 -1205:2:2101 -1206:2:2102 -1207:2:2097 -1208:2:2101 -1209:2:2102 -1210:2:2106 -1211:2:2113 -1212:2:2120 -1213:2:2121 -1214:2:2128 -1215:2:2133 -1216:2:2140 -1217:2:2141 -1218:2:2140 -1219:2:2141 -1220:2:2148 -1221:2:2152 -1222:0:2889 -1223:2:2157 -1224:0:2889 -1225:2:2158 -1226:0:2889 -1227:2:2159 -1228:0:2889 -1229:2:2160 -1230:0:2889 -1231:1:812 -1232:1:813 -1233:0:2887 -1234:2:2161 -1235:0:2893 -1236:1:1005 diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress.ltl b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.define b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.log deleted file mode 100644 index 0fc4f7a..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.log +++ /dev/null @@ -1,305 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1179) -depth 7: Claim reached state 9 (line 1184) -depth 136: Claim reached state 9 (line 1183) -Depth= 12986 States= 1e+06 Transitions= 1.85e+08 Memory= 494.963 t= 294 R= 3e+03 -Depth= 12986 States= 2e+06 Transitions= 6.44e+08 Memory= 520.744 t= 1.06e+03 R= 2e+03 -Depth= 12986 States= 3e+06 Transitions= 1.24e+09 Memory= 545.842 t= 2.08e+03 R= 1e+03 -pan: resizing hashtable to -w22.. done -Depth= 12986 States= 4e+06 Transitions= 1.65e+09 Memory= 602.940 t= 2.76e+03 R= 1e+03 -Depth= 12986 States= 5e+06 Transitions= 2e+09 Memory= 629.111 t= 3.34e+03 R= 1e+03 -Depth= 12986 States= 6e+06 Transitions= 2.47e+09 Memory= 655.283 t= 4.12e+03 R= 1e+03 -Depth= 12986 States= 7e+06 Transitions= 2.94e+09 Memory= 681.260 t= 4.93e+03 R= 1e+03 -Depth= 12986 States= 8e+06 Transitions= 3.45e+09 Memory= 705.967 t= 5.79e+03 R= 1e+03 -Depth= 12986 States= 9e+06 Transitions= 3.84e+09 Memory= 732.529 t= 6.46e+03 R= 1e+03 -pan: resizing hashtable to -w24.. done -Depth= 12986 States= 1e+07 Transitions= 4.23e+09 Memory= 882.404 t= 7.1e+03 R= 1e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 12986, errors: 0 - 5822478 states, stored (1.02932e+07 visited) -4.3658924e+09 states, matched -4.3761856e+09 transitions (= visited+matched) -2.5547511e+10 atomic steps -hash conflicts: 1.1937107e+09 (resolved) - -Stats on memory usage (in Megabytes): - 644.119 equivalent memory usage for states (stored*(State-vector + overhead)) - 303.976 actual memory usage for states (compression: 47.19%) - state-vector as stored = 19 byte + 36 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 889.631 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 28603 2179 2102 2 2 ] -unreached in proctype urcu_reader - line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 102, "(1)" - line 249, "pan.___", state 110, "(1)" - line 253, "pan.___", state 122, "(1)" - line 257, "pan.___", state 130, "(1)" - line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 221, "(1)" - line 431, "pan.___", state 251, "(1)" - line 435, "pan.___", state 264, "(1)" - line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 357, "(1)" - line 431, "pan.___", state 387, "(1)" - line 435, "pan.___", state 400, "(1)" - line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 486, "(1)" - line 431, "pan.___", state 516, "(1)" - line 435, "pan.___", state 529, "(1)" - line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 554, "(1)" - line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 555, "else" - line 404, "pan.___", state 558, "(1)" - line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 568, "(1)" - line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 569, "else" - line 408, "pan.___", state 572, "(1)" - line 408, "pan.___", state 573, "(1)" - line 408, "pan.___", state 573, "(1)" - line 406, "pan.___", state 578, "((i<1))" - line 406, "pan.___", state 578, "((i>=1))" - line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 586, "(1)" - line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 587, "else" - line 413, "pan.___", state 590, "(1)" - line 413, "pan.___", state 591, "(1)" - line 413, "pan.___", state 591, "(1)" - line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 600, "(1)" - line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 601, "else" - line 417, "pan.___", state 604, "(1)" - line 417, "pan.___", state 605, "(1)" - line 417, "pan.___", state 605, "(1)" - line 415, "pan.___", state 610, "((i<2))" - line 415, "pan.___", state 610, "((i>=2))" - line 422, "pan.___", state 617, "(1)" - line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 618, "else" - line 422, "pan.___", state 621, "(1)" - line 422, "pan.___", state 622, "(1)" - line 422, "pan.___", state 622, "(1)" - line 426, "pan.___", state 630, "(1)" - line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 631, "else" - line 426, "pan.___", state 634, "(1)" - line 426, "pan.___", state 635, "(1)" - line 426, "pan.___", state 635, "(1)" - line 424, "pan.___", state 640, "((i<1))" - line 424, "pan.___", state 640, "((i>=1))" - line 431, "pan.___", state 647, "(1)" - line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 648, "else" - line 431, "pan.___", state 651, "(1)" - line 431, "pan.___", state 652, "(1)" - line 431, "pan.___", state 652, "(1)" - line 435, "pan.___", state 660, "(1)" - line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 661, "else" - line 435, "pan.___", state 664, "(1)" - line 435, "pan.___", state 665, "(1)" - line 435, "pan.___", state 665, "(1)" - line 433, "pan.___", state 670, "((i<2))" - line 433, "pan.___", state 670, "((i>=2))" - line 443, "pan.___", state 674, "(1)" - line 443, "pan.___", state 674, "(1)" - line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" - line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 614, "pan.___", state 679, "(1)" - line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 751, "(1)" - line 431, "pan.___", state 781, "(1)" - line 435, "pan.___", state 794, "(1)" - line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 886, "(1)" - line 431, "pan.___", state 916, "(1)" - line 435, "pan.___", state 929, "(1)" - line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 1015, "(1)" - line 431, "pan.___", state 1045, "(1)" - line 435, "pan.___", state 1058, "(1)" - line 245, "pan.___", state 1091, "(1)" - line 253, "pan.___", state 1111, "(1)" - line 257, "pan.___", state 1119, "(1)" - line 748, "pan.___", state 1136, "-end-" - (91 of 1136 states) -unreached in proctype urcu_writer - line 404, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 422, "pan.___", state 110, "(1)" - line 426, "pan.___", state 123, "(1)" - line 431, "pan.___", state 140, "(1)" - line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 404, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 303, "(1)" - line 426, "pan.___", state 316, "(1)" - line 431, "pan.___", state 333, "(1)" - line 435, "pan.___", state 346, "(1)" - line 408, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 447, "(1)" - line 431, "pan.___", state 464, "(1)" - line 435, "pan.___", state 477, "(1)" - line 408, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 586, "(1)" - line 431, "pan.___", state 603, "(1)" - line 435, "pan.___", state 616, "(1)" - line 408, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 715, "(1)" - line 431, "pan.___", state 732, "(1)" - line 435, "pan.___", state 745, "(1)" - line 408, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 846, "(1)" - line 431, "pan.___", state 863, "(1)" - line 435, "pan.___", state 876, "(1)" - line 268, "pan.___", state 926, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 935, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 948, "cache_dirty_rcu_ptr = 0" - line 245, "pan.___", state 973, "(1)" - line 249, "pan.___", state 981, "(1)" - line 253, "pan.___", state 993, "(1)" - line 257, "pan.___", state 1001, "(1)" - line 268, "pan.___", state 1032, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1041, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1054, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1063, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1079, "(1)" - line 249, "pan.___", state 1087, "(1)" - line 253, "pan.___", state 1099, "(1)" - line 257, "pan.___", state 1107, "(1)" - line 268, "pan.___", state 1128, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1137, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1152, "(1)" - line 280, "pan.___", state 1159, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1175, "(1)" - line 249, "pan.___", state 1183, "(1)" - line 253, "pan.___", state 1195, "(1)" - line 257, "pan.___", state 1203, "(1)" - line 268, "pan.___", state 1234, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1243, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1256, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1265, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1281, "(1)" - line 249, "pan.___", state 1289, "(1)" - line 253, "pan.___", state 1301, "(1)" - line 257, "pan.___", state 1309, "(1)" - line 272, "pan.___", state 1335, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1348, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1357, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1373, "(1)" - line 249, "pan.___", state 1381, "(1)" - line 253, "pan.___", state 1393, "(1)" - line 257, "pan.___", state 1401, "(1)" - line 268, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1441, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1454, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1463, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1479, "(1)" - line 249, "pan.___", state 1487, "(1)" - line 253, "pan.___", state 1499, "(1)" - line 257, "pan.___", state 1507, "(1)" - line 272, "pan.___", state 1533, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1546, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1555, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1571, "(1)" - line 249, "pan.___", state 1579, "(1)" - line 253, "pan.___", state 1591, "(1)" - line 257, "pan.___", state 1599, "(1)" - line 268, "pan.___", state 1630, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1639, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1652, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1661, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1677, "(1)" - line 249, "pan.___", state 1685, "(1)" - line 253, "pan.___", state 1697, "(1)" - line 257, "pan.___", state 1705, "(1)" - line 272, "pan.___", state 1731, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1744, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1753, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1769, "(1)" - line 249, "pan.___", state 1777, "(1)" - line 253, "pan.___", state 1789, "(1)" - line 257, "pan.___", state 1797, "(1)" - line 268, "pan.___", state 1828, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1837, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1850, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1859, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1875, "(1)" - line 249, "pan.___", state 1883, "(1)" - line 253, "pan.___", state 1895, "(1)" - line 257, "pan.___", state 1903, "(1)" - line 1123, "pan.___", state 1919, "-end-" - (118 of 1919 states) -unreached in proctype :init: - (0 of 26 states) -unreached in proctype :never: - line 1186, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 7.33e+03 seconds -pan: rate 1403.7352 states/second -pan: avg transition delay 1.6756e-06 usec -cp .input.spin urcu_progress_reader.spin.input -cp .input.spin.trail urcu_progress_reader.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.spin.input deleted file mode 100644 index 1e7da85..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.spin.input +++ /dev/null @@ -1,1157 +0,0 @@ -#define READER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.define b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.log deleted file mode 100644 index ed8fbc3..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.log +++ /dev/null @@ -1,290 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1179) -depth 7: Claim reached state 9 (line 1184) -depth 46: Claim reached state 9 (line 1183) -Depth= 3817 States= 1e+06 Transitions= 2.94e+08 Memory= 492.912 t= 480 R= 2e+03 -Depth= 3900 States= 2e+06 Transitions= 6.63e+08 Memory= 519.572 t= 1.09e+03 R= 2e+03 -Depth= 3900 States= 3e+06 Transitions= 1.33e+09 Memory= 543.986 t= 2.23e+03 R= 1e+03 -pan: resizing hashtable to -w22.. done -Depth= 3900 States= 4e+06 Transitions= 1.71e+09 Memory= 601.279 t= 2.86e+03 R= 1e+03 -Depth= 3900 States= 5e+06 Transitions= 2.06e+09 Memory= 627.647 t= 3.45e+03 R= 1e+03 -Depth= 3900 States= 6e+06 Transitions= 2.49e+09 Memory= 653.818 t= 4.18e+03 R= 1e+03 -Depth= 3900 States= 7e+06 Transitions= 3.14e+09 Memory= 678.135 t= 5.28e+03 R= 1e+03 -Depth= 3900 States= 8e+06 Transitions= 3.52e+09 Memory= 704.404 t= 5.93e+03 R= 1e+03 -Depth= 3900 States= 9e+06 Transitions= 3.88e+09 Memory= 730.869 t= 6.53e+03 R= 1e+03 -pan: resizing hashtable to -w24.. done -Depth= 3900 States= 1e+07 Transitions= 4.34e+09 Memory= 880.451 t= 7.29e+03 R= 1e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 3900, errors: 0 - 5638524 states, stored (1.00251e+07 visited) -4.3347674e+09 states, matched -4.3447924e+09 transitions (= visited+matched) -2.5387604e+10 atomic steps -hash conflicts: 1.1627355e+09 (resolved) - -Stats on memory usage (in Megabytes): - 623.769 equivalent memory usage for states (stored*(State-vector + overhead)) - 295.411 actual memory usage for states (compression: 47.36%) - state-vector as stored = 19 byte + 36 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 881.037 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 26786 2128 1995 2 2 ] -unreached in proctype urcu_reader - line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 102, "(1)" - line 249, "pan.___", state 110, "(1)" - line 253, "pan.___", state 122, "(1)" - line 257, "pan.___", state 130, "(1)" - line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 221, "(1)" - line 431, "pan.___", state 251, "(1)" - line 435, "pan.___", state 264, "(1)" - line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 357, "(1)" - line 431, "pan.___", state 387, "(1)" - line 435, "pan.___", state 400, "(1)" - line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 486, "(1)" - line 431, "pan.___", state 516, "(1)" - line 435, "pan.___", state 529, "(1)" - line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 404, "pan.___", state 554, "(1)" - line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" - line 404, "pan.___", state 555, "else" - line 404, "pan.___", state 558, "(1)" - line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" - line 408, "pan.___", state 568, "(1)" - line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" - line 408, "pan.___", state 569, "else" - line 408, "pan.___", state 572, "(1)" - line 408, "pan.___", state 573, "(1)" - line 408, "pan.___", state 573, "(1)" - line 406, "pan.___", state 578, "((i<1))" - line 406, "pan.___", state 578, "((i>=1))" - line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" - line 413, "pan.___", state 586, "(1)" - line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" - line 413, "pan.___", state 587, "else" - line 413, "pan.___", state 590, "(1)" - line 413, "pan.___", state 591, "(1)" - line 413, "pan.___", state 591, "(1)" - line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" - line 417, "pan.___", state 600, "(1)" - line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" - line 417, "pan.___", state 601, "else" - line 417, "pan.___", state 604, "(1)" - line 417, "pan.___", state 605, "(1)" - line 417, "pan.___", state 605, "(1)" - line 415, "pan.___", state 610, "((i<2))" - line 415, "pan.___", state 610, "((i>=2))" - line 422, "pan.___", state 617, "(1)" - line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 422, "pan.___", state 618, "else" - line 422, "pan.___", state 621, "(1)" - line 422, "pan.___", state 622, "(1)" - line 422, "pan.___", state 622, "(1)" - line 426, "pan.___", state 630, "(1)" - line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" - line 426, "pan.___", state 631, "else" - line 426, "pan.___", state 634, "(1)" - line 426, "pan.___", state 635, "(1)" - line 426, "pan.___", state 635, "(1)" - line 424, "pan.___", state 640, "((i<1))" - line 424, "pan.___", state 640, "((i>=1))" - line 431, "pan.___", state 647, "(1)" - line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" - line 431, "pan.___", state 648, "else" - line 431, "pan.___", state 651, "(1)" - line 431, "pan.___", state 652, "(1)" - line 431, "pan.___", state 652, "(1)" - line 435, "pan.___", state 660, "(1)" - line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" - line 435, "pan.___", state 661, "else" - line 435, "pan.___", state 664, "(1)" - line 435, "pan.___", state 665, "(1)" - line 435, "pan.___", state 665, "(1)" - line 433, "pan.___", state 670, "((i<2))" - line 433, "pan.___", state 670, "((i>=2))" - line 443, "pan.___", state 674, "(1)" - line 443, "pan.___", state 674, "(1)" - line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" - line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 614, "pan.___", state 679, "(1)" - line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 751, "(1)" - line 431, "pan.___", state 781, "(1)" - line 435, "pan.___", state 794, "(1)" - line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 886, "(1)" - line 431, "pan.___", state 916, "(1)" - line 435, "pan.___", state 929, "(1)" - line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 1015, "(1)" - line 431, "pan.___", state 1045, "(1)" - line 435, "pan.___", state 1058, "(1)" - line 245, "pan.___", state 1091, "(1)" - line 253, "pan.___", state 1111, "(1)" - line 257, "pan.___", state 1119, "(1)" - line 748, "pan.___", state 1136, "-end-" - (91 of 1136 states) -unreached in proctype urcu_writer - line 404, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 422, "pan.___", state 110, "(1)" - line 426, "pan.___", state 123, "(1)" - line 431, "pan.___", state 140, "(1)" - line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 404, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 422, "pan.___", state 303, "(1)" - line 426, "pan.___", state 316, "(1)" - line 431, "pan.___", state 333, "(1)" - line 435, "pan.___", state 346, "(1)" - line 408, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 447, "(1)" - line 431, "pan.___", state 464, "(1)" - line 435, "pan.___", state 477, "(1)" - line 408, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 586, "(1)" - line 431, "pan.___", state 603, "(1)" - line 435, "pan.___", state 616, "(1)" - line 408, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 715, "(1)" - line 431, "pan.___", state 732, "(1)" - line 435, "pan.___", state 745, "(1)" - line 408, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" - line 413, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" - line 426, "pan.___", state 846, "(1)" - line 431, "pan.___", state 863, "(1)" - line 435, "pan.___", state 876, "(1)" - line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 955, "(1)" - line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 978, "(1)" - line 249, "pan.___", state 986, "(1)" - line 253, "pan.___", state 998, "(1)" - line 257, "pan.___", state 1006, "(1)" - line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1084, "(1)" - line 249, "pan.___", state 1092, "(1)" - line 253, "pan.___", state 1104, "(1)" - line 257, "pan.___", state 1112, "(1)" - line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1176, "(1)" - line 249, "pan.___", state 1184, "(1)" - line 253, "pan.___", state 1196, "(1)" - line 257, "pan.___", state 1204, "(1)" - line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1282, "(1)" - line 249, "pan.___", state 1290, "(1)" - line 253, "pan.___", state 1302, "(1)" - line 257, "pan.___", state 1310, "(1)" - line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1374, "(1)" - line 249, "pan.___", state 1382, "(1)" - line 253, "pan.___", state 1394, "(1)" - line 257, "pan.___", state 1402, "(1)" - line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1480, "(1)" - line 249, "pan.___", state 1488, "(1)" - line 253, "pan.___", state 1500, "(1)" - line 257, "pan.___", state 1508, "(1)" - line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1572, "(1)" - line 249, "pan.___", state 1580, "(1)" - line 253, "pan.___", state 1592, "(1)" - line 257, "pan.___", state 1600, "(1)" - line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1678, "(1)" - line 249, "pan.___", state 1686, "(1)" - line 253, "pan.___", state 1698, "(1)" - line 257, "pan.___", state 1706, "(1)" - line 1123, "pan.___", state 1722, "-end-" - (103 of 1722 states) -unreached in proctype :init: - (0 of 26 states) -unreached in proctype :never: - line 1186, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 7.3e+03 seconds -pan: rate 1373.8126 states/second -pan: avg transition delay 1.6795e-06 usec -cp .input.spin urcu_progress_writer.spin.input -cp .input.spin.trail urcu_progress_writer.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.spin.input deleted file mode 100644 index 4f98f45..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.spin.input +++ /dev/null @@ -1,1157 +0,0 @@ -#define WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.log b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.log deleted file mode 100644 index b95b25e..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.log +++ /dev/null @@ -1,315 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1180) -depth 7: Claim reached state 9 (line 1185) -depth 46: Claim reached state 9 (line 1184) -pan: acceptance cycle (at depth 3798) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 3956, errors: 1 - 139740 states, stored (233412 visited) - 43234612 states, matched - 43468024 transitions (= visited+matched) -2.3201732e+08 atomic steps -hash conflicts: 937081 (resolved) - -Stats on memory usage (in Megabytes): - 15.459 equivalent memory usage for states (stored*(State-vector + overhead)) - 7.007 actual memory usage for states (compression: 45.33%) - state-vector as stored = 17 byte + 36 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 472.697 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 1001 532 228 2 2 ] -unreached in proctype urcu_reader - line 269, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" - line 277, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 102, "(1)" - line 250, "pan.___", state 110, "(1)" - line 254, "pan.___", state 122, "(1)" - line 258, "pan.___", state 130, "(1)" - line 405, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" - line 414, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" - line 423, "pan.___", state 221, "(1)" - line 432, "pan.___", state 251, "(1)" - line 436, "pan.___", state 264, "(1)" - line 615, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 405, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" - line 414, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" - line 423, "pan.___", state 357, "(1)" - line 432, "pan.___", state 387, "(1)" - line 436, "pan.___", state 400, "(1)" - line 405, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" - line 414, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" - line 423, "pan.___", state 486, "(1)" - line 432, "pan.___", state 516, "(1)" - line 436, "pan.___", state 529, "(1)" - line 405, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" - line 405, "pan.___", state 554, "(1)" - line 405, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" - line 405, "pan.___", state 555, "else" - line 405, "pan.___", state 558, "(1)" - line 409, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" - line 409, "pan.___", state 568, "(1)" - line 409, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" - line 409, "pan.___", state 569, "else" - line 409, "pan.___", state 572, "(1)" - line 409, "pan.___", state 573, "(1)" - line 409, "pan.___", state 573, "(1)" - line 407, "pan.___", state 578, "((i<1))" - line 407, "pan.___", state 578, "((i>=1))" - line 414, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" - line 414, "pan.___", state 586, "(1)" - line 414, "pan.___", state 587, "(cache_dirty_rcu_ptr)" - line 414, "pan.___", state 587, "else" - line 414, "pan.___", state 590, "(1)" - line 414, "pan.___", state 591, "(1)" - line 414, "pan.___", state 591, "(1)" - line 418, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" - line 418, "pan.___", state 600, "(1)" - line 418, "pan.___", state 601, "(cache_dirty_rcu_data[i])" - line 418, "pan.___", state 601, "else" - line 418, "pan.___", state 604, "(1)" - line 418, "pan.___", state 605, "(1)" - line 418, "pan.___", state 605, "(1)" - line 416, "pan.___", state 610, "((i<2))" - line 416, "pan.___", state 610, "((i>=2))" - line 423, "pan.___", state 617, "(1)" - line 423, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" - line 423, "pan.___", state 618, "else" - line 423, "pan.___", state 621, "(1)" - line 423, "pan.___", state 622, "(1)" - line 423, "pan.___", state 622, "(1)" - line 427, "pan.___", state 630, "(1)" - line 427, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" - line 427, "pan.___", state 631, "else" - line 427, "pan.___", state 634, "(1)" - line 427, "pan.___", state 635, "(1)" - line 427, "pan.___", state 635, "(1)" - line 425, "pan.___", state 640, "((i<1))" - line 425, "pan.___", state 640, "((i>=1))" - line 432, "pan.___", state 647, "(1)" - line 432, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" - line 432, "pan.___", state 648, "else" - line 432, "pan.___", state 651, "(1)" - line 432, "pan.___", state 652, "(1)" - line 432, "pan.___", state 652, "(1)" - line 436, "pan.___", state 660, "(1)" - line 436, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" - line 436, "pan.___", state 661, "else" - line 436, "pan.___", state 664, "(1)" - line 436, "pan.___", state 665, "(1)" - line 436, "pan.___", state 665, "(1)" - line 434, "pan.___", state 670, "((i<2))" - line 434, "pan.___", state 670, "((i>=2))" - line 444, "pan.___", state 674, "(1)" - line 444, "pan.___", state 674, "(1)" - line 615, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" - line 615, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 615, "pan.___", state 679, "(1)" - line 405, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" - line 414, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" - line 423, "pan.___", state 751, "(1)" - line 432, "pan.___", state 781, "(1)" - line 436, "pan.___", state 794, "(1)" - line 405, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" - line 414, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" - line 423, "pan.___", state 886, "(1)" - line 432, "pan.___", state 916, "(1)" - line 436, "pan.___", state 929, "(1)" - line 405, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" - line 414, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" - line 423, "pan.___", state 1015, "(1)" - line 432, "pan.___", state 1045, "(1)" - line 436, "pan.___", state 1058, "(1)" - line 246, "pan.___", state 1091, "(1)" - line 254, "pan.___", state 1111, "(1)" - line 258, "pan.___", state 1119, "(1)" - line 749, "pan.___", state 1136, "-end-" - (91 of 1136 states) -unreached in proctype urcu_writer - line 405, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 409, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 414, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 423, "pan.___", state 110, "(1)" - line 427, "pan.___", state 123, "(1)" - line 432, "pan.___", state 140, "(1)" - line 269, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 405, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 409, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 414, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 423, "pan.___", state 303, "(1)" - line 427, "pan.___", state 316, "(1)" - line 432, "pan.___", state 333, "(1)" - line 436, "pan.___", state 346, "(1)" - line 409, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 414, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 427, "pan.___", state 447, "(1)" - line 432, "pan.___", state 464, "(1)" - line 436, "pan.___", state 477, "(1)" - line 405, "pan.___", state 504, "cache_dirty_urcu_gp_ctr = 0" - line 405, "pan.___", state 506, "(1)" - line 405, "pan.___", state 507, "(cache_dirty_urcu_gp_ctr)" - line 405, "pan.___", state 507, "else" - line 405, "pan.___", state 510, "(1)" - line 409, "pan.___", state 518, "cache_dirty_urcu_active_readers = 0" - line 409, "pan.___", state 520, "(1)" - line 409, "pan.___", state 521, "(cache_dirty_urcu_active_readers)" - line 409, "pan.___", state 521, "else" - line 409, "pan.___", state 524, "(1)" - line 409, "pan.___", state 525, "(1)" - line 409, "pan.___", state 525, "(1)" - line 407, "pan.___", state 530, "((i<1))" - line 407, "pan.___", state 530, "((i>=1))" - line 414, "pan.___", state 536, "cache_dirty_rcu_ptr = 0" - line 414, "pan.___", state 538, "(1)" - line 414, "pan.___", state 539, "(cache_dirty_rcu_ptr)" - line 414, "pan.___", state 539, "else" - line 414, "pan.___", state 542, "(1)" - line 414, "pan.___", state 543, "(1)" - line 414, "pan.___", state 543, "(1)" - line 418, "pan.___", state 550, "cache_dirty_rcu_data[i] = 0" - line 418, "pan.___", state 552, "(1)" - line 418, "pan.___", state 553, "(cache_dirty_rcu_data[i])" - line 418, "pan.___", state 553, "else" - line 418, "pan.___", state 556, "(1)" - line 418, "pan.___", state 557, "(1)" - line 418, "pan.___", state 557, "(1)" - line 416, "pan.___", state 562, "((i<2))" - line 416, "pan.___", state 562, "((i>=2))" - line 423, "pan.___", state 569, "(1)" - line 423, "pan.___", state 570, "(!(cache_dirty_urcu_gp_ctr))" - line 423, "pan.___", state 570, "else" - line 423, "pan.___", state 573, "(1)" - line 423, "pan.___", state 574, "(1)" - line 423, "pan.___", state 574, "(1)" - line 427, "pan.___", state 582, "(1)" - line 427, "pan.___", state 583, "(!(cache_dirty_urcu_active_readers))" - line 427, "pan.___", state 583, "else" - line 427, "pan.___", state 586, "(1)" - line 427, "pan.___", state 587, "(1)" - line 427, "pan.___", state 587, "(1)" - line 425, "pan.___", state 592, "((i<1))" - line 425, "pan.___", state 592, "((i>=1))" - line 432, "pan.___", state 599, "(1)" - line 432, "pan.___", state 600, "(!(cache_dirty_rcu_ptr))" - line 432, "pan.___", state 600, "else" - line 432, "pan.___", state 603, "(1)" - line 432, "pan.___", state 604, "(1)" - line 432, "pan.___", state 604, "(1)" - line 436, "pan.___", state 612, "(1)" - line 436, "pan.___", state 613, "(!(cache_dirty_rcu_data[i]))" - line 436, "pan.___", state 613, "else" - line 436, "pan.___", state 616, "(1)" - line 436, "pan.___", state 617, "(1)" - line 436, "pan.___", state 617, "(1)" - line 444, "pan.___", state 626, "(1)" - line 444, "pan.___", state 626, "(1)" - line 409, "pan.___", state 646, "cache_dirty_urcu_active_readers = 0" - line 414, "pan.___", state 664, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 678, "cache_dirty_rcu_data[i] = 0" - line 427, "pan.___", state 710, "(1)" - line 432, "pan.___", state 727, "(1)" - line 436, "pan.___", state 740, "(1)" - line 409, "pan.___", state 775, "cache_dirty_urcu_active_readers = 0" - line 414, "pan.___", state 793, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 807, "cache_dirty_rcu_data[i] = 0" - line 427, "pan.___", state 839, "(1)" - line 432, "pan.___", state 856, "(1)" - line 436, "pan.___", state 869, "(1)" - line 409, "pan.___", state 906, "cache_dirty_urcu_active_readers = 0" - line 414, "pan.___", state 924, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 938, "cache_dirty_rcu_data[i] = 0" - line 427, "pan.___", state 970, "(1)" - line 432, "pan.___", state 987, "(1)" - line 436, "pan.___", state 1000, "(1)" - line 409, "pan.___", state 1040, "cache_dirty_urcu_active_readers = 0" - line 414, "pan.___", state 1058, "cache_dirty_rcu_ptr = 0" - line 418, "pan.___", state 1072, "cache_dirty_rcu_data[i] = 0" - line 427, "pan.___", state 1104, "(1)" - line 432, "pan.___", state 1121, "(1)" - line 436, "pan.___", state 1134, "(1)" - line 269, "pan.___", state 1180, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 1189, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1204, "(1)" - line 281, "pan.___", state 1211, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1227, "(1)" - line 250, "pan.___", state 1235, "(1)" - line 254, "pan.___", state 1247, "(1)" - line 258, "pan.___", state 1255, "(1)" - line 269, "pan.___", state 1286, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 1295, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1308, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 1317, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1333, "(1)" - line 250, "pan.___", state 1341, "(1)" - line 254, "pan.___", state 1353, "(1)" - line 258, "pan.___", state 1361, "(1)" - line 273, "pan.___", state 1387, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1400, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 1409, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1425, "(1)" - line 250, "pan.___", state 1433, "(1)" - line 254, "pan.___", state 1445, "(1)" - line 258, "pan.___", state 1453, "(1)" - line 269, "pan.___", state 1484, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 1493, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1506, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 1515, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1531, "(1)" - line 250, "pan.___", state 1539, "(1)" - line 254, "pan.___", state 1551, "(1)" - line 258, "pan.___", state 1559, "(1)" - line 1124, "pan.___", state 1575, "-end-" - (118 of 1575 states) -unreached in proctype :init: - (0 of 26 states) -unreached in proctype :never: - line 1187, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 67.7 seconds -pan: rate 3447.2308 states/second -pan: avg transition delay 1.5577e-06 usec -cp .input.spin urcu_progress_writer_error.spin.input -cp .input.spin.trail urcu_progress_writer_error.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input deleted file mode 100644 index 035bdf7..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,1158 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_OUT) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE - | READ_LOCK_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN - | READ_UNLOCK_OUT, 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT, /* post-dominant */ - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_OUT, /* RAW */ - READ_UNLOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - data_read_first[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index a8b0188..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,3959 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2739 -2:2:1136 -3:2:1141 -4:2:1145 -5:2:1153 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a/formal-model/urcu-controldataflow-alpha-ipi/.input.spin +++ /dev/null @@ -1,1339 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/DEFINES b/formal-model/urcu-controldataflow-alpha-ipi/DEFINES deleted file mode 100644 index 2681f69..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/DEFINES +++ /dev/null @@ -1,18 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow-alpha-ipi/Makefile b/formal-model/urcu-controldataflow-alpha-ipi/Makefile deleted file mode 100644 index cadd0aa..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 -DCOLLAPSE -#CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - #state-space over 14gb.. - #make urcu_progress_writer | tee urcu_progress_writer.log - #make urcu_progress_reader | tee urcu_progress_reader.log - #make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow-alpha-ipi/asserts.log b/formal-model/urcu-controldataflow-alpha-ipi/asserts.log deleted file mode 100644 index 6efa47c..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/asserts.log +++ /dev/null @@ -1,549 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 6176 States= 1e+06 Transitions= 1.77e+08 Memory= 497.600 t= 218 R= 5e+03 -Depth= 7720 States= 2e+06 Transitions= 3.71e+08 Memory= 528.654 t= 474 R= 4e+03 -Depth= 7720 States= 3e+06 Transitions= 5.8e+08 Memory= 561.955 t= 768 R= 4e+03 -pan: resizing hashtable to -w22.. done -Depth= 7720 States= 4e+06 Transitions= 7.6e+08 Memory= 627.549 t= 999 R= 4e+03 -Depth= 7720 States= 5e+06 Transitions= 9.44e+08 Memory= 662.217 t= 1.24e+03 R= 4e+03 -Depth= 7720 States= 6e+06 Transitions= 1.35e+09 Memory= 699.619 t= 1.79e+03 R= 3e+03 -Depth= 7720 States= 7e+06 Transitions= 1.79e+09 Memory= 735.361 t= 2.39e+03 R= 3e+03 -Depth= 7720 States= 8e+06 Transitions= 2.11e+09 Memory= 773.545 t= 2.83e+03 R= 3e+03 -Depth= 7720 States= 9e+06 Transitions= 2.49e+09 Memory= 811.143 t= 3.37e+03 R= 3e+03 -pan: resizing hashtable to -w24.. done -Depth= 7720 States= 1e+07 Transitions= 2.83e+09 Memory= 973.518 t= 3.8e+03 R= 3e+03 -Depth= 7720 States= 1.1e+07 Transitions= 3.2e+09 Memory= 1011.506 t= 4.27e+03 R= 3e+03 -Depth= 7720 States= 1.2e+07 Transitions= 3.59e+09 Memory= 1049.885 t= 4.78e+03 R= 3e+03 -Depth= 7720 States= 1.3e+07 Transitions= 3.81e+09 Memory= 1087.678 t= 5.06e+03 R= 3e+03 -Depth= 7720 States= 1.4e+07 Transitions= 4.12e+09 Memory= 1122.834 t= 5.46e+03 R= 3e+03 -Depth= 7720 States= 1.5e+07 Transitions= 4.35e+09 Memory= 1159.358 t= 5.75e+03 R= 3e+03 -Depth= 7720 States= 1.6e+07 Transitions= 4.88e+09 Memory= 1195.783 t= 6.46e+03 R= 2e+03 -Depth= 7720 States= 1.7e+07 Transitions= 5.67e+09 Memory= 1231.721 t= 7.51e+03 R= 2e+03 -Depth= 7720 States= 1.8e+07 Transitions= 6.31e+09 Memory= 1268.537 t= 8.37e+03 R= 2e+03 -Depth= 7720 States= 1.9e+07 Transitions= 6.77e+09 Memory= 1306.526 t= 8.98e+03 R= 2e+03 -Depth= 7720 States= 2e+07 Transitions= 7.09e+09 Memory= 1345.393 t= 9.41e+03 R= 2e+03 -Depth= 7720 States= 2.1e+07 Transitions= 7.48e+09 Memory= 1383.576 t= 9.93e+03 R= 2e+03 -Depth= 7720 States= 2.2e+07 Transitions= 7.94e+09 Memory= 1421.955 t= 1.06e+04 R= 2e+03 -Depth= 7720 States= 2.3e+07 Transitions= 8.37e+09 Memory= 1459.846 t= 1.11e+04 R= 2e+03 -Depth= 7720 States= 2.4e+07 Transitions= 8.77e+09 Memory= 1497.346 t= 1.17e+04 R= 2e+03 -Depth= 7720 States= 2.5e+07 Transitions= 9.22e+09 Memory= 1535.529 t= 1.23e+04 R= 2e+03 -Depth= 7720 States= 2.6e+07 Transitions= 9.48e+09 Memory= 1574.006 t= 1.26e+04 R= 2e+03 -Depth= 7720 States= 2.7e+07 Transitions= 9.85e+09 Memory= 1612.385 t= 1.31e+04 R= 2e+03 -Depth= 7720 States= 2.8e+07 Transitions= 1.02e+10 Memory= 1650.666 t= 1.37e+04 R= 2e+03 -Depth= 7940 States= 2.9e+07 Transitions= 1.06e+10 Memory= 1688.752 t= 1.41e+04 R= 2e+03 -Depth= 7998 States= 3e+07 Transitions= 1.09e+10 Memory= 1726.936 t= 1.46e+04 R= 2e+03 -Depth= 7998 States= 3.1e+07 Transitions= 1.13e+10 Memory= 1765.315 t= 1.51e+04 R= 2e+03 -Depth= 7998 States= 3.2e+07 Transitions= 1.16e+10 Memory= 1803.498 t= 1.55e+04 R= 2e+03 -Depth= 7998 States= 3.3e+07 Transitions= 1.19e+10 Memory= 1841.682 t= 1.6e+04 R= 2e+03 -Depth= 7998 States= 3.4e+07 Transitions= 1.23e+10 Memory= 1879.963 t= 1.65e+04 R= 2e+03 -pan: resizing hashtable to -w26.. done -Depth= 7998 States= 3.5e+07 Transitions= 1.26e+10 Memory= 2414.131 t= 1.69e+04 R= 2e+03 -Depth= 7998 States= 3.6e+07 Transitions= 1.29e+10 Memory= 2452.315 t= 1.73e+04 R= 2e+03 -Depth= 7998 States= 3.7e+07 Transitions= 1.32e+10 Memory= 2490.498 t= 1.77e+04 R= 2e+03 -Depth= 7998 States= 3.8e+07 Transitions= 1.35e+10 Memory= 2528.584 t= 1.82e+04 R= 2e+03 -Depth= 7998 States= 3.9e+07 Transitions= 1.39e+10 Memory= 2566.768 t= 1.86e+04 R= 2e+03 -Depth= 7998 States= 4e+07 Transitions= 1.41e+10 Memory= 2604.951 t= 1.89e+04 R= 2e+03 -Depth= 7998 States= 4.1e+07 Transitions= 1.44e+10 Memory= 2643.135 t= 1.93e+04 R= 2e+03 -Depth= 7998 States= 4.2e+07 Transitions= 1.48e+10 Memory= 2682.002 t= 1.98e+04 R= 2e+03 -Depth= 7998 States= 4.3e+07 Transitions= 1.51e+10 Memory= 2720.283 t= 2.03e+04 R= 2e+03 -Depth= 7998 States= 4.4e+07 Transitions= 1.56e+10 Memory= 2759.053 t= 2.09e+04 R= 2e+03 -Depth= 7998 States= 4.5e+07 Transitions= 1.59e+10 Memory= 2797.432 t= 2.13e+04 R= 2e+03 -Depth= 7998 States= 4.6e+07 Transitions= 1.64e+10 Memory= 2836.201 t= 2.19e+04 R= 2e+03 -Depth= 7998 States= 4.7e+07 Transitions= 1.68e+10 Memory= 2875.068 t= 2.24e+04 R= 2e+03 -Depth= 7998 States= 4.8e+07 Transitions= 1.72e+10 Memory= 2913.643 t= 2.29e+04 R= 2e+03 -Depth= 7998 States= 4.9e+07 Transitions= 1.76e+10 Memory= 2952.412 t= 2.34e+04 R= 2e+03 -Depth= 7998 States= 5e+07 Transitions= 1.78e+10 Memory= 2989.619 t= 2.38e+04 R= 2e+03 -Depth= 7998 States= 5.1e+07 Transitions= 1.81e+10 Memory= 3027.901 t= 2.42e+04 R= 2e+03 -Depth= 7998 States= 5.2e+07 Transitions= 1.84e+10 Memory= 3066.279 t= 2.46e+04 R= 2e+03 -Depth= 7998 States= 5.3e+07 Transitions= 1.87e+10 Memory= 3104.463 t= 2.49e+04 R= 2e+03 -Depth= 7998 States= 5.4e+07 Transitions= 1.93e+10 Memory= 3142.842 t= 2.57e+04 R= 2e+03 -Depth= 7998 States= 5.5e+07 Transitions= 2.01e+10 Memory= 3181.026 t= 2.68e+04 R= 2e+03 -Depth= 7998 States= 5.6e+07 Transitions= 2.07e+10 Memory= 3219.990 t= 2.76e+04 R= 2e+03 -Depth= 7998 States= 5.7e+07 Transitions= 2.11e+10 Memory= 3258.467 t= 2.82e+04 R= 2e+03 -Depth= 7998 States= 5.8e+07 Transitions= 2.15e+10 Memory= 3297.236 t= 2.87e+04 R= 2e+03 -Depth= 7998 States= 5.9e+07 Transitions= 2.18e+10 Memory= 3334.151 t= 2.91e+04 R= 2e+03 -Depth= 7998 States= 6e+07 Transitions= 2.22e+10 Memory= 3372.432 t= 2.97e+04 R= 2e+03 -Depth= 7998 States= 6.1e+07 Transitions= 2.27e+10 Memory= 3410.713 t= 3.03e+04 R= 2e+03 -Depth= 7998 States= 6.2e+07 Transitions= 2.32e+10 Memory= 3448.701 t= 3.09e+04 R= 2e+03 -Depth= 7998 States= 6.3e+07 Transitions= 2.35e+10 Memory= 3485.615 t= 3.15e+04 R= 2e+03 -Depth= 7998 States= 6.4e+07 Transitions= 2.38e+10 Memory= 3523.604 t= 3.19e+04 R= 2e+03 -Depth= 7998 States= 6.5e+07 Transitions= 2.42e+10 Memory= 3561.690 t= 3.23e+04 R= 2e+03 -Depth= 7998 States= 6.6e+07 Transitions= 2.46e+10 Memory= 3598.799 t= 3.28e+04 R= 2e+03 -Depth= 7998 States= 6.7e+07 Transitions= 2.49e+10 Memory= 3635.225 t= 3.33e+04 R= 2e+03 -Depth= 7998 States= 6.8e+07 Transitions= 2.53e+10 Memory= 3672.139 t= 3.38e+04 R= 2e+03 -Depth= 7998 States= 6.9e+07 Transitions= 2.56e+10 Memory= 3706.807 t= 3.42e+04 R= 2e+03 -Depth= 7998 States= 7e+07 Transitions= 2.59e+10 Memory= 3743.916 t= 3.47e+04 R= 2e+03 -Depth= 7998 States= 7.1e+07 Transitions= 2.62e+10 Memory= 3781.026 t= 3.51e+04 R= 2e+03 -Depth= 7998 States= 7.2e+07 Transitions= 2.66e+10 Memory= 3818.721 t= 3.56e+04 R= 2e+03 -Depth= 7998 States= 7.3e+07 Transitions= 2.68e+10 Memory= 3855.244 t= 3.59e+04 R= 2e+03 -Depth= 7998 States= 7.4e+07 Transitions= 2.72e+10 Memory= 3892.647 t= 3.64e+04 R= 2e+03 -Depth= 7998 States= 7.5e+07 Transitions= 2.76e+10 Memory= 3930.049 t= 3.69e+04 R= 2e+03 -Depth= 7998 States= 7.6e+07 Transitions= 2.78e+10 Memory= 3966.963 t= 3.72e+04 R= 2e+03 -Depth= 7998 States= 7.7e+07 Transitions= 2.81e+10 Memory= 4003.975 t= 3.77e+04 R= 2e+03 -Depth= 7998 States= 7.8e+07 Transitions= 2.84e+10 Memory= 4041.084 t= 3.8e+04 R= 2e+03 -Depth= 7998 States= 7.9e+07 Transitions= 2.87e+10 Memory= 4078.584 t= 3.84e+04 R= 2e+03 -Depth= 7998 States= 8e+07 Transitions= 2.91e+10 Memory= 4114.815 t= 3.9e+04 R= 2e+03 -Depth= 7998 States= 8.1e+07 Transitions= 2.95e+10 Memory= 4151.240 t= 3.95e+04 R= 2e+03 -Depth= 7998 States= 8.2e+07 Transitions= 2.99e+10 Memory= 4189.131 t= 4e+04 R= 2e+03 -Depth= 7998 States= 8.3e+07 Transitions= 3.03e+10 Memory= 4226.533 t= 4.06e+04 R= 2e+03 -Depth= 7998 States= 8.4e+07 Transitions= 3.07e+10 Memory= 4264.912 t= 4.11e+04 R= 2e+03 -Depth= 7998 States= 8.5e+07 Transitions= 3.11e+10 Memory= 4302.998 t= 4.16e+04 R= 2e+03 -Depth= 7998 States= 8.6e+07 Transitions= 3.15e+10 Memory= 4340.693 t= 4.21e+04 R= 2e+03 -Depth= 7998 States= 8.7e+07 Transitions= 3.19e+10 Memory= 4378.877 t= 4.27e+04 R= 2e+03 -Depth= 7998 States= 8.8e+07 Transitions= 3.23e+10 Memory= 4417.061 t= 4.32e+04 R= 2e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 72 byte, depth reached 7998, errors: 0 - 88716525 states, stored -3.2432758e+10 states, matched -3.2521475e+10 transitions (= stored+matched) -1.8325967e+11 atomic steps -hash conflicts: 1.7127982e+10 (resolved) - -Stats on memory usage (in Megabytes): - 8460.667 equivalent memory usage for states (stored*(State-vector + overhead)) - 3474.757 actual memory usage for states (compression: 41.07%) - state-vector as stored = 13 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 4444.111 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 606546 5194 3779 2 ] -unreached in proctype urcu_reader - line 267, ".input.spin", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 275, ".input.spin", state 79, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 88, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 104, "(1)" - line 248, ".input.spin", state 112, "(1)" - line 252, ".input.spin", state 124, "(1)" - line 256, ".input.spin", state 132, "(1)" - line 406, ".input.spin", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 190, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 204, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 223, "(1)" - line 433, ".input.spin", state 253, "(1)" - line 437, ".input.spin", state 266, "(1)" - line 686, ".input.spin", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 406, ".input.spin", state 294, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 326, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 340, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 359, "(1)" - line 433, ".input.spin", state 389, "(1)" - line 437, ".input.spin", state 402, "(1)" - line 406, ".input.spin", state 423, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 455, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 469, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 488, "(1)" - line 433, ".input.spin", state 518, "(1)" - line 437, ".input.spin", state 531, "(1)" - line 406, ".input.spin", state 554, "cache_dirty_urcu_gp_ctr = 0" - line 406, ".input.spin", state 556, "(1)" - line 406, ".input.spin", state 557, "(cache_dirty_urcu_gp_ctr)" - line 406, ".input.spin", state 557, "else" - line 406, ".input.spin", state 560, "(1)" - line 410, ".input.spin", state 568, "cache_dirty_urcu_active_readers = 0" - line 410, ".input.spin", state 570, "(1)" - line 410, ".input.spin", state 571, "(cache_dirty_urcu_active_readers)" - line 410, ".input.spin", state 571, "else" - line 410, ".input.spin", state 574, "(1)" - line 410, ".input.spin", state 575, "(1)" - line 410, ".input.spin", state 575, "(1)" - line 408, ".input.spin", state 580, "((i<1))" - line 408, ".input.spin", state 580, "((i>=1))" - line 415, ".input.spin", state 586, "cache_dirty_rcu_ptr = 0" - line 415, ".input.spin", state 588, "(1)" - line 415, ".input.spin", state 589, "(cache_dirty_rcu_ptr)" - line 415, ".input.spin", state 589, "else" - line 415, ".input.spin", state 592, "(1)" - line 415, ".input.spin", state 593, "(1)" - line 415, ".input.spin", state 593, "(1)" - line 419, ".input.spin", state 600, "cache_dirty_rcu_data[i] = 0" - line 419, ".input.spin", state 602, "(1)" - line 419, ".input.spin", state 603, "(cache_dirty_rcu_data[i])" - line 419, ".input.spin", state 603, "else" - line 419, ".input.spin", state 606, "(1)" - line 419, ".input.spin", state 607, "(1)" - line 419, ".input.spin", state 607, "(1)" - line 417, ".input.spin", state 612, "((i<2))" - line 417, ".input.spin", state 612, "((i>=2))" - line 424, ".input.spin", state 619, "(1)" - line 424, ".input.spin", state 620, "(!(cache_dirty_urcu_gp_ctr))" - line 424, ".input.spin", state 620, "else" - line 424, ".input.spin", state 623, "(1)" - line 424, ".input.spin", state 624, "(1)" - line 424, ".input.spin", state 624, "(1)" - line 428, ".input.spin", state 632, "(1)" - line 428, ".input.spin", state 633, "(!(cache_dirty_urcu_active_readers))" - line 428, ".input.spin", state 633, "else" - line 428, ".input.spin", state 636, "(1)" - line 428, ".input.spin", state 637, "(1)" - line 428, ".input.spin", state 637, "(1)" - line 426, ".input.spin", state 642, "((i<1))" - line 426, ".input.spin", state 642, "((i>=1))" - line 433, ".input.spin", state 649, "(1)" - line 433, ".input.spin", state 650, "(!(cache_dirty_rcu_ptr))" - line 433, ".input.spin", state 650, "else" - line 433, ".input.spin", state 653, "(1)" - line 433, ".input.spin", state 654, "(1)" - line 433, ".input.spin", state 654, "(1)" - line 437, ".input.spin", state 662, "(1)" - line 437, ".input.spin", state 663, "(!(cache_dirty_rcu_data[i]))" - line 437, ".input.spin", state 663, "else" - line 437, ".input.spin", state 666, "(1)" - line 437, ".input.spin", state 667, "(1)" - line 437, ".input.spin", state 667, "(1)" - line 435, ".input.spin", state 672, "((i<2))" - line 435, ".input.spin", state 672, "((i>=2))" - line 445, ".input.spin", state 676, "(1)" - line 445, ".input.spin", state 676, "(1)" - line 686, ".input.spin", state 679, "cached_urcu_active_readers = (tmp+1)" - line 686, ".input.spin", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 686, ".input.spin", state 681, "(1)" - line 406, ".input.spin", state 688, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 720, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 734, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 753, "(1)" - line 433, ".input.spin", state 783, "(1)" - line 437, ".input.spin", state 796, "(1)" - line 406, ".input.spin", state 824, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 856, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 870, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 889, "(1)" - line 433, ".input.spin", state 919, "(1)" - line 437, ".input.spin", state 932, "(1)" - line 406, ".input.spin", state 953, "cache_dirty_urcu_gp_ctr = 0" - line 406, ".input.spin", state 955, "(1)" - line 406, ".input.spin", state 956, "(cache_dirty_urcu_gp_ctr)" - line 406, ".input.spin", state 956, "else" - line 406, ".input.spin", state 959, "(1)" - line 410, ".input.spin", state 967, "cache_dirty_urcu_active_readers = 0" - line 410, ".input.spin", state 969, "(1)" - line 410, ".input.spin", state 970, "(cache_dirty_urcu_active_readers)" - line 410, ".input.spin", state 970, "else" - line 410, ".input.spin", state 973, "(1)" - line 410, ".input.spin", state 974, "(1)" - line 410, ".input.spin", state 974, "(1)" - line 408, ".input.spin", state 979, "((i<1))" - line 408, ".input.spin", state 979, "((i>=1))" - line 415, ".input.spin", state 985, "cache_dirty_rcu_ptr = 0" - line 415, ".input.spin", state 987, "(1)" - line 415, ".input.spin", state 988, "(cache_dirty_rcu_ptr)" - line 415, ".input.spin", state 988, "else" - line 415, ".input.spin", state 991, "(1)" - line 415, ".input.spin", state 992, "(1)" - line 415, ".input.spin", state 992, "(1)" - line 419, ".input.spin", state 999, "cache_dirty_rcu_data[i] = 0" - line 419, ".input.spin", state 1001, "(1)" - line 419, ".input.spin", state 1002, "(cache_dirty_rcu_data[i])" - line 419, ".input.spin", state 1002, "else" - line 419, ".input.spin", state 1005, "(1)" - line 419, ".input.spin", state 1006, "(1)" - line 419, ".input.spin", state 1006, "(1)" - line 417, ".input.spin", state 1011, "((i<2))" - line 417, ".input.spin", state 1011, "((i>=2))" - line 424, ".input.spin", state 1018, "(1)" - line 424, ".input.spin", state 1019, "(!(cache_dirty_urcu_gp_ctr))" - line 424, ".input.spin", state 1019, "else" - line 424, ".input.spin", state 1022, "(1)" - line 424, ".input.spin", state 1023, "(1)" - line 424, ".input.spin", state 1023, "(1)" - line 428, ".input.spin", state 1031, "(1)" - line 428, ".input.spin", state 1032, "(!(cache_dirty_urcu_active_readers))" - line 428, ".input.spin", state 1032, "else" - line 428, ".input.spin", state 1035, "(1)" - line 428, ".input.spin", state 1036, "(1)" - line 428, ".input.spin", state 1036, "(1)" - line 426, ".input.spin", state 1041, "((i<1))" - line 426, ".input.spin", state 1041, "((i>=1))" - line 433, ".input.spin", state 1048, "(1)" - line 433, ".input.spin", state 1049, "(!(cache_dirty_rcu_ptr))" - line 433, ".input.spin", state 1049, "else" - line 433, ".input.spin", state 1052, "(1)" - line 433, ".input.spin", state 1053, "(1)" - line 433, ".input.spin", state 1053, "(1)" - line 437, ".input.spin", state 1061, "(1)" - line 437, ".input.spin", state 1062, "(!(cache_dirty_rcu_data[i]))" - line 437, ".input.spin", state 1062, "else" - line 437, ".input.spin", state 1065, "(1)" - line 437, ".input.spin", state 1066, "(1)" - line 437, ".input.spin", state 1066, "(1)" - line 435, ".input.spin", state 1071, "((i<2))" - line 435, ".input.spin", state 1071, "((i>=2))" - line 445, ".input.spin", state 1075, "(1)" - line 445, ".input.spin", state 1075, "(1)" - line 694, ".input.spin", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 406, ".input.spin", state 1084, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 1116, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 1130, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 1149, "(1)" - line 433, ".input.spin", state 1179, "(1)" - line 437, ".input.spin", state 1192, "(1)" - line 406, ".input.spin", state 1216, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 1248, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 1262, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 1281, "(1)" - line 433, ".input.spin", state 1311, "(1)" - line 437, ".input.spin", state 1324, "(1)" - line 406, ".input.spin", state 1349, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 1381, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 1395, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 1414, "(1)" - line 433, ".input.spin", state 1444, "(1)" - line 437, ".input.spin", state 1457, "(1)" - line 406, ".input.spin", state 1478, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 1510, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 1524, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 1543, "(1)" - line 433, ".input.spin", state 1573, "(1)" - line 437, ".input.spin", state 1586, "(1)" - line 406, ".input.spin", state 1612, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 1644, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 1658, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 1677, "(1)" - line 433, ".input.spin", state 1707, "(1)" - line 437, ".input.spin", state 1720, "(1)" - line 406, ".input.spin", state 1741, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 1773, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 1787, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 1806, "(1)" - line 433, ".input.spin", state 1836, "(1)" - line 437, ".input.spin", state 1849, "(1)" - line 406, ".input.spin", state 1873, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 1905, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 1919, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 1938, "(1)" - line 433, ".input.spin", state 1968, "(1)" - line 437, ".input.spin", state 1981, "(1)" - line 733, ".input.spin", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 406, ".input.spin", state 2009, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 2041, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 2055, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 2074, "(1)" - line 433, ".input.spin", state 2104, "(1)" - line 437, ".input.spin", state 2117, "(1)" - line 406, ".input.spin", state 2138, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 2170, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 2184, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 2203, "(1)" - line 433, ".input.spin", state 2233, "(1)" - line 437, ".input.spin", state 2246, "(1)" - line 406, ".input.spin", state 2269, "cache_dirty_urcu_gp_ctr = 0" - line 406, ".input.spin", state 2271, "(1)" - line 406, ".input.spin", state 2272, "(cache_dirty_urcu_gp_ctr)" - line 406, ".input.spin", state 2272, "else" - line 406, ".input.spin", state 2275, "(1)" - line 410, ".input.spin", state 2283, "cache_dirty_urcu_active_readers = 0" - line 410, ".input.spin", state 2285, "(1)" - line 410, ".input.spin", state 2286, "(cache_dirty_urcu_active_readers)" - line 410, ".input.spin", state 2286, "else" - line 410, ".input.spin", state 2289, "(1)" - line 410, ".input.spin", state 2290, "(1)" - line 410, ".input.spin", state 2290, "(1)" - line 408, ".input.spin", state 2295, "((i<1))" - line 408, ".input.spin", state 2295, "((i>=1))" - line 415, ".input.spin", state 2301, "cache_dirty_rcu_ptr = 0" - line 415, ".input.spin", state 2303, "(1)" - line 415, ".input.spin", state 2304, "(cache_dirty_rcu_ptr)" - line 415, ".input.spin", state 2304, "else" - line 415, ".input.spin", state 2307, "(1)" - line 415, ".input.spin", state 2308, "(1)" - line 415, ".input.spin", state 2308, "(1)" - line 419, ".input.spin", state 2315, "cache_dirty_rcu_data[i] = 0" - line 419, ".input.spin", state 2317, "(1)" - line 419, ".input.spin", state 2318, "(cache_dirty_rcu_data[i])" - line 419, ".input.spin", state 2318, "else" - line 419, ".input.spin", state 2321, "(1)" - line 419, ".input.spin", state 2322, "(1)" - line 419, ".input.spin", state 2322, "(1)" - line 417, ".input.spin", state 2327, "((i<2))" - line 417, ".input.spin", state 2327, "((i>=2))" - line 424, ".input.spin", state 2334, "(1)" - line 424, ".input.spin", state 2335, "(!(cache_dirty_urcu_gp_ctr))" - line 424, ".input.spin", state 2335, "else" - line 424, ".input.spin", state 2338, "(1)" - line 424, ".input.spin", state 2339, "(1)" - line 424, ".input.spin", state 2339, "(1)" - line 428, ".input.spin", state 2347, "(1)" - line 428, ".input.spin", state 2348, "(!(cache_dirty_urcu_active_readers))" - line 428, ".input.spin", state 2348, "else" - line 428, ".input.spin", state 2351, "(1)" - line 428, ".input.spin", state 2352, "(1)" - line 428, ".input.spin", state 2352, "(1)" - line 426, ".input.spin", state 2357, "((i<1))" - line 426, ".input.spin", state 2357, "((i>=1))" - line 433, ".input.spin", state 2364, "(1)" - line 433, ".input.spin", state 2365, "(!(cache_dirty_rcu_ptr))" - line 433, ".input.spin", state 2365, "else" - line 433, ".input.spin", state 2368, "(1)" - line 433, ".input.spin", state 2369, "(1)" - line 433, ".input.spin", state 2369, "(1)" - line 437, ".input.spin", state 2377, "(1)" - line 437, ".input.spin", state 2378, "(!(cache_dirty_rcu_data[i]))" - line 437, ".input.spin", state 2378, "else" - line 437, ".input.spin", state 2381, "(1)" - line 437, ".input.spin", state 2382, "(1)" - line 437, ".input.spin", state 2382, "(1)" - line 435, ".input.spin", state 2387, "((i<2))" - line 435, ".input.spin", state 2387, "((i>=2))" - line 445, ".input.spin", state 2391, "(1)" - line 445, ".input.spin", state 2391, "(1)" - line 733, ".input.spin", state 2394, "cached_urcu_active_readers = (tmp+1)" - line 733, ".input.spin", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 733, ".input.spin", state 2396, "(1)" - line 406, ".input.spin", state 2403, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 2435, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 2449, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 2468, "(1)" - line 433, ".input.spin", state 2498, "(1)" - line 437, ".input.spin", state 2511, "(1)" - line 406, ".input.spin", state 2538, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 2570, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 2584, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 2603, "(1)" - line 433, ".input.spin", state 2633, "(1)" - line 437, ".input.spin", state 2646, "(1)" - line 406, ".input.spin", state 2667, "cache_dirty_urcu_gp_ctr = 0" - line 415, ".input.spin", state 2699, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 2713, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 2732, "(1)" - line 433, ".input.spin", state 2762, "(1)" - line 437, ".input.spin", state 2775, "(1)" - line 244, ".input.spin", state 2808, "(1)" - line 252, ".input.spin", state 2828, "(1)" - line 256, ".input.spin", state 2836, "(1)" - line 244, ".input.spin", state 2851, "(1)" - line 252, ".input.spin", state 2871, "(1)" - line 256, ".input.spin", state 2879, "(1)" - line 928, ".input.spin", state 2896, "-end-" - (245 of 2896 states) -unreached in proctype urcu_writer - line 406, ".input.spin", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 410, ".input.spin", state 59, "cache_dirty_urcu_active_readers = 0" - line 415, ".input.spin", state 77, "cache_dirty_rcu_ptr = 0" - line 424, ".input.spin", state 110, "(1)" - line 428, ".input.spin", state 123, "(1)" - line 433, ".input.spin", state 140, "(1)" - line 267, ".input.spin", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 185, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 198, "cache_dirty_rcu_ptr = 0" - line 406, ".input.spin", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 410, ".input.spin", state 252, "cache_dirty_urcu_active_readers = 0" - line 415, ".input.spin", state 270, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 284, "cache_dirty_rcu_data[i] = 0" - line 424, ".input.spin", state 303, "(1)" - line 428, ".input.spin", state 316, "(1)" - line 433, ".input.spin", state 333, "(1)" - line 437, ".input.spin", state 346, "(1)" - line 410, ".input.spin", state 383, "cache_dirty_urcu_active_readers = 0" - line 415, ".input.spin", state 401, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 415, "cache_dirty_rcu_data[i] = 0" - line 428, ".input.spin", state 447, "(1)" - line 433, ".input.spin", state 464, "(1)" - line 437, ".input.spin", state 477, "(1)" - line 410, ".input.spin", state 522, "cache_dirty_urcu_active_readers = 0" - line 415, ".input.spin", state 540, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 554, "cache_dirty_rcu_data[i] = 0" - line 428, ".input.spin", state 586, "(1)" - line 433, ".input.spin", state 603, "(1)" - line 437, ".input.spin", state 616, "(1)" - line 410, ".input.spin", state 651, "cache_dirty_urcu_active_readers = 0" - line 415, ".input.spin", state 669, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 683, "cache_dirty_rcu_data[i] = 0" - line 428, ".input.spin", state 715, "(1)" - line 433, ".input.spin", state 732, "(1)" - line 437, ".input.spin", state 745, "(1)" - line 410, ".input.spin", state 782, "cache_dirty_urcu_active_readers = 0" - line 415, ".input.spin", state 800, "cache_dirty_rcu_ptr = 0" - line 419, ".input.spin", state 814, "cache_dirty_rcu_data[i] = 0" - line 428, ".input.spin", state 846, "(1)" - line 433, ".input.spin", state 863, "(1)" - line 437, ".input.spin", state 876, "(1)" - line 267, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 940, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 955, "(1)" - line 279, ".input.spin", state 962, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 978, "(1)" - line 248, ".input.spin", state 986, "(1)" - line 252, ".input.spin", state 998, "(1)" - line 256, ".input.spin", state 1006, "(1)" - line 267, ".input.spin", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1046, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1059, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1068, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1084, "(1)" - line 248, ".input.spin", state 1092, "(1)" - line 252, ".input.spin", state 1104, "(1)" - line 256, ".input.spin", state 1112, "(1)" - line 271, ".input.spin", state 1138, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1151, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1160, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1176, "(1)" - line 248, ".input.spin", state 1184, "(1)" - line 252, ".input.spin", state 1196, "(1)" - line 256, ".input.spin", state 1204, "(1)" - line 267, ".input.spin", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1244, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1257, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1266, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1282, "(1)" - line 248, ".input.spin", state 1290, "(1)" - line 252, ".input.spin", state 1302, "(1)" - line 256, ".input.spin", state 1310, "(1)" - line 271, ".input.spin", state 1336, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1349, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1358, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1374, "(1)" - line 248, ".input.spin", state 1382, "(1)" - line 252, ".input.spin", state 1394, "(1)" - line 256, ".input.spin", state 1402, "(1)" - line 267, ".input.spin", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1442, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1455, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1464, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1480, "(1)" - line 248, ".input.spin", state 1488, "(1)" - line 252, ".input.spin", state 1500, "(1)" - line 256, ".input.spin", state 1508, "(1)" - line 271, ".input.spin", state 1534, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1547, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1556, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1572, "(1)" - line 248, ".input.spin", state 1580, "(1)" - line 252, ".input.spin", state 1592, "(1)" - line 256, ".input.spin", state 1600, "(1)" - line 267, ".input.spin", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 271, ".input.spin", state 1640, "cache_dirty_urcu_active_readers = 0" - line 275, ".input.spin", state 1653, "cache_dirty_rcu_ptr = 0" - line 279, ".input.spin", state 1662, "cache_dirty_rcu_data[i] = 0" - line 244, ".input.spin", state 1678, "(1)" - line 248, ".input.spin", state 1686, "(1)" - line 252, ".input.spin", state 1698, "(1)" - line 256, ".input.spin", state 1706, "(1)" - line 1303, ".input.spin", state 1722, "-end-" - (103 of 1722 states) -unreached in proctype :init: - (0 of 28 states) - -pan: elapsed time 4.35e+04 seconds -pan: rate 2039.1355 states/second -pan: avg transition delay 1.3378e-06 usec -cp .input.spin asserts.spin.input -cp .input.spin.trail asserts.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-ipi/asserts.spin.input b/formal-model/urcu-controldataflow-alpha-ipi/asserts.spin.input deleted file mode 100644 index ca70e6c..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/asserts.spin.input +++ /dev/null @@ -1,1339 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/references.txt b/formal-model/urcu-controldataflow-alpha-ipi/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu.sh b/formal-model/urcu-controldataflow-alpha-ipi/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu.spin b/formal-model/urcu-controldataflow-alpha-ipi/urcu.spin deleted file mode 100644 index 8075506..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu.spin +++ /dev/null @@ -1,1321 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.log b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.log deleted file mode 100644 index 6b6e98b..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.log +++ /dev/null @@ -1,560 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1361) -Depth= 8053 States= 1e+06 Transitions= 1.77e+08 Memory= 513.029 t= 265 R= 4e+03 -Depth= 9797 States= 2e+06 Transitions= 3.71e+08 Memory= 559.416 t= 575 R= 3e+03 -Depth= 9797 States= 3e+06 Transitions= 5.8e+08 Memory= 605.901 t= 922 R= 3e+03 -pan: resizing hashtable to -w22.. done -Depth= 9797 States= 4e+06 Transitions= 7.6e+08 Memory= 682.920 t= 1.2e+03 R= 3e+03 -Depth= 9797 States= 5e+06 Transitions= 9.44e+08 Memory= 728.721 t= 1.48e+03 R= 3e+03 -Depth= 9797 States= 6e+06 Transitions= 1.35e+09 Memory= 775.303 t= 2.13e+03 R= 3e+03 -Depth= 9797 States= 7e+06 Transitions= 1.79e+09 Memory= 821.885 t= 2.85e+03 R= 2e+03 -Depth= 9797 States= 8e+06 Transitions= 2.11e+09 Memory= 868.076 t= 3.36e+03 R= 2e+03 -Depth= 9797 States= 9e+06 Transitions= 2.49e+09 Memory= 914.658 t= 4.01e+03 R= 2e+03 -pan: resizing hashtable to -w24.. done -Depth= 9797 States= 1e+07 Transitions= 2.83e+09 Memory= 1085.529 t= 4.52e+03 R= 2e+03 -Depth= 9797 States= 1.1e+07 Transitions= 3.2e+09 Memory= 1132.697 t= 5.08e+03 R= 2e+03 -Depth= 9797 States= 1.2e+07 Transitions= 3.59e+09 Memory= 1179.670 t= 5.69e+03 R= 2e+03 -Depth= 9797 States= 1.3e+07 Transitions= 3.81e+09 Memory= 1226.838 t= 6.03e+03 R= 2e+03 -Depth= 9797 States= 1.4e+07 Transitions= 4.12e+09 Memory= 1273.029 t= 6.5e+03 R= 2e+03 -Depth= 9797 States= 1.5e+07 Transitions= 4.35e+09 Memory= 1319.123 t= 6.85e+03 R= 2e+03 -Depth= 9797 States= 1.6e+07 Transitions= 4.88e+09 Memory= 1365.608 t= 7.7e+03 R= 2e+03 -Depth= 9797 States= 1.7e+07 Transitions= 5.67e+09 Memory= 1411.506 t= 8.95e+03 R= 2e+03 -Depth= 9797 States= 1.8e+07 Transitions= 6.31e+09 Memory= 1458.479 t= 9.98e+03 R= 2e+03 -Depth= 9797 States= 1.9e+07 Transitions= 6.77e+09 Memory= 1504.963 t= 1.07e+04 R= 2e+03 -Depth= 9797 States= 2e+07 Transitions= 7.09e+09 Memory= 1552.131 t= 1.12e+04 R= 2e+03 -Depth= 9797 States= 2.1e+07 Transitions= 7.48e+09 Memory= 1598.615 t= 1.18e+04 R= 2e+03 -Depth= 9797 States= 2.2e+07 Transitions= 7.94e+09 Memory= 1645.295 t= 1.26e+04 R= 2e+03 -Depth= 9797 States= 2.3e+07 Transitions= 8.37e+09 Memory= 1691.486 t= 1.33e+04 R= 2e+03 -Depth= 9797 States= 2.4e+07 Transitions= 8.77e+09 Memory= 1737.678 t= 1.39e+04 R= 2e+03 -Depth= 9797 States= 2.5e+07 Transitions= 9.22e+09 Memory= 1783.967 t= 1.46e+04 R= 2e+03 -Depth= 9797 States= 2.6e+07 Transitions= 9.48e+09 Memory= 1830.061 t= 1.5e+04 R= 2e+03 -Depth= 9797 States= 2.7e+07 Transitions= 9.85e+09 Memory= 1876.350 t= 1.56e+04 R= 2e+03 -Depth= 9797 States= 2.8e+07 Transitions= 1.02e+10 Memory= 1922.639 t= 1.62e+04 R= 2e+03 -Depth= 9919 States= 2.9e+07 Transitions= 1.06e+10 Memory= 1968.537 t= 1.68e+04 R= 2e+03 -Depth= 9963 States= 3e+07 Transitions= 1.09e+10 Memory= 2014.338 t= 1.74e+04 R= 2e+03 -Depth= 9963 States= 3.1e+07 Transitions= 1.13e+10 Memory= 2060.334 t= 1.79e+04 R= 2e+03 -Depth= 9963 States= 3.2e+07 Transitions= 1.16e+10 Memory= 2106.233 t= 1.85e+04 R= 2e+03 -Depth= 9963 States= 3.3e+07 Transitions= 1.19e+10 Memory= 2152.033 t= 1.9e+04 R= 2e+03 -Depth= 9963 States= 3.4e+07 Transitions= 1.23e+10 Memory= 2198.029 t= 1.96e+04 R= 2e+03 -pan: resizing hashtable to -w26.. done -Depth= 9963 States= 3.5e+07 Transitions= 1.26e+10 Memory= 2739.912 t= 2e+04 R= 2e+03 -Depth= 9963 States= 3.6e+07 Transitions= 1.29e+10 Memory= 2785.713 t= 2.06e+04 R= 2e+03 -Depth= 9963 States= 3.7e+07 Transitions= 1.32e+10 Memory= 2831.416 t= 2.1e+04 R= 2e+03 -Depth= 9963 States= 3.8e+07 Transitions= 1.35e+10 Memory= 2877.217 t= 2.15e+04 R= 2e+03 -Depth= 9963 States= 3.9e+07 Transitions= 1.39e+10 Memory= 2923.018 t= 2.2e+04 R= 2e+03 -Depth= 9963 States= 4e+07 Transitions= 1.41e+10 Memory= 2968.818 t= 2.24e+04 R= 2e+03 -Depth= 9963 States= 4.1e+07 Transitions= 1.44e+10 Memory= 3014.717 t= 2.29e+04 R= 2e+03 -Depth= 9963 States= 4.2e+07 Transitions= 1.48e+10 Memory= 3061.299 t= 2.35e+04 R= 2e+03 -Depth= 9963 States= 4.3e+07 Transitions= 1.51e+10 Memory= 3107.295 t= 2.4e+04 R= 2e+03 -Depth= 9963 States= 4.4e+07 Transitions= 1.56e+10 Memory= 3153.779 t= 2.48e+04 R= 2e+03 -Depth= 9963 States= 4.5e+07 Transitions= 1.59e+10 Memory= 3199.873 t= 2.53e+04 R= 2e+03 -Depth= 9963 States= 4.6e+07 Transitions= 1.64e+10 Memory= 3246.553 t= 2.59e+04 R= 2e+03 -Depth= 9963 States= 4.7e+07 Transitions= 1.68e+10 Memory= 3293.623 t= 2.66e+04 R= 2e+03 -Depth= 9963 States= 4.8e+07 Transitions= 1.72e+10 Memory= 3339.912 t= 2.72e+04 R= 2e+03 -Depth= 9963 States= 4.9e+07 Transitions= 1.76e+10 Memory= 3386.494 t= 2.78e+04 R= 2e+03 -Depth= 9963 States= 5e+07 Transitions= 1.78e+10 Memory= 3433.076 t= 2.82e+04 R= 2e+03 -Depth= 9963 States= 5.1e+07 Transitions= 1.81e+10 Memory= 3479.072 t= 2.87e+04 R= 2e+03 -Depth= 9963 States= 5.2e+07 Transitions= 1.84e+10 Memory= 3525.068 t= 2.91e+04 R= 2e+03 -Depth= 9963 States= 5.3e+07 Transitions= 1.87e+10 Memory= 3570.869 t= 2.95e+04 R= 2e+03 -Depth= 9963 States= 5.4e+07 Transitions= 1.93e+10 Memory= 3616.865 t= 3.05e+04 R= 2e+03 -Depth= 9963 States= 5.5e+07 Transitions= 2.01e+10 Memory= 3662.764 t= 3.17e+04 R= 2e+03 -Depth= 9963 States= 5.6e+07 Transitions= 2.07e+10 Memory= 3709.541 t= 3.27e+04 R= 2e+03 -Depth= 9963 States= 5.7e+07 Transitions= 2.11e+10 Memory= 3755.635 t= 3.34e+04 R= 2e+03 -Depth= 9963 States= 5.8e+07 Transitions= 2.15e+10 Memory= 3802.315 t= 3.4e+04 R= 2e+03 -Depth= 9963 States= 5.9e+07 Transitions= 2.18e+10 Memory= 3848.408 t= 3.45e+04 R= 2e+03 -Depth= 9963 States= 6e+07 Transitions= 2.22e+10 Memory= 3894.404 t= 3.52e+04 R= 2e+03 -Depth= 9963 States= 6.1e+07 Transitions= 2.27e+10 Memory= 3940.596 t= 3.59e+04 R= 2e+03 -Depth= 9963 States= 6.2e+07 Transitions= 2.32e+10 Memory= 3986.494 t= 3.66e+04 R= 2e+03 -Depth= 9963 States= 6.3e+07 Transitions= 2.35e+10 Memory= 4032.295 t= 3.73e+04 R= 2e+03 -Depth= 9963 States= 6.4e+07 Transitions= 2.38e+10 Memory= 4078.193 t= 3.77e+04 R= 2e+03 -Depth= 9963 States= 6.5e+07 Transitions= 2.42e+10 Memory= 4124.092 t= 3.83e+04 R= 2e+03 -Depth= 9963 States= 6.6e+07 Transitions= 2.46e+10 Memory= 4169.990 t= 3.89e+04 R= 2e+03 -Depth= 9963 States= 6.7e+07 Transitions= 2.49e+10 Memory= 4215.791 t= 3.94e+04 R= 2e+03 -Depth= 9963 States= 6.8e+07 Transitions= 2.53e+10 Memory= 4261.494 t= 4e+04 R= 2e+03 -Depth= 9963 States= 6.9e+07 Transitions= 2.56e+10 Memory= 4307.295 t= 4.04e+04 R= 2e+03 -Depth= 9963 States= 7e+07 Transitions= 2.59e+10 Memory= 4353.096 t= 4.11e+04 R= 2e+03 -Depth= 9963 States= 7.1e+07 Transitions= 2.62e+10 Memory= 4398.897 t= 4.15e+04 R= 2e+03 -Depth= 9963 States= 7.2e+07 Transitions= 2.66e+10 Memory= 4444.697 t= 4.21e+04 R= 2e+03 -Depth= 9963 States= 7.3e+07 Transitions= 2.68e+10 Memory= 4490.498 t= 4.25e+04 R= 2e+03 -Depth= 9963 States= 7.4e+07 Transitions= 2.72e+10 Memory= 4536.299 t= 4.31e+04 R= 2e+03 -Depth= 9963 States= 7.5e+07 Transitions= 2.76e+10 Memory= 4582.002 t= 4.37e+04 R= 2e+03 -Depth= 9963 States= 7.6e+07 Transitions= 2.78e+10 Memory= 4627.803 t= 4.41e+04 R= 2e+03 -Depth= 9963 States= 7.7e+07 Transitions= 2.81e+10 Memory= 4673.604 t= 4.46e+04 R= 2e+03 -Depth= 9963 States= 7.8e+07 Transitions= 2.84e+10 Memory= 4719.404 t= 4.5e+04 R= 2e+03 -Depth= 9963 States= 7.9e+07 Transitions= 2.87e+10 Memory= 4765.205 t= 4.55e+04 R= 2e+03 -Depth= 9963 States= 8e+07 Transitions= 2.91e+10 Memory= 4811.006 t= 4.61e+04 R= 2e+03 -Depth= 9963 States= 8.1e+07 Transitions= 2.95e+10 Memory= 4856.807 t= 4.68e+04 R= 2e+03 -Depth= 9963 States= 8.2e+07 Transitions= 2.99e+10 Memory= 4902.608 t= 4.74e+04 R= 2e+03 -Depth= 9963 States= 8.3e+07 Transitions= 3.03e+10 Memory= 4948.701 t= 4.8e+04 R= 2e+03 -Depth= 9963 States= 8.4e+07 Transitions= 3.07e+10 Memory= 4995.283 t= 4.87e+04 R= 2e+03 -Depth= 9963 States= 8.5e+07 Transitions= 3.11e+10 Memory= 5041.084 t= 4.93e+04 R= 2e+03 -Depth= 9963 States= 8.6e+07 Transitions= 3.15e+10 Memory= 5087.276 t= 4.98e+04 R= 2e+03 -Depth= 9963 States= 8.7e+07 Transitions= 3.19e+10 Memory= 5133.369 t= 5.06e+04 R= 2e+03 -Depth= 9963 States= 8.8e+07 Transitions= 3.23e+10 Memory= 5179.170 t= 5.11e+04 R= 2e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 9963, errors: 0 - 88716525 states, stored -3.243293e+10 states, matched -3.2521646e+10 transitions (= stored+matched) -1.8325967e+11 atomic steps -hash conflicts: 1.7134961e+10 (resolved) - -Stats on memory usage (in Megabytes): - 9814.374 equivalent memory usage for states (stored*(State-vector + overhead)) - 4243.430 actual memory usage for states (compression: 43.24%) - state-vector as stored = 14 byte + 36 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 5212.276 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 606546 5194 3779 2 1 ] -unreached in proctype urcu_reader - line 267, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 275, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 104, "(1)" - line 248, "pan.___", state 112, "(1)" - line 252, "pan.___", state 124, "(1)" - line 256, "pan.___", state 132, "(1)" - line 406, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 223, "(1)" - line 433, "pan.___", state 253, "(1)" - line 437, "pan.___", state 266, "(1)" - line 686, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 406, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 359, "(1)" - line 433, "pan.___", state 389, "(1)" - line 437, "pan.___", state 402, "(1)" - line 406, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 488, "(1)" - line 433, "pan.___", state 518, "(1)" - line 437, "pan.___", state 531, "(1)" - line 406, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" - line 406, "pan.___", state 556, "(1)" - line 406, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" - line 406, "pan.___", state 557, "else" - line 406, "pan.___", state 560, "(1)" - line 410, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" - line 410, "pan.___", state 570, "(1)" - line 410, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" - line 410, "pan.___", state 571, "else" - line 410, "pan.___", state 574, "(1)" - line 410, "pan.___", state 575, "(1)" - line 410, "pan.___", state 575, "(1)" - line 408, "pan.___", state 580, "((i<1))" - line 408, "pan.___", state 580, "((i>=1))" - line 415, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" - line 415, "pan.___", state 588, "(1)" - line 415, "pan.___", state 589, "(cache_dirty_rcu_ptr)" - line 415, "pan.___", state 589, "else" - line 415, "pan.___", state 592, "(1)" - line 415, "pan.___", state 593, "(1)" - line 415, "pan.___", state 593, "(1)" - line 419, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" - line 419, "pan.___", state 602, "(1)" - line 419, "pan.___", state 603, "(cache_dirty_rcu_data[i])" - line 419, "pan.___", state 603, "else" - line 419, "pan.___", state 606, "(1)" - line 419, "pan.___", state 607, "(1)" - line 419, "pan.___", state 607, "(1)" - line 417, "pan.___", state 612, "((i<2))" - line 417, "pan.___", state 612, "((i>=2))" - line 424, "pan.___", state 619, "(1)" - line 424, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" - line 424, "pan.___", state 620, "else" - line 424, "pan.___", state 623, "(1)" - line 424, "pan.___", state 624, "(1)" - line 424, "pan.___", state 624, "(1)" - line 428, "pan.___", state 632, "(1)" - line 428, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" - line 428, "pan.___", state 633, "else" - line 428, "pan.___", state 636, "(1)" - line 428, "pan.___", state 637, "(1)" - line 428, "pan.___", state 637, "(1)" - line 426, "pan.___", state 642, "((i<1))" - line 426, "pan.___", state 642, "((i>=1))" - line 433, "pan.___", state 649, "(1)" - line 433, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" - line 433, "pan.___", state 650, "else" - line 433, "pan.___", state 653, "(1)" - line 433, "pan.___", state 654, "(1)" - line 433, "pan.___", state 654, "(1)" - line 437, "pan.___", state 662, "(1)" - line 437, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" - line 437, "pan.___", state 663, "else" - line 437, "pan.___", state 666, "(1)" - line 437, "pan.___", state 667, "(1)" - line 437, "pan.___", state 667, "(1)" - line 435, "pan.___", state 672, "((i<2))" - line 435, "pan.___", state 672, "((i>=2))" - line 445, "pan.___", state 676, "(1)" - line 445, "pan.___", state 676, "(1)" - line 686, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" - line 686, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 686, "pan.___", state 681, "(1)" - line 406, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 753, "(1)" - line 433, "pan.___", state 783, "(1)" - line 437, "pan.___", state 796, "(1)" - line 406, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 889, "(1)" - line 433, "pan.___", state 919, "(1)" - line 437, "pan.___", state 932, "(1)" - line 406, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" - line 406, "pan.___", state 955, "(1)" - line 406, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" - line 406, "pan.___", state 956, "else" - line 406, "pan.___", state 959, "(1)" - line 410, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" - line 410, "pan.___", state 969, "(1)" - line 410, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" - line 410, "pan.___", state 970, "else" - line 410, "pan.___", state 973, "(1)" - line 410, "pan.___", state 974, "(1)" - line 410, "pan.___", state 974, "(1)" - line 408, "pan.___", state 979, "((i<1))" - line 408, "pan.___", state 979, "((i>=1))" - line 415, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" - line 415, "pan.___", state 987, "(1)" - line 415, "pan.___", state 988, "(cache_dirty_rcu_ptr)" - line 415, "pan.___", state 988, "else" - line 415, "pan.___", state 991, "(1)" - line 415, "pan.___", state 992, "(1)" - line 415, "pan.___", state 992, "(1)" - line 419, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" - line 419, "pan.___", state 1001, "(1)" - line 419, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" - line 419, "pan.___", state 1002, "else" - line 419, "pan.___", state 1005, "(1)" - line 419, "pan.___", state 1006, "(1)" - line 419, "pan.___", state 1006, "(1)" - line 417, "pan.___", state 1011, "((i<2))" - line 417, "pan.___", state 1011, "((i>=2))" - line 424, "pan.___", state 1018, "(1)" - line 424, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" - line 424, "pan.___", state 1019, "else" - line 424, "pan.___", state 1022, "(1)" - line 424, "pan.___", state 1023, "(1)" - line 424, "pan.___", state 1023, "(1)" - line 428, "pan.___", state 1031, "(1)" - line 428, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" - line 428, "pan.___", state 1032, "else" - line 428, "pan.___", state 1035, "(1)" - line 428, "pan.___", state 1036, "(1)" - line 428, "pan.___", state 1036, "(1)" - line 426, "pan.___", state 1041, "((i<1))" - line 426, "pan.___", state 1041, "((i>=1))" - line 433, "pan.___", state 1048, "(1)" - line 433, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" - line 433, "pan.___", state 1049, "else" - line 433, "pan.___", state 1052, "(1)" - line 433, "pan.___", state 1053, "(1)" - line 433, "pan.___", state 1053, "(1)" - line 437, "pan.___", state 1061, "(1)" - line 437, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" - line 437, "pan.___", state 1062, "else" - line 437, "pan.___", state 1065, "(1)" - line 437, "pan.___", state 1066, "(1)" - line 437, "pan.___", state 1066, "(1)" - line 435, "pan.___", state 1071, "((i<2))" - line 435, "pan.___", state 1071, "((i>=2))" - line 445, "pan.___", state 1075, "(1)" - line 445, "pan.___", state 1075, "(1)" - line 694, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 406, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 1149, "(1)" - line 433, "pan.___", state 1179, "(1)" - line 437, "pan.___", state 1192, "(1)" - line 406, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 1281, "(1)" - line 433, "pan.___", state 1311, "(1)" - line 437, "pan.___", state 1324, "(1)" - line 406, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 1414, "(1)" - line 433, "pan.___", state 1444, "(1)" - line 437, "pan.___", state 1457, "(1)" - line 406, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 1543, "(1)" - line 433, "pan.___", state 1573, "(1)" - line 437, "pan.___", state 1586, "(1)" - line 406, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 1677, "(1)" - line 433, "pan.___", state 1707, "(1)" - line 437, "pan.___", state 1720, "(1)" - line 406, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 1806, "(1)" - line 433, "pan.___", state 1836, "(1)" - line 437, "pan.___", state 1849, "(1)" - line 406, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 1938, "(1)" - line 433, "pan.___", state 1968, "(1)" - line 437, "pan.___", state 1981, "(1)" - line 733, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 406, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 2074, "(1)" - line 433, "pan.___", state 2104, "(1)" - line 437, "pan.___", state 2117, "(1)" - line 406, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 2203, "(1)" - line 433, "pan.___", state 2233, "(1)" - line 437, "pan.___", state 2246, "(1)" - line 406, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" - line 406, "pan.___", state 2271, "(1)" - line 406, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" - line 406, "pan.___", state 2272, "else" - line 406, "pan.___", state 2275, "(1)" - line 410, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" - line 410, "pan.___", state 2285, "(1)" - line 410, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" - line 410, "pan.___", state 2286, "else" - line 410, "pan.___", state 2289, "(1)" - line 410, "pan.___", state 2290, "(1)" - line 410, "pan.___", state 2290, "(1)" - line 408, "pan.___", state 2295, "((i<1))" - line 408, "pan.___", state 2295, "((i>=1))" - line 415, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" - line 415, "pan.___", state 2303, "(1)" - line 415, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" - line 415, "pan.___", state 2304, "else" - line 415, "pan.___", state 2307, "(1)" - line 415, "pan.___", state 2308, "(1)" - line 415, "pan.___", state 2308, "(1)" - line 419, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" - line 419, "pan.___", state 2317, "(1)" - line 419, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" - line 419, "pan.___", state 2318, "else" - line 419, "pan.___", state 2321, "(1)" - line 419, "pan.___", state 2322, "(1)" - line 419, "pan.___", state 2322, "(1)" - line 417, "pan.___", state 2327, "((i<2))" - line 417, "pan.___", state 2327, "((i>=2))" - line 424, "pan.___", state 2334, "(1)" - line 424, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" - line 424, "pan.___", state 2335, "else" - line 424, "pan.___", state 2338, "(1)" - line 424, "pan.___", state 2339, "(1)" - line 424, "pan.___", state 2339, "(1)" - line 428, "pan.___", state 2347, "(1)" - line 428, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" - line 428, "pan.___", state 2348, "else" - line 428, "pan.___", state 2351, "(1)" - line 428, "pan.___", state 2352, "(1)" - line 428, "pan.___", state 2352, "(1)" - line 426, "pan.___", state 2357, "((i<1))" - line 426, "pan.___", state 2357, "((i>=1))" - line 433, "pan.___", state 2364, "(1)" - line 433, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" - line 433, "pan.___", state 2365, "else" - line 433, "pan.___", state 2368, "(1)" - line 433, "pan.___", state 2369, "(1)" - line 433, "pan.___", state 2369, "(1)" - line 437, "pan.___", state 2377, "(1)" - line 437, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" - line 437, "pan.___", state 2378, "else" - line 437, "pan.___", state 2381, "(1)" - line 437, "pan.___", state 2382, "(1)" - line 437, "pan.___", state 2382, "(1)" - line 435, "pan.___", state 2387, "((i<2))" - line 435, "pan.___", state 2387, "((i>=2))" - line 445, "pan.___", state 2391, "(1)" - line 445, "pan.___", state 2391, "(1)" - line 733, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" - line 733, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 733, "pan.___", state 2396, "(1)" - line 406, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 2468, "(1)" - line 433, "pan.___", state 2498, "(1)" - line 437, "pan.___", state 2511, "(1)" - line 406, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 2603, "(1)" - line 433, "pan.___", state 2633, "(1)" - line 437, "pan.___", state 2646, "(1)" - line 406, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" - line 415, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 2732, "(1)" - line 433, "pan.___", state 2762, "(1)" - line 437, "pan.___", state 2775, "(1)" - line 244, "pan.___", state 2808, "(1)" - line 252, "pan.___", state 2828, "(1)" - line 256, "pan.___", state 2836, "(1)" - line 244, "pan.___", state 2851, "(1)" - line 252, "pan.___", state 2871, "(1)" - line 256, "pan.___", state 2879, "(1)" - line 928, "pan.___", state 2896, "-end-" - (245 of 2896 states) -unreached in proctype urcu_writer - line 406, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 410, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 415, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 424, "pan.___", state 110, "(1)" - line 428, "pan.___", state 123, "(1)" - line 433, "pan.___", state 140, "(1)" - line 267, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 406, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 410, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 415, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 424, "pan.___", state 303, "(1)" - line 428, "pan.___", state 316, "(1)" - line 433, "pan.___", state 333, "(1)" - line 437, "pan.___", state 346, "(1)" - line 410, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 415, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 428, "pan.___", state 447, "(1)" - line 433, "pan.___", state 464, "(1)" - line 437, "pan.___", state 477, "(1)" - line 410, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" - line 415, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" - line 428, "pan.___", state 586, "(1)" - line 433, "pan.___", state 603, "(1)" - line 437, "pan.___", state 616, "(1)" - line 410, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" - line 415, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" - line 428, "pan.___", state 715, "(1)" - line 433, "pan.___", state 732, "(1)" - line 437, "pan.___", state 745, "(1)" - line 410, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" - line 415, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" - line 419, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" - line 428, "pan.___", state 846, "(1)" - line 433, "pan.___", state 863, "(1)" - line 437, "pan.___", state 876, "(1)" - line 267, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 955, "(1)" - line 279, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 978, "(1)" - line 248, "pan.___", state 986, "(1)" - line 252, "pan.___", state 998, "(1)" - line 256, "pan.___", state 1006, "(1)" - line 267, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1084, "(1)" - line 248, "pan.___", state 1092, "(1)" - line 252, "pan.___", state 1104, "(1)" - line 256, "pan.___", state 1112, "(1)" - line 271, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1176, "(1)" - line 248, "pan.___", state 1184, "(1)" - line 252, "pan.___", state 1196, "(1)" - line 256, "pan.___", state 1204, "(1)" - line 267, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1282, "(1)" - line 248, "pan.___", state 1290, "(1)" - line 252, "pan.___", state 1302, "(1)" - line 256, "pan.___", state 1310, "(1)" - line 271, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1374, "(1)" - line 248, "pan.___", state 1382, "(1)" - line 252, "pan.___", state 1394, "(1)" - line 256, "pan.___", state 1402, "(1)" - line 267, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1480, "(1)" - line 248, "pan.___", state 1488, "(1)" - line 252, "pan.___", state 1500, "(1)" - line 256, "pan.___", state 1508, "(1)" - line 271, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1572, "(1)" - line 248, "pan.___", state 1580, "(1)" - line 252, "pan.___", state 1592, "(1)" - line 256, "pan.___", state 1600, "(1)" - line 267, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 271, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" - line 275, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" - line 279, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" - line 244, "pan.___", state 1678, "(1)" - line 248, "pan.___", state 1686, "(1)" - line 252, "pan.___", state 1698, "(1)" - line 256, "pan.___", state 1706, "(1)" - line 1303, "pan.___", state 1722, "-end-" - (103 of 1722 states) -unreached in proctype :init: - (0 of 28 states) -unreached in proctype :never: - line 1366, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 5.15e+04 seconds -pan: rate 1721.7944 states/second -pan: avg transition delay 1.5843e-06 usec -cp .input.spin urcu_free.spin.input -cp .input.spin.trail urcu_free.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.ltl b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.spin.input b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.spin.input deleted file mode 100644 index ca70e6c..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free.spin.input +++ /dev/null @@ -1,1339 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_nested.define b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.define b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.log b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.log deleted file mode 100644 index fbb91fe..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.log +++ /dev/null @@ -1,824 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -Depth= 9193 States= 1e+06 Transitions= 2.02e+08 Memory= 513.615 t= 308 R= 3e+03 -Depth= 9193 States= 2e+06 Transitions= 4.02e+08 Memory= 560.100 t= 617 R= 3e+03 -pan: claim violated! (at depth 1482) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 9193, errors: 1 - 2638623 states, stored -5.0906949e+08 states, matched -5.1170812e+08 transitions (= stored+matched) -2.7495835e+09 atomic steps -hash conflicts: 3.3187407e+08 (resolved) - -Stats on memory usage (in Megabytes): - 291.901 equivalent memory usage for states (stored*(State-vector + overhead)) - 123.793 actual memory usage for states (compression: 42.41%) - state-vector as stored = 13 byte + 36 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 589.494 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 39337 2870 221 2 2 ] -unreached in proctype urcu_reader - line 894, "pan.___", state 12, "((i<1))" - line 894, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 61, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 83, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 92, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 108, "(1)" - line 249, "pan.___", state 116, "(1)" - line 253, "pan.___", state 128, "(1)" - line 257, "pan.___", state 136, "(1)" - line 407, "pan.___", state 162, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 194, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 208, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 227, "(1)" - line 434, "pan.___", state 257, "(1)" - line 438, "pan.___", state 270, "(1)" - line 696, "pan.___", state 291, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 407, "pan.___", state 298, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 330, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 344, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 363, "(1)" - line 434, "pan.___", state 393, "(1)" - line 438, "pan.___", state 406, "(1)" - line 407, "pan.___", state 427, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 459, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 473, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 492, "(1)" - line 434, "pan.___", state 522, "(1)" - line 438, "pan.___", state 535, "(1)" - line 407, "pan.___", state 558, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 560, "(1)" - line 407, "pan.___", state 561, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 561, "else" - line 407, "pan.___", state 564, "(1)" - line 411, "pan.___", state 572, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 574, "(1)" - line 411, "pan.___", state 575, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 575, "else" - line 411, "pan.___", state 578, "(1)" - line 411, "pan.___", state 579, "(1)" - line 411, "pan.___", state 579, "(1)" - line 409, "pan.___", state 584, "((i<1))" - line 409, "pan.___", state 584, "((i>=1))" - line 416, "pan.___", state 590, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 592, "(1)" - line 416, "pan.___", state 593, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 593, "else" - line 416, "pan.___", state 596, "(1)" - line 416, "pan.___", state 597, "(1)" - line 416, "pan.___", state 597, "(1)" - line 420, "pan.___", state 604, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 606, "(1)" - line 420, "pan.___", state 607, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 607, "else" - line 420, "pan.___", state 610, "(1)" - line 420, "pan.___", state 611, "(1)" - line 420, "pan.___", state 611, "(1)" - line 418, "pan.___", state 616, "((i<2))" - line 418, "pan.___", state 616, "((i>=2))" - line 425, "pan.___", state 623, "(1)" - line 425, "pan.___", state 624, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 624, "else" - line 425, "pan.___", state 627, "(1)" - line 425, "pan.___", state 628, "(1)" - line 425, "pan.___", state 628, "(1)" - line 429, "pan.___", state 636, "(1)" - line 429, "pan.___", state 637, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 637, "else" - line 429, "pan.___", state 640, "(1)" - line 429, "pan.___", state 641, "(1)" - line 429, "pan.___", state 641, "(1)" - line 427, "pan.___", state 646, "((i<1))" - line 427, "pan.___", state 646, "((i>=1))" - line 434, "pan.___", state 653, "(1)" - line 434, "pan.___", state 654, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 654, "else" - line 434, "pan.___", state 657, "(1)" - line 434, "pan.___", state 658, "(1)" - line 434, "pan.___", state 658, "(1)" - line 438, "pan.___", state 666, "(1)" - line 438, "pan.___", state 667, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 667, "else" - line 438, "pan.___", state 670, "(1)" - line 438, "pan.___", state 671, "(1)" - line 438, "pan.___", state 671, "(1)" - line 436, "pan.___", state 676, "((i<2))" - line 436, "pan.___", state 676, "((i>=2))" - line 446, "pan.___", state 680, "(1)" - line 446, "pan.___", state 680, "(1)" - line 696, "pan.___", state 683, "cached_urcu_active_readers = (tmp+1)" - line 696, "pan.___", state 684, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 696, "pan.___", state 685, "(1)" - line 407, "pan.___", state 692, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 724, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 738, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 757, "(1)" - line 434, "pan.___", state 787, "(1)" - line 438, "pan.___", state 800, "(1)" - line 407, "pan.___", state 828, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 860, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 874, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 893, "(1)" - line 434, "pan.___", state 923, "(1)" - line 438, "pan.___", state 936, "(1)" - line 407, "pan.___", state 957, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 959, "(1)" - line 407, "pan.___", state 960, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 960, "else" - line 407, "pan.___", state 963, "(1)" - line 411, "pan.___", state 971, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 973, "(1)" - line 411, "pan.___", state 974, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 974, "else" - line 411, "pan.___", state 977, "(1)" - line 411, "pan.___", state 978, "(1)" - line 411, "pan.___", state 978, "(1)" - line 409, "pan.___", state 983, "((i<1))" - line 409, "pan.___", state 983, "((i>=1))" - line 416, "pan.___", state 989, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 991, "(1)" - line 416, "pan.___", state 992, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 992, "else" - line 416, "pan.___", state 995, "(1)" - line 416, "pan.___", state 996, "(1)" - line 416, "pan.___", state 996, "(1)" - line 420, "pan.___", state 1003, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 1005, "(1)" - line 420, "pan.___", state 1006, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 1006, "else" - line 420, "pan.___", state 1009, "(1)" - line 420, "pan.___", state 1010, "(1)" - line 420, "pan.___", state 1010, "(1)" - line 418, "pan.___", state 1015, "((i<2))" - line 418, "pan.___", state 1015, "((i>=2))" - line 425, "pan.___", state 1022, "(1)" - line 425, "pan.___", state 1023, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 1023, "else" - line 425, "pan.___", state 1026, "(1)" - line 425, "pan.___", state 1027, "(1)" - line 425, "pan.___", state 1027, "(1)" - line 429, "pan.___", state 1035, "(1)" - line 429, "pan.___", state 1036, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 1036, "else" - line 429, "pan.___", state 1039, "(1)" - line 429, "pan.___", state 1040, "(1)" - line 429, "pan.___", state 1040, "(1)" - line 427, "pan.___", state 1045, "((i<1))" - line 427, "pan.___", state 1045, "((i>=1))" - line 434, "pan.___", state 1052, "(1)" - line 434, "pan.___", state 1053, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 1053, "else" - line 434, "pan.___", state 1056, "(1)" - line 434, "pan.___", state 1057, "(1)" - line 434, "pan.___", state 1057, "(1)" - line 438, "pan.___", state 1065, "(1)" - line 438, "pan.___", state 1066, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 1066, "else" - line 438, "pan.___", state 1069, "(1)" - line 438, "pan.___", state 1070, "(1)" - line 438, "pan.___", state 1070, "(1)" - line 436, "pan.___", state 1075, "((i<2))" - line 436, "pan.___", state 1075, "((i>=2))" - line 446, "pan.___", state 1079, "(1)" - line 446, "pan.___", state 1079, "(1)" - line 704, "pan.___", state 1083, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 407, "pan.___", state 1088, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1120, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1134, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1153, "(1)" - line 434, "pan.___", state 1183, "(1)" - line 438, "pan.___", state 1196, "(1)" - line 407, "pan.___", state 1220, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1252, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1285, "(1)" - line 434, "pan.___", state 1315, "(1)" - line 438, "pan.___", state 1328, "(1)" - line 407, "pan.___", state 1353, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1385, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1399, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1418, "(1)" - line 434, "pan.___", state 1448, "(1)" - line 438, "pan.___", state 1461, "(1)" - line 407, "pan.___", state 1482, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1514, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1528, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1547, "(1)" - line 434, "pan.___", state 1577, "(1)" - line 438, "pan.___", state 1590, "(1)" - line 407, "pan.___", state 1616, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1648, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1681, "(1)" - line 434, "pan.___", state 1711, "(1)" - line 438, "pan.___", state 1724, "(1)" - line 407, "pan.___", state 1745, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1777, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1791, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1810, "(1)" - line 434, "pan.___", state 1840, "(1)" - line 438, "pan.___", state 1853, "(1)" - line 407, "pan.___", state 1877, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1909, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1923, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1942, "(1)" - line 434, "pan.___", state 1972, "(1)" - line 438, "pan.___", state 1985, "(1)" - line 743, "pan.___", state 2006, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 407, "pan.___", state 2013, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2045, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2059, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2078, "(1)" - line 434, "pan.___", state 2108, "(1)" - line 438, "pan.___", state 2121, "(1)" - line 407, "pan.___", state 2142, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2174, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2188, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2207, "(1)" - line 434, "pan.___", state 2237, "(1)" - line 438, "pan.___", state 2250, "(1)" - line 407, "pan.___", state 2273, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 2275, "(1)" - line 407, "pan.___", state 2276, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 2276, "else" - line 407, "pan.___", state 2279, "(1)" - line 411, "pan.___", state 2287, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 2289, "(1)" - line 411, "pan.___", state 2290, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 2290, "else" - line 411, "pan.___", state 2293, "(1)" - line 411, "pan.___", state 2294, "(1)" - line 411, "pan.___", state 2294, "(1)" - line 409, "pan.___", state 2299, "((i<1))" - line 409, "pan.___", state 2299, "((i>=1))" - line 416, "pan.___", state 2305, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 2307, "(1)" - line 416, "pan.___", state 2308, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 2308, "else" - line 416, "pan.___", state 2311, "(1)" - line 416, "pan.___", state 2312, "(1)" - line 416, "pan.___", state 2312, "(1)" - line 420, "pan.___", state 2319, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 2321, "(1)" - line 420, "pan.___", state 2322, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 2322, "else" - line 420, "pan.___", state 2325, "(1)" - line 420, "pan.___", state 2326, "(1)" - line 420, "pan.___", state 2326, "(1)" - line 418, "pan.___", state 2331, "((i<2))" - line 418, "pan.___", state 2331, "((i>=2))" - line 425, "pan.___", state 2338, "(1)" - line 425, "pan.___", state 2339, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 2339, "else" - line 425, "pan.___", state 2342, "(1)" - line 425, "pan.___", state 2343, "(1)" - line 425, "pan.___", state 2343, "(1)" - line 429, "pan.___", state 2351, "(1)" - line 429, "pan.___", state 2352, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 2352, "else" - line 429, "pan.___", state 2355, "(1)" - line 429, "pan.___", state 2356, "(1)" - line 429, "pan.___", state 2356, "(1)" - line 427, "pan.___", state 2361, "((i<1))" - line 427, "pan.___", state 2361, "((i>=1))" - line 434, "pan.___", state 2368, "(1)" - line 434, "pan.___", state 2369, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 2369, "else" - line 434, "pan.___", state 2372, "(1)" - line 434, "pan.___", state 2373, "(1)" - line 434, "pan.___", state 2373, "(1)" - line 438, "pan.___", state 2381, "(1)" - line 438, "pan.___", state 2382, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 2382, "else" - line 438, "pan.___", state 2385, "(1)" - line 438, "pan.___", state 2386, "(1)" - line 438, "pan.___", state 2386, "(1)" - line 436, "pan.___", state 2391, "((i<2))" - line 436, "pan.___", state 2391, "((i>=2))" - line 446, "pan.___", state 2395, "(1)" - line 446, "pan.___", state 2395, "(1)" - line 743, "pan.___", state 2398, "cached_urcu_active_readers = (tmp+1)" - line 743, "pan.___", state 2399, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 743, "pan.___", state 2400, "(1)" - line 407, "pan.___", state 2407, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2439, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2453, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2472, "(1)" - line 434, "pan.___", state 2502, "(1)" - line 438, "pan.___", state 2515, "(1)" - line 407, "pan.___", state 2542, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2574, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2588, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2607, "(1)" - line 434, "pan.___", state 2637, "(1)" - line 438, "pan.___", state 2650, "(1)" - line 407, "pan.___", state 2671, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2703, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2717, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2736, "(1)" - line 434, "pan.___", state 2766, "(1)" - line 438, "pan.___", state 2779, "(1)" - line 245, "pan.___", state 2812, "(1)" - line 253, "pan.___", state 2832, "(1)" - line 257, "pan.___", state 2840, "(1)" - line 245, "pan.___", state 2855, "(1)" - line 253, "pan.___", state 2875, "(1)" - line 257, "pan.___", state 2883, "(1)" - line 929, "pan.___", state 2900, "-end-" - (246 of 2900 states) -unreached in proctype urcu_writer - line 1018, "pan.___", state 12, "((i<1))" - line 1018, "pan.___", state 12, "((i>=1))" - line 407, "pan.___", state 47, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 53, "(1)" - line 411, "pan.___", state 61, "cache_dirty_urcu_active_readers = 0" - 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line 416, "pan.___", state 409, "(1)" - line 416, "pan.___", state 410, "(1)" - line 416, "pan.___", state 410, "(1)" - line 420, "pan.___", state 417, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 423, "(1)" - line 420, "pan.___", state 424, "(1)" - line 420, "pan.___", state 424, "(1)" - line 418, "pan.___", state 429, "((i<2))" - line 418, "pan.___", state 429, "((i>=2))" - line 425, "pan.___", state 436, "(1)" - line 425, "pan.___", state 437, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 437, "else" - line 425, "pan.___", state 440, "(1)" - line 425, "pan.___", state 441, "(1)" - line 425, "pan.___", state 441, "(1)" - line 429, "pan.___", state 449, "(1)" - line 429, "pan.___", state 450, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 450, "else" - line 429, "pan.___", state 453, "(1)" - line 429, "pan.___", state 454, "(1)" - line 429, "pan.___", state 454, "(1)" - line 427, "pan.___", state 459, "((i<1))" - line 427, "pan.___", state 459, "((i>=1))" - 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line 411, "pan.___", state 530, "(1)" - line 411, "pan.___", state 531, "(1)" - line 411, "pan.___", state 531, "(1)" - line 409, "pan.___", state 536, "((i<1))" - line 409, "pan.___", state 536, "((i>=1))" - line 416, "pan.___", state 542, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 548, "(1)" - line 416, "pan.___", state 549, "(1)" - line 416, "pan.___", state 549, "(1)" - line 420, "pan.___", state 556, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 562, "(1)" - line 420, "pan.___", state 563, "(1)" - line 420, "pan.___", state 563, "(1)" - line 418, "pan.___", state 568, "((i<2))" - line 418, "pan.___", state 568, "((i>=2))" - line 425, "pan.___", state 575, "(1)" - line 425, "pan.___", state 576, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 576, "else" - line 425, "pan.___", state 579, "(1)" - line 425, "pan.___", state 580, "(1)" - line 425, "pan.___", state 580, "(1)" - line 429, "pan.___", state 588, "(1)" - line 429, "pan.___", state 589, "(!(cache_dirty_urcu_active_readers))" - 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line 425, "pan.___", state 704, "(1)" - line 429, "pan.___", state 717, "(1)" - line 434, "pan.___", state 734, "(1)" - line 438, "pan.___", state 747, "(1)" - line 411, "pan.___", state 784, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 802, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 816, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 848, "(1)" - line 434, "pan.___", state 865, "(1)" - line 438, "pan.___", state 878, "(1)" - line 1235, "pan.___", state 905, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" - line 268, "pan.___", state 933, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 935, "(1)" - line 272, "pan.___", state 942, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 944, "(1)" - line 272, "pan.___", state 945, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 945, "else" - line 270, "pan.___", state 950, "((i<1))" - line 270, "pan.___", state 950, "((i>=1))" - line 276, "pan.___", state 955, "cache_dirty_rcu_ptr = 0" - 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line 272, "pan.___", state 1249, "else" - line 270, "pan.___", state 1254, "((i<1))" - line 270, "pan.___", state 1254, "((i>=1))" - line 276, "pan.___", state 1259, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1261, "(1)" - line 276, "pan.___", state 1262, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1262, "else" - line 280, "pan.___", state 1268, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1270, "(1)" - line 280, "pan.___", state 1271, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1271, "else" - line 278, "pan.___", state 1276, "((i<2))" - line 278, "pan.___", state 1276, "((i>=2))" - line 245, "pan.___", state 1284, "(1)" - line 249, "pan.___", state 1292, "(1)" - line 249, "pan.___", state 1293, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1293, "else" - line 247, "pan.___", state 1298, "((i<1))" - line 247, "pan.___", state 1298, "((i>=1))" - line 253, "pan.___", state 1304, "(1)" - line 253, "pan.___", state 1305, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1305, "else" - line 257, "pan.___", state 1312, "(1)" - line 257, "pan.___", state 1313, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1313, "else" - line 262, "pan.___", state 1322, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1322, "else" - line 295, "pan.___", state 1324, "(cache_dirty_urcu_gp_ctr)" - line 295, "pan.___", state 1324, "else" - line 1293, "pan.___", state 1325, "(cache_dirty_urcu_gp_ctr)" - line 1293, "pan.___", state 1325, "else" - line 272, "pan.___", state 1338, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1351, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1360, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1376, "(1)" - line 249, "pan.___", state 1384, "(1)" - line 253, "pan.___", state 1396, "(1)" - line 257, "pan.___", state 1404, "(1)" - line 268, "pan.___", state 1435, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1444, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1457, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1466, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1482, "(1)" - line 249, "pan.___", state 1490, "(1)" - line 253, "pan.___", state 1502, "(1)" - line 257, "pan.___", state 1510, "(1)" - line 268, "pan.___", state 1527, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1529, "(1)" - line 272, "pan.___", state 1536, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1538, "(1)" - line 272, "pan.___", state 1539, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1539, "else" - line 270, "pan.___", state 1544, "((i<1))" - line 270, "pan.___", state 1544, "((i>=1))" - line 276, "pan.___", state 1549, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1551, "(1)" - line 276, "pan.___", state 1552, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1552, "else" - line 280, "pan.___", state 1558, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1560, "(1)" - line 280, "pan.___", state 1561, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1561, "else" - line 278, "pan.___", state 1566, "((i<2))" - line 278, "pan.___", state 1566, "((i>=2))" - line 245, "pan.___", state 1574, "(1)" - line 249, "pan.___", state 1582, "(1)" - line 249, "pan.___", state 1583, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1583, "else" - line 247, "pan.___", state 1588, "((i<1))" - line 247, "pan.___", state 1588, "((i>=1))" - line 253, "pan.___", state 1594, "(1)" - line 253, "pan.___", state 1595, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1595, "else" - line 257, "pan.___", state 1602, "(1)" - line 257, "pan.___", state 1603, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1603, "else" - line 262, "pan.___", state 1612, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1612, "else" - line 1300, "pan.___", state 1615, "i = 0" - line 1300, "pan.___", state 1617, "reader_barrier = 1" - line 1300, "pan.___", state 1628, "((i<1))" - line 1300, "pan.___", state 1628, "((i>=1))" - line 268, "pan.___", state 1633, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1635, "(1)" - line 272, "pan.___", state 1642, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1644, "(1)" - line 272, "pan.___", state 1645, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1645, "else" - line 270, "pan.___", state 1650, "((i<1))" - line 270, "pan.___", state 1650, "((i>=1))" - line 276, "pan.___", state 1655, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1657, "(1)" - line 276, "pan.___", state 1658, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1658, "else" - line 280, "pan.___", state 1664, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1666, "(1)" - line 280, "pan.___", state 1667, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1667, "else" - line 278, "pan.___", state 1672, "((i<2))" - line 278, "pan.___", state 1672, "((i>=2))" - line 245, "pan.___", state 1680, "(1)" - line 249, "pan.___", state 1688, "(1)" - line 249, "pan.___", state 1689, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1689, "else" - line 247, "pan.___", state 1694, "((i<1))" - line 247, "pan.___", state 1694, "((i>=1))" - line 253, "pan.___", state 1700, "(1)" - line 253, "pan.___", state 1701, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1701, "else" - line 257, "pan.___", state 1708, "(1)" - line 257, "pan.___", state 1709, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1709, "else" - line 262, "pan.___", state 1718, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1718, "else" - line 295, "pan.___", state 1720, "(cache_dirty_urcu_gp_ctr)" - line 295, "pan.___", state 1720, "else" - line 1300, "pan.___", state 1721, "(cache_dirty_urcu_gp_ctr)" - line 1300, "pan.___", state 1721, "else" - line 1304, "pan.___", state 1724, "-end-" - (312 of 1724 states) -unreached in proctype :init: - line 1319, "pan.___", state 13, "((i<1))" - line 1319, "pan.___", state 13, "((i>=1))" - (1 of 28 states) -unreached in proctype :never: - line 1367, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 792 seconds -pan: rate 3330.8797 states/second -pan: avg transition delay 1.5481e-06 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input deleted file mode 100644 index b35bf7b..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,1340 +0,0 @@ -#define NO_MB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 915575e..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,1485 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4654 -2:2:2900 -3:2:2905 -4:2:2909 -5:2:2917 -6:2:2921 -7:2:2925 -8:0:4654 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mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.log b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.log deleted file mode 100644 index 91e8666..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.log +++ /dev/null @@ -1,540 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -Depth= 8300 States= 1e+06 Transitions= 1.86e+08 Memory= 513.029 t= 280 R= 4e+03 -Depth= 10044 States= 2e+06 Transitions= 3.84e+08 Memory= 559.221 t= 594 R= 3e+03 -Depth= 10044 States= 3e+06 Transitions= 6.04e+08 Memory= 605.803 t= 964 R= 3e+03 -pan: resizing hashtable to -w22.. done -Depth= 10044 States= 4e+06 Transitions= 8.01e+08 Memory= 682.920 t= 1.27e+03 R= 3e+03 -Depth= 10044 States= 5e+06 Transitions= 9.95e+08 Memory= 728.721 t= 1.57e+03 R= 3e+03 -Depth= 10044 States= 6e+06 Transitions= 1.26e+09 Memory= 775.010 t= 1.99e+03 R= 3e+03 -Depth= 10044 States= 7e+06 Transitions= 1.79e+09 Memory= 821.592 t= 2.89e+03 R= 2e+03 -Depth= 10044 States= 8e+06 Transitions= 2.16e+09 Memory= 867.979 t= 3.5e+03 R= 2e+03 -Depth= 10044 States= 9e+06 Transitions= 2.51e+09 Memory= 914.072 t= 4.1e+03 R= 2e+03 -pan: resizing hashtable to -w24.. done -Depth= 10044 States= 1e+07 Transitions= 2.87e+09 Memory= 1085.334 t= 4.67e+03 R= 2e+03 -Depth= 10044 States= 1.1e+07 Transitions= 3.27e+09 Memory= 1132.404 t= 5.29e+03 R= 2e+03 -Depth= 10044 States= 1.2e+07 Transitions= 3.66e+09 Memory= 1179.377 t= 5.91e+03 R= 2e+03 -pan: claim violated! (at depth 1680) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 10044, errors: 1 - 12387044 states, stored -3.7683983e+09 states, matched -3.7807853e+09 transitions (= stored+matched) -2.0718621e+10 atomic steps -hash conflicts: 2.2091218e+09 (resolved) - -Stats on memory usage (in Megabytes): - 1370.332 equivalent memory usage for states (stored*(State-vector + overhead)) - 612.258 actual memory usage for states (compression: 44.68%) - state-vector as stored = 16 byte + 36 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1197.736 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 166228 1420 961 2 2 ] -unreached in proctype urcu_reader - line 894, "pan.___", state 12, "((i<1))" - line 894, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 104, "(1)" - line 249, "pan.___", state 112, "(1)" - line 253, "pan.___", state 124, "(1)" - line 257, "pan.___", state 132, "(1)" - line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 223, "(1)" - line 434, "pan.___", state 253, "(1)" - line 438, "pan.___", state 266, "(1)" - line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 359, "(1)" - line 434, "pan.___", state 389, "(1)" - line 438, "pan.___", state 402, "(1)" - line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 488, "(1)" - line 434, "pan.___", state 518, "(1)" - line 438, "pan.___", state 531, "(1)" - line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 556, "(1)" - line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 557, "else" - line 407, "pan.___", state 560, "(1)" - line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 570, "(1)" - line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 571, "else" - line 411, "pan.___", state 574, "(1)" - line 411, "pan.___", state 575, "(1)" - line 411, "pan.___", state 575, "(1)" - line 409, "pan.___", state 580, "((i<1))" - line 409, "pan.___", state 580, "((i>=1))" - line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 588, "(1)" - line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 589, "else" - line 416, "pan.___", state 592, "(1)" - line 416, "pan.___", state 593, "(1)" - line 416, "pan.___", state 593, "(1)" - line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 602, "(1)" - line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 603, "else" - line 420, "pan.___", state 606, "(1)" - line 420, "pan.___", state 607, "(1)" - line 420, "pan.___", state 607, "(1)" - line 418, "pan.___", state 612, "((i<2))" - line 418, "pan.___", state 612, "((i>=2))" - line 425, "pan.___", state 619, "(1)" - line 425, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 620, "else" - line 425, "pan.___", state 623, "(1)" - line 425, "pan.___", state 624, "(1)" - line 425, "pan.___", state 624, "(1)" - line 429, "pan.___", state 632, "(1)" - line 429, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 633, "else" - line 429, "pan.___", state 636, "(1)" - line 429, "pan.___", state 637, "(1)" - line 429, "pan.___", state 637, "(1)" - line 427, "pan.___", state 642, "((i<1))" - line 427, "pan.___", state 642, "((i>=1))" - line 434, "pan.___", state 649, "(1)" - line 434, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 650, "else" - line 434, "pan.___", state 653, "(1)" - line 434, "pan.___", state 654, "(1)" - line 434, "pan.___", state 654, "(1)" - line 438, "pan.___", state 662, "(1)" - line 438, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 663, "else" - line 438, "pan.___", state 666, "(1)" - line 438, "pan.___", state 667, "(1)" - line 438, "pan.___", state 667, "(1)" - line 436, "pan.___", state 672, "((i<2))" - line 436, "pan.___", state 672, "((i>=2))" - line 446, "pan.___", state 676, "(1)" - line 446, "pan.___", state 676, "(1)" - line 687, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" - line 687, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 687, "pan.___", state 681, "(1)" - line 407, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 753, "(1)" - line 434, "pan.___", state 783, "(1)" - line 438, "pan.___", state 796, "(1)" - line 407, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 889, "(1)" - line 434, "pan.___", state 919, "(1)" - line 438, "pan.___", state 932, "(1)" - line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 955, "(1)" - line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 956, "else" - line 407, "pan.___", state 959, "(1)" - line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 969, "(1)" - line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 970, "else" - line 411, "pan.___", state 973, "(1)" - line 411, "pan.___", state 974, "(1)" - line 411, "pan.___", state 974, "(1)" - line 409, "pan.___", state 979, "((i<1))" - line 409, "pan.___", state 979, "((i>=1))" - line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 987, "(1)" - line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 988, "else" - line 416, "pan.___", state 991, "(1)" - line 416, "pan.___", state 992, "(1)" - line 416, "pan.___", state 992, "(1)" - line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 1001, "(1)" - line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 1002, "else" - line 420, "pan.___", state 1005, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 418, "pan.___", state 1011, "((i<2))" - line 418, "pan.___", state 1011, "((i>=2))" - line 425, "pan.___", state 1018, "(1)" - line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 1019, "else" - line 425, "pan.___", state 1022, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 429, "pan.___", state 1031, "(1)" - line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 1032, "else" - line 429, "pan.___", state 1035, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 427, "pan.___", state 1041, "((i<1))" - line 427, "pan.___", state 1041, "((i>=1))" - line 434, "pan.___", state 1048, "(1)" - line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 1049, "else" - line 434, "pan.___", state 1052, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 438, "pan.___", state 1061, "(1)" - line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 1062, "else" - line 438, "pan.___", state 1065, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 436, "pan.___", state 1071, "((i<2))" - line 436, "pan.___", state 1071, "((i>=2))" - line 446, "pan.___", state 1075, "(1)" - line 446, "pan.___", state 1075, "(1)" - line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1149, "(1)" - line 434, "pan.___", state 1179, "(1)" - line 438, "pan.___", state 1192, "(1)" - line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1281, "(1)" - line 434, "pan.___", state 1311, "(1)" - line 438, "pan.___", state 1324, "(1)" - line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1414, "(1)" - line 434, "pan.___", state 1444, "(1)" - line 438, "pan.___", state 1457, "(1)" - line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1543, "(1)" - line 434, "pan.___", state 1573, "(1)" - line 438, "pan.___", state 1586, "(1)" - line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1677, "(1)" - line 434, "pan.___", state 1707, "(1)" - line 438, "pan.___", state 1720, "(1)" - line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1806, "(1)" - line 434, "pan.___", state 1836, "(1)" - line 438, "pan.___", state 1849, "(1)" - line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1938, "(1)" - line 434, "pan.___", state 1968, "(1)" - line 438, "pan.___", state 1981, "(1)" - line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2074, "(1)" - line 434, "pan.___", state 2104, "(1)" - line 438, "pan.___", state 2117, "(1)" - line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2203, "(1)" - line 434, "pan.___", state 2233, "(1)" - line 438, "pan.___", state 2246, "(1)" - line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 2271, "(1)" - line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 2272, "else" - line 407, "pan.___", state 2275, "(1)" - line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 2286, "else" - line 411, "pan.___", state 2289, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 409, "pan.___", state 2295, "((i<1))" - line 409, "pan.___", state 2295, "((i>=1))" - line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 2303, "(1)" - line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 2304, "else" - line 416, "pan.___", state 2307, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 2317, "(1)" - line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 2318, "else" - line 420, "pan.___", state 2321, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 418, "pan.___", state 2327, "((i<2))" - line 418, "pan.___", state 2327, "((i>=2))" - line 425, "pan.___", state 2334, "(1)" - line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 2335, "else" - line 425, "pan.___", state 2338, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 429, "pan.___", state 2347, "(1)" - line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 2348, "else" - line 429, "pan.___", state 2351, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 427, "pan.___", state 2357, "((i<1))" - line 427, "pan.___", state 2357, "((i>=1))" - line 434, "pan.___", state 2364, "(1)" - line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 2365, "else" - line 434, "pan.___", state 2368, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 438, "pan.___", state 2377, "(1)" - line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 2378, "else" - line 438, "pan.___", state 2381, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 436, "pan.___", state 2387, "((i<2))" - line 436, "pan.___", state 2387, "((i>=2))" - line 446, "pan.___", state 2391, "(1)" - line 446, "pan.___", state 2391, "(1)" - line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" - line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 734, "pan.___", state 2396, "(1)" - line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2468, "(1)" - line 434, "pan.___", state 2498, "(1)" - line 438, "pan.___", state 2511, "(1)" - line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2603, "(1)" - line 434, "pan.___", state 2633, "(1)" - line 438, "pan.___", state 2646, "(1)" - line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2732, "(1)" - line 434, "pan.___", state 2762, "(1)" - line 438, "pan.___", state 2775, "(1)" - line 407, "pan.___", state 2808, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2840, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2854, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2873, "(1)" - line 434, "pan.___", state 2903, "(1)" - line 438, "pan.___", state 2916, "(1)" - line 407, "pan.___", state 2935, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2967, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2981, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 3000, "(1)" - line 434, "pan.___", state 3030, "(1)" - line 438, "pan.___", state 3043, "(1)" - line 929, "pan.___", state 3064, "-end-" - (252 of 3064 states) -unreached in proctype urcu_writer - line 1018, "pan.___", state 12, "((i<1))" - line 1018, "pan.___", state 12, "((i>=1))" - line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 51, "(1)" - line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 65, "(1)" - line 411, "pan.___", state 66, "(1)" - line 411, "pan.___", state 66, "(1)" - line 409, "pan.___", state 71, "((i<1))" - line 409, "pan.___", state 71, "((i>=1))" - line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 83, "(1)" - line 416, "pan.___", state 84, "(1)" - line 416, "pan.___", state 84, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 98, "(1)" - line 420, "pan.___", state 98, "(1)" - line 418, "pan.___", state 103, "((i<2))" - line 418, "pan.___", state 103, "((i>=2))" - line 425, "pan.___", state 110, "(1)" - line 425, "pan.___", state 111, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 111, "else" - line 425, "pan.___", state 114, "(1)" - line 425, "pan.___", state 115, "(1)" - line 425, "pan.___", state 115, "(1)" - line 429, "pan.___", state 123, "(1)" - line 429, "pan.___", state 124, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 124, "else" - line 429, "pan.___", state 127, "(1)" - line 429, "pan.___", state 128, "(1)" - line 429, "pan.___", state 128, "(1)" - line 427, "pan.___", state 133, "((i<1))" - line 427, "pan.___", state 133, "((i>=1))" - line 434, "pan.___", state 140, "(1)" - line 434, "pan.___", state 141, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 141, "else" - line 434, "pan.___", state 144, "(1)" - line 434, "pan.___", state 145, "(1)" - line 434, "pan.___", state 145, "(1)" - line 438, "pan.___", state 153, "(1)" - line 438, "pan.___", state 154, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 154, "else" - line 438, "pan.___", state 157, "(1)" - line 438, "pan.___", state 158, "(1)" - line 438, "pan.___", state 158, "(1)" - line 436, "pan.___", state 163, "((i<2))" - line 436, "pan.___", state 163, "((i>=2))" - line 446, "pan.___", state 167, "(1)" - line 446, "pan.___", state 167, "(1)" - line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" - line 407, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 303, "(1)" - line 429, "pan.___", state 316, "(1)" - line 434, "pan.___", state 333, "(1)" - line 438, "pan.___", state 346, "(1)" - line 411, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 447, "(1)" - line 434, "pan.___", state 464, "(1)" - line 438, "pan.___", state 477, "(1)" - line 411, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 586, "(1)" - line 434, "pan.___", state 603, "(1)" - line 438, "pan.___", state 616, "(1)" - line 411, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 715, "(1)" - line 434, "pan.___", state 732, "(1)" - line 438, "pan.___", state 745, "(1)" - line 411, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 846, "(1)" - line 434, "pan.___", state 863, "(1)" - line 438, "pan.___", state 876, "(1)" - line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 955, "(1)" - line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 978, "(1)" - line 249, "pan.___", state 986, "(1)" - line 253, "pan.___", state 998, "(1)" - line 257, "pan.___", state 1006, "(1)" - line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1084, "(1)" - line 249, "pan.___", state 1092, "(1)" - line 253, "pan.___", state 1104, "(1)" - line 257, "pan.___", state 1112, "(1)" - line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1176, "(1)" - line 249, "pan.___", state 1184, "(1)" - line 253, "pan.___", state 1196, "(1)" - line 257, "pan.___", state 1204, "(1)" - line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1282, "(1)" - line 249, "pan.___", state 1290, "(1)" - line 253, "pan.___", state 1302, "(1)" - line 257, "pan.___", state 1310, "(1)" - line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1374, "(1)" - line 249, "pan.___", state 1382, "(1)" - line 253, "pan.___", state 1394, "(1)" - line 257, "pan.___", state 1402, "(1)" - line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1480, "(1)" - line 249, "pan.___", state 1488, "(1)" - line 253, "pan.___", state 1500, "(1)" - line 257, "pan.___", state 1508, "(1)" - line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1572, "(1)" - line 249, "pan.___", state 1580, "(1)" - line 253, "pan.___", state 1592, "(1)" - line 257, "pan.___", state 1600, "(1)" - line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1678, "(1)" - line 249, "pan.___", state 1686, "(1)" - line 253, "pan.___", state 1698, "(1)" - line 257, "pan.___", state 1706, "(1)" - line 1304, "pan.___", state 1722, "-end-" - (129 of 1722 states) -unreached in proctype :init: - line 1319, "pan.___", state 13, "((i<1))" - line 1319, "pan.___", state 13, "((i>=1))" - (1 of 28 states) -unreached in proctype :never: - line 1367, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 6.09e+03 seconds -pan: rate 2033.9606 states/second -pan: avg transition delay 1.6108e-06 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input deleted file mode 100644 index cf50dff..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,1340 +0,0 @@ -#define NO_RMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index d5ed67a..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1683 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4816 -2:2:3064 -3:2:3069 -4:2:3073 -5:2:3081 -6:2:3085 -7:2:3089 -8:0:4816 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-1663:1:2898 -1664:1:2899 -1665:1:2910 -1666:1:2911 -1667:1:2912 -1668:1:2910 -1669:1:2918 -1670:1:2919 -1671:1:2923 -1672:1:2927 -1673:0:4816 -1674:2:4086 -1675:0:4816 -1676:1:1342 -1677:1:1343 -1678:0:4814 -1679:1:42 -1680:0:4820 -1681:1:2421 diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.log b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.log deleted file mode 100644 index 7da250d..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.log +++ /dev/null @@ -1,580 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -Depth= 8002 States= 1e+06 Transitions= 1.77e+08 Memory= 513.029 t= 264 R= 4e+03 -Depth= 9746 States= 2e+06 Transitions= 3.71e+08 Memory= 559.318 t= 570 R= 4e+03 -Depth= 9746 States= 3e+06 Transitions= 5.8e+08 Memory= 605.901 t= 916 R= 3e+03 -pan: resizing hashtable to -w22.. done -Depth= 9746 States= 4e+06 Transitions= 7.6e+08 Memory= 682.920 t= 1.19e+03 R= 3e+03 -Depth= 9746 States= 5e+06 Transitions= 9.44e+08 Memory= 728.721 t= 1.47e+03 R= 3e+03 -Depth= 9746 States= 6e+06 Transitions= 1.35e+09 Memory= 775.303 t= 2.12e+03 R= 3e+03 -Depth= 9746 States= 7e+06 Transitions= 1.79e+09 Memory= 821.885 t= 2.84e+03 R= 2e+03 -Depth= 9746 States= 8e+06 Transitions= 2.11e+09 Memory= 868.076 t= 3.35e+03 R= 2e+03 -Depth= 9746 States= 9e+06 Transitions= 2.49e+09 Memory= 914.658 t= 3.99e+03 R= 2e+03 -pan: resizing hashtable to -w24.. done -Depth= 9746 States= 1e+07 Transitions= 2.83e+09 Memory= 1085.529 t= 4.5e+03 R= 2e+03 -Depth= 9746 States= 1.1e+07 Transitions= 3.2e+09 Memory= 1132.795 t= 5.06e+03 R= 2e+03 -Depth= 9746 States= 1.2e+07 Transitions= 3.59e+09 Memory= 1179.670 t= 5.66e+03 R= 2e+03 -Depth= 9746 States= 1.3e+07 Transitions= 3.78e+09 Memory= 1226.447 t= 5.95e+03 R= 2e+03 -Depth= 9746 States= 1.4e+07 Transitions= 3.96e+09 Memory= 1272.346 t= 6.23e+03 R= 2e+03 -Depth= 9746 States= 1.5e+07 Transitions= 4.17e+09 Memory= 1318.440 t= 6.56e+03 R= 2e+03 -Depth= 9746 States= 1.6e+07 Transitions= 4.37e+09 Memory= 1364.338 t= 6.86e+03 R= 2e+03 -Depth= 9746 States= 1.7e+07 Transitions= 4.55e+09 Memory= 1410.139 t= 7.14e+03 R= 2e+03 -Depth= 9746 States= 1.8e+07 Transitions= 4.8e+09 Memory= 1456.135 t= 7.53e+03 R= 2e+03 -Depth= 9746 States= 1.9e+07 Transitions= 5.2e+09 Memory= 1502.326 t= 8.17e+03 R= 2e+03 -Depth= 9746 States= 2e+07 Transitions= 5.67e+09 Memory= 1548.615 t= 8.94e+03 R= 2e+03 -Depth= 9746 States= 2.1e+07 Transitions= 6.01e+09 Memory= 1594.611 t= 9.49e+03 R= 2e+03 -Depth= 9746 States= 2.2e+07 Transitions= 6.42e+09 Memory= 1640.998 t= 1.01e+04 R= 2e+03 -Depth= 9746 States= 2.3e+07 Transitions= 6.67e+09 Memory= 1687.580 t= 1.05e+04 R= 2e+03 -Depth= 9746 States= 2.4e+07 Transitions= 6.96e+09 Memory= 1733.674 t= 1.1e+04 R= 2e+03 -Depth= 9746 States= 2.5e+07 Transitions= 7.2e+09 Memory= 1779.865 t= 1.14e+04 R= 2e+03 -Depth= 9746 States= 2.6e+07 Transitions= 7.61e+09 Memory= 1826.154 t= 1.2e+04 R= 2e+03 -Depth= 9746 States= 2.7e+07 Transitions= 8.36e+09 Memory= 1872.248 t= 1.32e+04 R= 2e+03 -Depth= 9746 States= 2.8e+07 Transitions= 9.08e+09 Memory= 1918.733 t= 1.44e+04 R= 2e+03 -Depth= 9746 States= 2.9e+07 Transitions= 9.48e+09 Memory= 1965.608 t= 1.51e+04 R= 2e+03 -Depth= 9746 States= 3e+07 Transitions= 9.94e+09 Memory= 2012.483 t= 1.58e+04 R= 2e+03 -Depth= 9746 States= 3.1e+07 Transitions= 1.02e+10 Memory= 2058.576 t= 1.62e+04 R= 2e+03 -Depth= 9746 States= 3.2e+07 Transitions= 1.05e+10 Memory= 2104.475 t= 1.67e+04 R= 2e+03 -Depth= 9746 States= 3.3e+07 Transitions= 1.08e+10 Memory= 2150.373 t= 1.72e+04 R= 2e+03 -Depth= 9746 States= 3.4e+07 Transitions= 1.15e+10 Memory= 2196.369 t= 1.84e+04 R= 2e+03 -pan: resizing hashtable to -w26.. done -Depth= 9746 States= 3.5e+07 Transitions= 1.22e+10 Memory= 2738.350 t= 1.96e+04 R= 2e+03 -Depth= 9746 States= 3.6e+07 Transitions= 1.27e+10 Memory= 2784.639 t= 2.03e+04 R= 2e+03 -Depth= 9746 States= 3.7e+07 Transitions= 1.29e+10 Memory= 2831.026 t= 2.07e+04 R= 2e+03 -Depth= 9746 States= 3.8e+07 Transitions= 1.34e+10 Memory= 2877.510 t= 2.14e+04 R= 2e+03 -Depth= 9746 States= 3.9e+07 Transitions= 1.39e+10 Memory= 2923.701 t= 2.21e+04 R= 2e+03 -Depth= 9746 States= 4e+07 Transitions= 1.44e+10 Memory= 2969.697 t= 2.29e+04 R= 2e+03 -Depth= 9746 States= 4.1e+07 Transitions= 1.48e+10 Memory= 3015.889 t= 2.36e+04 R= 2e+03 -Depth= 9746 States= 4.2e+07 Transitions= 1.52e+10 Memory= 3061.787 t= 2.42e+04 R= 2e+03 -Depth= 9746 States= 4.3e+07 Transitions= 1.57e+10 Memory= 3107.979 t= 2.5e+04 R= 2e+03 -Depth= 9746 States= 4.4e+07 Transitions= 1.61e+10 Memory= 3153.779 t= 2.56e+04 R= 2e+03 -Depth= 9746 States= 4.5e+07 Transitions= 1.64e+10 Memory= 3199.873 t= 2.6e+04 R= 2e+03 -Depth= 9746 States= 4.6e+07 Transitions= 1.68e+10 Memory= 3245.967 t= 2.66e+04 R= 2e+03 -Depth= 9746 States= 4.7e+07 Transitions= 1.7e+10 Memory= 3291.865 t= 2.7e+04 R= 2e+03 -Depth= 9746 States= 4.8e+07 Transitions= 1.74e+10 Memory= 3338.057 t= 2.75e+04 R= 2e+03 -Depth= 9746 States= 4.9e+07 Transitions= 1.79e+10 Memory= 3384.151 t= 2.83e+04 R= 2e+03 -Depth= 9868 States= 5e+07 Transitions= 1.82e+10 Memory= 3429.951 t= 2.88e+04 R= 2e+03 -Depth= 9912 States= 5.1e+07 Transitions= 1.86e+10 Memory= 3475.752 t= 2.94e+04 R= 2e+03 -Depth= 9912 States= 5.2e+07 Transitions= 1.89e+10 Memory= 3521.553 t= 2.99e+04 R= 2e+03 -Depth= 9912 States= 5.3e+07 Transitions= 1.93e+10 Memory= 3567.256 t= 3.05e+04 R= 2e+03 -Depth= 9912 States= 5.4e+07 Transitions= 1.96e+10 Memory= 3613.154 t= 3.1e+04 R= 2e+03 -Depth= 9912 States= 5.5e+07 Transitions= 2e+10 Memory= 3659.053 t= 3.16e+04 R= 2e+03 -Depth= 9912 States= 5.6e+07 Transitions= 2.03e+10 Memory= 3704.756 t= 3.2e+04 R= 2e+03 -Depth= 9912 States= 5.7e+07 Transitions= 2.06e+10 Memory= 3750.557 t= 3.25e+04 R= 2e+03 -Depth= 9912 States= 5.8e+07 Transitions= 2.1e+10 Memory= 3796.455 t= 3.31e+04 R= 2e+03 -Depth= 9912 States= 5.9e+07 Transitions= 2.13e+10 Memory= 3842.256 t= 3.37e+04 R= 2e+03 -Depth= 9912 States= 6e+07 Transitions= 2.16e+10 Memory= 3888.057 t= 3.42e+04 R= 2e+03 -Depth= 9912 States= 6.1e+07 Transitions= 2.2e+10 Memory= 3933.858 t= 3.47e+04 R= 2e+03 -Depth= 9912 States= 6.2e+07 Transitions= 2.23e+10 Memory= 3979.658 t= 3.52e+04 R= 2e+03 -Depth= 9912 States= 6.3e+07 Transitions= 2.27e+10 Memory= 4025.459 t= 3.58e+04 R= 2e+03 -Depth= 9912 States= 6.4e+07 Transitions= 2.3e+10 Memory= 4071.260 t= 3.63e+04 R= 2e+03 -Depth= 9912 States= 6.5e+07 Transitions= 2.33e+10 Memory= 4116.963 t= 3.69e+04 R= 2e+03 -Depth= 9912 States= 6.6e+07 Transitions= 2.36e+10 Memory= 4162.764 t= 3.73e+04 R= 2e+03 -Depth= 9912 States= 6.7e+07 Transitions= 2.39e+10 Memory= 4208.565 t= 3.78e+04 R= 2e+03 -Depth= 9912 States= 6.8e+07 Transitions= 2.42e+10 Memory= 4254.463 t= 3.83e+04 R= 2e+03 -Depth= 9912 States= 6.9e+07 Transitions= 2.46e+10 Memory= 4300.361 t= 3.88e+04 R= 2e+03 -Depth= 9912 States= 7e+07 Transitions= 2.5e+10 Memory= 4346.553 t= 3.94e+04 R= 2e+03 -Depth= 9912 States= 7.1e+07 Transitions= 2.53e+10 Memory= 4392.354 t= 4e+04 R= 2e+03 -Depth= 9912 States= 7.2e+07 Transitions= 2.58e+10 Memory= 4438.252 t= 4.07e+04 R= 2e+03 -Depth= 9912 States= 7.3e+07 Transitions= 2.61e+10 Memory= 4484.151 t= 4.12e+04 R= 2e+03 -Depth= 9912 States= 7.4e+07 Transitions= 2.66e+10 Memory= 4530.635 t= 4.19e+04 R= 2e+03 -Depth= 9912 States= 7.5e+07 Transitions= 2.69e+10 Memory= 4577.315 t= 4.25e+04 R= 2e+03 -Depth= 9912 States= 7.6e+07 Transitions= 2.74e+10 Memory= 4623.897 t= 4.32e+04 R= 2e+03 -Depth= 9912 States= 7.7e+07 Transitions= 2.78e+10 Memory= 4669.893 t= 4.39e+04 R= 2e+03 -Depth= 9912 States= 7.8e+07 Transitions= 2.82e+10 Memory= 4716.084 t= 4.45e+04 R= 2e+03 -Depth= 9912 States= 7.9e+07 Transitions= 2.85e+10 Memory= 4762.568 t= 4.5e+04 R= 2e+03 -Depth= 9912 States= 8e+07 Transitions= 2.87e+10 Memory= 4808.369 t= 4.52e+04 R= 2e+03 -Depth= 9912 States= 8.1e+07 Transitions= 2.89e+10 Memory= 4854.170 t= 4.56e+04 R= 2e+03 -Depth= 9912 States= 8.2e+07 Transitions= 2.91e+10 Memory= 4899.971 t= 4.59e+04 R= 2e+03 -Depth= 9912 States= 8.3e+07 Transitions= 2.93e+10 Memory= 4945.772 t= 4.61e+04 R= 2e+03 -Depth= 9912 States= 8.4e+07 Transitions= 2.95e+10 Memory= 4991.475 t= 4.64e+04 R= 2e+03 -Depth= 9912 States= 8.5e+07 Transitions= 2.99e+10 Memory= 5037.276 t= 4.71e+04 R= 2e+03 -Depth= 9912 States= 8.6e+07 Transitions= 3.03e+10 Memory= 5083.076 t= 4.78e+04 R= 2e+03 -Depth= 9912 States= 8.7e+07 Transitions= 3.07e+10 Memory= 5128.877 t= 4.83e+04 R= 2e+03 -pan: claim violated! (at depth 1530) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 9912, errors: 1 - 87915830 states, stored -3.0918075e+10 states, matched -3.100599e+10 transitions (= stored+matched) -1.742054e+11 atomic steps -hash conflicts: 1.5948958e+10 (resolved) - -Stats on memory usage (in Megabytes): - 9725.796 equivalent memory usage for states (stored*(State-vector + overhead)) - 4202.002 actual memory usage for states (compression: 43.20%) - state-vector as stored = 14 byte + 36 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 5170.869 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 517357 4332 4682 2 2 ] -unreached in proctype urcu_reader - line 894, "pan.___", state 12, "((i<1))" - line 894, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 104, "(1)" - line 249, "pan.___", state 112, "(1)" - line 253, "pan.___", state 124, "(1)" - line 257, "pan.___", state 132, "(1)" - line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 223, "(1)" - line 434, "pan.___", state 253, "(1)" - line 438, "pan.___", state 266, "(1)" - line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 359, "(1)" - line 434, "pan.___", state 389, "(1)" - line 438, "pan.___", state 402, "(1)" - line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 488, "(1)" - line 434, "pan.___", state 518, "(1)" - line 438, "pan.___", state 531, "(1)" - line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 556, "(1)" - line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 557, "else" - line 407, "pan.___", state 560, "(1)" - line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 570, "(1)" - line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 571, "else" - line 411, "pan.___", state 574, "(1)" - line 411, "pan.___", state 575, "(1)" - line 411, "pan.___", state 575, "(1)" - line 409, "pan.___", state 580, "((i<1))" - line 409, "pan.___", state 580, "((i>=1))" - line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 588, "(1)" - line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 589, "else" - line 416, "pan.___", state 592, "(1)" - line 416, "pan.___", state 593, "(1)" - line 416, "pan.___", state 593, "(1)" - line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 602, "(1)" - line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 603, "else" - line 420, "pan.___", state 606, "(1)" - line 420, "pan.___", state 607, "(1)" - line 420, "pan.___", state 607, "(1)" - line 418, "pan.___", state 612, "((i<2))" - line 418, "pan.___", state 612, "((i>=2))" - line 425, "pan.___", state 619, "(1)" - line 425, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 620, "else" - line 425, "pan.___", state 623, "(1)" - line 425, "pan.___", state 624, "(1)" - line 425, "pan.___", state 624, "(1)" - line 429, "pan.___", state 632, "(1)" - line 429, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 633, "else" - line 429, "pan.___", state 636, "(1)" - line 429, "pan.___", state 637, "(1)" - line 429, "pan.___", state 637, "(1)" - line 427, "pan.___", state 642, "((i<1))" - line 427, "pan.___", state 642, "((i>=1))" - line 434, "pan.___", state 649, "(1)" - line 434, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 650, "else" - line 434, "pan.___", state 653, "(1)" - line 434, "pan.___", state 654, "(1)" - line 434, "pan.___", state 654, "(1)" - line 438, "pan.___", state 662, "(1)" - line 438, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 663, "else" - line 438, "pan.___", state 666, "(1)" - line 438, "pan.___", state 667, "(1)" - line 438, "pan.___", state 667, "(1)" - line 436, "pan.___", state 672, "((i<2))" - line 436, "pan.___", state 672, "((i>=2))" - line 446, "pan.___", state 676, "(1)" - line 446, "pan.___", state 676, "(1)" - line 687, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" - line 687, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 687, "pan.___", state 681, "(1)" - line 407, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 753, "(1)" - line 434, "pan.___", state 783, "(1)" - line 438, "pan.___", state 796, "(1)" - line 407, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 889, "(1)" - line 434, "pan.___", state 919, "(1)" - line 438, "pan.___", state 932, "(1)" - line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 955, "(1)" - line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 956, "else" - line 407, "pan.___", state 959, "(1)" - line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 969, "(1)" - line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 970, "else" - line 411, "pan.___", state 973, "(1)" - line 411, "pan.___", state 974, "(1)" - line 411, "pan.___", state 974, "(1)" - line 409, "pan.___", state 979, "((i<1))" - line 409, "pan.___", state 979, "((i>=1))" - line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 987, "(1)" - line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 988, "else" - line 416, "pan.___", state 991, "(1)" - line 416, "pan.___", state 992, "(1)" - line 416, "pan.___", state 992, "(1)" - line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 1001, "(1)" - line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 1002, "else" - line 420, "pan.___", state 1005, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 418, "pan.___", state 1011, "((i<2))" - line 418, "pan.___", state 1011, "((i>=2))" - line 425, "pan.___", state 1018, "(1)" - line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 1019, "else" - line 425, "pan.___", state 1022, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 429, "pan.___", state 1031, "(1)" - line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 1032, "else" - line 429, "pan.___", state 1035, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 427, "pan.___", state 1041, "((i<1))" - line 427, "pan.___", state 1041, "((i>=1))" - line 434, "pan.___", state 1048, "(1)" - line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 1049, "else" - line 434, "pan.___", state 1052, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 438, "pan.___", state 1061, "(1)" - line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 1062, "else" - line 438, "pan.___", state 1065, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 436, "pan.___", state 1071, "((i<2))" - line 436, "pan.___", state 1071, "((i>=2))" - line 446, "pan.___", state 1075, "(1)" - line 446, "pan.___", state 1075, "(1)" - line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1149, "(1)" - line 434, "pan.___", state 1179, "(1)" - line 438, "pan.___", state 1192, "(1)" - line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1281, "(1)" - line 434, "pan.___", state 1311, "(1)" - line 438, "pan.___", state 1324, "(1)" - line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1414, "(1)" - line 434, "pan.___", state 1444, "(1)" - line 438, "pan.___", state 1457, "(1)" - line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1543, "(1)" - line 434, "pan.___", state 1573, "(1)" - line 438, "pan.___", state 1586, "(1)" - line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1677, "(1)" - line 434, "pan.___", state 1707, "(1)" - line 438, "pan.___", state 1720, "(1)" - line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1806, "(1)" - line 434, "pan.___", state 1836, "(1)" - line 438, "pan.___", state 1849, "(1)" - line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1938, "(1)" - line 434, "pan.___", state 1968, "(1)" - line 438, "pan.___", state 1981, "(1)" - line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2074, "(1)" - line 434, "pan.___", state 2104, "(1)" - line 438, "pan.___", state 2117, "(1)" - line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2203, "(1)" - line 434, "pan.___", state 2233, "(1)" - line 438, "pan.___", state 2246, "(1)" - line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 2271, "(1)" - line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 2272, "else" - line 407, "pan.___", state 2275, "(1)" - line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 2286, "else" - line 411, "pan.___", state 2289, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 409, "pan.___", state 2295, "((i<1))" - line 409, "pan.___", state 2295, "((i>=1))" - line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 2303, "(1)" - line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 2304, "else" - line 416, "pan.___", state 2307, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 2317, "(1)" - line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 2318, "else" - line 420, "pan.___", state 2321, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 418, "pan.___", state 2327, "((i<2))" - line 418, "pan.___", state 2327, "((i>=2))" - line 425, "pan.___", state 2334, "(1)" - line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 2335, "else" - line 425, "pan.___", state 2338, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 429, "pan.___", state 2347, "(1)" - line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 2348, "else" - line 429, "pan.___", state 2351, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 427, "pan.___", state 2357, "((i<1))" - line 427, "pan.___", state 2357, "((i>=1))" - line 434, "pan.___", state 2364, "(1)" - line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 2365, "else" - line 434, "pan.___", state 2368, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 438, "pan.___", state 2377, "(1)" - line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 2378, "else" - line 438, "pan.___", state 2381, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 436, "pan.___", state 2387, "((i<2))" - line 436, "pan.___", state 2387, "((i>=2))" - line 446, "pan.___", state 2391, "(1)" - line 446, "pan.___", state 2391, "(1)" - line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" - line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 734, "pan.___", state 2396, "(1)" - line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2468, "(1)" - line 434, "pan.___", state 2498, "(1)" - line 438, "pan.___", state 2511, "(1)" - line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2603, "(1)" - line 434, "pan.___", state 2633, "(1)" - line 438, "pan.___", state 2646, "(1)" - line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2732, "(1)" - line 434, "pan.___", state 2762, "(1)" - line 438, "pan.___", state 2775, "(1)" - line 245, "pan.___", state 2808, "(1)" - line 253, "pan.___", state 2828, "(1)" - line 257, "pan.___", state 2836, "(1)" - line 245, "pan.___", state 2851, "(1)" - line 253, "pan.___", state 2871, "(1)" - line 257, "pan.___", state 2879, "(1)" - line 929, "pan.___", state 2896, "-end-" - (246 of 2896 states) -unreached in proctype urcu_writer - line 1018, "pan.___", state 12, "((i<1))" - line 1018, "pan.___", state 12, "((i>=1))" - line 407, "pan.___", state 46, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 60, "cache_dirty_urcu_active_readers = 0" - line 425, "pan.___", state 111, "(1)" - line 429, "pan.___", state 124, "(1)" - line 268, "pan.___", state 177, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 179, "(1)" - line 272, "pan.___", state 186, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 188, "(1)" - line 272, "pan.___", state 189, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 189, "else" - line 270, "pan.___", state 194, "((i<1))" - line 270, "pan.___", state 194, "((i>=1))" - line 276, "pan.___", state 199, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 201, "(1)" - line 276, "pan.___", state 202, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 202, "else" - line 280, "pan.___", state 208, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 210, "(1)" - line 280, "pan.___", state 211, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 211, "else" - line 285, "pan.___", state 220, "(cache_dirty_urcu_gp_ctr)" - line 285, "pan.___", state 220, "else" - line 407, "pan.___", state 239, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 253, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 271, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 285, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 304, "(1)" - line 429, "pan.___", state 317, "(1)" - line 434, "pan.___", state 334, "(1)" - line 438, "pan.___", state 347, "(1)" - line 411, "pan.___", state 384, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 402, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 416, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 448, "(1)" - line 434, "pan.___", state 465, "(1)" - line 438, "pan.___", state 478, "(1)" - line 411, "pan.___", state 523, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 541, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 555, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 587, "(1)" - line 434, "pan.___", state 604, "(1)" - line 438, "pan.___", state 617, "(1)" - line 411, "pan.___", state 652, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 670, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 684, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 716, "(1)" - line 434, "pan.___", state 733, "(1)" - line 438, "pan.___", state 746, "(1)" - line 411, "pan.___", state 783, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 801, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 815, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 847, "(1)" - line 434, "pan.___", state 864, "(1)" - line 438, "pan.___", state 877, "(1)" - line 268, "pan.___", state 932, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 941, "cache_dirty_urcu_active_readers = 0" - line 245, "pan.___", state 979, "(1)" - line 249, "pan.___", state 987, "(1)" - line 253, "pan.___", state 999, "(1)" - line 257, "pan.___", state 1007, "(1)" - line 268, "pan.___", state 1038, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1047, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1060, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1069, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1085, "(1)" - line 249, "pan.___", state 1093, "(1)" - line 253, "pan.___", state 1105, "(1)" - line 257, "pan.___", state 1113, "(1)" - line 272, "pan.___", state 1139, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1152, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1161, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1177, "(1)" - line 249, "pan.___", state 1185, "(1)" - line 253, "pan.___", state 1197, "(1)" - line 257, "pan.___", state 1205, "(1)" - line 268, "pan.___", state 1236, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1245, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1258, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1267, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1283, "(1)" - line 249, "pan.___", state 1291, "(1)" - line 253, "pan.___", state 1303, "(1)" - line 257, "pan.___", state 1311, "(1)" - line 272, "pan.___", state 1337, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1350, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1359, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1375, "(1)" - line 249, "pan.___", state 1383, "(1)" - line 253, "pan.___", state 1395, "(1)" - line 257, "pan.___", state 1403, "(1)" - line 268, "pan.___", state 1434, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1443, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1456, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1465, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1481, "(1)" - line 249, "pan.___", state 1489, "(1)" - line 253, "pan.___", state 1501, "(1)" - line 257, "pan.___", state 1509, "(1)" - line 272, "pan.___", state 1535, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1548, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1557, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1573, "(1)" - line 249, "pan.___", state 1581, "(1)" - line 253, "pan.___", state 1593, "(1)" - line 257, "pan.___", state 1601, "(1)" - line 268, "pan.___", state 1632, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1641, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1654, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1663, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1679, "(1)" - line 249, "pan.___", state 1687, "(1)" - line 253, "pan.___", state 1699, "(1)" - line 257, "pan.___", state 1707, "(1)" - line 1304, "pan.___", state 1723, "-end-" - (110 of 1723 states) -unreached in proctype :init: - line 1319, "pan.___", state 13, "((i<1))" - line 1319, "pan.___", state 13, "((i>=1))" - (1 of 28 states) -unreached in proctype :never: - line 1367, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 4.88e+04 seconds -pan: rate 1799.8673 states/second -pan: avg transition delay 1.5754e-06 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input deleted file mode 100644 index 4159c77..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,1340 +0,0 @@ -#define NO_WMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index f280086..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1533 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4649 -2:2:2896 -3:2:2901 -4:2:2905 -5:2:2913 -6:2:2917 -7:2:2921 -8:0:4649 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-1507:2:3878 -1508:2:3879 -1509:2:3886 -1510:2:3891 -1511:2:3898 -1512:2:3899 -1513:2:3898 -1514:2:3899 -1515:2:3906 -1516:2:3910 -1517:0:4649 -1518:2:3915 -1519:0:4649 -1520:2:3916 -1521:0:4649 -1522:2:3917 -1523:0:4649 -1524:2:3918 -1525:0:4649 -1526:1:1342 -1527:1:1343 -1528:0:4647 -1529:2:3919 -1530:0:4653 -1531:1:2501 diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.define b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.log b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.log deleted file mode 100644 index 1d98e20..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.log +++ /dev/null @@ -1,696 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -Depth= 9651 States= 1e+06 Transitions= 1.79e+08 Memory= 513.029 t= 267 R= 4e+03 -Depth= 9651 States= 2e+06 Transitions= 4.37e+08 Memory= 559.416 t= 679 R= 3e+03 -Depth= 9651 States= 3e+06 Transitions= 7.08e+08 Memory= 605.901 t= 1.13e+03 R= 3e+03 -pan: resizing hashtable to -w22.. done -Depth= 9651 States= 4e+06 Transitions= 9.4e+08 Memory= 683.213 t= 1.48e+03 R= 3e+03 -Depth= 9651 States= 5e+06 Transitions= 1.26e+09 Memory= 730.479 t= 1.98e+03 R= 3e+03 -Depth= 9651 States= 6e+06 Transitions= 1.55e+09 Memory= 777.451 t= 2.43e+03 R= 2e+03 -Depth= 9651 States= 7e+06 Transitions= 1.82e+09 Memory= 824.522 t= 2.87e+03 R= 2e+03 -Depth= 9651 States= 8e+06 Transitions= 2.01e+09 Memory= 871.494 t= 3.16e+03 R= 3e+03 -Depth= 9651 States= 9e+06 Transitions= 2.19e+09 Memory= 917.295 t= 3.45e+03 R= 3e+03 -pan: resizing hashtable to -w24.. done -Depth= 9651 States= 1e+07 Transitions= 2.37e+09 Memory= 1087.092 t= 3.73e+03 R= 3e+03 -Depth= 9651 States= 1.1e+07 Transitions= 2.59e+09 Memory= 1133.088 t= 4.06e+03 R= 3e+03 -Depth= 9651 States= 1.2e+07 Transitions= 2.88e+09 Memory= 1179.572 t= 4.5e+03 R= 3e+03 -Depth= 9651 States= 1.3e+07 Transitions= 3.1e+09 Memory= 1226.545 t= 4.84e+03 R= 3e+03 -Depth= 9651 States= 1.4e+07 Transitions= 3.33e+09 Memory= 1272.834 t= 5.18e+03 R= 3e+03 -Depth= 9651 States= 1.5e+07 Transitions= 3.58e+09 Memory= 1318.733 t= 5.57e+03 R= 3e+03 -Depth= 9651 States= 1.6e+07 Transitions= 3.79e+09 Memory= 1364.729 t= 5.9e+03 R= 3e+03 -Depth= 9651 States= 1.7e+07 Transitions= 4.09e+09 Memory= 1410.725 t= 6.36e+03 R= 3e+03 -Depth= 9892 States= 1.8e+07 Transitions= 4.34e+09 Memory= 1456.526 t= 6.76e+03 R= 3e+03 -Depth= 9897 States= 1.9e+07 Transitions= 4.61e+09 Memory= 1502.326 t= 7.17e+03 R= 3e+03 -Depth= 9897 States= 2e+07 Transitions= 4.88e+09 Memory= 1548.127 t= 7.6e+03 R= 3e+03 -Depth= 9897 States= 2.1e+07 Transitions= 5.16e+09 Memory= 1594.318 t= 8.03e+03 R= 3e+03 -Depth= 9897 States= 2.2e+07 Transitions= 5.46e+09 Memory= 1640.315 t= 8.52e+03 R= 3e+03 -Depth= 9897 States= 2.3e+07 Transitions= 5.74e+09 Memory= 1686.115 t= 8.95e+03 R= 3e+03 -Depth= 9897 States= 2.4e+07 Transitions= 6e+09 Memory= 1731.916 t= 9.36e+03 R= 3e+03 -Depth= 9897 States= 2.5e+07 Transitions= 6.24e+09 Memory= 1777.717 t= 9.75e+03 R= 3e+03 -Depth= 9897 States= 2.6e+07 Transitions= 6.48e+09 Memory= 1823.518 t= 1.01e+04 R= 3e+03 -Depth= 9897 States= 2.7e+07 Transitions= 6.7e+09 Memory= 1869.318 t= 1.05e+04 R= 3e+03 -Depth= 9897 States= 2.8e+07 Transitions= 7.03e+09 Memory= 1916.486 t= 1.1e+04 R= 3e+03 -Depth= 9897 States= 2.9e+07 Transitions= 7.36e+09 Memory= 1962.678 t= 1.15e+04 R= 3e+03 -Depth= 9897 States= 3e+07 Transitions= 7.63e+09 Memory= 2008.967 t= 1.2e+04 R= 3e+03 -Depth= 9897 States= 3.1e+07 Transitions= 7.94e+09 Memory= 2054.963 t= 1.25e+04 R= 2e+03 -Depth= 9897 States= 3.2e+07 Transitions= 8.2e+09 Memory= 2102.033 t= 1.29e+04 R= 2e+03 -Depth= 9897 States= 3.3e+07 Transitions= 8.41e+09 Memory= 2148.029 t= 1.32e+04 R= 2e+03 -Depth= 9897 States= 3.4e+07 Transitions= 8.68e+09 Memory= 2194.123 t= 1.36e+04 R= 2e+03 -pan: resizing hashtable to -w26.. done -Depth= 9897 States= 3.5e+07 Transitions= 8.91e+09 Memory= 2736.006 t= 1.4e+04 R= 2e+03 -Depth= 9897 States= 3.6e+07 Transitions= 9.2e+09 Memory= 2781.807 t= 1.44e+04 R= 2e+03 -Depth= 9897 States= 3.7e+07 Transitions= 9.48e+09 Memory= 2827.608 t= 1.49e+04 R= 2e+03 -Depth= 9897 States= 3.8e+07 Transitions= 9.72e+09 Memory= 2873.408 t= 1.52e+04 R= 2e+03 -Depth= 9897 States= 3.9e+07 Transitions= 9.98e+09 Memory= 2919.209 t= 1.56e+04 R= 2e+03 -Depth= 9897 States= 4e+07 Transitions= 1.02e+10 Memory= 2965.010 t= 1.6e+04 R= 2e+03 -Depth= 9897 States= 4.1e+07 Transitions= 1.05e+10 Memory= 3010.713 t= 1.64e+04 R= 2e+03 -Depth= 9897 States= 4.2e+07 Transitions= 1.07e+10 Memory= 3056.611 t= 1.68e+04 R= 3e+03 -pan: claim violated! (at depth 1439) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 9897, errors: 1 - 42642410 states, stored -1.0909582e+10 states, matched -1.0952224e+10 transitions (= stored+matched) -5.922913e+10 atomic steps -hash conflicts: 6.3170511e+09 (resolved) - -Stats on memory usage (in Megabytes): - 4717.369 equivalent memory usage for states (stored*(State-vector + overhead)) - 2117.231 actual memory usage for states (compression: 44.88%) - state-vector as stored = 16 byte + 36 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 3086.494 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 304368 3993 2946 2 2 ] -unreached in proctype urcu_reader - line 894, "pan.___", state 12, "((i<1))" - line 894, "pan.___", state 12, "((i>=1))" - line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 104, "(1)" - line 249, "pan.___", state 112, "(1)" - line 253, "pan.___", state 124, "(1)" - line 257, "pan.___", state 132, "(1)" - line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 223, "(1)" - line 434, "pan.___", state 253, "(1)" - line 438, "pan.___", state 266, "(1)" - line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 359, "(1)" - line 434, "pan.___", state 389, "(1)" - line 438, "pan.___", state 402, "(1)" - line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 488, "(1)" - line 434, "pan.___", state 518, "(1)" - line 438, "pan.___", state 531, "(1)" - line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 556, "(1)" - line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 557, "else" - line 407, "pan.___", state 560, "(1)" - line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 570, "(1)" - line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 571, "else" - line 411, "pan.___", state 574, "(1)" - line 411, "pan.___", state 575, "(1)" - line 411, "pan.___", state 575, "(1)" - line 409, "pan.___", state 580, "((i<1))" - line 409, "pan.___", state 580, "((i>=1))" - line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 588, "(1)" - line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 589, "else" - line 416, "pan.___", state 592, "(1)" - line 416, "pan.___", state 593, "(1)" - line 416, "pan.___", state 593, "(1)" - line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 602, "(1)" - line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 603, "else" - line 420, "pan.___", state 606, "(1)" - line 420, "pan.___", state 607, "(1)" - line 420, "pan.___", state 607, "(1)" - line 418, "pan.___", state 612, "((i<2))" - line 418, "pan.___", state 612, "((i>=2))" - line 425, "pan.___", state 619, "(1)" - line 425, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 620, "else" - line 425, "pan.___", state 623, "(1)" - line 425, "pan.___", state 624, "(1)" - line 425, "pan.___", state 624, "(1)" - line 429, "pan.___", state 632, "(1)" - line 429, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 633, "else" - line 429, "pan.___", state 636, "(1)" - line 429, "pan.___", state 637, "(1)" - line 429, "pan.___", state 637, "(1)" - line 427, "pan.___", state 642, "((i<1))" - line 427, "pan.___", state 642, "((i>=1))" - line 434, "pan.___", state 649, "(1)" - line 434, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 650, "else" - line 434, "pan.___", state 653, "(1)" - line 434, "pan.___", state 654, "(1)" - line 434, "pan.___", state 654, "(1)" - line 438, "pan.___", state 662, "(1)" - line 438, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 663, "else" - line 438, "pan.___", state 666, "(1)" - line 438, "pan.___", state 667, "(1)" - line 438, "pan.___", state 667, "(1)" - line 436, "pan.___", state 672, "((i<2))" - line 436, "pan.___", state 672, "((i>=2))" - line 446, "pan.___", state 676, "(1)" - line 446, "pan.___", state 676, "(1)" - line 687, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" - line 687, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 687, "pan.___", state 681, "(1)" - line 407, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 753, "(1)" - line 434, "pan.___", state 783, "(1)" - line 438, "pan.___", state 796, "(1)" - line 407, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 889, "(1)" - line 434, "pan.___", state 919, "(1)" - line 438, "pan.___", state 932, "(1)" - line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 955, "(1)" - line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 956, "else" - line 407, "pan.___", state 959, "(1)" - line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 969, "(1)" - line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 970, "else" - line 411, "pan.___", state 973, "(1)" - line 411, "pan.___", state 974, "(1)" - line 411, "pan.___", state 974, "(1)" - line 409, "pan.___", state 979, "((i<1))" - line 409, "pan.___", state 979, "((i>=1))" - line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 987, "(1)" - line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 988, "else" - line 416, "pan.___", state 991, "(1)" - line 416, "pan.___", state 992, "(1)" - line 416, "pan.___", state 992, "(1)" - line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 1001, "(1)" - line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 1002, "else" - line 420, "pan.___", state 1005, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 420, "pan.___", state 1006, "(1)" - line 418, "pan.___", state 1011, "((i<2))" - line 418, "pan.___", state 1011, "((i>=2))" - line 425, "pan.___", state 1018, "(1)" - line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 1019, "else" - line 425, "pan.___", state 1022, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 425, "pan.___", state 1023, "(1)" - line 429, "pan.___", state 1031, "(1)" - line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 1032, "else" - line 429, "pan.___", state 1035, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 429, "pan.___", state 1036, "(1)" - line 427, "pan.___", state 1041, "((i<1))" - line 427, "pan.___", state 1041, "((i>=1))" - line 434, "pan.___", state 1048, "(1)" - line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 1049, "else" - line 434, "pan.___", state 1052, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 434, "pan.___", state 1053, "(1)" - line 438, "pan.___", state 1061, "(1)" - line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 1062, "else" - line 438, "pan.___", state 1065, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 438, "pan.___", state 1066, "(1)" - line 436, "pan.___", state 1071, "((i<2))" - line 436, "pan.___", state 1071, "((i>=2))" - line 446, "pan.___", state 1075, "(1)" - line 446, "pan.___", state 1075, "(1)" - line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1149, "(1)" - line 434, "pan.___", state 1179, "(1)" - line 438, "pan.___", state 1192, "(1)" - line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1281, "(1)" - line 434, "pan.___", state 1311, "(1)" - line 438, "pan.___", state 1324, "(1)" - line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1414, "(1)" - line 434, "pan.___", state 1444, "(1)" - line 438, "pan.___", state 1457, "(1)" - line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1543, "(1)" - line 434, "pan.___", state 1573, "(1)" - line 438, "pan.___", state 1586, "(1)" - line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1677, "(1)" - line 434, "pan.___", state 1707, "(1)" - line 438, "pan.___", state 1720, "(1)" - line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1806, "(1)" - line 434, "pan.___", state 1836, "(1)" - line 438, "pan.___", state 1849, "(1)" - line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 1938, "(1)" - line 434, "pan.___", state 1968, "(1)" - line 438, "pan.___", state 1981, "(1)" - line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2074, "(1)" - line 434, "pan.___", state 2104, "(1)" - line 438, "pan.___", state 2117, "(1)" - line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2203, "(1)" - line 434, "pan.___", state 2233, "(1)" - line 438, "pan.___", state 2246, "(1)" - line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 2271, "(1)" - line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 2272, "else" - line 407, "pan.___", state 2275, "(1)" - line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 2286, "else" - line 411, "pan.___", state 2289, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 411, "pan.___", state 2290, "(1)" - line 409, "pan.___", state 2295, "((i<1))" - line 409, "pan.___", state 2295, "((i>=1))" - line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 2303, "(1)" - line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 2304, "else" - line 416, "pan.___", state 2307, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 416, "pan.___", state 2308, "(1)" - line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 2317, "(1)" - line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 2318, "else" - line 420, "pan.___", state 2321, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 420, "pan.___", state 2322, "(1)" - line 418, "pan.___", state 2327, "((i<2))" - line 418, "pan.___", state 2327, "((i>=2))" - line 425, "pan.___", state 2334, "(1)" - line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 2335, "else" - line 425, "pan.___", state 2338, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 425, "pan.___", state 2339, "(1)" - line 429, "pan.___", state 2347, "(1)" - line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 2348, "else" - line 429, "pan.___", state 2351, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 429, "pan.___", state 2352, "(1)" - line 427, "pan.___", state 2357, "((i<1))" - line 427, "pan.___", state 2357, "((i>=1))" - line 434, "pan.___", state 2364, "(1)" - line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 2365, "else" - line 434, "pan.___", state 2368, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 434, "pan.___", state 2369, "(1)" - line 438, "pan.___", state 2377, "(1)" - line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 2378, "else" - line 438, "pan.___", state 2381, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 438, "pan.___", state 2382, "(1)" - line 436, "pan.___", state 2387, "((i<2))" - line 436, "pan.___", state 2387, "((i>=2))" - line 446, "pan.___", state 2391, "(1)" - line 446, "pan.___", state 2391, "(1)" - line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" - line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 734, "pan.___", state 2396, "(1)" - line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2468, "(1)" - line 434, "pan.___", state 2498, "(1)" - line 438, "pan.___", state 2511, "(1)" - line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2603, "(1)" - line 434, "pan.___", state 2633, "(1)" - line 438, "pan.___", state 2646, "(1)" - line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 2732, "(1)" - line 434, "pan.___", state 2762, "(1)" - line 438, "pan.___", state 2775, "(1)" - line 245, "pan.___", state 2808, "(1)" - line 253, "pan.___", state 2828, "(1)" - line 257, "pan.___", state 2836, "(1)" - line 245, "pan.___", state 2851, "(1)" - line 253, "pan.___", state 2871, "(1)" - line 257, "pan.___", state 2879, "(1)" - line 929, "pan.___", state 2896, "-end-" - (246 of 2896 states) -unreached in proctype urcu_writer - line 1018, "pan.___", state 12, "((i<1))" - line 1018, "pan.___", state 12, "((i>=1))" - line 407, "pan.___", state 49, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 63, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 81, "cache_dirty_rcu_ptr = 0" - line 425, "pan.___", state 114, "(1)" - line 429, "pan.___", state 127, "(1)" - line 434, "pan.___", state 144, "(1)" - line 268, "pan.___", state 180, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 189, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 202, "cache_dirty_rcu_ptr = 0" - line 407, "pan.___", state 242, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 256, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 274, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 288, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 307, "(1)" - line 429, "pan.___", state 320, "(1)" - line 434, "pan.___", state 337, "(1)" - line 438, "pan.___", state 350, "(1)" - line 411, "pan.___", state 387, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 405, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 419, "cache_dirty_rcu_data[i] = 0" - line 429, "pan.___", state 451, "(1)" - line 434, "pan.___", state 468, "(1)" - line 438, "pan.___", state 481, "(1)" - line 407, "pan.___", state 511, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 525, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 543, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 557, "cache_dirty_rcu_data[i] = 0" - line 425, "pan.___", state 576, "(1)" - line 429, "pan.___", state 589, "(1)" - line 434, "pan.___", state 606, "(1)" - line 438, "pan.___", state 619, "(1)" - line 407, "pan.___", state 640, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 642, "(1)" - line 407, "pan.___", state 643, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 643, "else" - line 407, "pan.___", state 646, "(1)" - line 411, "pan.___", state 654, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 656, "(1)" - line 411, "pan.___", state 657, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 657, "else" - line 411, "pan.___", state 660, "(1)" - line 411, "pan.___", state 661, "(1)" - line 411, "pan.___", state 661, "(1)" - line 409, "pan.___", state 666, "((i<1))" - line 409, "pan.___", state 666, "((i>=1))" - line 416, "pan.___", state 672, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 674, "(1)" - line 416, "pan.___", state 675, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 675, "else" - line 416, "pan.___", state 678, "(1)" - line 416, "pan.___", state 679, "(1)" - line 416, "pan.___", state 679, "(1)" - line 420, "pan.___", state 686, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 688, "(1)" - line 420, "pan.___", state 689, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 689, "else" - line 420, "pan.___", state 692, "(1)" - line 420, "pan.___", state 693, "(1)" - line 420, "pan.___", state 693, "(1)" - line 418, "pan.___", state 698, "((i<2))" - line 418, "pan.___", state 698, "((i>=2))" - line 425, "pan.___", state 705, "(1)" - line 425, "pan.___", state 706, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 706, "else" - line 425, "pan.___", state 709, "(1)" - line 425, "pan.___", state 710, "(1)" - line 425, "pan.___", state 710, "(1)" - line 429, "pan.___", state 718, "(1)" - line 429, "pan.___", state 719, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 719, "else" - line 429, "pan.___", state 722, "(1)" - line 429, "pan.___", state 723, "(1)" - line 429, "pan.___", state 723, "(1)" - line 427, "pan.___", state 728, "((i<1))" - line 427, "pan.___", state 728, "((i>=1))" - line 434, "pan.___", state 735, "(1)" - line 434, "pan.___", state 736, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 736, "else" - line 434, "pan.___", state 739, "(1)" - line 434, "pan.___", state 740, "(1)" - line 434, "pan.___", state 740, "(1)" - line 438, "pan.___", state 748, "(1)" - line 438, "pan.___", state 749, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 749, "else" - line 438, "pan.___", state 752, "(1)" - line 438, "pan.___", state 753, "(1)" - line 438, "pan.___", state 753, "(1)" - line 436, "pan.___", state 758, "((i<2))" - line 436, "pan.___", state 758, "((i>=2))" - line 446, "pan.___", state 762, "(1)" - line 446, "pan.___", state 762, "(1)" - line 1184, "pan.___", state 766, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" - line 407, "pan.___", state 771, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 773, "(1)" - line 407, "pan.___", state 774, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 774, "else" - line 407, "pan.___", state 777, "(1)" - line 411, "pan.___", state 785, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 787, "(1)" - line 411, "pan.___", state 788, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 788, "else" - line 411, "pan.___", state 791, "(1)" - line 411, "pan.___", state 792, "(1)" - line 411, "pan.___", state 792, "(1)" - line 409, "pan.___", state 797, "((i<1))" - line 409, "pan.___", state 797, "((i>=1))" - line 416, "pan.___", state 803, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 805, "(1)" - line 416, "pan.___", state 806, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 806, "else" - line 416, "pan.___", state 809, "(1)" - line 416, "pan.___", state 810, "(1)" - line 416, "pan.___", state 810, "(1)" - line 420, "pan.___", state 817, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 819, "(1)" - line 420, "pan.___", state 820, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 820, "else" - line 420, "pan.___", state 823, "(1)" - line 420, "pan.___", state 824, "(1)" - line 420, "pan.___", state 824, "(1)" - line 418, "pan.___", state 829, "((i<2))" - line 418, "pan.___", state 829, "((i>=2))" - line 425, "pan.___", state 836, "(1)" - line 425, "pan.___", state 837, "(!(cache_dirty_urcu_gp_ctr))" - line 425, "pan.___", state 837, "else" - line 425, "pan.___", state 840, "(1)" - line 425, "pan.___", state 841, "(1)" - line 425, "pan.___", state 841, "(1)" - line 429, "pan.___", state 849, "(1)" - line 429, "pan.___", state 850, "(!(cache_dirty_urcu_active_readers))" - line 429, "pan.___", state 850, "else" - line 429, "pan.___", state 853, "(1)" - line 429, "pan.___", state 854, "(1)" - line 429, "pan.___", state 854, "(1)" - line 427, "pan.___", state 859, "((i<1))" - line 427, "pan.___", state 859, "((i>=1))" - line 434, "pan.___", state 866, "(1)" - line 434, "pan.___", state 867, "(!(cache_dirty_rcu_ptr))" - line 434, "pan.___", state 867, "else" - line 434, "pan.___", state 870, "(1)" - line 434, "pan.___", state 871, "(1)" - line 434, "pan.___", state 871, "(1)" - line 438, "pan.___", state 879, "(1)" - line 438, "pan.___", state 880, "(!(cache_dirty_rcu_data[i]))" - line 438, "pan.___", state 880, "else" - line 438, "pan.___", state 883, "(1)" - line 438, "pan.___", state 884, "(1)" - line 438, "pan.___", state 884, "(1)" - line 436, "pan.___", state 889, "((i<2))" - line 436, "pan.___", state 889, "((i>=2))" - line 446, "pan.___", state 893, "(1)" - line 446, "pan.___", state 893, "(1)" - line 1200, "pan.___", state 898, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" - line 1195, "pan.___", state 899, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" - line 1195, "pan.___", state 899, "else" - line 1220, "pan.___", state 903, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" - line 268, "pan.___", state 934, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 943, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 958, "(1)" - line 280, "pan.___", state 965, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 981, "(1)" - line 249, "pan.___", state 989, "(1)" - line 253, "pan.___", state 1001, "(1)" - line 257, "pan.___", state 1009, "(1)" - line 268, "pan.___", state 1040, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1049, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1062, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1071, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1087, "(1)" - line 249, "pan.___", state 1095, "(1)" - line 253, "pan.___", state 1107, "(1)" - line 257, "pan.___", state 1115, "(1)" - line 272, "pan.___", state 1141, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1154, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1163, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1179, "(1)" - line 249, "pan.___", state 1187, "(1)" - line 253, "pan.___", state 1199, "(1)" - line 257, "pan.___", state 1207, "(1)" - line 268, "pan.___", state 1238, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1247, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1260, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1269, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1285, "(1)" - line 249, "pan.___", state 1293, "(1)" - line 253, "pan.___", state 1305, "(1)" - line 257, "pan.___", state 1313, "(1)" - line 268, "pan.___", state 1330, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1332, "(1)" - line 272, "pan.___", state 1339, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1341, "(1)" - line 272, "pan.___", state 1342, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1342, "else" - line 270, "pan.___", state 1347, "((i<1))" - line 270, "pan.___", state 1347, "((i>=1))" - line 276, "pan.___", state 1352, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1354, "(1)" - line 276, "pan.___", state 1355, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1355, "else" - line 280, "pan.___", state 1361, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1363, "(1)" - line 280, "pan.___", state 1364, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1364, "else" - line 278, "pan.___", state 1369, "((i<2))" - line 278, "pan.___", state 1369, "((i>=2))" - line 245, "pan.___", state 1377, "(1)" - line 249, "pan.___", state 1385, "(1)" - line 249, "pan.___", state 1386, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1386, "else" - line 247, "pan.___", state 1391, "((i<1))" - line 247, "pan.___", state 1391, "((i>=1))" - line 253, "pan.___", state 1397, "(1)" - line 253, "pan.___", state 1398, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1398, "else" - line 257, "pan.___", state 1405, "(1)" - line 257, "pan.___", state 1406, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1406, "else" - line 262, "pan.___", state 1415, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1415, "else" - line 1296, "pan.___", state 1418, "i = 0" - line 1296, "pan.___", state 1420, "reader_barrier = 1" - line 1296, "pan.___", state 1431, "((i<1))" - line 1296, "pan.___", state 1431, "((i>=1))" - line 268, "pan.___", state 1436, "cache_dirty_urcu_gp_ctr = 0" - line 268, "pan.___", state 1438, "(1)" - line 272, "pan.___", state 1445, "cache_dirty_urcu_active_readers = 0" - line 272, "pan.___", state 1447, "(1)" - line 272, "pan.___", state 1448, "(cache_dirty_urcu_active_readers)" - line 272, "pan.___", state 1448, "else" - line 270, "pan.___", state 1453, "((i<1))" - line 270, "pan.___", state 1453, "((i>=1))" - line 276, "pan.___", state 1458, "cache_dirty_rcu_ptr = 0" - line 276, "pan.___", state 1460, "(1)" - line 276, "pan.___", state 1461, "(cache_dirty_rcu_ptr)" - line 276, "pan.___", state 1461, "else" - line 280, "pan.___", state 1467, "cache_dirty_rcu_data[i] = 0" - line 280, "pan.___", state 1469, "(1)" - line 280, "pan.___", state 1470, "(cache_dirty_rcu_data[i])" - line 280, "pan.___", state 1470, "else" - line 278, "pan.___", state 1475, "((i<2))" - line 278, "pan.___", state 1475, "((i>=2))" - line 245, "pan.___", state 1483, "(1)" - line 249, "pan.___", state 1491, "(1)" - line 249, "pan.___", state 1492, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 1492, "else" - line 247, "pan.___", state 1497, "((i<1))" - line 247, "pan.___", state 1497, "((i>=1))" - line 253, "pan.___", state 1503, "(1)" - line 253, "pan.___", state 1504, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 1504, "else" - line 257, "pan.___", state 1511, "(1)" - line 257, "pan.___", state 1512, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 1512, "else" - line 262, "pan.___", state 1521, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 1521, "else" - line 295, "pan.___", state 1523, "(cache_dirty_urcu_gp_ctr)" - line 295, "pan.___", state 1523, "else" - line 1296, "pan.___", state 1524, "(cache_dirty_urcu_gp_ctr)" - line 1296, "pan.___", state 1524, "else" - line 272, "pan.___", state 1537, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1550, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1559, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1575, "(1)" - line 249, "pan.___", state 1583, "(1)" - line 253, "pan.___", state 1595, "(1)" - line 257, "pan.___", state 1603, "(1)" - line 268, "pan.___", state 1634, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1643, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1656, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1665, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1681, "(1)" - line 249, "pan.___", state 1689, "(1)" - line 253, "pan.___", state 1701, "(1)" - line 257, "pan.___", state 1709, "(1)" - line 1304, "pan.___", state 1725, "-end-" - (212 of 1725 states) -unreached in proctype :init: - line 1319, "pan.___", state 13, "((i<1))" - line 1319, "pan.___", state 13, "((i>=1))" - (1 of 28 states) -unreached in proctype :never: - line 1367, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.71e+04 seconds -pan: rate 2490.8226 states/second -pan: avg transition delay 1.5631e-06 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input deleted file mode 100644 index 602bb6c..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,1340 +0,0 @@ -#define SINGLE_FLIP - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 6a83ce1..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1442 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4651 -2:2:2896 -3:2:2901 -4:2:2905 -5:2:2913 -6:2:2917 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-1432:0:4651 -1433:2:3920 -1434:0:4651 -1435:1:1342 -1436:1:1343 -1437:0:4649 -1438:2:3921 -1439:0:4655 -1440:1:2458 diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress.ltl b/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_reader.define b/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_writer.define b/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-alpha-ipi/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/.input.spin b/formal-model/urcu-controldataflow-alpha-no-ipi/.input.spin deleted file mode 100644 index b59aa77..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/.input.spin +++ /dev/null @@ -1,1272 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/DEFINES b/formal-model/urcu-controldataflow-alpha-no-ipi/DEFINES deleted file mode 100644 index a1008a6..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/DEFINES +++ /dev/null @@ -1,18 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/Makefile b/formal-model/urcu-controldataflow-alpha-no-ipi/Makefile deleted file mode 100644 index de47dff..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/Makefile +++ /dev/null @@ -1,170 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/asserts.log b/formal-model/urcu-controldataflow-alpha-no-ipi/asserts.log deleted file mode 100644 index 9a18131..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/asserts.log +++ /dev/null @@ -1,468 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 4773 States= 1e+06 Transitions= 6.22e+08 Memory= 542.717 t= 624 R= 2e+03 -Depth= 5040 States= 2e+06 Transitions= 1.3e+09 Memory= 618.986 t= 1.33e+03 R= 1e+03 -Depth= 5040 States= 3e+06 Transitions= 1.95e+09 Memory= 695.256 t= 2.03e+03 R= 1e+03 -pan: resizing hashtable to -w22.. done -Depth= 5040 States= 4e+06 Transitions= 2.64e+09 Memory= 802.647 t= 2.73e+03 R= 1e+03 -Depth= 5040 States= 5e+06 Transitions= 3.3e+09 Memory= 878.916 t= 3.41e+03 R= 1e+03 -Depth= 5141 States= 6e+06 Transitions= 3.99e+09 Memory= 955.186 t= 4.12e+03 R= 1e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 72 byte, depth reached 5141, errors: 0 - 6711104 states, stored -4.4393201e+09 states, matched -4.4460312e+09 transitions (= stored+matched) -2.5322962e+10 atomic steps -hash conflicts: 3.3332015e+09 (resolved) - -Stats on memory usage (in Megabytes): - 640.021 equivalent memory usage for states (stored*(State-vector + overhead)) - 519.783 actual memory usage for states (compression: 81.21%) - state-vector as stored = 53 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 1009.483 total actual memory usage - -unreached in proctype urcu_reader - line 410, ".input.spin", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 82, "(1)" - line 437, ".input.spin", state 112, "(1)" - line 441, ".input.spin", state 125, "(1)" - line 596, ".input.spin", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 410, ".input.spin", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 218, "(1)" - line 437, ".input.spin", state 248, "(1)" - line 441, ".input.spin", state 261, "(1)" - line 410, ".input.spin", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 347, "(1)" - line 437, ".input.spin", state 377, "(1)" - line 441, ".input.spin", state 390, "(1)" - line 410, ".input.spin", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 415, "(1)" - line 410, ".input.spin", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, ".input.spin", state 416, "else" - line 410, ".input.spin", state 419, "(1)" - line 414, ".input.spin", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 429, "(1)" - line 414, ".input.spin", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, ".input.spin", state 430, "else" - line 414, ".input.spin", state 433, "(1)" - line 414, ".input.spin", state 434, "(1)" - line 414, ".input.spin", state 434, "(1)" - line 412, ".input.spin", state 439, "((i<1))" - line 412, ".input.spin", state 439, "((i>=1))" - line 419, ".input.spin", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 447, "(1)" - line 419, ".input.spin", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, ".input.spin", state 448, "else" - line 419, ".input.spin", state 451, "(1)" - line 419, ".input.spin", state 452, "(1)" - line 419, ".input.spin", state 452, "(1)" - line 423, ".input.spin", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 461, "(1)" - line 423, ".input.spin", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, ".input.spin", state 462, "else" - line 423, ".input.spin", state 465, "(1)" - line 423, ".input.spin", state 466, "(1)" - line 423, ".input.spin", state 466, "(1)" - line 421, ".input.spin", state 471, "((i<2))" - line 421, ".input.spin", state 471, "((i>=2))" - line 428, ".input.spin", state 478, "(1)" - line 428, ".input.spin", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 428, ".input.spin", state 479, "else" - line 428, ".input.spin", state 482, "(1)" - line 428, ".input.spin", state 483, "(1)" - line 428, ".input.spin", state 483, "(1)" - line 432, ".input.spin", state 491, "(1)" - line 432, ".input.spin", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 432, ".input.spin", state 492, "else" - line 432, ".input.spin", state 495, "(1)" - line 432, ".input.spin", state 496, "(1)" - line 432, ".input.spin", state 496, "(1)" - line 430, ".input.spin", state 501, "((i<1))" - line 430, ".input.spin", state 501, "((i>=1))" - line 437, ".input.spin", state 508, "(1)" - line 437, ".input.spin", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 437, ".input.spin", state 509, "else" - line 437, ".input.spin", state 512, "(1)" - line 437, ".input.spin", state 513, "(1)" - line 437, ".input.spin", state 513, "(1)" - line 441, ".input.spin", state 521, "(1)" - line 441, ".input.spin", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 441, ".input.spin", state 522, "else" - line 441, ".input.spin", state 525, "(1)" - line 441, ".input.spin", state 526, "(1)" - line 441, ".input.spin", state 526, "(1)" - line 439, ".input.spin", state 531, "((i<2))" - line 439, ".input.spin", state 531, "((i>=2))" - line 449, ".input.spin", state 535, "(1)" - line 449, ".input.spin", state 535, "(1)" - line 596, ".input.spin", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 596, ".input.spin", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 596, ".input.spin", state 540, "(1)" - line 271, ".input.spin", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 555, "(1)" - line 279, ".input.spin", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 591, "(1)" - line 252, ".input.spin", state 599, "(1)" - line 256, ".input.spin", state 611, "(1)" - line 260, ".input.spin", state 619, "(1)" - line 410, ".input.spin", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 702, "(1)" - line 432, ".input.spin", state 715, "(1)" - line 437, ".input.spin", state 732, "(1)" - line 441, ".input.spin", state 745, "(1)" - line 410, ".input.spin", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 838, "(1)" - line 437, ".input.spin", state 868, "(1)" - line 441, ".input.spin", state 881, "(1)" - line 410, ".input.spin", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 904, "(1)" - line 410, ".input.spin", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, ".input.spin", state 905, "else" - line 410, ".input.spin", state 908, "(1)" - line 414, ".input.spin", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 918, "(1)" - line 414, ".input.spin", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, ".input.spin", state 919, "else" - line 414, ".input.spin", state 922, "(1)" - line 414, ".input.spin", state 923, "(1)" - line 414, ".input.spin", state 923, "(1)" - line 412, ".input.spin", state 928, "((i<1))" - line 412, ".input.spin", state 928, "((i>=1))" - line 419, ".input.spin", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 936, "(1)" - line 419, ".input.spin", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, ".input.spin", state 937, "else" - line 419, ".input.spin", state 940, "(1)" - line 419, ".input.spin", state 941, "(1)" - line 419, ".input.spin", state 941, "(1)" - line 423, ".input.spin", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 950, "(1)" - line 423, ".input.spin", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, ".input.spin", state 951, "else" - line 423, ".input.spin", state 954, "(1)" - line 423, ".input.spin", state 955, "(1)" - line 423, ".input.spin", state 955, "(1)" - line 421, ".input.spin", state 960, "((i<2))" - line 421, ".input.spin", state 960, "((i>=2))" - line 428, ".input.spin", state 967, "(1)" - line 428, ".input.spin", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 428, ".input.spin", state 968, "else" - line 428, ".input.spin", state 971, "(1)" - line 428, ".input.spin", state 972, "(1)" - line 428, ".input.spin", state 972, "(1)" - line 432, ".input.spin", state 980, "(1)" - line 432, ".input.spin", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 432, ".input.spin", state 981, "else" - line 432, ".input.spin", state 984, "(1)" - line 432, ".input.spin", state 985, "(1)" - line 432, ".input.spin", state 985, "(1)" - line 430, ".input.spin", state 990, "((i<1))" - line 430, ".input.spin", state 990, "((i>=1))" - line 437, ".input.spin", state 997, "(1)" - line 437, ".input.spin", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 437, ".input.spin", state 998, "else" - line 437, ".input.spin", state 1001, "(1)" - line 437, ".input.spin", state 1002, "(1)" - line 437, ".input.spin", state 1002, "(1)" - line 441, ".input.spin", state 1010, "(1)" - line 441, ".input.spin", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 441, ".input.spin", state 1011, "else" - line 441, ".input.spin", state 1014, "(1)" - line 441, ".input.spin", state 1015, "(1)" - line 441, ".input.spin", state 1015, "(1)" - line 439, ".input.spin", state 1020, "((i<2))" - line 439, ".input.spin", state 1020, "((i>=2))" - line 449, ".input.spin", state 1024, "(1)" - line 449, ".input.spin", state 1024, "(1)" - line 604, ".input.spin", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 410, ".input.spin", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 1098, "(1)" - line 432, ".input.spin", state 1111, "(1)" - line 437, ".input.spin", state 1128, "(1)" - line 441, ".input.spin", state 1141, "(1)" - line 410, ".input.spin", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 1230, "(1)" - line 437, ".input.spin", state 1260, "(1)" - line 441, ".input.spin", state 1273, "(1)" - line 410, ".input.spin", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 1363, "(1)" - line 437, ".input.spin", state 1393, "(1)" - line 441, ".input.spin", state 1406, "(1)" - line 410, ".input.spin", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 1492, "(1)" - line 437, ".input.spin", state 1522, "(1)" - line 441, ".input.spin", state 1535, "(1)" - line 271, ".input.spin", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1605, "(1)" - line 252, ".input.spin", state 1613, "(1)" - line 256, ".input.spin", state 1625, "(1)" - line 260, ".input.spin", state 1633, "(1)" - line 410, ".input.spin", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 1716, "(1)" - line 432, ".input.spin", state 1729, "(1)" - line 437, ".input.spin", state 1746, "(1)" - line 441, ".input.spin", state 1759, "(1)" - line 410, ".input.spin", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 1845, "(1)" - line 432, ".input.spin", state 1858, "(1)" - line 437, ".input.spin", state 1875, "(1)" - line 441, ".input.spin", state 1888, "(1)" - line 410, ".input.spin", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 1977, "(1)" - line 437, ".input.spin", state 2007, "(1)" - line 441, ".input.spin", state 2020, "(1)" - line 643, ".input.spin", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 410, ".input.spin", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 2113, "(1)" - line 437, ".input.spin", state 2143, "(1)" - line 441, ".input.spin", state 2156, "(1)" - line 410, ".input.spin", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 2242, "(1)" - line 437, ".input.spin", state 2272, "(1)" - line 441, ".input.spin", state 2285, "(1)" - line 410, ".input.spin", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 2310, "(1)" - line 410, ".input.spin", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, ".input.spin", state 2311, "else" - line 410, ".input.spin", state 2314, "(1)" - line 414, ".input.spin", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2324, "(1)" - line 414, ".input.spin", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, ".input.spin", state 2325, "else" - line 414, ".input.spin", state 2328, "(1)" - line 414, ".input.spin", state 2329, "(1)" - line 414, ".input.spin", state 2329, "(1)" - line 412, ".input.spin", state 2334, "((i<1))" - line 412, ".input.spin", state 2334, "((i>=1))" - line 419, ".input.spin", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2342, "(1)" - line 419, ".input.spin", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, ".input.spin", state 2343, "else" - line 419, ".input.spin", state 2346, "(1)" - line 419, ".input.spin", state 2347, "(1)" - line 419, ".input.spin", state 2347, "(1)" - line 423, ".input.spin", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2356, "(1)" - line 423, ".input.spin", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, ".input.spin", state 2357, "else" - line 423, ".input.spin", state 2360, "(1)" - line 423, ".input.spin", state 2361, "(1)" - line 423, ".input.spin", state 2361, "(1)" - line 421, ".input.spin", state 2366, "((i<2))" - line 421, ".input.spin", state 2366, "((i>=2))" - line 428, ".input.spin", state 2373, "(1)" - line 428, ".input.spin", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 428, ".input.spin", state 2374, "else" - line 428, ".input.spin", state 2377, "(1)" - line 428, ".input.spin", state 2378, "(1)" - line 428, ".input.spin", state 2378, "(1)" - line 432, ".input.spin", state 2386, "(1)" - line 432, ".input.spin", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 432, ".input.spin", state 2387, "else" - line 432, ".input.spin", state 2390, "(1)" - line 432, ".input.spin", state 2391, "(1)" - line 432, ".input.spin", state 2391, "(1)" - line 430, ".input.spin", state 2396, "((i<1))" - line 430, ".input.spin", state 2396, "((i>=1))" - line 437, ".input.spin", state 2403, "(1)" - line 437, ".input.spin", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 437, ".input.spin", state 2404, "else" - line 437, ".input.spin", state 2407, "(1)" - line 437, ".input.spin", state 2408, "(1)" - line 437, ".input.spin", state 2408, "(1)" - line 441, ".input.spin", state 2416, "(1)" - line 441, ".input.spin", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 441, ".input.spin", state 2417, "else" - line 441, ".input.spin", state 2420, "(1)" - line 441, ".input.spin", state 2421, "(1)" - line 441, ".input.spin", state 2421, "(1)" - line 439, ".input.spin", state 2426, "((i<2))" - line 439, ".input.spin", state 2426, "((i>=2))" - line 449, ".input.spin", state 2430, "(1)" - line 449, ".input.spin", state 2430, "(1)" - line 643, ".input.spin", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 643, ".input.spin", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 643, ".input.spin", state 2435, "(1)" - line 271, ".input.spin", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 2486, "(1)" - line 252, ".input.spin", state 2494, "(1)" - line 256, ".input.spin", state 2506, "(1)" - line 260, ".input.spin", state 2514, "(1)" - line 410, ".input.spin", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 2597, "(1)" - line 432, ".input.spin", state 2610, "(1)" - line 437, ".input.spin", state 2627, "(1)" - line 441, ".input.spin", state 2640, "(1)" - line 271, ".input.spin", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 2711, "(1)" - line 252, ".input.spin", state 2719, "(1)" - line 256, ".input.spin", state 2731, "(1)" - line 260, ".input.spin", state 2739, "(1)" - line 410, ".input.spin", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 2822, "(1)" - line 432, ".input.spin", state 2835, "(1)" - line 437, ".input.spin", state 2852, "(1)" - line 441, ".input.spin", state 2865, "(1)" - line 410, ".input.spin", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 2951, "(1)" - line 432, ".input.spin", state 2964, "(1)" - line 437, ".input.spin", state 2981, "(1)" - line 441, ".input.spin", state 2994, "(1)" - line 248, ".input.spin", state 3027, "(1)" - line 256, ".input.spin", state 3047, "(1)" - line 260, ".input.spin", state 3055, "(1)" - line 248, ".input.spin", state 3070, "(1)" - line 252, ".input.spin", state 3078, "(1)" - line 256, ".input.spin", state 3090, "(1)" - line 260, ".input.spin", state 3098, "(1)" - line 897, ".input.spin", state 3115, "-end-" - (283 of 3115 states) -unreached in proctype urcu_writer - line 410, ".input.spin", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 83, "(1)" - line 432, ".input.spin", state 96, "(1)" - line 437, ".input.spin", state 113, "(1)" - line 271, ".input.spin", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, ".input.spin", state 276, "(1)" - line 432, ".input.spin", state 289, "(1)" - line 437, ".input.spin", state 306, "(1)" - line 441, ".input.spin", state 319, "(1)" - line 414, ".input.spin", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, ".input.spin", state 420, "(1)" - line 437, ".input.spin", state 437, "(1)" - line 441, ".input.spin", state 450, "(1)" - line 414, ".input.spin", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, ".input.spin", state 559, "(1)" - line 437, ".input.spin", state 576, "(1)" - line 441, ".input.spin", state 589, "(1)" - line 414, ".input.spin", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, ".input.spin", state 688, "(1)" - line 437, ".input.spin", state 705, "(1)" - line 441, ".input.spin", state 718, "(1)" - line 414, ".input.spin", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, ".input.spin", state 819, "(1)" - line 437, ".input.spin", state 836, "(1)" - line 441, ".input.spin", state 849, "(1)" - line 271, ".input.spin", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 928, "(1)" - line 283, ".input.spin", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 951, "(1)" - line 252, ".input.spin", state 959, "(1)" - line 256, ".input.spin", state 971, "(1)" - line 260, ".input.spin", state 979, "(1)" - line 275, ".input.spin", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1042, "(1)" - line 252, ".input.spin", state 1050, "(1)" - line 256, ".input.spin", state 1062, "(1)" - line 260, ".input.spin", state 1070, "(1)" - line 275, ".input.spin", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1133, "(1)" - line 252, ".input.spin", state 1141, "(1)" - line 256, ".input.spin", state 1153, "(1)" - line 260, ".input.spin", state 1161, "(1)" - line 275, ".input.spin", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1224, "(1)" - line 252, ".input.spin", state 1232, "(1)" - line 256, ".input.spin", state 1244, "(1)" - line 260, ".input.spin", state 1252, "(1)" - line 1236, ".input.spin", state 1267, "-end-" - (71 of 1267 states) -unreached in proctype :init: - (0 of 78 states) - -pan: elapsed time 4.59e+03 seconds -pan: rate 1460.6376 states/second -pan: avg transition delay 1.0334e-06 usec -cp .input.spin asserts.spin.input -cp .input.spin.trail asserts.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/asserts.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/asserts.spin.input deleted file mode 100644 index b59aa77..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/asserts.spin.input +++ /dev/null @@ -1,1272 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/references.txt b/formal-model/urcu-controldataflow-alpha-no-ipi/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu.sh b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu.spin b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu.spin deleted file mode 100644 index 54752a1..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu.spin +++ /dev/null @@ -1,1254 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.log deleted file mode 100644 index 0802f77..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.log +++ /dev/null @@ -1,479 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1294) -Depth= 5182 States= 1e+06 Transitions= 6.22e+08 Memory= 550.432 t= 762 R= 1e+03 -Depth= 5473 States= 2e+06 Transitions= 1.3e+09 Memory= 634.318 t= 1.62e+03 R= 1e+03 -Depth= 5473 States= 3e+06 Transitions= 1.95e+09 Memory= 718.303 t= 2.47e+03 R= 1e+03 -pan: resizing hashtable to -w22.. done -Depth= 5473 States= 4e+06 Transitions= 2.64e+09 Memory= 833.311 t= 3.32e+03 R= 1e+03 -Depth= 5473 States= 5e+06 Transitions= 3.3e+09 Memory= 917.295 t= 4.14e+03 R= 1e+03 -Depth= 5582 States= 6e+06 Transitions= 3.99e+09 Memory= 1001.279 t= 5e+03 R= 1e+03 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 5582, errors: 0 - 6711104 states, stored -4.4393362e+09 states, matched -4.4460473e+09 transitions (= stored+matched) -2.5322962e+10 atomic steps -hash conflicts: 3.3328749e+09 (resolved) - -Stats on memory usage (in Megabytes): - 742.424 equivalent memory usage for states (stored*(State-vector + overhead)) - 571.575 actual memory usage for states (compression: 76.99%) - state-vector as stored = 61 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 1060.947 total actual memory usage - -unreached in proctype urcu_reader - line 410, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 82, "(1)" - line 437, "pan.___", state 112, "(1)" - line 441, "pan.___", state 125, "(1)" - line 596, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 410, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 218, "(1)" - line 437, "pan.___", state 248, "(1)" - line 441, "pan.___", state 261, "(1)" - line 410, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 347, "(1)" - line 437, "pan.___", state 377, "(1)" - line 441, "pan.___", state 390, "(1)" - line 410, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 415, "(1)" - line 410, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 416, "else" - line 410, "pan.___", state 419, "(1)" - line 414, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 429, "(1)" - line 414, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 430, "else" - line 414, "pan.___", state 433, "(1)" - line 414, "pan.___", state 434, "(1)" - line 414, "pan.___", state 434, "(1)" - line 412, "pan.___", state 439, "((i<1))" - line 412, "pan.___", state 439, "((i>=1))" - line 419, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 447, "(1)" - line 419, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 448, "else" - line 419, "pan.___", state 451, "(1)" - line 419, "pan.___", state 452, "(1)" - line 419, "pan.___", state 452, "(1)" - line 423, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 461, "(1)" - line 423, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 462, "else" - line 423, "pan.___", state 465, "(1)" - line 423, "pan.___", state 466, "(1)" - line 423, "pan.___", state 466, "(1)" - line 421, "pan.___", state 471, "((i<2))" - line 421, "pan.___", state 471, "((i>=2))" - line 428, "pan.___", state 478, "(1)" - line 428, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 428, "pan.___", state 479, "else" - line 428, "pan.___", state 482, "(1)" - line 428, "pan.___", state 483, "(1)" - line 428, "pan.___", state 483, "(1)" - line 432, "pan.___", state 491, "(1)" - line 432, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 432, "pan.___", state 492, "else" - line 432, "pan.___", state 495, "(1)" - line 432, "pan.___", state 496, "(1)" - line 432, "pan.___", state 496, "(1)" - line 430, "pan.___", state 501, "((i<1))" - line 430, "pan.___", state 501, "((i>=1))" - line 437, "pan.___", state 508, "(1)" - line 437, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 437, "pan.___", state 509, "else" - line 437, "pan.___", state 512, "(1)" - line 437, "pan.___", state 513, "(1)" - line 437, "pan.___", state 513, "(1)" - line 441, "pan.___", state 521, "(1)" - line 441, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 441, "pan.___", state 522, "else" - line 441, "pan.___", state 525, "(1)" - line 441, "pan.___", state 526, "(1)" - line 441, "pan.___", state 526, "(1)" - line 439, "pan.___", state 531, "((i<2))" - line 439, "pan.___", state 531, "((i>=2))" - line 449, "pan.___", state 535, "(1)" - line 449, "pan.___", state 535, "(1)" - line 596, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 596, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 596, "pan.___", state 540, "(1)" - line 271, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 555, "(1)" - line 279, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 591, "(1)" - line 252, "pan.___", state 599, "(1)" - line 256, "pan.___", state 611, "(1)" - line 260, "pan.___", state 619, "(1)" - line 410, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 702, "(1)" - line 432, "pan.___", state 715, "(1)" - line 437, "pan.___", state 732, "(1)" - line 441, "pan.___", state 745, "(1)" - line 410, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 838, "(1)" - line 437, "pan.___", state 868, "(1)" - line 441, "pan.___", state 881, "(1)" - line 410, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 904, "(1)" - line 410, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 905, "else" - line 410, "pan.___", state 908, "(1)" - line 414, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 918, "(1)" - line 414, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 919, "else" - line 414, "pan.___", state 922, "(1)" - line 414, "pan.___", state 923, "(1)" - line 414, "pan.___", state 923, "(1)" - line 412, "pan.___", state 928, "((i<1))" - line 412, "pan.___", state 928, "((i>=1))" - line 419, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 936, "(1)" - line 419, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 937, "else" - line 419, "pan.___", state 940, "(1)" - line 419, "pan.___", state 941, "(1)" - line 419, "pan.___", state 941, "(1)" - line 423, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 950, "(1)" - line 423, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 951, "else" - line 423, "pan.___", state 954, "(1)" - line 423, "pan.___", state 955, "(1)" - line 423, "pan.___", state 955, "(1)" - line 421, "pan.___", state 960, "((i<2))" - line 421, "pan.___", state 960, "((i>=2))" - line 428, "pan.___", state 967, "(1)" - line 428, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 428, "pan.___", state 968, "else" - line 428, "pan.___", state 971, "(1)" - line 428, "pan.___", state 972, "(1)" - line 428, "pan.___", state 972, "(1)" - line 432, "pan.___", state 980, "(1)" - line 432, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 432, "pan.___", state 981, "else" - line 432, "pan.___", state 984, "(1)" - line 432, "pan.___", state 985, "(1)" - line 432, "pan.___", state 985, "(1)" - line 430, "pan.___", state 990, "((i<1))" - line 430, "pan.___", state 990, "((i>=1))" - line 437, "pan.___", state 997, "(1)" - line 437, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 437, "pan.___", state 998, "else" - line 437, "pan.___", state 1001, "(1)" - line 437, "pan.___", state 1002, "(1)" - line 437, "pan.___", state 1002, "(1)" - line 441, "pan.___", state 1010, "(1)" - line 441, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 441, "pan.___", state 1011, "else" - line 441, "pan.___", state 1014, "(1)" - line 441, "pan.___", state 1015, "(1)" - line 441, "pan.___", state 1015, "(1)" - line 439, "pan.___", state 1020, "((i<2))" - line 439, "pan.___", state 1020, "((i>=2))" - line 449, "pan.___", state 1024, "(1)" - line 449, "pan.___", state 1024, "(1)" - line 604, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 410, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 1098, "(1)" - line 432, "pan.___", state 1111, "(1)" - line 437, "pan.___", state 1128, "(1)" - line 441, "pan.___", state 1141, "(1)" - line 410, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 1230, "(1)" - line 437, "pan.___", state 1260, "(1)" - line 441, "pan.___", state 1273, "(1)" - line 410, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 1363, "(1)" - line 437, "pan.___", state 1393, "(1)" - line 441, "pan.___", state 1406, "(1)" - line 410, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 1492, "(1)" - line 437, "pan.___", state 1522, "(1)" - line 441, "pan.___", state 1535, "(1)" - line 271, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1605, "(1)" - line 252, "pan.___", state 1613, "(1)" - line 256, "pan.___", state 1625, "(1)" - line 260, "pan.___", state 1633, "(1)" - line 410, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 1716, "(1)" - line 432, "pan.___", state 1729, "(1)" - line 437, "pan.___", state 1746, "(1)" - line 441, "pan.___", state 1759, "(1)" - line 410, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 1845, "(1)" - line 432, "pan.___", state 1858, "(1)" - line 437, "pan.___", state 1875, "(1)" - line 441, "pan.___", state 1888, "(1)" - line 410, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 1977, "(1)" - line 437, "pan.___", state 2007, "(1)" - line 441, "pan.___", state 2020, "(1)" - line 643, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 410, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 2113, "(1)" - line 437, "pan.___", state 2143, "(1)" - line 441, "pan.___", state 2156, "(1)" - line 410, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 2242, "(1)" - line 437, "pan.___", state 2272, "(1)" - line 441, "pan.___", state 2285, "(1)" - line 410, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 2310, "(1)" - line 410, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 2311, "else" - line 410, "pan.___", state 2314, "(1)" - line 414, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2324, "(1)" - line 414, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 2325, "else" - line 414, "pan.___", state 2328, "(1)" - line 414, "pan.___", state 2329, "(1)" - line 414, "pan.___", state 2329, "(1)" - line 412, "pan.___", state 2334, "((i<1))" - line 412, "pan.___", state 2334, "((i>=1))" - line 419, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2342, "(1)" - line 419, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 2343, "else" - line 419, "pan.___", state 2346, "(1)" - line 419, "pan.___", state 2347, "(1)" - line 419, "pan.___", state 2347, "(1)" - line 423, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2356, "(1)" - line 423, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 2357, "else" - line 423, "pan.___", state 2360, "(1)" - line 423, "pan.___", state 2361, "(1)" - line 423, "pan.___", state 2361, "(1)" - line 421, "pan.___", state 2366, "((i<2))" - line 421, "pan.___", state 2366, "((i>=2))" - line 428, "pan.___", state 2373, "(1)" - line 428, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 428, "pan.___", state 2374, "else" - line 428, "pan.___", state 2377, "(1)" - line 428, "pan.___", state 2378, "(1)" - line 428, "pan.___", state 2378, "(1)" - line 432, "pan.___", state 2386, "(1)" - line 432, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 432, "pan.___", state 2387, "else" - line 432, "pan.___", state 2390, "(1)" - line 432, "pan.___", state 2391, "(1)" - line 432, "pan.___", state 2391, "(1)" - line 430, "pan.___", state 2396, "((i<1))" - line 430, "pan.___", state 2396, "((i>=1))" - line 437, "pan.___", state 2403, "(1)" - line 437, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 437, "pan.___", state 2404, "else" - line 437, "pan.___", state 2407, "(1)" - line 437, "pan.___", state 2408, "(1)" - line 437, "pan.___", state 2408, "(1)" - line 441, "pan.___", state 2416, "(1)" - line 441, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 441, "pan.___", state 2417, "else" - line 441, "pan.___", state 2420, "(1)" - line 441, "pan.___", state 2421, "(1)" - line 441, "pan.___", state 2421, "(1)" - line 439, "pan.___", state 2426, "((i<2))" - line 439, "pan.___", state 2426, "((i>=2))" - line 449, "pan.___", state 2430, "(1)" - line 449, "pan.___", state 2430, "(1)" - line 643, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 643, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 643, "pan.___", state 2435, "(1)" - line 271, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2486, "(1)" - line 252, "pan.___", state 2494, "(1)" - line 256, "pan.___", state 2506, "(1)" - line 260, "pan.___", state 2514, "(1)" - line 410, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 2597, "(1)" - line 432, "pan.___", state 2610, "(1)" - line 437, "pan.___", state 2627, "(1)" - line 441, "pan.___", state 2640, "(1)" - line 271, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2711, "(1)" - line 252, "pan.___", state 2719, "(1)" - line 256, "pan.___", state 2731, "(1)" - line 260, "pan.___", state 2739, "(1)" - line 410, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 2822, "(1)" - line 432, "pan.___", state 2835, "(1)" - line 437, "pan.___", state 2852, "(1)" - line 441, "pan.___", state 2865, "(1)" - line 410, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 2951, "(1)" - line 432, "pan.___", state 2964, "(1)" - line 437, "pan.___", state 2981, "(1)" - line 441, "pan.___", state 2994, "(1)" - line 248, "pan.___", state 3027, "(1)" - line 256, "pan.___", state 3047, "(1)" - line 260, "pan.___", state 3055, "(1)" - line 248, "pan.___", state 3070, "(1)" - line 252, "pan.___", state 3078, "(1)" - line 256, "pan.___", state 3090, "(1)" - line 260, "pan.___", state 3098, "(1)" - line 897, "pan.___", state 3115, "-end-" - (283 of 3115 states) -unreached in proctype urcu_writer - line 410, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 428, "pan.___", state 83, "(1)" - line 432, "pan.___", state 96, "(1)" - line 437, "pan.___", state 113, "(1)" - line 271, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 428, "pan.___", state 276, "(1)" - line 432, "pan.___", state 289, "(1)" - line 437, "pan.___", state 306, "(1)" - line 441, "pan.___", state 319, "(1)" - line 414, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, "pan.___", state 420, "(1)" - line 437, "pan.___", state 437, "(1)" - line 441, "pan.___", state 450, "(1)" - line 414, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, "pan.___", state 559, "(1)" - line 437, "pan.___", state 576, "(1)" - line 441, "pan.___", state 589, "(1)" - line 414, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, "pan.___", state 688, "(1)" - line 437, "pan.___", state 705, "(1)" - line 441, "pan.___", state 718, "(1)" - line 414, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 432, "pan.___", state 819, "(1)" - line 437, "pan.___", state 836, "(1)" - line 441, "pan.___", state 849, "(1)" - line 271, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 928, "(1)" - line 283, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 951, "(1)" - line 252, "pan.___", state 959, "(1)" - line 256, "pan.___", state 971, "(1)" - line 260, "pan.___", state 979, "(1)" - line 275, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1042, "(1)" - line 252, "pan.___", state 1050, "(1)" - line 256, "pan.___", state 1062, "(1)" - line 260, "pan.___", state 1070, "(1)" - line 275, "pan.___", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1133, "(1)" - line 252, "pan.___", state 1141, "(1)" - line 256, "pan.___", state 1153, "(1)" - line 260, "pan.___", state 1161, "(1)" - line 275, "pan.___", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1224, "(1)" - line 252, "pan.___", state 1232, "(1)" - line 256, "pan.___", state 1244, "(1)" - line 260, "pan.___", state 1252, "(1)" - line 1236, "pan.___", state 1267, "-end-" - (71 of 1267 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1299, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 5.57e+03 seconds -pan: rate 1203.9777 states/second -pan: avg transition delay 1.2537e-06 usec -cp .input.spin urcu_free.spin.input -cp .input.spin.trail urcu_free.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.ltl b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.spin.input deleted file mode 100644 index b59aa77..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free.spin.input +++ /dev/null @@ -1,1272 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_nested.define b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.define b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.log deleted file mode 100644 index 5ccd769..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.log +++ /dev/null @@ -1,841 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 5985 States= 1e+06 Transitions= 3.71e+08 Memory= 550.432 t= 439 R= 2e+03 -Depth= 8926 States= 2e+06 Transitions= 9.51e+08 Memory= 634.416 t= 1.15e+03 R= 2e+03 -Depth= 8926 States= 3e+06 Transitions= 1.54e+09 Memory= 718.303 t= 1.89e+03 R= 2e+03 -pan: resizing hashtable to -w22.. done -Depth= 8926 States= 4e+06 Transitions= 2.08e+09 Memory= 833.311 t= 2.56e+03 R= 2e+03 -Depth= 8926 States= 5e+06 Transitions= 2.46e+09 Memory= 917.295 t= 3.01e+03 R= 2e+03 -Depth= 8926 States= 6e+06 Transitions= 2.91e+09 Memory= 1001.279 t= 3.56e+03 R= 2e+03 -pan: claim violated! (at depth 1267) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 8926, errors: 1 - 6822337 states, stored -3.2012922e+09 states, matched -3.2081145e+09 transitions (= stored+matched) -1.7190132e+10 atomic steps -hash conflicts: 2.341747e+09 (resolved) - -Stats on memory usage (in Megabytes): - 754.729 equivalent memory usage for states (stored*(State-vector + overhead)) - 580.944 actual memory usage for states (compression: 76.97%) - state-vector as stored = 61 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 1070.322 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 21, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 53, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 67, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 86, "(1)" - line 438, "pan.___", state 116, "(1)" - line 442, "pan.___", state 129, "(1)" - line 603, "pan.___", state 150, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 157, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 189, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 203, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 222, "(1)" - line 438, "pan.___", state 252, "(1)" - line 442, "pan.___", state 265, "(1)" - line 411, "pan.___", state 286, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 318, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 332, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 351, "(1)" - line 438, "pan.___", state 381, "(1)" - line 442, "pan.___", state 394, "(1)" - line 411, "pan.___", state 417, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 419, "(1)" - line 411, "pan.___", state 420, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 420, "else" - line 411, "pan.___", state 423, "(1)" - line 415, "pan.___", state 431, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 433, "(1)" - line 415, "pan.___", state 434, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 434, "else" - line 415, "pan.___", state 437, "(1)" - line 415, "pan.___", state 438, "(1)" - line 415, "pan.___", state 438, "(1)" - line 413, "pan.___", state 443, "((i<1))" - line 413, "pan.___", state 443, "((i>=1))" - line 420, "pan.___", state 449, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 451, "(1)" - line 420, "pan.___", state 452, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 452, "else" - line 420, "pan.___", state 455, "(1)" - line 420, "pan.___", state 456, "(1)" - line 420, "pan.___", state 456, "(1)" - line 424, "pan.___", state 463, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 465, "(1)" - line 424, "pan.___", state 466, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 466, "else" - line 424, "pan.___", state 469, "(1)" - line 424, "pan.___", state 470, "(1)" - line 424, "pan.___", state 470, "(1)" - line 422, "pan.___", state 475, "((i<2))" - line 422, "pan.___", state 475, "((i>=2))" - line 429, "pan.___", state 482, "(1)" - line 429, "pan.___", state 483, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 483, "else" - line 429, "pan.___", state 486, "(1)" - line 429, "pan.___", state 487, "(1)" - line 429, "pan.___", state 487, "(1)" - line 433, "pan.___", state 495, "(1)" - line 433, "pan.___", state 496, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 496, "else" - line 433, "pan.___", state 499, "(1)" - line 433, "pan.___", state 500, "(1)" - line 433, "pan.___", state 500, "(1)" - line 431, "pan.___", state 505, "((i<1))" - line 431, "pan.___", state 505, "((i>=1))" - line 438, "pan.___", state 512, "(1)" - line 438, "pan.___", state 513, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 513, "else" - line 438, "pan.___", state 516, "(1)" - line 438, "pan.___", state 517, "(1)" - line 438, "pan.___", state 517, "(1)" - line 442, "pan.___", state 525, "(1)" - line 442, "pan.___", state 526, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 526, "else" - line 442, "pan.___", state 529, "(1)" - line 442, "pan.___", state 530, "(1)" - line 442, "pan.___", state 530, "(1)" - line 440, "pan.___", state 535, "((i<2))" - line 440, "pan.___", state 535, "((i>=2))" - line 450, "pan.___", state 539, "(1)" - line 450, "pan.___", state 539, "(1)" - line 603, "pan.___", state 542, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 603, "pan.___", state 543, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 603, "pan.___", state 544, "(1)" - line 272, "pan.___", state 548, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 550, "(1)" - line 276, "pan.___", state 557, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 559, "(1)" - line 276, "pan.___", state 560, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 560, "else" - line 274, "pan.___", state 565, "((i<1))" - line 274, "pan.___", state 565, "((i>=1))" - line 280, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 572, "(1)" - line 280, "pan.___", state 573, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 573, "else" - line 284, "pan.___", state 579, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 581, "(1)" - line 284, "pan.___", state 582, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 582, "else" - line 282, "pan.___", state 587, "((i<2))" - line 282, "pan.___", state 587, "((i>=2))" - line 249, "pan.___", state 595, "(1)" - line 253, "pan.___", state 603, "(1)" - line 253, "pan.___", state 604, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 604, "else" - line 251, "pan.___", state 609, "((i<1))" - line 251, "pan.___", state 609, "((i>=1))" - line 257, "pan.___", state 615, "(1)" - line 257, "pan.___", state 616, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 616, "else" - line 261, "pan.___", state 623, "(1)" - line 261, "pan.___", state 624, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 624, "else" - line 266, "pan.___", state 633, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 633, "else" - line 299, "pan.___", state 635, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 635, "else" - line 411, "pan.___", state 641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 673, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 687, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 706, "(1)" - line 438, "pan.___", state 736, "(1)" - line 442, "pan.___", state 749, "(1)" - line 411, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 809, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 823, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 842, "(1)" - line 438, "pan.___", state 872, "(1)" - line 442, "pan.___", state 885, "(1)" - line 411, "pan.___", state 906, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 908, "(1)" - line 411, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 909, "else" - line 411, "pan.___", state 912, "(1)" - line 415, "pan.___", state 920, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 922, "(1)" - line 415, "pan.___", state 923, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 923, "else" - line 415, "pan.___", state 926, "(1)" - line 415, "pan.___", state 927, "(1)" - line 415, "pan.___", state 927, "(1)" - line 413, "pan.___", state 932, "((i<1))" - line 413, "pan.___", state 932, "((i>=1))" - line 420, "pan.___", state 938, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 940, "(1)" - line 420, "pan.___", state 941, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 941, "else" - line 420, "pan.___", state 944, "(1)" - line 420, "pan.___", state 945, "(1)" - line 420, "pan.___", state 945, "(1)" - line 424, "pan.___", state 952, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 954, "(1)" - line 424, "pan.___", state 955, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 955, "else" - line 424, "pan.___", state 958, "(1)" - line 424, "pan.___", state 959, "(1)" - line 424, "pan.___", state 959, "(1)" - line 422, "pan.___", state 964, "((i<2))" - line 422, "pan.___", state 964, "((i>=2))" - line 429, "pan.___", state 971, "(1)" - line 429, "pan.___", state 972, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 972, "else" - line 429, "pan.___", state 975, "(1)" - line 429, "pan.___", state 976, "(1)" - line 429, "pan.___", state 976, "(1)" - line 433, "pan.___", state 984, "(1)" - line 433, "pan.___", state 985, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 985, "else" - line 433, "pan.___", state 988, "(1)" - line 433, "pan.___", state 989, "(1)" - line 433, "pan.___", state 989, "(1)" - line 431, "pan.___", state 994, "((i<1))" - line 431, "pan.___", state 994, "((i>=1))" - line 438, "pan.___", state 1001, "(1)" - line 438, "pan.___", state 1002, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 1002, "else" - line 438, "pan.___", state 1005, "(1)" - line 438, "pan.___", state 1006, "(1)" - line 438, "pan.___", state 1006, "(1)" - line 442, "pan.___", state 1014, "(1)" - line 442, "pan.___", state 1015, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 1015, "else" - line 442, "pan.___", state 1018, "(1)" - line 442, "pan.___", state 1019, "(1)" - line 442, "pan.___", state 1019, "(1)" - line 440, "pan.___", state 1024, "((i<2))" - line 440, "pan.___", state 1024, "((i>=2))" - line 450, "pan.___", state 1028, "(1)" - line 450, "pan.___", state 1028, "(1)" - line 611, "pan.___", state 1032, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1069, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1083, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1102, "(1)" - line 438, "pan.___", state 1132, "(1)" - line 442, "pan.___", state 1145, "(1)" - line 411, "pan.___", state 1169, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1201, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1215, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1234, "(1)" - line 438, "pan.___", state 1264, "(1)" - line 442, "pan.___", state 1277, "(1)" - line 411, "pan.___", state 1302, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1334, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1348, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1367, "(1)" - line 438, "pan.___", state 1397, "(1)" - line 442, "pan.___", state 1410, "(1)" - line 411, "pan.___", state 1431, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1463, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1477, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1496, "(1)" - line 438, "pan.___", state 1526, "(1)" - line 442, "pan.___", state 1539, "(1)" - line 272, "pan.___", state 1562, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1564, "(1)" - line 276, "pan.___", state 1571, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1573, "(1)" - line 276, "pan.___", state 1574, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1574, "else" - line 274, "pan.___", state 1579, "((i<1))" - line 274, "pan.___", state 1579, "((i>=1))" - line 280, "pan.___", state 1584, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1586, "(1)" - line 280, "pan.___", state 1587, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1587, "else" - line 284, "pan.___", state 1593, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1595, "(1)" - line 284, "pan.___", state 1596, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1596, "else" - line 282, "pan.___", state 1601, "((i<2))" - line 282, "pan.___", state 1601, "((i>=2))" - line 249, "pan.___", state 1609, "(1)" - line 253, "pan.___", state 1617, "(1)" - line 253, "pan.___", state 1618, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1618, "else" - line 251, "pan.___", state 1623, "((i<1))" - line 251, "pan.___", state 1623, "((i>=1))" - line 257, "pan.___", state 1629, "(1)" - line 257, "pan.___", state 1630, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1630, "else" - line 261, "pan.___", state 1637, "(1)" - line 261, "pan.___", state 1638, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1638, "else" - line 266, "pan.___", state 1647, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1647, "else" - line 299, "pan.___", state 1649, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1649, "else" - line 411, "pan.___", state 1655, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1687, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1701, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1720, "(1)" - line 438, "pan.___", state 1750, "(1)" - line 442, "pan.___", state 1763, "(1)" - line 411, "pan.___", state 1784, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1816, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1830, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1849, "(1)" - line 438, "pan.___", state 1879, "(1)" - line 442, "pan.___", state 1892, "(1)" - line 411, "pan.___", state 1916, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1948, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1962, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1981, "(1)" - line 438, "pan.___", state 2011, "(1)" - line 442, "pan.___", state 2024, "(1)" - line 650, "pan.___", state 2045, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 2052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2084, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2098, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2117, "(1)" - line 438, "pan.___", state 2147, "(1)" - line 442, "pan.___", state 2160, "(1)" - line 411, "pan.___", state 2181, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2213, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2227, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2246, "(1)" - line 438, "pan.___", state 2276, "(1)" - line 442, "pan.___", state 2289, "(1)" - line 411, "pan.___", state 2312, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2314, "(1)" - line 411, "pan.___", state 2315, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2315, "else" - line 411, "pan.___", state 2318, "(1)" - line 415, "pan.___", state 2326, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2328, "(1)" - line 415, "pan.___", state 2329, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2329, "else" - line 415, "pan.___", state 2332, "(1)" - line 415, "pan.___", state 2333, "(1)" - line 415, "pan.___", state 2333, "(1)" - line 413, "pan.___", state 2338, "((i<1))" - line 413, "pan.___", state 2338, "((i>=1))" - line 420, "pan.___", state 2344, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2346, "(1)" - line 420, "pan.___", state 2347, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2347, "else" - line 420, "pan.___", state 2350, "(1)" - line 420, "pan.___", state 2351, "(1)" - line 420, "pan.___", state 2351, "(1)" - line 424, "pan.___", state 2358, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2360, "(1)" - line 424, "pan.___", state 2361, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2361, "else" - line 424, "pan.___", state 2364, "(1)" - line 424, "pan.___", state 2365, "(1)" - line 424, "pan.___", state 2365, "(1)" - line 422, "pan.___", state 2370, "((i<2))" - line 422, "pan.___", state 2370, "((i>=2))" - line 429, "pan.___", state 2377, "(1)" - line 429, "pan.___", state 2378, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 2378, "else" - line 429, "pan.___", state 2381, "(1)" - line 429, "pan.___", state 2382, "(1)" - line 429, "pan.___", state 2382, "(1)" - line 433, "pan.___", state 2390, "(1)" - line 433, "pan.___", state 2391, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 2391, "else" - line 433, "pan.___", state 2394, "(1)" - line 433, "pan.___", state 2395, "(1)" - line 433, "pan.___", state 2395, "(1)" - line 431, "pan.___", state 2400, "((i<1))" - line 431, "pan.___", state 2400, "((i>=1))" - line 438, "pan.___", state 2407, "(1)" - line 438, "pan.___", state 2408, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 2408, "else" - line 438, "pan.___", state 2411, "(1)" - line 438, "pan.___", state 2412, "(1)" - line 438, "pan.___", state 2412, "(1)" - line 442, "pan.___", state 2420, "(1)" - line 442, "pan.___", state 2421, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 2421, "else" - line 442, "pan.___", state 2424, "(1)" - line 442, "pan.___", state 2425, "(1)" - line 442, "pan.___", state 2425, "(1)" - line 440, "pan.___", state 2430, "((i<2))" - line 440, "pan.___", state 2430, "((i>=2))" - line 450, "pan.___", state 2434, "(1)" - line 450, "pan.___", state 2434, "(1)" - line 650, "pan.___", state 2437, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 650, "pan.___", state 2438, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 650, "pan.___", state 2439, "(1)" - line 272, "pan.___", state 2443, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 2445, "(1)" - line 276, "pan.___", state 2452, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2454, "(1)" - line 276, "pan.___", state 2455, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 2455, "else" - line 274, "pan.___", state 2460, "((i<1))" - line 274, "pan.___", state 2460, "((i>=1))" - line 280, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2467, "(1)" - line 280, "pan.___", state 2468, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 2468, "else" - line 284, "pan.___", state 2474, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2476, "(1)" - line 284, "pan.___", state 2477, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 2477, "else" - line 282, "pan.___", state 2482, "((i<2))" - line 282, "pan.___", state 2482, "((i>=2))" - line 249, "pan.___", state 2490, "(1)" - line 253, "pan.___", state 2498, "(1)" - line 253, "pan.___", state 2499, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2499, "else" - line 251, "pan.___", state 2504, "((i<1))" - line 251, "pan.___", state 2504, "((i>=1))" - line 257, "pan.___", state 2510, "(1)" - line 257, "pan.___", state 2511, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2511, "else" - line 261, "pan.___", state 2518, "(1)" - line 261, "pan.___", state 2519, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2519, "else" - line 266, "pan.___", state 2528, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2528, "else" - line 299, "pan.___", state 2530, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 2530, "else" - line 411, "pan.___", state 2536, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2568, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2582, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2601, "(1)" - line 438, "pan.___", state 2631, "(1)" - line 442, "pan.___", state 2644, "(1)" - line 272, "pan.___", state 2668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 2670, "(1)" - line 276, "pan.___", state 2677, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2679, "(1)" - line 276, "pan.___", state 2680, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 2680, "else" - line 274, "pan.___", state 2685, "((i<1))" - line 274, "pan.___", state 2685, "((i>=1))" - line 280, "pan.___", state 2690, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2692, "(1)" - line 280, "pan.___", state 2693, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 2693, "else" - line 284, "pan.___", state 2699, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2701, "(1)" - line 284, "pan.___", state 2702, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 2702, "else" - line 282, "pan.___", state 2707, "((i<2))" - line 282, "pan.___", state 2707, "((i>=2))" - line 249, "pan.___", state 2715, "(1)" - line 253, "pan.___", state 2723, "(1)" - line 253, "pan.___", state 2724, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2724, "else" - line 251, "pan.___", state 2729, "((i<1))" - line 251, "pan.___", state 2729, "((i>=1))" - line 257, "pan.___", state 2735, "(1)" - line 257, "pan.___", state 2736, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2736, "else" - line 261, "pan.___", state 2743, "(1)" - line 261, "pan.___", state 2744, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2744, "else" - line 266, "pan.___", state 2753, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2753, "else" - line 299, "pan.___", state 2755, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 2755, "else" - line 411, "pan.___", state 2761, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2793, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2807, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2826, "(1)" - line 438, "pan.___", state 2856, "(1)" - line 442, "pan.___", state 2869, "(1)" - line 411, "pan.___", state 2890, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2922, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2936, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2955, "(1)" - line 438, "pan.___", state 2985, "(1)" - line 442, "pan.___", state 2998, "(1)" - line 249, "pan.___", state 3031, "(1)" - line 257, "pan.___", state 3051, "(1)" - line 261, "pan.___", state 3059, "(1)" - line 249, "pan.___", state 3074, "(1)" - line 257, "pan.___", state 3094, "(1)" - line 261, "pan.___", state 3102, "(1)" - line 898, "pan.___", state 3119, "-end-" - (330 of 3119 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 20, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 26, "(1)" - line 415, "pan.___", state 34, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 40, "(1)" - line 415, "pan.___", state 41, "(1)" - line 415, "pan.___", state 41, "(1)" - line 413, "pan.___", state 46, "((i<1))" - line 413, "pan.___", state 46, "((i>=1))" - line 420, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 58, "(1)" - line 420, "pan.___", state 59, "(1)" - line 420, "pan.___", state 59, "(1)" - line 424, "pan.___", state 72, "(1)" - line 424, "pan.___", state 73, "(1)" - line 424, "pan.___", state 73, "(1)" - line 422, "pan.___", state 78, "((i<2))" - line 422, "pan.___", state 78, "((i>=2))" - line 429, "pan.___", state 85, "(1)" - line 429, "pan.___", state 86, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 86, "else" - line 429, "pan.___", state 89, "(1)" - line 429, "pan.___", state 90, "(1)" - line 429, "pan.___", state 90, "(1)" - line 433, "pan.___", state 98, "(1)" - line 433, "pan.___", state 99, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 99, "else" - line 433, "pan.___", state 102, "(1)" - line 433, "pan.___", state 103, "(1)" - line 433, "pan.___", state 103, "(1)" - line 431, "pan.___", state 108, "((i<1))" - line 431, "pan.___", state 108, "((i>=1))" - line 438, "pan.___", state 115, "(1)" - line 438, "pan.___", state 116, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 116, "else" - line 438, "pan.___", state 119, "(1)" - line 438, "pan.___", state 120, "(1)" - line 438, "pan.___", state 120, "(1)" - line 442, "pan.___", state 128, "(1)" - line 442, "pan.___", state 129, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 129, "else" - line 442, "pan.___", state 132, "(1)" - line 442, "pan.___", state 133, "(1)" - line 442, "pan.___", state 133, "(1)" - line 440, "pan.___", state 138, "((i<2))" - line 440, "pan.___", state 138, "((i>=2))" - line 450, "pan.___", state 142, "(1)" - line 450, "pan.___", state 142, "(1)" - line 272, "pan.___", state 151, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 160, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 274, "pan.___", state 168, "((i<1))" - line 274, "pan.___", state 168, "((i>=1))" - line 280, "pan.___", state 173, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 1021, "pan.___", state 201, "old_data = cached_rcu_ptr.val[_pid]" - line 1032, "pan.___", state 205, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" - line 411, "pan.___", state 213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 219, "(1)" - line 415, "pan.___", state 227, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 233, "(1)" - line 415, "pan.___", state 234, "(1)" - line 415, "pan.___", state 234, "(1)" - line 413, "pan.___", state 239, "((i<1))" - line 413, "pan.___", state 239, "((i>=1))" - line 420, "pan.___", state 247, "(1)" - line 420, "pan.___", state 248, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 248, "else" - line 420, "pan.___", state 251, "(1)" - line 420, "pan.___", state 252, "(1)" - line 420, "pan.___", state 252, "(1)" - line 424, "pan.___", state 259, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 265, "(1)" - line 424, "pan.___", state 266, "(1)" - line 424, "pan.___", state 266, "(1)" - line 422, "pan.___", state 271, "((i<2))" - line 422, "pan.___", state 271, "((i>=2))" - line 429, "pan.___", state 278, "(1)" - line 429, "pan.___", state 279, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 279, "else" - line 429, "pan.___", state 282, "(1)" - line 429, "pan.___", state 283, "(1)" - line 429, "pan.___", state 283, "(1)" - line 433, "pan.___", state 291, "(1)" - line 433, "pan.___", state 292, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 292, "else" - line 433, "pan.___", state 295, "(1)" - line 433, "pan.___", state 296, "(1)" - line 433, "pan.___", state 296, "(1)" - line 431, "pan.___", state 301, "((i<1))" - line 431, "pan.___", state 301, "((i>=1))" - line 438, "pan.___", state 308, "(1)" - line 438, "pan.___", state 309, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 309, "else" - line 438, "pan.___", state 312, "(1)" - line 438, "pan.___", state 313, "(1)" - line 438, "pan.___", state 313, "(1)" - line 442, "pan.___", state 321, "(1)" - line 442, "pan.___", state 322, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 322, "else" - line 442, "pan.___", state 325, "(1)" - line 442, "pan.___", state 326, "(1)" - line 442, "pan.___", state 326, "(1)" - line 440, "pan.___", state 331, "((i<2))" - line 440, "pan.___", state 331, "((i>=2))" - line 450, "pan.___", state 335, "(1)" - line 450, "pan.___", state 335, "(1)" - line 411, "pan.___", state 346, "(1)" - line 411, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 347, "else" - line 411, "pan.___", state 350, "(1)" - line 415, "pan.___", state 358, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 364, "(1)" - line 415, "pan.___", state 365, "(1)" - line 415, "pan.___", state 365, "(1)" - line 413, "pan.___", state 370, "((i<1))" - line 413, "pan.___", state 370, "((i>=1))" - line 420, "pan.___", state 376, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 382, "(1)" - line 420, "pan.___", state 383, "(1)" - line 420, "pan.___", state 383, "(1)" - line 424, "pan.___", state 390, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 396, "(1)" - line 424, "pan.___", state 397, "(1)" - line 424, "pan.___", state 397, "(1)" - line 422, "pan.___", state 402, "((i<2))" - line 422, "pan.___", state 402, "((i>=2))" - line 429, "pan.___", state 409, "(1)" - line 429, "pan.___", state 410, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 410, "else" - line 429, "pan.___", state 413, "(1)" - line 429, "pan.___", state 414, "(1)" - line 429, "pan.___", state 414, "(1)" - line 433, "pan.___", state 422, "(1)" - line 433, "pan.___", state 423, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 423, "else" - line 433, "pan.___", state 426, "(1)" - line 433, "pan.___", state 427, "(1)" - line 433, "pan.___", state 427, "(1)" - line 431, "pan.___", state 432, "((i<1))" - line 431, "pan.___", state 432, "((i>=1))" - line 438, "pan.___", state 439, "(1)" - line 438, "pan.___", state 440, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 440, "else" - line 438, "pan.___", state 443, "(1)" - line 438, "pan.___", state 444, "(1)" - line 438, "pan.___", state 444, "(1)" - line 442, "pan.___", state 452, "(1)" - line 442, "pan.___", state 453, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 453, "else" - line 442, "pan.___", state 456, "(1)" - line 442, "pan.___", state 457, "(1)" - line 442, "pan.___", state 457, "(1)" - line 440, "pan.___", state 462, "((i<2))" - line 440, "pan.___", state 462, "((i>=2))" - line 450, "pan.___", state 466, "(1)" - line 450, "pan.___", state 466, "(1)" - line 1086, "pan.___", state 477, "_proc_urcu_writer = (_proc_urcu_writer&~((1<<9)))" - line 1091, "pan.___", state 478, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<8)|(1<<7))))" - line 411, "pan.___", state 483, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 489, "(1)" - line 415, "pan.___", state 497, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 503, "(1)" - line 415, "pan.___", state 504, "(1)" - line 415, "pan.___", state 504, "(1)" - line 413, "pan.___", state 509, "((i<1))" - line 413, "pan.___", state 509, "((i>=1))" - line 420, "pan.___", state 515, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 521, "(1)" - line 420, "pan.___", state 522, "(1)" - line 420, "pan.___", state 522, "(1)" - line 424, "pan.___", state 529, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 535, "(1)" - line 424, "pan.___", state 536, "(1)" - line 424, "pan.___", state 536, "(1)" - line 422, "pan.___", state 541, "((i<2))" - line 422, "pan.___", state 541, "((i>=2))" - line 429, "pan.___", state 548, "(1)" - line 429, "pan.___", state 549, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 549, "else" - line 429, "pan.___", state 552, "(1)" - line 429, "pan.___", state 553, "(1)" - line 429, "pan.___", state 553, "(1)" - line 433, "pan.___", state 561, "(1)" - line 433, "pan.___", state 562, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 562, "else" - line 433, "pan.___", state 565, "(1)" - line 433, "pan.___", state 566, "(1)" - line 433, "pan.___", state 566, "(1)" - line 431, "pan.___", state 571, "((i<1))" - line 431, "pan.___", state 571, "((i>=1))" - line 438, "pan.___", state 578, "(1)" - line 438, "pan.___", state 579, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 579, "else" - line 438, "pan.___", state 582, "(1)" - line 438, "pan.___", state 583, "(1)" - line 438, "pan.___", state 583, "(1)" - line 442, "pan.___", state 591, "(1)" - line 442, "pan.___", state 592, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 592, "else" - line 442, "pan.___", state 595, "(1)" - line 442, "pan.___", state 596, "(1)" - line 442, "pan.___", state 596, "(1)" - line 450, "pan.___", state 605, "(1)" - line 450, "pan.___", state 605, "(1)" - line 411, "pan.___", state 612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 626, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 429, "pan.___", state 677, "(1)" - line 433, "pan.___", state 690, "(1)" - line 438, "pan.___", state 707, "(1)" - line 442, "pan.___", state 720, "(1)" - line 415, "pan.___", state 757, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 775, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 789, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 821, "(1)" - line 438, "pan.___", state 838, "(1)" - line 442, "pan.___", state 851, "(1)" - line 1168, "pan.___", state 878, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" - line 272, "pan.___", state 906, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 908, "(1)" - line 276, "pan.___", state 915, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 917, "(1)" - line 276, "pan.___", state 918, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 918, "else" - line 274, "pan.___", state 923, "((i<1))" - line 274, "pan.___", state 923, "((i>=1))" - line 280, "pan.___", state 928, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 930, "(1)" - line 280, "pan.___", state 931, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 931, "else" - line 284, "pan.___", state 937, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 939, "(1)" - line 284, "pan.___", state 940, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 940, "else" - line 282, "pan.___", state 945, "((i<2))" - line 282, "pan.___", state 945, "((i>=2))" - line 249, "pan.___", state 953, "(1)" - line 253, "pan.___", state 961, "(1)" - line 253, "pan.___", state 962, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 962, "else" - line 251, "pan.___", state 967, "((i<1))" - line 251, "pan.___", state 967, "((i>=1))" - line 257, "pan.___", state 973, "(1)" - line 257, "pan.___", state 974, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 974, "else" - line 261, "pan.___", state 981, "(1)" - line 261, "pan.___", state 982, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 982, "else" - line 266, "pan.___", state 991, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 991, "else" - line 299, "pan.___", state 993, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 993, "else" - line 272, "pan.___", state 997, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 999, "(1)" - line 276, "pan.___", state 1006, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1008, "(1)" - line 276, "pan.___", state 1009, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1009, "else" - line 274, "pan.___", state 1014, "((i<1))" - line 274, "pan.___", state 1014, "((i>=1))" - line 280, "pan.___", state 1019, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1021, "(1)" - line 280, "pan.___", state 1022, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1022, "else" - line 284, "pan.___", state 1028, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1030, "(1)" - line 284, "pan.___", state 1031, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1031, "else" - line 282, "pan.___", state 1036, "((i<2))" - line 282, "pan.___", state 1036, "((i>=2))" - line 249, "pan.___", state 1044, "(1)" - line 253, "pan.___", state 1052, "(1)" - line 253, "pan.___", state 1053, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1053, "else" - line 251, "pan.___", state 1058, "((i<1))" - line 251, "pan.___", state 1058, "((i>=1))" - line 257, "pan.___", state 1064, "(1)" - line 257, "pan.___", state 1065, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1065, "else" - line 261, "pan.___", state 1072, "(1)" - line 261, "pan.___", state 1073, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1073, "else" - line 266, "pan.___", state 1082, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1082, "else" - line 299, "pan.___", state 1084, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1084, "else" - line 276, "pan.___", state 1097, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1110, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1119, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1135, "(1)" - line 253, "pan.___", state 1143, "(1)" - line 257, "pan.___", state 1155, "(1)" - line 261, "pan.___", state 1163, "(1)" - line 272, "pan.___", state 1179, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1181, "(1)" - line 276, "pan.___", state 1188, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1190, "(1)" - line 276, "pan.___", state 1191, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1191, "else" - line 274, "pan.___", state 1196, "((i<1))" - line 274, "pan.___", state 1196, "((i>=1))" - line 280, "pan.___", state 1201, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1203, "(1)" - line 280, "pan.___", state 1204, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1204, "else" - line 284, "pan.___", state 1210, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1212, "(1)" - line 284, "pan.___", state 1213, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1213, "else" - line 282, "pan.___", state 1218, "((i<2))" - line 282, "pan.___", state 1218, "((i>=2))" - line 249, "pan.___", state 1226, "(1)" - line 253, "pan.___", state 1234, "(1)" - line 253, "pan.___", state 1235, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1235, "else" - line 251, "pan.___", state 1240, "((i<1))" - line 251, "pan.___", state 1240, "((i>=1))" - line 257, "pan.___", state 1246, "(1)" - line 257, "pan.___", state 1247, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1247, "else" - line 261, "pan.___", state 1254, "(1)" - line 261, "pan.___", state 1255, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1255, "else" - line 266, "pan.___", state 1264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1264, "else" - line 299, "pan.___", state 1266, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1266, "else" - line 1237, "pan.___", state 1269, "-end-" - (227 of 1269 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 3.93e+03 seconds -pan: rate 1735.2351 states/second -pan: avg transition delay 1.2255e-06 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input deleted file mode 100644 index ba5712c..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_MB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index fbd72f1..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4468 -2:3:4388 -3:3:4391 -4:3:4391 -5:3:4394 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-1258:1:3062 -1259:1:3066 -1260:0:4468 -1261:2:4017 -1262:0:4468 -1263:1:1295 -1264:1:1296 -1265:0:4466 -1266:2:4016 -1267:0:4472 -1268:1:756 diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.define b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.log deleted file mode 100644 index 3da0a27..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.log +++ /dev/null @@ -1,536 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -pan: claim violated! (at depth 2092) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 5332, errors: 1 - 615700 states, stored -3.8337558e+08 states, matched -3.8399128e+08 transitions (= stored+matched) -2.147943e+09 atomic steps -hash conflicts: 90741041 (resolved) - -Stats on memory usage (in Megabytes): - 68.113 equivalent memory usage for states (stored*(State-vector + overhead)) - 52.415 actual memory usage for states (compression: 76.95%) - state-vector as stored = 61 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 518.108 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 82, "(1)" - line 438, "pan.___", state 112, "(1)" - line 442, "pan.___", state 125, "(1)" - line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 218, "(1)" - line 438, "pan.___", state 248, "(1)" - line 442, "pan.___", state 261, "(1)" - line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 347, "(1)" - line 438, "pan.___", state 377, "(1)" - line 442, "pan.___", state 390, "(1)" - line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 415, "(1)" - line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 416, "else" - line 411, "pan.___", state 419, "(1)" - line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 429, "(1)" - line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 430, "else" - line 415, "pan.___", state 433, "(1)" - line 415, "pan.___", state 434, "(1)" - line 415, "pan.___", state 434, "(1)" - line 413, "pan.___", state 439, "((i<1))" - line 413, "pan.___", state 439, "((i>=1))" - line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 447, "(1)" - line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 448, "else" - line 420, "pan.___", state 451, "(1)" - line 420, "pan.___", state 452, "(1)" - line 420, "pan.___", state 452, "(1)" - line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 461, "(1)" - line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 462, "else" - line 424, "pan.___", state 465, "(1)" - line 424, "pan.___", state 466, "(1)" - line 424, "pan.___", state 466, "(1)" - line 422, "pan.___", state 471, "((i<2))" - line 422, "pan.___", state 471, "((i>=2))" - line 429, "pan.___", state 478, "(1)" - line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 479, "else" - line 429, "pan.___", state 482, "(1)" - line 429, "pan.___", state 483, "(1)" - line 429, "pan.___", state 483, "(1)" - line 433, "pan.___", state 491, "(1)" - line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 492, "else" - line 433, "pan.___", state 495, "(1)" - line 433, "pan.___", state 496, "(1)" - line 433, "pan.___", state 496, "(1)" - line 431, "pan.___", state 501, "((i<1))" - line 431, "pan.___", state 501, "((i>=1))" - line 438, "pan.___", state 508, "(1)" - line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 509, "else" - line 438, "pan.___", state 512, "(1)" - line 438, "pan.___", state 513, "(1)" - line 438, "pan.___", state 513, "(1)" - line 442, "pan.___", state 521, "(1)" - line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 522, "else" - line 442, "pan.___", state 525, "(1)" - line 442, "pan.___", state 526, "(1)" - line 442, "pan.___", state 526, "(1)" - line 440, "pan.___", state 531, "((i<2))" - line 440, "pan.___", state 531, "((i>=2))" - line 450, "pan.___", state 535, "(1)" - line 450, "pan.___", state 535, "(1)" - line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 540, "(1)" - line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 555, "(1)" - line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 591, "(1)" - line 253, "pan.___", state 599, "(1)" - line 257, "pan.___", state 611, "(1)" - line 261, "pan.___", state 619, "(1)" - line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 702, "(1)" - line 433, "pan.___", state 715, "(1)" - line 438, "pan.___", state 732, "(1)" - line 442, "pan.___", state 745, "(1)" - line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 838, "(1)" - line 438, "pan.___", state 868, "(1)" - line 442, "pan.___", state 881, "(1)" - line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 904, "(1)" - line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 905, "else" - line 411, "pan.___", state 908, "(1)" - line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 918, "(1)" - line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 919, "else" - line 415, "pan.___", state 922, "(1)" - line 415, "pan.___", state 923, "(1)" - line 415, "pan.___", state 923, "(1)" - line 413, "pan.___", state 928, "((i<1))" - line 413, "pan.___", state 928, "((i>=1))" - line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 936, "(1)" - line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 937, "else" - line 420, "pan.___", state 940, "(1)" - line 420, "pan.___", state 941, "(1)" - line 420, "pan.___", state 941, "(1)" - line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 950, "(1)" - line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 951, "else" - line 424, "pan.___", state 954, "(1)" - line 424, "pan.___", state 955, "(1)" - line 424, "pan.___", state 955, "(1)" - line 422, "pan.___", state 960, "((i<2))" - line 422, "pan.___", state 960, "((i>=2))" - line 429, "pan.___", state 967, "(1)" - line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 968, "else" - line 429, "pan.___", state 971, "(1)" - line 429, "pan.___", state 972, "(1)" - line 429, "pan.___", state 972, "(1)" - line 433, "pan.___", state 980, "(1)" - line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 981, "else" - line 433, "pan.___", state 984, "(1)" - line 433, "pan.___", state 985, "(1)" - line 433, "pan.___", state 985, "(1)" - line 431, "pan.___", state 990, "((i<1))" - line 431, "pan.___", state 990, "((i>=1))" - line 438, "pan.___", state 997, "(1)" - line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 998, "else" - line 438, "pan.___", state 1001, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 442, "pan.___", state 1010, "(1)" - line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 1011, "else" - line 442, "pan.___", state 1014, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 440, "pan.___", state 1020, "((i<2))" - line 440, "pan.___", state 1020, "((i>=2))" - line 450, "pan.___", state 1024, "(1)" - line 450, "pan.___", state 1024, "(1)" - line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1098, "(1)" - line 433, "pan.___", state 1111, "(1)" - line 438, "pan.___", state 1128, "(1)" - line 442, "pan.___", state 1141, "(1)" - line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1230, "(1)" - line 438, "pan.___", state 1260, "(1)" - line 442, "pan.___", state 1273, "(1)" - line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1363, "(1)" - line 438, "pan.___", state 1393, "(1)" - line 442, "pan.___", state 1406, "(1)" - line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1492, "(1)" - line 438, "pan.___", state 1522, "(1)" - line 442, "pan.___", state 1535, "(1)" - line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1605, "(1)" - line 253, "pan.___", state 1613, "(1)" - line 257, "pan.___", state 1625, "(1)" - line 261, "pan.___", state 1633, "(1)" - line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1716, "(1)" - line 433, "pan.___", state 1729, "(1)" - line 438, "pan.___", state 1746, "(1)" - line 442, "pan.___", state 1759, "(1)" - line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1845, "(1)" - line 433, "pan.___", state 1858, "(1)" - line 438, "pan.___", state 1875, "(1)" - line 442, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1977, "(1)" - line 438, "pan.___", state 2007, "(1)" - line 442, "pan.___", state 2020, "(1)" - line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2113, "(1)" - line 438, "pan.___", state 2143, "(1)" - line 442, "pan.___", state 2156, "(1)" - line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2242, "(1)" - line 438, "pan.___", state 2272, "(1)" - line 442, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2310, "(1)" - line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2311, "else" - line 411, "pan.___", state 2314, "(1)" - line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2324, "(1)" - line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2325, "else" - line 415, "pan.___", state 2328, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 413, "pan.___", state 2334, "((i<1))" - line 413, "pan.___", state 2334, "((i>=1))" - line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2342, "(1)" - line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2343, "else" - line 420, "pan.___", state 2346, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2356, "(1)" - line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2357, "else" - line 424, "pan.___", state 2360, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 422, "pan.___", state 2366, "((i<2))" - line 422, "pan.___", state 2366, "((i>=2))" - line 429, "pan.___", state 2373, "(1)" - line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 2374, "else" - line 429, "pan.___", state 2377, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 433, "pan.___", state 2386, "(1)" - line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 2387, "else" - line 433, "pan.___", state 2390, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 431, "pan.___", state 2396, "((i<1))" - line 431, "pan.___", state 2396, "((i>=1))" - line 438, "pan.___", state 2403, "(1)" - line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 2404, "else" - line 438, "pan.___", state 2407, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 442, "pan.___", state 2416, "(1)" - line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 2417, "else" - line 442, "pan.___", state 2420, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 440, "pan.___", state 2426, "((i<2))" - line 440, "pan.___", state 2426, "((i>=2))" - line 450, "pan.___", state 2430, "(1)" - line 450, "pan.___", state 2430, "(1)" - line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2435, "(1)" - line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2486, "(1)" - line 253, "pan.___", state 2494, "(1)" - line 257, "pan.___", state 2506, "(1)" - line 261, "pan.___", state 2514, "(1)" - line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2597, "(1)" - line 433, "pan.___", state 2610, "(1)" - line 438, "pan.___", state 2627, "(1)" - line 442, "pan.___", state 2640, "(1)" - line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2711, "(1)" - line 253, "pan.___", state 2719, "(1)" - line 257, "pan.___", state 2731, "(1)" - line 261, "pan.___", state 2739, "(1)" - line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2822, "(1)" - line 433, "pan.___", state 2835, "(1)" - line 438, "pan.___", state 2852, "(1)" - line 442, "pan.___", state 2865, "(1)" - line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2951, "(1)" - line 433, "pan.___", state 2964, "(1)" - line 438, "pan.___", state 2981, "(1)" - line 442, "pan.___", state 2994, "(1)" - line 411, "pan.___", state 3027, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 3059, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 3073, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 3092, "(1)" - line 438, "pan.___", state 3122, "(1)" - line 442, "pan.___", state 3135, "(1)" - line 411, "pan.___", state 3154, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 3168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 3186, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 3200, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 3219, "(1)" - line 433, "pan.___", state 3232, "(1)" - line 438, "pan.___", state 3249, "(1)" - line 442, "pan.___", state 3262, "(1)" - line 898, "pan.___", state 3283, "-end-" - (290 of 3283 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 24, "(1)" - line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 38, "(1)" - line 415, "pan.___", state 39, "(1)" - line 415, "pan.___", state 39, "(1)" - line 413, "pan.___", state 44, "((i<1))" - line 413, "pan.___", state 44, "((i>=1))" - line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 56, "(1)" - line 420, "pan.___", state 57, "(1)" - line 420, "pan.___", state 57, "(1)" - line 424, "pan.___", state 70, "(1)" - line 424, "pan.___", state 71, "(1)" - line 424, "pan.___", state 71, "(1)" - line 422, "pan.___", state 76, "((i<2))" - line 422, "pan.___", state 76, "((i>=2))" - line 429, "pan.___", state 83, "(1)" - line 429, "pan.___", state 84, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 84, "else" - line 429, "pan.___", state 87, "(1)" - line 429, "pan.___", state 88, "(1)" - line 429, "pan.___", state 88, "(1)" - line 433, "pan.___", state 96, "(1)" - line 433, "pan.___", state 97, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 97, "else" - line 433, "pan.___", state 100, "(1)" - line 433, "pan.___", state 101, "(1)" - line 433, "pan.___", state 101, "(1)" - line 431, "pan.___", state 106, "((i<1))" - line 431, "pan.___", state 106, "((i>=1))" - line 438, "pan.___", state 113, "(1)" - line 438, "pan.___", state 114, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 114, "else" - line 438, "pan.___", state 117, "(1)" - line 438, "pan.___", state 118, "(1)" - line 438, "pan.___", state 118, "(1)" - line 442, "pan.___", state 126, "(1)" - line 442, "pan.___", state 127, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 127, "else" - line 442, "pan.___", state 130, "(1)" - line 442, "pan.___", state 131, "(1)" - line 442, "pan.___", state 131, "(1)" - line 440, "pan.___", state 136, "((i<2))" - line 440, "pan.___", state 136, "((i>=2))" - line 450, "pan.___", state 140, "(1)" - line 450, "pan.___", state 140, "(1)" - line 272, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 276, "(1)" - line 433, "pan.___", state 289, "(1)" - line 438, "pan.___", state 306, "(1)" - line 442, "pan.___", state 319, "(1)" - line 415, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 420, "(1)" - line 438, "pan.___", state 437, "(1)" - line 442, "pan.___", state 450, "(1)" - line 415, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 559, "(1)" - line 438, "pan.___", state 576, "(1)" - line 442, "pan.___", state 589, "(1)" - line 415, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 688, "(1)" - line 438, "pan.___", state 705, "(1)" - line 442, "pan.___", state 718, "(1)" - line 415, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 819, "(1)" - line 438, "pan.___", state 836, "(1)" - line 442, "pan.___", state 849, "(1)" - line 272, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 928, "(1)" - line 284, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 951, "(1)" - line 253, "pan.___", state 959, "(1)" - line 257, "pan.___", state 971, "(1)" - line 261, "pan.___", state 979, "(1)" - line 276, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1042, "(1)" - line 253, "pan.___", state 1050, "(1)" - line 257, "pan.___", state 1062, "(1)" - line 261, "pan.___", state 1070, "(1)" - line 276, "pan.___", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1133, "(1)" - line 253, "pan.___", state 1141, "(1)" - line 257, "pan.___", state 1153, "(1)" - line 261, "pan.___", state 1161, "(1)" - line 276, "pan.___", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1224, "(1)" - line 253, "pan.___", state 1232, "(1)" - line 257, "pan.___", state 1244, "(1)" - line 261, "pan.___", state 1252, "(1)" - line 1237, "pan.___", state 1267, "-end-" - (96 of 1267 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 474 seconds -pan: rate 1298.3425 states/second -pan: avg transition delay 1.235e-06 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input deleted file mode 100644 index 8cb5f81..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_RMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index de03f6a..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,2095 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4630 -2:3:4550 -3:3:4553 -4:3:4553 -5:3:4556 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-1951:2:4279 -1952:2:4283 -1953:2:4287 -1954:2:4288 -1955:2:4292 -1956:2:4300 -1957:2:4301 -1958:2:4305 -1959:2:4309 -1960:2:4310 -1961:2:4305 -1962:2:4309 -1963:2:4310 -1964:2:4314 -1965:2:4321 -1966:2:4328 -1967:2:4329 -1968:2:4336 -1969:2:4341 -1970:2:4348 -1971:2:4349 -1972:2:4348 -1973:2:4349 -1974:2:4356 -1975:2:4360 -1976:0:4630 -1977:1:3023 -1978:1:3027 -1979:1:3028 -1980:1:3036 -1981:1:3037 -1982:1:3041 -1983:1:3042 -1984:1:3050 -1985:1:3055 -1986:1:3059 -1987:1:3060 -1988:1:3068 -1989:1:3069 -1990:1:3073 -1991:1:3074 -1992:1:3068 -1993:1:3069 -1994:1:3073 -1995:1:3074 -1996:1:3082 -1997:1:3087 -1998:1:3088 -1999:1:3099 -2000:1:3100 -2001:1:3101 -2002:1:3112 -2003:1:3117 -2004:1:3118 -2005:1:3129 -2006:1:3130 -2007:1:3131 -2008:1:3129 -2009:1:3137 -2010:1:3138 -2011:1:3142 -2012:1:3146 -2013:0:4630 -2014:2:3757 -2015:2:3758 -2016:0:4630 -2017:2:3295 -2018:0:4630 -2019:2:3620 -2020:2:3621 -2021:2:3625 -2022:2:3626 -2023:2:3634 -2024:2:3635 -2025:2:3639 -2026:2:3640 -2027:2:3648 -2028:2:3653 -2029:2:3657 -2030:2:3658 -2031:2:3666 -2032:2:3667 -2033:2:3671 -2034:2:3672 -2035:2:3666 -2036:2:3667 -2037:2:3671 -2038:2:3672 -2039:2:3680 -2040:2:3685 -2041:2:3686 -2042:2:3697 -2043:2:3698 -2044:2:3699 -2045:2:3710 -2046:2:3715 -2047:2:3716 -2048:2:3727 -2049:2:3728 -2050:2:3729 -2051:2:3727 -2052:2:3728 -2053:2:3729 -2054:2:3740 -2055:2:3749 -2056:0:4630 -2057:2:3295 -2058:0:4630 -2059:2:3755 -2060:0:4630 -2061:2:4278 -2062:2:4279 -2063:2:4283 -2064:2:4287 -2065:2:4288 -2066:2:4292 -2067:2:4300 -2068:2:4301 -2069:2:4305 -2070:2:4309 -2071:2:4310 -2072:2:4305 -2073:2:4309 -2074:2:4310 -2075:2:4314 -2076:2:4321 -2077:2:4328 -2078:2:4329 -2079:2:4336 -2080:2:4341 -2081:2:4348 -2082:2:4349 -2083:2:4348 -2084:2:4349 -2085:2:4356 -2086:2:4360 -2087:0:4630 -2088:1:1291 -2089:1:1292 -2090:0:4628 -2091:1:11 -2092:0:4634 -2093:1:3146 diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.log deleted file mode 100644 index 5c504a7..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.log +++ /dev/null @@ -1,505 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 5131 States= 1e+06 Transitions= 5.44e+08 Memory= 550.432 t= 664 R= 2e+03 -Depth= 5131 States= 2e+06 Transitions= 1.26e+09 Memory= 634.318 t= 1.56e+03 R= 1e+03 -Depth= 5422 States= 3e+06 Transitions= 1.93e+09 Memory= 718.303 t= 2.43e+03 R= 1e+03 -pan: resizing hashtable to -w22.. done -Depth= 5422 States= 4e+06 Transitions= 2.58e+09 Memory= 833.311 t= 3.23e+03 R= 1e+03 -Depth= 5422 States= 5e+06 Transitions= 3.25e+09 Memory= 917.295 t= 4.07e+03 R= 1e+03 -pan: claim violated! (at depth 1420) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 5422, errors: 1 - 5523708 states, stored -3.5450503e+09 states, matched -3.550574e+09 transitions (= stored+matched) -2.0146324e+10 atomic steps -hash conflicts: 2.4095106e+09 (resolved) - -Stats on memory usage (in Megabytes): - 611.067 equivalent memory usage for states (stored*(State-vector + overhead)) - 471.813 actual memory usage for states (compression: 77.21%) - state-vector as stored = 62 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 961.240 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 82, "(1)" - line 438, "pan.___", state 112, "(1)" - line 442, "pan.___", state 125, "(1)" - line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 218, "(1)" - line 438, "pan.___", state 248, "(1)" - line 442, "pan.___", state 261, "(1)" - line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 347, "(1)" - line 438, "pan.___", state 377, "(1)" - line 442, "pan.___", state 390, "(1)" - line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 415, "(1)" - line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 416, "else" - line 411, "pan.___", state 419, "(1)" - line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 429, "(1)" - line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 430, "else" - line 415, "pan.___", state 433, "(1)" - line 415, "pan.___", state 434, "(1)" - line 415, "pan.___", state 434, "(1)" - line 413, "pan.___", state 439, "((i<1))" - line 413, "pan.___", state 439, "((i>=1))" - line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 447, "(1)" - line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 448, "else" - line 420, "pan.___", state 451, "(1)" - line 420, "pan.___", state 452, "(1)" - line 420, "pan.___", state 452, "(1)" - line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 461, "(1)" - line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 462, "else" - line 424, "pan.___", state 465, "(1)" - line 424, "pan.___", state 466, "(1)" - line 424, "pan.___", state 466, "(1)" - line 422, "pan.___", state 471, "((i<2))" - line 422, "pan.___", state 471, "((i>=2))" - line 429, "pan.___", state 478, "(1)" - line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 479, "else" - line 429, "pan.___", state 482, "(1)" - line 429, "pan.___", state 483, "(1)" - line 429, "pan.___", state 483, "(1)" - line 433, "pan.___", state 491, "(1)" - line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 492, "else" - line 433, "pan.___", state 495, "(1)" - line 433, "pan.___", state 496, "(1)" - line 433, "pan.___", state 496, "(1)" - line 431, "pan.___", state 501, "((i<1))" - line 431, "pan.___", state 501, "((i>=1))" - line 438, "pan.___", state 508, "(1)" - line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 509, "else" - line 438, "pan.___", state 512, "(1)" - line 438, "pan.___", state 513, "(1)" - line 438, "pan.___", state 513, "(1)" - line 442, "pan.___", state 521, "(1)" - line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 522, "else" - line 442, "pan.___", state 525, "(1)" - line 442, "pan.___", state 526, "(1)" - line 442, "pan.___", state 526, "(1)" - line 440, "pan.___", state 531, "((i<2))" - line 440, "pan.___", state 531, "((i>=2))" - line 450, "pan.___", state 535, "(1)" - line 450, "pan.___", state 535, "(1)" - line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 540, "(1)" - line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 555, "(1)" - line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 591, "(1)" - line 253, "pan.___", state 599, "(1)" - line 257, "pan.___", state 611, "(1)" - line 261, "pan.___", state 619, "(1)" - line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 702, "(1)" - line 433, "pan.___", state 715, "(1)" - line 438, "pan.___", state 732, "(1)" - line 442, "pan.___", state 745, "(1)" - line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 838, "(1)" - line 438, "pan.___", state 868, "(1)" - line 442, "pan.___", state 881, "(1)" - line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 904, "(1)" - line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 905, "else" - line 411, "pan.___", state 908, "(1)" - line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 918, "(1)" - line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 919, "else" - line 415, "pan.___", state 922, "(1)" - line 415, "pan.___", state 923, "(1)" - line 415, "pan.___", state 923, "(1)" - line 413, "pan.___", state 928, "((i<1))" - line 413, "pan.___", state 928, "((i>=1))" - line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 936, "(1)" - line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 937, "else" - line 420, "pan.___", state 940, "(1)" - line 420, "pan.___", state 941, "(1)" - line 420, "pan.___", state 941, "(1)" - line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 950, "(1)" - line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 951, "else" - line 424, "pan.___", state 954, "(1)" - line 424, "pan.___", state 955, "(1)" - line 424, "pan.___", state 955, "(1)" - line 422, "pan.___", state 960, "((i<2))" - line 422, "pan.___", state 960, "((i>=2))" - line 429, "pan.___", state 967, "(1)" - line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 968, "else" - line 429, "pan.___", state 971, "(1)" - line 429, "pan.___", state 972, "(1)" - line 429, "pan.___", state 972, "(1)" - line 433, "pan.___", state 980, "(1)" - line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 981, "else" - line 433, "pan.___", state 984, "(1)" - line 433, "pan.___", state 985, "(1)" - line 433, "pan.___", state 985, "(1)" - line 431, "pan.___", state 990, "((i<1))" - line 431, "pan.___", state 990, "((i>=1))" - line 438, "pan.___", state 997, "(1)" - line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 998, "else" - line 438, "pan.___", state 1001, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 442, "pan.___", state 1010, "(1)" - line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 1011, "else" - line 442, "pan.___", state 1014, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 440, "pan.___", state 1020, "((i<2))" - line 440, "pan.___", state 1020, "((i>=2))" - line 450, "pan.___", state 1024, "(1)" - line 450, "pan.___", state 1024, "(1)" - line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1098, "(1)" - line 433, "pan.___", state 1111, "(1)" - line 438, "pan.___", state 1128, "(1)" - line 442, "pan.___", state 1141, "(1)" - line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1230, "(1)" - line 438, "pan.___", state 1260, "(1)" - line 442, "pan.___", state 1273, "(1)" - line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1363, "(1)" - line 438, "pan.___", state 1393, "(1)" - line 442, "pan.___", state 1406, "(1)" - line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1492, "(1)" - line 438, "pan.___", state 1522, "(1)" - line 442, "pan.___", state 1535, "(1)" - line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1605, "(1)" - line 253, "pan.___", state 1613, "(1)" - line 257, "pan.___", state 1625, "(1)" - line 261, "pan.___", state 1633, "(1)" - line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1716, "(1)" - line 433, "pan.___", state 1729, "(1)" - line 438, "pan.___", state 1746, "(1)" - line 442, "pan.___", state 1759, "(1)" - line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1845, "(1)" - line 433, "pan.___", state 1858, "(1)" - line 438, "pan.___", state 1875, "(1)" - line 442, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1977, "(1)" - line 438, "pan.___", state 2007, "(1)" - line 442, "pan.___", state 2020, "(1)" - line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2113, "(1)" - line 438, "pan.___", state 2143, "(1)" - line 442, "pan.___", state 2156, "(1)" - line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2242, "(1)" - line 438, "pan.___", state 2272, "(1)" - line 442, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2310, "(1)" - line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2311, "else" - line 411, "pan.___", state 2314, "(1)" - line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2324, "(1)" - line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2325, "else" - line 415, "pan.___", state 2328, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 413, "pan.___", state 2334, "((i<1))" - line 413, "pan.___", state 2334, "((i>=1))" - line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2342, "(1)" - line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2343, "else" - line 420, "pan.___", state 2346, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2356, "(1)" - line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2357, "else" - line 424, "pan.___", state 2360, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 422, "pan.___", state 2366, "((i<2))" - line 422, "pan.___", state 2366, "((i>=2))" - line 429, "pan.___", state 2373, "(1)" - line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 2374, "else" - line 429, "pan.___", state 2377, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 433, "pan.___", state 2386, "(1)" - line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 2387, "else" - line 433, "pan.___", state 2390, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 431, "pan.___", state 2396, "((i<1))" - line 431, "pan.___", state 2396, "((i>=1))" - line 438, "pan.___", state 2403, "(1)" - line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 2404, "else" - line 438, "pan.___", state 2407, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 442, "pan.___", state 2416, "(1)" - line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 2417, "else" - line 442, "pan.___", state 2420, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 440, "pan.___", state 2426, "((i<2))" - line 440, "pan.___", state 2426, "((i>=2))" - line 450, "pan.___", state 2430, "(1)" - line 450, "pan.___", state 2430, "(1)" - line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2435, "(1)" - line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2486, "(1)" - line 253, "pan.___", state 2494, "(1)" - line 257, "pan.___", state 2506, "(1)" - line 261, "pan.___", state 2514, "(1)" - line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2597, "(1)" - line 433, "pan.___", state 2610, "(1)" - line 438, "pan.___", state 2627, "(1)" - line 442, "pan.___", state 2640, "(1)" - line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2711, "(1)" - line 253, "pan.___", state 2719, "(1)" - line 257, "pan.___", state 2731, "(1)" - line 261, "pan.___", state 2739, "(1)" - line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2822, "(1)" - line 433, "pan.___", state 2835, "(1)" - line 438, "pan.___", state 2852, "(1)" - line 442, "pan.___", state 2865, "(1)" - line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2951, "(1)" - line 433, "pan.___", state 2964, "(1)" - line 438, "pan.___", state 2981, "(1)" - line 442, "pan.___", state 2994, "(1)" - line 249, "pan.___", state 3027, "(1)" - line 257, "pan.___", state 3047, "(1)" - line 261, "pan.___", state 3055, "(1)" - line 249, "pan.___", state 3070, "(1)" - line 253, "pan.___", state 3078, "(1)" - line 257, "pan.___", state 3090, "(1)" - line 261, "pan.___", state 3098, "(1)" - line 898, "pan.___", state 3115, "-end-" - (283 of 3115 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 19, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 33, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 429, "pan.___", state 84, "(1)" - line 433, "pan.___", state 97, "(1)" - line 272, "pan.___", state 150, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 152, "(1)" - line 276, "pan.___", state 159, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 161, "(1)" - line 276, "pan.___", state 162, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 162, "else" - line 274, "pan.___", state 167, "((i<1))" - line 274, "pan.___", state 167, "((i>=1))" - line 280, "pan.___", state 172, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 174, "(1)" - line 280, "pan.___", state 175, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 175, "else" - line 284, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 183, "(1)" - line 284, "pan.___", state 184, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 184, "else" - line 289, "pan.___", state 193, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 289, "pan.___", state 193, "else" - line 411, "pan.___", state 212, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 226, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 244, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 258, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 277, "(1)" - line 433, "pan.___", state 290, "(1)" - line 438, "pan.___", state 307, "(1)" - line 442, "pan.___", state 320, "(1)" - line 415, "pan.___", state 357, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 375, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 389, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 421, "(1)" - line 438, "pan.___", state 438, "(1)" - line 442, "pan.___", state 451, "(1)" - line 415, "pan.___", state 496, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 514, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 528, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 560, "(1)" - line 438, "pan.___", state 577, "(1)" - line 442, "pan.___", state 590, "(1)" - line 415, "pan.___", state 625, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 643, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 657, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 689, "(1)" - line 438, "pan.___", state 706, "(1)" - line 442, "pan.___", state 719, "(1)" - line 415, "pan.___", state 756, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 774, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 788, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 820, "(1)" - line 438, "pan.___", state 837, "(1)" - line 442, "pan.___", state 850, "(1)" - line 272, "pan.___", state 905, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 914, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 952, "(1)" - line 253, "pan.___", state 960, "(1)" - line 257, "pan.___", state 972, "(1)" - line 261, "pan.___", state 980, "(1)" - line 276, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1018, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1027, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1043, "(1)" - line 253, "pan.___", state 1051, "(1)" - line 257, "pan.___", state 1063, "(1)" - line 261, "pan.___", state 1071, "(1)" - line 276, "pan.___", state 1096, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1109, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1118, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1134, "(1)" - line 253, "pan.___", state 1142, "(1)" - line 257, "pan.___", state 1154, "(1)" - line 261, "pan.___", state 1162, "(1)" - line 276, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1200, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1209, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1225, "(1)" - line 253, "pan.___", state 1233, "(1)" - line 257, "pan.___", state 1245, "(1)" - line 261, "pan.___", state 1253, "(1)" - line 1237, "pan.___", state 1268, "-end-" - (77 of 1268 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 4.43e+03 seconds -pan: rate 1246.6728 states/second -pan: avg transition delay 1.2479e-06 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input deleted file mode 100644 index 49791b0..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_WMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index b250110..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1423 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4463 -2:3:4383 -3:3:4386 -4:3:4386 -5:3:4389 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-1414:2:4193 -1415:0:4463 -1416:1:1291 -1417:1:1292 -1418:0:4461 -1419:1:11 -1420:0:4467 -1421:1:2299 diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.define b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.log deleted file mode 100644 index 90b0d78..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.log +++ /dev/null @@ -1,632 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 5164 States= 1e+06 Transitions= 4.75e+08 Memory= 550.432 t= 582 R= 2e+03 -Depth= 5746 States= 2e+06 Transitions= 1.02e+09 Memory= 634.318 t= 1.27e+03 R= 2e+03 -pan: claim violated! (at depth 1144) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 5746, errors: 1 - 2322493 states, stored -1.1944827e+09 states, matched -1.1968052e+09 transitions (= stored+matched) -6.6651798e+09 atomic steps -hash conflicts: 7.6855101e+08 (resolved) - -Stats on memory usage (in Megabytes): - 256.929 equivalent memory usage for states (stored*(State-vector + overhead)) - 195.871 actual memory usage for states (compression: 76.24%) - state-vector as stored = 60 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 661.467 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 82, "(1)" - line 438, "pan.___", state 112, "(1)" - line 442, "pan.___", state 125, "(1)" - line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 218, "(1)" - line 438, "pan.___", state 248, "(1)" - line 442, "pan.___", state 261, "(1)" - line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 347, "(1)" - line 438, "pan.___", state 377, "(1)" - line 442, "pan.___", state 390, "(1)" - line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 415, "(1)" - line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 416, "else" - line 411, "pan.___", state 419, "(1)" - line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 429, "(1)" - line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 430, "else" - line 415, "pan.___", state 433, "(1)" - line 415, "pan.___", state 434, "(1)" - line 415, "pan.___", state 434, "(1)" - line 413, "pan.___", state 439, "((i<1))" - line 413, "pan.___", state 439, "((i>=1))" - line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 447, "(1)" - line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 448, "else" - line 420, "pan.___", state 451, "(1)" - line 420, "pan.___", state 452, "(1)" - line 420, "pan.___", state 452, "(1)" - line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 461, "(1)" - line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 462, "else" - line 424, "pan.___", state 465, "(1)" - line 424, "pan.___", state 466, "(1)" - line 424, "pan.___", state 466, "(1)" - line 422, "pan.___", state 471, "((i<2))" - line 422, "pan.___", state 471, "((i>=2))" - line 429, "pan.___", state 478, "(1)" - line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 479, "else" - line 429, "pan.___", state 482, "(1)" - line 429, "pan.___", state 483, "(1)" - line 429, "pan.___", state 483, "(1)" - line 433, "pan.___", state 491, "(1)" - line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 492, "else" - line 433, "pan.___", state 495, "(1)" - line 433, "pan.___", state 496, "(1)" - line 433, "pan.___", state 496, "(1)" - line 431, "pan.___", state 501, "((i<1))" - line 431, "pan.___", state 501, "((i>=1))" - line 438, "pan.___", state 508, "(1)" - line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 509, "else" - line 438, "pan.___", state 512, "(1)" - line 438, "pan.___", state 513, "(1)" - line 438, "pan.___", state 513, "(1)" - line 442, "pan.___", state 521, "(1)" - line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 522, "else" - line 442, "pan.___", state 525, "(1)" - line 442, "pan.___", state 526, "(1)" - line 442, "pan.___", state 526, "(1)" - line 440, "pan.___", state 531, "((i<2))" - line 440, "pan.___", state 531, "((i>=2))" - line 450, "pan.___", state 535, "(1)" - line 450, "pan.___", state 535, "(1)" - line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 540, "(1)" - line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 555, "(1)" - line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 591, "(1)" - line 253, "pan.___", state 599, "(1)" - line 257, "pan.___", state 611, "(1)" - line 261, "pan.___", state 619, "(1)" - line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 702, "(1)" - line 433, "pan.___", state 715, "(1)" - line 438, "pan.___", state 732, "(1)" - line 442, "pan.___", state 745, "(1)" - line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 838, "(1)" - line 438, "pan.___", state 868, "(1)" - line 442, "pan.___", state 881, "(1)" - line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 904, "(1)" - line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 905, "else" - line 411, "pan.___", state 908, "(1)" - line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 918, "(1)" - line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 919, "else" - line 415, "pan.___", state 922, "(1)" - line 415, "pan.___", state 923, "(1)" - line 415, "pan.___", state 923, "(1)" - line 413, "pan.___", state 928, "((i<1))" - line 413, "pan.___", state 928, "((i>=1))" - line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 936, "(1)" - line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 937, "else" - line 420, "pan.___", state 940, "(1)" - line 420, "pan.___", state 941, "(1)" - line 420, "pan.___", state 941, "(1)" - line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 950, "(1)" - line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 951, "else" - line 424, "pan.___", state 954, "(1)" - line 424, "pan.___", state 955, "(1)" - line 424, "pan.___", state 955, "(1)" - line 422, "pan.___", state 960, "((i<2))" - line 422, "pan.___", state 960, "((i>=2))" - line 429, "pan.___", state 967, "(1)" - line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 968, "else" - line 429, "pan.___", state 971, "(1)" - line 429, "pan.___", state 972, "(1)" - line 429, "pan.___", state 972, "(1)" - line 433, "pan.___", state 980, "(1)" - line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 981, "else" - line 433, "pan.___", state 984, "(1)" - line 433, "pan.___", state 985, "(1)" - line 433, "pan.___", state 985, "(1)" - line 431, "pan.___", state 990, "((i<1))" - line 431, "pan.___", state 990, "((i>=1))" - line 438, "pan.___", state 997, "(1)" - line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 998, "else" - line 438, "pan.___", state 1001, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 442, "pan.___", state 1010, "(1)" - line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 1011, "else" - line 442, "pan.___", state 1014, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 440, "pan.___", state 1020, "((i<2))" - line 440, "pan.___", state 1020, "((i>=2))" - line 450, "pan.___", state 1024, "(1)" - line 450, "pan.___", state 1024, "(1)" - line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1098, "(1)" - line 433, "pan.___", state 1111, "(1)" - line 438, "pan.___", state 1128, "(1)" - line 442, "pan.___", state 1141, "(1)" - line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1230, "(1)" - line 438, "pan.___", state 1260, "(1)" - line 442, "pan.___", state 1273, "(1)" - line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1363, "(1)" - line 438, "pan.___", state 1393, "(1)" - line 442, "pan.___", state 1406, "(1)" - line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1492, "(1)" - line 438, "pan.___", state 1522, "(1)" - line 442, "pan.___", state 1535, "(1)" - line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1605, "(1)" - line 253, "pan.___", state 1613, "(1)" - line 257, "pan.___", state 1625, "(1)" - line 261, "pan.___", state 1633, "(1)" - line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1716, "(1)" - line 433, "pan.___", state 1729, "(1)" - line 438, "pan.___", state 1746, "(1)" - line 442, "pan.___", state 1759, "(1)" - line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1845, "(1)" - line 433, "pan.___", state 1858, "(1)" - line 438, "pan.___", state 1875, "(1)" - line 442, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1977, "(1)" - line 438, "pan.___", state 2007, "(1)" - line 442, "pan.___", state 2020, "(1)" - line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2113, "(1)" - line 438, "pan.___", state 2143, "(1)" - line 442, "pan.___", state 2156, "(1)" - line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2242, "(1)" - line 438, "pan.___", state 2272, "(1)" - line 442, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2310, "(1)" - line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2311, "else" - line 411, "pan.___", state 2314, "(1)" - line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2324, "(1)" - line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2325, "else" - line 415, "pan.___", state 2328, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 413, "pan.___", state 2334, "((i<1))" - line 413, "pan.___", state 2334, "((i>=1))" - line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2342, "(1)" - line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2343, "else" - line 420, "pan.___", state 2346, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2356, "(1)" - line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2357, "else" - line 424, "pan.___", state 2360, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 422, "pan.___", state 2366, "((i<2))" - line 422, "pan.___", state 2366, "((i>=2))" - line 429, "pan.___", state 2373, "(1)" - line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 2374, "else" - line 429, "pan.___", state 2377, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 433, "pan.___", state 2386, "(1)" - line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 2387, "else" - line 433, "pan.___", state 2390, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 431, "pan.___", state 2396, "((i<1))" - line 431, "pan.___", state 2396, "((i>=1))" - line 438, "pan.___", state 2403, "(1)" - line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 2404, "else" - line 438, "pan.___", state 2407, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 442, "pan.___", state 2416, "(1)" - line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 2417, "else" - line 442, "pan.___", state 2420, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 440, "pan.___", state 2426, "((i<2))" - line 440, "pan.___", state 2426, "((i>=2))" - line 450, "pan.___", state 2430, "(1)" - line 450, "pan.___", state 2430, "(1)" - line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2435, "(1)" - line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2486, "(1)" - line 253, "pan.___", state 2494, "(1)" - line 257, "pan.___", state 2506, "(1)" - line 261, "pan.___", state 2514, "(1)" - line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2597, "(1)" - line 433, "pan.___", state 2610, "(1)" - line 438, "pan.___", state 2627, "(1)" - line 442, "pan.___", state 2640, "(1)" - line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2711, "(1)" - line 253, "pan.___", state 2719, "(1)" - line 257, "pan.___", state 2731, "(1)" - line 261, "pan.___", state 2739, "(1)" - line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2822, "(1)" - line 433, "pan.___", state 2835, "(1)" - line 438, "pan.___", state 2852, "(1)" - line 442, "pan.___", state 2865, "(1)" - line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2951, "(1)" - line 433, "pan.___", state 2964, "(1)" - line 438, "pan.___", state 2981, "(1)" - line 442, "pan.___", state 2994, "(1)" - line 249, "pan.___", state 3027, "(1)" - line 257, "pan.___", state 3047, "(1)" - line 261, "pan.___", state 3055, "(1)" - line 249, "pan.___", state 3070, "(1)" - line 253, "pan.___", state 3078, "(1)" - line 257, "pan.___", state 3090, "(1)" - line 261, "pan.___", state 3098, "(1)" - line 898, "pan.___", state 3115, "-end-" - (283 of 3115 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 22, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 36, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 54, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 429, "pan.___", state 87, "(1)" - line 433, "pan.___", state 100, "(1)" - line 438, "pan.___", state 117, "(1)" - line 272, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 162, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 175, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 215, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 229, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 247, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 261, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 280, "(1)" - line 433, "pan.___", state 293, "(1)" - line 438, "pan.___", state 310, "(1)" - line 442, "pan.___", state 323, "(1)" - line 415, "pan.___", state 360, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 378, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 392, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 424, "(1)" - line 438, "pan.___", state 441, "(1)" - line 442, "pan.___", state 454, "(1)" - line 411, "pan.___", state 484, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 498, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 516, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 530, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 549, "(1)" - line 433, "pan.___", state 562, "(1)" - line 438, "pan.___", state 579, "(1)" - line 442, "pan.___", state 592, "(1)" - line 411, "pan.___", state 613, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 615, "(1)" - line 411, "pan.___", state 616, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 616, "else" - line 411, "pan.___", state 619, "(1)" - line 415, "pan.___", state 627, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 629, "(1)" - line 415, "pan.___", state 630, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 630, "else" - line 415, "pan.___", state 633, "(1)" - line 415, "pan.___", state 634, "(1)" - line 415, "pan.___", state 634, "(1)" - line 413, "pan.___", state 639, "((i<1))" - line 413, "pan.___", state 639, "((i>=1))" - line 420, "pan.___", state 645, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 647, "(1)" - line 420, "pan.___", state 648, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 648, "else" - line 420, "pan.___", state 651, "(1)" - line 420, "pan.___", state 652, "(1)" - line 420, "pan.___", state 652, "(1)" - line 424, "pan.___", state 659, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 661, "(1)" - line 424, "pan.___", state 662, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 662, "else" - line 424, "pan.___", state 665, "(1)" - line 424, "pan.___", state 666, "(1)" - line 424, "pan.___", state 666, "(1)" - line 422, "pan.___", state 671, "((i<2))" - line 422, "pan.___", state 671, "((i>=2))" - line 429, "pan.___", state 678, "(1)" - line 429, "pan.___", state 679, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 679, "else" - line 429, "pan.___", state 682, "(1)" - line 429, "pan.___", state 683, "(1)" - line 429, "pan.___", state 683, "(1)" - line 433, "pan.___", state 691, "(1)" - line 433, "pan.___", state 692, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 692, "else" - line 433, "pan.___", state 695, "(1)" - line 433, "pan.___", state 696, "(1)" - line 433, "pan.___", state 696, "(1)" - line 431, "pan.___", state 701, "((i<1))" - line 431, "pan.___", state 701, "((i>=1))" - line 438, "pan.___", state 708, "(1)" - line 438, "pan.___", state 709, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 709, "else" - line 438, "pan.___", state 712, "(1)" - line 438, "pan.___", state 713, "(1)" - line 438, "pan.___", state 713, "(1)" - line 442, "pan.___", state 721, "(1)" - line 442, "pan.___", state 722, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 722, "else" - line 442, "pan.___", state 725, "(1)" - line 442, "pan.___", state 726, "(1)" - line 442, "pan.___", state 726, "(1)" - line 440, "pan.___", state 731, "((i<2))" - line 440, "pan.___", state 731, "((i>=2))" - line 450, "pan.___", state 735, "(1)" - line 450, "pan.___", state 735, "(1)" - line 1117, "pan.___", state 739, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" - line 411, "pan.___", state 744, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 746, "(1)" - line 411, "pan.___", state 747, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 747, "else" - line 411, "pan.___", state 750, "(1)" - line 415, "pan.___", state 758, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 760, "(1)" - line 415, "pan.___", state 761, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 761, "else" - line 415, "pan.___", state 764, "(1)" - line 415, "pan.___", state 765, "(1)" - line 415, "pan.___", state 765, "(1)" - line 413, "pan.___", state 770, "((i<1))" - line 413, "pan.___", state 770, "((i>=1))" - line 420, "pan.___", state 776, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 778, "(1)" - line 420, "pan.___", state 779, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 779, "else" - line 420, "pan.___", state 782, "(1)" - line 420, "pan.___", state 783, "(1)" - line 420, "pan.___", state 783, "(1)" - line 424, "pan.___", state 790, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 792, "(1)" - line 424, "pan.___", state 793, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 793, "else" - line 424, "pan.___", state 796, "(1)" - line 424, "pan.___", state 797, "(1)" - line 424, "pan.___", state 797, "(1)" - line 422, "pan.___", state 802, "((i<2))" - line 422, "pan.___", state 802, "((i>=2))" - line 429, "pan.___", state 809, "(1)" - line 429, "pan.___", state 810, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 810, "else" - line 429, "pan.___", state 813, "(1)" - line 429, "pan.___", state 814, "(1)" - line 429, "pan.___", state 814, "(1)" - line 433, "pan.___", state 822, "(1)" - line 433, "pan.___", state 823, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 823, "else" - line 433, "pan.___", state 826, "(1)" - line 433, "pan.___", state 827, "(1)" - line 433, "pan.___", state 827, "(1)" - line 431, "pan.___", state 832, "((i<1))" - line 431, "pan.___", state 832, "((i>=1))" - line 438, "pan.___", state 839, "(1)" - line 438, "pan.___", state 840, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 840, "else" - line 438, "pan.___", state 843, "(1)" - line 438, "pan.___", state 844, "(1)" - line 438, "pan.___", state 844, "(1)" - line 442, "pan.___", state 852, "(1)" - line 442, "pan.___", state 853, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 853, "else" - line 442, "pan.___", state 856, "(1)" - line 442, "pan.___", state 857, "(1)" - line 442, "pan.___", state 857, "(1)" - line 440, "pan.___", state 862, "((i<2))" - line 440, "pan.___", state 862, "((i>=2))" - line 450, "pan.___", state 866, "(1)" - line 450, "pan.___", state 866, "(1)" - line 1133, "pan.___", state 871, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" - line 1128, "pan.___", state 872, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" - line 1128, "pan.___", state 872, "else" - line 1153, "pan.___", state 876, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" - line 272, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 931, "(1)" - line 284, "pan.___", state 938, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 954, "(1)" - line 253, "pan.___", state 962, "(1)" - line 257, "pan.___", state 974, "(1)" - line 261, "pan.___", state 982, "(1)" - line 276, "pan.___", state 1007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1020, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1029, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1045, "(1)" - line 253, "pan.___", state 1053, "(1)" - line 257, "pan.___", state 1065, "(1)" - line 261, "pan.___", state 1073, "(1)" - line 272, "pan.___", state 1089, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1091, "(1)" - line 276, "pan.___", state 1098, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1100, "(1)" - line 276, "pan.___", state 1101, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1101, "else" - line 274, "pan.___", state 1106, "((i<1))" - line 274, "pan.___", state 1106, "((i>=1))" - line 280, "pan.___", state 1111, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1113, "(1)" - line 280, "pan.___", state 1114, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1114, "else" - line 284, "pan.___", state 1120, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1122, "(1)" - line 284, "pan.___", state 1123, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1123, "else" - line 282, "pan.___", state 1128, "((i<2))" - line 282, "pan.___", state 1128, "((i>=2))" - line 249, "pan.___", state 1136, "(1)" - line 253, "pan.___", state 1144, "(1)" - line 253, "pan.___", state 1145, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1145, "else" - line 251, "pan.___", state 1150, "((i<1))" - line 251, "pan.___", state 1150, "((i>=1))" - line 257, "pan.___", state 1156, "(1)" - line 257, "pan.___", state 1157, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1157, "else" - line 261, "pan.___", state 1164, "(1)" - line 261, "pan.___", state 1165, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1165, "else" - line 266, "pan.___", state 1174, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1174, "else" - line 299, "pan.___", state 1176, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1176, "else" - line 276, "pan.___", state 1189, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1202, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1227, "(1)" - line 253, "pan.___", state 1235, "(1)" - line 257, "pan.___", state 1247, "(1)" - line 261, "pan.___", state 1255, "(1)" - line 1237, "pan.___", state 1270, "-end-" - (161 of 1270 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.49e+03 seconds -pan: rate 1556.4638 states/second -pan: avg transition delay 1.2468e-06 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input deleted file mode 100644 index 38db318..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define SINGLE_FLIP - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index fe03394..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1147 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4465 -2:3:4385 -3:3:4388 -4:3:4388 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file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.log deleted file mode 100644 index f854122..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.log +++ /dev/null @@ -1,512 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -depth 23: Claim reached state 9 (line 1300) -depth 1143: Claim reached state 9 (line 1299) -Depth= 6515 States= 1e+06 Transitions= 5.44e+08 Memory= 507.561 t= 715 R= 1e+03 -Depth= 6515 States= 2e+06 Transitions= 1.44e+09 Memory= 545.940 t= 1.93e+03 R= 1e+03 -Depth= 6515 States= 3e+06 Transitions= 2.29e+09 Memory= 584.416 t= 3.08e+03 R= 1e+03 -pan: resizing hashtable to -w22.. done -Depth= 6515 States= 4e+06 Transitions= 3.07e+09 Memory= 646.299 t= 4.13e+03 R= 1e+03 -Depth= 6515 States= 5e+06 Transitions= 3.84e+09 Memory= 681.065 t= 5.17e+03 R= 1e+03 -Depth= 6515 States= 6e+06 Transitions= 4.91e+09 Memory= 728.916 t= 6.63e+03 R= 9e+02 -Depth= 6515 States= 7e+06 Transitions= 5.88e+09 Memory= 767.393 t= 7.96e+03 R= 9e+02 -Depth= 6515 States= 8e+06 Transitions= 6.76e+09 Memory= 808.018 t= 9.16e+03 R= 9e+02 -Depth= 6515 States= 9e+06 Transitions= 7.69e+09 Memory= 846.885 t= 1.04e+04 R= 9e+02 -pan: resizing hashtable to -w24.. done -Depth= 6515 States= 1e+07 Transitions= 8.63e+09 Memory= 1015.705 t= 1.17e+04 R= 9e+02 -Depth= 6515 States= 1.1e+07 Transitions= 9.44e+09 Memory= 1054.572 t= 1.28e+04 R= 9e+02 -Depth= 6515 States= 1.2e+07 Transitions= 1.02e+10 Memory= 1095.490 t= 1.39e+04 R= 9e+02 -Depth= 6515 States= 1.3e+07 Transitions= 1.11e+10 Memory= 1129.182 t= 1.51e+04 R= 9e+02 -Depth= 6515 States= 1.4e+07 Transitions= 1.22e+10 Memory= 1173.518 t= 1.65e+04 R= 8e+02 -Depth= 6515 States= 1.5e+07 Transitions= 1.3e+10 Memory= 1207.893 t= 1.76e+04 R= 9e+02 -Depth= 6515 States= 1.6e+07 Transitions= 1.38e+10 Memory= 1234.065 t= 1.86e+04 R= 9e+02 -Depth= 6515 States= 1.7e+07 Transitions= 1.47e+10 Memory= 1277.424 t= 1.99e+04 R= 9e+02 -Depth= 6515 States= 1.8e+07 Transitions= 1.58e+10 Memory= 1325.568 t= 2.13e+04 R= 8e+02 -Depth= 6515 States= 1.9e+07 Transitions= 1.67e+10 Memory= 1366.486 t= 2.26e+04 R= 8e+02 -Depth= 6515 States= 2e+07 Transitions= 1.76e+10 Memory= 1405.940 t= 2.38e+04 R= 8e+02 -Depth= 6515 States= 2.1e+07 Transitions= 1.85e+10 Memory= 1450.080 t= 2.51e+04 R= 8e+02 -Depth= 6515 States= 2.2e+07 Transitions= 1.94e+10 Memory= 1491.291 t= 2.63e+04 R= 8e+02 -Depth= 6515 States= 2.3e+07 Transitions= 2.02e+10 Memory= 1530.744 t= 2.74e+04 R= 8e+02 -Depth= 6515 States= 2.4e+07 Transitions= 2.12e+10 Memory= 1565.217 t= 2.87e+04 R= 8e+02 -Depth= 6515 States= 2.5e+07 Transitions= 2.22e+10 Memory= 1608.479 t= 3e+04 R= 8e+02 -Depth= 6515 States= 2.6e+07 Transitions= 2.3e+10 Memory= 1634.651 t= 3.11e+04 R= 8e+02 -Depth= 6515 States= 2.7e+07 Transitions= 2.4e+10 Memory= 1685.725 t= 3.25e+04 R= 8e+02 -Depth= 6515 States= 2.8e+07 Transitions= 2.49e+10 Memory= 1724.885 t= 3.37e+04 R= 8e+02 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 6515, errors: 0 - 13561338 states, stored (2.88138e+07 visited) -2.5567499e+10 states, matched -2.5596313e+10 transitions (= visited+matched) -1.4615258e+11 atomic steps -hash conflicts: 8.6536644e+09 (resolved) - -Stats on memory usage (in Megabytes): - 1500.240 equivalent memory usage for states (stored*(State-vector + overhead)) - 1175.180 actual memory usage for states (compression: 78.33%) - state-vector as stored = 63 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1760.236 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 82, "(1)" - line 438, "pan.___", state 112, "(1)" - line 442, "pan.___", state 125, "(1)" - line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 218, "(1)" - line 438, "pan.___", state 248, "(1)" - line 442, "pan.___", state 261, "(1)" - line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 347, "(1)" - line 438, "pan.___", state 377, "(1)" - line 442, "pan.___", state 390, "(1)" - line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 415, "(1)" - line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 416, "else" - line 411, "pan.___", state 419, "(1)" - line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 429, "(1)" - line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 430, "else" - line 415, "pan.___", state 433, "(1)" - line 415, "pan.___", state 434, "(1)" - line 415, "pan.___", state 434, "(1)" - line 413, "pan.___", state 439, "((i<1))" - line 413, "pan.___", state 439, "((i>=1))" - line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 447, "(1)" - line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 448, "else" - line 420, "pan.___", state 451, "(1)" - line 420, "pan.___", state 452, "(1)" - line 420, "pan.___", state 452, "(1)" - line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 461, "(1)" - line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 462, "else" - line 424, "pan.___", state 465, "(1)" - line 424, "pan.___", state 466, "(1)" - line 424, "pan.___", state 466, "(1)" - line 422, "pan.___", state 471, "((i<2))" - line 422, "pan.___", state 471, "((i>=2))" - line 429, "pan.___", state 478, "(1)" - line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 479, "else" - line 429, "pan.___", state 482, "(1)" - line 429, "pan.___", state 483, "(1)" - line 429, "pan.___", state 483, "(1)" - line 433, "pan.___", state 491, "(1)" - line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 492, "else" - line 433, "pan.___", state 495, "(1)" - line 433, "pan.___", state 496, "(1)" - line 433, "pan.___", state 496, "(1)" - line 431, "pan.___", state 501, "((i<1))" - line 431, "pan.___", state 501, "((i>=1))" - line 438, "pan.___", state 508, "(1)" - line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 509, "else" - line 438, "pan.___", state 512, "(1)" - line 438, "pan.___", state 513, "(1)" - line 438, "pan.___", state 513, "(1)" - line 442, "pan.___", state 521, "(1)" - line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 522, "else" - line 442, "pan.___", state 525, "(1)" - line 442, "pan.___", state 526, "(1)" - line 442, "pan.___", state 526, "(1)" - line 440, "pan.___", state 531, "((i<2))" - line 440, "pan.___", state 531, "((i>=2))" - line 450, "pan.___", state 535, "(1)" - line 450, "pan.___", state 535, "(1)" - line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 540, "(1)" - line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 555, "(1)" - line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 591, "(1)" - line 253, "pan.___", state 599, "(1)" - line 257, "pan.___", state 611, "(1)" - line 261, "pan.___", state 619, "(1)" - line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 702, "(1)" - line 433, "pan.___", state 715, "(1)" - line 438, "pan.___", state 732, "(1)" - line 442, "pan.___", state 745, "(1)" - line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 838, "(1)" - line 438, "pan.___", state 868, "(1)" - line 442, "pan.___", state 881, "(1)" - line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 904, "(1)" - line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 905, "else" - line 411, "pan.___", state 908, "(1)" - line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 918, "(1)" - line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 919, "else" - line 415, "pan.___", state 922, "(1)" - line 415, "pan.___", state 923, "(1)" - line 415, "pan.___", state 923, "(1)" - line 413, "pan.___", state 928, "((i<1))" - line 413, "pan.___", state 928, "((i>=1))" - line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 936, "(1)" - line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 937, "else" - line 420, "pan.___", state 940, "(1)" - line 420, "pan.___", state 941, "(1)" - line 420, "pan.___", state 941, "(1)" - line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 950, "(1)" - line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 951, "else" - line 424, "pan.___", state 954, "(1)" - line 424, "pan.___", state 955, "(1)" - line 424, "pan.___", state 955, "(1)" - line 422, "pan.___", state 960, "((i<2))" - line 422, "pan.___", state 960, "((i>=2))" - line 429, "pan.___", state 967, "(1)" - line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 968, "else" - line 429, "pan.___", state 971, "(1)" - line 429, "pan.___", state 972, "(1)" - line 429, "pan.___", state 972, "(1)" - line 433, "pan.___", state 980, "(1)" - line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 981, "else" - line 433, "pan.___", state 984, "(1)" - line 433, "pan.___", state 985, "(1)" - line 433, "pan.___", state 985, "(1)" - line 431, "pan.___", state 990, "((i<1))" - line 431, "pan.___", state 990, "((i>=1))" - line 438, "pan.___", state 997, "(1)" - line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 998, "else" - line 438, "pan.___", state 1001, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 442, "pan.___", state 1010, "(1)" - line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 1011, "else" - line 442, "pan.___", state 1014, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 440, "pan.___", state 1020, "((i<2))" - line 440, "pan.___", state 1020, "((i>=2))" - line 450, "pan.___", state 1024, "(1)" - line 450, "pan.___", state 1024, "(1)" - line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1098, "(1)" - line 433, "pan.___", state 1111, "(1)" - line 438, "pan.___", state 1128, "(1)" - line 442, "pan.___", state 1141, "(1)" - line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1230, "(1)" - line 438, "pan.___", state 1260, "(1)" - line 442, "pan.___", state 1273, "(1)" - line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1363, "(1)" - line 438, "pan.___", state 1393, "(1)" - line 442, "pan.___", state 1406, "(1)" - line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1492, "(1)" - line 438, "pan.___", state 1522, "(1)" - line 442, "pan.___", state 1535, "(1)" - line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1605, "(1)" - line 253, "pan.___", state 1613, "(1)" - line 257, "pan.___", state 1625, "(1)" - line 261, "pan.___", state 1633, "(1)" - line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1716, "(1)" - line 433, "pan.___", state 1729, "(1)" - line 438, "pan.___", state 1746, "(1)" - line 442, "pan.___", state 1759, "(1)" - line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1845, "(1)" - line 433, "pan.___", state 1858, "(1)" - line 438, "pan.___", state 1875, "(1)" - line 442, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1977, "(1)" - line 438, "pan.___", state 2007, "(1)" - line 442, "pan.___", state 2020, "(1)" - line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2113, "(1)" - line 438, "pan.___", state 2143, "(1)" - line 442, "pan.___", state 2156, "(1)" - line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2242, "(1)" - line 438, "pan.___", state 2272, "(1)" - line 442, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2310, "(1)" - line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2311, "else" - line 411, "pan.___", state 2314, "(1)" - line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2324, "(1)" - line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2325, "else" - line 415, "pan.___", state 2328, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 413, "pan.___", state 2334, "((i<1))" - line 413, "pan.___", state 2334, "((i>=1))" - line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2342, "(1)" - line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2343, "else" - line 420, "pan.___", state 2346, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2356, "(1)" - line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2357, "else" - line 424, "pan.___", state 2360, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 422, "pan.___", state 2366, "((i<2))" - line 422, "pan.___", state 2366, "((i>=2))" - line 429, "pan.___", state 2373, "(1)" - line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 2374, "else" - line 429, "pan.___", state 2377, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 433, "pan.___", state 2386, "(1)" - line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 2387, "else" - line 433, "pan.___", state 2390, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 431, "pan.___", state 2396, "((i<1))" - line 431, "pan.___", state 2396, "((i>=1))" - line 438, "pan.___", state 2403, "(1)" - line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 2404, "else" - line 438, "pan.___", state 2407, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 442, "pan.___", state 2416, "(1)" - line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 2417, "else" - line 442, "pan.___", state 2420, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 440, "pan.___", state 2426, "((i<2))" - line 440, "pan.___", state 2426, "((i>=2))" - line 450, "pan.___", state 2430, "(1)" - line 450, "pan.___", state 2430, "(1)" - line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2435, "(1)" - line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2486, "(1)" - line 253, "pan.___", state 2494, "(1)" - line 257, "pan.___", state 2506, "(1)" - line 261, "pan.___", state 2514, "(1)" - line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2597, "(1)" - line 433, "pan.___", state 2610, "(1)" - line 438, "pan.___", state 2627, "(1)" - line 442, "pan.___", state 2640, "(1)" - line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2711, "(1)" - line 253, "pan.___", state 2719, "(1)" - line 257, "pan.___", state 2731, "(1)" - line 261, "pan.___", state 2739, "(1)" - line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2822, "(1)" - line 433, "pan.___", state 2835, "(1)" - line 438, "pan.___", state 2852, "(1)" - line 442, "pan.___", state 2865, "(1)" - line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2951, "(1)" - line 433, "pan.___", state 2964, "(1)" - line 438, "pan.___", state 2981, "(1)" - line 442, "pan.___", state 2994, "(1)" - line 249, "pan.___", state 3027, "(1)" - line 257, "pan.___", state 3047, "(1)" - line 261, "pan.___", state 3055, "(1)" - line 249, "pan.___", state 3070, "(1)" - line 253, "pan.___", state 3078, "(1)" - line 257, "pan.___", state 3090, "(1)" - line 261, "pan.___", state 3098, "(1)" - line 898, "pan.___", state 3115, "-end-" - (283 of 3115 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 429, "pan.___", state 83, "(1)" - line 433, "pan.___", state 96, "(1)" - line 438, "pan.___", state 113, "(1)" - line 272, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 276, "(1)" - line 433, "pan.___", state 289, "(1)" - line 438, "pan.___", state 306, "(1)" - line 442, "pan.___", state 319, "(1)" - line 415, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 420, "(1)" - line 438, "pan.___", state 437, "(1)" - line 442, "pan.___", state 450, "(1)" - line 415, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 559, "(1)" - line 438, "pan.___", state 576, "(1)" - line 442, "pan.___", state 589, "(1)" - line 415, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 688, "(1)" - line 438, "pan.___", state 705, "(1)" - line 442, "pan.___", state 718, "(1)" - line 415, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 819, "(1)" - line 438, "pan.___", state 836, "(1)" - line 442, "pan.___", state 849, "(1)" - line 272, "pan.___", state 899, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 908, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 921, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 946, "(1)" - line 253, "pan.___", state 954, "(1)" - line 257, "pan.___", state 966, "(1)" - line 261, "pan.___", state 974, "(1)" - line 272, "pan.___", state 994, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1003, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1018, "(1)" - line 284, "pan.___", state 1025, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1041, "(1)" - line 253, "pan.___", state 1049, "(1)" - line 257, "pan.___", state 1061, "(1)" - line 261, "pan.___", state 1069, "(1)" - line 276, "pan.___", state 1094, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1107, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1132, "(1)" - line 253, "pan.___", state 1140, "(1)" - line 257, "pan.___", state 1152, "(1)" - line 261, "pan.___", state 1160, "(1)" - line 276, "pan.___", state 1185, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1198, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1207, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1223, "(1)" - line 253, "pan.___", state 1231, "(1)" - line 257, "pan.___", state 1243, "(1)" - line 261, "pan.___", state 1251, "(1)" - line 276, "pan.___", state 1276, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1289, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1298, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1314, "(1)" - line 253, "pan.___", state 1322, "(1)" - line 257, "pan.___", state 1334, "(1)" - line 261, "pan.___", state 1342, "(1)" - line 1237, "pan.___", state 1357, "-end-" - (78 of 1357 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1302, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 3.47e+04 seconds -pan: rate 831.51243 states/second -pan: avg transition delay 1.3538e-06 usec -cp .input.spin urcu_progress_reader.spin.input -cp .input.spin.trail urcu_progress_reader.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.spin.input deleted file mode 100644 index da34f03..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define READER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.define b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.log deleted file mode 100644 index 9bc0ba8..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.log +++ /dev/null @@ -1,505 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -depth 23: Claim reached state 9 (line 1300) -depth 1559: Claim reached state 9 (line 1299) -Depth= 4420 States= 1e+06 Transitions= 6.06e+08 Memory= 491.936 t= 782 R= 1e+03 -Depth= 4420 States= 2e+06 Transitions= 1.36e+09 Memory= 516.838 t= 1.76e+03 R= 1e+03 -Depth= 4477 States= 3e+06 Transitions= 1.91e+09 Memory= 542.424 t= 2.47e+03 R= 1e+03 -pan: resizing hashtable to -w22.. done -Depth= 4770 States= 4e+06 Transitions= 2.71e+09 Memory= 598.545 t= 3.51e+03 R= 1e+03 -Depth= 4829 States= 5e+06 Transitions= 3.25e+09 Memory= 623.838 t= 4.2e+03 R= 1e+03 -Depth= 5120 States= 6e+06 Transitions= 4.02e+09 Memory= 648.838 t= 5.19e+03 R= 1e+03 -Depth= 5188 States= 7e+06 Transitions= 4.89e+09 Memory= 693.662 t= 6.32e+03 R= 1e+03 -Depth= 5188 States= 8e+06 Transitions= 5.86e+09 Memory= 742.588 t= 7.58e+03 R= 1e+03 -Depth= 5188 States= 9e+06 Transitions= 6.88e+09 Memory= 781.651 t= 8.92e+03 R= 1e+03 -pan: resizing hashtable to -w24.. done -Depth= 5188 States= 1e+07 Transitions= 7.86e+09 Memory= 952.229 t= 1.02e+04 R= 1e+03 -Depth= 5188 States= 1.1e+07 Transitions= 8.82e+09 Memory= 991.096 t= 1.15e+04 R= 1e+03 -Depth= 5436 States= 1.2e+07 Transitions= 9.74e+09 Memory= 1031.037 t= 1.27e+04 R= 9e+02 -Depth= 5479 States= 1.3e+07 Transitions= 1.07e+10 Memory= 1074.006 t= 1.4e+04 R= 9e+02 -Depth= 5479 States= 1.4e+07 Transitions= 1.16e+10 Memory= 1117.658 t= 1.52e+04 R= 9e+02 -Depth= 5479 States= 1.5e+07 Transitions= 1.25e+10 Memory= 1160.529 t= 1.63e+04 R= 9e+02 -Depth= 5479 States= 1.6e+07 Transitions= 1.36e+10 Memory= 1208.772 t= 1.77e+04 R= 9e+02 -Depth= 5479 States= 1.7e+07 Transitions= 1.45e+10 Memory= 1253.401 t= 1.88e+04 R= 9e+02 -Depth= 5479 States= 1.8e+07 Transitions= 1.54e+10 Memory= 1278.986 t= 2.01e+04 R= 9e+02 -Depth= 5479 States= 1.9e+07 Transitions= 1.64e+10 Memory= 1333.186 t= 2.14e+04 R= 9e+02 -Depth= 5479 States= 2e+07 Transitions= 1.73e+10 Memory= 1370.979 t= 2.26e+04 R= 9e+02 -Depth= 5479 States= 2.1e+07 Transitions= 1.83e+10 Memory= 1415.998 t= 2.39e+04 R= 9e+02 -Depth= 5479 States= 2.2e+07 Transitions= 1.92e+10 Memory= 1455.940 t= 2.51e+04 R= 9e+02 -Depth= 5479 States= 2.3e+07 Transitions= 2.02e+10 Memory= 1499.397 t= 2.63e+04 R= 9e+02 -Depth= 5479 States= 2.4e+07 Transitions= 2.1e+10 Memory= 1542.951 t= 2.75e+04 R= 9e+02 -Depth= 5588 States= 2.5e+07 Transitions= 2.21e+10 Memory= 1589.533 t= 2.89e+04 R= 9e+02 -Depth= 5588 States= 2.6e+07 Transitions= 2.31e+10 Memory= 1630.647 t= 3.02e+04 R= 9e+02 -Depth= 5588 States= 2.7e+07 Transitions= 2.4e+10 Memory= 1669.123 t= 3.14e+04 R= 9e+02 -Depth= 5588 States= 2.8e+07 Transitions= 2.5e+10 Memory= 1714.533 t= 3.27e+04 R= 9e+02 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 5588, errors: 0 - 13563866 states, stored (2.88596e+07 visited) -2.5765769e+10 states, matched -2.5794629e+10 transitions (= visited+matched) -1.4717516e+11 atomic steps -hash conflicts: 6.8547236e+09 (resolved) - -Stats on memory usage (in Megabytes): - 1500.519 equivalent memory usage for states (stored*(State-vector + overhead)) - 1175.436 actual memory usage for states (compression: 78.34%) - state-vector as stored = 63 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1760.432 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 82, "(1)" - line 438, "pan.___", state 112, "(1)" - line 442, "pan.___", state 125, "(1)" - line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 218, "(1)" - line 438, "pan.___", state 248, "(1)" - line 442, "pan.___", state 261, "(1)" - line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 347, "(1)" - line 438, "pan.___", state 377, "(1)" - line 442, "pan.___", state 390, "(1)" - line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 415, "(1)" - line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 416, "else" - line 411, "pan.___", state 419, "(1)" - line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 429, "(1)" - line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 430, "else" - line 415, "pan.___", state 433, "(1)" - line 415, "pan.___", state 434, "(1)" - line 415, "pan.___", state 434, "(1)" - line 413, "pan.___", state 439, "((i<1))" - line 413, "pan.___", state 439, "((i>=1))" - line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 447, "(1)" - line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 448, "else" - line 420, "pan.___", state 451, "(1)" - line 420, "pan.___", state 452, "(1)" - line 420, "pan.___", state 452, "(1)" - line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 461, "(1)" - line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 462, "else" - line 424, "pan.___", state 465, "(1)" - line 424, "pan.___", state 466, "(1)" - line 424, "pan.___", state 466, "(1)" - line 422, "pan.___", state 471, "((i<2))" - line 422, "pan.___", state 471, "((i>=2))" - line 429, "pan.___", state 478, "(1)" - line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 479, "else" - line 429, "pan.___", state 482, "(1)" - line 429, "pan.___", state 483, "(1)" - line 429, "pan.___", state 483, "(1)" - line 433, "pan.___", state 491, "(1)" - line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 492, "else" - line 433, "pan.___", state 495, "(1)" - line 433, "pan.___", state 496, "(1)" - line 433, "pan.___", state 496, "(1)" - line 431, "pan.___", state 501, "((i<1))" - line 431, "pan.___", state 501, "((i>=1))" - line 438, "pan.___", state 508, "(1)" - line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 509, "else" - line 438, "pan.___", state 512, "(1)" - line 438, "pan.___", state 513, "(1)" - line 438, "pan.___", state 513, "(1)" - line 442, "pan.___", state 521, "(1)" - line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 522, "else" - line 442, "pan.___", state 525, "(1)" - line 442, "pan.___", state 526, "(1)" - line 442, "pan.___", state 526, "(1)" - line 440, "pan.___", state 531, "((i<2))" - line 440, "pan.___", state 531, "((i>=2))" - line 450, "pan.___", state 535, "(1)" - line 450, "pan.___", state 535, "(1)" - line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 540, "(1)" - line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 555, "(1)" - line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 591, "(1)" - line 253, "pan.___", state 599, "(1)" - line 257, "pan.___", state 611, "(1)" - line 261, "pan.___", state 619, "(1)" - line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 702, "(1)" - line 433, "pan.___", state 715, "(1)" - line 438, "pan.___", state 732, "(1)" - line 442, "pan.___", state 745, "(1)" - line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 838, "(1)" - line 438, "pan.___", state 868, "(1)" - line 442, "pan.___", state 881, "(1)" - line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 904, "(1)" - line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 905, "else" - line 411, "pan.___", state 908, "(1)" - line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 918, "(1)" - line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 919, "else" - line 415, "pan.___", state 922, "(1)" - line 415, "pan.___", state 923, "(1)" - line 415, "pan.___", state 923, "(1)" - line 413, "pan.___", state 928, "((i<1))" - line 413, "pan.___", state 928, "((i>=1))" - line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 936, "(1)" - line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 937, "else" - line 420, "pan.___", state 940, "(1)" - line 420, "pan.___", state 941, "(1)" - line 420, "pan.___", state 941, "(1)" - line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 950, "(1)" - line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 951, "else" - line 424, "pan.___", state 954, "(1)" - line 424, "pan.___", state 955, "(1)" - line 424, "pan.___", state 955, "(1)" - line 422, "pan.___", state 960, "((i<2))" - line 422, "pan.___", state 960, "((i>=2))" - line 429, "pan.___", state 967, "(1)" - line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 968, "else" - line 429, "pan.___", state 971, "(1)" - line 429, "pan.___", state 972, "(1)" - line 429, "pan.___", state 972, "(1)" - line 433, "pan.___", state 980, "(1)" - line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 981, "else" - line 433, "pan.___", state 984, "(1)" - line 433, "pan.___", state 985, "(1)" - line 433, "pan.___", state 985, "(1)" - line 431, "pan.___", state 990, "((i<1))" - line 431, "pan.___", state 990, "((i>=1))" - line 438, "pan.___", state 997, "(1)" - line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 998, "else" - line 438, "pan.___", state 1001, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 438, "pan.___", state 1002, "(1)" - line 442, "pan.___", state 1010, "(1)" - line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 1011, "else" - line 442, "pan.___", state 1014, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 442, "pan.___", state 1015, "(1)" - line 440, "pan.___", state 1020, "((i<2))" - line 440, "pan.___", state 1020, "((i>=2))" - line 450, "pan.___", state 1024, "(1)" - line 450, "pan.___", state 1024, "(1)" - line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1098, "(1)" - line 433, "pan.___", state 1111, "(1)" - line 438, "pan.___", state 1128, "(1)" - line 442, "pan.___", state 1141, "(1)" - line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1230, "(1)" - line 438, "pan.___", state 1260, "(1)" - line 442, "pan.___", state 1273, "(1)" - line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1363, "(1)" - line 438, "pan.___", state 1393, "(1)" - line 442, "pan.___", state 1406, "(1)" - line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1492, "(1)" - line 438, "pan.___", state 1522, "(1)" - line 442, "pan.___", state 1535, "(1)" - line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1605, "(1)" - line 253, "pan.___", state 1613, "(1)" - line 257, "pan.___", state 1625, "(1)" - line 261, "pan.___", state 1633, "(1)" - line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1716, "(1)" - line 433, "pan.___", state 1729, "(1)" - line 438, "pan.___", state 1746, "(1)" - line 442, "pan.___", state 1759, "(1)" - line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1845, "(1)" - line 433, "pan.___", state 1858, "(1)" - line 438, "pan.___", state 1875, "(1)" - line 442, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 1977, "(1)" - line 438, "pan.___", state 2007, "(1)" - line 442, "pan.___", state 2020, "(1)" - line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2113, "(1)" - line 438, "pan.___", state 2143, "(1)" - line 442, "pan.___", state 2156, "(1)" - line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2242, "(1)" - line 438, "pan.___", state 2272, "(1)" - line 442, "pan.___", state 2285, "(1)" - line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2310, "(1)" - line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2311, "else" - line 411, "pan.___", state 2314, "(1)" - line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2324, "(1)" - line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2325, "else" - line 415, "pan.___", state 2328, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 415, "pan.___", state 2329, "(1)" - line 413, "pan.___", state 2334, "((i<1))" - line 413, "pan.___", state 2334, "((i>=1))" - line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2342, "(1)" - line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2343, "else" - line 420, "pan.___", state 2346, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 420, "pan.___", state 2347, "(1)" - line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2356, "(1)" - line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2357, "else" - line 424, "pan.___", state 2360, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 424, "pan.___", state 2361, "(1)" - line 422, "pan.___", state 2366, "((i<2))" - line 422, "pan.___", state 2366, "((i>=2))" - line 429, "pan.___", state 2373, "(1)" - line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 429, "pan.___", state 2374, "else" - line 429, "pan.___", state 2377, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 429, "pan.___", state 2378, "(1)" - line 433, "pan.___", state 2386, "(1)" - line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 433, "pan.___", state 2387, "else" - line 433, "pan.___", state 2390, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 433, "pan.___", state 2391, "(1)" - line 431, "pan.___", state 2396, "((i<1))" - line 431, "pan.___", state 2396, "((i>=1))" - line 438, "pan.___", state 2403, "(1)" - line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 438, "pan.___", state 2404, "else" - line 438, "pan.___", state 2407, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 438, "pan.___", state 2408, "(1)" - line 442, "pan.___", state 2416, "(1)" - line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 442, "pan.___", state 2417, "else" - line 442, "pan.___", state 2420, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 442, "pan.___", state 2421, "(1)" - line 440, "pan.___", state 2426, "((i<2))" - line 440, "pan.___", state 2426, "((i>=2))" - line 450, "pan.___", state 2430, "(1)" - line 450, "pan.___", state 2430, "(1)" - line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2435, "(1)" - line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2486, "(1)" - line 253, "pan.___", state 2494, "(1)" - line 257, "pan.___", state 2506, "(1)" - line 261, "pan.___", state 2514, "(1)" - line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2597, "(1)" - line 433, "pan.___", state 2610, "(1)" - line 438, "pan.___", state 2627, "(1)" - line 442, "pan.___", state 2640, "(1)" - line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2711, "(1)" - line 253, "pan.___", state 2719, "(1)" - line 257, "pan.___", state 2731, "(1)" - line 261, "pan.___", state 2739, "(1)" - line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2822, "(1)" - line 433, "pan.___", state 2835, "(1)" - line 438, "pan.___", state 2852, "(1)" - line 442, "pan.___", state 2865, "(1)" - line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 2951, "(1)" - line 433, "pan.___", state 2964, "(1)" - line 438, "pan.___", state 2981, "(1)" - line 442, "pan.___", state 2994, "(1)" - line 249, "pan.___", state 3027, "(1)" - line 257, "pan.___", state 3047, "(1)" - line 261, "pan.___", state 3055, "(1)" - line 249, "pan.___", state 3070, "(1)" - line 253, "pan.___", state 3078, "(1)" - line 257, "pan.___", state 3090, "(1)" - line 261, "pan.___", state 3098, "(1)" - line 898, "pan.___", state 3115, "-end-" - (283 of 3115 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 429, "pan.___", state 83, "(1)" - line 433, "pan.___", state 96, "(1)" - line 438, "pan.___", state 113, "(1)" - line 272, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 429, "pan.___", state 276, "(1)" - line 433, "pan.___", state 289, "(1)" - line 438, "pan.___", state 306, "(1)" - line 442, "pan.___", state 319, "(1)" - line 415, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 420, "(1)" - line 438, "pan.___", state 437, "(1)" - line 442, "pan.___", state 450, "(1)" - line 415, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 559, "(1)" - line 438, "pan.___", state 576, "(1)" - line 442, "pan.___", state 589, "(1)" - line 415, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 688, "(1)" - line 438, "pan.___", state 705, "(1)" - line 442, "pan.___", state 718, "(1)" - line 415, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 433, "pan.___", state 819, "(1)" - line 438, "pan.___", state 836, "(1)" - line 442, "pan.___", state 849, "(1)" - line 272, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 928, "(1)" - line 284, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 951, "(1)" - line 253, "pan.___", state 959, "(1)" - line 257, "pan.___", state 971, "(1)" - line 261, "pan.___", state 979, "(1)" - line 276, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1042, "(1)" - line 253, "pan.___", state 1050, "(1)" - line 257, "pan.___", state 1062, "(1)" - line 261, "pan.___", state 1070, "(1)" - line 276, "pan.___", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1133, "(1)" - line 253, "pan.___", state 1141, "(1)" - line 257, "pan.___", state 1153, "(1)" - line 261, "pan.___", state 1161, "(1)" - line 276, "pan.___", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1224, "(1)" - line 253, "pan.___", state 1232, "(1)" - line 257, "pan.___", state 1244, "(1)" - line 261, "pan.___", state 1252, "(1)" - line 1237, "pan.___", state 1267, "-end-" - (71 of 1267 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1302, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 3.38e+04 seconds -pan: rate 854.75351 states/second -pan: avg transition delay 1.3089e-06 usec -cp .input.spin urcu_progress_writer.spin.input -cp .input.spin.trail urcu_progress_writer.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.spin.input deleted file mode 100644 index 051f2f3..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.log b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.log deleted file mode 100644 index 0912929..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.log +++ /dev/null @@ -1,757 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1296) -depth 23: Claim reached state 9 (line 1301) -depth 1559: Claim reached state 9 (line 1300) -pan: acceptance cycle (at depth 6380) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 7421, errors: 1 - 55319 states, stored (173044 visited) - 69543507 states, matched - 69716551 transitions (= visited+matched) -3.7666148e+08 atomic steps -hash conflicts: 1148679 (resolved) - -Stats on memory usage (in Megabytes): - 6.120 equivalent memory usage for states (stored*(State-vector + overhead)) - 5.332 actual memory usage for states (compression: 87.12%) - state-vector as stored = 73 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 471.037 total actual memory usage - -unreached in proctype urcu_reader - line 412, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 82, "(1)" - line 439, "pan.___", state 112, "(1)" - line 443, "pan.___", state 125, "(1)" - line 598, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 412, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 218, "(1)" - line 439, "pan.___", state 248, "(1)" - line 443, "pan.___", state 261, "(1)" - line 412, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 347, "(1)" - line 439, "pan.___", state 377, "(1)" - line 443, "pan.___", state 390, "(1)" - line 412, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 415, "(1)" - line 412, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 416, "else" - line 412, "pan.___", state 419, "(1)" - line 416, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 429, "(1)" - line 416, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 430, "else" - line 416, "pan.___", state 433, "(1)" - line 416, "pan.___", state 434, "(1)" - line 416, "pan.___", state 434, "(1)" - line 414, "pan.___", state 439, "((i<1))" - line 414, "pan.___", state 439, "((i>=1))" - line 421, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 447, "(1)" - line 421, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 448, "else" - line 421, "pan.___", state 451, "(1)" - line 421, "pan.___", state 452, "(1)" - line 421, "pan.___", state 452, "(1)" - line 425, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 461, "(1)" - line 425, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 462, "else" - line 425, "pan.___", state 465, "(1)" - line 425, "pan.___", state 466, "(1)" - line 425, "pan.___", state 466, "(1)" - line 423, "pan.___", state 471, "((i<2))" - line 423, "pan.___", state 471, "((i>=2))" - line 430, "pan.___", state 478, "(1)" - line 430, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 479, "else" - line 430, "pan.___", state 482, "(1)" - line 430, "pan.___", state 483, "(1)" - line 430, "pan.___", state 483, "(1)" - line 434, "pan.___", state 491, "(1)" - line 434, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 492, "else" - line 434, "pan.___", state 495, "(1)" - line 434, "pan.___", state 496, "(1)" - line 434, "pan.___", state 496, "(1)" - line 432, "pan.___", state 501, "((i<1))" - line 432, "pan.___", state 501, "((i>=1))" - line 439, "pan.___", state 508, "(1)" - line 439, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 509, "else" - line 439, "pan.___", state 512, "(1)" - line 439, "pan.___", state 513, "(1)" - line 439, "pan.___", state 513, "(1)" - line 443, "pan.___", state 521, "(1)" - line 443, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 522, "else" - line 443, "pan.___", state 525, "(1)" - line 443, "pan.___", state 526, "(1)" - line 443, "pan.___", state 526, "(1)" - line 441, "pan.___", state 531, "((i<2))" - line 441, "pan.___", state 531, "((i>=2))" - line 451, "pan.___", state 535, "(1)" - line 451, "pan.___", state 535, "(1)" - line 598, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 598, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 598, "pan.___", state 540, "(1)" - line 273, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 555, "(1)" - line 281, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 591, "(1)" - line 254, "pan.___", state 599, "(1)" - line 258, "pan.___", state 611, "(1)" - line 262, "pan.___", state 619, "(1)" - line 412, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 702, "(1)" - line 434, "pan.___", state 715, "(1)" - line 439, "pan.___", state 732, "(1)" - line 443, "pan.___", state 745, "(1)" - line 412, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 838, "(1)" - line 439, "pan.___", state 868, "(1)" - line 443, "pan.___", state 881, "(1)" - line 412, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 904, "(1)" - line 412, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 905, "else" - line 412, "pan.___", state 908, "(1)" - line 416, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 918, "(1)" - line 416, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 919, "else" - line 416, "pan.___", state 922, "(1)" - line 416, "pan.___", state 923, "(1)" - line 416, "pan.___", state 923, "(1)" - line 414, "pan.___", state 928, "((i<1))" - line 414, "pan.___", state 928, "((i>=1))" - line 421, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 936, "(1)" - line 421, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 937, "else" - line 421, "pan.___", state 940, "(1)" - line 421, "pan.___", state 941, "(1)" - line 421, "pan.___", state 941, "(1)" - line 425, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 950, "(1)" - line 425, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 951, "else" - line 425, "pan.___", state 954, "(1)" - line 425, "pan.___", state 955, "(1)" - line 425, "pan.___", state 955, "(1)" - line 423, "pan.___", state 960, "((i<2))" - line 423, "pan.___", state 960, "((i>=2))" - line 430, "pan.___", state 967, "(1)" - line 430, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 968, "else" - line 430, "pan.___", state 971, "(1)" - line 430, "pan.___", state 972, "(1)" - line 430, "pan.___", state 972, "(1)" - line 434, "pan.___", state 980, "(1)" - line 434, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 981, "else" - line 434, "pan.___", state 984, "(1)" - line 434, "pan.___", state 985, "(1)" - line 434, "pan.___", state 985, "(1)" - line 432, "pan.___", state 990, "((i<1))" - line 432, "pan.___", state 990, "((i>=1))" - line 439, "pan.___", state 997, "(1)" - line 439, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 998, "else" - line 439, "pan.___", state 1001, "(1)" - line 439, "pan.___", state 1002, "(1)" - line 439, "pan.___", state 1002, "(1)" - line 443, "pan.___", state 1010, "(1)" - line 443, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 1011, "else" - line 443, "pan.___", state 1014, "(1)" - line 443, "pan.___", state 1015, "(1)" - line 443, "pan.___", state 1015, "(1)" - line 441, "pan.___", state 1020, "((i<2))" - line 441, "pan.___", state 1020, "((i>=2))" - line 451, "pan.___", state 1024, "(1)" - line 451, "pan.___", state 1024, "(1)" - line 606, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 412, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1098, "(1)" - line 434, "pan.___", state 1111, "(1)" - line 439, "pan.___", state 1128, "(1)" - line 443, "pan.___", state 1141, "(1)" - line 412, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1230, "(1)" - line 439, "pan.___", state 1260, "(1)" - line 443, "pan.___", state 1273, "(1)" - line 412, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1363, "(1)" - line 439, "pan.___", state 1393, "(1)" - line 443, "pan.___", state 1406, "(1)" - line 412, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1492, "(1)" - line 439, "pan.___", state 1522, "(1)" - line 443, "pan.___", state 1535, "(1)" - line 273, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1605, "(1)" - line 254, "pan.___", state 1613, "(1)" - line 258, "pan.___", state 1625, "(1)" - line 262, "pan.___", state 1633, "(1)" - line 412, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1716, "(1)" - line 434, "pan.___", state 1729, "(1)" - line 439, "pan.___", state 1746, "(1)" - line 443, "pan.___", state 1759, "(1)" - line 412, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1845, "(1)" - line 434, "pan.___", state 1858, "(1)" - line 439, "pan.___", state 1875, "(1)" - line 443, "pan.___", state 1888, "(1)" - line 412, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1977, "(1)" - line 439, "pan.___", state 2007, "(1)" - line 443, "pan.___", state 2020, "(1)" - line 645, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 412, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 2113, "(1)" - line 439, "pan.___", state 2143, "(1)" - line 443, "pan.___", state 2156, "(1)" - line 412, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 2242, "(1)" - line 439, "pan.___", state 2272, "(1)" - line 443, "pan.___", state 2285, "(1)" - line 412, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 2310, "(1)" - line 412, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 2311, "else" - line 412, "pan.___", state 2314, "(1)" - line 416, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2324, "(1)" - line 416, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 2325, "else" - line 416, "pan.___", state 2328, "(1)" - line 416, "pan.___", state 2329, "(1)" - line 416, "pan.___", state 2329, "(1)" - line 414, "pan.___", state 2334, "((i<1))" - line 414, "pan.___", state 2334, "((i>=1))" - line 421, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2342, "(1)" - line 421, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 2343, "else" - line 421, "pan.___", state 2346, "(1)" - line 421, "pan.___", state 2347, "(1)" - line 421, "pan.___", state 2347, "(1)" - line 425, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2356, "(1)" - line 425, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 2357, "else" - line 425, "pan.___", state 2360, "(1)" - line 425, "pan.___", state 2361, "(1)" - line 425, "pan.___", state 2361, "(1)" - line 423, "pan.___", state 2366, "((i<2))" - line 423, "pan.___", state 2366, "((i>=2))" - line 430, "pan.___", state 2373, "(1)" - line 430, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 2374, "else" - line 430, "pan.___", state 2377, "(1)" - line 430, "pan.___", state 2378, "(1)" - line 430, "pan.___", state 2378, "(1)" - line 434, "pan.___", state 2386, "(1)" - line 434, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 2387, "else" - line 434, "pan.___", state 2390, "(1)" - line 434, "pan.___", state 2391, "(1)" - line 434, "pan.___", state 2391, "(1)" - line 432, "pan.___", state 2396, "((i<1))" - line 432, "pan.___", state 2396, "((i>=1))" - line 439, "pan.___", state 2403, "(1)" - line 439, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 2404, "else" - line 439, "pan.___", state 2407, "(1)" - line 439, "pan.___", state 2408, "(1)" - line 439, "pan.___", state 2408, "(1)" - line 443, "pan.___", state 2416, "(1)" - line 443, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 2417, "else" - line 443, "pan.___", state 2420, "(1)" - line 443, "pan.___", state 2421, "(1)" - line 443, "pan.___", state 2421, "(1)" - line 441, "pan.___", state 2426, "((i<2))" - line 441, "pan.___", state 2426, "((i>=2))" - line 451, "pan.___", state 2430, "(1)" - line 451, "pan.___", state 2430, "(1)" - line 645, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 645, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 645, "pan.___", state 2435, "(1)" - line 273, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 2486, "(1)" - line 254, "pan.___", state 2494, "(1)" - line 258, "pan.___", state 2506, "(1)" - line 262, "pan.___", state 2514, "(1)" - line 412, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 2597, "(1)" - line 434, "pan.___", state 2610, "(1)" - line 439, "pan.___", state 2627, "(1)" - line 443, "pan.___", state 2640, "(1)" - line 273, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 2711, "(1)" - line 254, "pan.___", state 2719, "(1)" - line 258, "pan.___", state 2731, "(1)" - line 262, "pan.___", state 2739, "(1)" - line 412, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 2822, "(1)" - line 434, "pan.___", state 2835, "(1)" - line 439, "pan.___", state 2852, "(1)" - line 443, "pan.___", state 2865, "(1)" - line 412, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 2951, "(1)" - line 434, "pan.___", state 2964, "(1)" - line 439, "pan.___", state 2981, "(1)" - line 443, "pan.___", state 2994, "(1)" - line 250, "pan.___", state 3027, "(1)" - line 258, "pan.___", state 3047, "(1)" - line 262, "pan.___", state 3055, "(1)" - line 250, "pan.___", state 3070, "(1)" - line 254, "pan.___", state 3078, "(1)" - line 258, "pan.___", state 3090, "(1)" - line 262, "pan.___", state 3098, "(1)" - line 899, "pan.___", state 3115, "-end-" - (283 of 3115 states) -unreached in proctype urcu_writer - line 412, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 24, "(1)" - line 416, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 38, "(1)" - line 416, "pan.___", state 39, "(1)" - line 416, "pan.___", state 39, "(1)" - line 414, "pan.___", state 44, "((i<1))" - line 414, "pan.___", state 44, "((i>=1))" - line 421, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 56, "(1)" - line 421, "pan.___", state 57, "(1)" - line 421, "pan.___", state 57, "(1)" - line 425, "pan.___", state 64, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 70, "(1)" - line 425, "pan.___", state 71, "(1)" - line 425, "pan.___", state 71, "(1)" - line 423, "pan.___", state 76, "((i<2))" - line 423, "pan.___", state 76, "((i>=2))" - line 430, "pan.___", state 83, "(1)" - line 430, "pan.___", state 84, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 84, "else" - line 430, "pan.___", state 87, "(1)" - line 430, "pan.___", state 88, "(1)" - line 430, "pan.___", state 88, "(1)" - line 434, "pan.___", state 96, "(1)" - line 434, "pan.___", state 97, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 97, "else" - line 434, "pan.___", state 100, "(1)" - line 434, "pan.___", state 101, "(1)" - line 434, "pan.___", state 101, "(1)" - line 432, "pan.___", state 106, "((i<1))" - line 432, "pan.___", state 106, "((i>=1))" - line 439, "pan.___", state 113, "(1)" - line 439, "pan.___", state 114, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 114, "else" - line 439, "pan.___", state 117, "(1)" - line 439, "pan.___", state 118, "(1)" - line 439, "pan.___", state 118, "(1)" - line 443, "pan.___", state 126, "(1)" - line 443, "pan.___", state 127, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 127, "else" - line 443, "pan.___", state 130, "(1)" - line 443, "pan.___", state 131, "(1)" - line 443, "pan.___", state 131, "(1)" - line 441, "pan.___", state 136, "((i<2))" - line 441, "pan.___", state 136, "((i>=2))" - line 451, "pan.___", state 140, "(1)" - line 451, "pan.___", state 140, "(1)" - line 273, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 166, "((i<1))" - line 275, "pan.___", state 166, "((i>=1))" - line 281, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 1022, "pan.___", state 199, "old_data = cached_rcu_ptr.val[_pid]" - line 412, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 217, "(1)" - line 416, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 231, "(1)" - line 416, "pan.___", state 232, "(1)" - line 416, "pan.___", state 232, "(1)" - line 414, "pan.___", state 237, "((i<1))" - line 414, "pan.___", state 237, "((i>=1))" - line 421, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 249, "(1)" - line 421, "pan.___", state 250, "(1)" - line 421, "pan.___", state 250, "(1)" - line 425, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 263, "(1)" - line 425, "pan.___", state 264, "(1)" - line 425, "pan.___", state 264, "(1)" - line 423, "pan.___", state 269, "((i<2))" - line 423, "pan.___", state 269, "((i>=2))" - line 430, "pan.___", state 276, "(1)" - line 430, "pan.___", state 277, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 277, "else" - line 430, "pan.___", state 280, "(1)" - line 430, "pan.___", state 281, "(1)" - line 430, "pan.___", state 281, "(1)" - line 434, "pan.___", state 289, "(1)" - line 434, "pan.___", state 290, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 290, "else" - line 434, "pan.___", state 293, "(1)" - line 434, "pan.___", state 294, "(1)" - line 434, "pan.___", state 294, "(1)" - line 432, "pan.___", state 299, "((i<1))" - line 432, "pan.___", state 299, "((i>=1))" - line 439, "pan.___", state 306, "(1)" - line 439, "pan.___", state 307, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 307, "else" - line 439, "pan.___", state 310, "(1)" - line 439, "pan.___", state 311, "(1)" - line 439, "pan.___", state 311, "(1)" - line 443, "pan.___", state 319, "(1)" - line 443, "pan.___", state 320, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 320, "else" - line 443, "pan.___", state 323, "(1)" - line 443, "pan.___", state 324, "(1)" - line 443, "pan.___", state 324, "(1)" - line 441, "pan.___", state 329, "((i<2))" - line 441, "pan.___", state 329, "((i>=2))" - line 451, "pan.___", state 333, "(1)" - line 451, "pan.___", state 333, "(1)" - line 412, "pan.___", state 344, "(1)" - line 412, "pan.___", state 345, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 345, "else" - line 412, "pan.___", state 348, "(1)" - line 416, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 362, "(1)" - line 416, "pan.___", state 363, "(1)" - line 416, "pan.___", state 363, "(1)" - line 414, "pan.___", state 368, "((i<1))" - line 414, "pan.___", state 368, "((i>=1))" - line 421, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 380, "(1)" - line 421, "pan.___", state 381, "(1)" - line 421, "pan.___", state 381, "(1)" - line 425, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 394, "(1)" - line 425, "pan.___", state 395, "(1)" - line 425, "pan.___", state 395, "(1)" - line 423, "pan.___", state 400, "((i<2))" - line 423, "pan.___", state 400, "((i>=2))" - line 430, "pan.___", state 407, "(1)" - line 430, "pan.___", state 408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 408, "else" - line 430, "pan.___", state 411, "(1)" - line 430, "pan.___", state 412, "(1)" - line 430, "pan.___", state 412, "(1)" - line 434, "pan.___", state 420, "(1)" - line 434, "pan.___", state 421, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 421, "else" - line 434, "pan.___", state 424, "(1)" - line 434, "pan.___", state 425, "(1)" - line 434, "pan.___", state 425, "(1)" - line 432, "pan.___", state 430, "((i<1))" - line 432, "pan.___", state 430, "((i>=1))" - line 439, "pan.___", state 437, "(1)" - line 439, "pan.___", state 438, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 438, "else" - line 439, "pan.___", state 441, "(1)" - line 439, "pan.___", state 442, "(1)" - line 439, "pan.___", state 442, "(1)" - line 443, "pan.___", state 450, "(1)" - line 443, "pan.___", state 451, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 451, "else" - line 443, "pan.___", state 454, "(1)" - line 443, "pan.___", state 455, "(1)" - line 443, "pan.___", state 455, "(1)" - line 441, "pan.___", state 460, "((i<2))" - line 441, "pan.___", state 460, "((i>=2))" - line 451, "pan.___", state 464, "(1)" - line 451, "pan.___", state 464, "(1)" - line 412, "pan.___", state 477, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 479, "(1)" - line 412, "pan.___", state 480, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 480, "else" - line 412, "pan.___", state 483, "(1)" - line 416, "pan.___", state 491, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 493, "(1)" - line 416, "pan.___", state 494, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 494, "else" - line 416, "pan.___", state 497, "(1)" - line 416, "pan.___", state 498, "(1)" - line 416, "pan.___", state 498, "(1)" - line 414, "pan.___", state 503, "((i<1))" - line 414, "pan.___", state 503, "((i>=1))" - line 421, "pan.___", state 509, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 511, "(1)" - line 421, "pan.___", state 512, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 512, "else" - line 421, "pan.___", state 515, "(1)" - line 421, "pan.___", state 516, "(1)" - line 421, "pan.___", state 516, "(1)" - line 425, "pan.___", state 523, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 525, "(1)" - line 425, "pan.___", state 526, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 526, "else" - line 425, "pan.___", state 529, "(1)" - line 425, "pan.___", state 530, "(1)" - line 425, "pan.___", state 530, "(1)" - line 423, "pan.___", state 535, "((i<2))" - line 423, "pan.___", state 535, "((i>=2))" - line 430, "pan.___", state 542, "(1)" - line 430, "pan.___", state 543, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 543, "else" - line 430, "pan.___", state 546, "(1)" - line 430, "pan.___", state 547, "(1)" - line 430, "pan.___", state 547, "(1)" - line 434, "pan.___", state 555, "(1)" - line 434, "pan.___", state 556, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 556, "else" - line 434, "pan.___", state 559, "(1)" - line 434, "pan.___", state 560, "(1)" - line 434, "pan.___", state 560, "(1)" - line 432, "pan.___", state 565, "((i<1))" - line 432, "pan.___", state 565, "((i>=1))" - line 439, "pan.___", state 572, "(1)" - line 439, "pan.___", state 573, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 573, "else" - line 439, "pan.___", state 576, "(1)" - line 439, "pan.___", state 577, "(1)" - line 439, "pan.___", state 577, "(1)" - line 443, "pan.___", state 585, "(1)" - line 443, "pan.___", state 586, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 586, "else" - line 443, "pan.___", state 589, "(1)" - line 443, "pan.___", state 590, "(1)" - line 443, "pan.___", state 590, "(1)" - line 451, "pan.___", state 599, "(1)" - line 451, "pan.___", state 599, "(1)" - line 412, "pan.___", state 605, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 611, "(1)" - line 416, "pan.___", state 619, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 625, "(1)" - line 416, "pan.___", state 626, "(1)" - line 416, "pan.___", state 626, "(1)" - line 414, "pan.___", state 631, "((i<1))" - line 414, "pan.___", state 631, "((i>=1))" - line 421, "pan.___", state 637, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 643, "(1)" - line 421, "pan.___", state 644, "(1)" - line 421, "pan.___", state 644, "(1)" - line 425, "pan.___", state 651, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 657, "(1)" - line 425, "pan.___", state 658, "(1)" - line 425, "pan.___", state 658, "(1)" - line 423, "pan.___", state 663, "((i<2))" - line 423, "pan.___", state 663, "((i>=2))" - line 430, "pan.___", state 670, "(1)" - line 430, "pan.___", state 671, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 671, "else" - line 430, "pan.___", state 674, "(1)" - line 430, "pan.___", state 675, "(1)" - line 430, "pan.___", state 675, "(1)" - line 434, "pan.___", state 683, "(1)" - line 434, "pan.___", state 684, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 684, "else" - line 434, "pan.___", state 687, "(1)" - line 434, "pan.___", state 688, "(1)" - line 434, "pan.___", state 688, "(1)" - line 432, "pan.___", state 693, "((i<1))" - line 432, "pan.___", state 693, "((i>=1))" - line 439, "pan.___", state 700, "(1)" - line 439, "pan.___", state 701, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 701, "else" - line 439, "pan.___", state 704, "(1)" - line 439, "pan.___", state 705, "(1)" - line 439, "pan.___", state 705, "(1)" - line 443, "pan.___", state 713, "(1)" - line 443, "pan.___", state 714, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 714, "else" - line 443, "pan.___", state 717, "(1)" - line 443, "pan.___", state 718, "(1)" - line 443, "pan.___", state 718, "(1)" - line 451, "pan.___", state 727, "(1)" - line 451, "pan.___", state 727, "(1)" - line 412, "pan.___", state 734, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 740, "(1)" - line 416, "pan.___", state 748, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 754, "(1)" - line 416, "pan.___", state 755, "(1)" - line 416, "pan.___", state 755, "(1)" - line 414, "pan.___", state 760, "((i<1))" - line 414, "pan.___", state 760, "((i>=1))" - line 421, "pan.___", state 766, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 772, "(1)" - line 421, "pan.___", state 773, "(1)" - line 421, "pan.___", state 773, "(1)" - line 425, "pan.___", state 780, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 786, "(1)" - line 425, "pan.___", state 787, "(1)" - line 425, "pan.___", state 787, "(1)" - line 423, "pan.___", state 792, "((i<2))" - line 423, "pan.___", state 792, "((i>=2))" - line 430, "pan.___", state 799, "(1)" - line 430, "pan.___", state 800, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 430, "pan.___", state 800, "else" - line 430, "pan.___", state 803, "(1)" - line 430, "pan.___", state 804, "(1)" - line 430, "pan.___", state 804, "(1)" - line 434, "pan.___", state 812, "(1)" - line 434, "pan.___", state 813, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 434, "pan.___", state 813, "else" - line 434, "pan.___", state 816, "(1)" - line 434, "pan.___", state 817, "(1)" - line 434, "pan.___", state 817, "(1)" - line 432, "pan.___", state 822, "((i<1))" - line 432, "pan.___", state 822, "((i>=1))" - line 439, "pan.___", state 829, "(1)" - line 439, "pan.___", state 830, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 439, "pan.___", state 830, "else" - line 439, "pan.___", state 833, "(1)" - line 439, "pan.___", state 834, "(1)" - line 439, "pan.___", state 834, "(1)" - line 443, "pan.___", state 842, "(1)" - line 443, "pan.___", state 843, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 443, "pan.___", state 843, "else" - line 443, "pan.___", state 846, "(1)" - line 443, "pan.___", state 847, "(1)" - line 443, "pan.___", state 847, "(1)" - line 441, "pan.___", state 852, "((i<2))" - line 441, "pan.___", state 852, "((i>=2))" - line 451, "pan.___", state 856, "(1)" - line 451, "pan.___", state 856, "(1)" - line 416, "pan.___", state 879, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 897, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 911, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 434, "pan.___", state 943, "(1)" - line 439, "pan.___", state 960, "(1)" - line 443, "pan.___", state 973, "(1)" - line 412, "pan.___", state 999, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 1013, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1031, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1045, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 430, "pan.___", state 1064, "(1)" - line 434, "pan.___", state 1077, "(1)" - line 439, "pan.___", state 1094, "(1)" - line 443, "pan.___", state 1107, "(1)" - line 273, "pan.___", state 1153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 1162, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 1170, "((i<1))" - line 275, "pan.___", state 1170, "((i>=1))" - line 281, "pan.___", state 1177, "(1)" - line 281, "pan.___", state 1178, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 281, "pan.___", state 1178, "else" - line 285, "pan.___", state 1184, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1192, "((i<2))" - line 283, "pan.___", state 1192, "((i>=2))" - line 250, "pan.___", state 1200, "(1)" - line 254, "pan.___", state 1208, "(1)" - line 254, "pan.___", state 1209, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 1209, "else" - line 252, "pan.___", state 1214, "((i<1))" - line 252, "pan.___", state 1214, "((i>=1))" - line 258, "pan.___", state 1220, "(1)" - line 258, "pan.___", state 1221, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 1221, "else" - line 262, "pan.___", state 1228, "(1)" - line 262, "pan.___", state 1229, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 1229, "else" - line 267, "pan.___", state 1238, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 1238, "else" - line 277, "pan.___", state 1253, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 1266, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 1275, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1291, "(1)" - line 254, "pan.___", state 1299, "(1)" - line 258, "pan.___", state 1311, "(1)" - line 262, "pan.___", state 1319, "(1)" - line 1238, "pan.___", state 1334, "-end-" - (242 of 1334 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1303, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 88.5 seconds -pan: rate 1954.1954 states/second -pan: avg transition delay 1.2701e-06 usec -cp .input.spin urcu_progress_writer_error.spin.input -cp .input.spin.trail urcu_progress_writer_error.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input deleted file mode 100644 index ad4f91f..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,1274 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index 8ab0111..0000000 --- a/formal-model/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,7390 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4529 -2:3:4449 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-7374:2:4070 -7375:2:4071 -7376:2:4082 -7377:2:4083 -7378:2:4084 -7379:2:4082 -7380:2:4083 -7381:2:4084 -7382:2:4095 -7383:2:4103 -7384:0:4533 -7385:2:3127 -7386:0:4533 -7387:1:3013 diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/.input.define b/formal-model/urcu-controldataflow-intel-ipi-compress/.input.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/.input.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/.input.spin b/formal-model/urcu-controldataflow-intel-ipi-compress/.input.spin deleted file mode 100644 index 6cccb27..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/.input.spin +++ /dev/null @@ -1,1341 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/.input.spin.trail b/formal-model/urcu-controldataflow-intel-ipi-compress/.input.spin.trail deleted file mode 100644 index e9b06b3..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/.input.spin.trail +++ /dev/null @@ -1,1699 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3997 -2:2:2536 -3:2:2541 -4:2:2545 -5:2:2553 -6:2:2557 -7:2:2561 -8:0:3997 -9:1:0 -10:1:5 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== POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/Makefile b/formal-model/urcu-controldataflow-intel-ipi-compress/Makefile deleted file mode 100644 index f8bfd31..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/Makefile +++ /dev/null @@ -1,171 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 -DCOLLAPSE -#CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - #make urcu_free | tee urcu_free.log - #make urcu_free_no_mb | tee urcu_free_no_mb.log - #make urcu_free_no_rmb | tee urcu_free_no_rmb.log - #make urcu_free_no_wmb | tee urcu_free_no_wmb.log - #make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - #make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/references.txt b/formal-model/urcu-controldataflow-intel-ipi-compress/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu.sh b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu.spin b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu.spin deleted file mode 100644 index 8075506..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu.spin +++ /dev/null @@ -1,1321 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free.log b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free.log deleted file mode 100644 index 43e9bba..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free.log +++ /dev/null @@ -1,55 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1294) -Depth= 9223 States= 1e+06 Transitions= 6.87e+06 Memory= 516.350 t= 19.4 R= 5e+04 -Depth= 9223 States= 2e+06 Transitions= 1.47e+07 Memory= 563.713 t= 43.1 R= 5e+04 -Depth= 9223 States= 3e+06 Transitions= 2.46e+07 Memory= 613.127 t= 73.9 R= 4e+04 -pan: resizing hashtable to -w22.. done -Depth= 9223 States= 4e+06 Transitions= 3.19e+07 Memory= 690.440 t= 95.5 R= 4e+04 -Depth= 9223 States= 5e+06 Transitions= 3.95e+07 Memory= 736.533 t= 118 R= 4e+04 -Depth= 9223 States= 6e+06 Transitions= 5.71e+07 Memory= 785.068 t= 174 R= 3e+04 -Depth= 9223 States= 7e+06 Transitions= 6.81e+07 Memory= 834.580 t= 209 R= 3e+04 -Depth= 9223 States= 8e+06 Transitions= 8.22e+07 Memory= 883.311 t= 254 R= 3e+04 -Depth= 9223 States= 9e+06 Transitions= 9.54e+07 Memory= 932.139 t= 296 R= 3e+04 -pan: resizing hashtable to -w24.. done -Depth= 9223 States= 1e+07 Transitions= 1.08e+08 Memory= 1104.670 t= 338 R= 3e+04 -Depth= 9223 States= 1.1e+07 Transitions= 1.21e+08 Memory= 1155.451 t= 375 R= 3e+04 -Depth= 9223 States= 1.2e+07 Transitions= 1.3e+08 Memory= 1205.744 t= 403 R= 3e+04 -Depth= 9223 States= 1.3e+07 Transitions= 1.42e+08 Memory= 1254.572 t= 442 R= 3e+04 -Depth= 9223 States= 1.4e+07 Transitions= 1.72e+08 Memory= 1302.717 t= 539 R= 3e+04 -Depth= 9223 States= 1.5e+07 Transitions= 1.91e+08 Memory= 1354.768 t= 600 R= 3e+04 -Depth= 9223 States= 1.6e+07 Transitions= 2.08e+08 Memory= 1405.842 t= 653 R= 2e+04 -Depth= 9223 States= 1.7e+07 Transitions= 2.2e+08 Memory= 1456.818 t= 691 R= 2e+04 -Depth= 9223 States= 1.8e+07 Transitions= 2.39e+08 Memory= 1506.135 t= 751 R= 2e+04 -Depth= 9223 States= 1.9e+07 Transitions= 2.55e+08 Memory= 1556.330 t= 801 R= 2e+04 -Depth= 9223 States= 2e+07 Transitions= 2.72e+08 Memory= 1604.084 t= 856 R= 2e+04 -Depth= 9285 States= 2.1e+07 Transitions= 2.85e+08 Memory= 1650.080 t= 898 R= 2e+04 -Depth= 9324 States= 2.2e+07 Transitions= 2.99e+08 Memory= 1696.760 t= 941 R= 2e+04 -Depth= 9324 States= 2.3e+07 Transitions= 3.1e+08 Memory= 1746.369 t= 976 R= 2e+04 -Depth= 9324 States= 2.4e+07 Transitions= 3.21e+08 Memory= 1792.561 t= 1.01e+03 R= 2e+04 -Depth= 9324 States= 2.5e+07 Transitions= 3.34e+08 Memory= 1841.096 t= 1.05e+03 R= 2e+04 -Depth= 9324 States= 2.6e+07 Transitions= 3.45e+08 Memory= 1890.998 t= 1.09e+03 R= 2e+04 -Depth= 9324 States= 2.7e+07 Transitions= 3.59e+08 Memory= 1940.412 t= 1.13e+03 R= 2e+04 -Depth= 9324 States= 2.8e+07 Transitions= 3.71e+08 Memory= 1987.776 t= 1.17e+03 R= 2e+04 -Depth= 9324 States= 2.9e+07 Transitions= 3.84e+08 Memory= 2034.846 t= 1.21e+03 R= 2e+04 -Depth= 9324 States= 3e+07 Transitions= 3.96e+08 Memory= 2081.233 t= 1.25e+03 R= 2e+04 -Depth= 9324 States= 3.1e+07 Transitions= 4.09e+08 Memory= 2129.865 t= 1.29e+03 R= 2e+04 -Depth= 9324 States= 3.2e+07 Transitions= 4.19e+08 Memory= 2179.670 t= 1.32e+03 R= 2e+04 -Depth= 9324 States= 3.3e+07 Transitions= 4.3e+08 Memory= 2227.717 t= 1.36e+03 R= 2e+04 -Depth= 9324 States= 3.4e+07 Transitions= 4.44e+08 Memory= 2277.033 t= 1.4e+03 R= 2e+04 -pan: resizing hashtable to -w26.. done -Depth= 9324 States= 3.5e+07 Transitions= 4.6e+08 Memory= 2824.190 t= 1.46e+03 R= 2e+04 diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free.ltl b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_nested.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_mb.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_rmb.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_single_flip.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress.ltl b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.log b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.log deleted file mode 100644 index d087e70..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.log +++ /dev/null @@ -1,703 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -depth 7: Claim reached state 9 (line 1367) -depth 131: Claim reached state 9 (line 1366) -Depth= 108226 States= 1e+06 Transitions= 1.1e+07 Memory= 495.354 t= 32.5 R= 3e+04 -Depth= 108226 States= 2e+06 Transitions= 2.2e+07 Memory= 526.018 t= 65.8 R= 3e+04 -Depth= 108226 States= 3e+06 Transitions= 3.31e+07 Memory= 555.510 t= 99.5 R= 3e+04 -pan: resizing hashtable to -w22.. done -Depth= 108226 States= 4e+06 Transitions= 4.38e+07 Memory= 615.733 t= 132 R= 3e+04 -Depth= 108226 States= 5e+06 Transitions= 5.47e+07 Memory= 644.346 t= 164 R= 3e+04 -Depth= 108226 States= 6e+06 Transitions= 6.54e+07 Memory= 671.983 t= 197 R= 3e+04 -Depth= 108226 States= 7e+06 Transitions= 7.64e+07 Memory= 700.108 t= 230 R= 3e+04 -Depth= 110273 States= 8e+06 Transitions= 8.89e+07 Memory= 728.428 t= 268 R= 3e+04 -Depth= 110273 States= 9e+06 Transitions= 1.02e+08 Memory= 757.920 t= 310 R= 3e+04 -pan: resizing hashtable to -w24.. done -Depth= 110273 States= 1e+07 Transitions= 1.14e+08 Memory= 911.408 t= 347 R= 3e+04 -Depth= 110273 States= 1.1e+07 Transitions= 1.26e+08 Memory= 939.924 t= 380 R= 3e+04 -Depth= 110273 States= 1.2e+07 Transitions= 1.37e+08 Memory= 968.440 t= 414 R= 3e+04 -Depth= 110273 States= 1.3e+07 Transitions= 1.58e+08 Memory= 996.272 t= 479 R= 3e+04 -Depth= 110273 States= 1.4e+07 Transitions= 1.69e+08 Memory= 1026.545 t= 513 R= 3e+04 -Depth= 110273 States= 1.5e+07 Transitions= 1.81e+08 Memory= 1055.451 t= 550 R= 3e+04 -Depth= 110273 States= 1.6e+07 Transitions= 1.92e+08 Memory= 1084.943 t= 583 R= 3e+04 -Depth= 110273 States= 1.7e+07 Transitions= 2.03e+08 Memory= 1114.045 t= 615 R= 3e+04 -Depth= 110273 States= 1.8e+07 Transitions= 2.14e+08 Memory= 1144.318 t= 647 R= 3e+04 -Depth= 110273 States= 1.9e+07 Transitions= 2.25e+08 Memory= 1173.420 t= 680 R= 3e+04 -Depth= 110273 States= 2e+07 Transitions= 2.36e+08 Memory= 1202.717 t= 713 R= 3e+04 -Depth= 110273 States= 2.1e+07 Transitions= 2.47e+08 Memory= 1232.404 t= 746 R= 3e+04 -Depth= 110273 States= 2.2e+07 Transitions= 2.58e+08 Memory= 1262.092 t= 778 R= 3e+04 -Depth= 110273 States= 2.3e+07 Transitions= 2.69e+08 Memory= 1290.119 t= 811 R= 3e+04 -Depth= 110273 States= 2.4e+07 Transitions= 2.82e+08 Memory= 1317.268 t= 851 R= 3e+04 -Depth= 110273 States= 2.5e+07 Transitions= 2.96e+08 Memory= 1345.783 t= 893 R= 3e+04 -Depth= 110273 States= 2.6e+07 Transitions= 3.13e+08 Memory= 1373.615 t= 948 R= 3e+04 -Depth= 110273 States= 2.7e+07 Transitions= 3.48e+08 Memory= 1403.889 t= 1.06e+03 R= 3e+04 -Depth= 110273 States= 2.8e+07 Transitions= 3.7e+08 Memory= 1434.651 t= 1.13e+03 R= 2e+04 -Depth= 110273 States= 2.9e+07 Transitions= 3.84e+08 Memory= 1464.338 t= 1.17e+03 R= 2e+04 -Depth= 110273 States= 3e+07 Transitions= 4.04e+08 Memory= 1492.365 t= 1.24e+03 R= 2e+04 -Depth= 110273 States= 3.1e+07 Transitions= 4.26e+08 Memory= 1520.490 t= 1.31e+03 R= 2e+04 -Depth= 110273 States= 3.2e+07 Transitions= 4.42e+08 Memory= 1550.080 t= 1.36e+03 R= 2e+04 -Depth= 110273 States= 3.3e+07 Transitions= 4.63e+08 Memory= 1578.791 t= 1.42e+03 R= 2e+04 -Depth= 110273 States= 3.4e+07 Transitions= 4.87e+08 Memory= 1605.842 t= 1.5e+03 R= 2e+04 -pan: resizing hashtable to -w26.. done -Depth= 110273 States= 3.5e+07 Transitions= 5.01e+08 Memory= 2130.147 t= 1.55e+03 R= 2e+04 -Depth= 110273 States= 3.6e+07 Transitions= 5.22e+08 Memory= 2158.467 t= 1.61e+03 R= 2e+04 -Depth= 110273 States= 3.7e+07 Transitions= 5.4e+08 Memory= 2186.006 t= 1.67e+03 R= 2e+04 -Depth= 110273 States= 3.8e+07 Transitions= 5.61e+08 Memory= 2213.545 t= 1.74e+03 R= 2e+04 -Depth= 110273 States= 3.9e+07 Transitions= 5.82e+08 Memory= 2242.061 t= 1.82e+03 R= 2e+04 -Depth= 110273 States= 4e+07 Transitions= 6e+08 Memory= 2270.088 t= 1.87e+03 R= 2e+04 -Depth= 110273 States= 4.1e+07 Transitions= 6.18e+08 Memory= 2298.408 t= 1.93e+03 R= 2e+04 -Depth= 110273 States= 4.2e+07 Transitions= 6.37e+08 Memory= 2325.850 t= 1.99e+03 R= 2e+04 -Depth= 110273 States= 4.3e+07 Transitions= 6.65e+08 Memory= 2352.803 t= 2.08e+03 R= 2e+04 -Depth= 110273 States= 4.4e+07 Transitions= 6.82e+08 Memory= 2380.733 t= 2.13e+03 R= 2e+04 -Depth= 110273 States= 4.5e+07 Transitions= 6.99e+08 Memory= 2408.076 t= 2.18e+03 R= 2e+04 -Depth= 110273 States= 4.6e+07 Transitions= 7.12e+08 Memory= 2434.346 t= 2.23e+03 R= 2e+04 -Depth= 110273 States= 4.7e+07 Transitions= 7.26e+08 Memory= 2462.959 t= 2.27e+03 R= 2e+04 -Depth= 110273 States= 4.8e+07 Transitions= 7.4e+08 Memory= 2493.721 t= 2.31e+03 R= 2e+04 -Depth= 110273 States= 4.9e+07 Transitions= 7.53e+08 Memory= 2522.627 t= 2.35e+03 R= 2e+04 -Depth= 110273 States= 5e+07 Transitions= 7.66e+08 Memory= 2552.803 t= 2.39e+03 R= 2e+04 -Depth= 110273 States= 5.1e+07 Transitions= 7.77e+08 Memory= 2583.565 t= 2.42e+03 R= 2e+04 -Depth= 110273 States= 5.2e+07 Transitions= 7.9e+08 Memory= 2611.006 t= 2.46e+03 R= 2e+04 -Depth= 110273 States= 5.3e+07 Transitions= 8.16e+08 Memory= 2641.182 t= 2.54e+03 R= 2e+04 -Depth= 110273 States= 5.4e+07 Transitions= 8.52e+08 Memory= 2673.213 t= 2.66e+03 R= 2e+04 -Depth= 110273 States= 5.5e+07 Transitions= 8.93e+08 Memory= 2707.197 t= 2.79e+03 R= 2e+04 -Depth= 110273 States= 5.6e+07 Transitions= 9.4e+08 Memory= 2738.447 t= 2.94e+03 R= 2e+04 -Depth= 110273 States= 5.7e+07 Transitions= 9.81e+08 Memory= 2767.354 t= 3.08e+03 R= 2e+04 -Depth= 110273 States= 5.8e+07 Transitions= 1.01e+09 Memory= 2794.111 t= 3.16e+03 R= 2e+04 -Depth= 110273 States= 5.9e+07 Transitions= 1.02e+09 Memory= 2822.529 t= 3.21e+03 R= 2e+04 -Depth= 110273 States= 6e+07 Transitions= 1.05e+09 Memory= 2850.654 t= 3.28e+03 R= 2e+04 -Depth= 110273 States= 6.1e+07 Transitions= 1.08e+09 Memory= 2879.170 t= 3.39e+03 R= 2e+04 -Depth= 110273 States= 6.2e+07 Transitions= 1.1e+09 Memory= 2908.858 t= 3.44e+03 R= 2e+04 -Depth= 110273 States= 6.3e+07 Transitions= 1.11e+09 Memory= 2935.908 t= 3.49e+03 R= 2e+04 -Depth= 110273 States= 6.4e+07 Transitions= 1.13e+09 Memory= 2960.518 t= 3.54e+03 R= 2e+04 -Depth= 110273 States= 6.5e+07 Transitions= 1.14e+09 Memory= 2990.205 t= 3.58e+03 R= 2e+04 -Depth= 110273 States= 6.6e+07 Transitions= 1.17e+09 Memory= 3018.721 t= 3.67e+03 R= 2e+04 -Depth= 110273 States= 6.7e+07 Transitions= 1.18e+09 Memory= 3047.041 t= 3.71e+03 R= 2e+04 -Depth= 110273 States= 6.8e+07 Transitions= 1.21e+09 Memory= 3074.580 t= 3.79e+03 R= 2e+04 -Depth= 110273 States= 6.9e+07 Transitions= 1.23e+09 Memory= 3101.826 t= 3.87e+03 R= 2e+04 -Depth= 110273 States= 7e+07 Transitions= 1.27e+09 Memory= 3130.635 t= 3.98e+03 R= 2e+04 -Depth= 110273 States= 7.1e+07 Transitions= 1.29e+09 Memory= 3157.197 t= 4.06e+03 R= 2e+04 -Depth= 110273 States= 7.2e+07 Transitions= 1.32e+09 Memory= 3184.443 t= 4.16e+03 R= 2e+04 -Depth= 110273 States= 7.3e+07 Transitions= 1.34e+09 Memory= 3211.690 t= 4.24e+03 R= 2e+04 -Depth= 110273 States= 7.4e+07 Transitions= 1.37e+09 Memory= 3239.229 t= 4.32e+03 R= 2e+04 -Depth= 110273 States= 7.5e+07 Transitions= 1.38e+09 Memory= 3266.670 t= 4.38e+03 R= 2e+04 -Depth= 110273 States= 7.6e+07 Transitions= 1.41e+09 Memory= 3294.307 t= 4.46e+03 R= 2e+04 -Depth= 110273 States= 7.7e+07 Transitions= 1.44e+09 Memory= 3322.432 t= 4.55e+03 R= 2e+04 -Depth= 110273 States= 7.8e+07 Transitions= 1.46e+09 Memory= 3352.608 t= 4.62e+03 R= 2e+04 -Depth= 110273 States= 7.9e+07 Transitions= 1.47e+09 Memory= 3378.193 t= 4.66e+03 R= 2e+04 -Depth= 110273 States= 8e+07 Transitions= 1.49e+09 Memory= 3407.490 t= 4.71e+03 R= 2e+04 -Depth= 110273 States= 8.1e+07 Transitions= 1.52e+09 Memory= 3436.397 t= 4.8e+03 R= 2e+04 -Depth= 110273 States= 8.2e+07 Transitions= 1.53e+09 Memory= 3461.690 t= 4.84e+03 R= 2e+04 -Depth= 110273 States= 8.3e+07 Transitions= 1.56e+09 Memory= 3491.182 t= 4.92e+03 R= 2e+04 -Depth= 110273 States= 8.4e+07 Transitions= 1.57e+09 Memory= 3519.990 t= 4.98e+03 R= 2e+04 -Depth= 110273 States= 8.5e+07 Transitions= 1.59e+09 Memory= 3546.065 t= 5.02e+03 R= 2e+04 -Depth= 110273 States= 8.6e+07 Transitions= 1.6e+09 Memory= 3575.459 t= 5.07e+03 R= 2e+04 -Depth= 110273 States= 8.7e+07 Transitions= 1.63e+09 Memory= 3605.049 t= 5.14e+03 R= 2e+04 -Depth= 110273 States= 8.8e+07 Transitions= 1.64e+09 Memory= 3632.588 t= 5.2e+03 R= 2e+04 -Depth= 110273 States= 8.9e+07 Transitions= 1.66e+09 Memory= 3661.787 t= 5.26e+03 R= 2e+04 -Depth= 110273 States= 9e+07 Transitions= 1.68e+09 Memory= 3688.154 t= 5.3e+03 R= 2e+04 -Depth= 110273 States= 9.1e+07 Transitions= 1.7e+09 Memory= 3715.986 t= 5.36e+03 R= 2e+04 -Depth= 110273 States= 9.2e+07 Transitions= 1.71e+09 Memory= 3743.623 t= 5.41e+03 R= 2e+04 -Depth= 110273 States= 9.3e+07 Transitions= 1.73e+09 Memory= 3771.358 t= 5.46e+03 R= 2e+04 -Depth= 110273 States= 9.4e+07 Transitions= 1.75e+09 Memory= 3797.920 t= 5.53e+03 R= 2e+04 -Depth= 110273 States= 9.5e+07 Transitions= 1.77e+09 Memory= 3827.119 t= 5.6e+03 R= 2e+04 -Depth= 110273 States= 9.6e+07 Transitions= 1.79e+09 Memory= 3858.858 t= 5.64e+03 R= 2e+04 -Depth= 110273 States= 9.7e+07 Transitions= 1.8e+09 Memory= 3885.713 t= 5.7e+03 R= 2e+04 -Depth= 110273 States= 9.8e+07 Transitions= 1.82e+09 Memory= 3914.717 t= 5.75e+03 R= 2e+04 -Depth= 110273 States= 9.9e+07 Transitions= 1.84e+09 Memory= 3941.670 t= 5.81e+03 R= 2e+04 -Depth= 110273 States= 1e+08 Transitions= 1.86e+09 Memory= 3968.818 t= 5.87e+03 R= 2e+04 -Depth= 110273 States= 1.01e+08 Transitions= 1.88e+09 Memory= 3994.990 t= 5.94e+03 R= 2e+04 -Depth= 110273 States= 1.02e+08 Transitions= 1.9e+09 Memory= 4023.311 t= 6.01e+03 R= 2e+04 -Depth= 110273 States= 1.03e+08 Transitions= 1.92e+09 Memory= 4053.193 t= 6.08e+03 R= 2e+04 -Depth= 110273 States= 1.04e+08 Transitions= 1.94e+09 Memory= 4078.389 t= 6.12e+03 R= 2e+04 -Depth= 110273 States= 1.05e+08 Transitions= 1.96e+09 Memory= 4108.467 t= 6.2e+03 R= 2e+04 -Depth= 110273 States= 1.06e+08 Transitions= 1.98e+09 Memory= 4137.080 t= 6.25e+03 R= 2e+04 -Depth= 110273 States= 1.07e+08 Transitions= 1.99e+09 Memory= 4163.740 t= 6.29e+03 R= 2e+04 -Depth= 110273 States= 1.08e+08 Transitions= 2.01e+09 Memory= 4191.768 t= 6.35e+03 R= 2e+04 -Depth= 110273 States= 1.09e+08 Transitions= 2.03e+09 Memory= 4221.651 t= 6.4e+03 R= 2e+04 -Depth= 110273 States= 1.1e+08 Transitions= 2.04e+09 Memory= 4249.971 t= 6.45e+03 R= 2e+04 -Depth= 110273 States= 1.11e+08 Transitions= 2.07e+09 Memory= 4278.877 t= 6.52e+03 R= 2e+04 -Depth= 110273 States= 1.12e+08 Transitions= 2.09e+09 Memory= 4308.174 t= 6.59e+03 R= 2e+04 -Depth= 110273 States= 1.13e+08 Transitions= 2.1e+09 Memory= 4333.760 t= 6.64e+03 R= 2e+04 -Depth= 110273 States= 1.14e+08 Transitions= 2.13e+09 Memory= 4363.740 t= 6.71e+03 R= 2e+04 -Depth= 110273 States= 1.15e+08 Transitions= 2.14e+09 Memory= 4392.158 t= 6.76e+03 R= 2e+04 -Depth= 110273 States= 1.16e+08 Transitions= 2.16e+09 Memory= 4419.014 t= 6.81e+03 R= 2e+04 -Depth= 110273 States= 1.17e+08 Transitions= 2.17e+09 Memory= 4446.846 t= 6.86e+03 R= 2e+04 -Depth= 110273 States= 1.18e+08 Transitions= 2.19e+09 Memory= 4476.338 t= 6.91e+03 R= 2e+04 -Depth= 110273 States= 1.19e+08 Transitions= 2.21e+09 Memory= 4505.440 t= 6.96e+03 R= 2e+04 -Depth= 110273 States= 1.2e+08 Transitions= 2.22e+09 Memory= 4529.561 t= 7.01e+03 R= 2e+04 -Depth= 110273 States= 1.21e+08 Transitions= 2.24e+09 Memory= 4557.588 t= 7.07e+03 R= 2e+04 -Depth= 110273 States= 1.22e+08 Transitions= 2.26e+09 Memory= 4584.736 t= 7.12e+03 R= 2e+04 -Depth= 110273 States= 1.23e+08 Transitions= 2.27e+09 Memory= 4612.764 t= 7.18e+03 R= 2e+04 -Depth= 110273 States= 1.24e+08 Transitions= 2.29e+09 Memory= 4640.303 t= 7.22e+03 R= 2e+04 -Depth= 110273 States= 1.25e+08 Transitions= 2.32e+09 Memory= 4669.404 t= 7.32e+03 R= 2e+04 -Depth= 110273 States= 1.26e+08 Transitions= 2.35e+09 Memory= 4698.018 t= 7.44e+03 R= 2e+04 -Depth= 110273 States= 1.27e+08 Transitions= 2.37e+09 Memory= 4728.877 t= 7.49e+03 R= 2e+04 -Depth= 110273 States= 1.28e+08 Transitions= 2.38e+09 Memory= 4757.393 t= 7.54e+03 R= 2e+04 -Depth= 110273 States= 1.29e+08 Transitions= 2.4e+09 Memory= 4785.811 t= 7.6e+03 R= 2e+04 -Depth= 110273 States= 1.3e+08 Transitions= 2.42e+09 Memory= 4814.033 t= 7.66e+03 R= 2e+04 -Depth= 110273 States= 1.31e+08 Transitions= 2.44e+09 Memory= 4843.428 t= 7.72e+03 R= 2e+04 -Depth= 110273 States= 1.32e+08 Transitions= 2.46e+09 Memory= 4871.943 t= 7.78e+03 R= 2e+04 -Depth= 110273 States= 1.33e+08 Transitions= 2.49e+09 Memory= 4898.311 t= 7.88e+03 R= 2e+04 -Depth= 110273 States= 1.34e+08 Transitions= 2.51e+09 Memory= 4926.143 t= 7.95e+03 R= 2e+04 -Depth= 110273 States= 1.35e+08 Transitions= 2.54e+09 Memory= 4953.389 t= 8.02e+03 R= 2e+04 -pan: resizing hashtable to -w28.. done -Depth= 110273 States= 1.36e+08 Transitions= 2.56e+09 Memory= 7001.389 t= 8.13e+03 R= 2e+04 -Depth= 110273 States= 1.37e+08 Transitions= 2.58e+09 Memory= 7001.389 t= 8.19e+03 R= 2e+04 -Depth= 110273 States= 1.38e+08 Transitions= 2.61e+09 Memory= 7018.381 t= 8.26e+03 R= 2e+04 -Depth= 110273 States= 1.39e+08 Transitions= 2.63e+09 Memory= 7045.236 t= 8.33e+03 R= 2e+04 -Depth= 110273 States= 1.4e+08 Transitions= 2.65e+09 Memory= 7073.068 t= 8.39e+03 R= 2e+04 -Depth= 110273 States= 1.41e+08 Transitions= 2.68e+09 Memory= 7100.022 t= 8.48e+03 R= 2e+04 -Depth= 110273 States= 1.42e+08 Transitions= 2.7e+09 Memory= 7128.733 t= 8.54e+03 R= 2e+04 -Depth= 110273 States= 1.43e+08 Transitions= 2.72e+09 Memory= 7155.686 t= 8.6e+03 R= 2e+04 -Depth= 110273 States= 1.44e+08 Transitions= 2.73e+09 Memory= 7181.662 t= 8.65e+03 R= 2e+04 -Depth= 110273 States= 1.45e+08 Transitions= 2.74e+09 Memory= 7209.885 t= 8.69e+03 R= 2e+04 -Depth= 110273 States= 1.46e+08 Transitions= 2.76e+09 Memory= 7239.963 t= 8.73e+03 R= 2e+04 -Depth= 110273 States= 1.47e+08 Transitions= 2.77e+09 Memory= 7269.846 t= 8.77e+03 R= 2e+04 -Depth= 110273 States= 1.48e+08 Transitions= 2.79e+09 Memory= 7299.533 t= 8.82e+03 R= 2e+04 -Depth= 110273 States= 1.49e+08 Transitions= 2.8e+09 Memory= 7327.365 t= 8.87e+03 R= 2e+04 -Depth= 110273 States= 1.5e+08 Transitions= 2.82e+09 Memory= 7356.760 t= 8.92e+03 R= 2e+04 -Depth= 110273 States= 1.51e+08 Transitions= 2.84e+09 Memory= 7384.983 t= 8.97e+03 R= 2e+04 -Depth= 110273 States= 1.52e+08 Transitions= 2.85e+09 Memory= 7412.522 t= 9.02e+03 R= 2e+04 -Depth= 110273 States= 1.53e+08 Transitions= 2.87e+09 Memory= 7440.256 t= 9.09e+03 R= 2e+04 -Depth= 110273 States= 1.54e+08 Transitions= 2.91e+09 Memory= 7471.604 t= 9.2e+03 R= 2e+04 -Depth= 110273 States= 1.55e+08 Transitions= 2.95e+09 Memory= 7506.662 t= 9.32e+03 R= 2e+04 -Depth= 110273 States= 1.56e+08 Transitions= 3e+09 Memory= 7540.744 t= 9.48e+03 R= 2e+04 -Depth= 110273 States= 1.57e+08 Transitions= 3.04e+09 Memory= 7570.041 t= 9.62e+03 R= 2e+04 -Depth= 110273 States= 1.58e+08 Transitions= 3.07e+09 Memory= 7593.772 t= 9.72e+03 R= 2e+04 -Depth= 110273 States= 1.59e+08 Transitions= 3.09e+09 Memory= 7622.580 t= 9.77e+03 R= 2e+04 -Depth= 110273 States= 1.6e+08 Transitions= 3.11e+09 Memory= 7650.315 t= 9.83e+03 R= 2e+04 -Depth= 110273 States= 1.61e+08 Transitions= 3.14e+09 Memory= 7678.733 t= 9.93e+03 R= 2e+04 -Depth= 110273 States= 1.62e+08 Transitions= 3.16e+09 Memory= 7707.639 t= 1e+04 R= 2e+04 -Depth= 110273 States= 1.63e+08 Transitions= 3.18e+09 Memory= 7735.276 t= 1.01e+04 R= 2e+04 -Depth= 110273 States= 1.64e+08 Transitions= 3.2e+09 Memory= 7761.350 t= 1.01e+04 R= 2e+04 -Depth= 110273 States= 1.65e+08 Transitions= 3.21e+09 Memory= 7787.326 t= 1.02e+04 R= 2e+04 -Depth= 110273 States= 1.66e+08 Transitions= 3.23e+09 Memory= 7817.111 t= 1.02e+04 R= 2e+04 -Depth= 110273 States= 1.67e+08 Transitions= 3.25e+09 Memory= 7844.065 t= 1.03e+04 R= 2e+04 -Depth= 110273 States= 1.68e+08 Transitions= 3.28e+09 Memory= 7871.213 t= 1.04e+04 R= 2e+04 -Depth= 110273 States= 1.69e+08 Transitions= 3.3e+09 Memory= 7898.264 t= 1.04e+04 R= 2e+04 -Depth= 110273 States= 1.7e+08 Transitions= 3.32e+09 Memory= 7925.608 t= 1.05e+04 R= 2e+04 -Depth= 110273 States= 1.71e+08 Transitions= 3.35e+09 Memory= 7952.658 t= 1.06e+04 R= 2e+04 -Depth= 110273 States= 1.72e+08 Transitions= 3.38e+09 Memory= 7981.467 t= 1.07e+04 R= 2e+04 -Depth= 110273 States= 1.73e+08 Transitions= 3.4e+09 Memory= 8009.592 t= 1.08e+04 R= 2e+04 -Depth= 110273 States= 1.74e+08 Transitions= 3.43e+09 Memory= 8036.154 t= 1.08e+04 R= 2e+04 -Depth= 110273 States= 1.75e+08 Transitions= 3.45e+09 Memory= 8063.108 t= 1.09e+04 R= 2e+04 -Depth= 110273 States= 1.76e+08 Transitions= 3.48e+09 Memory= 8091.428 t= 1.1e+04 R= 2e+04 -Depth= 110273 States= 1.77e+08 Transitions= 3.5e+09 Memory= 8119.943 t= 1.11e+04 R= 2e+04 -Depth= 110273 States= 1.78e+08 Transitions= 3.53e+09 Memory= 8148.459 t= 1.12e+04 R= 2e+04 -Depth= 110273 States= 1.79e+08 Transitions= 3.54e+09 Memory= 8176.779 t= 1.12e+04 R= 2e+04 -Depth= 110273 States= 1.8e+08 Transitions= 3.56e+09 Memory= 8202.463 t= 1.12e+04 R= 2e+04 -Depth= 110273 States= 1.81e+08 Transitions= 3.58e+09 Memory= 8232.053 t= 1.13e+04 R= 2e+04 -Depth= 110273 States= 1.82e+08 Transitions= 3.6e+09 Memory= 8260.178 t= 1.14e+04 R= 2e+04 -Depth= 110273 States= 1.83e+08 Transitions= 3.62e+09 Memory= 8288.596 t= 1.14e+04 R= 2e+04 -Depth= 110273 States= 1.84e+08 Transitions= 3.64e+09 Memory= 8317.502 t= 1.15e+04 R= 2e+04 -Depth= 110273 States= 1.85e+08 Transitions= 3.66e+09 Memory= 8342.697 t= 1.16e+04 R= 2e+04 -Depth= 110273 States= 1.86e+08 Transitions= 3.67e+09 Memory= 8371.506 t= 1.16e+04 R= 2e+04 -Depth= 110273 States= 1.87e+08 Transitions= 3.69e+09 Memory= 8400.803 t= 1.17e+04 R= 2e+04 -Depth= 110273 States= 1.88e+08 Transitions= 3.71e+09 Memory= 8428.440 t= 1.17e+04 R= 2e+04 -Depth= 110273 States= 1.89e+08 Transitions= 3.73e+09 Memory= 8458.029 t= 1.18e+04 R= 2e+04 -Depth= 110273 States= 1.9e+08 Transitions= 3.75e+09 Memory= 8484.885 t= 1.18e+04 R= 2e+04 -Depth= 110273 States= 1.91e+08 Transitions= 3.76e+09 Memory= 8512.522 t= 1.19e+04 R= 2e+04 -Depth= 110273 States= 1.92e+08 Transitions= 3.78e+09 Memory= 8540.549 t= 1.19e+04 R= 2e+04 -Depth= 110273 States= 1.93e+08 Transitions= 3.79e+09 Memory= 8567.893 t= 1.2e+04 R= 2e+04 -Depth= 110273 States= 1.94e+08 Transitions= 3.82e+09 Memory= 8595.041 t= 1.21e+04 R= 2e+04 -Depth= 110273 States= 1.95e+08 Transitions= 3.84e+09 Memory= 8626.584 t= 1.21e+04 R= 2e+04 -Depth= 110273 States= 1.96e+08 Transitions= 3.85e+09 Memory= 8655.295 t= 1.22e+04 R= 2e+04 -Depth= 110273 States= 1.97e+08 Transitions= 3.87e+09 Memory= 8683.908 t= 1.22e+04 R= 2e+04 -Depth= 110273 States= 1.98e+08 Transitions= 3.89e+09 Memory= 8711.447 t= 1.23e+04 R= 2e+04 -Depth= 110273 States= 1.99e+08 Transitions= 3.91e+09 Memory= 8738.108 t= 1.23e+04 R= 2e+04 -Depth= 110273 States= 2e+08 Transitions= 3.93e+09 Memory= 8766.818 t= 1.24e+04 R= 2e+04 -Depth= 110273 States= 2.01e+08 Transitions= 3.95e+09 Memory= 8796.701 t= 1.25e+04 R= 2e+04 -Depth= 110273 States= 2.02e+08 Transitions= 3.96e+09 Memory= 8821.897 t= 1.25e+04 R= 2e+04 -Depth= 110273 States= 2.03e+08 Transitions= 3.99e+09 Memory= 8852.072 t= 1.26e+04 R= 2e+04 -Depth= 110273 States= 2.04e+08 Transitions= 4e+09 Memory= 8880.490 t= 1.26e+04 R= 2e+04 -Depth= 110273 States= 2.05e+08 Transitions= 4.02e+09 Memory= 8907.541 t= 1.27e+04 R= 2e+04 -Depth= 110273 States= 2.06e+08 Transitions= 4.03e+09 Memory= 8935.373 t= 1.27e+04 R= 2e+04 -Depth= 110273 States= 2.07e+08 Transitions= 4.05e+09 Memory= 8965.354 t= 1.28e+04 R= 2e+04 -Depth= 110273 States= 2.08e+08 Transitions= 4.07e+09 Memory= 8993.674 t= 1.28e+04 R= 2e+04 -Depth= 110273 States= 2.09e+08 Transitions= 4.09e+09 Memory= 9022.190 t= 1.29e+04 R= 2e+04 -Depth= 110273 States= 2.1e+08 Transitions= 4.11e+09 Memory= 9052.072 t= 1.3e+04 R= 2e+04 -Depth= 110273 States= 2.11e+08 Transitions= 4.13e+09 Memory= 9077.268 t= 1.3e+04 R= 2e+04 -Depth= 110273 States= 2.12e+08 Transitions= 4.15e+09 Memory= 9107.248 t= 1.31e+04 R= 2e+04 -Depth= 110273 States= 2.13e+08 Transitions= 4.16e+09 Memory= 9135.861 t= 1.31e+04 R= 2e+04 -Depth= 110273 States= 2.14e+08 Transitions= 4.18e+09 Memory= 9162.619 t= 1.32e+04 R= 2e+04 -Depth= 110273 States= 2.15e+08 Transitions= 4.2e+09 Memory= 9190.549 t= 1.32e+04 R= 2e+04 -Depth= 110273 States= 2.16e+08 Transitions= 4.21e+09 Memory= 9220.139 t= 1.33e+04 R= 2e+04 -Depth= 110273 States= 2.17e+08 Transitions= 4.23e+09 Memory= 9248.947 t= 1.33e+04 R= 2e+04 -Depth= 110273 States= 2.18e+08 Transitions= 4.25e+09 Memory= 9273.166 t= 1.34e+04 R= 2e+04 -Depth= 110273 States= 2.19e+08 Transitions= 4.26e+09 Memory= 9301.096 t= 1.34e+04 R= 2e+04 -Depth= 110273 States= 2.2e+08 Transitions= 4.28e+09 Memory= 9329.221 t= 1.35e+04 R= 2e+04 -Depth= 110273 States= 2.21e+08 Transitions= 4.29e+09 Memory= 9356.858 t= 1.35e+04 R= 2e+04 -Depth= 110273 States= 2.22e+08 Transitions= 4.32e+09 Memory= 9384.494 t= 1.36e+04 R= 2e+04 -Depth= 110273 States= 2.23e+08 Transitions= 4.35e+09 Memory= 9414.279 t= 1.37e+04 R= 2e+04 -Depth= 110273 States= 2.24e+08 Transitions= 4.37e+09 Memory= 9445.139 t= 1.38e+04 R= 2e+04 -Depth= 110273 States= 2.25e+08 Transitions= 4.39e+09 Memory= 9473.361 t= 1.38e+04 R= 2e+04 -Depth= 110273 States= 2.26e+08 Transitions= 4.4e+09 Memory= 9502.365 t= 1.39e+04 R= 2e+04 -Depth= 110273 States= 2.27e+08 Transitions= 4.42e+09 Memory= 9530.783 t= 1.39e+04 R= 2e+04 -Depth= 110273 States= 2.28e+08 Transitions= 4.44e+09 Memory= 9559.592 t= 1.4e+04 R= 2e+04 -Depth= 110273 States= 2.29e+08 Transitions= 4.47e+09 Memory= 9586.838 t= 1.41e+04 R= 2e+04 -Depth= 110273 States= 2.3e+08 Transitions= 4.49e+09 Memory= 9612.815 t= 1.42e+04 R= 2e+04 -Depth= 110273 States= 2.31e+08 Transitions= 4.52e+09 Memory= 9639.572 t= 1.42e+04 R= 2e+04 -Depth= 110273 States= 2.32e+08 Transitions= 4.54e+09 Memory= 9666.233 t= 1.43e+04 R= 2e+04 -Depth= 110273 States= 2.33e+08 Transitions= 4.57e+09 Memory= 9692.307 t= 1.44e+04 R= 2e+04 -Depth= 110273 States= 2.34e+08 Transitions= 4.59e+09 Memory= 9718.186 t= 1.45e+04 R= 2e+04 -Depth= 110273 States= 2.35e+08 Transitions= 4.61e+09 Memory= 9746.604 t= 1.45e+04 R= 2e+04 -Depth= 110273 States= 2.36e+08 Transitions= 4.63e+09 Memory= 9772.678 t= 1.46e+04 R= 2e+04 -Depth= 110273 States= 2.37e+08 Transitions= 4.65e+09 Memory= 9799.826 t= 1.46e+04 R= 2e+04 -Depth= 110273 States= 2.38e+08 Transitions= 4.67e+09 Memory= 9826.779 t= 1.47e+04 R= 2e+04 -Depth= 110273 States= 2.39e+08 Transitions= 4.7e+09 Memory= 9853.342 t= 1.48e+04 R= 2e+04 -Depth= 110273 States= 2.4e+08 Transitions= 4.72e+09 Memory= 9879.709 t= 1.49e+04 R= 2e+04 -Depth= 110273 States= 2.41e+08 Transitions= 4.75e+09 Memory= 9906.174 t= 1.49e+04 R= 2e+04 -Depth= 110273 States= 2.42e+08 Transitions= 4.77e+09 Memory= 9934.006 t= 1.5e+04 R= 2e+04 -Depth= 110273 States= 2.43e+08 Transitions= 4.79e+09 Memory= 9960.471 t= 1.51e+04 R= 2e+04 -Depth= 110273 States= 2.44e+08 Transitions= 4.81e+09 Memory= 9987.229 t= 1.51e+04 R= 2e+04 -Depth= 110273 States= 2.45e+08 Transitions= 4.83e+09 Memory= 10014.084 t= 1.52e+04 R= 2e+04 -Depth= 110273 States= 2.46e+08 Transitions= 4.85e+09 Memory= 10040.842 t= 1.53e+04 R= 2e+04 -Depth= 110273 States= 2.47e+08 Transitions= 4.87e+09 Memory= 10067.404 t= 1.53e+04 R= 2e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 110273, errors: 0 -1.5183145e+08 states, stored (2.47605e+08 visited) -4.6348493e+09 states, matched -4.8824543e+09 transitions (= visited+matched) -7.5925477e+10 atomic steps -hash conflicts: 9.7802755e+08 (resolved) - -Stats on memory usage (in Megabytes): -16796.540 equivalent memory usage for states (stored*(State-vector + overhead)) - 7578.458 actual memory usage for states (compression: 45.12%) - state-vector as stored = 16 byte + 36 byte overhead - 2048.000 memory used for hash table (-w28) - 457.764 memory used for DFS stack (-m10000000) - 1.290 memory lost to fragmentation -10082.932 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 547261 4207 4043 2 2 ] -unreached in proctype urcu_reader - line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 104, "(1)" - line 249, "pan.___", state 112, "(1)" - line 253, "pan.___", state 124, "(1)" - line 257, "pan.___", state 132, "(1)" - line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 222, "(1)" - line 253, "pan.___", state 242, "(1)" - line 257, "pan.___", state 250, "(1)" - line 687, "pan.___", state 269, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 407, "pan.___", state 276, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 308, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 322, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 340, "(1)" - line 253, "pan.___", state 360, "(1)" - line 257, "pan.___", state 368, "(1)" - line 407, "pan.___", state 387, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 419, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 433, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 451, "(1)" - line 253, "pan.___", state 471, "(1)" - line 257, "pan.___", state 479, "(1)" - line 407, "pan.___", state 500, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 502, "(1)" - line 407, "pan.___", state 503, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 503, "else" - line 407, "pan.___", state 506, "(1)" - line 411, "pan.___", state 514, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 516, "(1)" - line 411, "pan.___", state 517, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 517, "else" - line 411, "pan.___", state 520, "(1)" - line 411, "pan.___", state 521, "(1)" - line 411, "pan.___", state 521, "(1)" - line 409, "pan.___", state 526, "((i<1))" - line 409, "pan.___", state 526, "((i>=1))" - line 416, "pan.___", state 532, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 534, "(1)" - line 416, "pan.___", state 535, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 535, "else" - line 416, "pan.___", state 538, "(1)" - line 416, "pan.___", state 539, "(1)" - line 416, "pan.___", state 539, "(1)" - line 420, "pan.___", state 546, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 548, "(1)" - line 420, "pan.___", state 549, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 549, "else" - line 420, "pan.___", state 552, "(1)" - line 420, "pan.___", state 553, "(1)" - line 420, "pan.___", state 553, "(1)" - line 418, "pan.___", state 558, "((i<2))" - line 418, "pan.___", state 558, "((i>=2))" - line 245, "pan.___", state 564, "(1)" - line 249, "pan.___", state 572, "(1)" - line 249, "pan.___", state 573, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 573, "else" - line 247, "pan.___", state 578, "((i<1))" - line 247, "pan.___", state 578, "((i>=1))" - line 253, "pan.___", state 584, "(1)" - line 253, "pan.___", state 585, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 585, "else" - line 257, "pan.___", state 592, "(1)" - line 257, "pan.___", state 593, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 593, "else" - line 255, "pan.___", state 598, "((i<2))" - line 255, "pan.___", state 598, "((i>=2))" - line 262, "pan.___", state 602, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 602, "else" - line 427, "pan.___", state 604, "(1)" - line 427, "pan.___", state 604, "(1)" - line 687, "pan.___", state 607, "cached_urcu_active_readers = (tmp+1)" - line 687, "pan.___", state 608, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 687, "pan.___", state 609, "(1)" - line 407, "pan.___", state 616, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 648, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 662, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 680, "(1)" - line 253, "pan.___", state 700, "(1)" - line 257, "pan.___", state 708, "(1)" - line 407, "pan.___", state 734, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 766, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 780, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 798, "(1)" - line 253, "pan.___", state 818, "(1)" - line 257, "pan.___", state 826, "(1)" - line 407, "pan.___", state 845, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 847, "(1)" - line 407, "pan.___", state 848, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 848, "else" - line 407, "pan.___", state 851, "(1)" - line 411, "pan.___", state 859, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 861, "(1)" - line 411, "pan.___", state 862, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 862, "else" - line 411, "pan.___", state 865, "(1)" - line 411, "pan.___", state 866, "(1)" - line 411, "pan.___", state 866, "(1)" - line 409, "pan.___", state 871, "((i<1))" - line 409, "pan.___", state 871, "((i>=1))" - line 416, "pan.___", state 877, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 879, "(1)" - line 416, "pan.___", state 880, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 880, "else" - line 416, "pan.___", state 883, "(1)" - line 416, "pan.___", state 884, "(1)" - line 416, "pan.___", state 884, "(1)" - line 420, "pan.___", state 891, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 893, "(1)" - line 420, "pan.___", state 894, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 894, "else" - line 420, "pan.___", state 897, "(1)" - line 420, "pan.___", state 898, "(1)" - line 420, "pan.___", state 898, "(1)" - line 418, "pan.___", state 903, "((i<2))" - line 418, "pan.___", state 903, "((i>=2))" - line 245, "pan.___", state 909, "(1)" - line 249, "pan.___", state 917, "(1)" - line 249, "pan.___", state 918, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 918, "else" - line 247, "pan.___", state 923, "((i<1))" - line 247, "pan.___", state 923, "((i>=1))" - line 253, "pan.___", state 929, "(1)" - line 253, "pan.___", state 930, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 930, "else" - line 257, "pan.___", state 937, "(1)" - line 257, "pan.___", state 938, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 938, "else" - line 255, "pan.___", state 943, "((i<2))" - line 255, "pan.___", state 943, "((i>=2))" - line 262, "pan.___", state 947, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 947, "else" - line 427, "pan.___", state 949, "(1)" - line 427, "pan.___", state 949, "(1)" - line 695, "pan.___", state 953, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 407, "pan.___", state 958, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 990, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1004, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1022, "(1)" - line 253, "pan.___", state 1042, "(1)" - line 257, "pan.___", state 1050, "(1)" - line 407, "pan.___", state 1072, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1104, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1118, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1136, "(1)" - line 253, "pan.___", state 1156, "(1)" - line 257, "pan.___", state 1164, "(1)" - line 407, "pan.___", state 1187, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1219, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1233, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1251, "(1)" - line 253, "pan.___", state 1271, "(1)" - line 257, "pan.___", state 1279, "(1)" - line 407, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1330, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1344, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1362, "(1)" - line 253, "pan.___", state 1382, "(1)" - line 257, "pan.___", state 1390, "(1)" - line 407, "pan.___", state 1414, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1446, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1460, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1478, "(1)" - line 253, "pan.___", state 1498, "(1)" - line 257, "pan.___", state 1506, "(1)" - line 407, "pan.___", state 1525, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1557, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1571, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1589, "(1)" - line 253, "pan.___", state 1609, "(1)" - line 257, "pan.___", state 1617, "(1)" - line 407, "pan.___", state 1639, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1671, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1685, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1703, "(1)" - line 253, "pan.___", state 1723, "(1)" - line 257, "pan.___", state 1731, "(1)" - line 734, "pan.___", state 1750, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 407, "pan.___", state 1757, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1789, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1803, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1821, "(1)" - line 253, "pan.___", state 1841, "(1)" - line 257, "pan.___", state 1849, "(1)" - line 407, "pan.___", state 1868, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1900, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1914, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1932, "(1)" - line 253, "pan.___", state 1952, "(1)" - line 257, "pan.___", state 1960, "(1)" - line 407, "pan.___", state 1981, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 1983, "(1)" - line 407, "pan.___", state 1984, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 1984, "else" - line 407, "pan.___", state 1987, "(1)" - line 411, "pan.___", state 1995, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 1997, "(1)" - line 411, "pan.___", state 1998, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 1998, "else" - line 411, "pan.___", state 2001, "(1)" - line 411, "pan.___", state 2002, "(1)" - line 411, "pan.___", state 2002, "(1)" - line 409, "pan.___", state 2007, "((i<1))" - line 409, "pan.___", state 2007, "((i>=1))" - line 416, "pan.___", state 2013, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 2015, "(1)" - line 416, "pan.___", state 2016, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 2016, "else" - line 416, "pan.___", state 2019, "(1)" - line 416, "pan.___", state 2020, "(1)" - line 416, "pan.___", state 2020, "(1)" - line 420, "pan.___", state 2027, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 2029, "(1)" - line 420, "pan.___", state 2030, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 2030, "else" - line 420, "pan.___", state 2033, "(1)" - line 420, "pan.___", state 2034, "(1)" - line 420, "pan.___", state 2034, "(1)" - line 418, "pan.___", state 2039, "((i<2))" - line 418, "pan.___", state 2039, "((i>=2))" - line 245, "pan.___", state 2045, "(1)" - line 249, "pan.___", state 2053, "(1)" - line 249, "pan.___", state 2054, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 2054, "else" - line 247, "pan.___", state 2059, "((i<1))" - line 247, "pan.___", state 2059, "((i>=1))" - line 253, "pan.___", state 2065, "(1)" - line 253, "pan.___", state 2066, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 2066, "else" - line 257, "pan.___", state 2073, "(1)" - line 257, "pan.___", state 2074, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 2074, "else" - line 255, "pan.___", state 2079, "((i<2))" - line 255, "pan.___", state 2079, "((i>=2))" - line 262, "pan.___", state 2083, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 2083, "else" - line 427, "pan.___", state 2085, "(1)" - line 427, "pan.___", state 2085, "(1)" - line 734, "pan.___", state 2088, "cached_urcu_active_readers = (tmp+1)" - line 734, "pan.___", state 2089, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 734, "pan.___", state 2090, "(1)" - line 407, "pan.___", state 2097, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2129, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2143, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 2161, "(1)" - line 253, "pan.___", state 2181, "(1)" - line 257, "pan.___", state 2189, "(1)" - line 407, "pan.___", state 2214, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2246, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2260, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 2278, "(1)" - line 253, "pan.___", state 2298, "(1)" - line 257, "pan.___", state 2306, "(1)" - line 407, "pan.___", state 2325, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2357, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2371, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 2389, "(1)" - line 253, "pan.___", state 2409, "(1)" - line 257, "pan.___", state 2417, "(1)" - line 245, "pan.___", state 2448, "(1)" - line 253, "pan.___", state 2468, "(1)" - line 257, "pan.___", state 2476, "(1)" - line 245, "pan.___", state 2491, "(1)" - line 253, "pan.___", state 2511, "(1)" - line 257, "pan.___", state 2519, "(1)" - line 929, "pan.___", state 2536, "-end-" - (221 of 2536 states) -unreached in proctype urcu_writer - line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 245, "pan.___", state 109, "(1)" - line 249, "pan.___", state 117, "(1)" - line 253, "pan.___", state 129, "(1)" - line 268, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 167, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 180, "cache_dirty_rcu_ptr = 0" - line 407, "pan.___", state 220, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 234, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 252, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 266, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 284, "(1)" - line 249, "pan.___", state 292, "(1)" - line 253, "pan.___", state 304, "(1)" - line 257, "pan.___", state 312, "(1)" - line 411, "pan.___", state 347, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 365, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 379, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 405, "(1)" - line 253, "pan.___", state 417, "(1)" - line 257, "pan.___", state 425, "(1)" - line 411, "pan.___", state 468, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 486, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 500, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 526, "(1)" - line 253, "pan.___", state 538, "(1)" - line 257, "pan.___", state 546, "(1)" - line 411, "pan.___", state 579, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 597, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 611, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 637, "(1)" - line 253, "pan.___", state 649, "(1)" - line 257, "pan.___", state 657, "(1)" - line 411, "pan.___", state 692, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 710, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 724, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 750, "(1)" - line 253, "pan.___", state 762, "(1)" - line 257, "pan.___", state 770, "(1)" - line 268, "pan.___", state 818, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 827, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 840, "cache_dirty_rcu_ptr = 0" - line 245, "pan.___", state 865, "(1)" - line 249, "pan.___", state 873, "(1)" - line 253, "pan.___", state 885, "(1)" - line 257, "pan.___", state 893, "(1)" - line 268, "pan.___", state 924, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 933, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 946, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 955, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 971, "(1)" - line 249, "pan.___", state 979, "(1)" - line 253, "pan.___", state 991, "(1)" - line 257, "pan.___", state 999, "(1)" - line 268, "pan.___", state 1020, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1029, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1044, "(1)" - line 280, "pan.___", state 1051, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1067, "(1)" - line 249, "pan.___", state 1075, "(1)" - line 253, "pan.___", state 1087, "(1)" - line 257, "pan.___", state 1095, "(1)" - line 268, "pan.___", state 1126, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1135, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1148, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1157, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1173, "(1)" - line 249, "pan.___", state 1181, "(1)" - line 253, "pan.___", state 1193, "(1)" - line 257, "pan.___", state 1201, "(1)" - line 272, "pan.___", state 1227, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1240, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1249, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1265, "(1)" - line 249, "pan.___", state 1273, "(1)" - line 253, "pan.___", state 1285, "(1)" - line 257, "pan.___", state 1293, "(1)" - line 268, "pan.___", state 1324, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1333, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1346, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1355, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1371, "(1)" - line 249, "pan.___", state 1379, "(1)" - line 253, "pan.___", state 1391, "(1)" - line 257, "pan.___", state 1399, "(1)" - line 272, "pan.___", state 1425, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1438, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1447, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1463, "(1)" - line 249, "pan.___", state 1471, "(1)" - line 253, "pan.___", state 1483, "(1)" - line 257, "pan.___", state 1491, "(1)" - line 268, "pan.___", state 1522, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1531, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1544, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1553, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1569, "(1)" - line 249, "pan.___", state 1577, "(1)" - line 253, "pan.___", state 1589, "(1)" - line 257, "pan.___", state 1597, "(1)" - line 272, "pan.___", state 1623, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1636, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1645, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1661, "(1)" - line 249, "pan.___", state 1669, "(1)" - line 253, "pan.___", state 1681, "(1)" - line 257, "pan.___", state 1689, "(1)" - line 268, "pan.___", state 1720, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1729, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1742, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1751, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1767, "(1)" - line 249, "pan.___", state 1775, "(1)" - line 253, "pan.___", state 1787, "(1)" - line 257, "pan.___", state 1795, "(1)" - line 1304, "pan.___", state 1811, "-end-" - (118 of 1811 states) -unreached in proctype :init: - (0 of 28 states) -unreached in proctype :never: - line 1369, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 1.54e+04 seconds -pan: rate 16109.46 states/second -pan: avg transition delay 3.148e-06 usec -cp .input.spin urcu_progress_reader.spin.input -cp .input.spin.trail urcu_progress_reader.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.spin.input b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.spin.input deleted file mode 100644 index 83c0751..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.spin.input +++ /dev/null @@ -1,1340 +0,0 @@ -#define READER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.log b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.log deleted file mode 100644 index a04140c..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.log +++ /dev/null @@ -1,681 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1362) -depth 7: Claim reached state 9 (line 1367) -depth 50: Claim reached state 9 (line 1366) -Depth= 7070 States= 1e+06 Transitions= 1.16e+07 Memory= 493.010 t= 34.5 R= 3e+04 -Depth= 7070 States= 2e+06 Transitions= 2.31e+07 Memory= 521.330 t= 69.3 R= 3e+04 -Depth= 7070 States= 3e+06 Transitions= 3.43e+07 Memory= 549.455 t= 103 R= 3e+04 -pan: resizing hashtable to -w22.. done -Depth= 8814 States= 4e+06 Transitions= 4.57e+07 Memory= 607.041 t= 138 R= 3e+04 -Depth= 8814 States= 5e+06 Transitions= 5.73e+07 Memory= 632.920 t= 174 R= 3e+04 -Depth= 8814 States= 6e+06 Transitions= 7.04e+07 Memory= 662.217 t= 215 R= 3e+04 -Depth= 8814 States= 7e+06 Transitions= 8.38e+07 Memory= 690.049 t= 257 R= 3e+04 -Depth= 8814 States= 8e+06 Transitions= 9.59e+07 Memory= 717.588 t= 294 R= 3e+04 -Depth= 8814 States= 9e+06 Transitions= 1.08e+08 Memory= 745.127 t= 332 R= 3e+04 -pan: resizing hashtable to -w24.. done -Depth= 8814 States= 1e+07 Transitions= 1.29e+08 Memory= 897.639 t= 398 R= 3e+04 -Depth= 8814 States= 1.1e+07 Transitions= 1.41e+08 Memory= 926.154 t= 434 R= 3e+04 -Depth= 8814 States= 1.2e+07 Transitions= 1.53e+08 Memory= 953.401 t= 471 R= 3e+04 -Depth= 8814 States= 1.3e+07 Transitions= 1.64e+08 Memory= 980.940 t= 505 R= 3e+04 -Depth= 8814 States= 1.4e+07 Transitions= 1.75e+08 Memory= 1010.725 t= 539 R= 3e+04 -Depth= 8814 States= 1.5e+07 Transitions= 1.87e+08 Memory= 1037.580 t= 573 R= 3e+04 -Depth= 8814 States= 1.6e+07 Transitions= 1.98e+08 Memory= 1064.924 t= 607 R= 3e+04 -Depth= 8814 States= 1.7e+07 Transitions= 2.09e+08 Memory= 1094.904 t= 641 R= 3e+04 -Depth= 8814 States= 1.8e+07 Transitions= 2.23e+08 Memory= 1119.514 t= 683 R= 3e+04 -Depth= 8814 States= 1.9e+07 Transitions= 2.36e+08 Memory= 1146.662 t= 725 R= 3e+04 -Depth= 8814 States= 2e+07 Transitions= 2.57e+08 Memory= 1174.201 t= 790 R= 3e+04 -Depth= 8814 States= 2.1e+07 Transitions= 2.93e+08 Memory= 1205.549 t= 908 R= 2e+04 -Depth= 9015 States= 2.2e+07 Transitions= 3.11e+08 Memory= 1235.822 t= 965 R= 2e+04 -Depth= 9015 States= 2.3e+07 Transitions= 3.25e+08 Memory= 1264.533 t= 1.01e+03 R= 2e+04 -Depth= 9015 States= 2.4e+07 Transitions= 3.45e+08 Memory= 1293.244 t= 1.07e+03 R= 2e+04 -Depth= 9015 States= 2.5e+07 Transitions= 3.67e+08 Memory= 1321.467 t= 1.14e+03 R= 2e+04 -Depth= 9015 States= 2.6e+07 Transitions= 3.84e+08 Memory= 1350.764 t= 1.2e+03 R= 2e+04 -Depth= 9015 States= 2.7e+07 Transitions= 4.07e+08 Memory= 1380.158 t= 1.27e+03 R= 2e+04 -Depth= 9015 States= 2.8e+07 Transitions= 4.29e+08 Memory= 1405.940 t= 1.34e+03 R= 2e+04 -Depth= 9015 States= 2.9e+07 Transitions= 4.48e+08 Memory= 1433.381 t= 1.4e+03 R= 2e+04 -Depth= 9015 States= 3e+07 Transitions= 4.66e+08 Memory= 1461.506 t= 1.46e+03 R= 2e+04 -Depth= 9015 States= 3.1e+07 Transitions= 4.86e+08 Memory= 1489.143 t= 1.52e+03 R= 2e+04 -Depth= 9015 States= 3.2e+07 Transitions= 5.1e+08 Memory= 1516.486 t= 1.6e+03 R= 2e+04 -Depth= 9015 States= 3.3e+07 Transitions= 5.29e+08 Memory= 1543.733 t= 1.66e+03 R= 2e+04 -Depth= 9015 States= 3.4e+07 Transitions= 5.47e+08 Memory= 1571.760 t= 1.72e+03 R= 2e+04 -pan: resizing hashtable to -w26.. done -Depth= 9015 States= 3.5e+07 Transitions= 5.69e+08 Memory= 2095.088 t= 1.79e+03 R= 2e+04 -Depth= 9015 States= 3.6e+07 Transitions= 5.95e+08 Memory= 2122.041 t= 1.87e+03 R= 2e+04 -Depth= 9015 States= 3.7e+07 Transitions= 6.12e+08 Memory= 2149.971 t= 1.93e+03 R= 2e+04 -Depth= 9015 States= 3.8e+07 Transitions= 6.29e+08 Memory= 2176.045 t= 1.98e+03 R= 2e+04 -Depth= 9015 States= 3.9e+07 Transitions= 6.42e+08 Memory= 2204.268 t= 2.02e+03 R= 2e+04 -Depth= 9015 States= 4e+07 Transitions= 6.56e+08 Memory= 2233.565 t= 2.06e+03 R= 2e+04 -Depth= 9015 States= 4.1e+07 Transitions= 6.69e+08 Memory= 2264.424 t= 2.1e+03 R= 2e+04 -Depth= 9015 States= 4.2e+07 Transitions= 6.82e+08 Memory= 2292.940 t= 2.14e+03 R= 2e+04 -Depth= 9015 States= 4.3e+07 Transitions= 6.95e+08 Memory= 2322.529 t= 2.18e+03 R= 2e+04 -Depth= 9015 States= 4.4e+07 Transitions= 7.07e+08 Memory= 2350.654 t= 2.22e+03 R= 2e+04 -Depth= 9015 States= 4.5e+07 Transitions= 7.28e+08 Memory= 2378.193 t= 2.29e+03 R= 2e+04 -Depth= 9015 States= 4.6e+07 Transitions= 7.63e+08 Memory= 2409.443 t= 2.4e+03 R= 2e+04 -Depth= 9015 States= 4.7e+07 Transitions= 7.99e+08 Memory= 2445.088 t= 2.52e+03 R= 2e+04 -Depth= 9015 States= 4.8e+07 Transitions= 8.49e+08 Memory= 2479.072 t= 2.69e+03 R= 2e+04 -Depth= 9015 States= 4.9e+07 Transitions= 8.91e+08 Memory= 2508.076 t= 2.82e+03 R= 2e+04 -Depth= 9015 States= 5e+07 Transitions= 9.24e+08 Memory= 2532.295 t= 2.93e+03 R= 2e+04 -Depth= 9015 States= 5.1e+07 Transitions= 9.39e+08 Memory= 2561.494 t= 2.98e+03 R= 2e+04 -Depth= 9015 States= 5.2e+07 Transitions= 9.6e+08 Memory= 2589.522 t= 3.05e+03 R= 2e+04 -Depth= 9015 States= 5.3e+07 Transitions= 9.99e+08 Memory= 2617.158 t= 3.17e+03 R= 2e+04 -Depth= 9015 States= 5.4e+07 Transitions= 1.01e+09 Memory= 2647.725 t= 3.22e+03 R= 2e+04 -Depth= 9015 States= 5.5e+07 Transitions= 1.03e+09 Memory= 2674.580 t= 3.27e+03 R= 2e+04 -Depth= 9015 States= 5.6e+07 Transitions= 1.05e+09 Memory= 2701.143 t= 3.32e+03 R= 2e+04 -Depth= 9015 States= 5.7e+07 Transitions= 1.06e+09 Memory= 2730.928 t= 3.36e+03 R= 2e+04 -Depth= 9015 States= 5.8e+07 Transitions= 1.09e+09 Memory= 2759.053 t= 3.45e+03 R= 2e+04 -Depth= 9015 States= 5.9e+07 Transitions= 1.1e+09 Memory= 2786.983 t= 3.5e+03 R= 2e+04 -Depth= 9015 States= 6e+07 Transitions= 1.13e+09 Memory= 2814.619 t= 3.6e+03 R= 2e+04 -Depth= 9015 States= 6.1e+07 Transitions= 1.15e+09 Memory= 2841.670 t= 3.66e+03 R= 2e+04 -Depth= 9015 States= 6.2e+07 Transitions= 1.19e+09 Memory= 2870.576 t= 3.77e+03 R= 2e+04 -Depth= 9015 States= 6.3e+07 Transitions= 1.21e+09 Memory= 2897.627 t= 3.84e+03 R= 2e+04 -Depth= 9015 States= 6.4e+07 Transitions= 1.24e+09 Memory= 2925.166 t= 3.94e+03 R= 2e+04 -Depth= 9015 States= 6.5e+07 Transitions= 1.26e+09 Memory= 2952.803 t= 4.01e+03 R= 2e+04 -Depth= 9015 States= 6.6e+07 Transitions= 1.28e+09 Memory= 2979.756 t= 4.09e+03 R= 2e+04 -Depth= 9015 States= 6.7e+07 Transitions= 1.3e+09 Memory= 3007.686 t= 4.15e+03 R= 2e+04 -Depth= 9015 States= 6.8e+07 Transitions= 1.33e+09 Memory= 3035.811 t= 4.23e+03 R= 2e+04 -Depth= 9015 States= 6.9e+07 Transitions= 1.36e+09 Memory= 3063.838 t= 4.32e+03 R= 2e+04 -Depth= 9522 States= 7e+07 Transitions= 1.38e+09 Memory= 3094.795 t= 4.39e+03 R= 2e+04 -Depth= 9522 States= 7.1e+07 Transitions= 1.39e+09 Memory= 3120.186 t= 4.43e+03 R= 2e+04 -Depth= 9522 States= 7.2e+07 Transitions= 1.41e+09 Memory= 3149.971 t= 4.5e+03 R= 2e+04 -Depth= 9553 States= 7.3e+07 Transitions= 1.44e+09 Memory= 3179.365 t= 4.57e+03 R= 2e+04 -Depth= 9553 States= 7.4e+07 Transitions= 1.45e+09 Memory= 3205.244 t= 4.61e+03 R= 2e+04 -Depth= 9553 States= 7.5e+07 Transitions= 1.47e+09 Memory= 3235.225 t= 4.69e+03 R= 2e+04 -Depth= 9553 States= 7.6e+07 Transitions= 1.49e+09 Memory= 3263.545 t= 4.75e+03 R= 2e+04 -Depth= 9553 States= 7.7e+07 Transitions= 1.51e+09 Memory= 3290.401 t= 4.8e+03 R= 2e+04 -Depth= 9553 States= 7.8e+07 Transitions= 1.52e+09 Memory= 3319.795 t= 4.84e+03 R= 2e+04 -Depth= 9553 States= 7.9e+07 Transitions= 1.54e+09 Memory= 3349.190 t= 4.91e+03 R= 2e+04 -Depth= 9553 States= 8e+07 Transitions= 1.56e+09 Memory= 3377.803 t= 4.98e+03 R= 2e+04 -Depth= 9553 States= 8.1e+07 Transitions= 1.58e+09 Memory= 3406.904 t= 5.04e+03 R= 2e+04 -Depth= 9553 States= 8.2e+07 Transitions= 1.6e+09 Memory= 3434.443 t= 5.08e+03 R= 2e+04 -Depth= 9553 States= 8.3e+07 Transitions= 1.61e+09 Memory= 3462.178 t= 5.14e+03 R= 2e+04 -Depth= 9553 States= 8.4e+07 Transitions= 1.63e+09 Memory= 3490.205 t= 5.18e+03 R= 2e+04 -Depth= 9553 States= 8.5e+07 Transitions= 1.65e+09 Memory= 3517.549 t= 5.24e+03 R= 2e+04 -Depth= 9553 States= 8.6e+07 Transitions= 1.67e+09 Memory= 3544.502 t= 5.31e+03 R= 2e+04 -Depth= 9553 States= 8.7e+07 Transitions= 1.69e+09 Memory= 3574.190 t= 5.38e+03 R= 2e+04 -Depth= 9553 States= 8.8e+07 Transitions= 1.7e+09 Memory= 3606.026 t= 5.42e+03 R= 2e+04 -Depth= 9553 States= 8.9e+07 Transitions= 1.72e+09 Memory= 3632.588 t= 5.48e+03 R= 2e+04 -Depth= 9553 States= 9e+07 Transitions= 1.74e+09 Memory= 3662.080 t= 5.53e+03 R= 2e+04 -Depth= 9553 States= 9.1e+07 Transitions= 1.76e+09 Memory= 3689.229 t= 5.59e+03 R= 2e+04 -Depth= 9553 States= 9.2e+07 Transitions= 1.78e+09 Memory= 3716.572 t= 5.65e+03 R= 2e+04 -Depth= 9553 States= 9.3e+07 Transitions= 1.8e+09 Memory= 3743.135 t= 5.72e+03 R= 2e+04 -Depth= 9553 States= 9.4e+07 Transitions= 1.82e+09 Memory= 3771.553 t= 5.8e+03 R= 2e+04 -Depth= 9553 States= 9.5e+07 Transitions= 1.84e+09 Memory= 3801.436 t= 5.86e+03 R= 2e+04 -Depth= 9553 States= 9.6e+07 Transitions= 1.86e+09 Memory= 3827.803 t= 5.91e+03 R= 2e+04 -Depth= 9553 States= 9.7e+07 Transitions= 1.88e+09 Memory= 3857.881 t= 5.99e+03 R= 2e+04 -Depth= 9553 States= 9.8e+07 Transitions= 1.9e+09 Memory= 3886.494 t= 6.03e+03 R= 2e+04 -Depth= 9553 States= 9.9e+07 Transitions= 1.91e+09 Memory= 3914.229 t= 6.08e+03 R= 2e+04 -Depth= 9553 States= 1e+08 Transitions= 1.93e+09 Memory= 3942.549 t= 6.13e+03 R= 2e+04 -Depth= 9553 States= 1.01e+08 Transitions= 1.94e+09 Memory= 3972.236 t= 6.19e+03 R= 2e+04 -Depth= 9553 States= 1.02e+08 Transitions= 1.96e+09 Memory= 4001.729 t= 6.24e+03 R= 2e+04 -Depth= 9553 States= 1.03e+08 Transitions= 1.98e+09 Memory= 4030.049 t= 6.3e+03 R= 2e+04 -Depth= 9553 States= 1.04e+08 Transitions= 2e+09 Memory= 4059.639 t= 6.38e+03 R= 2e+04 -Depth= 9553 States= 1.05e+08 Transitions= 2.02e+09 Memory= 4086.006 t= 6.43e+03 R= 2e+04 -Depth= 9553 States= 1.06e+08 Transitions= 2.04e+09 Memory= 4115.889 t= 6.49e+03 R= 2e+04 -Depth= 9553 States= 1.07e+08 Transitions= 2.06e+09 Memory= 4144.990 t= 6.55e+03 R= 2e+04 -Depth= 9553 States= 1.08e+08 Transitions= 2.07e+09 Memory= 4172.822 t= 6.6e+03 R= 2e+04 -Depth= 9553 States= 1.09e+08 Transitions= 2.09e+09 Memory= 4200.752 t= 6.65e+03 R= 2e+04 -Depth= 9553 States= 1.1e+08 Transitions= 2.11e+09 Memory= 4230.147 t= 6.7e+03 R= 2e+04 -Depth= 9553 States= 1.11e+08 Transitions= 2.12e+09 Memory= 4259.932 t= 6.75e+03 R= 2e+04 -Depth= 9553 States= 1.12e+08 Transitions= 2.14e+09 Memory= 4284.541 t= 6.81e+03 R= 2e+04 -Depth= 9553 States= 1.13e+08 Transitions= 2.16e+09 Memory= 4312.471 t= 6.86e+03 R= 2e+04 -Depth= 9553 States= 1.14e+08 Transitions= 2.17e+09 Memory= 4340.401 t= 6.91e+03 R= 2e+04 -Depth= 9553 States= 1.15e+08 Transitions= 2.19e+09 Memory= 4368.526 t= 6.97e+03 R= 2e+04 -Depth= 9553 States= 1.16e+08 Transitions= 2.21e+09 Memory= 4396.651 t= 7.02e+03 R= 2e+04 -Depth= 9553 States= 1.17e+08 Transitions= 2.23e+09 Memory= 4423.897 t= 7.1e+03 R= 2e+04 -Depth= 9553 States= 1.18e+08 Transitions= 2.27e+09 Memory= 4453.779 t= 7.22e+03 R= 2e+04 -Depth= 9553 States= 1.19e+08 Transitions= 2.29e+09 Memory= 4483.955 t= 7.29e+03 R= 2e+04 -Depth= 9553 States= 1.2e+08 Transitions= 2.3e+09 Memory= 4513.545 t= 7.33e+03 R= 2e+04 -Depth= 9553 States= 1.21e+08 Transitions= 2.32e+09 Memory= 4541.279 t= 7.4e+03 R= 2e+04 -Depth= 9553 States= 1.22e+08 Transitions= 2.34e+09 Memory= 4569.893 t= 7.45e+03 R= 2e+04 -Depth= 9553 States= 1.23e+08 Transitions= 2.36e+09 Memory= 4599.483 t= 7.52e+03 R= 2e+04 -Depth= 9553 States= 1.24e+08 Transitions= 2.38e+09 Memory= 4627.705 t= 7.58e+03 R= 2e+04 -Depth= 9553 States= 1.25e+08 Transitions= 2.41e+09 Memory= 4654.658 t= 7.68e+03 R= 2e+04 -Depth= 9553 States= 1.26e+08 Transitions= 2.43e+09 Memory= 4681.807 t= 7.76e+03 R= 2e+04 -Depth= 9553 States= 1.27e+08 Transitions= 2.45e+09 Memory= 4708.760 t= 7.83e+03 R= 2e+04 -Depth= 9553 States= 1.28e+08 Transitions= 2.48e+09 Memory= 4735.518 t= 7.93e+03 R= 2e+04 -Depth= 9553 States= 1.29e+08 Transitions= 2.5e+09 Memory= 4762.178 t= 8e+03 R= 2e+04 -Depth= 9553 States= 1.3e+08 Transitions= 2.52e+09 Memory= 4790.303 t= 8.07e+03 R= 2e+04 -Depth= 9553 States= 1.31e+08 Transitions= 2.55e+09 Memory= 4817.451 t= 8.15e+03 R= 2e+04 -Depth= 9553 States= 1.32e+08 Transitions= 2.57e+09 Memory= 4845.186 t= 8.22e+03 R= 2e+04 -Depth= 9553 States= 1.33e+08 Transitions= 2.59e+09 Memory= 4872.139 t= 8.3e+03 R= 2e+04 -Depth= 9553 States= 1.34e+08 Transitions= 2.61e+09 Memory= 4900.850 t= 8.37e+03 R= 2e+04 -Depth= 9553 States= 1.35e+08 Transitions= 2.63e+09 Memory= 4927.803 t= 8.43e+03 R= 2e+04 -pan: resizing hashtable to -w28.. done -Depth= 9553 States= 1.36e+08 Transitions= 2.65e+09 Memory= 6975.803 t= 8.5e+03 R= 2e+04 -Depth= 9553 States= 1.37e+08 Transitions= 2.66e+09 Memory= 6975.803 t= 8.54e+03 R= 2e+04 -Depth= 9553 States= 1.38e+08 Transitions= 2.67e+09 Memory= 6996.799 t= 8.58e+03 R= 2e+04 -Depth= 9553 States= 1.39e+08 Transitions= 2.69e+09 Memory= 7026.779 t= 8.62e+03 R= 2e+04 -Depth= 9553 States= 1.4e+08 Transitions= 2.7e+09 Memory= 7056.467 t= 8.68e+03 R= 2e+04 -Depth= 9553 States= 1.41e+08 Transitions= 2.72e+09 Memory= 7084.787 t= 8.72e+03 R= 2e+04 -Depth= 9553 States= 1.42e+08 Transitions= 2.74e+09 Memory= 7114.084 t= 8.77e+03 R= 2e+04 -Depth= 9553 States= 1.43e+08 Transitions= 2.75e+09 Memory= 7143.088 t= 8.82e+03 R= 2e+04 -Depth= 9553 States= 1.44e+08 Transitions= 2.77e+09 Memory= 7170.920 t= 8.88e+03 R= 2e+04 -Depth= 9553 States= 1.45e+08 Transitions= 2.79e+09 Memory= 7198.166 t= 8.94e+03 R= 2e+04 -Depth= 9553 States= 1.46e+08 Transitions= 2.82e+09 Memory= 7229.514 t= 9.06e+03 R= 2e+04 -Depth= 9553 States= 1.47e+08 Transitions= 2.86e+09 Memory= 7265.158 t= 9.18e+03 R= 2e+04 -Depth= 9553 States= 1.48e+08 Transitions= 2.91e+09 Memory= 7299.143 t= 9.34e+03 R= 2e+04 -Depth= 9553 States= 1.49e+08 Transitions= 2.95e+09 Memory= 7327.170 t= 9.47e+03 R= 2e+04 -Depth= 9553 States= 1.5e+08 Transitions= 2.99e+09 Memory= 7352.561 t= 9.59e+03 R= 2e+04 -Depth= 9553 States= 1.51e+08 Transitions= 3e+09 Memory= 7380.881 t= 9.64e+03 R= 2e+04 -Depth= 9553 States= 1.52e+08 Transitions= 3.02e+09 Memory= 7408.908 t= 9.7e+03 R= 2e+04 -Depth= 9553 States= 1.53e+08 Transitions= 3.05e+09 Memory= 7437.033 t= 9.8e+03 R= 2e+04 -Depth= 9553 States= 1.54e+08 Transitions= 3.08e+09 Memory= 7465.744 t= 9.89e+03 R= 2e+04 -Depth= 9553 States= 1.55e+08 Transitions= 3.1e+09 Memory= 7493.869 t= 9.95e+03 R= 2e+04 -Depth= 9553 States= 1.56e+08 Transitions= 3.11e+09 Memory= 7520.529 t= 9.99e+03 R= 2e+04 -Depth= 9553 States= 1.57e+08 Transitions= 3.13e+09 Memory= 7547.092 t= 1e+04 R= 2e+04 -Depth= 9553 States= 1.58e+08 Transitions= 3.14e+09 Memory= 7577.170 t= 1.01e+04 R= 2e+04 -Depth= 9553 States= 1.59e+08 Transitions= 3.17e+09 Memory= 7604.611 t= 1.02e+04 R= 2e+04 -Depth= 9553 States= 1.6e+08 Transitions= 3.19e+09 Memory= 7631.955 t= 1.02e+04 R= 2e+04 -Depth= 9553 States= 1.61e+08 Transitions= 3.21e+09 Memory= 7659.299 t= 1.03e+04 R= 2e+04 -Depth= 9553 States= 1.62e+08 Transitions= 3.24e+09 Memory= 7686.740 t= 1.04e+04 R= 2e+04 -Depth= 9553 States= 1.63e+08 Transitions= 3.27e+09 Memory= 7713.791 t= 1.05e+04 R= 2e+04 -Depth= 9553 States= 1.64e+08 Transitions= 3.29e+09 Memory= 7743.186 t= 1.06e+04 R= 2e+04 -Depth= 9553 States= 1.65e+08 Transitions= 3.31e+09 Memory= 7771.604 t= 1.06e+04 R= 2e+04 -Depth= 9553 States= 1.66e+08 Transitions= 3.34e+09 Memory= 7797.971 t= 1.07e+04 R= 2e+04 -Depth= 9553 States= 1.67e+08 Transitions= 3.37e+09 Memory= 7825.217 t= 1.08e+04 R= 2e+04 -Depth= 9553 States= 1.68e+08 Transitions= 3.39e+09 Memory= 7853.733 t= 1.09e+04 R= 2e+04 -Depth= 9553 States= 1.69e+08 Transitions= 3.41e+09 Memory= 7880.686 t= 1.09e+04 R= 2e+04 -Depth= 9553 States= 1.7e+08 Transitions= 3.44e+09 Memory= 7909.690 t= 1.1e+04 R= 2e+04 -Depth= 9553 States= 1.71e+08 Transitions= 3.46e+09 Memory= 7939.279 t= 1.11e+04 R= 2e+04 -Depth= 9553 States= 1.72e+08 Transitions= 3.47e+09 Memory= 7964.768 t= 1.11e+04 R= 2e+04 -Depth= 9553 States= 1.73e+08 Transitions= 3.5e+09 Memory= 7994.260 t= 1.12e+04 R= 2e+04 -Depth= 9553 States= 1.74e+08 Transitions= 3.52e+09 Memory= 8023.850 t= 1.13e+04 R= 2e+04 -Depth= 9553 States= 1.75e+08 Transitions= 3.53e+09 Memory= 8051.877 t= 1.13e+04 R= 2e+04 -Depth= 9553 States= 1.76e+08 Transitions= 3.56e+09 Memory= 8080.979 t= 1.14e+04 R= 2e+04 -Depth= 9553 States= 1.77e+08 Transitions= 3.57e+09 Memory= 8107.834 t= 1.15e+04 R= 2e+04 -Depth= 9553 States= 1.78e+08 Transitions= 3.59e+09 Memory= 8137.033 t= 1.15e+04 R= 2e+04 -Depth= 9553 States= 1.79e+08 Transitions= 3.61e+09 Memory= 8165.158 t= 1.16e+04 R= 2e+04 -Depth= 9553 States= 1.8e+08 Transitions= 3.63e+09 Memory= 8194.065 t= 1.16e+04 R= 2e+04 -Depth= 9553 States= 1.81e+08 Transitions= 3.65e+09 Memory= 8222.971 t= 1.17e+04 R= 2e+04 -Depth= 9553 States= 1.82e+08 Transitions= 3.66e+09 Memory= 8251.096 t= 1.17e+04 R= 2e+04 -Depth= 9553 States= 1.83e+08 Transitions= 3.68e+09 Memory= 8279.514 t= 1.18e+04 R= 2e+04 -Depth= 9553 States= 1.84e+08 Transitions= 3.69e+09 Memory= 8307.151 t= 1.18e+04 R= 2e+04 -Depth= 9553 States= 1.85e+08 Transitions= 3.71e+09 Memory= 8334.787 t= 1.19e+04 R= 2e+04 -Depth= 9553 States= 1.86e+08 Transitions= 3.73e+09 Memory= 8361.838 t= 1.2e+04 R= 2e+04 -Depth= 9553 States= 1.87e+08 Transitions= 3.75e+09 Memory= 8392.209 t= 1.2e+04 R= 2e+04 -Depth= 9553 States= 1.88e+08 Transitions= 3.77e+09 Memory= 8423.361 t= 1.21e+04 R= 2e+04 -Depth= 9553 States= 1.89e+08 Transitions= 3.78e+09 Memory= 8449.826 t= 1.21e+04 R= 2e+04 -Depth= 9553 States= 1.9e+08 Transitions= 3.8e+09 Memory= 8479.026 t= 1.22e+04 R= 2e+04 -Depth= 9553 States= 1.91e+08 Transitions= 3.82e+09 Memory= 8506.076 t= 1.22e+04 R= 2e+04 -Depth= 9553 States= 1.92e+08 Transitions= 3.84e+09 Memory= 8533.029 t= 1.23e+04 R= 2e+04 -Depth= 9553 States= 1.93e+08 Transitions= 3.86e+09 Memory= 8563.889 t= 1.24e+04 R= 2e+04 -Depth= 9553 States= 1.94e+08 Transitions= 3.88e+09 Memory= 8590.744 t= 1.24e+04 R= 2e+04 -Depth= 9553 States= 1.95e+08 Transitions= 3.9e+09 Memory= 8620.334 t= 1.25e+04 R= 2e+04 -Depth= 9553 States= 1.96e+08 Transitions= 3.92e+09 Memory= 8649.826 t= 1.25e+04 R= 2e+04 -Depth= 9553 States= 1.97e+08 Transitions= 3.93e+09 Memory= 8676.486 t= 1.26e+04 R= 2e+04 -Depth= 9553 States= 1.98e+08 Transitions= 3.95e+09 Memory= 8705.197 t= 1.26e+04 R= 2e+04 -Depth= 9553 States= 1.99e+08 Transitions= 3.96e+09 Memory= 8734.006 t= 1.27e+04 R= 2e+04 -Depth= 9553 States= 2e+08 Transitions= 3.98e+09 Memory= 8764.279 t= 1.27e+04 R= 2e+04 -Depth= 9553 States= 2.01e+08 Transitions= 4e+09 Memory= 8792.209 t= 1.28e+04 R= 2e+04 -Depth= 9553 States= 2.02e+08 Transitions= 4.03e+09 Memory= 8821.408 t= 1.29e+04 R= 2e+04 -Depth= 9553 States= 2.03e+08 Transitions= 4.04e+09 Memory= 8849.338 t= 1.29e+04 R= 2e+04 -Depth= 9553 States= 2.04e+08 Transitions= 4.06e+09 Memory= 8878.733 t= 1.3e+04 R= 2e+04 -Depth= 9553 States= 2.05e+08 Transitions= 4.08e+09 Memory= 8908.322 t= 1.31e+04 R= 2e+04 -Depth= 9553 States= 2.06e+08 Transitions= 4.09e+09 Memory= 8934.494 t= 1.31e+04 R= 2e+04 -Depth= 9553 States= 2.07e+08 Transitions= 4.11e+09 Memory= 8963.498 t= 1.32e+04 R= 2e+04 -Depth= 9553 States= 2.08e+08 Transitions= 4.13e+09 Memory= 8991.818 t= 1.32e+04 R= 2e+04 -Depth= 9553 States= 2.09e+08 Transitions= 4.14e+09 Memory= 9022.287 t= 1.33e+04 R= 2e+04 -Depth= 9553 States= 2.1e+08 Transitions= 4.16e+09 Memory= 9047.580 t= 1.33e+04 R= 2e+04 -Depth= 9553 States= 2.11e+08 Transitions= 4.18e+09 Memory= 9075.412 t= 1.34e+04 R= 2e+04 -Depth= 9553 States= 2.12e+08 Transitions= 4.19e+09 Memory= 9103.244 t= 1.34e+04 R= 2e+04 -Depth= 9553 States= 2.13e+08 Transitions= 4.21e+09 Memory= 9131.467 t= 1.35e+04 R= 2e+04 -Depth= 9553 States= 2.14e+08 Transitions= 4.22e+09 Memory= 9159.006 t= 1.35e+04 R= 2e+04 -Depth= 9553 States= 2.15e+08 Transitions= 4.26e+09 Memory= 9188.010 t= 1.36e+04 R= 2e+04 -Depth= 9553 States= 2.16e+08 Transitions= 4.29e+09 Memory= 9218.283 t= 1.37e+04 R= 2e+04 -Depth= 9553 States= 2.17e+08 Transitions= 4.3e+09 Memory= 9246.897 t= 1.37e+04 R= 2e+04 -Depth= 9553 States= 2.18e+08 Transitions= 4.32e+09 Memory= 9276.193 t= 1.38e+04 R= 2e+04 -Depth= 9553 States= 2.19e+08 Transitions= 4.33e+09 Memory= 9305.002 t= 1.39e+04 R= 2e+04 -Depth= 9553 States= 2.2e+08 Transitions= 4.35e+09 Memory= 9334.299 t= 1.39e+04 R= 2e+04 -Depth= 9553 States= 2.21e+08 Transitions= 4.37e+09 Memory= 9362.619 t= 1.4e+04 R= 2e+04 -Depth= 9553 States= 2.22e+08 Transitions= 4.4e+09 Memory= 9388.108 t= 1.41e+04 R= 2e+04 -Depth= 9553 States= 2.23e+08 Transitions= 4.43e+09 Memory= 9415.354 t= 1.42e+04 R= 2e+04 -Depth= 9553 States= 2.24e+08 Transitions= 4.45e+09 Memory= 9442.111 t= 1.42e+04 R= 2e+04 -Depth= 9553 States= 2.25e+08 Transitions= 4.48e+09 Memory= 9468.967 t= 1.43e+04 R= 2e+04 -Depth= 9553 States= 2.26e+08 Transitions= 4.5e+09 Memory= 9495.041 t= 1.44e+04 R= 2e+04 -Depth= 9553 States= 2.27e+08 Transitions= 4.52e+09 Memory= 9522.580 t= 1.44e+04 R= 2e+04 -Depth= 9553 States= 2.28e+08 Transitions= 4.54e+09 Memory= 9549.631 t= 1.45e+04 R= 2e+04 -Depth= 9553 States= 2.29e+08 Transitions= 4.56e+09 Memory= 9576.096 t= 1.46e+04 R= 2e+04 -Depth= 9553 States= 2.3e+08 Transitions= 4.59e+09 Memory= 9602.268 t= 1.47e+04 R= 2e+04 -Depth= 9553 States= 2.31e+08 Transitions= 4.6e+09 Memory= 9630.197 t= 1.47e+04 R= 2e+04 -Depth= 9553 States= 2.32e+08 Transitions= 4.63e+09 Memory= 9656.858 t= 1.48e+04 R= 2e+04 -Depth= 9553 States= 2.33e+08 Transitions= 4.66e+09 Memory= 9683.713 t= 1.49e+04 R= 2e+04 -Depth= 9553 States= 2.34e+08 Transitions= 4.68e+09 Memory= 9710.373 t= 1.5e+04 R= 2e+04 -Depth= 9553 States= 2.35e+08 Transitions= 4.7e+09 Memory= 9738.108 t= 1.5e+04 R= 2e+04 -Depth= 9553 States= 2.36e+08 Transitions= 4.72e+09 Memory= 9765.158 t= 1.51e+04 R= 2e+04 -Depth= 9553 States= 2.37e+08 Transitions= 4.74e+09 Memory= 9792.404 t= 1.52e+04 R= 2e+04 -Depth= 9553 States= 2.38e+08 Transitions= 4.77e+09 Memory= 9818.576 t= 1.52e+04 R= 2e+04 -Depth= 9553 States= 2.39e+08 Transitions= 4.79e+09 Memory= 9845.432 t= 1.53e+04 R= 2e+04 -Depth= 9553 States= 2.4e+08 Transitions= 4.8e+09 Memory= 9871.701 t= 1.53e+04 R= 2e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 9553, errors: 0 -1.4728139e+08 states, stored (2.40187e+08 visited) -4.565323e+09 states, matched -4.8055096e+09 transitions (= visited+matched) -7.4787137e+10 atomic steps -hash conflicts: 1.0275497e+09 (resolved) - -Stats on memory usage (in Megabytes): -16293.183 equivalent memory usage for states (stored*(State-vector + overhead)) - 7372.383 actual memory usage for states (compression: 45.25%) - state-vector as stored = 16 byte + 36 byte overhead - 2048.000 memory used for hash table (-w28) - 457.764 memory used for DFS stack (-m10000000) - 1.367 memory lost to fragmentation - 9876.779 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 592075 4097 3828 2 2 ] -unreached in proctype urcu_reader - line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 104, "(1)" - line 249, "pan.___", state 112, "(1)" - line 253, "pan.___", state 124, "(1)" - line 257, "pan.___", state 132, "(1)" - line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 222, "(1)" - line 253, "pan.___", state 242, "(1)" - line 257, "pan.___", state 250, "(1)" - line 687, "pan.___", state 269, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 407, "pan.___", state 276, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 308, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 322, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 340, "(1)" - line 253, "pan.___", state 360, "(1)" - line 257, "pan.___", state 368, "(1)" - line 407, "pan.___", state 387, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 419, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 433, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 451, "(1)" - line 253, "pan.___", state 471, "(1)" - line 257, "pan.___", state 479, "(1)" - line 407, "pan.___", state 500, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 502, "(1)" - line 407, "pan.___", state 503, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 503, "else" - line 407, "pan.___", state 506, "(1)" - line 411, "pan.___", state 514, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 516, "(1)" - line 411, "pan.___", state 517, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 517, "else" - line 411, "pan.___", state 520, "(1)" - line 411, "pan.___", state 521, "(1)" - line 411, "pan.___", state 521, "(1)" - line 409, "pan.___", state 526, "((i<1))" - line 409, "pan.___", state 526, "((i>=1))" - line 416, "pan.___", state 532, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 534, "(1)" - line 416, "pan.___", state 535, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 535, "else" - line 416, "pan.___", state 538, "(1)" - line 416, "pan.___", state 539, "(1)" - line 416, "pan.___", state 539, "(1)" - line 420, "pan.___", state 546, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 548, "(1)" - line 420, "pan.___", state 549, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 549, "else" - line 420, "pan.___", state 552, "(1)" - line 420, "pan.___", state 553, "(1)" - line 420, "pan.___", state 553, "(1)" - line 418, "pan.___", state 558, "((i<2))" - line 418, "pan.___", state 558, "((i>=2))" - line 245, "pan.___", state 564, "(1)" - line 249, "pan.___", state 572, "(1)" - line 249, "pan.___", state 573, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 573, "else" - line 247, "pan.___", state 578, "((i<1))" - line 247, "pan.___", state 578, "((i>=1))" - line 253, "pan.___", state 584, "(1)" - line 253, "pan.___", state 585, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 585, "else" - line 257, "pan.___", state 592, "(1)" - line 257, "pan.___", state 593, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 593, "else" - line 255, "pan.___", state 598, "((i<2))" - line 255, "pan.___", state 598, "((i>=2))" - line 262, "pan.___", state 602, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 602, "else" - line 427, "pan.___", state 604, "(1)" - line 427, "pan.___", state 604, "(1)" - line 687, "pan.___", state 607, "cached_urcu_active_readers = (tmp+1)" - line 687, "pan.___", state 608, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 687, "pan.___", state 609, "(1)" - line 407, "pan.___", state 616, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 648, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 662, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 680, "(1)" - line 253, "pan.___", state 700, "(1)" - line 257, "pan.___", state 708, "(1)" - line 407, "pan.___", state 734, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 766, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 780, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 798, "(1)" - line 253, "pan.___", state 818, "(1)" - line 257, "pan.___", state 826, "(1)" - line 407, "pan.___", state 845, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 847, "(1)" - line 407, "pan.___", state 848, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 848, "else" - line 407, "pan.___", state 851, "(1)" - line 411, "pan.___", state 859, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 861, "(1)" - line 411, "pan.___", state 862, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 862, "else" - line 411, "pan.___", state 865, "(1)" - line 411, "pan.___", state 866, "(1)" - line 411, "pan.___", state 866, "(1)" - line 409, "pan.___", state 871, "((i<1))" - line 409, "pan.___", state 871, "((i>=1))" - line 416, "pan.___", state 877, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 879, "(1)" - line 416, "pan.___", state 880, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 880, "else" - line 416, "pan.___", state 883, "(1)" - line 416, "pan.___", state 884, "(1)" - line 416, "pan.___", state 884, "(1)" - line 420, "pan.___", state 891, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 893, "(1)" - line 420, "pan.___", state 894, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 894, "else" - line 420, "pan.___", state 897, "(1)" - line 420, "pan.___", state 898, "(1)" - line 420, "pan.___", state 898, "(1)" - line 418, "pan.___", state 903, "((i<2))" - line 418, "pan.___", state 903, "((i>=2))" - line 245, "pan.___", state 909, "(1)" - line 249, "pan.___", state 917, "(1)" - line 249, "pan.___", state 918, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 918, "else" - line 247, "pan.___", state 923, "((i<1))" - line 247, "pan.___", state 923, "((i>=1))" - line 253, "pan.___", state 929, "(1)" - line 253, "pan.___", state 930, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 930, "else" - line 257, "pan.___", state 937, "(1)" - line 257, "pan.___", state 938, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 938, "else" - line 255, "pan.___", state 943, "((i<2))" - line 255, "pan.___", state 943, "((i>=2))" - line 262, "pan.___", state 947, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 947, "else" - line 427, "pan.___", state 949, "(1)" - line 427, "pan.___", state 949, "(1)" - line 695, "pan.___", state 953, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 407, "pan.___", state 958, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 990, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1004, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1022, "(1)" - line 253, "pan.___", state 1042, "(1)" - line 257, "pan.___", state 1050, "(1)" - line 407, "pan.___", state 1072, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1104, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1118, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1136, "(1)" - line 253, "pan.___", state 1156, "(1)" - line 257, "pan.___", state 1164, "(1)" - line 407, "pan.___", state 1187, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1219, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1233, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1251, "(1)" - line 253, "pan.___", state 1271, "(1)" - line 257, "pan.___", state 1279, "(1)" - line 407, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1330, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1344, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1362, "(1)" - line 253, "pan.___", state 1382, "(1)" - line 257, "pan.___", state 1390, "(1)" - line 407, "pan.___", state 1414, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1446, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1460, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1478, "(1)" - line 253, "pan.___", state 1498, "(1)" - line 257, "pan.___", state 1506, "(1)" - line 407, "pan.___", state 1525, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1557, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1571, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1589, "(1)" - line 253, "pan.___", state 1609, "(1)" - line 257, "pan.___", state 1617, "(1)" - line 407, "pan.___", state 1639, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1671, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1685, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1703, "(1)" - line 253, "pan.___", state 1723, "(1)" - line 257, "pan.___", state 1731, "(1)" - line 734, "pan.___", state 1750, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 407, "pan.___", state 1757, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1789, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1803, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1821, "(1)" - line 253, "pan.___", state 1841, "(1)" - line 257, "pan.___", state 1849, "(1)" - line 407, "pan.___", state 1868, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 1900, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 1914, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1932, "(1)" - line 253, "pan.___", state 1952, "(1)" - line 257, "pan.___", state 1960, "(1)" - line 407, "pan.___", state 1981, "cache_dirty_urcu_gp_ctr = 0" - line 407, "pan.___", state 1983, "(1)" - line 407, "pan.___", state 1984, "(cache_dirty_urcu_gp_ctr)" - line 407, "pan.___", state 1984, "else" - line 407, "pan.___", state 1987, "(1)" - line 411, "pan.___", state 1995, "cache_dirty_urcu_active_readers = 0" - line 411, "pan.___", state 1997, "(1)" - line 411, "pan.___", state 1998, "(cache_dirty_urcu_active_readers)" - line 411, "pan.___", state 1998, "else" - line 411, "pan.___", state 2001, "(1)" - line 411, "pan.___", state 2002, "(1)" - line 411, "pan.___", state 2002, "(1)" - line 409, "pan.___", state 2007, "((i<1))" - line 409, "pan.___", state 2007, "((i>=1))" - line 416, "pan.___", state 2013, "cache_dirty_rcu_ptr = 0" - line 416, "pan.___", state 2015, "(1)" - line 416, "pan.___", state 2016, "(cache_dirty_rcu_ptr)" - line 416, "pan.___", state 2016, "else" - line 416, "pan.___", state 2019, "(1)" - line 416, "pan.___", state 2020, "(1)" - line 416, "pan.___", state 2020, "(1)" - line 420, "pan.___", state 2027, "cache_dirty_rcu_data[i] = 0" - line 420, "pan.___", state 2029, "(1)" - line 420, "pan.___", state 2030, "(cache_dirty_rcu_data[i])" - line 420, "pan.___", state 2030, "else" - line 420, "pan.___", state 2033, "(1)" - line 420, "pan.___", state 2034, "(1)" - line 420, "pan.___", state 2034, "(1)" - line 418, "pan.___", state 2039, "((i<2))" - line 418, "pan.___", state 2039, "((i>=2))" - line 245, "pan.___", state 2045, "(1)" - line 249, "pan.___", state 2053, "(1)" - line 249, "pan.___", state 2054, "(!(cache_dirty_urcu_active_readers))" - line 249, "pan.___", state 2054, "else" - line 247, "pan.___", state 2059, "((i<1))" - line 247, "pan.___", state 2059, "((i>=1))" - line 253, "pan.___", state 2065, "(1)" - line 253, "pan.___", state 2066, "(!(cache_dirty_rcu_ptr))" - line 253, "pan.___", state 2066, "else" - line 257, "pan.___", state 2073, "(1)" - line 257, "pan.___", state 2074, "(!(cache_dirty_rcu_data[i]))" - line 257, "pan.___", state 2074, "else" - line 255, "pan.___", state 2079, "((i<2))" - line 255, "pan.___", state 2079, "((i>=2))" - line 262, "pan.___", state 2083, "(!(cache_dirty_urcu_gp_ctr))" - line 262, "pan.___", state 2083, "else" - line 427, "pan.___", state 2085, "(1)" - line 427, "pan.___", state 2085, "(1)" - line 734, "pan.___", state 2088, "cached_urcu_active_readers = (tmp+1)" - line 734, "pan.___", state 2089, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 734, "pan.___", state 2090, "(1)" - line 407, "pan.___", state 2097, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2129, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2143, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 2161, "(1)" - line 253, "pan.___", state 2181, "(1)" - line 257, "pan.___", state 2189, "(1)" - line 407, "pan.___", state 2214, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2246, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2260, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 2278, "(1)" - line 253, "pan.___", state 2298, "(1)" - line 257, "pan.___", state 2306, "(1)" - line 407, "pan.___", state 2325, "cache_dirty_urcu_gp_ctr = 0" - line 416, "pan.___", state 2357, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 2371, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 2389, "(1)" - line 253, "pan.___", state 2409, "(1)" - line 257, "pan.___", state 2417, "(1)" - line 245, "pan.___", state 2448, "(1)" - line 253, "pan.___", state 2468, "(1)" - line 257, "pan.___", state 2476, "(1)" - line 245, "pan.___", state 2491, "(1)" - line 253, "pan.___", state 2511, "(1)" - line 257, "pan.___", state 2519, "(1)" - line 929, "pan.___", state 2536, "-end-" - (221 of 2536 states) -unreached in proctype urcu_writer - line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 245, "pan.___", state 109, "(1)" - line 249, "pan.___", state 117, "(1)" - line 253, "pan.___", state 129, "(1)" - line 268, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 167, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 180, "cache_dirty_rcu_ptr = 0" - line 407, "pan.___", state 220, "cache_dirty_urcu_gp_ctr = 0" - line 411, "pan.___", state 234, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 252, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 266, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 284, "(1)" - line 249, "pan.___", state 292, "(1)" - line 253, "pan.___", state 304, "(1)" - line 257, "pan.___", state 312, "(1)" - line 411, "pan.___", state 347, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 365, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 379, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 405, "(1)" - line 253, "pan.___", state 417, "(1)" - line 257, "pan.___", state 425, "(1)" - line 411, "pan.___", state 468, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 486, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 500, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 526, "(1)" - line 253, "pan.___", state 538, "(1)" - line 257, "pan.___", state 546, "(1)" - line 411, "pan.___", state 579, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 597, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 611, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 637, "(1)" - line 253, "pan.___", state 649, "(1)" - line 257, "pan.___", state 657, "(1)" - line 411, "pan.___", state 692, "cache_dirty_urcu_active_readers = 0" - line 416, "pan.___", state 710, "cache_dirty_rcu_ptr = 0" - line 420, "pan.___", state 724, "cache_dirty_rcu_data[i] = 0" - line 249, "pan.___", state 750, "(1)" - line 253, "pan.___", state 762, "(1)" - line 257, "pan.___", state 770, "(1)" - line 268, "pan.___", state 823, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 832, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 847, "(1)" - line 280, "pan.___", state 854, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 870, "(1)" - line 249, "pan.___", state 878, "(1)" - line 253, "pan.___", state 890, "(1)" - line 257, "pan.___", state 898, "(1)" - line 268, "pan.___", state 929, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 938, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 951, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 960, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 976, "(1)" - line 249, "pan.___", state 984, "(1)" - line 253, "pan.___", state 996, "(1)" - line 257, "pan.___", state 1004, "(1)" - line 272, "pan.___", state 1030, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1043, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1052, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1068, "(1)" - line 249, "pan.___", state 1076, "(1)" - line 253, "pan.___", state 1088, "(1)" - line 257, "pan.___", state 1096, "(1)" - line 268, "pan.___", state 1127, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1136, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1149, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1158, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1174, "(1)" - line 249, "pan.___", state 1182, "(1)" - line 253, "pan.___", state 1194, "(1)" - line 257, "pan.___", state 1202, "(1)" - line 272, "pan.___", state 1228, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1241, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1250, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1266, "(1)" - line 249, "pan.___", state 1274, "(1)" - line 253, "pan.___", state 1286, "(1)" - line 257, "pan.___", state 1294, "(1)" - line 268, "pan.___", state 1325, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1334, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1347, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1356, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1372, "(1)" - line 249, "pan.___", state 1380, "(1)" - line 253, "pan.___", state 1392, "(1)" - line 257, "pan.___", state 1400, "(1)" - line 272, "pan.___", state 1426, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1439, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1448, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1464, "(1)" - line 249, "pan.___", state 1472, "(1)" - line 253, "pan.___", state 1484, "(1)" - line 257, "pan.___", state 1492, "(1)" - line 268, "pan.___", state 1523, "cache_dirty_urcu_gp_ctr = 0" - line 272, "pan.___", state 1532, "cache_dirty_urcu_active_readers = 0" - line 276, "pan.___", state 1545, "cache_dirty_rcu_ptr = 0" - line 280, "pan.___", state 1554, "cache_dirty_rcu_data[i] = 0" - line 245, "pan.___", state 1570, "(1)" - line 249, "pan.___", state 1578, "(1)" - line 253, "pan.___", state 1590, "(1)" - line 257, "pan.___", state 1598, "(1)" - line 1304, "pan.___", state 1614, "-end-" - (103 of 1614 states) -unreached in proctype :init: - (0 of 28 states) -unreached in proctype :never: - line 1369, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 1.54e+04 seconds -pan: rate 15645.145 states/second -pan: avg transition delay 3.1947e-06 usec -cp .input.spin urcu_progress_writer.spin.input -cp .input.spin.trail urcu_progress_writer.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.spin.input b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.spin.input deleted file mode 100644 index b353239..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.spin.input +++ /dev/null @@ -1,1340 +0,0 @@ -#define WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.log b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.log deleted file mode 100644 index 52db020..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.log +++ /dev/null @@ -1,465 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1363) -depth 7: Claim reached state 9 (line 1368) -depth 50: Claim reached state 9 (line 1367) -Depth= 7070 States= 1e+06 Transitions= 1.16e+07 Memory= 492.912 t= 33.7 R= 3e+04 -Depth= 7070 States= 2e+06 Transitions= 2.31e+07 Memory= 521.233 t= 68 R= 3e+04 -Depth= 7070 States= 3e+06 Transitions= 3.43e+07 Memory= 549.358 t= 102 R= 3e+04 -pan: resizing hashtable to -w22.. done -pan: acceptance cycle (at depth 1558) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - + Compression - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 80 byte, depth reached 7070, errors: 1 - 1856640 states, stored (3.13554e+06 visited) - 32657997 states, matched - 35793542 transitions (= visited+matched) -5.1088012e+08 atomic steps -hash conflicts: 10885217 (resolved) - -Stats on memory usage (in Megabytes): - 205.393 equivalent memory usage for states (stored*(State-vector + overhead)) - 93.456 actual memory usage for states (compression: 45.50%) - state-vector as stored = 17 byte + 36 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 583.115 total actual memory usage - -nr of templates: [ globals chans procs ] -collapse counts: [ 12368 744 254 2 2 ] -unreached in proctype urcu_reader - line 269, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" - line 277, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 104, "(1)" - line 250, "pan.___", state 112, "(1)" - line 254, "pan.___", state 124, "(1)" - line 258, "pan.___", state 132, "(1)" - line 408, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 222, "(1)" - line 254, "pan.___", state 242, "(1)" - line 258, "pan.___", state 250, "(1)" - line 688, "pan.___", state 269, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 408, "pan.___", state 276, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 308, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 322, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 340, "(1)" - line 254, "pan.___", state 360, "(1)" - line 258, "pan.___", state 368, "(1)" - line 408, "pan.___", state 387, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 419, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 433, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 451, "(1)" - line 254, "pan.___", state 471, "(1)" - line 258, "pan.___", state 479, "(1)" - line 408, "pan.___", state 500, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 502, "(1)" - line 408, "pan.___", state 503, "(cache_dirty_urcu_gp_ctr)" - line 408, "pan.___", state 503, "else" - line 408, "pan.___", state 506, "(1)" - line 412, "pan.___", state 514, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 516, "(1)" - line 412, "pan.___", state 517, "(cache_dirty_urcu_active_readers)" - line 412, "pan.___", state 517, "else" - line 412, "pan.___", state 520, "(1)" - line 412, "pan.___", state 521, "(1)" - line 412, "pan.___", state 521, "(1)" - line 410, "pan.___", state 526, "((i<1))" - line 410, "pan.___", state 526, "((i>=1))" - line 417, "pan.___", state 532, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 534, "(1)" - line 417, "pan.___", state 535, "(cache_dirty_rcu_ptr)" - line 417, "pan.___", state 535, "else" - line 417, "pan.___", state 538, "(1)" - line 417, "pan.___", state 539, "(1)" - line 417, "pan.___", state 539, "(1)" - line 421, "pan.___", state 546, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 548, "(1)" - line 421, "pan.___", state 549, "(cache_dirty_rcu_data[i])" - line 421, "pan.___", state 549, "else" - line 421, "pan.___", state 552, "(1)" - line 421, "pan.___", state 553, "(1)" - line 421, "pan.___", state 553, "(1)" - line 419, "pan.___", state 558, "((i<2))" - line 419, "pan.___", state 558, "((i>=2))" - line 246, "pan.___", state 564, "(1)" - line 250, "pan.___", state 572, "(1)" - line 250, "pan.___", state 573, "(!(cache_dirty_urcu_active_readers))" - line 250, "pan.___", state 573, "else" - line 248, "pan.___", state 578, "((i<1))" - line 248, "pan.___", state 578, "((i>=1))" - line 254, "pan.___", state 584, "(1)" - line 254, "pan.___", state 585, "(!(cache_dirty_rcu_ptr))" - line 254, "pan.___", state 585, "else" - line 258, "pan.___", state 592, "(1)" - line 258, "pan.___", state 593, "(!(cache_dirty_rcu_data[i]))" - line 258, "pan.___", state 593, "else" - line 256, "pan.___", state 598, "((i<2))" - line 256, "pan.___", state 598, "((i>=2))" - line 263, "pan.___", state 602, "(!(cache_dirty_urcu_gp_ctr))" - line 263, "pan.___", state 602, "else" - line 428, "pan.___", state 604, "(1)" - line 428, "pan.___", state 604, "(1)" - line 688, "pan.___", state 607, "cached_urcu_active_readers = (tmp+1)" - line 688, "pan.___", state 608, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 688, "pan.___", state 609, "(1)" - line 408, "pan.___", state 616, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 648, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 662, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 680, "(1)" - line 254, "pan.___", state 700, "(1)" - line 258, "pan.___", state 708, "(1)" - line 408, "pan.___", state 734, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 766, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 780, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 798, "(1)" - line 254, "pan.___", state 818, "(1)" - line 258, "pan.___", state 826, "(1)" - line 408, "pan.___", state 845, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 847, "(1)" - line 408, "pan.___", state 848, "(cache_dirty_urcu_gp_ctr)" - line 408, "pan.___", state 848, "else" - line 408, "pan.___", state 851, "(1)" - line 412, "pan.___", state 859, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 861, "(1)" - line 412, "pan.___", state 862, "(cache_dirty_urcu_active_readers)" - line 412, "pan.___", state 862, "else" - line 412, "pan.___", state 865, "(1)" - line 412, "pan.___", state 866, "(1)" - line 412, "pan.___", state 866, "(1)" - line 410, "pan.___", state 871, "((i<1))" - line 410, "pan.___", state 871, "((i>=1))" - line 417, "pan.___", state 877, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 879, "(1)" - line 417, "pan.___", state 880, "(cache_dirty_rcu_ptr)" - line 417, "pan.___", state 880, "else" - line 417, "pan.___", state 883, "(1)" - line 417, "pan.___", state 884, "(1)" - line 417, "pan.___", state 884, "(1)" - line 421, "pan.___", state 891, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 893, "(1)" - line 421, "pan.___", state 894, "(cache_dirty_rcu_data[i])" - line 421, "pan.___", state 894, "else" - line 421, "pan.___", state 897, "(1)" - line 421, "pan.___", state 898, "(1)" - line 421, "pan.___", state 898, "(1)" - line 419, "pan.___", state 903, "((i<2))" - line 419, "pan.___", state 903, "((i>=2))" - line 246, "pan.___", state 909, "(1)" - line 250, "pan.___", state 917, "(1)" - line 250, "pan.___", state 918, "(!(cache_dirty_urcu_active_readers))" - line 250, "pan.___", state 918, "else" - line 248, "pan.___", state 923, "((i<1))" - line 248, "pan.___", state 923, "((i>=1))" - line 254, "pan.___", state 929, "(1)" - line 254, "pan.___", state 930, "(!(cache_dirty_rcu_ptr))" - line 254, "pan.___", state 930, "else" - line 258, "pan.___", state 937, "(1)" - line 258, "pan.___", state 938, "(!(cache_dirty_rcu_data[i]))" - line 258, "pan.___", state 938, "else" - line 256, "pan.___", state 943, "((i<2))" - line 256, "pan.___", state 943, "((i>=2))" - line 263, "pan.___", state 947, "(!(cache_dirty_urcu_gp_ctr))" - line 263, "pan.___", state 947, "else" - line 428, "pan.___", state 949, "(1)" - line 428, "pan.___", state 949, "(1)" - line 696, "pan.___", state 953, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 408, "pan.___", state 958, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 990, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1004, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1022, "(1)" - line 254, "pan.___", state 1042, "(1)" - line 258, "pan.___", state 1050, "(1)" - line 408, "pan.___", state 1072, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1104, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1118, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1136, "(1)" - line 254, "pan.___", state 1156, "(1)" - line 258, "pan.___", state 1164, "(1)" - line 408, "pan.___", state 1187, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1219, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1233, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1251, "(1)" - line 254, "pan.___", state 1271, "(1)" - line 258, "pan.___", state 1279, "(1)" - line 408, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1330, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1344, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1362, "(1)" - line 254, "pan.___", state 1382, "(1)" - line 258, "pan.___", state 1390, "(1)" - line 408, "pan.___", state 1414, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1446, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1460, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1478, "(1)" - line 254, "pan.___", state 1498, "(1)" - line 258, "pan.___", state 1506, "(1)" - line 408, "pan.___", state 1525, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1557, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1571, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1589, "(1)" - line 254, "pan.___", state 1609, "(1)" - line 258, "pan.___", state 1617, "(1)" - line 408, "pan.___", state 1639, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1671, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1685, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1703, "(1)" - line 254, "pan.___", state 1723, "(1)" - line 258, "pan.___", state 1731, "(1)" - line 735, "pan.___", state 1750, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 408, "pan.___", state 1757, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1789, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1803, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1821, "(1)" - line 254, "pan.___", state 1841, "(1)" - line 258, "pan.___", state 1849, "(1)" - line 408, "pan.___", state 1868, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 1900, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 1914, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1932, "(1)" - line 254, "pan.___", state 1952, "(1)" - line 258, "pan.___", state 1960, "(1)" - line 408, "pan.___", state 1981, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 1983, "(1)" - line 408, "pan.___", state 1984, "(cache_dirty_urcu_gp_ctr)" - line 408, "pan.___", state 1984, "else" - line 408, "pan.___", state 1987, "(1)" - line 412, "pan.___", state 1995, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 1997, "(1)" - line 412, "pan.___", state 1998, "(cache_dirty_urcu_active_readers)" - line 412, "pan.___", state 1998, "else" - line 412, "pan.___", state 2001, "(1)" - line 412, "pan.___", state 2002, "(1)" - line 412, "pan.___", state 2002, "(1)" - line 410, "pan.___", state 2007, "((i<1))" - line 410, "pan.___", state 2007, "((i>=1))" - line 417, "pan.___", state 2013, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 2015, "(1)" - line 417, "pan.___", state 2016, "(cache_dirty_rcu_ptr)" - line 417, "pan.___", state 2016, "else" - line 417, "pan.___", state 2019, "(1)" - line 417, "pan.___", state 2020, "(1)" - line 417, "pan.___", state 2020, "(1)" - line 421, "pan.___", state 2027, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 2029, "(1)" - line 421, "pan.___", state 2030, "(cache_dirty_rcu_data[i])" - line 421, "pan.___", state 2030, "else" - line 421, "pan.___", state 2033, "(1)" - line 421, "pan.___", state 2034, "(1)" - line 421, "pan.___", state 2034, "(1)" - line 419, "pan.___", state 2039, "((i<2))" - line 419, "pan.___", state 2039, "((i>=2))" - line 246, "pan.___", state 2045, "(1)" - line 250, "pan.___", state 2053, "(1)" - line 250, "pan.___", state 2054, "(!(cache_dirty_urcu_active_readers))" - line 250, "pan.___", state 2054, "else" - line 248, "pan.___", state 2059, "((i<1))" - line 248, "pan.___", state 2059, "((i>=1))" - line 254, "pan.___", state 2065, "(1)" - line 254, "pan.___", state 2066, "(!(cache_dirty_rcu_ptr))" - line 254, "pan.___", state 2066, "else" - line 258, "pan.___", state 2073, "(1)" - line 258, "pan.___", state 2074, "(!(cache_dirty_rcu_data[i]))" - line 258, "pan.___", state 2074, "else" - line 256, "pan.___", state 2079, "((i<2))" - line 256, "pan.___", state 2079, "((i>=2))" - line 263, "pan.___", state 2083, "(!(cache_dirty_urcu_gp_ctr))" - line 263, "pan.___", state 2083, "else" - line 428, "pan.___", state 2085, "(1)" - line 428, "pan.___", state 2085, "(1)" - line 735, "pan.___", state 2088, "cached_urcu_active_readers = (tmp+1)" - line 735, "pan.___", state 2089, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 735, "pan.___", state 2090, "(1)" - line 408, "pan.___", state 2097, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 2129, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 2143, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 2161, "(1)" - line 254, "pan.___", state 2181, "(1)" - line 258, "pan.___", state 2189, "(1)" - line 408, "pan.___", state 2214, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 2246, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 2260, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 2278, "(1)" - line 254, "pan.___", state 2298, "(1)" - line 258, "pan.___", state 2306, "(1)" - line 408, "pan.___", state 2325, "cache_dirty_urcu_gp_ctr = 0" - line 417, "pan.___", state 2357, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 2371, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 2389, "(1)" - line 254, "pan.___", state 2409, "(1)" - line 258, "pan.___", state 2417, "(1)" - line 246, "pan.___", state 2448, "(1)" - line 254, "pan.___", state 2468, "(1)" - line 258, "pan.___", state 2476, "(1)" - line 246, "pan.___", state 2491, "(1)" - line 254, "pan.___", state 2511, "(1)" - line 258, "pan.___", state 2519, "(1)" - line 930, "pan.___", state 2536, "-end-" - (221 of 2536 states) -unreached in proctype urcu_writer - line 408, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" - line 417, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" - line 246, "pan.___", state 109, "(1)" - line 250, "pan.___", state 117, "(1)" - line 254, "pan.___", state 129, "(1)" - line 269, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 167, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 180, "cache_dirty_rcu_ptr = 0" - line 408, "pan.___", state 220, "cache_dirty_urcu_gp_ctr = 0" - line 412, "pan.___", state 234, "cache_dirty_urcu_active_readers = 0" - line 417, "pan.___", state 252, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 266, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 284, "(1)" - line 250, "pan.___", state 292, "(1)" - line 254, "pan.___", state 304, "(1)" - line 258, "pan.___", state 312, "(1)" - line 412, "pan.___", state 347, "cache_dirty_urcu_active_readers = 0" - line 417, "pan.___", state 365, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 379, "cache_dirty_rcu_data[i] = 0" - line 250, "pan.___", state 405, "(1)" - line 254, "pan.___", state 417, "(1)" - line 258, "pan.___", state 425, "(1)" - line 408, "pan.___", state 450, "cache_dirty_urcu_gp_ctr = 0" - line 408, "pan.___", state 452, "(1)" - line 408, "pan.___", state 453, "(cache_dirty_urcu_gp_ctr)" - line 408, "pan.___", state 453, "else" - line 408, "pan.___", state 456, "(1)" - line 412, "pan.___", state 464, "cache_dirty_urcu_active_readers = 0" - line 412, "pan.___", state 466, "(1)" - line 412, "pan.___", state 467, "(cache_dirty_urcu_active_readers)" - line 412, "pan.___", state 467, "else" - line 412, "pan.___", state 470, "(1)" - line 412, "pan.___", state 471, "(1)" - line 412, "pan.___", state 471, "(1)" - line 410, "pan.___", state 476, "((i<1))" - line 410, "pan.___", state 476, "((i>=1))" - line 417, "pan.___", state 482, "cache_dirty_rcu_ptr = 0" - line 417, "pan.___", state 484, "(1)" - line 417, "pan.___", state 485, "(cache_dirty_rcu_ptr)" - line 417, "pan.___", state 485, "else" - line 417, "pan.___", state 488, "(1)" - line 417, "pan.___", state 489, "(1)" - line 417, "pan.___", state 489, "(1)" - line 421, "pan.___", state 496, "cache_dirty_rcu_data[i] = 0" - line 421, "pan.___", state 498, "(1)" - line 421, "pan.___", state 499, "(cache_dirty_rcu_data[i])" - line 421, "pan.___", state 499, "else" - line 421, "pan.___", state 502, "(1)" - line 421, "pan.___", state 503, "(1)" - line 421, "pan.___", state 503, "(1)" - line 419, "pan.___", state 508, "((i<2))" - line 419, "pan.___", state 508, "((i>=2))" - line 246, "pan.___", state 514, "(1)" - line 250, "pan.___", state 522, "(1)" - line 250, "pan.___", state 523, "(!(cache_dirty_urcu_active_readers))" - line 250, "pan.___", state 523, "else" - line 248, "pan.___", state 528, "((i<1))" - line 248, "pan.___", state 528, "((i>=1))" - line 254, "pan.___", state 534, "(1)" - line 254, "pan.___", state 535, "(!(cache_dirty_rcu_ptr))" - line 254, "pan.___", state 535, "else" - line 258, "pan.___", state 542, "(1)" - line 258, "pan.___", state 543, "(!(cache_dirty_rcu_data[i]))" - line 258, "pan.___", state 543, "else" - line 263, "pan.___", state 552, "(!(cache_dirty_urcu_gp_ctr))" - line 263, "pan.___", state 552, "else" - line 428, "pan.___", state 554, "(1)" - line 428, "pan.___", state 554, "(1)" - line 412, "pan.___", state 574, "cache_dirty_urcu_active_readers = 0" - line 417, "pan.___", state 592, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 606, "cache_dirty_rcu_data[i] = 0" - line 250, "pan.___", state 632, "(1)" - line 254, "pan.___", state 644, "(1)" - line 258, "pan.___", state 652, "(1)" - line 412, "pan.___", state 685, "cache_dirty_urcu_active_readers = 0" - line 417, "pan.___", state 703, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 717, "cache_dirty_rcu_data[i] = 0" - line 250, "pan.___", state 743, "(1)" - line 254, "pan.___", state 755, "(1)" - line 258, "pan.___", state 763, "(1)" - line 412, "pan.___", state 798, "cache_dirty_urcu_active_readers = 0" - line 417, "pan.___", state 816, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 830, "cache_dirty_rcu_data[i] = 0" - line 250, "pan.___", state 856, "(1)" - line 254, "pan.___", state 868, "(1)" - line 258, "pan.___", state 876, "(1)" - line 412, "pan.___", state 914, "cache_dirty_urcu_active_readers = 0" - line 417, "pan.___", state 932, "cache_dirty_rcu_ptr = 0" - line 421, "pan.___", state 946, "cache_dirty_rcu_data[i] = 0" - line 250, "pan.___", state 972, "(1)" - line 254, "pan.___", state 984, "(1)" - line 258, "pan.___", state 992, "(1)" - line 269, "pan.___", state 1036, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 1045, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1060, "(1)" - line 281, "pan.___", state 1067, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1083, "(1)" - line 250, "pan.___", state 1091, "(1)" - line 254, "pan.___", state 1103, "(1)" - line 258, "pan.___", state 1111, "(1)" - line 269, "pan.___", state 1142, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 1151, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1164, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 1173, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1189, "(1)" - line 250, "pan.___", state 1197, "(1)" - line 254, "pan.___", state 1209, "(1)" - line 258, "pan.___", state 1217, "(1)" - line 273, "pan.___", state 1243, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1256, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 1265, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1281, "(1)" - line 250, "pan.___", state 1289, "(1)" - line 254, "pan.___", state 1301, "(1)" - line 258, "pan.___", state 1309, "(1)" - line 269, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr = 0" - line 273, "pan.___", state 1349, "cache_dirty_urcu_active_readers = 0" - line 277, "pan.___", state 1362, "cache_dirty_rcu_ptr = 0" - line 281, "pan.___", state 1371, "cache_dirty_rcu_data[i] = 0" - line 246, "pan.___", state 1387, "(1)" - line 250, "pan.___", state 1395, "(1)" - line 254, "pan.___", state 1407, "(1)" - line 258, "pan.___", state 1415, "(1)" - line 1305, "pan.___", state 1431, "-end-" - (110 of 1431 states) -unreached in proctype :init: - (0 of 28 states) -unreached in proctype :never: - line 1370, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 106 seconds -pan: rate 29466.638 states/second -pan: avg transition delay 2.9729e-06 usec -cp .input.spin urcu_progress_writer_error.spin.input -cp .input.spin.trail urcu_progress_writer_error.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input deleted file mode 100644 index 6cccb27..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,1341 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index e9b06b3..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,1699 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3997 -2:2:2536 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deleted file mode 100644 index 10c14d2..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/.input.spin +++ /dev/null @@ -1,1273 +0,0 @@ -#define WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi/DEFINES b/formal-model/urcu-controldataflow-intel-ipi/DEFINES deleted file mode 100644 index abea5ff..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/DEFINES +++ /dev/null @@ -1,18 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow-intel-ipi/Makefile b/formal-model/urcu-controldataflow-intel-ipi/Makefile deleted file mode 100644 index de47dff..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/Makefile +++ /dev/null @@ -1,170 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow-intel-ipi/references.txt b/formal-model/urcu-controldataflow-intel-ipi/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu.sh b/formal-model/urcu-controldataflow-intel-ipi/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu.spin b/formal-model/urcu-controldataflow-intel-ipi/urcu.spin deleted file mode 100644 index 54752a1..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu.spin +++ /dev/null @@ -1,1254 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free.log b/formal-model/urcu-controldataflow-intel-ipi/urcu_free.log deleted file mode 100644 index afb21ca..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free.log +++ /dev/null @@ -1,503 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1294) -Depth= 9223 States= 1e+06 Transitions= 6.87e+06 Memory= 550.432 t= 16.6 R= 6e+04 -Depth= 9223 States= 2e+06 Transitions= 1.47e+07 Memory= 634.318 t= 36.7 R= 5e+04 -Depth= 9223 States= 3e+06 Transitions= 2.46e+07 Memory= 718.303 t= 62.6 R= 5e+04 -pan: resizing hashtable to -w22.. done -Depth= 9223 States= 4e+06 Transitions= 3.19e+07 Memory= 833.311 t= 81.2 R= 5e+04 -Depth= 9223 States= 5e+06 Transitions= 3.95e+07 Memory= 917.295 t= 100 R= 5e+04 -Depth= 9223 States= 6e+06 Transitions= 5.71e+07 Memory= 1001.279 t= 149 R= 4e+04 -Depth= 9223 States= 7e+06 Transitions= 6.81e+07 Memory= 1085.264 t= 178 R= 4e+04 -Depth= 9223 States= 8e+06 Transitions= 8.22e+07 Memory= 1169.151 t= 216 R= 4e+04 -Depth= 9223 States= 9e+06 Transitions= 9.54e+07 Memory= 1253.135 t= 252 R= 4e+04 -pan: resizing hashtable to -w24.. done -Depth= 9223 States= 1e+07 Transitions= 1.08e+08 Memory= 1461.115 t= 288 R= 3e+04 -Depth= 9223 States= 1.1e+07 Transitions= 1.21e+08 Memory= 1545.100 t= 321 R= 3e+04 -Depth= 9223 States= 1.2e+07 Transitions= 1.3e+08 Memory= 1629.084 t= 345 R= 3e+04 -Depth= 9223 States= 1.3e+07 Transitions= 1.42e+08 Memory= 1713.068 t= 378 R= 3e+04 -Depth= 9223 States= 1.4e+07 Transitions= 1.72e+08 Memory= 1797.053 t= 463 R= 3e+04 -Depth= 9223 States= 1.5e+07 Transitions= 1.91e+08 Memory= 1881.037 t= 516 R= 3e+04 -Depth= 9223 States= 1.6e+07 Transitions= 2.08e+08 Memory= 1964.924 t= 562 R= 3e+04 -Depth= 9223 States= 1.7e+07 Transitions= 2.2e+08 Memory= 2048.908 t= 595 R= 3e+04 -Depth= 9223 States= 1.8e+07 Transitions= 2.39e+08 Memory= 2132.893 t= 647 R= 3e+04 -Depth= 9223 States= 1.9e+07 Transitions= 2.55e+08 Memory= 2216.877 t= 691 R= 3e+04 -Depth= 9223 States= 2e+07 Transitions= 2.72e+08 Memory= 2300.861 t= 739 R= 3e+04 -Depth= 9285 States= 2.1e+07 Transitions= 2.85e+08 Memory= 2384.846 t= 774 R= 3e+04 -Depth= 9324 States= 2.2e+07 Transitions= 2.99e+08 Memory= 2468.830 t= 812 R= 3e+04 -Depth= 9324 States= 2.3e+07 Transitions= 3.1e+08 Memory= 2552.717 t= 842 R= 3e+04 -Depth= 9324 States= 2.4e+07 Transitions= 3.21e+08 Memory= 2636.701 t= 873 R= 3e+04 -Depth= 9324 States= 2.5e+07 Transitions= 3.34e+08 Memory= 2720.686 t= 908 R= 3e+04 -Depth= 9324 States= 2.6e+07 Transitions= 3.45e+08 Memory= 2804.670 t= 939 R= 3e+04 -Depth= 9324 States= 2.7e+07 Transitions= 3.59e+08 Memory= 2888.654 t= 975 R= 3e+04 -Depth= 9324 States= 2.8e+07 Transitions= 3.71e+08 Memory= 2972.639 t= 1.01e+03 R= 3e+04 -Depth= 9324 States= 2.9e+07 Transitions= 3.84e+08 Memory= 3056.526 t= 1.04e+03 R= 3e+04 -Depth= 9324 States= 3e+07 Transitions= 3.96e+08 Memory= 3140.510 t= 1.08e+03 R= 3e+04 -Depth= 9324 States= 3.1e+07 Transitions= 4.09e+08 Memory= 3224.494 t= 1.11e+03 R= 3e+04 -Depth= 9324 States= 3.2e+07 Transitions= 4.19e+08 Memory= 3308.479 t= 1.14e+03 R= 3e+04 -Depth= 9324 States= 3.3e+07 Transitions= 4.3e+08 Memory= 3392.463 t= 1.17e+03 R= 3e+04 -Depth= 9324 States= 3.4e+07 Transitions= 4.44e+08 Memory= 3476.447 t= 1.21e+03 R= 3e+04 -pan: resizing hashtable to -w26.. done -Depth= 9324 States= 3.5e+07 Transitions= 4.6e+08 Memory= 4056.416 t= 1.26e+03 R= 3e+04 -Depth= 9324 States= 3.6e+07 Transitions= 4.73e+08 Memory= 4140.401 t= 1.3e+03 R= 3e+04 -Depth= 9324 States= 3.7e+07 Transitions= 4.89e+08 Memory= 4224.385 t= 1.34e+03 R= 3e+04 -Depth= 9324 States= 3.8e+07 Transitions= 5.04e+08 Memory= 4308.369 t= 1.38e+03 R= 3e+04 -Depth= 9324 States= 3.9e+07 Transitions= 5.18e+08 Memory= 4392.354 t= 1.42e+03 R= 3e+04 -Depth= 9324 States= 4e+07 Transitions= 5.28e+08 Memory= 4476.338 t= 1.44e+03 R= 3e+04 -Depth= 9324 States= 4.1e+07 Transitions= 5.38e+08 Memory= 4560.225 t= 1.47e+03 R= 3e+04 -Depth= 9324 States= 4.2e+07 Transitions= 5.5e+08 Memory= 4644.209 t= 1.5e+03 R= 3e+04 -Depth= 9324 States= 4.3e+07 Transitions= 5.76e+08 Memory= 4728.193 t= 1.58e+03 R= 3e+04 -Depth= 9324 States= 4.4e+07 Transitions= 6.01e+08 Memory= 4812.178 t= 1.65e+03 R= 3e+04 -Depth= 9324 States= 4.5e+07 Transitions= 6.18e+08 Memory= 4896.162 t= 1.69e+03 R= 3e+04 -Depth= 9324 States= 4.6e+07 Transitions= 6.29e+08 Memory= 4980.147 t= 1.72e+03 R= 3e+04 -Depth= 9324 States= 4.7e+07 Transitions= 6.44e+08 Memory= 5064.131 t= 1.76e+03 R= 3e+04 -Depth= 9324 States= 4.8e+07 Transitions= 6.63e+08 Memory= 5148.018 t= 1.82e+03 R= 3e+04 -Depth= 9324 States= 4.9e+07 Transitions= 6.8e+08 Memory= 5232.002 t= 1.86e+03 R= 3e+04 -Depth= 9324 States= 5e+07 Transitions= 6.94e+08 Memory= 5315.986 t= 1.9e+03 R= 3e+04 -Depth= 9324 States= 5.1e+07 Transitions= 7.07e+08 Memory= 5399.971 t= 1.94e+03 R= 3e+04 -Depth= 9324 States= 5.2e+07 Transitions= 7.19e+08 Memory= 5483.955 t= 1.97e+03 R= 3e+04 -Depth= 9324 States= 5.3e+07 Transitions= 7.33e+08 Memory= 5567.940 t= 2.01e+03 R= 3e+04 -Depth= 9324 States= 5.4e+07 Transitions= 7.43e+08 Memory= 5651.826 t= 2.03e+03 R= 3e+04 -Depth= 9324 States= 5.5e+07 Transitions= 7.56e+08 Memory= 5735.811 t= 2.07e+03 R= 3e+04 -Depth= 9324 States= 5.6e+07 Transitions= 7.67e+08 Memory= 5819.795 t= 2.1e+03 R= 3e+04 -Depth= 9324 States= 5.7e+07 Transitions= 7.82e+08 Memory= 5903.779 t= 2.14e+03 R= 3e+04 -Depth= 9324 States= 5.8e+07 Transitions= 7.92e+08 Memory= 5987.764 t= 2.17e+03 R= 3e+04 -Depth= 9324 States= 5.9e+07 Transitions= 8.05e+08 Memory= 6071.748 t= 2.2e+03 R= 3e+04 -Depth= 9324 States= 6e+07 Transitions= 8.17e+08 Memory= 6155.733 t= 2.23e+03 R= 3e+04 -Depth= 9324 States= 6.1e+07 Transitions= 8.27e+08 Memory= 6239.619 t= 2.26e+03 R= 3e+04 -Depth= 9324 States= 6.2e+07 Transitions= 8.39e+08 Memory= 6323.604 t= 2.29e+03 R= 3e+04 -Depth= 9324 States= 6.3e+07 Transitions= 8.57e+08 Memory= 6407.588 t= 2.34e+03 R= 3e+04 -Depth= 9324 States= 6.4e+07 Transitions= 8.68e+08 Memory= 6491.572 t= 2.37e+03 R= 3e+04 -Depth= 9324 States= 6.5e+07 Transitions= 8.83e+08 Memory= 6575.557 t= 2.41e+03 R= 3e+04 -Depth= 9324 States= 6.6e+07 Transitions= 8.98e+08 Memory= 6659.541 t= 2.45e+03 R= 3e+04 -Depth= 9324 States= 6.7e+07 Transitions= 9.13e+08 Memory= 6743.428 t= 2.49e+03 R= 3e+04 -Depth= 9324 States= 6.8e+07 Transitions= 9.28e+08 Memory= 6827.412 t= 2.53e+03 R= 3e+04 -Depth= 9324 States= 6.9e+07 Transitions= 9.42e+08 Memory= 6911.397 t= 2.57e+03 R= 3e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 9324, errors: 0 - 69786664 states, stored -8.8218731e+08 states, matched -9.5197398e+08 transitions (= stored+matched) -1.4613809e+10 atomic steps -hash conflicts: 5.3037519e+08 (resolved) - -Stats on memory usage (in Megabytes): - 7720.235 equivalent memory usage for states (stored*(State-vector + overhead)) - 6011.129 actual memory usage for states (compression: 77.86%) - state-vector as stored = 62 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 3.383 memory lost to fragmentation - 6977.510 total actual memory usage - -unreached in proctype urcu_reader - line 271, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 77, "(1)" - line 252, "pan.___", state 85, "(1)" - line 256, "pan.___", state 97, "(1)" - line 260, "pan.___", state 105, "(1)" - line 410, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 195, "(1)" - line 256, "pan.___", state 215, "(1)" - line 260, "pan.___", state 223, "(1)" - line 690, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 410, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 313, "(1)" - line 256, "pan.___", state 333, "(1)" - line 260, "pan.___", state 341, "(1)" - line 410, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 424, "(1)" - line 256, "pan.___", state 444, "(1)" - line 260, "pan.___", state 452, "(1)" - line 410, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 475, "(1)" - line 410, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 476, "else" - line 410, "pan.___", state 479, "(1)" - line 414, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 489, "(1)" - line 414, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 490, "else" - line 414, "pan.___", state 493, "(1)" - line 414, "pan.___", state 494, "(1)" - line 414, "pan.___", state 494, "(1)" - line 412, "pan.___", state 499, "((i<1))" - line 412, "pan.___", state 499, "((i>=1))" - line 419, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 507, "(1)" - line 419, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 508, "else" - line 419, "pan.___", state 511, "(1)" - line 419, "pan.___", state 512, "(1)" - line 419, "pan.___", state 512, "(1)" - line 423, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 521, "(1)" - line 423, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 522, "else" - line 423, "pan.___", state 525, "(1)" - line 423, "pan.___", state 526, "(1)" - line 423, "pan.___", state 526, "(1)" - line 421, "pan.___", state 531, "((i<2))" - line 421, "pan.___", state 531, "((i>=2))" - line 248, "pan.___", state 537, "(1)" - line 252, "pan.___", state 545, "(1)" - line 252, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, "pan.___", state 546, "else" - line 250, "pan.___", state 551, "((i<1))" - line 250, "pan.___", state 551, "((i>=1))" - line 256, "pan.___", state 557, "(1)" - line 256, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, "pan.___", state 558, "else" - line 260, "pan.___", state 565, "(1)" - line 260, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, "pan.___", state 566, "else" - line 258, "pan.___", state 571, "((i<2))" - line 258, "pan.___", state 571, "((i>=2))" - line 265, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, "pan.___", state 575, "else" - line 430, "pan.___", state 577, "(1)" - line 430, "pan.___", state 577, "(1)" - line 690, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 690, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 690, "pan.___", state 582, "(1)" - line 410, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 653, "(1)" - line 256, "pan.___", state 673, "(1)" - line 260, "pan.___", state 681, "(1)" - line 410, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 771, "(1)" - line 256, "pan.___", state 791, "(1)" - line 260, "pan.___", state 799, "(1)" - line 410, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 820, "(1)" - line 410, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 821, "else" - line 410, "pan.___", state 824, "(1)" - line 414, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 834, "(1)" - line 414, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 835, "else" - line 414, "pan.___", state 838, "(1)" - line 414, "pan.___", state 839, "(1)" - line 414, "pan.___", state 839, "(1)" - line 412, "pan.___", state 844, "((i<1))" - line 412, "pan.___", state 844, "((i>=1))" - line 419, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 852, "(1)" - line 419, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 853, "else" - line 419, "pan.___", state 856, "(1)" - line 419, "pan.___", state 857, "(1)" - line 419, "pan.___", state 857, "(1)" - line 423, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 866, "(1)" - line 423, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 867, "else" - line 423, "pan.___", state 870, "(1)" - line 423, "pan.___", state 871, "(1)" - line 423, "pan.___", state 871, "(1)" - line 421, "pan.___", state 876, "((i<2))" - line 421, "pan.___", state 876, "((i>=2))" - line 248, "pan.___", state 882, "(1)" - line 252, "pan.___", state 890, "(1)" - line 252, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, "pan.___", state 891, "else" - line 250, "pan.___", state 896, "((i<1))" - line 250, "pan.___", state 896, "((i>=1))" - line 256, "pan.___", state 902, "(1)" - line 256, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, "pan.___", state 903, "else" - line 260, "pan.___", state 910, "(1)" - line 260, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, "pan.___", state 911, "else" - line 258, "pan.___", state 916, "((i<2))" - line 258, "pan.___", state 916, "((i>=2))" - line 265, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, "pan.___", state 920, "else" - line 430, "pan.___", state 922, "(1)" - line 430, "pan.___", state 922, "(1)" - line 698, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 410, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 995, "(1)" - line 256, "pan.___", state 1015, "(1)" - line 260, "pan.___", state 1023, "(1)" - line 410, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1109, "(1)" - line 256, "pan.___", state 1129, "(1)" - line 260, "pan.___", state 1137, "(1)" - line 410, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1224, "(1)" - line 256, "pan.___", state 1244, "(1)" - line 260, "pan.___", state 1252, "(1)" - line 410, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1335, "(1)" - line 256, "pan.___", state 1355, "(1)" - line 260, "pan.___", state 1363, "(1)" - line 410, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1451, "(1)" - line 256, "pan.___", state 1471, "(1)" - line 260, "pan.___", state 1479, "(1)" - line 410, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1562, "(1)" - line 256, "pan.___", state 1582, "(1)" - line 260, "pan.___", state 1590, "(1)" - line 410, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1676, "(1)" - line 256, "pan.___", state 1696, "(1)" - line 260, "pan.___", state 1704, "(1)" - line 737, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 410, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1794, "(1)" - line 256, "pan.___", state 1814, "(1)" - line 260, "pan.___", state 1822, "(1)" - line 410, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1905, "(1)" - line 256, "pan.___", state 1925, "(1)" - line 260, "pan.___", state 1933, "(1)" - line 410, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1956, "(1)" - line 410, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 1957, "else" - line 410, "pan.___", state 1960, "(1)" - line 414, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1970, "(1)" - line 414, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 1971, "else" - line 414, "pan.___", state 1974, "(1)" - line 414, "pan.___", state 1975, "(1)" - line 414, "pan.___", state 1975, "(1)" - line 412, "pan.___", state 1980, "((i<1))" - line 412, "pan.___", state 1980, "((i>=1))" - line 419, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1988, "(1)" - line 419, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 1989, "else" - line 419, "pan.___", state 1992, "(1)" - line 419, "pan.___", state 1993, "(1)" - line 419, "pan.___", state 1993, "(1)" - line 423, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2002, "(1)" - line 423, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 2003, "else" - line 423, "pan.___", state 2006, "(1)" - line 423, "pan.___", state 2007, "(1)" - line 423, "pan.___", state 2007, "(1)" - line 421, "pan.___", state 2012, "((i<2))" - line 421, "pan.___", state 2012, "((i>=2))" - line 248, "pan.___", state 2018, "(1)" - line 252, "pan.___", state 2026, "(1)" - line 252, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, "pan.___", state 2027, "else" - line 250, "pan.___", state 2032, "((i<1))" - line 250, "pan.___", state 2032, "((i>=1))" - line 256, "pan.___", state 2038, "(1)" - line 256, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, "pan.___", state 2039, "else" - line 260, "pan.___", state 2046, "(1)" - line 260, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, "pan.___", state 2047, "else" - line 258, "pan.___", state 2052, "((i<2))" - line 258, "pan.___", state 2052, "((i>=2))" - line 265, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, "pan.___", state 2056, "else" - line 430, "pan.___", state 2058, "(1)" - line 430, "pan.___", state 2058, "(1)" - line 737, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 737, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 737, "pan.___", state 2063, "(1)" - line 410, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2134, "(1)" - line 256, "pan.___", state 2154, "(1)" - line 260, "pan.___", state 2162, "(1)" - line 410, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2251, "(1)" - line 256, "pan.___", state 2271, "(1)" - line 260, "pan.___", state 2279, "(1)" - line 410, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2362, "(1)" - line 256, "pan.___", state 2382, "(1)" - line 260, "pan.___", state 2390, "(1)" - line 248, "pan.___", state 2421, "(1)" - line 256, "pan.___", state 2441, "(1)" - line 260, "pan.___", state 2449, "(1)" - line 248, "pan.___", state 2464, "(1)" - line 256, "pan.___", state 2484, "(1)" - line 260, "pan.___", state 2492, "(1)" - line 897, "pan.___", state 2509, "-end-" - (221 of 2509 states) -unreached in proctype urcu_writer - line 410, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 248, "pan.___", state 82, "(1)" - line 252, "pan.___", state 90, "(1)" - line 256, "pan.___", state 102, "(1)" - line 271, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 257, "(1)" - line 252, "pan.___", state 265, "(1)" - line 256, "pan.___", state 277, "(1)" - line 260, "pan.___", state 285, "(1)" - line 414, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 378, "(1)" - line 256, "pan.___", state 390, "(1)" - line 260, "pan.___", state 398, "(1)" - line 414, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 499, "(1)" - line 256, "pan.___", state 511, "(1)" - line 260, "pan.___", state 519, "(1)" - line 414, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 610, "(1)" - line 256, "pan.___", state 622, "(1)" - line 260, "pan.___", state 630, "(1)" - line 414, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 723, "(1)" - line 256, "pan.___", state 735, "(1)" - line 260, "pan.___", state 743, "(1)" - line 271, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 820, "(1)" - line 283, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 843, "(1)" - line 252, "pan.___", state 851, "(1)" - line 256, "pan.___", state 863, "(1)" - line 260, "pan.___", state 871, "(1)" - line 271, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 911, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 924, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 933, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 949, "(1)" - line 252, "pan.___", state 957, "(1)" - line 256, "pan.___", state 969, "(1)" - line 260, "pan.___", state 977, "(1)" - line 275, "pan.___", state 1003, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1016, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1025, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1041, "(1)" - line 252, "pan.___", state 1049, "(1)" - line 256, "pan.___", state 1061, "(1)" - line 260, "pan.___", state 1069, "(1)" - line 271, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 1109, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1122, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1131, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1147, "(1)" - line 252, "pan.___", state 1155, "(1)" - line 256, "pan.___", state 1167, "(1)" - line 260, "pan.___", state 1175, "(1)" - line 275, "pan.___", state 1201, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1214, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1239, "(1)" - line 252, "pan.___", state 1247, "(1)" - line 256, "pan.___", state 1259, "(1)" - line 260, "pan.___", state 1267, "(1)" - line 271, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 1307, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1320, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1329, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1345, "(1)" - line 252, "pan.___", state 1353, "(1)" - line 256, "pan.___", state 1365, "(1)" - line 260, "pan.___", state 1373, "(1)" - line 275, "pan.___", state 1399, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1412, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1421, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1437, "(1)" - line 252, "pan.___", state 1445, "(1)" - line 256, "pan.___", state 1457, "(1)" - line 260, "pan.___", state 1465, "(1)" - line 271, "pan.___", state 1496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 1505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1518, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1543, "(1)" - line 252, "pan.___", state 1551, "(1)" - line 256, "pan.___", state 1563, "(1)" - line 260, "pan.___", state 1571, "(1)" - line 1236, "pan.___", state 1587, "-end-" - (103 of 1587 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1299, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 2.6e+03 seconds -pan: rate 26856.415 states/second -pan: avg transition delay 2.7296e-06 usec -cp .input.spin urcu_free.spin.input -cp .input.spin.trail urcu_free.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free.ltl b/formal-model/urcu-controldataflow-intel-ipi/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free.spin.input b/formal-model/urcu-controldataflow-intel-ipi/urcu_free.spin.input deleted file mode 100644 index 66927ee..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free.spin.input +++ /dev/null @@ -1,1272 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_nested.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.log b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.log deleted file mode 100644 index 1984f88..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.log +++ /dev/null @@ -1,592 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 8619 States= 1e+06 Transitions= 8e+06 Memory= 550.432 t= 20.2 R= 5e+04 -Depth= 8619 States= 2e+06 Transitions= 1.8e+07 Memory= 634.318 t= 46.3 R= 4e+04 -Depth= 8619 States= 3e+06 Transitions= 2.53e+07 Memory= 718.303 t= 64.9 R= 5e+04 -pan: resizing hashtable to -w22.. done -Depth= 8619 States= 4e+06 Transitions= 3.53e+07 Memory= 833.311 t= 91.4 R= 4e+04 -Depth= 8619 States= 5e+06 Transitions= 5.71e+07 Memory= 917.295 t= 152 R= 3e+04 -Depth= 8619 States= 6e+06 Transitions= 6.81e+07 Memory= 1001.279 t= 181 R= 3e+04 -Depth= 8619 States= 7e+06 Transitions= 8.02e+07 Memory= 1085.264 t= 214 R= 3e+04 -Depth= 8619 States= 8e+06 Transitions= 8.9e+07 Memory= 1169.151 t= 238 R= 3e+04 -pan: claim violated! (at depth 1359) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 8619, errors: 1 - 8162162 states, stored - 81941434 states, matched - 90103596 transitions (= stored+matched) -1.3256628e+09 atomic steps -hash conflicts: 60101961 (resolved) - -Stats on memory usage (in Megabytes): - 902.949 equivalent memory usage for states (stored*(State-vector + overhead)) - 693.526 actual memory usage for states (compression: 76.81%) - state-vector as stored = 61 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 1182.822 total actual memory usage - -unreached in proctype urcu_reader - line 272, "pan.___", state 34, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 56, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 65, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 81, "(1)" - line 253, "pan.___", state 89, "(1)" - line 257, "pan.___", state 101, "(1)" - line 261, "pan.___", state 109, "(1)" - line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 199, "(1)" - line 257, "pan.___", state 219, "(1)" - line 261, "pan.___", state 227, "(1)" - line 700, "pan.___", state 246, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 253, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 285, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 299, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 317, "(1)" - line 257, "pan.___", state 337, "(1)" - line 261, "pan.___", state 345, "(1)" - line 411, "pan.___", state 364, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 396, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 410, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 428, "(1)" - line 257, "pan.___", state 448, "(1)" - line 261, "pan.___", state 456, "(1)" - line 411, "pan.___", state 477, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 479, "(1)" - line 411, "pan.___", state 480, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 480, "else" - line 411, "pan.___", state 483, "(1)" - line 415, "pan.___", state 491, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 493, "(1)" - line 415, "pan.___", state 494, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 494, "else" - line 415, "pan.___", state 497, "(1)" - line 415, "pan.___", state 498, "(1)" - line 415, "pan.___", state 498, "(1)" - line 413, "pan.___", state 503, "((i<1))" - line 413, "pan.___", state 503, "((i>=1))" - line 420, "pan.___", state 509, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 511, "(1)" - line 420, "pan.___", state 512, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 512, "else" - line 420, "pan.___", state 515, "(1)" - line 420, "pan.___", state 516, "(1)" - line 420, "pan.___", state 516, "(1)" - line 424, "pan.___", state 523, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 525, "(1)" - line 424, "pan.___", state 526, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 526, "else" - line 424, "pan.___", state 529, "(1)" - line 424, "pan.___", state 530, "(1)" - line 424, "pan.___", state 530, "(1)" - line 422, "pan.___", state 535, "((i<2))" - line 422, "pan.___", state 535, "((i>=2))" - line 249, "pan.___", state 541, "(1)" - line 253, "pan.___", state 549, "(1)" - line 253, "pan.___", state 550, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 550, "else" - line 251, "pan.___", state 555, "((i<1))" - line 251, "pan.___", state 555, "((i>=1))" - line 257, "pan.___", state 561, "(1)" - line 257, "pan.___", state 562, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 562, "else" - line 261, "pan.___", state 569, "(1)" - line 261, "pan.___", state 570, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 570, "else" - line 259, "pan.___", state 575, "((i<2))" - line 259, "pan.___", state 575, "((i>=2))" - line 266, "pan.___", state 579, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 579, "else" - line 431, "pan.___", state 581, "(1)" - line 431, "pan.___", state 581, "(1)" - line 700, "pan.___", state 584, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 700, "pan.___", state 585, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 700, "pan.___", state 586, "(1)" - line 411, "pan.___", state 593, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 625, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 639, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 657, "(1)" - line 257, "pan.___", state 677, "(1)" - line 261, "pan.___", state 685, "(1)" - line 411, "pan.___", state 711, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 743, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 757, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 775, "(1)" - line 257, "pan.___", state 795, "(1)" - line 261, "pan.___", state 803, "(1)" - line 411, "pan.___", state 822, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 824, "(1)" - line 411, "pan.___", state 825, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 825, "else" - line 411, "pan.___", state 828, "(1)" - line 415, "pan.___", state 836, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 838, "(1)" - line 415, "pan.___", state 839, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 839, "else" - line 415, "pan.___", state 842, "(1)" - line 415, "pan.___", state 843, "(1)" - line 415, "pan.___", state 843, "(1)" - line 413, "pan.___", state 848, "((i<1))" - line 413, "pan.___", state 848, "((i>=1))" - line 420, "pan.___", state 854, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 856, "(1)" - line 420, "pan.___", state 857, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 857, "else" - line 420, "pan.___", state 860, "(1)" - line 420, "pan.___", state 861, "(1)" - line 420, "pan.___", state 861, "(1)" - line 424, "pan.___", state 868, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 870, "(1)" - line 424, "pan.___", state 871, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 871, "else" - line 424, "pan.___", state 874, "(1)" - line 424, "pan.___", state 875, "(1)" - line 424, "pan.___", state 875, "(1)" - line 422, "pan.___", state 880, "((i<2))" - line 422, "pan.___", state 880, "((i>=2))" - line 249, "pan.___", state 886, "(1)" - line 253, "pan.___", state 894, "(1)" - line 253, "pan.___", state 895, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 895, "else" - line 251, "pan.___", state 900, "((i<1))" - line 251, "pan.___", state 900, "((i>=1))" - line 257, "pan.___", state 906, "(1)" - line 257, "pan.___", state 907, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 907, "else" - line 261, "pan.___", state 914, "(1)" - line 261, "pan.___", state 915, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 915, "else" - line 259, "pan.___", state 920, "((i<2))" - line 259, "pan.___", state 920, "((i>=2))" - line 266, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 924, "else" - line 431, "pan.___", state 926, "(1)" - line 431, "pan.___", state 926, "(1)" - line 708, "pan.___", state 930, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 935, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 967, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 981, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 999, "(1)" - line 257, "pan.___", state 1019, "(1)" - line 261, "pan.___", state 1027, "(1)" - line 411, "pan.___", state 1049, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1081, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1095, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1113, "(1)" - line 257, "pan.___", state 1133, "(1)" - line 261, "pan.___", state 1141, "(1)" - line 411, "pan.___", state 1164, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1196, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1210, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1228, "(1)" - line 257, "pan.___", state 1248, "(1)" - line 261, "pan.___", state 1256, "(1)" - line 411, "pan.___", state 1275, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1307, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1321, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1339, "(1)" - line 257, "pan.___", state 1359, "(1)" - line 261, "pan.___", state 1367, "(1)" - line 411, "pan.___", state 1391, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1423, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1437, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1455, "(1)" - line 257, "pan.___", state 1475, "(1)" - line 261, "pan.___", state 1483, "(1)" - line 411, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1534, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1548, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1566, "(1)" - line 257, "pan.___", state 1586, "(1)" - line 261, "pan.___", state 1594, "(1)" - line 411, "pan.___", state 1616, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1648, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1662, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1680, "(1)" - line 257, "pan.___", state 1700, "(1)" - line 261, "pan.___", state 1708, "(1)" - line 747, "pan.___", state 1727, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1734, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1766, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1780, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1798, "(1)" - line 257, "pan.___", state 1818, "(1)" - line 261, "pan.___", state 1826, "(1)" - line 411, "pan.___", state 1845, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1877, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1891, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1909, "(1)" - line 257, "pan.___", state 1929, "(1)" - line 261, "pan.___", state 1937, "(1)" - line 411, "pan.___", state 1958, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 1960, "(1)" - line 411, "pan.___", state 1961, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 1961, "else" - line 411, "pan.___", state 1964, "(1)" - line 415, "pan.___", state 1972, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1974, "(1)" - line 415, "pan.___", state 1975, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 1975, "else" - line 415, "pan.___", state 1978, "(1)" - line 415, "pan.___", state 1979, "(1)" - line 415, "pan.___", state 1979, "(1)" - line 413, "pan.___", state 1984, "((i<1))" - line 413, "pan.___", state 1984, "((i>=1))" - line 420, "pan.___", state 1990, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1992, "(1)" - line 420, "pan.___", state 1993, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 1993, "else" - line 420, "pan.___", state 1996, "(1)" - line 420, "pan.___", state 1997, "(1)" - line 420, "pan.___", state 1997, "(1)" - line 424, "pan.___", state 2004, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2006, "(1)" - line 424, "pan.___", state 2007, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2007, "else" - line 424, "pan.___", state 2010, "(1)" - line 424, "pan.___", state 2011, "(1)" - line 424, "pan.___", state 2011, "(1)" - line 422, "pan.___", state 2016, "((i<2))" - line 422, "pan.___", state 2016, "((i>=2))" - line 249, "pan.___", state 2022, "(1)" - line 253, "pan.___", state 2030, "(1)" - line 253, "pan.___", state 2031, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2031, "else" - line 251, "pan.___", state 2036, "((i<1))" - line 251, "pan.___", state 2036, "((i>=1))" - line 257, "pan.___", state 2042, "(1)" - line 257, "pan.___", state 2043, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2043, "else" - line 261, "pan.___", state 2050, "(1)" - line 261, "pan.___", state 2051, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2051, "else" - line 259, "pan.___", state 2056, "((i<2))" - line 259, "pan.___", state 2056, "((i>=2))" - line 266, "pan.___", state 2060, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2060, "else" - line 431, "pan.___", state 2062, "(1)" - line 431, "pan.___", state 2062, "(1)" - line 747, "pan.___", state 2065, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 747, "pan.___", state 2066, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 747, "pan.___", state 2067, "(1)" - line 411, "pan.___", state 2074, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2106, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2120, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2138, "(1)" - line 257, "pan.___", state 2158, "(1)" - line 261, "pan.___", state 2166, "(1)" - line 411, "pan.___", state 2191, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2223, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2237, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2255, "(1)" - line 257, "pan.___", state 2275, "(1)" - line 261, "pan.___", state 2283, "(1)" - line 411, "pan.___", state 2302, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2334, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2348, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2366, "(1)" - line 257, "pan.___", state 2386, "(1)" - line 261, "pan.___", state 2394, "(1)" - line 249, "pan.___", state 2425, "(1)" - line 257, "pan.___", state 2445, "(1)" - line 261, "pan.___", state 2453, "(1)" - line 249, "pan.___", state 2468, "(1)" - line 257, "pan.___", state 2488, "(1)" - line 261, "pan.___", state 2496, "(1)" - line 898, "pan.___", state 2513, "-end-" - (221 of 2513 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 20, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 26, "(1)" - line 415, "pan.___", state 34, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 40, "(1)" - line 415, "pan.___", state 41, "(1)" - line 415, "pan.___", state 41, "(1)" - line 413, "pan.___", state 46, "((i<1))" - line 413, "pan.___", state 46, "((i>=1))" - line 420, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 58, "(1)" - line 420, "pan.___", state 59, "(1)" - line 420, "pan.___", state 59, "(1)" - line 424, "pan.___", state 72, "(1)" - line 424, "pan.___", state 73, "(1)" - line 424, "pan.___", state 73, "(1)" - line 422, "pan.___", state 78, "((i<2))" - line 422, "pan.___", state 78, "((i>=2))" - line 249, "pan.___", state 84, "(1)" - line 253, "pan.___", state 92, "(1)" - line 253, "pan.___", state 93, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 93, "else" - line 251, "pan.___", state 98, "((i<1))" - line 251, "pan.___", state 98, "((i>=1))" - line 257, "pan.___", state 104, "(1)" - line 257, "pan.___", state 105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 105, "else" - line 261, "pan.___", state 112, "(1)" - line 261, "pan.___", state 113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 113, "else" - line 259, "pan.___", state 118, "((i<2))" - line 259, "pan.___", state 118, "((i>=2))" - line 266, "pan.___", state 122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 122, "else" - line 431, "pan.___", state 124, "(1)" - line 431, "pan.___", state 124, "(1)" - line 272, "pan.___", state 133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 142, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 274, "pan.___", state 150, "((i<1))" - line 274, "pan.___", state 150, "((i>=1))" - line 280, "pan.___", state 155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 1021, "pan.___", state 183, "old_data = cached_rcu_ptr.val[_pid]" - line 1032, "pan.___", state 187, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" - line 411, "pan.___", state 195, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 201, "(1)" - line 415, "pan.___", state 209, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 215, "(1)" - line 415, "pan.___", state 216, "(1)" - line 415, "pan.___", state 216, "(1)" - line 420, "pan.___", state 229, "(1)" - line 424, "pan.___", state 241, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 259, "(1)" - line 253, "pan.___", state 267, "(1)" - line 261, "pan.___", state 287, "(1)" - line 431, "pan.___", state 299, "(1)" - line 431, "pan.___", state 299, "(1)" - line 415, "pan.___", state 322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 380, "(1)" - line 261, "pan.___", state 400, "(1)" - line 415, "pan.___", state 443, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 253, "pan.___", state 501, "(1)" - line 415, "pan.___", state 554, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 253, "pan.___", state 612, "(1)" - line 415, "pan.___", state 667, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 699, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 725, "(1)" - line 261, "pan.___", state 745, "(1)" - line 1168, "pan.___", state 770, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" - line 272, "pan.___", state 798, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 800, "(1)" - line 276, "pan.___", state 807, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 809, "(1)" - line 276, "pan.___", state 810, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 810, "else" - line 274, "pan.___", state 815, "((i<1))" - line 274, "pan.___", state 815, "((i>=1))" - line 280, "pan.___", state 820, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 822, "(1)" - line 280, "pan.___", state 823, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 823, "else" - line 284, "pan.___", state 829, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 831, "(1)" - line 284, "pan.___", state 832, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 832, "else" - line 282, "pan.___", state 837, "((i<2))" - line 282, "pan.___", state 837, "((i>=2))" - line 249, "pan.___", state 845, "(1)" - line 253, "pan.___", state 853, "(1)" - line 253, "pan.___", state 854, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 854, "else" - line 251, "pan.___", state 859, "((i<1))" - line 251, "pan.___", state 859, "((i>=1))" - line 257, "pan.___", state 865, "(1)" - line 257, "pan.___", state 866, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 866, "else" - line 261, "pan.___", state 873, "(1)" - line 261, "pan.___", state 874, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 874, "else" - line 266, "pan.___", state 883, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 883, "else" - line 1222, "pan.___", state 899, "((i<1))" - line 1222, "pan.___", state 899, "((i>=1))" - line 272, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 906, "(1)" - line 276, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 915, "(1)" - line 276, "pan.___", state 916, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 916, "else" - line 274, "pan.___", state 921, "((i<1))" - line 274, "pan.___", state 921, "((i>=1))" - line 280, "pan.___", state 926, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 928, "(1)" - line 280, "pan.___", state 929, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 929, "else" - line 284, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 937, "(1)" - line 284, "pan.___", state 938, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 938, "else" - line 282, "pan.___", state 943, "((i<2))" - line 282, "pan.___", state 943, "((i>=2))" - line 249, "pan.___", state 951, "(1)" - line 253, "pan.___", state 959, "(1)" - line 253, "pan.___", state 960, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 960, "else" - line 251, "pan.___", state 965, "((i<1))" - line 251, "pan.___", state 965, "((i>=1))" - line 257, "pan.___", state 971, "(1)" - line 257, "pan.___", state 972, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 972, "else" - line 261, "pan.___", state 979, "(1)" - line 261, "pan.___", state 980, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 980, "else" - line 266, "pan.___", state 989, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 989, "else" - line 299, "pan.___", state 991, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 991, "else" - line 1222, "pan.___", state 992, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 1222, "pan.___", state 992, "else" - line 276, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1018, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1027, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1043, "(1)" - line 253, "pan.___", state 1051, "(1)" - line 257, "pan.___", state 1063, "(1)" - line 261, "pan.___", state 1071, "(1)" - line 272, "pan.___", state 1102, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1111, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1124, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1133, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1149, "(1)" - line 253, "pan.___", state 1157, "(1)" - line 257, "pan.___", state 1169, "(1)" - line 261, "pan.___", state 1177, "(1)" - line 276, "pan.___", state 1203, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1225, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1241, "(1)" - line 253, "pan.___", state 1249, "(1)" - line 257, "pan.___", state 1261, "(1)" - line 261, "pan.___", state 1269, "(1)" - line 272, "pan.___", state 1300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1309, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1322, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1331, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1347, "(1)" - line 253, "pan.___", state 1355, "(1)" - line 257, "pan.___", state 1367, "(1)" - line 261, "pan.___", state 1375, "(1)" - line 272, "pan.___", state 1392, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1394, "(1)" - line 276, "pan.___", state 1401, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1403, "(1)" - line 276, "pan.___", state 1404, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1404, "else" - line 274, "pan.___", state 1409, "((i<1))" - line 274, "pan.___", state 1409, "((i>=1))" - line 280, "pan.___", state 1414, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1416, "(1)" - line 280, "pan.___", state 1417, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1417, "else" - line 284, "pan.___", state 1423, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1425, "(1)" - line 284, "pan.___", state 1426, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1426, "else" - line 282, "pan.___", state 1431, "((i<2))" - line 282, "pan.___", state 1431, "((i>=2))" - line 249, "pan.___", state 1439, "(1)" - line 253, "pan.___", state 1447, "(1)" - line 253, "pan.___", state 1448, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1448, "else" - line 251, "pan.___", state 1453, "((i<1))" - line 251, "pan.___", state 1453, "((i>=1))" - line 257, "pan.___", state 1459, "(1)" - line 257, "pan.___", state 1460, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1460, "else" - line 261, "pan.___", state 1467, "(1)" - line 261, "pan.___", state 1468, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1468, "else" - line 266, "pan.___", state 1477, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1477, "else" - line 1233, "pan.___", state 1480, "i = 0" - line 1233, "pan.___", state 1482, "reader_barrier = 1" - line 1233, "pan.___", state 1493, "((i<1))" - line 1233, "pan.___", state 1493, "((i>=1))" - line 272, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1500, "(1)" - line 276, "pan.___", state 1507, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1509, "(1)" - line 276, "pan.___", state 1510, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1510, "else" - line 274, "pan.___", state 1515, "((i<1))" - line 274, "pan.___", state 1515, "((i>=1))" - line 280, "pan.___", state 1520, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1522, "(1)" - line 280, "pan.___", state 1523, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1523, "else" - line 284, "pan.___", state 1529, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1531, "(1)" - line 284, "pan.___", state 1532, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1532, "else" - line 282, "pan.___", state 1537, "((i<2))" - line 282, "pan.___", state 1537, "((i>=2))" - line 249, "pan.___", state 1545, "(1)" - line 253, "pan.___", state 1553, "(1)" - line 253, "pan.___", state 1554, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1554, "else" - line 251, "pan.___", state 1559, "((i<1))" - line 251, "pan.___", state 1559, "((i>=1))" - line 257, "pan.___", state 1565, "(1)" - line 257, "pan.___", state 1566, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1566, "else" - line 261, "pan.___", state 1573, "(1)" - line 261, "pan.___", state 1574, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1574, "else" - line 266, "pan.___", state 1583, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1583, "else" - line 299, "pan.___", state 1585, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1585, "else" - line 1233, "pan.___", state 1586, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 1233, "pan.___", state 1586, "else" - line 1237, "pan.___", state 1589, "-end-" - (179 of 1589 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 241 seconds -pan: rate 33888.985 states/second -pan: avg transition delay 2.673e-06 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input deleted file mode 100644 index ddb4112..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_MB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index e886f80..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,1362 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4182 -2:3:4102 -3:3:4105 -4:3:4105 -5:3:4108 -6:3:4116 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-1341:1:2421 -1342:1:2428 -1343:1:2429 -1344:1:2436 -1345:1:2441 -1346:1:2448 -1347:1:2449 -1348:1:2448 -1349:1:2449 -1350:1:2456 -1351:1:2460 -1352:0:4182 -1353:2:3303 -1354:0:4182 -1355:1:1157 -1356:1:1158 -1357:0:4180 -1358:2:3302 -1359:0:4186 -1360:1:2169 diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.log b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.log deleted file mode 100644 index 42698f6..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.log +++ /dev/null @@ -1,510 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 9420 States= 1e+06 Transitions= 7.12e+06 Memory= 550.432 t= 17.7 R= 6e+04 -Depth= 9420 States= 2e+06 Transitions= 1.53e+07 Memory= 634.318 t= 38.9 R= 5e+04 -Depth= 9420 States= 3e+06 Transitions= 2.54e+07 Memory= 718.303 t= 66.3 R= 5e+04 -pan: resizing hashtable to -w22.. done -Depth= 9420 States= 4e+06 Transitions= 3.3e+07 Memory= 833.311 t= 86.1 R= 5e+04 -Depth= 9420 States= 5e+06 Transitions= 4.08e+07 Memory= 917.295 t= 106 R= 5e+04 -Depth= 9420 States= 6e+06 Transitions= 5.88e+07 Memory= 1001.279 t= 157 R= 4e+04 -Depth= 9420 States= 7e+06 Transitions= 7.01e+07 Memory= 1085.264 t= 187 R= 4e+04 -Depth= 9420 States= 8e+06 Transitions= 8.44e+07 Memory= 1169.151 t= 227 R= 4e+04 -Depth= 9420 States= 9e+06 Transitions= 9.77e+07 Memory= 1253.135 t= 264 R= 3e+04 -pan: resizing hashtable to -w24.. done -Depth= 9420 States= 1e+07 Transitions= 1.11e+08 Memory= 1461.115 t= 302 R= 3e+04 -Depth= 9420 States= 1.1e+07 Transitions= 1.24e+08 Memory= 1545.100 t= 336 R= 3e+04 -Depth= 9420 States= 1.2e+07 Transitions= 1.33e+08 Memory= 1629.084 t= 362 R= 3e+04 -Depth= 9420 States= 1.3e+07 Transitions= 1.46e+08 Memory= 1713.068 t= 397 R= 3e+04 -Depth= 9420 States= 1.4e+07 Transitions= 1.76e+08 Memory= 1797.053 t= 485 R= 3e+04 -Depth= 9420 States= 1.5e+07 Transitions= 1.95e+08 Memory= 1881.037 t= 540 R= 3e+04 -Depth= 9420 States= 1.6e+07 Transitions= 2.12e+08 Memory= 1964.924 t= 587 R= 3e+04 -Depth= 9420 States= 1.7e+07 Transitions= 2.25e+08 Memory= 2048.908 t= 622 R= 3e+04 -Depth= 9420 States= 1.8e+07 Transitions= 2.44e+08 Memory= 2132.893 t= 676 R= 3e+04 -Depth= 9420 States= 1.9e+07 Transitions= 2.6e+08 Memory= 2216.877 t= 721 R= 3e+04 -Depth= 9420 States= 2e+07 Transitions= 2.78e+08 Memory= 2300.861 t= 771 R= 3e+04 -Depth= 9522 States= 2.1e+07 Transitions= 2.91e+08 Memory= 2384.846 t= 808 R= 3e+04 -Depth= 9542 States= 2.2e+07 Transitions= 3.05e+08 Memory= 2468.830 t= 847 R= 3e+04 -Depth= 9542 States= 2.3e+07 Transitions= 3.16e+08 Memory= 2552.717 t= 878 R= 3e+04 -Depth= 9542 States= 2.4e+07 Transitions= 3.28e+08 Memory= 2636.701 t= 910 R= 3e+04 -Depth= 9542 States= 2.5e+07 Transitions= 3.41e+08 Memory= 2720.686 t= 947 R= 3e+04 -Depth= 9542 States= 2.6e+07 Transitions= 3.53e+08 Memory= 2804.670 t= 979 R= 3e+04 -Depth= 9542 States= 2.7e+07 Transitions= 3.66e+08 Memory= 2888.654 t= 1.02e+03 R= 3e+04 -Depth= 9542 States= 2.8e+07 Transitions= 3.79e+08 Memory= 2972.639 t= 1.05e+03 R= 3e+04 -Depth= 9542 States= 2.9e+07 Transitions= 3.92e+08 Memory= 3056.526 t= 1.09e+03 R= 3e+04 -Depth= 9542 States= 3e+07 Transitions= 4.04e+08 Memory= 3140.510 t= 1.12e+03 R= 3e+04 -Depth= 9542 States= 3.1e+07 Transitions= 4.17e+08 Memory= 3224.494 t= 1.16e+03 R= 3e+04 -Depth= 9542 States= 3.2e+07 Transitions= 4.28e+08 Memory= 3308.479 t= 1.19e+03 R= 3e+04 -Depth= 9542 States= 3.3e+07 Transitions= 4.39e+08 Memory= 3392.463 t= 1.22e+03 R= 3e+04 -Depth= 9542 States= 3.4e+07 Transitions= 4.53e+08 Memory= 3476.447 t= 1.26e+03 R= 3e+04 -pan: resizing hashtable to -w26.. done -Depth= 9542 States= 3.5e+07 Transitions= 4.7e+08 Memory= 4056.416 t= 1.32e+03 R= 3e+04 -Depth= 9542 States= 3.6e+07 Transitions= 4.83e+08 Memory= 4140.401 t= 1.35e+03 R= 3e+04 -Depth= 9542 States= 3.7e+07 Transitions= 4.99e+08 Memory= 4224.385 t= 1.4e+03 R= 3e+04 -Depth= 9542 States= 3.8e+07 Transitions= 5.14e+08 Memory= 4308.369 t= 1.44e+03 R= 3e+04 -Depth= 9542 States= 3.9e+07 Transitions= 5.29e+08 Memory= 4392.354 t= 1.48e+03 R= 3e+04 -Depth= 9542 States= 4e+07 Transitions= 5.39e+08 Memory= 4476.338 t= 1.51e+03 R= 3e+04 -Depth= 9542 States= 4.1e+07 Transitions= 5.49e+08 Memory= 4560.225 t= 1.53e+03 R= 3e+04 -Depth= 9542 States= 4.2e+07 Transitions= 5.61e+08 Memory= 4644.209 t= 1.56e+03 R= 3e+04 -Depth= 9542 States= 4.3e+07 Transitions= 5.88e+08 Memory= 4728.193 t= 1.64e+03 R= 3e+04 -Depth= 9542 States= 4.4e+07 Transitions= 6.14e+08 Memory= 4812.178 t= 1.72e+03 R= 3e+04 -Depth= 9542 States= 4.5e+07 Transitions= 6.31e+08 Memory= 4896.162 t= 1.76e+03 R= 3e+04 -Depth= 9542 States= 4.6e+07 Transitions= 6.41e+08 Memory= 4980.147 t= 1.79e+03 R= 3e+04 -Depth= 9542 States= 4.7e+07 Transitions= 6.57e+08 Memory= 5064.131 t= 1.84e+03 R= 3e+04 -Depth= 9542 States= 4.8e+07 Transitions= 6.76e+08 Memory= 5148.018 t= 1.89e+03 R= 3e+04 -Depth= 9542 States= 4.9e+07 Transitions= 6.93e+08 Memory= 5232.002 t= 1.94e+03 R= 3e+04 -Depth= 9542 States= 5e+07 Transitions= 7.08e+08 Memory= 5315.986 t= 1.98e+03 R= 3e+04 -Depth= 9542 States= 5.1e+07 Transitions= 7.21e+08 Memory= 5399.971 t= 2.02e+03 R= 3e+04 -Depth= 9542 States= 5.2e+07 Transitions= 7.34e+08 Memory= 5483.955 t= 2.05e+03 R= 3e+04 -Depth= 9542 States= 5.3e+07 Transitions= 7.47e+08 Memory= 5567.940 t= 2.09e+03 R= 3e+04 -Depth= 9542 States= 5.4e+07 Transitions= 7.58e+08 Memory= 5651.826 t= 2.12e+03 R= 3e+04 -Depth= 9542 States= 5.5e+07 Transitions= 7.71e+08 Memory= 5735.811 t= 2.15e+03 R= 3e+04 -Depth= 9542 States= 5.6e+07 Transitions= 7.83e+08 Memory= 5819.795 t= 2.19e+03 R= 3e+04 -Depth= 9542 States= 5.7e+07 Transitions= 7.98e+08 Memory= 5903.779 t= 2.23e+03 R= 3e+04 -Depth= 9542 States= 5.8e+07 Transitions= 8.08e+08 Memory= 5987.764 t= 2.25e+03 R= 3e+04 -Depth= 9542 States= 5.9e+07 Transitions= 8.22e+08 Memory= 6071.748 t= 2.29e+03 R= 3e+04 -Depth= 9542 States= 6e+07 Transitions= 8.33e+08 Memory= 6155.733 t= 2.32e+03 R= 3e+04 -Depth= 9542 States= 6.1e+07 Transitions= 8.44e+08 Memory= 6239.619 t= 2.35e+03 R= 3e+04 -Depth= 9542 States= 6.2e+07 Transitions= 8.56e+08 Memory= 6323.604 t= 2.39e+03 R= 3e+04 -Depth= 9542 States= 6.3e+07 Transitions= 8.74e+08 Memory= 6407.588 t= 2.44e+03 R= 3e+04 -Depth= 9542 States= 6.4e+07 Transitions= 8.86e+08 Memory= 6491.572 t= 2.47e+03 R= 3e+04 -Depth= 9542 States= 6.5e+07 Transitions= 9.01e+08 Memory= 6575.557 t= 2.51e+03 R= 3e+04 -Depth= 9542 States= 6.6e+07 Transitions= 9.17e+08 Memory= 6659.541 t= 2.55e+03 R= 3e+04 -Depth= 9542 States= 6.7e+07 Transitions= 9.31e+08 Memory= 6743.428 t= 2.59e+03 R= 3e+04 -Depth= 9542 States= 6.8e+07 Transitions= 9.46e+08 Memory= 6827.412 t= 2.64e+03 R= 3e+04 -Depth= 9542 States= 6.9e+07 Transitions= 9.6e+08 Memory= 6911.397 t= 2.67e+03 R= 3e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 9542, errors: 0 - 69795266 states, stored -9.0126381e+08 states, matched -9.7105908e+08 transitions (= stored+matched) -1.4943649e+10 atomic steps -hash conflicts: 5.4028862e+08 (resolved) - -Stats on memory usage (in Megabytes): - 7721.187 equivalent memory usage for states (stored*(State-vector + overhead)) - 6011.798 actual memory usage for states (compression: 77.86%) - state-vector as stored = 62 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 3.368 memory lost to fragmentation - 6978.193 total actual memory usage - -unreached in proctype urcu_reader - line 272, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 77, "(1)" - line 253, "pan.___", state 85, "(1)" - line 257, "pan.___", state 97, "(1)" - line 261, "pan.___", state 105, "(1)" - line 411, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 195, "(1)" - line 257, "pan.___", state 215, "(1)" - line 261, "pan.___", state 223, "(1)" - line 691, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 313, "(1)" - line 257, "pan.___", state 333, "(1)" - line 261, "pan.___", state 341, "(1)" - line 411, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 424, "(1)" - line 257, "pan.___", state 444, "(1)" - line 261, "pan.___", state 452, "(1)" - line 411, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 475, "(1)" - line 411, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 476, "else" - line 411, "pan.___", state 479, "(1)" - line 415, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 489, "(1)" - line 415, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 490, "else" - line 415, "pan.___", state 493, "(1)" - line 415, "pan.___", state 494, "(1)" - line 415, "pan.___", state 494, "(1)" - line 413, "pan.___", state 499, "((i<1))" - line 413, "pan.___", state 499, "((i>=1))" - line 420, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 507, "(1)" - line 420, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 508, "else" - line 420, "pan.___", state 511, "(1)" - line 420, "pan.___", state 512, "(1)" - line 420, "pan.___", state 512, "(1)" - line 424, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 521, "(1)" - line 424, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 522, "else" - line 424, "pan.___", state 525, "(1)" - line 424, "pan.___", state 526, "(1)" - line 424, "pan.___", state 526, "(1)" - line 422, "pan.___", state 531, "((i<2))" - line 422, "pan.___", state 531, "((i>=2))" - line 249, "pan.___", state 537, "(1)" - line 253, "pan.___", state 545, "(1)" - line 253, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 546, "else" - line 251, "pan.___", state 551, "((i<1))" - line 251, "pan.___", state 551, "((i>=1))" - line 257, "pan.___", state 557, "(1)" - line 257, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 558, "else" - line 261, "pan.___", state 565, "(1)" - line 261, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 566, "else" - line 259, "pan.___", state 571, "((i<2))" - line 259, "pan.___", state 571, "((i>=2))" - line 266, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 575, "else" - line 431, "pan.___", state 577, "(1)" - line 431, "pan.___", state 577, "(1)" - line 691, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 691, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 691, "pan.___", state 582, "(1)" - line 411, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 653, "(1)" - line 257, "pan.___", state 673, "(1)" - line 261, "pan.___", state 681, "(1)" - line 411, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 771, "(1)" - line 257, "pan.___", state 791, "(1)" - line 261, "pan.___", state 799, "(1)" - line 411, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 820, "(1)" - line 411, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 821, "else" - line 411, "pan.___", state 824, "(1)" - line 415, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 834, "(1)" - line 415, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 835, "else" - line 415, "pan.___", state 838, "(1)" - line 415, "pan.___", state 839, "(1)" - line 415, "pan.___", state 839, "(1)" - line 413, "pan.___", state 844, "((i<1))" - line 413, "pan.___", state 844, "((i>=1))" - line 420, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 852, "(1)" - line 420, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 853, "else" - line 420, "pan.___", state 856, "(1)" - line 420, "pan.___", state 857, "(1)" - line 420, "pan.___", state 857, "(1)" - line 424, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 866, "(1)" - line 424, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 867, "else" - line 424, "pan.___", state 870, "(1)" - line 424, "pan.___", state 871, "(1)" - line 424, "pan.___", state 871, "(1)" - line 422, "pan.___", state 876, "((i<2))" - line 422, "pan.___", state 876, "((i>=2))" - line 249, "pan.___", state 882, "(1)" - line 253, "pan.___", state 890, "(1)" - line 253, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 891, "else" - line 251, "pan.___", state 896, "((i<1))" - line 251, "pan.___", state 896, "((i>=1))" - line 257, "pan.___", state 902, "(1)" - line 257, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 903, "else" - line 261, "pan.___", state 910, "(1)" - line 261, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 911, "else" - line 259, "pan.___", state 916, "((i<2))" - line 259, "pan.___", state 916, "((i>=2))" - line 266, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 920, "else" - line 431, "pan.___", state 922, "(1)" - line 431, "pan.___", state 922, "(1)" - line 699, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 995, "(1)" - line 257, "pan.___", state 1015, "(1)" - line 261, "pan.___", state 1023, "(1)" - line 411, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1109, "(1)" - line 257, "pan.___", state 1129, "(1)" - line 261, "pan.___", state 1137, "(1)" - line 411, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1224, "(1)" - line 257, "pan.___", state 1244, "(1)" - line 261, "pan.___", state 1252, "(1)" - line 411, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1335, "(1)" - line 257, "pan.___", state 1355, "(1)" - line 261, "pan.___", state 1363, "(1)" - line 411, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1451, "(1)" - line 257, "pan.___", state 1471, "(1)" - line 261, "pan.___", state 1479, "(1)" - line 411, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1562, "(1)" - line 257, "pan.___", state 1582, "(1)" - line 261, "pan.___", state 1590, "(1)" - line 411, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1676, "(1)" - line 257, "pan.___", state 1696, "(1)" - line 261, "pan.___", state 1704, "(1)" - line 738, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1794, "(1)" - line 257, "pan.___", state 1814, "(1)" - line 261, "pan.___", state 1822, "(1)" - line 411, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1905, "(1)" - line 257, "pan.___", state 1925, "(1)" - line 261, "pan.___", state 1933, "(1)" - line 411, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 1956, "(1)" - line 411, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 1957, "else" - line 411, "pan.___", state 1960, "(1)" - line 415, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1970, "(1)" - line 415, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 1971, "else" - line 415, "pan.___", state 1974, "(1)" - line 415, "pan.___", state 1975, "(1)" - line 415, "pan.___", state 1975, "(1)" - line 413, "pan.___", state 1980, "((i<1))" - line 413, "pan.___", state 1980, "((i>=1))" - line 420, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1988, "(1)" - line 420, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 1989, "else" - line 420, "pan.___", state 1992, "(1)" - line 420, "pan.___", state 1993, "(1)" - line 420, "pan.___", state 1993, "(1)" - line 424, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2002, "(1)" - line 424, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2003, "else" - line 424, "pan.___", state 2006, "(1)" - line 424, "pan.___", state 2007, "(1)" - line 424, "pan.___", state 2007, "(1)" - line 422, "pan.___", state 2012, "((i<2))" - line 422, "pan.___", state 2012, "((i>=2))" - line 249, "pan.___", state 2018, "(1)" - line 253, "pan.___", state 2026, "(1)" - line 253, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2027, "else" - line 251, "pan.___", state 2032, "((i<1))" - line 251, "pan.___", state 2032, "((i>=1))" - line 257, "pan.___", state 2038, "(1)" - line 257, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2039, "else" - line 261, "pan.___", state 2046, "(1)" - line 261, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2047, "else" - line 259, "pan.___", state 2052, "((i<2))" - line 259, "pan.___", state 2052, "((i>=2))" - line 266, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2056, "else" - line 431, "pan.___", state 2058, "(1)" - line 431, "pan.___", state 2058, "(1)" - line 738, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 738, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 738, "pan.___", state 2063, "(1)" - line 411, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2134, "(1)" - line 257, "pan.___", state 2154, "(1)" - line 261, "pan.___", state 2162, "(1)" - line 411, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2251, "(1)" - line 257, "pan.___", state 2271, "(1)" - line 261, "pan.___", state 2279, "(1)" - line 411, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2362, "(1)" - line 257, "pan.___", state 2382, "(1)" - line 261, "pan.___", state 2390, "(1)" - line 411, "pan.___", state 2421, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2453, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2467, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2485, "(1)" - line 257, "pan.___", state 2505, "(1)" - line 261, "pan.___", state 2513, "(1)" - line 411, "pan.___", state 2530, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2562, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2576, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2594, "(1)" - line 257, "pan.___", state 2614, "(1)" - line 261, "pan.___", state 2622, "(1)" - line 898, "pan.___", state 2641, "-end-" - (227 of 2641 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 82, "(1)" - line 253, "pan.___", state 90, "(1)" - line 257, "pan.___", state 102, "(1)" - line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 257, "(1)" - line 253, "pan.___", state 265, "(1)" - line 257, "pan.___", state 277, "(1)" - line 261, "pan.___", state 285, "(1)" - line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 378, "(1)" - line 257, "pan.___", state 390, "(1)" - line 261, "pan.___", state 398, "(1)" - line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 499, "(1)" - line 257, "pan.___", state 511, "(1)" - line 261, "pan.___", state 519, "(1)" - line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 610, "(1)" - line 257, "pan.___", state 622, "(1)" - line 261, "pan.___", state 630, "(1)" - line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 723, "(1)" - line 257, "pan.___", state 735, "(1)" - line 261, "pan.___", state 743, "(1)" - line 272, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 820, "(1)" - line 284, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 843, "(1)" - line 253, "pan.___", state 851, "(1)" - line 257, "pan.___", state 863, "(1)" - line 261, "pan.___", state 871, "(1)" - line 272, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 911, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 924, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 933, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 949, "(1)" - line 253, "pan.___", state 957, "(1)" - line 257, "pan.___", state 969, "(1)" - line 261, "pan.___", state 977, "(1)" - line 276, "pan.___", state 1003, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1016, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1025, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1041, "(1)" - line 253, "pan.___", state 1049, "(1)" - line 257, "pan.___", state 1061, "(1)" - line 261, "pan.___", state 1069, "(1)" - line 272, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1109, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1122, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1131, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1147, "(1)" - line 253, "pan.___", state 1155, "(1)" - line 257, "pan.___", state 1167, "(1)" - line 261, "pan.___", state 1175, "(1)" - line 276, "pan.___", state 1201, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1214, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1239, "(1)" - line 253, "pan.___", state 1247, "(1)" - line 257, "pan.___", state 1259, "(1)" - line 261, "pan.___", state 1267, "(1)" - line 272, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1307, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1320, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1329, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1345, "(1)" - line 253, "pan.___", state 1353, "(1)" - line 257, "pan.___", state 1365, "(1)" - line 261, "pan.___", state 1373, "(1)" - line 276, "pan.___", state 1399, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1412, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1421, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1437, "(1)" - line 253, "pan.___", state 1445, "(1)" - line 257, "pan.___", state 1457, "(1)" - line 261, "pan.___", state 1465, "(1)" - line 272, "pan.___", state 1496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1518, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1543, "(1)" - line 253, "pan.___", state 1551, "(1)" - line 257, "pan.___", state 1563, "(1)" - line 261, "pan.___", state 1571, "(1)" - line 1237, "pan.___", state 1587, "-end-" - (103 of 1587 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 2.7e+03 seconds -pan: rate 25814.341 states/second -pan: avg transition delay 2.7843e-06 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.spin.input b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.spin.input deleted file mode 100644 index 80445f6..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_RMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.log b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.log deleted file mode 100644 index 319fbe9..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.log +++ /dev/null @@ -1,530 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 9172 States= 1e+06 Transitions= 6.87e+06 Memory= 550.432 t= 17 R= 6e+04 -Depth= 9172 States= 2e+06 Transitions= 1.47e+07 Memory= 634.318 t= 37.6 R= 5e+04 -Depth= 9172 States= 3e+06 Transitions= 2.46e+07 Memory= 718.303 t= 64.2 R= 5e+04 -pan: resizing hashtable to -w22.. done -Depth= 9172 States= 4e+06 Transitions= 3.19e+07 Memory= 833.311 t= 83.2 R= 5e+04 -Depth= 9172 States= 5e+06 Transitions= 3.95e+07 Memory= 917.295 t= 103 R= 5e+04 -Depth= 9172 States= 6e+06 Transitions= 5.71e+07 Memory= 1001.279 t= 152 R= 4e+04 -Depth= 9172 States= 7e+06 Transitions= 6.81e+07 Memory= 1085.264 t= 182 R= 4e+04 -Depth= 9172 States= 8e+06 Transitions= 8.22e+07 Memory= 1169.151 t= 221 R= 4e+04 -Depth= 9172 States= 9e+06 Transitions= 9.54e+07 Memory= 1253.135 t= 258 R= 3e+04 -pan: resizing hashtable to -w24.. done -Depth= 9172 States= 1e+07 Transitions= 1.08e+08 Memory= 1461.115 t= 295 R= 3e+04 -Depth= 9172 States= 1.1e+07 Transitions= 1.2e+08 Memory= 1545.100 t= 327 R= 3e+04 -Depth= 9172 States= 1.2e+07 Transitions= 1.27e+08 Memory= 1629.084 t= 344 R= 3e+04 -Depth= 9172 States= 1.3e+07 Transitions= 1.35e+08 Memory= 1713.068 t= 365 R= 4e+04 -Depth= 9172 States= 1.4e+07 Transitions= 1.46e+08 Memory= 1797.053 t= 394 R= 4e+04 -Depth= 9172 States= 1.5e+07 Transitions= 1.53e+08 Memory= 1881.037 t= 413 R= 4e+04 -Depth= 9172 States= 1.6e+07 Transitions= 1.6e+08 Memory= 1964.924 t= 432 R= 4e+04 -Depth= 9172 States= 1.7e+07 Transitions= 1.76e+08 Memory= 2048.908 t= 475 R= 4e+04 -Depth= 9172 States= 1.8e+07 Transitions= 1.9e+08 Memory= 2132.893 t= 515 R= 3e+04 -Depth= 9172 States= 1.9e+07 Transitions= 2.02e+08 Memory= 2216.877 t= 548 R= 3e+04 -Depth= 9172 States= 2e+07 Transitions= 2.15e+08 Memory= 2300.861 t= 585 R= 3e+04 -Depth= 9172 States= 2.1e+07 Transitions= 2.25e+08 Memory= 2384.846 t= 610 R= 3e+04 -Depth= 9172 States= 2.2e+07 Transitions= 2.38e+08 Memory= 2468.830 t= 646 R= 3e+04 -Depth= 9172 States= 2.3e+07 Transitions= 2.67e+08 Memory= 2552.717 t= 732 R= 3e+04 -Depth= 9172 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2636.701 t= 785 R= 3e+04 -Depth= 9172 States= 2.5e+07 Transitions= 3.03e+08 Memory= 2720.686 t= 832 R= 3e+04 -Depth= 9172 States= 2.6e+07 Transitions= 3.12e+08 Memory= 2804.670 t= 857 R= 3e+04 -Depth= 9172 States= 2.7e+07 Transitions= 3.27e+08 Memory= 2888.654 t= 899 R= 3e+04 -Depth= 9172 States= 2.8e+07 Transitions= 3.57e+08 Memory= 2972.639 t= 987 R= 3e+04 -Depth= 9172 States= 2.9e+07 Transitions= 3.73e+08 Memory= 3056.526 t= 1.03e+03 R= 3e+04 -Depth= 9172 States= 3e+07 Transitions= 3.86e+08 Memory= 3140.510 t= 1.07e+03 R= 3e+04 -Depth= 9172 States= 3.1e+07 Transitions= 4.03e+08 Memory= 3224.494 t= 1.12e+03 R= 3e+04 -Depth= 9172 States= 3.2e+07 Transitions= 4.22e+08 Memory= 3308.479 t= 1.17e+03 R= 3e+04 -Depth= 9172 States= 3.3e+07 Transitions= 4.39e+08 Memory= 3392.463 t= 1.22e+03 R= 3e+04 -Depth= 9172 States= 3.4e+07 Transitions= 4.56e+08 Memory= 3476.447 t= 1.27e+03 R= 3e+04 -pan: resizing hashtable to -w26.. done -Depth= 9234 States= 3.5e+07 Transitions= 4.73e+08 Memory= 4056.416 t= 1.33e+03 R= 3e+04 -Depth= 9234 States= 3.6e+07 Transitions= 4.85e+08 Memory= 4140.401 t= 1.36e+03 R= 3e+04 -Depth= 9273 States= 3.7e+07 Transitions= 5e+08 Memory= 4224.385 t= 1.4e+03 R= 3e+04 -Depth= 9273 States= 3.8e+07 Transitions= 5.14e+08 Memory= 4308.369 t= 1.44e+03 R= 3e+04 -Depth= 9273 States= 3.9e+07 Transitions= 5.26e+08 Memory= 4392.354 t= 1.47e+03 R= 3e+04 -Depth= 9273 States= 4e+07 Transitions= 5.39e+08 Memory= 4476.338 t= 1.51e+03 R= 3e+04 -Depth= 9273 States= 4.1e+07 Transitions= 5.5e+08 Memory= 4560.322 t= 1.54e+03 R= 3e+04 -Depth= 9273 States= 4.2e+07 Transitions= 5.64e+08 Memory= 4644.209 t= 1.58e+03 R= 3e+04 -Depth= 9273 States= 4.3e+07 Transitions= 5.75e+08 Memory= 4728.193 t= 1.61e+03 R= 3e+04 -Depth= 9273 States= 4.4e+07 Transitions= 5.86e+08 Memory= 4812.178 t= 1.64e+03 R= 3e+04 -Depth= 9273 States= 4.5e+07 Transitions= 6.01e+08 Memory= 4896.162 t= 1.68e+03 R= 3e+04 -Depth= 9273 States= 4.6e+07 Transitions= 6.16e+08 Memory= 4980.147 t= 1.72e+03 R= 3e+04 -Depth= 9273 States= 4.7e+07 Transitions= 6.29e+08 Memory= 5064.131 t= 1.76e+03 R= 3e+04 -Depth= 9273 States= 4.8e+07 Transitions= 6.4e+08 Memory= 5148.018 t= 1.79e+03 R= 3e+04 -Depth= 9273 States= 4.9e+07 Transitions= 6.51e+08 Memory= 5232.002 t= 1.82e+03 R= 3e+04 -Depth= 9273 States= 5e+07 Transitions= 6.66e+08 Memory= 5315.986 t= 1.86e+03 R= 3e+04 -Depth= 9273 States= 5.1e+07 Transitions= 6.8e+08 Memory= 5399.971 t= 1.9e+03 R= 3e+04 -Depth= 9273 States= 5.2e+07 Transitions= 6.9e+08 Memory= 5483.955 t= 1.93e+03 R= 3e+04 -Depth= 9273 States= 5.3e+07 Transitions= 7.01e+08 Memory= 5567.940 t= 1.96e+03 R= 3e+04 -Depth= 9273 States= 5.4e+07 Transitions= 7.14e+08 Memory= 5651.826 t= 1.99e+03 R= 3e+04 -Depth= 9273 States= 5.5e+07 Transitions= 7.26e+08 Memory= 5735.811 t= 2.02e+03 R= 3e+04 -Depth= 9273 States= 5.6e+07 Transitions= 7.44e+08 Memory= 5819.795 t= 2.07e+03 R= 3e+04 -Depth= 9273 States= 5.7e+07 Transitions= 7.57e+08 Memory= 5903.779 t= 2.11e+03 R= 3e+04 -Depth= 9273 States= 5.8e+07 Transitions= 7.72e+08 Memory= 5987.764 t= 2.15e+03 R= 3e+04 -Depth= 9273 States= 5.9e+07 Transitions= 7.87e+08 Memory= 6071.748 t= 2.19e+03 R= 3e+04 -Depth= 9273 States= 6e+07 Transitions= 8.03e+08 Memory= 6155.733 t= 2.24e+03 R= 3e+04 -Depth= 9273 States= 6.1e+07 Transitions= 8.18e+08 Memory= 6239.619 t= 2.28e+03 R= 3e+04 -Depth= 9273 States= 6.2e+07 Transitions= 8.31e+08 Memory= 6323.604 t= 2.31e+03 R= 3e+04 -Depth= 9273 States= 6.3e+07 Transitions= 8.38e+08 Memory= 6407.588 t= 2.33e+03 R= 3e+04 -Depth= 9273 States= 6.4e+07 Transitions= 8.46e+08 Memory= 6491.572 t= 2.35e+03 R= 3e+04 -Depth= 9273 States= 6.5e+07 Transitions= 8.56e+08 Memory= 6575.557 t= 2.38e+03 R= 3e+04 -Depth= 9273 States= 6.6e+07 Transitions= 8.63e+08 Memory= 6659.541 t= 2.4e+03 R= 3e+04 -Depth= 9273 States= 6.7e+07 Transitions= 8.7e+08 Memory= 6743.428 t= 2.42e+03 R= 3e+04 -Depth= 9273 States= 6.8e+07 Transitions= 8.88e+08 Memory= 6827.412 t= 2.47e+03 R= 3e+04 -Depth= 9273 States= 6.9e+07 Transitions= 9e+08 Memory= 6911.397 t= 2.5e+03 R= 3e+04 -pan: claim violated! (at depth 1431) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 9273, errors: 1 - 69874699 states, stored -8.4222224e+08 states, matched -9.1209694e+08 transitions (= stored+matched) -1.3919028e+10 atomic steps -hash conflicts: 5.0632776e+08 (resolved) - -Stats on memory usage (in Megabytes): - 7729.974 equivalent memory usage for states (stored*(State-vector + overhead)) - 6018.458 actual memory usage for states (compression: 77.86%) - state-vector as stored = 62 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 3.388 memory lost to fragmentation - 6984.834 total actual memory usage - -unreached in proctype urcu_reader - line 272, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 77, "(1)" - line 253, "pan.___", state 85, "(1)" - line 257, "pan.___", state 97, "(1)" - line 261, "pan.___", state 105, "(1)" - line 411, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 195, "(1)" - line 257, "pan.___", state 215, "(1)" - line 261, "pan.___", state 223, "(1)" - line 691, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 313, "(1)" - line 257, "pan.___", state 333, "(1)" - line 261, "pan.___", state 341, "(1)" - line 411, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 424, "(1)" - line 257, "pan.___", state 444, "(1)" - line 261, "pan.___", state 452, "(1)" - line 411, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 475, "(1)" - line 411, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 476, "else" - line 411, "pan.___", state 479, "(1)" - line 415, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 489, "(1)" - line 415, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 490, "else" - line 415, "pan.___", state 493, "(1)" - line 415, "pan.___", state 494, "(1)" - line 415, "pan.___", state 494, "(1)" - line 413, "pan.___", state 499, "((i<1))" - line 413, "pan.___", state 499, "((i>=1))" - line 420, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 507, "(1)" - line 420, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 508, "else" - line 420, "pan.___", state 511, "(1)" - line 420, "pan.___", state 512, "(1)" - line 420, "pan.___", state 512, "(1)" - line 424, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 521, "(1)" - line 424, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 522, "else" - line 424, "pan.___", state 525, "(1)" - line 424, "pan.___", state 526, "(1)" - line 424, "pan.___", state 526, "(1)" - line 422, "pan.___", state 531, "((i<2))" - line 422, "pan.___", state 531, "((i>=2))" - line 249, "pan.___", state 537, "(1)" - line 253, "pan.___", state 545, "(1)" - line 253, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 546, "else" - line 251, "pan.___", state 551, "((i<1))" - line 251, "pan.___", state 551, "((i>=1))" - line 257, "pan.___", state 557, "(1)" - line 257, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 558, "else" - line 261, "pan.___", state 565, "(1)" - line 261, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 566, "else" - line 259, "pan.___", state 571, "((i<2))" - line 259, "pan.___", state 571, "((i>=2))" - line 266, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 575, "else" - line 431, "pan.___", state 577, "(1)" - line 431, "pan.___", state 577, "(1)" - line 691, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 691, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 691, "pan.___", state 582, "(1)" - line 411, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 653, "(1)" - line 257, "pan.___", state 673, "(1)" - line 261, "pan.___", state 681, "(1)" - line 411, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 771, "(1)" - line 257, "pan.___", state 791, "(1)" - line 261, "pan.___", state 799, "(1)" - line 411, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 820, "(1)" - line 411, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 821, "else" - line 411, "pan.___", state 824, "(1)" - line 415, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 834, "(1)" - line 415, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 835, "else" - line 415, "pan.___", state 838, "(1)" - line 415, "pan.___", state 839, "(1)" - line 415, "pan.___", state 839, "(1)" - line 413, "pan.___", state 844, "((i<1))" - line 413, "pan.___", state 844, "((i>=1))" - line 420, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 852, "(1)" - line 420, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 853, "else" - line 420, "pan.___", state 856, "(1)" - line 420, "pan.___", state 857, "(1)" - line 420, "pan.___", state 857, "(1)" - line 424, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 866, "(1)" - line 424, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 867, "else" - line 424, "pan.___", state 870, "(1)" - line 424, "pan.___", state 871, "(1)" - line 424, "pan.___", state 871, "(1)" - line 422, "pan.___", state 876, "((i<2))" - line 422, "pan.___", state 876, "((i>=2))" - line 249, "pan.___", state 882, "(1)" - line 253, "pan.___", state 890, "(1)" - line 253, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 891, "else" - line 251, "pan.___", state 896, "((i<1))" - line 251, "pan.___", state 896, "((i>=1))" - line 257, "pan.___", state 902, "(1)" - line 257, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 903, "else" - line 261, "pan.___", state 910, "(1)" - line 261, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 911, "else" - line 259, "pan.___", state 916, "((i<2))" - line 259, "pan.___", state 916, "((i>=2))" - line 266, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 920, "else" - line 431, "pan.___", state 922, "(1)" - line 431, "pan.___", state 922, "(1)" - line 699, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 995, "(1)" - line 257, "pan.___", state 1015, "(1)" - line 261, "pan.___", state 1023, "(1)" - line 411, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1109, "(1)" - line 257, "pan.___", state 1129, "(1)" - line 261, "pan.___", state 1137, "(1)" - line 411, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1224, "(1)" - line 257, "pan.___", state 1244, "(1)" - line 261, "pan.___", state 1252, "(1)" - line 411, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1335, "(1)" - line 257, "pan.___", state 1355, "(1)" - line 261, "pan.___", state 1363, "(1)" - line 411, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1451, "(1)" - line 257, "pan.___", state 1471, "(1)" - line 261, "pan.___", state 1479, "(1)" - line 411, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1562, "(1)" - line 257, "pan.___", state 1582, "(1)" - line 261, "pan.___", state 1590, "(1)" - line 411, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1676, "(1)" - line 257, "pan.___", state 1696, "(1)" - line 261, "pan.___", state 1704, "(1)" - line 738, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1794, "(1)" - line 257, "pan.___", state 1814, "(1)" - line 261, "pan.___", state 1822, "(1)" - line 411, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1905, "(1)" - line 257, "pan.___", state 1925, "(1)" - line 261, "pan.___", state 1933, "(1)" - line 411, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 1956, "(1)" - line 411, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 1957, "else" - line 411, "pan.___", state 1960, "(1)" - line 415, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1970, "(1)" - line 415, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 1971, "else" - line 415, "pan.___", state 1974, "(1)" - line 415, "pan.___", state 1975, "(1)" - line 415, "pan.___", state 1975, "(1)" - line 413, "pan.___", state 1980, "((i<1))" - line 413, "pan.___", state 1980, "((i>=1))" - line 420, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1988, "(1)" - line 420, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 1989, "else" - line 420, "pan.___", state 1992, "(1)" - line 420, "pan.___", state 1993, "(1)" - line 420, "pan.___", state 1993, "(1)" - line 424, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2002, "(1)" - line 424, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2003, "else" - line 424, "pan.___", state 2006, "(1)" - line 424, "pan.___", state 2007, "(1)" - line 424, "pan.___", state 2007, "(1)" - line 422, "pan.___", state 2012, "((i<2))" - line 422, "pan.___", state 2012, "((i>=2))" - line 249, "pan.___", state 2018, "(1)" - line 253, "pan.___", state 2026, "(1)" - line 253, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2027, "else" - line 251, "pan.___", state 2032, "((i<1))" - line 251, "pan.___", state 2032, "((i>=1))" - line 257, "pan.___", state 2038, "(1)" - line 257, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2039, "else" - line 261, "pan.___", state 2046, "(1)" - line 261, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2047, "else" - line 259, "pan.___", state 2052, "((i<2))" - line 259, "pan.___", state 2052, "((i>=2))" - line 266, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2056, "else" - line 431, "pan.___", state 2058, "(1)" - line 431, "pan.___", state 2058, "(1)" - line 738, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 738, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 738, "pan.___", state 2063, "(1)" - line 411, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2134, "(1)" - line 257, "pan.___", state 2154, "(1)" - line 261, "pan.___", state 2162, "(1)" - line 411, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2251, "(1)" - line 257, "pan.___", state 2271, "(1)" - line 261, "pan.___", state 2279, "(1)" - line 411, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2362, "(1)" - line 257, "pan.___", state 2382, "(1)" - line 261, "pan.___", state 2390, "(1)" - line 249, "pan.___", state 2421, "(1)" - line 257, "pan.___", state 2441, "(1)" - line 261, "pan.___", state 2449, "(1)" - line 249, "pan.___", state 2464, "(1)" - line 257, "pan.___", state 2484, "(1)" - line 261, "pan.___", state 2492, "(1)" - line 898, "pan.___", state 2509, "-end-" - (221 of 2509 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 19, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 33, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 83, "(1)" - line 253, "pan.___", state 91, "(1)" - line 272, "pan.___", state 132, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 134, "(1)" - line 276, "pan.___", state 141, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 143, "(1)" - line 276, "pan.___", state 144, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 144, "else" - line 274, "pan.___", state 149, "((i<1))" - line 274, "pan.___", state 149, "((i>=1))" - line 280, "pan.___", state 154, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 156, "(1)" - line 280, "pan.___", state 157, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 157, "else" - line 284, "pan.___", state 163, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 165, "(1)" - line 284, "pan.___", state 166, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 166, "else" - line 289, "pan.___", state 175, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 289, "pan.___", state 175, "else" - line 411, "pan.___", state 194, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 208, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 226, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 240, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 258, "(1)" - line 253, "pan.___", state 266, "(1)" - line 257, "pan.___", state 278, "(1)" - line 261, "pan.___", state 286, "(1)" - line 415, "pan.___", state 321, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 339, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 353, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 379, "(1)" - line 257, "pan.___", state 391, "(1)" - line 261, "pan.___", state 399, "(1)" - line 415, "pan.___", state 442, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 460, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 474, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 500, "(1)" - line 257, "pan.___", state 512, "(1)" - line 261, "pan.___", state 520, "(1)" - line 415, "pan.___", state 553, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 571, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 585, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 611, "(1)" - line 257, "pan.___", state 623, "(1)" - line 261, "pan.___", state 631, "(1)" - line 415, "pan.___", state 666, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 684, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 698, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 724, "(1)" - line 257, "pan.___", state 736, "(1)" - line 261, "pan.___", state 744, "(1)" - line 272, "pan.___", state 797, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 806, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 844, "(1)" - line 253, "pan.___", state 852, "(1)" - line 257, "pan.___", state 864, "(1)" - line 261, "pan.___", state 872, "(1)" - line 272, "pan.___", state 903, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 912, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 925, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 934, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 950, "(1)" - line 253, "pan.___", state 958, "(1)" - line 257, "pan.___", state 970, "(1)" - line 261, "pan.___", state 978, "(1)" - line 276, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1042, "(1)" - line 253, "pan.___", state 1050, "(1)" - line 257, "pan.___", state 1062, "(1)" - line 261, "pan.___", state 1070, "(1)" - line 272, "pan.___", state 1101, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1110, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1123, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1132, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1148, "(1)" - line 253, "pan.___", state 1156, "(1)" - line 257, "pan.___", state 1168, "(1)" - line 261, "pan.___", state 1176, "(1)" - line 276, "pan.___", state 1202, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1215, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1224, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1240, "(1)" - line 253, "pan.___", state 1248, "(1)" - line 257, "pan.___", state 1260, "(1)" - line 261, "pan.___", state 1268, "(1)" - line 272, "pan.___", state 1299, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1308, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1321, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1330, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1346, "(1)" - line 253, "pan.___", state 1354, "(1)" - line 257, "pan.___", state 1366, "(1)" - line 261, "pan.___", state 1374, "(1)" - line 276, "pan.___", state 1400, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1413, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1422, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1438, "(1)" - line 253, "pan.___", state 1446, "(1)" - line 257, "pan.___", state 1458, "(1)" - line 261, "pan.___", state 1466, "(1)" - line 272, "pan.___", state 1497, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1506, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1519, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1528, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1544, "(1)" - line 253, "pan.___", state 1552, "(1)" - line 257, "pan.___", state 1564, "(1)" - line 261, "pan.___", state 1572, "(1)" - line 1237, "pan.___", state 1588, "-end-" - (109 of 1588 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 2.53e+03 seconds -pan: rate 27617.257 states/second -pan: avg transition delay 2.7739e-06 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input deleted file mode 100644 index 511c963..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_WMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index 62969b9..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1434 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4177 -2:3:4097 -3:3:4100 -4:3:4100 -5:3:4103 -6:3:4111 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-1430:2:3397 -1431:0:4181 -1432:1:2165 diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.log b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.log deleted file mode 100644 index 3fc8991..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.log +++ /dev/null @@ -1,635 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 9112 States= 1e+06 Transitions= 7.1e+06 Memory= 550.432 t= 17.4 R= 6e+04 -Depth= 9112 States= 2e+06 Transitions= 1.64e+07 Memory= 634.318 t= 41.8 R= 5e+04 -Depth= 9112 States= 3e+06 Transitions= 2.63e+07 Memory= 718.303 t= 68.2 R= 4e+04 -pan: resizing hashtable to -w22.. done -Depth= 9112 States= 4e+06 Transitions= 3.56e+07 Memory= 833.311 t= 93.2 R= 4e+04 -Depth= 9112 States= 5e+06 Transitions= 4.66e+07 Memory= 917.295 t= 122 R= 4e+04 -Depth= 9112 States= 6e+06 Transitions= 5.77e+07 Memory= 1001.279 t= 152 R= 4e+04 -Depth= 9112 States= 7e+06 Transitions= 6.72e+07 Memory= 1085.264 t= 177 R= 4e+04 -Depth= 9112 States= 8e+06 Transitions= 7.41e+07 Memory= 1169.151 t= 194 R= 4e+04 -Depth= 9112 States= 9e+06 Transitions= 8.11e+07 Memory= 1253.135 t= 212 R= 4e+04 -pan: resizing hashtable to -w24.. done -Depth= 9112 States= 1e+07 Transitions= 8.81e+07 Memory= 1461.115 t= 231 R= 4e+04 -Depth= 9112 States= 1.1e+07 Transitions= 9.84e+07 Memory= 1545.100 t= 259 R= 4e+04 -Depth= 9112 States= 1.2e+07 Transitions= 1.08e+08 Memory= 1629.084 t= 282 R= 4e+04 -Depth= 9112 States= 1.3e+07 Transitions= 1.16e+08 Memory= 1713.068 t= 304 R= 4e+04 -Depth= 9112 States= 1.4e+07 Transitions= 1.25e+08 Memory= 1797.053 t= 329 R= 4e+04 -Depth= 9112 States= 1.5e+07 Transitions= 1.35e+08 Memory= 1881.037 t= 352 R= 4e+04 -Depth= 9278 States= 1.6e+07 Transitions= 1.45e+08 Memory= 1964.924 t= 382 R= 4e+04 -Depth= 9283 States= 1.7e+07 Transitions= 1.56e+08 Memory= 2048.908 t= 409 R= 4e+04 -Depth= 9283 States= 1.8e+07 Transitions= 1.66e+08 Memory= 2132.893 t= 437 R= 4e+04 -Depth= 9283 States= 1.9e+07 Transitions= 1.76e+08 Memory= 2216.877 t= 464 R= 4e+04 -Depth= 9283 States= 2e+07 Transitions= 1.87e+08 Memory= 2300.861 t= 493 R= 4e+04 -Depth= 9283 States= 2.1e+07 Transitions= 1.97e+08 Memory= 2384.846 t= 521 R= 4e+04 -Depth= 9283 States= 2.2e+07 Transitions= 2.08e+08 Memory= 2468.830 t= 549 R= 4e+04 -Depth= 9283 States= 2.3e+07 Transitions= 2.17e+08 Memory= 2552.717 t= 572 R= 4e+04 -Depth= 9283 States= 2.4e+07 Transitions= 2.26e+08 Memory= 2636.701 t= 596 R= 4e+04 -Depth= 9283 States= 2.5e+07 Transitions= 2.37e+08 Memory= 2720.686 t= 627 R= 4e+04 -Depth= 9283 States= 2.6e+07 Transitions= 2.49e+08 Memory= 2804.670 t= 659 R= 4e+04 -Depth= 9283 States= 2.7e+07 Transitions= 2.6e+08 Memory= 2888.654 t= 689 R= 4e+04 -Depth= 9283 States= 2.8e+07 Transitions= 2.71e+08 Memory= 2972.639 t= 718 R= 4e+04 -Depth= 9283 States= 2.9e+07 Transitions= 2.8e+08 Memory= 3056.526 t= 741 R= 4e+04 -Depth= 9283 States= 3e+07 Transitions= 2.89e+08 Memory= 3140.510 t= 764 R= 4e+04 -Depth= 9283 States= 3.1e+07 Transitions= 2.99e+08 Memory= 3224.494 t= 791 R= 4e+04 -Depth= 9283 States= 3.2e+07 Transitions= 3.09e+08 Memory= 3308.479 t= 818 R= 4e+04 -Depth= 9283 States= 3.3e+07 Transitions= 3.19e+08 Memory= 3392.463 t= 846 R= 4e+04 -Depth= 9283 States= 3.4e+07 Transitions= 3.29e+08 Memory= 3476.447 t= 873 R= 4e+04 -pan: resizing hashtable to -w26.. done -Depth= 9283 States= 3.5e+07 Transitions= 3.39e+08 Memory= 4056.416 t= 908 R= 4e+04 -Depth= 9283 States= 3.6e+07 Transitions= 3.49e+08 Memory= 4140.401 t= 934 R= 4e+04 -Depth= 9283 States= 3.7e+07 Transitions= 3.59e+08 Memory= 4224.385 t= 959 R= 4e+04 -pan: claim violated! (at depth 1298) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 9283, errors: 1 - 37684654 states, stored -3.2905753e+08 states, matched -3.6674218e+08 transitions (= stored+matched) -5.3145922e+09 atomic steps -hash conflicts: 2.6456917e+08 (resolved) - -Stats on memory usage (in Megabytes): - 4168.911 equivalent memory usage for states (stored*(State-vector + overhead)) - 3314.050 actual memory usage for states (compression: 79.49%) - state-vector as stored = 64 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 1.910 memory lost to fragmentation - 4281.904 total actual memory usage - -unreached in proctype urcu_reader - line 272, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 77, "(1)" - line 253, "pan.___", state 85, "(1)" - line 257, "pan.___", state 97, "(1)" - line 261, "pan.___", state 105, "(1)" - line 411, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 195, "(1)" - line 257, "pan.___", state 215, "(1)" - line 261, "pan.___", state 223, "(1)" - line 691, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 313, "(1)" - line 257, "pan.___", state 333, "(1)" - line 261, "pan.___", state 341, "(1)" - line 411, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 424, "(1)" - line 257, "pan.___", state 444, "(1)" - line 261, "pan.___", state 452, "(1)" - line 411, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 475, "(1)" - line 411, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 476, "else" - line 411, "pan.___", state 479, "(1)" - line 415, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 489, "(1)" - line 415, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 490, "else" - line 415, "pan.___", state 493, "(1)" - line 415, "pan.___", state 494, "(1)" - line 415, "pan.___", state 494, "(1)" - line 413, "pan.___", state 499, "((i<1))" - line 413, "pan.___", state 499, "((i>=1))" - line 420, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 507, "(1)" - line 420, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 508, "else" - line 420, "pan.___", state 511, "(1)" - line 420, "pan.___", state 512, "(1)" - line 420, "pan.___", state 512, "(1)" - line 424, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 521, "(1)" - line 424, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 522, "else" - line 424, "pan.___", state 525, "(1)" - line 424, "pan.___", state 526, "(1)" - line 424, "pan.___", state 526, "(1)" - line 422, "pan.___", state 531, "((i<2))" - line 422, "pan.___", state 531, "((i>=2))" - line 249, "pan.___", state 537, "(1)" - line 253, "pan.___", state 545, "(1)" - line 253, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 546, "else" - line 251, "pan.___", state 551, "((i<1))" - line 251, "pan.___", state 551, "((i>=1))" - line 257, "pan.___", state 557, "(1)" - line 257, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 558, "else" - line 261, "pan.___", state 565, "(1)" - line 261, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 566, "else" - line 259, "pan.___", state 571, "((i<2))" - line 259, "pan.___", state 571, "((i>=2))" - line 266, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 575, "else" - line 431, "pan.___", state 577, "(1)" - line 431, "pan.___", state 577, "(1)" - line 691, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 691, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 691, "pan.___", state 582, "(1)" - line 411, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 653, "(1)" - line 257, "pan.___", state 673, "(1)" - line 261, "pan.___", state 681, "(1)" - line 411, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 771, "(1)" - line 257, "pan.___", state 791, "(1)" - line 261, "pan.___", state 799, "(1)" - line 411, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 820, "(1)" - line 411, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 821, "else" - line 411, "pan.___", state 824, "(1)" - line 415, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 834, "(1)" - line 415, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 835, "else" - line 415, "pan.___", state 838, "(1)" - line 415, "pan.___", state 839, "(1)" - line 415, "pan.___", state 839, "(1)" - line 413, "pan.___", state 844, "((i<1))" - line 413, "pan.___", state 844, "((i>=1))" - line 420, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 852, "(1)" - line 420, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 853, "else" - line 420, "pan.___", state 856, "(1)" - line 420, "pan.___", state 857, "(1)" - line 420, "pan.___", state 857, "(1)" - line 424, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 866, "(1)" - line 424, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 867, "else" - line 424, "pan.___", state 870, "(1)" - line 424, "pan.___", state 871, "(1)" - line 424, "pan.___", state 871, "(1)" - line 422, "pan.___", state 876, "((i<2))" - line 422, "pan.___", state 876, "((i>=2))" - line 249, "pan.___", state 882, "(1)" - line 253, "pan.___", state 890, "(1)" - line 253, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 891, "else" - line 251, "pan.___", state 896, "((i<1))" - line 251, "pan.___", state 896, "((i>=1))" - line 257, "pan.___", state 902, "(1)" - line 257, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 903, "else" - line 261, "pan.___", state 910, "(1)" - line 261, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 911, "else" - line 259, "pan.___", state 916, "((i<2))" - line 259, "pan.___", state 916, "((i>=2))" - line 266, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 920, "else" - line 431, "pan.___", state 922, "(1)" - line 431, "pan.___", state 922, "(1)" - line 699, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 995, "(1)" - line 257, "pan.___", state 1015, "(1)" - line 261, "pan.___", state 1023, "(1)" - line 411, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1109, "(1)" - line 257, "pan.___", state 1129, "(1)" - line 261, "pan.___", state 1137, "(1)" - line 411, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1224, "(1)" - line 257, "pan.___", state 1244, "(1)" - line 261, "pan.___", state 1252, "(1)" - line 411, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1335, "(1)" - line 257, "pan.___", state 1355, "(1)" - line 261, "pan.___", state 1363, "(1)" - line 411, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1451, "(1)" - line 257, "pan.___", state 1471, "(1)" - line 261, "pan.___", state 1479, "(1)" - line 411, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1562, "(1)" - line 257, "pan.___", state 1582, "(1)" - line 261, "pan.___", state 1590, "(1)" - line 411, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1676, "(1)" - line 257, "pan.___", state 1696, "(1)" - line 261, "pan.___", state 1704, "(1)" - line 738, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1794, "(1)" - line 257, "pan.___", state 1814, "(1)" - line 261, "pan.___", state 1822, "(1)" - line 411, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1905, "(1)" - line 257, "pan.___", state 1925, "(1)" - line 261, "pan.___", state 1933, "(1)" - line 411, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 1956, "(1)" - line 411, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 1957, "else" - line 411, "pan.___", state 1960, "(1)" - line 415, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1970, "(1)" - line 415, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 1971, "else" - line 415, "pan.___", state 1974, "(1)" - line 415, "pan.___", state 1975, "(1)" - line 415, "pan.___", state 1975, "(1)" - line 413, "pan.___", state 1980, "((i<1))" - line 413, "pan.___", state 1980, "((i>=1))" - line 420, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1988, "(1)" - line 420, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 1989, "else" - line 420, "pan.___", state 1992, "(1)" - line 420, "pan.___", state 1993, "(1)" - line 420, "pan.___", state 1993, "(1)" - line 424, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2002, "(1)" - line 424, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2003, "else" - line 424, "pan.___", state 2006, "(1)" - line 424, "pan.___", state 2007, "(1)" - line 424, "pan.___", state 2007, "(1)" - line 422, "pan.___", state 2012, "((i<2))" - line 422, "pan.___", state 2012, "((i>=2))" - line 249, "pan.___", state 2018, "(1)" - line 253, "pan.___", state 2026, "(1)" - line 253, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2027, "else" - line 251, "pan.___", state 2032, "((i<1))" - line 251, "pan.___", state 2032, "((i>=1))" - line 257, "pan.___", state 2038, "(1)" - line 257, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2039, "else" - line 261, "pan.___", state 2046, "(1)" - line 261, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2047, "else" - line 259, "pan.___", state 2052, "((i<2))" - line 259, "pan.___", state 2052, "((i>=2))" - line 266, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2056, "else" - line 431, "pan.___", state 2058, "(1)" - line 431, "pan.___", state 2058, "(1)" - line 738, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 738, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 738, "pan.___", state 2063, "(1)" - line 411, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2134, "(1)" - line 257, "pan.___", state 2154, "(1)" - line 261, "pan.___", state 2162, "(1)" - line 411, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2251, "(1)" - line 257, "pan.___", state 2271, "(1)" - line 261, "pan.___", state 2279, "(1)" - line 411, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2362, "(1)" - line 257, "pan.___", state 2382, "(1)" - line 261, "pan.___", state 2390, "(1)" - line 249, "pan.___", state 2421, "(1)" - line 257, "pan.___", state 2441, "(1)" - line 261, "pan.___", state 2449, "(1)" - line 249, "pan.___", state 2464, "(1)" - line 257, "pan.___", state 2484, "(1)" - line 261, "pan.___", state 2492, "(1)" - line 898, "pan.___", state 2509, "-end-" - (221 of 2509 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 22, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 36, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 54, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 86, "(1)" - line 253, "pan.___", state 94, "(1)" - line 257, "pan.___", state 106, "(1)" - line 272, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 144, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 157, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 211, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 229, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 243, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 261, "(1)" - line 253, "pan.___", state 269, "(1)" - line 257, "pan.___", state 281, "(1)" - line 261, "pan.___", state 289, "(1)" - line 415, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 342, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 356, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 382, "(1)" - line 257, "pan.___", state 394, "(1)" - line 261, "pan.___", state 402, "(1)" - line 411, "pan.___", state 430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 444, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 462, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 476, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 494, "(1)" - line 253, "pan.___", state 502, "(1)" - line 257, "pan.___", state 514, "(1)" - line 261, "pan.___", state 522, "(1)" - line 411, "pan.___", state 541, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 543, "(1)" - line 411, "pan.___", state 544, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 544, "else" - line 411, "pan.___", state 547, "(1)" - line 415, "pan.___", state 555, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 557, "(1)" - line 415, "pan.___", state 558, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 558, "else" - line 415, "pan.___", state 561, "(1)" - line 415, "pan.___", state 562, "(1)" - line 415, "pan.___", state 562, "(1)" - line 413, "pan.___", state 567, "((i<1))" - line 413, "pan.___", state 567, "((i>=1))" - line 420, "pan.___", state 573, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 575, "(1)" - line 420, "pan.___", state 576, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 576, "else" - line 420, "pan.___", state 579, "(1)" - line 420, "pan.___", state 580, "(1)" - line 420, "pan.___", state 580, "(1)" - line 424, "pan.___", state 587, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 589, "(1)" - line 424, "pan.___", state 590, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 590, "else" - line 424, "pan.___", state 593, "(1)" - line 424, "pan.___", state 594, "(1)" - line 424, "pan.___", state 594, "(1)" - line 422, "pan.___", state 599, "((i<2))" - line 422, "pan.___", state 599, "((i>=2))" - line 249, "pan.___", state 605, "(1)" - line 253, "pan.___", state 613, "(1)" - line 253, "pan.___", state 614, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 614, "else" - line 251, "pan.___", state 619, "((i<1))" - line 251, "pan.___", state 619, "((i>=1))" - line 257, "pan.___", state 625, "(1)" - line 257, "pan.___", state 626, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 626, "else" - line 261, "pan.___", state 633, "(1)" - line 261, "pan.___", state 634, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 634, "else" - line 259, "pan.___", state 639, "((i<2))" - line 259, "pan.___", state 639, "((i>=2))" - line 266, "pan.___", state 643, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 643, "else" - line 431, "pan.___", state 645, "(1)" - line 431, "pan.___", state 645, "(1)" - line 1117, "pan.___", state 649, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" - line 411, "pan.___", state 654, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 656, "(1)" - line 411, "pan.___", state 657, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 657, "else" - line 411, "pan.___", state 660, "(1)" - line 415, "pan.___", state 668, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 670, "(1)" - line 415, "pan.___", state 671, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 671, "else" - line 415, "pan.___", state 674, "(1)" - line 415, "pan.___", state 675, "(1)" - line 415, "pan.___", state 675, "(1)" - line 413, "pan.___", state 680, "((i<1))" - line 413, "pan.___", state 680, "((i>=1))" - line 420, "pan.___", state 686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 688, "(1)" - line 420, "pan.___", state 689, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 689, "else" - line 420, "pan.___", state 692, "(1)" - line 420, "pan.___", state 693, "(1)" - line 420, "pan.___", state 693, "(1)" - line 424, "pan.___", state 700, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 702, "(1)" - line 424, "pan.___", state 703, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 703, "else" - line 424, "pan.___", state 706, "(1)" - line 424, "pan.___", state 707, "(1)" - line 424, "pan.___", state 707, "(1)" - line 422, "pan.___", state 712, "((i<2))" - line 422, "pan.___", state 712, "((i>=2))" - line 249, "pan.___", state 718, "(1)" - line 253, "pan.___", state 726, "(1)" - line 253, "pan.___", state 727, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 727, "else" - line 251, "pan.___", state 732, "((i<1))" - line 251, "pan.___", state 732, "((i>=1))" - line 257, "pan.___", state 738, "(1)" - line 257, "pan.___", state 739, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 739, "else" - line 261, "pan.___", state 746, "(1)" - line 261, "pan.___", state 747, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 747, "else" - line 259, "pan.___", state 752, "((i<2))" - line 259, "pan.___", state 752, "((i>=2))" - line 266, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 756, "else" - line 431, "pan.___", state 758, "(1)" - line 431, "pan.___", state 758, "(1)" - line 1133, "pan.___", state 763, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" - line 1128, "pan.___", state 764, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" - line 1128, "pan.___", state 764, "else" - line 1153, "pan.___", state 768, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" - line 272, "pan.___", state 799, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 823, "(1)" - line 284, "pan.___", state 830, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 846, "(1)" - line 253, "pan.___", state 854, "(1)" - line 257, "pan.___", state 866, "(1)" - line 261, "pan.___", state 874, "(1)" - line 272, "pan.___", state 905, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 914, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 927, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 936, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 952, "(1)" - line 253, "pan.___", state 960, "(1)" - line 257, "pan.___", state 972, "(1)" - line 261, "pan.___", state 980, "(1)" - line 276, "pan.___", state 1006, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1019, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1028, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1044, "(1)" - line 253, "pan.___", state 1052, "(1)" - line 257, "pan.___", state 1064, "(1)" - line 261, "pan.___", state 1072, "(1)" - line 272, "pan.___", state 1103, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1112, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1125, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1134, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1150, "(1)" - line 253, "pan.___", state 1158, "(1)" - line 257, "pan.___", state 1170, "(1)" - line 261, "pan.___", state 1178, "(1)" - line 272, "pan.___", state 1195, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1197, "(1)" - line 276, "pan.___", state 1204, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1206, "(1)" - line 276, "pan.___", state 1207, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1207, "else" - line 274, "pan.___", state 1212, "((i<1))" - line 274, "pan.___", state 1212, "((i>=1))" - line 280, "pan.___", state 1217, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1219, "(1)" - line 280, "pan.___", state 1220, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1220, "else" - line 284, "pan.___", state 1226, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1228, "(1)" - line 284, "pan.___", state 1229, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1229, "else" - line 282, "pan.___", state 1234, "((i<2))" - line 282, "pan.___", state 1234, "((i>=2))" - line 249, "pan.___", state 1242, "(1)" - line 253, "pan.___", state 1250, "(1)" - line 253, "pan.___", state 1251, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1251, "else" - line 251, "pan.___", state 1256, "((i<1))" - line 251, "pan.___", state 1256, "((i>=1))" - line 257, "pan.___", state 1262, "(1)" - line 257, "pan.___", state 1263, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1263, "else" - line 261, "pan.___", state 1270, "(1)" - line 261, "pan.___", state 1271, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1271, "else" - line 266, "pan.___", state 1280, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1280, "else" - line 1229, "pan.___", state 1283, "i = 0" - line 1229, "pan.___", state 1285, "reader_barrier = 1" - line 1229, "pan.___", state 1296, "((i<1))" - line 1229, "pan.___", state 1296, "((i>=1))" - line 272, "pan.___", state 1301, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1303, "(1)" - line 276, "pan.___", state 1310, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1312, "(1)" - line 276, "pan.___", state 1313, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1313, "else" - line 274, "pan.___", state 1318, "((i<1))" - line 274, "pan.___", state 1318, "((i>=1))" - line 280, "pan.___", state 1323, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1325, "(1)" - line 280, "pan.___", state 1326, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1326, "else" - line 284, "pan.___", state 1332, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1334, "(1)" - line 284, "pan.___", state 1335, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1335, "else" - line 282, "pan.___", state 1340, "((i<2))" - line 282, "pan.___", state 1340, "((i>=2))" - line 249, "pan.___", state 1348, "(1)" - line 253, "pan.___", state 1356, "(1)" - line 253, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1357, "else" - line 251, "pan.___", state 1362, "((i<1))" - line 251, "pan.___", state 1362, "((i>=1))" - line 257, "pan.___", state 1368, "(1)" - line 257, "pan.___", state 1369, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1369, "else" - line 261, "pan.___", state 1376, "(1)" - line 261, "pan.___", state 1377, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1377, "else" - line 266, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1386, "else" - line 299, "pan.___", state 1388, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1388, "else" - line 1229, "pan.___", state 1389, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 1229, "pan.___", state 1389, "else" - line 276, "pan.___", state 1402, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1415, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1424, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1440, "(1)" - line 253, "pan.___", state 1448, "(1)" - line 257, "pan.___", state 1460, "(1)" - line 261, "pan.___", state 1468, "(1)" - line 272, "pan.___", state 1499, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1508, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1521, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1530, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1546, "(1)" - line 253, "pan.___", state 1554, "(1)" - line 257, "pan.___", state 1566, "(1)" - line 261, "pan.___", state 1574, "(1)" - line 1237, "pan.___", state 1590, "-end-" - (195 of 1590 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 982 seconds -pan: rate 38391.44 states/second -pan: avg transition delay 2.6765e-06 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input deleted file mode 100644 index 6e6560d..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define SINGLE_FLIP - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 05857aa..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1301 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4179 -2:3:4099 -3:3:4102 -4:3:4102 -5:3:4105 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-1277:2:3366 -1278:2:3371 -1279:2:3378 -1280:2:3379 -1281:2:3378 -1282:2:3379 -1283:2:3386 -1284:2:3390 -1285:0:4179 -1286:2:3395 -1287:0:4179 -1288:2:3396 -1289:0:4179 -1290:2:3397 -1291:0:4179 -1292:2:3398 -1293:0:4179 -1294:1:1153 -1295:1:1154 -1296:0:4177 -1297:2:3399 -1298:0:4183 -1299:1:2145 diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress.ltl b/formal-model/urcu-controldataflow-intel-ipi/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_reader.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer.log b/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer.log deleted file mode 100644 index e238402..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer.log +++ /dev/null @@ -1,256 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -depth 23: Claim reached state 9 (line 1300) -depth 51: Claim reached state 9 (line 1299) -Depth= 7071 States= 1e+06 Transitions= 1.16e+07 Memory= 514.397 t= 30.7 R= 3e+04 -Depth= 7071 States= 2e+06 Transitions= 2.31e+07 Memory= 566.252 t= 61.5 R= 3e+04 -Depth= 7071 States= 3e+06 Transitions= 3.43e+07 Memory= 617.326 t= 91.6 R= 3e+04 -pan: resizing hashtable to -w22.. done -Depth= 8815 States= 4e+06 Transitions= 4.57e+07 Memory= 696.592 t= 122 R= 3e+04 -Depth= 8815 States= 5e+06 Transitions= 5.73e+07 Memory= 743.955 t= 153 R= 3e+04 -Depth= 8815 States= 6e+06 Transitions= 7.04e+07 Memory= 797.373 t= 190 R= 3e+04 -Depth= 8815 States= 7e+06 Transitions= 8.38e+07 Memory= 847.861 t= 226 R= 3e+04 -Depth= 8815 States= 8e+06 Transitions= 9.59e+07 Memory= 898.057 t= 259 R= 3e+04 -Depth= 8815 States= 9e+06 Transitions= 1.08e+08 Memory= 948.350 t= 293 R= 3e+04 -pan: resizing hashtable to -w24.. done -Depth= 8815 States= 1e+07 Transitions= 1.29e+08 Memory= 1123.615 t= 352 R= 3e+04 -Depth= 8815 States= 1.1e+07 Transitions= 1.41e+08 Memory= 1175.764 t= 385 R= 3e+04 -Depth= 8815 States= 1.2e+07 Transitions= 1.53e+08 Memory= 1225.471 t= 417 R= 3e+04 -Depth= 8815 States= 1.3e+07 Transitions= 1.64e+08 Memory= 1276.057 t= 447 R= 3e+04 -Depth= 8815 States= 1.4e+07 Transitions= 1.75e+08 Memory= 1330.451 t= 477 R= 3e+04 -Depth= 8815 States= 1.5e+07 Transitions= 1.87e+08 Memory= 1379.670 t= 508 R= 3e+04 -Depth= 8815 States= 1.6e+07 Transitions= 1.98e+08 Memory= 1429.865 t= 538 R= 3e+04 -Depth= 8815 States= 1.7e+07 Transitions= 2.09e+08 Memory= 1484.748 t= 568 R= 3e+04 -Depth= 8815 States= 1.8e+07 Transitions= 2.23e+08 Memory= 1529.670 t= 606 R= 3e+04 -Depth= 8815 States= 1.9e+07 Transitions= 2.36e+08 Memory= 1579.377 t= 643 R= 3e+04 -Depth= 8815 States= 2e+07 Transitions= 2.57e+08 Memory= 1629.279 t= 701 R= 3e+04 -Depth= 8815 States= 2.1e+07 Transitions= 2.93e+08 Memory= 1686.115 t= 807 R= 3e+04 -Depth= 9016 States= 2.2e+07 Transitions= 3.11e+08 Memory= 1741.193 t= 858 R= 3e+04 -Depth= 9016 States= 2.3e+07 Transitions= 3.25e+08 Memory= 1793.733 t= 897 R= 3e+04 -Depth= 9016 States= 2.4e+07 Transitions= 3.45e+08 Memory= 1846.272 t= 954 R= 3e+04 -Depth= 9016 States= 2.5e+07 Transitions= 3.67e+08 Memory= 1897.639 t= 1.02e+03 R= 2e+04 -Depth= 9016 States= 2.6e+07 Transitions= 3.84e+08 Memory= 1951.447 t= 1.06e+03 R= 2e+04 -Depth= 9016 States= 2.7e+07 Transitions= 4.07e+08 Memory= 2004.670 t= 1.13e+03 R= 2e+04 -Depth= 9016 States= 2.8e+07 Transitions= 4.29e+08 Memory= 2050.764 t= 1.19e+03 R= 2e+04 -Depth= 9016 States= 2.9e+07 Transitions= 4.48e+08 Memory= 2100.373 t= 1.25e+03 R= 2e+04 -Depth= 9016 States= 3e+07 Transitions= 4.66e+08 Memory= 2151.545 t= 1.3e+03 R= 2e+04 -Depth= 9016 States= 3.1e+07 Transitions= 4.86e+08 Memory= 2201.838 t= 1.36e+03 R= 2e+04 -Depth= 9016 States= 3.2e+07 Transitions= 5.1e+08 Memory= 2250.861 t= 1.43e+03 R= 2e+04 -Depth= 9016 States= 3.3e+07 Transitions= 5.29e+08 Memory= 2299.983 t= 1.48e+03 R= 2e+04 -Depth= 9016 States= 3.4e+07 Transitions= 5.47e+08 Memory= 2351.057 t= 1.53e+03 R= 2e+04 -pan: resizing hashtable to -w26.. done -Depth= 9016 States= 3.5e+07 Transitions= 5.69e+08 Memory= 2896.943 t= 1.6e+03 R= 2e+04 -Depth= 9016 States= 3.6e+07 Transitions= 5.95e+08 Memory= 2945.186 t= 1.67e+03 R= 2e+04 -Depth= 9016 States= 3.7e+07 Transitions= 6.12e+08 Memory= 2995.576 t= 1.72e+03 R= 2e+04 -Depth= 9016 States= 3.8e+07 Transitions= 6.29e+08 Memory= 3042.256 t= 1.77e+03 R= 2e+04 -Depth= 9016 States= 3.9e+07 Transitions= 6.42e+08 Memory= 3093.135 t= 1.8e+03 R= 2e+04 -Depth= 9016 States= 4e+07 Transitions= 6.56e+08 Memory= 3146.651 t= 1.84e+03 R= 2e+04 -Depth= 9016 States= 4.1e+07 Transitions= 6.69e+08 Memory= 3202.901 t= 1.88e+03 R= 2e+04 -Depth= 9016 States= 4.2e+07 Transitions= 6.82e+08 Memory= 3254.951 t= 1.91e+03 R= 2e+04 -Depth= 9016 States= 4.3e+07 Transitions= 6.95e+08 Memory= 3309.053 t= 1.95e+03 R= 2e+04 -Depth= 9016 States= 4.4e+07 Transitions= 7.07e+08 Memory= 3360.615 t= 1.98e+03 R= 2e+04 -Depth= 9016 States= 4.5e+07 Transitions= 7.28e+08 Memory= 3410.713 t= 2.04e+03 R= 2e+04 -Depth= 9016 States= 4.6e+07 Transitions= 7.63e+08 Memory= 3466.963 t= 2.14e+03 R= 2e+04 -Depth= 9016 States= 4.7e+07 Transitions= 7.99e+08 Memory= 3532.295 t= 2.25e+03 R= 2e+04 -Depth= 9016 States= 4.8e+07 Transitions= 8.49e+08 Memory= 3594.307 t= 2.4e+03 R= 2e+04 -Depth= 9016 States= 4.9e+07 Transitions= 8.91e+08 Memory= 3646.455 t= 2.52e+03 R= 2e+04 -Depth= 9016 States= 5e+07 Transitions= 9.24e+08 Memory= 3689.912 t= 2.62e+03 R= 2e+04 -Depth= 9016 States= 5.1e+07 Transitions= 9.39e+08 Memory= 3742.940 t= 2.66e+03 R= 2e+04 -Depth= 9016 States= 5.2e+07 Transitions= 9.6e+08 Memory= 3793.721 t= 2.72e+03 R= 2e+04 -Depth= 9016 States= 5.3e+07 Transitions= 9.99e+08 Memory= 3843.721 t= 2.84e+03 R= 2e+04 -Depth= 9016 States= 5.4e+07 Transitions= 1.01e+09 Memory= 3899.287 t= 2.88e+03 R= 2e+04 -Depth= 9016 States= 5.5e+07 Transitions= 1.03e+09 Memory= 3947.627 t= 2.93e+03 R= 2e+04 -Depth= 9016 States= 5.6e+07 Transitions= 1.05e+09 Memory= 3995.479 t= 2.97e+03 R= 2e+04 -Depth= 9016 States= 5.7e+07 Transitions= 1.06e+09 Memory= 4049.776 t= 3.01e+03 R= 2e+04 -Depth= 9016 States= 5.8e+07 Transitions= 1.09e+09 Memory= 4100.947 t= 3.09e+03 R= 2e+04 -Depth= 9016 States= 5.9e+07 Transitions= 1.1e+09 Memory= 4151.533 t= 3.13e+03 R= 2e+04 -Depth= 9016 States= 6e+07 Transitions= 1.13e+09 Memory= 4201.924 t= 3.22e+03 R= 2e+04 -Depth= 9016 States= 6.1e+07 Transitions= 1.15e+09 Memory= 4251.240 t= 3.28e+03 R= 2e+04 -Depth= 9016 States= 6.2e+07 Transitions= 1.19e+09 Memory= 4303.779 t= 3.38e+03 R= 2e+04 -Depth= 9016 States= 6.3e+07 Transitions= 1.21e+09 Memory= 4352.998 t= 3.43e+03 R= 2e+04 -Depth= 9016 States= 6.4e+07 Transitions= 1.24e+09 Memory= 4403.096 t= 3.53e+03 R= 2e+04 -Depth= 9016 States= 6.5e+07 Transitions= 1.26e+09 Memory= 4453.682 t= 3.59e+03 R= 2e+04 -Depth= 9016 States= 6.6e+07 Transitions= 1.28e+09 Memory= 4503.096 t= 3.66e+03 R= 2e+04 -Depth= 9016 States= 6.7e+07 Transitions= 1.3e+09 Memory= 4554.072 t= 3.71e+03 R= 2e+04 -Depth= 9016 States= 6.8e+07 Transitions= 1.33e+09 Memory= 4604.951 t= 3.79e+03 R= 2e+04 -Depth= 9016 States= 6.9e+07 Transitions= 1.36e+09 Memory= 4656.221 t= 3.87e+03 R= 2e+04 -Depth= 9523 States= 7e+07 Transitions= 1.38e+09 Memory= 4712.959 t= 3.93e+03 R= 2e+04 -Depth= 9523 States= 7.1e+07 Transitions= 1.39e+09 Memory= 4759.443 t= 3.97e+03 R= 2e+04 -Depth= 9523 States= 7.2e+07 Transitions= 1.41e+09 Memory= 4814.033 t= 4.03e+03 R= 2e+04 -Depth= 9554 States= 7.3e+07 Transitions= 1.44e+09 Memory= 4868.037 t= 4.09e+03 R= 2e+04 -Depth= 9554 States= 7.4e+07 Transitions= 1.45e+09 Memory= 4915.401 t= 4.13e+03 R= 2e+04 -Depth= 9554 States= 7.5e+07 Transitions= 1.47e+09 Memory= 4970.479 t= 4.2e+03 R= 2e+04 -Depth= 9554 States= 7.6e+07 Transitions= 1.49e+09 Memory= 5022.334 t= 4.26e+03 R= 2e+04 -Depth= 9554 States= 7.7e+07 Transitions= 1.51e+09 Memory= 5071.358 t= 4.3e+03 R= 2e+04 -Depth= 9554 States= 7.8e+07 Transitions= 1.52e+09 Memory= 5124.971 t= 4.33e+03 R= 2e+04 -Depth= 9554 States= 7.9e+07 Transitions= 1.54e+09 Memory= 5178.779 t= 4.4e+03 R= 2e+04 -Depth= 9554 States= 8e+07 Transitions= 1.56e+09 Memory= 5231.221 t= 4.46e+03 R= 2e+04 -Depth= 9554 States= 8.1e+07 Transitions= 1.58e+09 Memory= 5284.541 t= 4.51e+03 R= 2e+04 -Depth= 9554 States= 8.2e+07 Transitions= 1.6e+09 Memory= 5335.029 t= 4.55e+03 R= 2e+04 -Depth= 9554 States= 8.3e+07 Transitions= 1.61e+09 Memory= 5385.908 t= 4.6e+03 R= 2e+04 -Depth= 9554 States= 8.4e+07 Transitions= 1.63e+09 Memory= 5437.276 t= 4.64e+03 R= 2e+04 -Depth= 9554 States= 8.5e+07 Transitions= 1.65e+09 Memory= 5486.787 t= 4.69e+03 R= 2e+04 -Depth= 9554 States= 8.6e+07 Transitions= 1.67e+09 Memory= 5535.615 t= 4.76e+03 R= 2e+04 -Depth= 9554 States= 8.7e+07 Transitions= 1.69e+09 Memory= 5589.522 t= 4.81e+03 R= 2e+04 -Depth= 9554 States= 8.8e+07 Transitions= 1.7e+09 Memory= 5647.627 t= 4.86e+03 R= 2e+04 -Depth= 9554 States= 8.9e+07 Transitions= 1.72e+09 Memory= 5695.967 t= 4.9e+03 R= 2e+04 -Depth= 9554 States= 9e+07 Transitions= 1.74e+09 Memory= 5749.971 t= 4.95e+03 R= 2e+04 -Depth= 9554 States= 9.1e+07 Transitions= 1.76e+09 Memory= 5799.483 t= 5.01e+03 R= 2e+04 -Depth= 9554 States= 9.2e+07 Transitions= 1.78e+09 Memory= 5849.092 t= 5.06e+03 R= 2e+04 -Depth= 9554 States= 9.3e+07 Transitions= 1.8e+09 Memory= 5897.529 t= 5.12e+03 R= 2e+04 -Depth= 9554 States= 9.4e+07 Transitions= 1.82e+09 Memory= 5949.287 t= 5.19e+03 R= 2e+04 -Depth= 9554 States= 9.5e+07 Transitions= 1.84e+09 Memory= 6004.072 t= 5.25e+03 R= 2e+04 -Depth= 9554 States= 9.6e+07 Transitions= 1.86e+09 Memory= 6052.412 t= 5.29e+03 R= 2e+04 -Depth= 9554 States= 9.7e+07 Transitions= 1.88e+09 Memory= 6107.588 t= 5.36e+03 R= 2e+04 -Depth= 9554 States= 9.8e+07 Transitions= 1.9e+09 Memory= 6160.029 t= 5.4e+03 R= 2e+04 -Depth= 9554 States= 9.9e+07 Transitions= 1.91e+09 Memory= 6211.006 t= 5.44e+03 R= 2e+04 -Depth= 9554 States= 1e+08 Transitions= 1.93e+09 Memory= 6262.861 t= 5.49e+03 R= 2e+04 -Depth= 9554 States= 1.01e+08 Transitions= 1.94e+09 Memory= 6317.256 t= 5.54e+03 R= 2e+04 -Depth= 9554 States= 1.02e+08 Transitions= 1.96e+09 Memory= 6371.455 t= 5.58e+03 R= 2e+04 -Depth= 9554 States= 1.03e+08 Transitions= 1.98e+09 Memory= 6423.311 t= 5.64e+03 R= 2e+04 -Depth= 9554 States= 1.04e+08 Transitions= 2e+09 Memory= 6477.608 t= 5.71e+03 R= 2e+04 -Depth= 9554 States= 1.05e+08 Transitions= 2.02e+09 Memory= 6526.045 t= 5.75e+03 R= 2e+04 -Depth= 9554 States= 1.06e+08 Transitions= 2.04e+09 Memory= 6580.733 t= 5.81e+03 R= 2e+04 -Depth= 9554 States= 1.07e+08 Transitions= 2.06e+09 Memory= 6634.053 t= 5.87e+03 R= 2e+04 -Depth= 9554 States= 1.08e+08 Transitions= 2.07e+09 Memory= 6685.127 t= 5.9e+03 R= 2e+04 -Depth= 9554 States= 1.09e+08 Transitions= 2.09e+09 Memory= 6736.299 t= 5.96e+03 R= 2e+04 -Depth= 9554 States= 1.1e+08 Transitions= 2.11e+09 Memory= 6790.401 t= 6e+03 R= 2e+04 -Depth= 9554 States= 1.11e+08 Transitions= 2.12e+09 Memory= 6844.990 t= 6.05e+03 R= 2e+04 -Depth= 9554 States= 1.12e+08 Transitions= 2.14e+09 Memory= 6890.010 t= 6.09e+03 R= 2e+04 -Depth= 9554 States= 1.13e+08 Transitions= 2.16e+09 Memory= 6940.889 t= 6.14e+03 R= 2e+04 -Depth= 9554 States= 1.14e+08 Transitions= 2.17e+09 Memory= 6992.061 t= 6.19e+03 R= 2e+04 -Depth= 9554 States= 1.15e+08 Transitions= 2.19e+09 Memory= 7043.623 t= 6.24e+03 R= 2e+04 -Depth= 9554 States= 1.16e+08 Transitions= 2.21e+09 Memory= 7095.186 t= 6.28e+03 R= 2e+04 -Depth= 9554 States= 1.17e+08 Transitions= 2.23e+09 Memory= 7144.600 t= 6.36e+03 R= 2e+04 -Depth= 9554 States= 1.18e+08 Transitions= 2.27e+09 Memory= 7198.897 t= 6.46e+03 R= 2e+04 -Depth= 9554 States= 1.19e+08 Transitions= 2.29e+09 Memory= 7253.779 t= 6.52e+03 R= 2e+04 -Depth= 9554 States= 1.2e+08 Transitions= 2.3e+09 Memory= 7307.783 t= 6.56e+03 R= 2e+04 -Depth= 9554 States= 1.21e+08 Transitions= 2.32e+09 Memory= 7358.467 t= 6.62e+03 R= 2e+04 -Depth= 9554 States= 1.22e+08 Transitions= 2.34e+09 Memory= 7410.811 t= 6.67e+03 R= 2e+04 -Depth= 9554 States= 1.23e+08 Transitions= 2.36e+09 Memory= 7465.010 t= 6.72e+03 R= 2e+04 -Depth= 9554 States= 1.24e+08 Transitions= 2.38e+09 Memory= 7516.670 t= 6.78e+03 R= 2e+04 -Depth= 9554 States= 1.25e+08 Transitions= 2.41e+09 Memory= 7565.205 t= 6.87e+03 R= 2e+04 -Depth= 9554 States= 1.26e+08 Transitions= 2.43e+09 Memory= 7613.936 t= 6.93e+03 R= 2e+04 -Depth= 9554 States= 1.27e+08 Transitions= 2.45e+09 Memory= 7662.471 t= 7e+03 R= 2e+04 -Depth= 9554 States= 1.28e+08 Transitions= 2.48e+09 Memory= 7710.713 t= 7.08e+03 R= 2e+04 -Depth= 9554 States= 1.29e+08 Transitions= 2.5e+09 Memory= 7759.346 t= 7.14e+03 R= 2e+04 -Depth= 9554 States= 1.3e+08 Transitions= 2.52e+09 Memory= 7810.322 t= 7.2e+03 R= 2e+04 -Depth= 9554 States= 1.31e+08 Transitions= 2.55e+09 Memory= 7859.834 t= 7.26e+03 R= 2e+04 -Depth= 9554 States= 1.32e+08 Transitions= 2.57e+09 Memory= 7910.615 t= 7.33e+03 R= 2e+04 -Depth= 9554 States= 1.33e+08 Transitions= 2.59e+09 Memory= 7959.248 t= 7.4e+03 R= 2e+04 -Depth= 9554 States= 1.34e+08 Transitions= 2.61e+09 Memory= 8011.787 t= 7.46e+03 R= 2e+04 -Depth= 9554 States= 1.35e+08 Transitions= 2.63e+09 Memory= 8060.713 t= 7.51e+03 R= 2e+04 -pan: resizing hashtable to -w28.. done -Depth= 9554 States= 1.36e+08 Transitions= 2.65e+09 Memory= 10108.713 t= 7.58e+03 R= 2e+04 -Depth= 9554 States= 1.37e+08 Transitions= 2.66e+09 Memory= 10144.455 t= 7.62e+03 R= 2e+04 -Depth= 9554 States= 1.38e+08 Transitions= 2.67e+09 Memory= 10199.143 t= 7.65e+03 R= 2e+04 -Depth= 9554 States= 1.39e+08 Transitions= 2.69e+09 Memory= 10253.830 t= 7.69e+03 R= 2e+04 -Depth= 9554 States= 1.4e+08 Transitions= 2.7e+09 Memory= 10308.127 t= 7.74e+03 R= 2e+04 -Depth= 9554 States= 1.41e+08 Transitions= 2.72e+09 Memory= 10360.178 t= 7.78e+03 R= 2e+04 -Depth= 9554 States= 1.42e+08 Transitions= 2.74e+09 Memory= 10413.889 t= 7.83e+03 R= 2e+04 -Depth= 9554 States= 1.43e+08 Transitions= 2.75e+09 Memory= 10467.111 t= 7.87e+03 R= 2e+04 -Depth= 9554 States= 1.44e+08 Transitions= 2.77e+09 Memory= 10518.088 t= 7.92e+03 R= 2e+04 -Depth= 9554 States= 1.45e+08 Transitions= 2.79e+09 Memory= 10567.795 t= 7.98e+03 R= 2e+04 -Depth= 9554 States= 1.46e+08 Transitions= 2.82e+09 Memory= 10624.631 t= 8.08e+03 R= 2e+04 -Depth= 9554 States= 1.47e+08 Transitions= 2.86e+09 Memory= 10689.963 t= 8.19e+03 R= 2e+04 -Depth= 9554 States= 1.48e+08 Transitions= 2.91e+09 Memory= 10752.072 t= 8.34e+03 R= 2e+04 -Depth= 9554 States= 1.49e+08 Transitions= 2.95e+09 Memory= 10802.658 t= 8.46e+03 R= 2e+04 -Depth= 9554 States= 1.5e+08 Transitions= 2.99e+09 Memory= 10848.361 t= 8.56e+03 R= 2e+04 -Depth= 9554 States= 1.51e+08 Transitions= 3e+09 Memory= 10900.022 t= 8.61e+03 R= 2e+04 -Depth= 9554 States= 1.52e+08 Transitions= 3.02e+09 Memory= 10951.096 t= 8.66e+03 R= 2e+04 -Depth= 9554 States= 1.53e+08 Transitions= 3.05e+09 Memory= 11002.365 t= 8.75e+03 R= 2e+04 -Depth= 9554 States= 1.54e+08 Transitions= 3.08e+09 Memory= 11054.611 t= 8.83e+03 R= 2e+04 -Depth= 9554 States= 1.55e+08 Transitions= 3.1e+09 Memory= 11105.783 t= 8.88e+03 R= 2e+04 -Depth= 9554 States= 1.56e+08 Transitions= 3.11e+09 Memory= 11153.830 t= 8.92e+03 R= 2e+04 -Depth= 9554 States= 1.57e+08 Transitions= 3.13e+09 Memory= 11202.365 t= 8.96e+03 R= 2e+04 -Depth= 9554 States= 1.58e+08 Transitions= 3.14e+09 Memory= 11257.443 t= 9e+03 R= 2e+04 -Depth= 9554 States= 1.59e+08 Transitions= 3.17e+09 Memory= 11307.639 t= 9.08e+03 R= 2e+04 -Depth= 9554 States= 1.6e+08 Transitions= 3.19e+09 Memory= 11357.541 t= 9.15e+03 R= 2e+04 -Depth= 9554 States= 1.61e+08 Transitions= 3.21e+09 Memory= 11407.541 t= 9.21e+03 R= 2e+04 -Depth= 9554 States= 1.62e+08 Transitions= 3.24e+09 Memory= 11457.736 t= 9.28e+03 R= 2e+04 -Depth= 9554 States= 1.63e+08 Transitions= 3.27e+09 Memory= 11507.053 t= 9.36e+03 R= 2e+04 -Depth= 9554 States= 1.64e+08 Transitions= 3.29e+09 Memory= 11560.959 t= 9.44e+03 R= 2e+04 -Depth= 9554 States= 1.65e+08 Transitions= 3.31e+09 Memory= 11613.108 t= 9.5e+03 R= 2e+04 -Depth= 9554 States= 1.66e+08 Transitions= 3.34e+09 Memory= 11661.252 t= 9.58e+03 R= 2e+04 -Depth= 9554 States= 1.67e+08 Transitions= 3.37e+09 Memory= 11711.154 t= 9.66e+03 R= 2e+04 -Depth= 9554 States= 1.68e+08 Transitions= 3.39e+09 Memory= 11763.596 t= 9.72e+03 R= 2e+04 -Depth= 9554 States= 1.69e+08 Transitions= 3.41e+09 Memory= 11812.912 t= 9.78e+03 R= 2e+04 -Depth= 9554 States= 1.7e+08 Transitions= 3.44e+09 Memory= 11866.135 t= 9.87e+03 R= 2e+04 -Depth= 9554 States= 1.71e+08 Transitions= 3.46e+09 Memory= 11920.139 t= 9.91e+03 R= 2e+04 -Depth= 9554 States= 1.72e+08 Transitions= 3.47e+09 Memory= 11967.014 t= 9.95e+03 R= 2e+04 -Depth= 9554 States= 1.73e+08 Transitions= 3.5e+09 Memory= 12021.115 t= 1e+04 R= 2e+04 -Depth= 9554 States= 1.74e+08 Transitions= 3.52e+09 Memory= 12075.315 t= 1.01e+04 R= 2e+04 -Depth= 9554 States= 1.75e+08 Transitions= 3.53e+09 Memory= 12126.779 t= 1.01e+04 R= 2e+04 -Depth= 9554 States= 1.76e+08 Transitions= 3.56e+09 Memory= 12180.002 t= 1.02e+04 R= 2e+04 -Depth= 9554 States= 1.77e+08 Transitions= 3.57e+09 Memory= 12229.416 t= 1.02e+04 R= 2e+04 -Depth= 9554 States= 1.78e+08 Transitions= 3.59e+09 Memory= 12282.834 t= 1.03e+04 R= 2e+04 -Depth= 9554 States= 1.79e+08 Transitions= 3.61e+09 Memory= 12334.494 t= 1.03e+04 R= 2e+04 -Depth= 9554 States= 1.8e+08 Transitions= 3.63e+09 Memory= 12387.522 t= 1.04e+04 R= 2e+04 -Depth= 9554 States= 1.81e+08 Transitions= 3.65e+09 Memory= 12440.451 t= 1.05e+04 R= 2e+04 -Depth= 9554 States= 1.82e+08 Transitions= 3.66e+09 Memory= 12492.111 t= 1.05e+04 R= 2e+04 -Depth= 9554 States= 1.83e+08 Transitions= 3.68e+09 Memory= 12544.162 t= 1.05e+04 R= 2e+04 -Depth= 9554 States= 1.84e+08 Transitions= 3.69e+09 Memory= 12594.943 t= 1.06e+04 R= 2e+04 -Depth= 9554 States= 1.85e+08 Transitions= 3.71e+09 Memory= 12645.627 t= 1.06e+04 R= 2e+04 -Depth= 9554 States= 1.86e+08 Transitions= 3.73e+09 Memory= 12695.236 t= 1.07e+04 R= 2e+04 -Depth= 9554 States= 1.87e+08 Transitions= 3.75e+09 Memory= 12750.705 t= 1.07e+04 R= 2e+04 -Depth= 9554 States= 1.88e+08 Transitions= 3.77e+09 Memory= 12807.639 t= 1.08e+04 R= 2e+04 -Depth= 9554 States= 1.89e+08 Transitions= 3.78e+09 Memory= 12855.979 t= 1.08e+04 R= 2e+04 -Depth= 9554 States= 1.9e+08 Transitions= 3.8e+09 Memory= 12909.592 t= 1.09e+04 R= 2e+04 -Depth= 9554 States= 1.91e+08 Transitions= 3.82e+09 Memory= 12959.104 t= 1.09e+04 R= 2e+04 -Depth= 9554 States= 1.92e+08 Transitions= 3.84e+09 Memory= 13008.615 t= 1.1e+04 R= 2e+04 -Depth= 9554 States= 1.93e+08 Transitions= 3.86e+09 Memory= 13065.061 t= 1.11e+04 R= 2e+04 -Depth= 9554 States= 1.94e+08 Transitions= 3.88e+09 Memory= 13114.377 t= 1.11e+04 R= 2e+04 -Depth= 9554 States= 1.95e+08 Transitions= 3.9e+09 Memory= 13168.674 t= 1.12e+04 R= 2e+04 -Depth= 9554 States= 1.96e+08 Transitions= 3.92e+09 Memory= 13222.678 t= 1.12e+04 R= 2e+04 -Depth= 9554 States= 1.97e+08 Transitions= 3.93e+09 Memory= 13271.701 t= 1.13e+04 R= 2e+04 -Depth= 9554 States= 1.98e+08 Transitions= 3.95e+09 Memory= 13324.338 t= 1.13e+04 R= 2e+04 -Depth= 9554 States= 1.99e+08 Transitions= 3.96e+09 Memory= 13377.170 t= 1.13e+04 R= 2e+04 -Depth= 9554 States= 2e+08 Transitions= 3.98e+09 Memory= 13432.639 t= 1.14e+04 R= 2e+04 -Depth= 9554 States= 2.01e+08 Transitions= 4e+09 Memory= 13483.811 t= 1.14e+04 R= 2e+04 -Depth= 9554 States= 2.02e+08 Transitions= 4.03e+09 Memory= 13537.522 t= 1.15e+04 R= 2e+04 -Depth= 9554 States= 2.03e+08 Transitions= 4.04e+09 Memory= 13588.693 t= 1.16e+04 R= 2e+04 -Depth= 9554 States= 2.04e+08 Transitions= 4.06e+09 Memory= 13642.600 t= 1.16e+04 R= 2e+04 -Depth= 9554 States= 2.05e+08 Transitions= 4.08e+09 Memory= 13696.799 t= 1.17e+04 R= 2e+04 -Depth= 9554 States= 2.06e+08 Transitions= 4.09e+09 Memory= 13744.748 t= 1.17e+04 R= 2e+04 -Depth= 9554 States= 2.07e+08 Transitions= 4.11e+09 Memory= 13798.068 t= 1.18e+04 R= 2e+04 -Depth= 9554 States= 2.08e+08 Transitions= 4.13e+09 Memory= 13850.022 t= 1.18e+04 R= 2e+04 -Depth= 9554 States= 2.09e+08 Transitions= 4.14e+09 Memory= 13905.783 t= 1.18e+04 R= 2e+04 -Depth= 9554 States= 2.1e+08 Transitions= 4.16e+09 Memory= 13952.365 t= 1.19e+04 R= 2e+04 -Depth= 9554 States= 2.11e+08 Transitions= 4.18e+09 Memory= 14003.244 t= 1.19e+04 R= 2e+04 -Depth= 9554 States= 2.12e+08 Transitions= 4.19e+09 Memory= 14054.318 t= 1.2e+04 R= 2e+04 -Depth= 9554 States= 2.13e+08 Transitions= 4.21e+09 Memory= 14106.076 t= 1.2e+04 R= 2e+04 -Depth= 9554 States= 2.14e+08 Transitions= 4.22e+09 Memory= 14156.662 t= 1.21e+04 R= 2e+04 -Depth= 9554 States= 2.15e+08 Transitions= 4.26e+09 Memory= 14209.690 t= 1.22e+04 R= 2e+04 -Depth= 9554 States= 2.16e+08 Transitions= 4.29e+09 Memory= 14265.256 t= 1.23e+04 R= 2e+04 -Depth= 9554 States= 2.17e+08 Transitions= 4.3e+09 Memory= 14317.697 t= 1.23e+04 R= 2e+04 -Depth= 9554 States= 2.18e+08 Transitions= 4.32e+09 Memory= 14371.311 t= 1.23e+04 R= 2e+04 -Depth= 9554 States= 2.19e+08 Transitions= 4.33e+09 Memory= 14424.045 t= 1.24e+04 R= 2e+04 -Depth= 9554 States= 2.2e+08 Transitions= 4.35e+09 Memory= 14477.854 t= 1.24e+04 R= 2e+04 -Depth= 9554 States= 2.21e+08 Transitions= 4.37e+09 Memory= 14529.611 t= 1.25e+04 R= 2e+04 -Depth= 9554 States= 2.22e+08 Transitions= 4.4e+09 Memory= 14576.291 t= 1.26e+04 R= 2e+04 -Depth= 9554 States= 2.23e+08 Transitions= 4.43e+09 Memory= 14625.608 t= 1.27e+04 R= 2e+04 -Depth= 9554 States= 2.24e+08 Transitions= 4.45e+09 Memory= 14674.045 t= 1.27e+04 R= 2e+04 -Depth= 9554 States= 2.25e+08 Transitions= 4.48e+09 Memory= 14722.776 t= 1.28e+04 R= 2e+04 -Depth= 9554 States= 2.26e+08 Transitions= 4.5e+09 Memory= 14770.529 t= 1.29e+04 R= 2e+04 -Depth= 9554 States= 2.27e+08 Transitions= 4.52e+09 Memory= 14821.018 t= 1.29e+04 R= 2e+04 -Depth= 9554 States= 2.28e+08 Transitions= 4.54e+09 Memory= 14870.529 t= 1.3e+04 R= 2e+04 -Depth= 9554 States= 2.29e+08 Transitions= 4.56e+09 Memory= 14918.967 t= 1.3e+04 R= 2e+04 -Depth= 9554 States= 2.3e+08 Transitions= 4.59e+09 Memory= 14966.916 t= 1.31e+04 R= 2e+04 -Depth= 9554 States= 2.31e+08 Transitions= 4.6e+09 Memory= 15017.600 t= 1.32e+04 R= 2e+04 -Depth= 9554 States= 2.32e+08 Transitions= 4.63e+09 Memory= 15066.330 t= 1.32e+04 R= 2e+04 diff --git a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-intel-ipi/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/.input.spin b/formal-model/urcu-controldataflow-intel-no-ipi/.input.spin deleted file mode 100644 index 3191ba1..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/.input.spin +++ /dev/null @@ -1,1272 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/DEFINES b/formal-model/urcu-controldataflow-intel-no-ipi/DEFINES deleted file mode 100644 index b4d92d7..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/DEFINES +++ /dev/null @@ -1,18 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/Makefile b/formal-model/urcu-controldataflow-intel-no-ipi/Makefile deleted file mode 100644 index de47dff..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/Makefile +++ /dev/null @@ -1,170 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/asserts.log b/formal-model/urcu-controldataflow-intel-no-ipi/asserts.log deleted file mode 100644 index fe09a53..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/asserts.log +++ /dev/null @@ -1,429 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 4473 States= 1e+06 Transitions= 2.37e+07 Memory= 542.619 t= 57.3 R= 2e+04 -Depth= 4540 States= 2e+06 Transitions= 4.8e+07 Memory= 618.889 t= 117 R= 2e+04 -Depth= 4540 States= 3e+06 Transitions= 7.25e+07 Memory= 695.158 t= 178 R= 2e+04 -pan: resizing hashtable to -w22.. done - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 72 byte, depth reached 4540, errors: 0 - 3841511 states, stored - 90242688 states, matched - 94084199 transitions (= stored+matched) -1.5073578e+09 atomic steps -hash conflicts: 63759942 (resolved) - -Stats on memory usage (in Megabytes): - 366.355 equivalent memory usage for states (stored*(State-vector + overhead)) - 300.680 actual memory usage for states (compression: 82.07%) - state-vector as stored = 54 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 790.440 total actual memory usage - -unreached in proctype urcu_reader - line 410, ".input.spin", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 81, "(1)" - line 256, ".input.spin", state 101, "(1)" - line 260, ".input.spin", state 109, "(1)" - line 596, ".input.spin", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 410, ".input.spin", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 199, "(1)" - line 256, ".input.spin", state 219, "(1)" - line 260, ".input.spin", state 227, "(1)" - line 410, ".input.spin", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 310, "(1)" - line 256, ".input.spin", state 330, "(1)" - line 260, ".input.spin", state 338, "(1)" - line 410, ".input.spin", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 361, "(1)" - line 410, ".input.spin", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, ".input.spin", state 362, "else" - line 410, ".input.spin", state 365, "(1)" - line 414, ".input.spin", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 375, "(1)" - line 414, ".input.spin", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, ".input.spin", state 376, "else" - line 414, ".input.spin", state 379, "(1)" - line 414, ".input.spin", state 380, "(1)" - line 414, ".input.spin", state 380, "(1)" - line 412, ".input.spin", state 385, "((i<1))" - line 412, ".input.spin", state 385, "((i>=1))" - line 419, ".input.spin", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 393, "(1)" - line 419, ".input.spin", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, ".input.spin", state 394, "else" - line 419, ".input.spin", state 397, "(1)" - line 419, ".input.spin", state 398, "(1)" - line 419, ".input.spin", state 398, "(1)" - line 423, ".input.spin", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 407, "(1)" - line 423, ".input.spin", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, ".input.spin", state 408, "else" - line 423, ".input.spin", state 411, "(1)" - line 423, ".input.spin", state 412, "(1)" - line 423, ".input.spin", state 412, "(1)" - line 421, ".input.spin", state 417, "((i<2))" - line 421, ".input.spin", state 417, "((i>=2))" - line 248, ".input.spin", state 423, "(1)" - line 252, ".input.spin", state 431, "(1)" - line 252, ".input.spin", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, ".input.spin", state 432, "else" - line 250, ".input.spin", state 437, "((i<1))" - line 250, ".input.spin", state 437, "((i>=1))" - line 256, ".input.spin", state 443, "(1)" - line 256, ".input.spin", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, ".input.spin", state 444, "else" - line 260, ".input.spin", state 451, "(1)" - line 260, ".input.spin", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, ".input.spin", state 452, "else" - line 258, ".input.spin", state 457, "((i<2))" - line 258, ".input.spin", state 457, "((i>=2))" - line 265, ".input.spin", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, ".input.spin", state 461, "else" - line 430, ".input.spin", state 463, "(1)" - line 430, ".input.spin", state 463, "(1)" - line 596, ".input.spin", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 596, ".input.spin", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 596, ".input.spin", state 468, "(1)" - line 271, ".input.spin", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 483, "(1)" - line 279, ".input.spin", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 519, "(1)" - line 252, ".input.spin", state 527, "(1)" - line 256, ".input.spin", state 539, "(1)" - line 260, ".input.spin", state 547, "(1)" - line 410, ".input.spin", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 629, "(1)" - line 252, ".input.spin", state 637, "(1)" - line 256, ".input.spin", state 649, "(1)" - line 260, ".input.spin", state 657, "(1)" - line 410, ".input.spin", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 747, "(1)" - line 256, ".input.spin", state 767, "(1)" - line 260, ".input.spin", state 775, "(1)" - line 410, ".input.spin", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 796, "(1)" - line 410, ".input.spin", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, ".input.spin", state 797, "else" - line 410, ".input.spin", state 800, "(1)" - line 414, ".input.spin", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 810, "(1)" - line 414, ".input.spin", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, ".input.spin", state 811, "else" - line 414, ".input.spin", state 814, "(1)" - line 414, ".input.spin", state 815, "(1)" - line 414, ".input.spin", state 815, "(1)" - line 412, ".input.spin", state 820, "((i<1))" - line 412, ".input.spin", state 820, "((i>=1))" - line 419, ".input.spin", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 828, "(1)" - line 419, ".input.spin", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, ".input.spin", state 829, "else" - line 419, ".input.spin", state 832, "(1)" - line 419, ".input.spin", state 833, "(1)" - line 419, ".input.spin", state 833, "(1)" - line 423, ".input.spin", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 842, "(1)" - line 423, ".input.spin", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, ".input.spin", state 843, "else" - line 423, ".input.spin", state 846, "(1)" - line 423, ".input.spin", state 847, "(1)" - line 423, ".input.spin", state 847, "(1)" - line 421, ".input.spin", state 852, "((i<2))" - line 421, ".input.spin", state 852, "((i>=2))" - line 248, ".input.spin", state 858, "(1)" - line 252, ".input.spin", state 866, "(1)" - line 252, ".input.spin", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, ".input.spin", state 867, "else" - line 250, ".input.spin", state 872, "((i<1))" - line 250, ".input.spin", state 872, "((i>=1))" - line 256, ".input.spin", state 878, "(1)" - line 256, ".input.spin", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, ".input.spin", state 879, "else" - line 260, ".input.spin", state 886, "(1)" - line 260, ".input.spin", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, ".input.spin", state 887, "else" - line 258, ".input.spin", state 892, "((i<2))" - line 258, ".input.spin", state 892, "((i>=2))" - line 265, ".input.spin", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, ".input.spin", state 896, "else" - line 430, ".input.spin", state 898, "(1)" - line 430, ".input.spin", state 898, "(1)" - line 604, ".input.spin", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 410, ".input.spin", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 971, "(1)" - line 252, ".input.spin", state 979, "(1)" - line 256, ".input.spin", state 991, "(1)" - line 260, ".input.spin", state 999, "(1)" - line 410, ".input.spin", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1085, "(1)" - line 256, ".input.spin", state 1105, "(1)" - line 260, ".input.spin", state 1113, "(1)" - line 410, ".input.spin", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1200, "(1)" - line 256, ".input.spin", state 1220, "(1)" - line 260, ".input.spin", state 1228, "(1)" - line 410, ".input.spin", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1311, "(1)" - line 256, ".input.spin", state 1331, "(1)" - line 260, ".input.spin", state 1339, "(1)" - line 271, ".input.spin", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1407, "(1)" - line 252, ".input.spin", state 1415, "(1)" - line 256, ".input.spin", state 1427, "(1)" - line 260, ".input.spin", state 1435, "(1)" - line 410, ".input.spin", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1517, "(1)" - line 252, ".input.spin", state 1525, "(1)" - line 256, ".input.spin", state 1537, "(1)" - line 260, ".input.spin", state 1545, "(1)" - line 410, ".input.spin", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1628, "(1)" - line 252, ".input.spin", state 1636, "(1)" - line 256, ".input.spin", state 1648, "(1)" - line 260, ".input.spin", state 1656, "(1)" - line 410, ".input.spin", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1742, "(1)" - line 256, ".input.spin", state 1762, "(1)" - line 260, ".input.spin", state 1770, "(1)" - line 643, ".input.spin", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 410, ".input.spin", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1860, "(1)" - line 256, ".input.spin", state 1880, "(1)" - line 260, ".input.spin", state 1888, "(1)" - line 410, ".input.spin", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1971, "(1)" - line 256, ".input.spin", state 1991, "(1)" - line 260, ".input.spin", state 1999, "(1)" - line 410, ".input.spin", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 2022, "(1)" - line 410, ".input.spin", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, ".input.spin", state 2023, "else" - line 410, ".input.spin", state 2026, "(1)" - line 414, ".input.spin", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2036, "(1)" - line 414, ".input.spin", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, ".input.spin", state 2037, "else" - line 414, ".input.spin", state 2040, "(1)" - line 414, ".input.spin", state 2041, "(1)" - line 414, ".input.spin", state 2041, "(1)" - line 412, ".input.spin", state 2046, "((i<1))" - line 412, ".input.spin", state 2046, "((i>=1))" - line 419, ".input.spin", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2054, "(1)" - line 419, ".input.spin", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, ".input.spin", state 2055, "else" - line 419, ".input.spin", state 2058, "(1)" - line 419, ".input.spin", state 2059, "(1)" - line 419, ".input.spin", state 2059, "(1)" - line 423, ".input.spin", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2068, "(1)" - line 423, ".input.spin", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, ".input.spin", state 2069, "else" - line 423, ".input.spin", state 2072, "(1)" - line 423, ".input.spin", state 2073, "(1)" - line 423, ".input.spin", state 2073, "(1)" - line 421, ".input.spin", state 2078, "((i<2))" - line 421, ".input.spin", state 2078, "((i>=2))" - line 248, ".input.spin", state 2084, "(1)" - line 252, ".input.spin", state 2092, "(1)" - line 252, ".input.spin", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, ".input.spin", state 2093, "else" - line 250, ".input.spin", state 2098, "((i<1))" - line 250, ".input.spin", state 2098, "((i>=1))" - line 256, ".input.spin", state 2104, "(1)" - line 256, ".input.spin", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, ".input.spin", state 2105, "else" - line 260, ".input.spin", state 2112, "(1)" - line 260, ".input.spin", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, ".input.spin", state 2113, "else" - line 258, ".input.spin", state 2118, "((i<2))" - line 258, ".input.spin", state 2118, "((i>=2))" - line 265, ".input.spin", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, ".input.spin", state 2122, "else" - line 430, ".input.spin", state 2124, "(1)" - line 430, ".input.spin", state 2124, "(1)" - line 643, ".input.spin", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 643, ".input.spin", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 643, ".input.spin", state 2129, "(1)" - line 271, ".input.spin", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 2180, "(1)" - line 252, ".input.spin", state 2188, "(1)" - line 256, ".input.spin", state 2200, "(1)" - line 260, ".input.spin", state 2208, "(1)" - line 410, ".input.spin", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 2290, "(1)" - line 252, ".input.spin", state 2298, "(1)" - line 256, ".input.spin", state 2310, "(1)" - line 260, ".input.spin", state 2318, "(1)" - line 271, ".input.spin", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 2387, "(1)" - line 252, ".input.spin", state 2395, "(1)" - line 256, ".input.spin", state 2407, "(1)" - line 260, ".input.spin", state 2415, "(1)" - line 410, ".input.spin", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 2497, "(1)" - line 252, ".input.spin", state 2505, "(1)" - line 256, ".input.spin", state 2517, "(1)" - line 260, ".input.spin", state 2525, "(1)" - line 410, ".input.spin", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 2608, "(1)" - line 252, ".input.spin", state 2616, "(1)" - line 256, ".input.spin", state 2628, "(1)" - line 260, ".input.spin", state 2636, "(1)" - line 248, ".input.spin", state 2667, "(1)" - line 256, ".input.spin", state 2687, "(1)" - line 260, ".input.spin", state 2695, "(1)" - line 248, ".input.spin", state 2710, "(1)" - line 252, ".input.spin", state 2718, "(1)" - line 256, ".input.spin", state 2730, "(1)" - line 260, ".input.spin", state 2738, "(1)" - line 897, ".input.spin", state 2755, "-end-" - (259 of 2755 states) -unreached in proctype urcu_writer - line 410, ".input.spin", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 82, "(1)" - line 252, ".input.spin", state 90, "(1)" - line 256, ".input.spin", state 102, "(1)" - line 271, ".input.spin", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 410, ".input.spin", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, ".input.spin", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 257, "(1)" - line 252, ".input.spin", state 265, "(1)" - line 256, ".input.spin", state 277, "(1)" - line 260, ".input.spin", state 285, "(1)" - line 414, ".input.spin", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, ".input.spin", state 378, "(1)" - line 256, ".input.spin", state 390, "(1)" - line 260, ".input.spin", state 398, "(1)" - line 414, ".input.spin", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, ".input.spin", state 499, "(1)" - line 256, ".input.spin", state 511, "(1)" - line 260, ".input.spin", state 519, "(1)" - line 414, ".input.spin", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, ".input.spin", state 610, "(1)" - line 256, ".input.spin", state 622, "(1)" - line 260, ".input.spin", state 630, "(1)" - line 414, ".input.spin", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, ".input.spin", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, ".input.spin", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, ".input.spin", state 723, "(1)" - line 256, ".input.spin", state 735, "(1)" - line 260, ".input.spin", state 743, "(1)" - line 271, ".input.spin", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, ".input.spin", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 820, "(1)" - line 283, ".input.spin", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 843, "(1)" - line 252, ".input.spin", state 851, "(1)" - line 256, ".input.spin", state 863, "(1)" - line 260, ".input.spin", state 871, "(1)" - line 275, ".input.spin", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 934, "(1)" - line 252, ".input.spin", state 942, "(1)" - line 256, ".input.spin", state 954, "(1)" - line 260, ".input.spin", state 962, "(1)" - line 275, ".input.spin", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1025, "(1)" - line 252, ".input.spin", state 1033, "(1)" - line 256, ".input.spin", state 1045, "(1)" - line 260, ".input.spin", state 1053, "(1)" - line 275, ".input.spin", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, ".input.spin", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, ".input.spin", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, ".input.spin", state 1116, "(1)" - line 252, ".input.spin", state 1124, "(1)" - line 256, ".input.spin", state 1136, "(1)" - line 260, ".input.spin", state 1144, "(1)" - line 1236, ".input.spin", state 1159, "-end-" - (71 of 1159 states) -unreached in proctype :init: - (0 of 78 states) - -pan: elapsed time 231 seconds -pan: rate 16628.478 states/second -pan: avg transition delay 2.4555e-06 usec -cp .input.spin asserts.spin.input -cp .input.spin.trail asserts.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/asserts.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/asserts.spin.input deleted file mode 100644 index 3191ba1..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/asserts.spin.input +++ /dev/null @@ -1,1272 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/references.txt b/formal-model/urcu-controldataflow-intel-no-ipi/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu.sh b/formal-model/urcu-controldataflow-intel-no-ipi/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu.spin b/formal-model/urcu-controldataflow-intel-no-ipi/urcu.spin deleted file mode 100644 index 54752a1..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu.spin +++ /dev/null @@ -1,1254 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.log b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.log deleted file mode 100644 index aaa4217..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.log +++ /dev/null @@ -1,440 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1294) -Depth= 4900 States= 1e+06 Transitions= 2.37e+07 Memory= 550.334 t= 65.5 R= 2e+04 -Depth= 4973 States= 2e+06 Transitions= 4.8e+07 Memory= 634.221 t= 134 R= 1e+04 -Depth= 4973 States= 3e+06 Transitions= 7.25e+07 Memory= 718.205 t= 204 R= 1e+04 -pan: resizing hashtable to -w22.. done - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 4973, errors: 0 - 3841511 states, stored - 90254094 states, matched - 94095605 transitions (= stored+matched) -1.5073578e+09 atomic steps -hash conflicts: 63765708 (resolved) - -Stats on memory usage (in Megabytes): - 424.972 equivalent memory usage for states (stored*(State-vector + overhead)) - 330.368 actual memory usage for states (compression: 77.74%) - state-vector as stored = 62 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 819.932 total actual memory usage - -unreached in proctype urcu_reader - line 410, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 81, "(1)" - line 256, "pan.___", state 101, "(1)" - line 260, "pan.___", state 109, "(1)" - line 596, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 410, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 199, "(1)" - line 256, "pan.___", state 219, "(1)" - line 260, "pan.___", state 227, "(1)" - line 410, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 310, "(1)" - line 256, "pan.___", state 330, "(1)" - line 260, "pan.___", state 338, "(1)" - line 410, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 361, "(1)" - line 410, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 362, "else" - line 410, "pan.___", state 365, "(1)" - line 414, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 375, "(1)" - line 414, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 376, "else" - line 414, "pan.___", state 379, "(1)" - line 414, "pan.___", state 380, "(1)" - line 414, "pan.___", state 380, "(1)" - line 412, "pan.___", state 385, "((i<1))" - line 412, "pan.___", state 385, "((i>=1))" - line 419, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 393, "(1)" - line 419, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 394, "else" - line 419, "pan.___", state 397, "(1)" - line 419, "pan.___", state 398, "(1)" - line 419, "pan.___", state 398, "(1)" - line 423, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 407, "(1)" - line 423, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 408, "else" - line 423, "pan.___", state 411, "(1)" - line 423, "pan.___", state 412, "(1)" - line 423, "pan.___", state 412, "(1)" - line 421, "pan.___", state 417, "((i<2))" - line 421, "pan.___", state 417, "((i>=2))" - line 248, "pan.___", state 423, "(1)" - line 252, "pan.___", state 431, "(1)" - line 252, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, "pan.___", state 432, "else" - line 250, "pan.___", state 437, "((i<1))" - line 250, "pan.___", state 437, "((i>=1))" - line 256, "pan.___", state 443, "(1)" - line 256, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, "pan.___", state 444, "else" - line 260, "pan.___", state 451, "(1)" - line 260, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, "pan.___", state 452, "else" - line 258, "pan.___", state 457, "((i<2))" - line 258, "pan.___", state 457, "((i>=2))" - line 265, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, "pan.___", state 461, "else" - line 430, "pan.___", state 463, "(1)" - line 430, "pan.___", state 463, "(1)" - line 596, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 596, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 596, "pan.___", state 468, "(1)" - line 271, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 483, "(1)" - line 279, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 519, "(1)" - line 252, "pan.___", state 527, "(1)" - line 256, "pan.___", state 539, "(1)" - line 260, "pan.___", state 547, "(1)" - line 410, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 629, "(1)" - line 252, "pan.___", state 637, "(1)" - line 256, "pan.___", state 649, "(1)" - line 260, "pan.___", state 657, "(1)" - line 410, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 747, "(1)" - line 256, "pan.___", state 767, "(1)" - line 260, "pan.___", state 775, "(1)" - line 410, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 796, "(1)" - line 410, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 797, "else" - line 410, "pan.___", state 800, "(1)" - line 414, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 810, "(1)" - line 414, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 811, "else" - line 414, "pan.___", state 814, "(1)" - line 414, "pan.___", state 815, "(1)" - line 414, "pan.___", state 815, "(1)" - line 412, "pan.___", state 820, "((i<1))" - line 412, "pan.___", state 820, "((i>=1))" - line 419, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 828, "(1)" - line 419, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 829, "else" - line 419, "pan.___", state 832, "(1)" - line 419, "pan.___", state 833, "(1)" - line 419, "pan.___", state 833, "(1)" - line 423, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 842, "(1)" - line 423, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 843, "else" - line 423, "pan.___", state 846, "(1)" - line 423, "pan.___", state 847, "(1)" - line 423, "pan.___", state 847, "(1)" - line 421, "pan.___", state 852, "((i<2))" - line 421, "pan.___", state 852, "((i>=2))" - line 248, "pan.___", state 858, "(1)" - line 252, "pan.___", state 866, "(1)" - line 252, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, "pan.___", state 867, "else" - line 250, "pan.___", state 872, "((i<1))" - line 250, "pan.___", state 872, "((i>=1))" - line 256, "pan.___", state 878, "(1)" - line 256, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, "pan.___", state 879, "else" - line 260, "pan.___", state 886, "(1)" - line 260, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, "pan.___", state 887, "else" - line 258, "pan.___", state 892, "((i<2))" - line 258, "pan.___", state 892, "((i>=2))" - line 265, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, "pan.___", state 896, "else" - line 430, "pan.___", state 898, "(1)" - line 430, "pan.___", state 898, "(1)" - line 604, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 410, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 971, "(1)" - line 252, "pan.___", state 979, "(1)" - line 256, "pan.___", state 991, "(1)" - line 260, "pan.___", state 999, "(1)" - line 410, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1085, "(1)" - line 256, "pan.___", state 1105, "(1)" - line 260, "pan.___", state 1113, "(1)" - line 410, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1200, "(1)" - line 256, "pan.___", state 1220, "(1)" - line 260, "pan.___", state 1228, "(1)" - line 410, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1311, "(1)" - line 256, "pan.___", state 1331, "(1)" - line 260, "pan.___", state 1339, "(1)" - line 271, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1407, "(1)" - line 252, "pan.___", state 1415, "(1)" - line 256, "pan.___", state 1427, "(1)" - line 260, "pan.___", state 1435, "(1)" - line 410, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1517, "(1)" - line 252, "pan.___", state 1525, "(1)" - line 256, "pan.___", state 1537, "(1)" - line 260, "pan.___", state 1545, "(1)" - line 410, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1628, "(1)" - line 252, "pan.___", state 1636, "(1)" - line 256, "pan.___", state 1648, "(1)" - line 260, "pan.___", state 1656, "(1)" - line 410, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1742, "(1)" - line 256, "pan.___", state 1762, "(1)" - line 260, "pan.___", state 1770, "(1)" - line 643, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 410, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1860, "(1)" - line 256, "pan.___", state 1880, "(1)" - line 260, "pan.___", state 1888, "(1)" - line 410, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1971, "(1)" - line 256, "pan.___", state 1991, "(1)" - line 260, "pan.___", state 1999, "(1)" - line 410, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 2022, "(1)" - line 410, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 410, "pan.___", state 2023, "else" - line 410, "pan.___", state 2026, "(1)" - line 414, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2036, "(1)" - line 414, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 414, "pan.___", state 2037, "else" - line 414, "pan.___", state 2040, "(1)" - line 414, "pan.___", state 2041, "(1)" - line 414, "pan.___", state 2041, "(1)" - line 412, "pan.___", state 2046, "((i<1))" - line 412, "pan.___", state 2046, "((i>=1))" - line 419, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2054, "(1)" - line 419, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 419, "pan.___", state 2055, "else" - line 419, "pan.___", state 2058, "(1)" - line 419, "pan.___", state 2059, "(1)" - line 419, "pan.___", state 2059, "(1)" - line 423, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2068, "(1)" - line 423, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 423, "pan.___", state 2069, "else" - line 423, "pan.___", state 2072, "(1)" - line 423, "pan.___", state 2073, "(1)" - line 423, "pan.___", state 2073, "(1)" - line 421, "pan.___", state 2078, "((i<2))" - line 421, "pan.___", state 2078, "((i>=2))" - line 248, "pan.___", state 2084, "(1)" - line 252, "pan.___", state 2092, "(1)" - line 252, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 252, "pan.___", state 2093, "else" - line 250, "pan.___", state 2098, "((i<1))" - line 250, "pan.___", state 2098, "((i>=1))" - line 256, "pan.___", state 2104, "(1)" - line 256, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 256, "pan.___", state 2105, "else" - line 260, "pan.___", state 2112, "(1)" - line 260, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 260, "pan.___", state 2113, "else" - line 258, "pan.___", state 2118, "((i<2))" - line 258, "pan.___", state 2118, "((i>=2))" - line 265, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 265, "pan.___", state 2122, "else" - line 430, "pan.___", state 2124, "(1)" - line 430, "pan.___", state 2124, "(1)" - line 643, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 643, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 643, "pan.___", state 2129, "(1)" - line 271, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2180, "(1)" - line 252, "pan.___", state 2188, "(1)" - line 256, "pan.___", state 2200, "(1)" - line 260, "pan.___", state 2208, "(1)" - line 410, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2290, "(1)" - line 252, "pan.___", state 2298, "(1)" - line 256, "pan.___", state 2310, "(1)" - line 260, "pan.___", state 2318, "(1)" - line 271, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2387, "(1)" - line 252, "pan.___", state 2395, "(1)" - line 256, "pan.___", state 2407, "(1)" - line 260, "pan.___", state 2415, "(1)" - line 410, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2497, "(1)" - line 252, "pan.___", state 2505, "(1)" - line 256, "pan.___", state 2517, "(1)" - line 260, "pan.___", state 2525, "(1)" - line 410, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 2608, "(1)" - line 252, "pan.___", state 2616, "(1)" - line 256, "pan.___", state 2628, "(1)" - line 260, "pan.___", state 2636, "(1)" - line 248, "pan.___", state 2667, "(1)" - line 256, "pan.___", state 2687, "(1)" - line 260, "pan.___", state 2695, "(1)" - line 248, "pan.___", state 2710, "(1)" - line 252, "pan.___", state 2718, "(1)" - line 256, "pan.___", state 2730, "(1)" - line 260, "pan.___", state 2738, "(1)" - line 897, "pan.___", state 2755, "-end-" - (259 of 2755 states) -unreached in proctype urcu_writer - line 410, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 248, "pan.___", state 82, "(1)" - line 252, "pan.___", state 90, "(1)" - line 256, "pan.___", state 102, "(1)" - line 271, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 257, "(1)" - line 252, "pan.___", state 265, "(1)" - line 256, "pan.___", state 277, "(1)" - line 260, "pan.___", state 285, "(1)" - line 414, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 378, "(1)" - line 256, "pan.___", state 390, "(1)" - line 260, "pan.___", state 398, "(1)" - line 414, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 499, "(1)" - line 256, "pan.___", state 511, "(1)" - line 260, "pan.___", state 519, "(1)" - line 414, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 610, "(1)" - line 256, "pan.___", state 622, "(1)" - line 260, "pan.___", state 630, "(1)" - line 414, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 419, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 423, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 252, "pan.___", state 723, "(1)" - line 256, "pan.___", state 735, "(1)" - line 260, "pan.___", state 743, "(1)" - line 271, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 820, "(1)" - line 283, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 843, "(1)" - line 252, "pan.___", state 851, "(1)" - line 256, "pan.___", state 863, "(1)" - line 260, "pan.___", state 871, "(1)" - line 275, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 934, "(1)" - line 252, "pan.___", state 942, "(1)" - line 256, "pan.___", state 954, "(1)" - line 260, "pan.___", state 962, "(1)" - line 275, "pan.___", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1025, "(1)" - line 252, "pan.___", state 1033, "(1)" - line 256, "pan.___", state 1045, "(1)" - line 260, "pan.___", state 1053, "(1)" - line 275, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 279, "pan.___", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 248, "pan.___", state 1116, "(1)" - line 252, "pan.___", state 1124, "(1)" - line 256, "pan.___", state 1136, "(1)" - line 260, "pan.___", state 1144, "(1)" - line 1236, "pan.___", state 1159, "-end-" - (71 of 1159 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1299, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 265 seconds -pan: rate 14518.182 states/second -pan: avg transition delay 2.812e-06 usec -cp .input.spin urcu_free.spin.input -cp .input.spin.trail urcu_free.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.ltl b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.spin.input deleted file mode 100644 index 3191ba1..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free.spin.input +++ /dev/null @@ -1,1272 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_nested.define b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.define b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.log b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.log deleted file mode 100644 index 4cf70c8..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.log +++ /dev/null @@ -1,639 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 8086 States= 1e+06 Transitions= 1.91e+07 Memory= 550.334 t= 51.2 R= 2e+04 -Depth= 8086 States= 2e+06 Transitions= 3.68e+07 Memory= 634.318 t= 98.4 R= 2e+04 -Depth= 8086 States= 3e+06 Transitions= 5.68e+07 Memory= 718.205 t= 153 R= 2e+04 -pan: resizing hashtable to -w22.. done -Depth= 8086 States= 4e+06 Transitions= 7.01e+07 Memory= 833.213 t= 188 R= 2e+04 -Depth= 8086 States= 5e+06 Transitions= 8.42e+07 Memory= 917.197 t= 225 R= 2e+04 -Depth= 8086 States= 6e+06 Transitions= 9.87e+07 Memory= 1001.182 t= 263 R= 2e+04 -Depth= 8086 States= 7e+06 Transitions= 1.12e+08 Memory= 1085.166 t= 298 R= 2e+04 -Depth= 8086 States= 8e+06 Transitions= 1.28e+08 Memory= 1169.053 t= 342 R= 2e+04 -Depth= 8086 States= 9e+06 Transitions= 1.62e+08 Memory= 1253.037 t= 436 R= 2e+04 -pan: resizing hashtable to -w24.. done -Depth= 8086 States= 1e+07 Transitions= 1.95e+08 Memory= 1461.018 t= 530 R= 2e+04 -Depth= 13700 States= 1.1e+07 Transitions= 2.31e+08 Memory= 1545.002 t= 629 R= 2e+04 -Depth= 13700 States= 1.2e+07 Transitions= 2.64e+08 Memory= 1628.986 t= 721 R= 2e+04 -Depth= 13700 States= 1.3e+07 Transitions= 2.89e+08 Memory= 1712.971 t= 789 R= 2e+04 -Depth= 13700 States= 1.4e+07 Transitions= 3.09e+08 Memory= 1796.955 t= 844 R= 2e+04 -Depth= 13700 States= 1.5e+07 Transitions= 3.29e+08 Memory= 1880.940 t= 897 R= 2e+04 -pan: claim violated! (at depth 1143) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 13700, errors: 1 - 15925114 states, stored -3.2589318e+08 states, matched -3.418183e+08 transitions (= stored+matched) -5.3108495e+09 atomic steps -hash conflicts: 1.8673119e+08 (resolved) - -Stats on memory usage (in Megabytes): - 1761.735 equivalent memory usage for states (stored*(State-vector + overhead)) - 1373.571 actual memory usage for states (compression: 77.97%) - state-vector as stored = 62 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1958.576 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 21, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 53, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 67, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 85, "(1)" - line 257, "pan.___", state 105, "(1)" - line 261, "pan.___", state 113, "(1)" - line 603, "pan.___", state 132, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 139, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 185, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 203, "(1)" - line 257, "pan.___", state 223, "(1)" - line 261, "pan.___", state 231, "(1)" - line 411, "pan.___", state 250, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 282, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 296, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 314, "(1)" - line 257, "pan.___", state 334, "(1)" - line 261, "pan.___", state 342, "(1)" - line 411, "pan.___", state 363, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 365, "(1)" - line 411, "pan.___", state 366, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 366, "else" - line 411, "pan.___", state 369, "(1)" - line 415, "pan.___", state 377, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 379, "(1)" - line 415, "pan.___", state 380, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 380, "else" - line 415, "pan.___", state 383, "(1)" - line 415, "pan.___", state 384, "(1)" - line 415, "pan.___", state 384, "(1)" - line 413, "pan.___", state 389, "((i<1))" - line 413, "pan.___", state 389, "((i>=1))" - line 420, "pan.___", state 395, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 397, "(1)" - line 420, "pan.___", state 398, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 398, "else" - line 420, "pan.___", state 401, "(1)" - line 420, "pan.___", state 402, "(1)" - line 420, "pan.___", state 402, "(1)" - line 424, "pan.___", state 409, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 411, "(1)" - line 424, "pan.___", state 412, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 412, "else" - line 424, "pan.___", state 415, "(1)" - line 424, "pan.___", state 416, "(1)" - line 424, "pan.___", state 416, "(1)" - line 422, "pan.___", state 421, "((i<2))" - line 422, "pan.___", state 421, "((i>=2))" - line 249, "pan.___", state 427, "(1)" - line 253, "pan.___", state 435, "(1)" - line 253, "pan.___", state 436, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 436, "else" - line 251, "pan.___", state 441, "((i<1))" - line 251, "pan.___", state 441, "((i>=1))" - line 257, "pan.___", state 447, "(1)" - line 257, "pan.___", state 448, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 448, "else" - line 261, "pan.___", state 455, "(1)" - line 261, "pan.___", state 456, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 456, "else" - line 259, "pan.___", state 461, "((i<2))" - line 259, "pan.___", state 461, "((i>=2))" - line 266, "pan.___", state 465, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 465, "else" - line 431, "pan.___", state 467, "(1)" - line 431, "pan.___", state 467, "(1)" - line 603, "pan.___", state 470, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 603, "pan.___", state 471, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 603, "pan.___", state 472, "(1)" - line 272, "pan.___", state 476, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 478, "(1)" - line 276, "pan.___", state 485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 487, "(1)" - line 276, "pan.___", state 488, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 488, "else" - line 274, "pan.___", state 493, "((i<1))" - line 274, "pan.___", state 493, "((i>=1))" - line 280, "pan.___", state 498, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 500, "(1)" - line 280, "pan.___", state 501, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 501, "else" - line 284, "pan.___", state 507, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 509, "(1)" - line 284, "pan.___", state 510, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 510, "else" - line 282, "pan.___", state 515, "((i<2))" - line 282, "pan.___", state 515, "((i>=2))" - line 249, "pan.___", state 523, "(1)" - line 253, "pan.___", state 531, "(1)" - line 253, "pan.___", state 532, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 532, "else" - line 251, "pan.___", state 537, "((i<1))" - line 251, "pan.___", state 537, "((i>=1))" - line 257, "pan.___", state 543, "(1)" - line 257, "pan.___", state 544, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 544, "else" - line 261, "pan.___", state 551, "(1)" - line 261, "pan.___", state 552, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 552, "else" - line 266, "pan.___", state 561, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 561, "else" - line 299, "pan.___", state 563, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 563, "else" - line 411, "pan.___", state 569, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 601, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 615, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 633, "(1)" - line 257, "pan.___", state 653, "(1)" - line 261, "pan.___", state 661, "(1)" - line 411, "pan.___", state 687, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 719, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 733, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 751, "(1)" - line 257, "pan.___", state 771, "(1)" - line 261, "pan.___", state 779, "(1)" - line 411, "pan.___", state 798, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 800, "(1)" - line 411, "pan.___", state 801, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 801, "else" - line 411, "pan.___", state 804, "(1)" - line 415, "pan.___", state 812, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 814, "(1)" - line 415, "pan.___", state 815, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 815, "else" - line 415, "pan.___", state 818, "(1)" - line 415, "pan.___", state 819, "(1)" - line 415, "pan.___", state 819, "(1)" - line 413, "pan.___", state 824, "((i<1))" - line 413, "pan.___", state 824, "((i>=1))" - line 420, "pan.___", state 830, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 832, "(1)" - line 420, "pan.___", state 833, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 833, "else" - line 420, "pan.___", state 836, "(1)" - line 420, "pan.___", state 837, "(1)" - line 420, "pan.___", state 837, "(1)" - line 424, "pan.___", state 844, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 846, "(1)" - line 424, "pan.___", state 847, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 847, "else" - line 424, "pan.___", state 850, "(1)" - line 424, "pan.___", state 851, "(1)" - line 424, "pan.___", state 851, "(1)" - line 422, "pan.___", state 856, "((i<2))" - line 422, "pan.___", state 856, "((i>=2))" - line 249, "pan.___", state 862, "(1)" - line 253, "pan.___", state 870, "(1)" - line 253, "pan.___", state 871, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 871, "else" - line 251, "pan.___", state 876, "((i<1))" - line 251, "pan.___", state 876, "((i>=1))" - line 257, "pan.___", state 882, "(1)" - line 257, "pan.___", state 883, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 883, "else" - line 261, "pan.___", state 890, "(1)" - line 261, "pan.___", state 891, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 891, "else" - line 259, "pan.___", state 896, "((i<2))" - line 259, "pan.___", state 896, "((i>=2))" - line 266, "pan.___", state 900, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 900, "else" - line 431, "pan.___", state 902, "(1)" - line 431, "pan.___", state 902, "(1)" - line 611, "pan.___", state 906, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 911, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 943, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 957, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 975, "(1)" - line 257, "pan.___", state 995, "(1)" - line 261, "pan.___", state 1003, "(1)" - line 411, "pan.___", state 1025, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1057, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1071, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1089, "(1)" - line 257, "pan.___", state 1109, "(1)" - line 261, "pan.___", state 1117, "(1)" - line 411, "pan.___", state 1140, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1172, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1186, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1204, "(1)" - line 257, "pan.___", state 1224, "(1)" - line 261, "pan.___", state 1232, "(1)" - line 411, "pan.___", state 1251, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1283, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1297, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1315, "(1)" - line 257, "pan.___", state 1335, "(1)" - line 261, "pan.___", state 1343, "(1)" - line 272, "pan.___", state 1364, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1366, "(1)" - line 276, "pan.___", state 1373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1375, "(1)" - line 276, "pan.___", state 1376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1376, "else" - line 274, "pan.___", state 1381, "((i<1))" - line 274, "pan.___", state 1381, "((i>=1))" - line 280, "pan.___", state 1386, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1388, "(1)" - line 280, "pan.___", state 1389, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1389, "else" - line 284, "pan.___", state 1395, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1397, "(1)" - line 284, "pan.___", state 1398, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1398, "else" - line 282, "pan.___", state 1403, "((i<2))" - line 282, "pan.___", state 1403, "((i>=2))" - line 249, "pan.___", state 1411, "(1)" - line 253, "pan.___", state 1419, "(1)" - line 253, "pan.___", state 1420, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1420, "else" - line 251, "pan.___", state 1425, "((i<1))" - line 251, "pan.___", state 1425, "((i>=1))" - line 257, "pan.___", state 1431, "(1)" - line 257, "pan.___", state 1432, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1432, "else" - line 261, "pan.___", state 1439, "(1)" - line 261, "pan.___", state 1440, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1440, "else" - line 266, "pan.___", state 1449, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1449, "else" - line 299, "pan.___", state 1451, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1451, "else" - line 411, "pan.___", state 1457, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1489, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1521, "(1)" - line 257, "pan.___", state 1541, "(1)" - line 261, "pan.___", state 1549, "(1)" - line 411, "pan.___", state 1568, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1600, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1614, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1632, "(1)" - line 257, "pan.___", state 1652, "(1)" - line 261, "pan.___", state 1660, "(1)" - line 411, "pan.___", state 1682, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1714, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1728, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1746, "(1)" - line 257, "pan.___", state 1766, "(1)" - line 261, "pan.___", state 1774, "(1)" - line 650, "pan.___", state 1793, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1800, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1832, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1846, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1864, "(1)" - line 257, "pan.___", state 1884, "(1)" - line 261, "pan.___", state 1892, "(1)" - line 411, "pan.___", state 1911, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1943, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1957, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1975, "(1)" - line 257, "pan.___", state 1995, "(1)" - line 261, "pan.___", state 2003, "(1)" - line 411, "pan.___", state 2024, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2026, "(1)" - line 411, "pan.___", state 2027, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2027, "else" - line 411, "pan.___", state 2030, "(1)" - line 415, "pan.___", state 2038, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2040, "(1)" - line 415, "pan.___", state 2041, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2041, "else" - line 415, "pan.___", state 2044, "(1)" - line 415, "pan.___", state 2045, "(1)" - line 415, "pan.___", state 2045, "(1)" - line 413, "pan.___", state 2050, "((i<1))" - line 413, "pan.___", state 2050, "((i>=1))" - line 420, "pan.___", state 2056, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2058, "(1)" - line 420, "pan.___", state 2059, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2059, "else" - line 420, "pan.___", state 2062, "(1)" - line 420, "pan.___", state 2063, "(1)" - line 420, "pan.___", state 2063, "(1)" - line 424, "pan.___", state 2070, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2072, "(1)" - line 424, "pan.___", state 2073, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2073, "else" - line 424, "pan.___", state 2076, "(1)" - line 424, "pan.___", state 2077, "(1)" - line 424, "pan.___", state 2077, "(1)" - line 422, "pan.___", state 2082, "((i<2))" - line 422, "pan.___", state 2082, "((i>=2))" - line 249, "pan.___", state 2088, "(1)" - line 253, "pan.___", state 2096, "(1)" - line 253, "pan.___", state 2097, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2097, "else" - line 251, "pan.___", state 2102, "((i<1))" - line 251, "pan.___", state 2102, "((i>=1))" - line 257, "pan.___", state 2108, "(1)" - line 257, "pan.___", state 2109, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2109, "else" - line 261, "pan.___", state 2116, "(1)" - line 261, "pan.___", state 2117, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2117, "else" - line 259, "pan.___", state 2122, "((i<2))" - line 259, "pan.___", state 2122, "((i>=2))" - line 266, "pan.___", state 2126, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2126, "else" - line 431, "pan.___", state 2128, "(1)" - line 431, "pan.___", state 2128, "(1)" - line 650, "pan.___", state 2131, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 650, "pan.___", state 2132, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 650, "pan.___", state 2133, "(1)" - line 272, "pan.___", state 2137, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 2139, "(1)" - line 276, "pan.___", state 2146, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2148, "(1)" - line 276, "pan.___", state 2149, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 2149, "else" - line 274, "pan.___", state 2154, "((i<1))" - line 274, "pan.___", state 2154, "((i>=1))" - line 280, "pan.___", state 2159, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2161, "(1)" - line 280, "pan.___", state 2162, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 2162, "else" - line 284, "pan.___", state 2168, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2170, "(1)" - line 284, "pan.___", state 2171, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 2171, "else" - line 282, "pan.___", state 2176, "((i<2))" - line 282, "pan.___", state 2176, "((i>=2))" - line 249, "pan.___", state 2184, "(1)" - line 253, "pan.___", state 2192, "(1)" - line 253, "pan.___", state 2193, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2193, "else" - line 251, "pan.___", state 2198, "((i<1))" - line 251, "pan.___", state 2198, "((i>=1))" - line 257, "pan.___", state 2204, "(1)" - line 257, "pan.___", state 2205, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2205, "else" - line 261, "pan.___", state 2212, "(1)" - line 261, "pan.___", state 2213, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2213, "else" - line 266, "pan.___", state 2222, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2222, "else" - line 299, "pan.___", state 2224, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 2224, "else" - line 411, "pan.___", state 2230, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2262, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2276, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2294, "(1)" - line 257, "pan.___", state 2314, "(1)" - line 261, "pan.___", state 2322, "(1)" - line 272, "pan.___", state 2344, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 2346, "(1)" - line 276, "pan.___", state 2353, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2355, "(1)" - line 276, "pan.___", state 2356, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 2356, "else" - line 274, "pan.___", state 2361, "((i<1))" - line 274, "pan.___", state 2361, "((i>=1))" - line 280, "pan.___", state 2366, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2368, "(1)" - line 280, "pan.___", state 2369, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 2369, "else" - line 284, "pan.___", state 2375, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2377, "(1)" - line 284, "pan.___", state 2378, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 2378, "else" - line 282, "pan.___", state 2383, "((i<2))" - line 282, "pan.___", state 2383, "((i>=2))" - line 249, "pan.___", state 2391, "(1)" - line 253, "pan.___", state 2399, "(1)" - line 253, "pan.___", state 2400, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2400, "else" - line 251, "pan.___", state 2405, "((i<1))" - line 251, "pan.___", state 2405, "((i>=1))" - line 257, "pan.___", state 2411, "(1)" - line 257, "pan.___", state 2412, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2412, "else" - line 261, "pan.___", state 2419, "(1)" - line 261, "pan.___", state 2420, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2420, "else" - line 266, "pan.___", state 2429, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2429, "else" - line 299, "pan.___", state 2431, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 2431, "else" - line 411, "pan.___", state 2437, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2469, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2483, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2501, "(1)" - line 257, "pan.___", state 2521, "(1)" - line 261, "pan.___", state 2529, "(1)" - line 411, "pan.___", state 2548, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2594, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2612, "(1)" - line 257, "pan.___", state 2632, "(1)" - line 261, "pan.___", state 2640, "(1)" - line 249, "pan.___", state 2671, "(1)" - line 257, "pan.___", state 2691, "(1)" - line 261, "pan.___", state 2699, "(1)" - line 249, "pan.___", state 2714, "(1)" - line 257, "pan.___", state 2734, "(1)" - line 261, "pan.___", state 2742, "(1)" - line 898, "pan.___", state 2759, "-end-" - (306 of 2759 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 20, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 26, "(1)" - line 415, "pan.___", state 34, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 40, "(1)" - line 415, "pan.___", state 41, "(1)" - line 415, "pan.___", state 41, "(1)" - line 413, "pan.___", state 46, "((i<1))" - line 413, "pan.___", state 46, "((i>=1))" - line 420, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 58, "(1)" - line 420, "pan.___", state 59, "(1)" - line 420, "pan.___", state 59, "(1)" - line 424, "pan.___", state 72, "(1)" - line 424, "pan.___", state 73, "(1)" - line 424, "pan.___", state 73, "(1)" - line 422, "pan.___", state 78, "((i<2))" - line 422, "pan.___", state 78, "((i>=2))" - line 249, "pan.___", state 84, "(1)" - line 253, "pan.___", state 92, "(1)" - line 253, "pan.___", state 93, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 93, "else" - line 251, "pan.___", state 98, "((i<1))" - line 251, "pan.___", state 98, "((i>=1))" - line 257, "pan.___", state 104, "(1)" - line 257, "pan.___", state 105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 105, "else" - line 261, "pan.___", state 112, "(1)" - line 261, "pan.___", state 113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 113, "else" - line 259, "pan.___", state 118, "((i<2))" - line 259, "pan.___", state 118, "((i>=2))" - line 266, "pan.___", state 122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 122, "else" - line 431, "pan.___", state 124, "(1)" - line 431, "pan.___", state 124, "(1)" - line 272, "pan.___", state 133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 142, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 274, "pan.___", state 150, "((i<1))" - line 274, "pan.___", state 150, "((i>=1))" - line 280, "pan.___", state 155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 1021, "pan.___", state 183, "old_data = cached_rcu_ptr.val[_pid]" - line 1032, "pan.___", state 187, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" - line 411, "pan.___", state 195, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 201, "(1)" - line 415, "pan.___", state 209, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 215, "(1)" - line 415, "pan.___", state 216, "(1)" - line 415, "pan.___", state 216, "(1)" - line 420, "pan.___", state 229, "(1)" - line 424, "pan.___", state 241, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 259, "(1)" - line 253, "pan.___", state 267, "(1)" - line 261, "pan.___", state 287, "(1)" - line 431, "pan.___", state 299, "(1)" - line 431, "pan.___", state 299, "(1)" - line 415, "pan.___", state 322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 380, "(1)" - line 261, "pan.___", state 400, "(1)" - line 415, "pan.___", state 443, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 253, "pan.___", state 501, "(1)" - line 415, "pan.___", state 554, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 253, "pan.___", state 612, "(1)" - line 415, "pan.___", state 667, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 699, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 725, "(1)" - line 261, "pan.___", state 745, "(1)" - line 1168, "pan.___", state 770, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" - line 272, "pan.___", state 798, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 800, "(1)" - line 276, "pan.___", state 807, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 809, "(1)" - line 276, "pan.___", state 810, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 810, "else" - line 274, "pan.___", state 815, "((i<1))" - line 274, "pan.___", state 815, "((i>=1))" - line 280, "pan.___", state 820, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 822, "(1)" - line 280, "pan.___", state 823, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 823, "else" - line 284, "pan.___", state 829, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 831, "(1)" - line 284, "pan.___", state 832, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 832, "else" - line 282, "pan.___", state 837, "((i<2))" - line 282, "pan.___", state 837, "((i>=2))" - line 249, "pan.___", state 845, "(1)" - line 253, "pan.___", state 853, "(1)" - line 253, "pan.___", state 854, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 854, "else" - line 251, "pan.___", state 859, "((i<1))" - line 251, "pan.___", state 859, "((i>=1))" - line 257, "pan.___", state 865, "(1)" - line 257, "pan.___", state 866, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 866, "else" - line 261, "pan.___", state 873, "(1)" - line 261, "pan.___", state 874, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 874, "else" - line 266, "pan.___", state 883, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 883, "else" - line 299, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 885, "else" - line 276, "pan.___", state 898, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 911, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 920, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 936, "(1)" - line 253, "pan.___", state 944, "(1)" - line 257, "pan.___", state 956, "(1)" - line 261, "pan.___", state 964, "(1)" - line 276, "pan.___", state 989, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1011, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1027, "(1)" - line 253, "pan.___", state 1035, "(1)" - line 257, "pan.___", state 1047, "(1)" - line 261, "pan.___", state 1055, "(1)" - line 272, "pan.___", state 1071, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 1073, "(1)" - line 276, "pan.___", state 1080, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 1082, "(1)" - line 276, "pan.___", state 1083, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 1083, "else" - line 274, "pan.___", state 1088, "((i<1))" - line 274, "pan.___", state 1088, "((i>=1))" - line 280, "pan.___", state 1093, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1095, "(1)" - line 280, "pan.___", state 1096, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1096, "else" - line 284, "pan.___", state 1102, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1104, "(1)" - line 284, "pan.___", state 1105, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1105, "else" - line 282, "pan.___", state 1110, "((i<2))" - line 282, "pan.___", state 1110, "((i>=2))" - line 249, "pan.___", state 1118, "(1)" - line 253, "pan.___", state 1126, "(1)" - line 253, "pan.___", state 1127, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1127, "else" - line 251, "pan.___", state 1132, "((i<1))" - line 251, "pan.___", state 1132, "((i>=1))" - line 257, "pan.___", state 1138, "(1)" - line 257, "pan.___", state 1139, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1139, "else" - line 261, "pan.___", state 1146, "(1)" - line 261, "pan.___", state 1147, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1147, "else" - line 266, "pan.___", state 1156, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1156, "else" - line 299, "pan.___", state 1158, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1158, "else" - line 1237, "pan.___", state 1161, "-end-" - (113 of 1161 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 933 seconds -pan: rate 17076.039 states/second -pan: avg transition delay 2.7284e-06 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input deleted file mode 100644 index a7ea865..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_MB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 39bdf85..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,1146 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4000 -2:3:3920 -3:3:3923 -4:3:3923 -5:3:3926 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-1105:1:1092 -1106:1:1093 -1107:1:1100 -1108:1:1105 -1109:1:1112 -1110:1:1113 -1111:1:1112 -1112:1:1113 -1113:1:1120 -1114:0:4000 -1115:2:3548 -1116:0:4000 -1117:1:15 -1118:0:4000 -1119:2:3549 -1120:0:4000 -1121:1:1131 -1122:0:4000 -1123:2:3548 -1124:0:4000 -1125:1:2667 -1126:1:2674 -1127:1:2675 -1128:1:2682 -1129:1:2687 -1130:1:2694 -1131:1:2695 -1132:1:2694 -1133:1:2695 -1134:1:2702 -1135:1:2706 -1136:0:4000 -1137:2:3549 -1138:0:4000 -1139:1:1133 -1140:1:1134 -1141:0:3998 -1142:2:3548 -1143:0:4004 -1144:0:4000 diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.define b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.log b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.log deleted file mode 100644 index 00d7df3..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.log +++ /dev/null @@ -1,448 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 4907 States= 1e+06 Transitions= 2.54e+07 Memory= 550.432 t= 71.2 R= 1e+04 -Depth= 5133 States= 2e+06 Transitions= 5.13e+07 Memory= 634.318 t= 145 R= 1e+04 -Depth= 5133 States= 3e+06 Transitions= 7.76e+07 Memory= 718.303 t= 220 R= 1e+04 -pan: resizing hashtable to -w22.. done - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 5133, errors: 0 - 3846927 states, stored - 96650452 states, matched -1.0049738e+08 transitions (= stored+matched) -1.6169296e+09 atomic steps -hash conflicts: 68306904 (resolved) - -Stats on memory usage (in Megabytes): - 425.571 equivalent memory usage for states (stored*(State-vector + overhead)) - 330.939 actual memory usage for states (compression: 77.76%) - state-vector as stored = 62 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 820.420 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 81, "(1)" - line 257, "pan.___", state 101, "(1)" - line 261, "pan.___", state 109, "(1)" - line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 199, "(1)" - line 257, "pan.___", state 219, "(1)" - line 261, "pan.___", state 227, "(1)" - line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 310, "(1)" - line 257, "pan.___", state 330, "(1)" - line 261, "pan.___", state 338, "(1)" - line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 361, "(1)" - line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 362, "else" - line 411, "pan.___", state 365, "(1)" - line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 375, "(1)" - line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 376, "else" - line 415, "pan.___", state 379, "(1)" - line 415, "pan.___", state 380, "(1)" - line 415, "pan.___", state 380, "(1)" - line 413, "pan.___", state 385, "((i<1))" - line 413, "pan.___", state 385, "((i>=1))" - line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 393, "(1)" - line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 394, "else" - line 420, "pan.___", state 397, "(1)" - line 420, "pan.___", state 398, "(1)" - line 420, "pan.___", state 398, "(1)" - line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 407, "(1)" - line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 408, "else" - line 424, "pan.___", state 411, "(1)" - line 424, "pan.___", state 412, "(1)" - line 424, "pan.___", state 412, "(1)" - line 422, "pan.___", state 417, "((i<2))" - line 422, "pan.___", state 417, "((i>=2))" - line 249, "pan.___", state 423, "(1)" - line 253, "pan.___", state 431, "(1)" - line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 432, "else" - line 251, "pan.___", state 437, "((i<1))" - line 251, "pan.___", state 437, "((i>=1))" - line 257, "pan.___", state 443, "(1)" - line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 444, "else" - line 261, "pan.___", state 451, "(1)" - line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 452, "else" - line 259, "pan.___", state 457, "((i<2))" - line 259, "pan.___", state 457, "((i>=2))" - line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 461, "else" - line 431, "pan.___", state 463, "(1)" - line 431, "pan.___", state 463, "(1)" - line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 468, "(1)" - line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 483, "(1)" - line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 519, "(1)" - line 253, "pan.___", state 527, "(1)" - line 257, "pan.___", state 539, "(1)" - line 261, "pan.___", state 547, "(1)" - line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 629, "(1)" - line 253, "pan.___", state 637, "(1)" - line 257, "pan.___", state 649, "(1)" - line 261, "pan.___", state 657, "(1)" - line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 747, "(1)" - line 257, "pan.___", state 767, "(1)" - line 261, "pan.___", state 775, "(1)" - line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 796, "(1)" - line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 797, "else" - line 411, "pan.___", state 800, "(1)" - line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 810, "(1)" - line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 811, "else" - line 415, "pan.___", state 814, "(1)" - line 415, "pan.___", state 815, "(1)" - line 415, "pan.___", state 815, "(1)" - line 413, "pan.___", state 820, "((i<1))" - line 413, "pan.___", state 820, "((i>=1))" - line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 828, "(1)" - line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 829, "else" - line 420, "pan.___", state 832, "(1)" - line 420, "pan.___", state 833, "(1)" - line 420, "pan.___", state 833, "(1)" - line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 842, "(1)" - line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 843, "else" - line 424, "pan.___", state 846, "(1)" - line 424, "pan.___", state 847, "(1)" - line 424, "pan.___", state 847, "(1)" - line 422, "pan.___", state 852, "((i<2))" - line 422, "pan.___", state 852, "((i>=2))" - line 249, "pan.___", state 858, "(1)" - line 253, "pan.___", state 866, "(1)" - line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 867, "else" - line 251, "pan.___", state 872, "((i<1))" - line 251, "pan.___", state 872, "((i>=1))" - line 257, "pan.___", state 878, "(1)" - line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 879, "else" - line 261, "pan.___", state 886, "(1)" - line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 887, "else" - line 259, "pan.___", state 892, "((i<2))" - line 259, "pan.___", state 892, "((i>=2))" - line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 896, "else" - line 431, "pan.___", state 898, "(1)" - line 431, "pan.___", state 898, "(1)" - line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 971, "(1)" - line 253, "pan.___", state 979, "(1)" - line 257, "pan.___", state 991, "(1)" - line 261, "pan.___", state 999, "(1)" - line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1085, "(1)" - line 257, "pan.___", state 1105, "(1)" - line 261, "pan.___", state 1113, "(1)" - line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1200, "(1)" - line 257, "pan.___", state 1220, "(1)" - line 261, "pan.___", state 1228, "(1)" - line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1311, "(1)" - line 257, "pan.___", state 1331, "(1)" - line 261, "pan.___", state 1339, "(1)" - line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1407, "(1)" - line 253, "pan.___", state 1415, "(1)" - line 257, "pan.___", state 1427, "(1)" - line 261, "pan.___", state 1435, "(1)" - line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1517, "(1)" - line 253, "pan.___", state 1525, "(1)" - line 257, "pan.___", state 1537, "(1)" - line 261, "pan.___", state 1545, "(1)" - line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1628, "(1)" - line 253, "pan.___", state 1636, "(1)" - line 257, "pan.___", state 1648, "(1)" - line 261, "pan.___", state 1656, "(1)" - line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1742, "(1)" - line 257, "pan.___", state 1762, "(1)" - line 261, "pan.___", state 1770, "(1)" - line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1860, "(1)" - line 257, "pan.___", state 1880, "(1)" - line 261, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1971, "(1)" - line 257, "pan.___", state 1991, "(1)" - line 261, "pan.___", state 1999, "(1)" - line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2022, "(1)" - line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2023, "else" - line 411, "pan.___", state 2026, "(1)" - line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2036, "(1)" - line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2037, "else" - line 415, "pan.___", state 2040, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 413, "pan.___", state 2046, "((i<1))" - line 413, "pan.___", state 2046, "((i>=1))" - line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2054, "(1)" - line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2055, "else" - line 420, "pan.___", state 2058, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2068, "(1)" - line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2069, "else" - line 424, "pan.___", state 2072, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 422, "pan.___", state 2078, "((i<2))" - line 422, "pan.___", state 2078, "((i>=2))" - line 249, "pan.___", state 2084, "(1)" - line 253, "pan.___", state 2092, "(1)" - line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2093, "else" - line 251, "pan.___", state 2098, "((i<1))" - line 251, "pan.___", state 2098, "((i>=1))" - line 257, "pan.___", state 2104, "(1)" - line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2105, "else" - line 261, "pan.___", state 2112, "(1)" - line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2113, "else" - line 259, "pan.___", state 2118, "((i<2))" - line 259, "pan.___", state 2118, "((i>=2))" - line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2122, "else" - line 431, "pan.___", state 2124, "(1)" - line 431, "pan.___", state 2124, "(1)" - line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2129, "(1)" - line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2180, "(1)" - line 253, "pan.___", state 2188, "(1)" - line 257, "pan.___", state 2200, "(1)" - line 261, "pan.___", state 2208, "(1)" - line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2290, "(1)" - line 253, "pan.___", state 2298, "(1)" - line 257, "pan.___", state 2310, "(1)" - line 261, "pan.___", state 2318, "(1)" - line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2387, "(1)" - line 253, "pan.___", state 2395, "(1)" - line 257, "pan.___", state 2407, "(1)" - line 261, "pan.___", state 2415, "(1)" - line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2497, "(1)" - line 253, "pan.___", state 2505, "(1)" - line 257, "pan.___", state 2517, "(1)" - line 261, "pan.___", state 2525, "(1)" - line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2608, "(1)" - line 253, "pan.___", state 2616, "(1)" - line 257, "pan.___", state 2628, "(1)" - line 261, "pan.___", state 2636, "(1)" - line 411, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2699, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2713, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2731, "(1)" - line 257, "pan.___", state 2751, "(1)" - line 261, "pan.___", state 2759, "(1)" - line 411, "pan.___", state 2776, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2790, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2808, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2822, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2840, "(1)" - line 253, "pan.___", state 2848, "(1)" - line 257, "pan.___", state 2860, "(1)" - line 261, "pan.___", state 2868, "(1)" - line 898, "pan.___", state 2887, "-end-" - (266 of 2887 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 82, "(1)" - line 253, "pan.___", state 90, "(1)" - line 257, "pan.___", state 102, "(1)" - line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 257, "(1)" - line 253, "pan.___", state 265, "(1)" - line 257, "pan.___", state 277, "(1)" - line 261, "pan.___", state 285, "(1)" - line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 378, "(1)" - line 257, "pan.___", state 390, "(1)" - line 261, "pan.___", state 398, "(1)" - line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 499, "(1)" - line 257, "pan.___", state 511, "(1)" - line 261, "pan.___", state 519, "(1)" - line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 610, "(1)" - line 257, "pan.___", state 622, "(1)" - line 261, "pan.___", state 630, "(1)" - line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 723, "(1)" - line 257, "pan.___", state 735, "(1)" - line 261, "pan.___", state 743, "(1)" - line 272, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 820, "(1)" - line 284, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 843, "(1)" - line 253, "pan.___", state 851, "(1)" - line 257, "pan.___", state 863, "(1)" - line 261, "pan.___", state 871, "(1)" - line 276, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 934, "(1)" - line 253, "pan.___", state 942, "(1)" - line 257, "pan.___", state 954, "(1)" - line 261, "pan.___", state 962, "(1)" - line 276, "pan.___", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1025, "(1)" - line 253, "pan.___", state 1033, "(1)" - line 257, "pan.___", state 1045, "(1)" - line 261, "pan.___", state 1053, "(1)" - line 276, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1116, "(1)" - line 253, "pan.___", state 1124, "(1)" - line 257, "pan.___", state 1136, "(1)" - line 261, "pan.___", state 1144, "(1)" - line 1237, "pan.___", state 1159, "-end-" - (71 of 1159 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 285 seconds -pan: rate 13484.269 states/second -pan: avg transition delay 2.8388e-06 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.spin.input deleted file mode 100644 index d0fd74e..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_RMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.log b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.log deleted file mode 100644 index 6c01490..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.log +++ /dev/null @@ -1,467 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 4736 States= 1e+06 Transitions= 2.14e+07 Memory= 550.334 t= 59.2 R= 2e+04 -Depth= 4922 States= 2e+06 Transitions= 4.72e+07 Memory= 634.221 t= 132 R= 2e+04 -Depth= 4922 States= 3e+06 Transitions= 7.19e+07 Memory= 718.205 t= 203 R= 1e+04 -pan: resizing hashtable to -w22.. done -pan: claim violated! (at depth 1295) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 4922, errors: 1 - 3435201 states, stored - 77730101 states, matched - 81165302 transitions (= stored+matched) -1.2953753e+09 atomic steps -hash conflicts: 60833788 (resolved) - -Stats on memory usage (in Megabytes): - 380.023 equivalent memory usage for states (stored*(State-vector + overhead)) - 296.169 actual memory usage for states (compression: 77.93%) - state-vector as stored = 62 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 785.752 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 81, "(1)" - line 257, "pan.___", state 101, "(1)" - line 261, "pan.___", state 109, "(1)" - line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 199, "(1)" - line 257, "pan.___", state 219, "(1)" - line 261, "pan.___", state 227, "(1)" - line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 310, "(1)" - line 257, "pan.___", state 330, "(1)" - line 261, "pan.___", state 338, "(1)" - line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 361, "(1)" - line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 362, "else" - line 411, "pan.___", state 365, "(1)" - line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 375, "(1)" - line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 376, "else" - line 415, "pan.___", state 379, "(1)" - line 415, "pan.___", state 380, "(1)" - line 415, "pan.___", state 380, "(1)" - line 413, "pan.___", state 385, "((i<1))" - line 413, "pan.___", state 385, "((i>=1))" - line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 393, "(1)" - line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 394, "else" - line 420, "pan.___", state 397, "(1)" - line 420, "pan.___", state 398, "(1)" - line 420, "pan.___", state 398, "(1)" - line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 407, "(1)" - line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 408, "else" - line 424, "pan.___", state 411, "(1)" - line 424, "pan.___", state 412, "(1)" - line 424, "pan.___", state 412, "(1)" - line 422, "pan.___", state 417, "((i<2))" - line 422, "pan.___", state 417, "((i>=2))" - line 249, "pan.___", state 423, "(1)" - line 253, "pan.___", state 431, "(1)" - line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 432, "else" - line 251, "pan.___", state 437, "((i<1))" - line 251, "pan.___", state 437, "((i>=1))" - line 257, "pan.___", state 443, "(1)" - line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 444, "else" - line 261, "pan.___", state 451, "(1)" - line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 452, "else" - line 259, "pan.___", state 457, "((i<2))" - line 259, "pan.___", state 457, "((i>=2))" - line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 461, "else" - line 431, "pan.___", state 463, "(1)" - line 431, "pan.___", state 463, "(1)" - line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 468, "(1)" - line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 483, "(1)" - line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 519, "(1)" - line 253, "pan.___", state 527, "(1)" - line 257, "pan.___", state 539, "(1)" - line 261, "pan.___", state 547, "(1)" - line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 629, "(1)" - line 253, "pan.___", state 637, "(1)" - line 257, "pan.___", state 649, "(1)" - line 261, "pan.___", state 657, "(1)" - line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 747, "(1)" - line 257, "pan.___", state 767, "(1)" - line 261, "pan.___", state 775, "(1)" - line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 796, "(1)" - line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 797, "else" - line 411, "pan.___", state 800, "(1)" - line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 810, "(1)" - line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 811, "else" - line 415, "pan.___", state 814, "(1)" - line 415, "pan.___", state 815, "(1)" - line 415, "pan.___", state 815, "(1)" - line 413, "pan.___", state 820, "((i<1))" - line 413, "pan.___", state 820, "((i>=1))" - line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 828, "(1)" - line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 829, "else" - line 420, "pan.___", state 832, "(1)" - line 420, "pan.___", state 833, "(1)" - line 420, "pan.___", state 833, "(1)" - line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 842, "(1)" - line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 843, "else" - line 424, "pan.___", state 846, "(1)" - line 424, "pan.___", state 847, "(1)" - line 424, "pan.___", state 847, "(1)" - line 422, "pan.___", state 852, "((i<2))" - line 422, "pan.___", state 852, "((i>=2))" - line 249, "pan.___", state 858, "(1)" - line 253, "pan.___", state 866, "(1)" - line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 867, "else" - line 251, "pan.___", state 872, "((i<1))" - line 251, "pan.___", state 872, "((i>=1))" - line 257, "pan.___", state 878, "(1)" - line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 879, "else" - line 261, "pan.___", state 886, "(1)" - line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 887, "else" - line 259, "pan.___", state 892, "((i<2))" - line 259, "pan.___", state 892, "((i>=2))" - line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 896, "else" - line 431, "pan.___", state 898, "(1)" - line 431, "pan.___", state 898, "(1)" - line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 971, "(1)" - line 253, "pan.___", state 979, "(1)" - line 257, "pan.___", state 991, "(1)" - line 261, "pan.___", state 999, "(1)" - line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1085, "(1)" - line 257, "pan.___", state 1105, "(1)" - line 261, "pan.___", state 1113, "(1)" - line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1200, "(1)" - line 257, "pan.___", state 1220, "(1)" - line 261, "pan.___", state 1228, "(1)" - line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1311, "(1)" - line 257, "pan.___", state 1331, "(1)" - line 261, "pan.___", state 1339, "(1)" - line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1407, "(1)" - line 253, "pan.___", state 1415, "(1)" - line 257, "pan.___", state 1427, "(1)" - line 261, "pan.___", state 1435, "(1)" - line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1517, "(1)" - line 253, "pan.___", state 1525, "(1)" - line 257, "pan.___", state 1537, "(1)" - line 261, "pan.___", state 1545, "(1)" - line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1628, "(1)" - line 253, "pan.___", state 1636, "(1)" - line 257, "pan.___", state 1648, "(1)" - line 261, "pan.___", state 1656, "(1)" - line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1742, "(1)" - line 257, "pan.___", state 1762, "(1)" - line 261, "pan.___", state 1770, "(1)" - line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1860, "(1)" - line 257, "pan.___", state 1880, "(1)" - line 261, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1971, "(1)" - line 257, "pan.___", state 1991, "(1)" - line 261, "pan.___", state 1999, "(1)" - line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2022, "(1)" - line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2023, "else" - line 411, "pan.___", state 2026, "(1)" - line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2036, "(1)" - line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2037, "else" - line 415, "pan.___", state 2040, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 413, "pan.___", state 2046, "((i<1))" - line 413, "pan.___", state 2046, "((i>=1))" - line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2054, "(1)" - line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2055, "else" - line 420, "pan.___", state 2058, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2068, "(1)" - line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2069, "else" - line 424, "pan.___", state 2072, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 422, "pan.___", state 2078, "((i<2))" - line 422, "pan.___", state 2078, "((i>=2))" - line 249, "pan.___", state 2084, "(1)" - line 253, "pan.___", state 2092, "(1)" - line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2093, "else" - line 251, "pan.___", state 2098, "((i<1))" - line 251, "pan.___", state 2098, "((i>=1))" - line 257, "pan.___", state 2104, "(1)" - line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2105, "else" - line 261, "pan.___", state 2112, "(1)" - line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2113, "else" - line 259, "pan.___", state 2118, "((i<2))" - line 259, "pan.___", state 2118, "((i>=2))" - line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2122, "else" - line 431, "pan.___", state 2124, "(1)" - line 431, "pan.___", state 2124, "(1)" - line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2129, "(1)" - line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2180, "(1)" - line 253, "pan.___", state 2188, "(1)" - line 257, "pan.___", state 2200, "(1)" - line 261, "pan.___", state 2208, "(1)" - line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2290, "(1)" - line 253, "pan.___", state 2298, "(1)" - line 257, "pan.___", state 2310, "(1)" - line 261, "pan.___", state 2318, "(1)" - line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2387, "(1)" - line 253, "pan.___", state 2395, "(1)" - line 257, "pan.___", state 2407, "(1)" - line 261, "pan.___", state 2415, "(1)" - line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2497, "(1)" - line 253, "pan.___", state 2505, "(1)" - line 257, "pan.___", state 2517, "(1)" - line 261, "pan.___", state 2525, "(1)" - line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2608, "(1)" - line 253, "pan.___", state 2616, "(1)" - line 257, "pan.___", state 2628, "(1)" - line 261, "pan.___", state 2636, "(1)" - line 249, "pan.___", state 2667, "(1)" - line 257, "pan.___", state 2687, "(1)" - line 261, "pan.___", state 2695, "(1)" - line 249, "pan.___", state 2710, "(1)" - line 253, "pan.___", state 2718, "(1)" - line 257, "pan.___", state 2730, "(1)" - line 261, "pan.___", state 2738, "(1)" - line 898, "pan.___", state 2755, "-end-" - (259 of 2755 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 19, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 33, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 83, "(1)" - line 253, "pan.___", state 91, "(1)" - line 272, "pan.___", state 132, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 134, "(1)" - line 276, "pan.___", state 141, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 143, "(1)" - line 276, "pan.___", state 144, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 144, "else" - line 274, "pan.___", state 149, "((i<1))" - line 274, "pan.___", state 149, "((i>=1))" - line 280, "pan.___", state 154, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 156, "(1)" - line 280, "pan.___", state 157, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 157, "else" - line 284, "pan.___", state 163, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 165, "(1)" - line 284, "pan.___", state 166, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 166, "else" - line 289, "pan.___", state 175, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 289, "pan.___", state 175, "else" - line 411, "pan.___", state 194, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 208, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 226, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 240, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 258, "(1)" - line 253, "pan.___", state 266, "(1)" - line 257, "pan.___", state 278, "(1)" - line 261, "pan.___", state 286, "(1)" - line 415, "pan.___", state 321, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 339, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 353, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 379, "(1)" - line 257, "pan.___", state 391, "(1)" - line 261, "pan.___", state 399, "(1)" - line 415, "pan.___", state 442, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 460, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 474, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 500, "(1)" - line 257, "pan.___", state 512, "(1)" - line 261, "pan.___", state 520, "(1)" - line 415, "pan.___", state 553, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 571, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 585, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 611, "(1)" - line 257, "pan.___", state 623, "(1)" - line 261, "pan.___", state 631, "(1)" - line 415, "pan.___", state 666, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 684, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 698, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 724, "(1)" - line 257, "pan.___", state 736, "(1)" - line 261, "pan.___", state 744, "(1)" - line 272, "pan.___", state 797, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 806, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 844, "(1)" - line 253, "pan.___", state 852, "(1)" - line 257, "pan.___", state 864, "(1)" - line 261, "pan.___", state 872, "(1)" - line 276, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 910, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 919, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 935, "(1)" - line 253, "pan.___", state 943, "(1)" - line 257, "pan.___", state 955, "(1)" - line 261, "pan.___", state 963, "(1)" - line 276, "pan.___", state 988, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1001, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1010, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1026, "(1)" - line 253, "pan.___", state 1034, "(1)" - line 257, "pan.___", state 1046, "(1)" - line 261, "pan.___", state 1054, "(1)" - line 276, "pan.___", state 1079, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1092, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1101, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1117, "(1)" - line 253, "pan.___", state 1125, "(1)" - line 257, "pan.___", state 1137, "(1)" - line 261, "pan.___", state 1145, "(1)" - line 1237, "pan.___", state 1160, "-end-" - (77 of 1160 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 229 seconds -pan: rate 14976.68 states/second -pan: avg transition delay 2.826e-06 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input deleted file mode 100644 index dc68ded..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define NO_WMB - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index aca9da8..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1298 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3995 -2:3:3915 -3:3:3918 -4:3:3918 -5:3:3921 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index 92cda73..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.log +++ /dev/null @@ -1,571 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -Depth= 5162 States= 1e+06 Transitions= 1.79e+07 Memory= 550.334 t= 49 R= 2e+04 -pan: claim violated! (at depth 1059) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 5162, errors: 1 - 1708535 states, stored - 29763099 states, matched - 31471634 transitions (= stored+matched) -4.8935629e+08 atomic steps -hash conflicts: 14510834 (resolved) - -Stats on memory usage (in Megabytes): - 189.009 equivalent memory usage for states (stored*(State-vector + overhead)) - 144.122 actual memory usage for states (compression: 76.25%) - state-vector as stored = 60 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 609.807 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 81, "(1)" - line 257, "pan.___", state 101, "(1)" - line 261, "pan.___", state 109, "(1)" - line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 199, "(1)" - line 257, "pan.___", state 219, "(1)" - line 261, "pan.___", state 227, "(1)" - line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 310, "(1)" - line 257, "pan.___", state 330, "(1)" - line 261, "pan.___", state 338, "(1)" - line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 361, "(1)" - line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 362, "else" - line 411, "pan.___", state 365, "(1)" - line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 375, "(1)" - line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 376, "else" - line 415, "pan.___", state 379, "(1)" - line 415, "pan.___", state 380, "(1)" - line 415, "pan.___", state 380, "(1)" - line 413, "pan.___", state 385, "((i<1))" - line 413, "pan.___", state 385, "((i>=1))" - line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 393, "(1)" - line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 394, "else" - line 420, "pan.___", state 397, "(1)" - line 420, "pan.___", state 398, "(1)" - line 420, "pan.___", state 398, "(1)" - line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 407, "(1)" - line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 408, "else" - line 424, "pan.___", state 411, "(1)" - line 424, "pan.___", state 412, "(1)" - line 424, "pan.___", state 412, "(1)" - line 422, "pan.___", state 417, "((i<2))" - line 422, "pan.___", state 417, "((i>=2))" - line 249, "pan.___", state 423, "(1)" - line 253, "pan.___", state 431, "(1)" - line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 432, "else" - line 251, "pan.___", state 437, "((i<1))" - line 251, "pan.___", state 437, "((i>=1))" - line 257, "pan.___", state 443, "(1)" - line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 444, "else" - line 261, "pan.___", state 451, "(1)" - line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 452, "else" - line 259, "pan.___", state 457, "((i<2))" - line 259, "pan.___", state 457, "((i>=2))" - line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 461, "else" - line 431, "pan.___", state 463, "(1)" - line 431, "pan.___", state 463, "(1)" - line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 468, "(1)" - line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 483, "(1)" - line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 519, "(1)" - line 253, "pan.___", state 527, "(1)" - line 257, "pan.___", state 539, "(1)" - line 261, "pan.___", state 547, "(1)" - line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 629, "(1)" - line 253, "pan.___", state 637, "(1)" - line 257, "pan.___", state 649, "(1)" - line 261, "pan.___", state 657, "(1)" - line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 747, "(1)" - line 257, "pan.___", state 767, "(1)" - line 261, "pan.___", state 775, "(1)" - line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 796, "(1)" - line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 797, "else" - line 411, "pan.___", state 800, "(1)" - line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 810, "(1)" - line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 811, "else" - line 415, "pan.___", state 814, "(1)" - line 415, "pan.___", state 815, "(1)" - line 415, "pan.___", state 815, "(1)" - line 413, "pan.___", state 820, "((i<1))" - line 413, "pan.___", state 820, "((i>=1))" - line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 828, "(1)" - line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 829, "else" - line 420, "pan.___", state 832, "(1)" - line 420, "pan.___", state 833, "(1)" - line 420, "pan.___", state 833, "(1)" - line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 842, "(1)" - line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 843, "else" - line 424, "pan.___", state 846, "(1)" - line 424, "pan.___", state 847, "(1)" - line 424, "pan.___", state 847, "(1)" - line 422, "pan.___", state 852, "((i<2))" - line 422, "pan.___", state 852, "((i>=2))" - line 249, "pan.___", state 858, "(1)" - line 253, "pan.___", state 866, "(1)" - line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 867, "else" - line 251, "pan.___", state 872, "((i<1))" - line 251, "pan.___", state 872, "((i>=1))" - line 257, "pan.___", state 878, "(1)" - line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 879, "else" - line 261, "pan.___", state 886, "(1)" - line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 887, "else" - line 259, "pan.___", state 892, "((i<2))" - line 259, "pan.___", state 892, "((i>=2))" - line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 896, "else" - line 431, "pan.___", state 898, "(1)" - line 431, "pan.___", state 898, "(1)" - line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 971, "(1)" - line 253, "pan.___", state 979, "(1)" - line 257, "pan.___", state 991, "(1)" - line 261, "pan.___", state 999, "(1)" - line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1085, "(1)" - line 257, "pan.___", state 1105, "(1)" - line 261, "pan.___", state 1113, "(1)" - line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1200, "(1)" - line 257, "pan.___", state 1220, "(1)" - line 261, "pan.___", state 1228, "(1)" - line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1311, "(1)" - line 257, "pan.___", state 1331, "(1)" - line 261, "pan.___", state 1339, "(1)" - line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1407, "(1)" - line 253, "pan.___", state 1415, "(1)" - line 257, "pan.___", state 1427, "(1)" - line 261, "pan.___", state 1435, "(1)" - line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1517, "(1)" - line 253, "pan.___", state 1525, "(1)" - line 257, "pan.___", state 1537, "(1)" - line 261, "pan.___", state 1545, "(1)" - line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1628, "(1)" - line 253, "pan.___", state 1636, "(1)" - line 257, "pan.___", state 1648, "(1)" - line 261, "pan.___", state 1656, "(1)" - line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1742, "(1)" - line 257, "pan.___", state 1762, "(1)" - line 261, "pan.___", state 1770, "(1)" - line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1860, "(1)" - line 257, "pan.___", state 1880, "(1)" - line 261, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1971, "(1)" - line 257, "pan.___", state 1991, "(1)" - line 261, "pan.___", state 1999, "(1)" - line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2022, "(1)" - line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2023, "else" - line 411, "pan.___", state 2026, "(1)" - line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2036, "(1)" - line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2037, "else" - line 415, "pan.___", state 2040, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 413, "pan.___", state 2046, "((i<1))" - line 413, "pan.___", state 2046, "((i>=1))" - line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2054, "(1)" - line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2055, "else" - line 420, "pan.___", state 2058, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2068, "(1)" - line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2069, "else" - line 424, "pan.___", state 2072, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 422, "pan.___", state 2078, "((i<2))" - line 422, "pan.___", state 2078, "((i>=2))" - line 249, "pan.___", state 2084, "(1)" - line 253, "pan.___", state 2092, "(1)" - line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2093, "else" - line 251, "pan.___", state 2098, "((i<1))" - line 251, "pan.___", state 2098, "((i>=1))" - line 257, "pan.___", state 2104, "(1)" - line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2105, "else" - line 261, "pan.___", state 2112, "(1)" - line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2113, "else" - line 259, "pan.___", state 2118, "((i<2))" - line 259, "pan.___", state 2118, "((i>=2))" - line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2122, "else" - line 431, "pan.___", state 2124, "(1)" - line 431, "pan.___", state 2124, "(1)" - line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2129, "(1)" - line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2180, "(1)" - line 253, "pan.___", state 2188, "(1)" - line 257, "pan.___", state 2200, "(1)" - line 261, "pan.___", state 2208, "(1)" - line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2290, "(1)" - line 253, "pan.___", state 2298, "(1)" - line 257, "pan.___", state 2310, "(1)" - line 261, "pan.___", state 2318, "(1)" - line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2387, "(1)" - line 253, "pan.___", state 2395, "(1)" - line 257, "pan.___", state 2407, "(1)" - line 261, "pan.___", state 2415, "(1)" - line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2497, "(1)" - line 253, "pan.___", state 2505, "(1)" - line 257, "pan.___", state 2517, "(1)" - line 261, "pan.___", state 2525, "(1)" - line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2608, "(1)" - line 253, "pan.___", state 2616, "(1)" - line 257, "pan.___", state 2628, "(1)" - line 261, "pan.___", state 2636, "(1)" - line 249, "pan.___", state 2667, "(1)" - line 257, "pan.___", state 2687, "(1)" - line 261, "pan.___", state 2695, "(1)" - line 249, "pan.___", state 2710, "(1)" - line 253, "pan.___", state 2718, "(1)" - line 257, "pan.___", state 2730, "(1)" - line 261, "pan.___", state 2738, "(1)" - line 898, "pan.___", state 2755, "-end-" - (259 of 2755 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 22, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 36, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 54, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 86, "(1)" - line 253, "pan.___", state 94, "(1)" - line 257, "pan.___", state 106, "(1)" - line 272, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 144, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 157, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 211, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 229, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 243, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 261, "(1)" - line 253, "pan.___", state 269, "(1)" - line 257, "pan.___", state 281, "(1)" - line 261, "pan.___", state 289, "(1)" - line 415, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 342, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 356, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 382, "(1)" - line 257, "pan.___", state 394, "(1)" - line 261, "pan.___", state 402, "(1)" - line 411, "pan.___", state 430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 444, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 462, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 476, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 494, "(1)" - line 253, "pan.___", state 502, "(1)" - line 257, "pan.___", state 514, "(1)" - line 261, "pan.___", state 522, "(1)" - line 411, "pan.___", state 541, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 543, "(1)" - line 411, "pan.___", state 544, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 544, "else" - line 411, "pan.___", state 547, "(1)" - line 415, "pan.___", state 555, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 557, "(1)" - line 415, "pan.___", state 558, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 558, "else" - line 415, "pan.___", state 561, "(1)" - line 415, "pan.___", state 562, "(1)" - line 415, "pan.___", state 562, "(1)" - line 413, "pan.___", state 567, "((i<1))" - line 413, "pan.___", state 567, "((i>=1))" - line 420, "pan.___", state 573, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 575, "(1)" - line 420, "pan.___", state 576, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 576, "else" - line 420, "pan.___", state 579, "(1)" - line 420, "pan.___", state 580, "(1)" - line 420, "pan.___", state 580, "(1)" - line 424, "pan.___", state 587, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 589, "(1)" - line 424, "pan.___", state 590, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 590, "else" - line 424, "pan.___", state 593, "(1)" - line 424, "pan.___", state 594, "(1)" - line 424, "pan.___", state 594, "(1)" - line 422, "pan.___", state 599, "((i<2))" - line 422, "pan.___", state 599, "((i>=2))" - line 249, "pan.___", state 605, "(1)" - line 253, "pan.___", state 613, "(1)" - line 253, "pan.___", state 614, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 614, "else" - line 251, "pan.___", state 619, "((i<1))" - line 251, "pan.___", state 619, "((i>=1))" - line 257, "pan.___", state 625, "(1)" - line 257, "pan.___", state 626, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 626, "else" - line 261, "pan.___", state 633, "(1)" - line 261, "pan.___", state 634, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 634, "else" - line 259, "pan.___", state 639, "((i<2))" - line 259, "pan.___", state 639, "((i>=2))" - line 266, "pan.___", state 643, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 643, "else" - line 431, "pan.___", state 645, "(1)" - line 431, "pan.___", state 645, "(1)" - line 1117, "pan.___", state 649, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" - line 411, "pan.___", state 654, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 656, "(1)" - line 411, "pan.___", state 657, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 657, "else" - line 411, "pan.___", state 660, "(1)" - line 415, "pan.___", state 668, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 670, "(1)" - line 415, "pan.___", state 671, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 671, "else" - line 415, "pan.___", state 674, "(1)" - line 415, "pan.___", state 675, "(1)" - line 415, "pan.___", state 675, "(1)" - line 413, "pan.___", state 680, "((i<1))" - line 413, "pan.___", state 680, "((i>=1))" - line 420, "pan.___", state 686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 688, "(1)" - line 420, "pan.___", state 689, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 689, "else" - line 420, "pan.___", state 692, "(1)" - line 420, "pan.___", state 693, "(1)" - line 420, "pan.___", state 693, "(1)" - line 424, "pan.___", state 700, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 702, "(1)" - line 424, "pan.___", state 703, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 703, "else" - line 424, "pan.___", state 706, "(1)" - line 424, "pan.___", state 707, "(1)" - line 424, "pan.___", state 707, "(1)" - line 422, "pan.___", state 712, "((i<2))" - line 422, "pan.___", state 712, "((i>=2))" - line 249, "pan.___", state 718, "(1)" - line 253, "pan.___", state 726, "(1)" - line 253, "pan.___", state 727, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 727, "else" - line 251, "pan.___", state 732, "((i<1))" - line 251, "pan.___", state 732, "((i>=1))" - line 257, "pan.___", state 738, "(1)" - line 257, "pan.___", state 739, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 739, "else" - line 261, "pan.___", state 746, "(1)" - line 261, "pan.___", state 747, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 747, "else" - line 259, "pan.___", state 752, "((i<2))" - line 259, "pan.___", state 752, "((i>=2))" - line 266, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 756, "else" - line 431, "pan.___", state 758, "(1)" - line 431, "pan.___", state 758, "(1)" - line 1133, "pan.___", state 763, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" - line 1128, "pan.___", state 764, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" - line 1128, "pan.___", state 764, "else" - line 1153, "pan.___", state 768, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" - line 272, "pan.___", state 799, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 823, "(1)" - line 284, "pan.___", state 830, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 846, "(1)" - line 253, "pan.___", state 854, "(1)" - line 257, "pan.___", state 866, "(1)" - line 261, "pan.___", state 874, "(1)" - line 276, "pan.___", state 899, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 912, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 921, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 937, "(1)" - line 253, "pan.___", state 945, "(1)" - line 257, "pan.___", state 957, "(1)" - line 261, "pan.___", state 965, "(1)" - line 272, "pan.___", state 981, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 272, "pan.___", state 983, "(1)" - line 276, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 992, "(1)" - line 276, "pan.___", state 993, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 276, "pan.___", state 993, "else" - line 274, "pan.___", state 998, "((i<1))" - line 274, "pan.___", state 998, "((i>=1))" - line 280, "pan.___", state 1003, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1005, "(1)" - line 280, "pan.___", state 1006, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 280, "pan.___", state 1006, "else" - line 284, "pan.___", state 1012, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1014, "(1)" - line 284, "pan.___", state 1015, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 284, "pan.___", state 1015, "else" - line 282, "pan.___", state 1020, "((i<2))" - line 282, "pan.___", state 1020, "((i>=2))" - line 249, "pan.___", state 1028, "(1)" - line 253, "pan.___", state 1036, "(1)" - line 253, "pan.___", state 1037, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 1037, "else" - line 251, "pan.___", state 1042, "((i<1))" - line 251, "pan.___", state 1042, "((i>=1))" - line 257, "pan.___", state 1048, "(1)" - line 257, "pan.___", state 1049, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 1049, "else" - line 261, "pan.___", state 1056, "(1)" - line 261, "pan.___", state 1057, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 1057, "else" - line 266, "pan.___", state 1066, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 1066, "else" - line 299, "pan.___", state 1068, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 299, "pan.___", state 1068, "else" - line 276, "pan.___", state 1081, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1094, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1103, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1119, "(1)" - line 253, "pan.___", state 1127, "(1)" - line 257, "pan.___", state 1139, "(1)" - line 261, "pan.___", state 1147, "(1)" - line 1237, "pan.___", state 1162, "-end-" - (145 of 1162 states) -unreached in proctype :init: - line 1248, "pan.___", state 9, "((j<2))" - line 1248, "pan.___", state 9, "((j>=2))" - line 1249, "pan.___", state 20, "((j<2))" - line 1249, "pan.___", state 20, "((j>=2))" - line 1254, "pan.___", state 33, "((j<2))" - line 1254, "pan.___", state 33, "((j>=2))" - line 1252, "pan.___", state 43, "((i<1))" - line 1252, "pan.___", state 43, "((i>=1))" - line 1262, "pan.___", state 54, "((j<2))" - line 1262, "pan.___", state 54, "((j>=2))" - line 1266, "pan.___", state 67, "((j<2))" - line 1266, "pan.___", state 67, "((j>=2))" - (6 of 78 states) -unreached in proctype :never: - line 1300, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 86.8 seconds -pan: rate 19690.388 states/second -pan: avg transition delay 2.7571e-06 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input deleted file mode 100644 index e7189ef..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define SINGLE_FLIP - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 6eb297f..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1062 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3997 -2:3:3917 -3:3:3920 -4:3:3920 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-1029:2:3646 -1030:2:3650 -1031:2:3654 -1032:2:3655 -1033:2:3659 -1034:2:3667 -1035:2:3668 -1036:2:3672 -1037:2:3676 -1038:2:3677 -1039:2:3672 -1040:2:3676 -1041:2:3677 -1042:2:3681 -1043:2:3688 -1044:2:3695 -1045:2:3696 -1046:2:3703 -1047:2:3708 -1048:2:3715 -1049:2:3716 -1050:2:3715 -1051:2:3716 -1052:2:3723 -1053:2:3727 -1054:0:3997 -1055:1:1129 -1056:1:1130 -1057:0:3995 -1058:1:11 -1059:0:4001 -1060:1:1715 diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress.ltl b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.define b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.log b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.log deleted file mode 100644 index c286056..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.log +++ /dev/null @@ -1,462 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -depth 23: Claim reached state 9 (line 1300) -depth 1053: Claim reached state 9 (line 1299) -Depth= 6090 States= 1e+06 Transitions= 2.22e+07 Memory= 510.295 t= 64.5 R= 2e+04 -Depth= 6090 States= 2e+06 Transitions= 5.32e+07 Memory= 552.776 t= 157 R= 1e+04 -Depth= 6090 States= 3e+06 Transitions= 8.56e+07 Memory= 597.014 t= 253 R= 1e+04 -pan: resizing hashtable to -w22.. done -Depth= 6090 States= 4e+06 Transitions= 1.18e+08 Memory= 672.764 t= 351 R= 1e+04 -Depth= 6090 States= 5e+06 Transitions= 1.49e+08 Memory= 716.416 t= 443 R= 1e+04 -Depth= 6090 States= 6e+06 Transitions= 1.79e+08 Memory= 760.459 t= 531 R= 1e+04 -Depth= 6090 States= 7e+06 Transitions= 2.11e+08 Memory= 804.990 t= 627 R= 1e+04 -Depth= 6090 States= 8e+06 Transitions= 2.44e+08 Memory= 848.057 t= 727 R= 1e+04 -Depth= 6090 States= 9e+06 Transitions= 2.77e+08 Memory= 891.807 t= 827 R= 1e+04 -pan: resizing hashtable to -w24.. done -Depth= 6090 States= 1e+07 Transitions= 3.11e+08 Memory= 1062.385 t= 928 R= 1e+04 -Depth= 6090 States= 1.1e+07 Transitions= 3.41e+08 Memory= 1105.744 t= 1.02e+03 R= 1e+04 -Depth= 6090 States= 1.2e+07 Transitions= 3.7e+08 Memory= 1151.252 t= 1.1e+03 R= 1e+04 -Depth= 6090 States= 1.3e+07 Transitions= 4.06e+08 Memory= 1193.635 t= 1.21e+03 R= 1e+04 -Depth= 6090 States= 1.4e+07 Transitions= 4.4e+08 Memory= 1236.506 t= 1.31e+03 R= 1e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 6090, errors: 0 - 7774591 states, stored (1.48046e+07 visited) -4.51403e+08 states, matched -4.6620756e+08 transitions (= visited+matched) -7.4729019e+09 atomic steps -hash conflicts: 1.6384912e+08 (resolved) - -Stats on memory usage (in Megabytes): - 860.074 equivalent memory usage for states (stored*(State-vector + overhead)) - 689.043 actual memory usage for states (compression: 80.11%) - state-vector as stored = 65 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1274.299 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 81, "(1)" - line 257, "pan.___", state 101, "(1)" - line 261, "pan.___", state 109, "(1)" - line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 199, "(1)" - line 257, "pan.___", state 219, "(1)" - line 261, "pan.___", state 227, "(1)" - line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 310, "(1)" - line 257, "pan.___", state 330, "(1)" - line 261, "pan.___", state 338, "(1)" - line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 361, "(1)" - line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 362, "else" - line 411, "pan.___", state 365, "(1)" - line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 375, "(1)" - line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 376, "else" - line 415, "pan.___", state 379, "(1)" - line 415, "pan.___", state 380, "(1)" - line 415, "pan.___", state 380, "(1)" - line 413, "pan.___", state 385, "((i<1))" - line 413, "pan.___", state 385, "((i>=1))" - line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 393, "(1)" - line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 394, "else" - line 420, "pan.___", state 397, "(1)" - line 420, "pan.___", state 398, "(1)" - line 420, "pan.___", state 398, "(1)" - line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 407, "(1)" - line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 408, "else" - line 424, "pan.___", state 411, "(1)" - line 424, "pan.___", state 412, "(1)" - line 424, "pan.___", state 412, "(1)" - line 422, "pan.___", state 417, "((i<2))" - line 422, "pan.___", state 417, "((i>=2))" - line 249, "pan.___", state 423, "(1)" - line 253, "pan.___", state 431, "(1)" - line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 432, "else" - line 251, "pan.___", state 437, "((i<1))" - line 251, "pan.___", state 437, "((i>=1))" - line 257, "pan.___", state 443, "(1)" - line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 444, "else" - line 261, "pan.___", state 451, "(1)" - line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 452, "else" - line 259, "pan.___", state 457, "((i<2))" - line 259, "pan.___", state 457, "((i>=2))" - line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 461, "else" - line 431, "pan.___", state 463, "(1)" - line 431, "pan.___", state 463, "(1)" - line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 468, "(1)" - line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 483, "(1)" - line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 519, "(1)" - line 253, "pan.___", state 527, "(1)" - line 257, "pan.___", state 539, "(1)" - line 261, "pan.___", state 547, "(1)" - line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 629, "(1)" - line 253, "pan.___", state 637, "(1)" - line 257, "pan.___", state 649, "(1)" - line 261, "pan.___", state 657, "(1)" - line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 747, "(1)" - line 257, "pan.___", state 767, "(1)" - line 261, "pan.___", state 775, "(1)" - line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 796, "(1)" - line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 797, "else" - line 411, "pan.___", state 800, "(1)" - line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 810, "(1)" - line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 811, "else" - line 415, "pan.___", state 814, "(1)" - line 415, "pan.___", state 815, "(1)" - line 415, "pan.___", state 815, "(1)" - line 413, "pan.___", state 820, "((i<1))" - line 413, "pan.___", state 820, "((i>=1))" - line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 828, "(1)" - line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 829, "else" - line 420, "pan.___", state 832, "(1)" - line 420, "pan.___", state 833, "(1)" - line 420, "pan.___", state 833, "(1)" - line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 842, "(1)" - line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 843, "else" - line 424, "pan.___", state 846, "(1)" - line 424, "pan.___", state 847, "(1)" - line 424, "pan.___", state 847, "(1)" - line 422, "pan.___", state 852, "((i<2))" - line 422, "pan.___", state 852, "((i>=2))" - line 249, "pan.___", state 858, "(1)" - line 253, "pan.___", state 866, "(1)" - line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 867, "else" - line 251, "pan.___", state 872, "((i<1))" - line 251, "pan.___", state 872, "((i>=1))" - line 257, "pan.___", state 878, "(1)" - line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 879, "else" - line 261, "pan.___", state 886, "(1)" - line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 887, "else" - line 259, "pan.___", state 892, "((i<2))" - line 259, "pan.___", state 892, "((i>=2))" - line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 896, "else" - line 431, "pan.___", state 898, "(1)" - line 431, "pan.___", state 898, "(1)" - line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 971, "(1)" - line 253, "pan.___", state 979, "(1)" - line 257, "pan.___", state 991, "(1)" - line 261, "pan.___", state 999, "(1)" - line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1085, "(1)" - line 257, "pan.___", state 1105, "(1)" - line 261, "pan.___", state 1113, "(1)" - line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1200, "(1)" - line 257, "pan.___", state 1220, "(1)" - line 261, "pan.___", state 1228, "(1)" - line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1311, "(1)" - line 257, "pan.___", state 1331, "(1)" - line 261, "pan.___", state 1339, "(1)" - line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1407, "(1)" - line 253, "pan.___", state 1415, "(1)" - line 257, "pan.___", state 1427, "(1)" - line 261, "pan.___", state 1435, "(1)" - line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1517, "(1)" - line 253, "pan.___", state 1525, "(1)" - line 257, "pan.___", state 1537, "(1)" - line 261, "pan.___", state 1545, "(1)" - line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1628, "(1)" - line 253, "pan.___", state 1636, "(1)" - line 257, "pan.___", state 1648, "(1)" - line 261, "pan.___", state 1656, "(1)" - line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1742, "(1)" - line 257, "pan.___", state 1762, "(1)" - line 261, "pan.___", state 1770, "(1)" - line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1860, "(1)" - line 257, "pan.___", state 1880, "(1)" - line 261, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1971, "(1)" - line 257, "pan.___", state 1991, "(1)" - line 261, "pan.___", state 1999, "(1)" - line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2022, "(1)" - line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2023, "else" - line 411, "pan.___", state 2026, "(1)" - line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2036, "(1)" - line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2037, "else" - line 415, "pan.___", state 2040, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 413, "pan.___", state 2046, "((i<1))" - line 413, "pan.___", state 2046, "((i>=1))" - line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2054, "(1)" - line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2055, "else" - line 420, "pan.___", state 2058, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2068, "(1)" - line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2069, "else" - line 424, "pan.___", state 2072, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 422, "pan.___", state 2078, "((i<2))" - line 422, "pan.___", state 2078, "((i>=2))" - line 249, "pan.___", state 2084, "(1)" - line 253, "pan.___", state 2092, "(1)" - line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2093, "else" - line 251, "pan.___", state 2098, "((i<1))" - line 251, "pan.___", state 2098, "((i>=1))" - line 257, "pan.___", state 2104, "(1)" - line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2105, "else" - line 261, "pan.___", state 2112, "(1)" - line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2113, "else" - line 259, "pan.___", state 2118, "((i<2))" - line 259, "pan.___", state 2118, "((i>=2))" - line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2122, "else" - line 431, "pan.___", state 2124, "(1)" - line 431, "pan.___", state 2124, "(1)" - line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2129, "(1)" - line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2180, "(1)" - line 253, "pan.___", state 2188, "(1)" - line 257, "pan.___", state 2200, "(1)" - line 261, "pan.___", state 2208, "(1)" - line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2290, "(1)" - line 253, "pan.___", state 2298, "(1)" - line 257, "pan.___", state 2310, "(1)" - line 261, "pan.___", state 2318, "(1)" - line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2387, "(1)" - line 253, "pan.___", state 2395, "(1)" - line 257, "pan.___", state 2407, "(1)" - line 261, "pan.___", state 2415, "(1)" - line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2497, "(1)" - line 253, "pan.___", state 2505, "(1)" - line 257, "pan.___", state 2517, "(1)" - line 261, "pan.___", state 2525, "(1)" - line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2608, "(1)" - line 253, "pan.___", state 2616, "(1)" - line 257, "pan.___", state 2628, "(1)" - line 261, "pan.___", state 2636, "(1)" - line 249, "pan.___", state 2667, "(1)" - line 257, "pan.___", state 2687, "(1)" - line 261, "pan.___", state 2695, "(1)" - line 249, "pan.___", state 2710, "(1)" - line 253, "pan.___", state 2718, "(1)" - line 257, "pan.___", state 2730, "(1)" - line 261, "pan.___", state 2738, "(1)" - line 898, "pan.___", state 2755, "-end-" - (259 of 2755 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 82, "(1)" - line 253, "pan.___", state 90, "(1)" - line 257, "pan.___", state 102, "(1)" - line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 257, "(1)" - line 253, "pan.___", state 265, "(1)" - line 257, "pan.___", state 277, "(1)" - line 261, "pan.___", state 285, "(1)" - line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 378, "(1)" - line 257, "pan.___", state 390, "(1)" - line 261, "pan.___", state 398, "(1)" - line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 499, "(1)" - line 257, "pan.___", state 511, "(1)" - line 261, "pan.___", state 519, "(1)" - line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 610, "(1)" - line 257, "pan.___", state 622, "(1)" - line 261, "pan.___", state 630, "(1)" - line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 723, "(1)" - line 257, "pan.___", state 735, "(1)" - line 261, "pan.___", state 743, "(1)" - line 272, "pan.___", state 791, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 800, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 813, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 838, "(1)" - line 253, "pan.___", state 846, "(1)" - line 257, "pan.___", state 858, "(1)" - line 261, "pan.___", state 866, "(1)" - line 272, "pan.___", state 886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 895, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 910, "(1)" - line 284, "pan.___", state 917, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 933, "(1)" - line 253, "pan.___", state 941, "(1)" - line 257, "pan.___", state 953, "(1)" - line 261, "pan.___", state 961, "(1)" - line 276, "pan.___", state 986, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 999, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1008, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1024, "(1)" - line 253, "pan.___", state 1032, "(1)" - line 257, "pan.___", state 1044, "(1)" - line 261, "pan.___", state 1052, "(1)" - line 276, "pan.___", state 1077, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1090, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1099, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1115, "(1)" - line 253, "pan.___", state 1123, "(1)" - line 257, "pan.___", state 1135, "(1)" - line 261, "pan.___", state 1143, "(1)" - line 276, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1181, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1190, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1206, "(1)" - line 253, "pan.___", state 1214, "(1)" - line 257, "pan.___", state 1226, "(1)" - line 261, "pan.___", state 1234, "(1)" - line 1237, "pan.___", state 1249, "-end-" - (78 of 1249 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1302, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 1.39e+03 seconds -pan: rate 10656.973 states/second -pan: avg transition delay 2.9798e-06 usec -cp .input.spin urcu_progress_reader.spin.input -cp .input.spin.trail urcu_progress_reader.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.spin.input deleted file mode 100644 index 7cbeb11..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define READER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.define b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.log b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.log deleted file mode 100644 index 065cb84..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.log +++ /dev/null @@ -1,455 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1295) -depth 23: Claim reached state 9 (line 1300) -depth 1404: Claim reached state 9 (line 1299) -Depth= 4122 States= 1e+06 Transitions= 2.18e+07 Memory= 494.377 t= 63.1 R= 2e+04 -Depth= 4237 States= 2e+06 Transitions= 4.19e+07 Memory= 522.209 t= 122 R= 2e+04 -Depth= 4557 States= 3e+06 Transitions= 6.67e+07 Memory= 550.139 t= 195 R= 2e+04 -pan: resizing hashtable to -w22.. done -Depth= 4762 States= 4e+06 Transitions= 9.06e+07 Memory= 609.190 t= 264 R= 2e+04 -Depth= 4793 States= 5e+06 Transitions= 1.25e+08 Memory= 666.709 t= 366 R= 1e+04 -Depth= 4793 States= 6e+06 Transitions= 1.62e+08 Memory= 713.877 t= 473 R= 1e+04 -Depth= 4980 States= 7e+06 Transitions= 1.97e+08 Memory= 760.752 t= 578 R= 1e+04 -Depth= 4980 States= 8e+06 Transitions= 2.29e+08 Memory= 809.190 t= 674 R= 1e+04 -Depth= 4980 States= 9e+06 Transitions= 2.66e+08 Memory= 862.803 t= 784 R= 1e+04 -pan: resizing hashtable to -w24.. done -Depth= 4980 States= 1e+07 Transitions= 2.98e+08 Memory= 1029.377 t= 880 R= 1e+04 -Depth= 4980 States= 1.1e+07 Transitions= 3.34e+08 Memory= 1080.061 t= 987 R= 1e+04 -Depth= 4980 States= 1.2e+07 Transitions= 3.69e+08 Memory= 1129.279 t= 1.09e+03 R= 1e+04 -Depth= 4980 States= 1.3e+07 Transitions= 4.01e+08 Memory= 1177.912 t= 1.18e+03 R= 1e+04 -Depth= 4980 States= 1.4e+07 Transitions= 4.4e+08 Memory= 1226.447 t= 1.3e+03 R= 1e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 4980, errors: 0 - 7808338 states, stored (1.48869e+07 visited) -4.5734827e+08 states, matched -4.7223515e+08 transitions (= visited+matched) -7.5648218e+09 atomic steps -hash conflicts: 1.2909926e+08 (resolved) - -Stats on memory usage (in Megabytes): - 863.807 equivalent memory usage for states (stored*(State-vector + overhead)) - 691.866 actual memory usage for states (compression: 80.09%) - state-vector as stored = 65 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1277.131 total actual memory usage - -unreached in proctype urcu_reader - line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 81, "(1)" - line 257, "pan.___", state 101, "(1)" - line 261, "pan.___", state 109, "(1)" - line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 199, "(1)" - line 257, "pan.___", state 219, "(1)" - line 261, "pan.___", state 227, "(1)" - line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 310, "(1)" - line 257, "pan.___", state 330, "(1)" - line 261, "pan.___", state 338, "(1)" - line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 361, "(1)" - line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 362, "else" - line 411, "pan.___", state 365, "(1)" - line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 375, "(1)" - line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 376, "else" - line 415, "pan.___", state 379, "(1)" - line 415, "pan.___", state 380, "(1)" - line 415, "pan.___", state 380, "(1)" - line 413, "pan.___", state 385, "((i<1))" - line 413, "pan.___", state 385, "((i>=1))" - line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 393, "(1)" - line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 394, "else" - line 420, "pan.___", state 397, "(1)" - line 420, "pan.___", state 398, "(1)" - line 420, "pan.___", state 398, "(1)" - line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 407, "(1)" - line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 408, "else" - line 424, "pan.___", state 411, "(1)" - line 424, "pan.___", state 412, "(1)" - line 424, "pan.___", state 412, "(1)" - line 422, "pan.___", state 417, "((i<2))" - line 422, "pan.___", state 417, "((i>=2))" - line 249, "pan.___", state 423, "(1)" - line 253, "pan.___", state 431, "(1)" - line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 432, "else" - line 251, "pan.___", state 437, "((i<1))" - line 251, "pan.___", state 437, "((i>=1))" - line 257, "pan.___", state 443, "(1)" - line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 444, "else" - line 261, "pan.___", state 451, "(1)" - line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 452, "else" - line 259, "pan.___", state 457, "((i<2))" - line 259, "pan.___", state 457, "((i>=2))" - line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 461, "else" - line 431, "pan.___", state 463, "(1)" - line 431, "pan.___", state 463, "(1)" - line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 597, "pan.___", state 468, "(1)" - line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 483, "(1)" - line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 519, "(1)" - line 253, "pan.___", state 527, "(1)" - line 257, "pan.___", state 539, "(1)" - line 261, "pan.___", state 547, "(1)" - line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 629, "(1)" - line 253, "pan.___", state 637, "(1)" - line 257, "pan.___", state 649, "(1)" - line 261, "pan.___", state 657, "(1)" - line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 747, "(1)" - line 257, "pan.___", state 767, "(1)" - line 261, "pan.___", state 775, "(1)" - line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 796, "(1)" - line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 797, "else" - line 411, "pan.___", state 800, "(1)" - line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 810, "(1)" - line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 811, "else" - line 415, "pan.___", state 814, "(1)" - line 415, "pan.___", state 815, "(1)" - line 415, "pan.___", state 815, "(1)" - line 413, "pan.___", state 820, "((i<1))" - line 413, "pan.___", state 820, "((i>=1))" - line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 828, "(1)" - line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 829, "else" - line 420, "pan.___", state 832, "(1)" - line 420, "pan.___", state 833, "(1)" - line 420, "pan.___", state 833, "(1)" - line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 842, "(1)" - line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 843, "else" - line 424, "pan.___", state 846, "(1)" - line 424, "pan.___", state 847, "(1)" - line 424, "pan.___", state 847, "(1)" - line 422, "pan.___", state 852, "((i<2))" - line 422, "pan.___", state 852, "((i>=2))" - line 249, "pan.___", state 858, "(1)" - line 253, "pan.___", state 866, "(1)" - line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 867, "else" - line 251, "pan.___", state 872, "((i<1))" - line 251, "pan.___", state 872, "((i>=1))" - line 257, "pan.___", state 878, "(1)" - line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 879, "else" - line 261, "pan.___", state 886, "(1)" - line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 887, "else" - line 259, "pan.___", state 892, "((i<2))" - line 259, "pan.___", state 892, "((i>=2))" - line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 896, "else" - line 431, "pan.___", state 898, "(1)" - line 431, "pan.___", state 898, "(1)" - line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 971, "(1)" - line 253, "pan.___", state 979, "(1)" - line 257, "pan.___", state 991, "(1)" - line 261, "pan.___", state 999, "(1)" - line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1085, "(1)" - line 257, "pan.___", state 1105, "(1)" - line 261, "pan.___", state 1113, "(1)" - line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1200, "(1)" - line 257, "pan.___", state 1220, "(1)" - line 261, "pan.___", state 1228, "(1)" - line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1311, "(1)" - line 257, "pan.___", state 1331, "(1)" - line 261, "pan.___", state 1339, "(1)" - line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1407, "(1)" - line 253, "pan.___", state 1415, "(1)" - line 257, "pan.___", state 1427, "(1)" - line 261, "pan.___", state 1435, "(1)" - line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1517, "(1)" - line 253, "pan.___", state 1525, "(1)" - line 257, "pan.___", state 1537, "(1)" - line 261, "pan.___", state 1545, "(1)" - line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1628, "(1)" - line 253, "pan.___", state 1636, "(1)" - line 257, "pan.___", state 1648, "(1)" - line 261, "pan.___", state 1656, "(1)" - line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1742, "(1)" - line 257, "pan.___", state 1762, "(1)" - line 261, "pan.___", state 1770, "(1)" - line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1860, "(1)" - line 257, "pan.___", state 1880, "(1)" - line 261, "pan.___", state 1888, "(1)" - line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1971, "(1)" - line 257, "pan.___", state 1991, "(1)" - line 261, "pan.___", state 1999, "(1)" - line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 2022, "(1)" - line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 411, "pan.___", state 2023, "else" - line 411, "pan.___", state 2026, "(1)" - line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2036, "(1)" - line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 415, "pan.___", state 2037, "else" - line 415, "pan.___", state 2040, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 415, "pan.___", state 2041, "(1)" - line 413, "pan.___", state 2046, "((i<1))" - line 413, "pan.___", state 2046, "((i>=1))" - line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2054, "(1)" - line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 420, "pan.___", state 2055, "else" - line 420, "pan.___", state 2058, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 420, "pan.___", state 2059, "(1)" - line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2068, "(1)" - line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 424, "pan.___", state 2069, "else" - line 424, "pan.___", state 2072, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 424, "pan.___", state 2073, "(1)" - line 422, "pan.___", state 2078, "((i<2))" - line 422, "pan.___", state 2078, "((i>=2))" - line 249, "pan.___", state 2084, "(1)" - line 253, "pan.___", state 2092, "(1)" - line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 253, "pan.___", state 2093, "else" - line 251, "pan.___", state 2098, "((i<1))" - line 251, "pan.___", state 2098, "((i>=1))" - line 257, "pan.___", state 2104, "(1)" - line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 257, "pan.___", state 2105, "else" - line 261, "pan.___", state 2112, "(1)" - line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 261, "pan.___", state 2113, "else" - line 259, "pan.___", state 2118, "((i<2))" - line 259, "pan.___", state 2118, "((i>=2))" - line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 266, "pan.___", state 2122, "else" - line 431, "pan.___", state 2124, "(1)" - line 431, "pan.___", state 2124, "(1)" - line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 644, "pan.___", state 2129, "(1)" - line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2180, "(1)" - line 253, "pan.___", state 2188, "(1)" - line 257, "pan.___", state 2200, "(1)" - line 261, "pan.___", state 2208, "(1)" - line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2290, "(1)" - line 253, "pan.___", state 2298, "(1)" - line 257, "pan.___", state 2310, "(1)" - line 261, "pan.___", state 2318, "(1)" - line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2387, "(1)" - line 253, "pan.___", state 2395, "(1)" - line 257, "pan.___", state 2407, "(1)" - line 261, "pan.___", state 2415, "(1)" - line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2497, "(1)" - line 253, "pan.___", state 2505, "(1)" - line 257, "pan.___", state 2517, "(1)" - line 261, "pan.___", state 2525, "(1)" - line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 2608, "(1)" - line 253, "pan.___", state 2616, "(1)" - line 257, "pan.___", state 2628, "(1)" - line 261, "pan.___", state 2636, "(1)" - line 249, "pan.___", state 2667, "(1)" - line 257, "pan.___", state 2687, "(1)" - line 261, "pan.___", state 2695, "(1)" - line 249, "pan.___", state 2710, "(1)" - line 253, "pan.___", state 2718, "(1)" - line 257, "pan.___", state 2730, "(1)" - line 261, "pan.___", state 2738, "(1)" - line 898, "pan.___", state 2755, "-end-" - (259 of 2755 states) -unreached in proctype urcu_writer - line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 249, "pan.___", state 82, "(1)" - line 253, "pan.___", state 90, "(1)" - line 257, "pan.___", state 102, "(1)" - line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 257, "(1)" - line 253, "pan.___", state 265, "(1)" - line 257, "pan.___", state 277, "(1)" - line 261, "pan.___", state 285, "(1)" - line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 378, "(1)" - line 257, "pan.___", state 390, "(1)" - line 261, "pan.___", state 398, "(1)" - line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 499, "(1)" - line 257, "pan.___", state 511, "(1)" - line 261, "pan.___", state 519, "(1)" - line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 610, "(1)" - line 257, "pan.___", state 622, "(1)" - line 261, "pan.___", state 630, "(1)" - line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 253, "pan.___", state 723, "(1)" - line 257, "pan.___", state 735, "(1)" - line 261, "pan.___", state 743, "(1)" - line 272, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 276, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 820, "(1)" - line 284, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 843, "(1)" - line 253, "pan.___", state 851, "(1)" - line 257, "pan.___", state 863, "(1)" - line 261, "pan.___", state 871, "(1)" - line 276, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 934, "(1)" - line 253, "pan.___", state 942, "(1)" - line 257, "pan.___", state 954, "(1)" - line 261, "pan.___", state 962, "(1)" - line 276, "pan.___", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1025, "(1)" - line 253, "pan.___", state 1033, "(1)" - line 257, "pan.___", state 1045, "(1)" - line 261, "pan.___", state 1053, "(1)" - line 276, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 280, "pan.___", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 284, "pan.___", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 249, "pan.___", state 1116, "(1)" - line 253, "pan.___", state 1124, "(1)" - line 257, "pan.___", state 1136, "(1)" - line 261, "pan.___", state 1144, "(1)" - line 1237, "pan.___", state 1159, "-end-" - (71 of 1159 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1302, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 1.4e+03 seconds -pan: rate 10667.087 states/second -pan: avg transition delay 2.9553e-06 usec -cp .input.spin urcu_progress_writer.spin.input -cp .input.spin.trail urcu_progress_writer.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.spin.input deleted file mode 100644 index 323cc66..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.spin.input +++ /dev/null @@ -1,1273 +0,0 @@ -#define WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.log b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.log deleted file mode 100644 index 43b08ac..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.log +++ /dev/null @@ -1,647 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 1296) -depth 23: Claim reached state 9 (line 1301) -depth 1404: Claim reached state 9 (line 1300) -pan: acceptance cycle (at depth 1950) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 4997, errors: 1 - 64372 states, stored (197067 visited) - 2733089 states, matched - 2930156 transitions (= visited+matched) - 44244571 atomic steps -hash conflicts: 43483 (resolved) - -Stats on memory usage (in Megabytes): - 7.121 equivalent memory usage for states (stored*(State-vector + overhead)) - 6.154 actual memory usage for states (compression: 86.41%) - state-vector as stored = 72 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 471.818 total actual memory usage - -unreached in proctype urcu_reader - line 412, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 81, "(1)" - line 258, "pan.___", state 101, "(1)" - line 262, "pan.___", state 109, "(1)" - line 598, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" - line 412, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 199, "(1)" - line 258, "pan.___", state 219, "(1)" - line 262, "pan.___", state 227, "(1)" - line 412, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 310, "(1)" - line 258, "pan.___", state 330, "(1)" - line 262, "pan.___", state 338, "(1)" - line 412, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 361, "(1)" - line 412, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 362, "else" - line 412, "pan.___", state 365, "(1)" - line 416, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 375, "(1)" - line 416, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 376, "else" - line 416, "pan.___", state 379, "(1)" - line 416, "pan.___", state 380, "(1)" - line 416, "pan.___", state 380, "(1)" - line 414, "pan.___", state 385, "((i<1))" - line 414, "pan.___", state 385, "((i>=1))" - line 421, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 393, "(1)" - line 421, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 394, "else" - line 421, "pan.___", state 397, "(1)" - line 421, "pan.___", state 398, "(1)" - line 421, "pan.___", state 398, "(1)" - line 425, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 407, "(1)" - line 425, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 408, "else" - line 425, "pan.___", state 411, "(1)" - line 425, "pan.___", state 412, "(1)" - line 425, "pan.___", state 412, "(1)" - line 423, "pan.___", state 417, "((i<2))" - line 423, "pan.___", state 417, "((i>=2))" - line 250, "pan.___", state 423, "(1)" - line 254, "pan.___", state 431, "(1)" - line 254, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 432, "else" - line 252, "pan.___", state 437, "((i<1))" - line 252, "pan.___", state 437, "((i>=1))" - line 258, "pan.___", state 443, "(1)" - line 258, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 444, "else" - line 262, "pan.___", state 451, "(1)" - line 262, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 452, "else" - line 260, "pan.___", state 457, "((i<2))" - line 260, "pan.___", state 457, "((i>=2))" - line 267, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 461, "else" - line 432, "pan.___", state 463, "(1)" - line 432, "pan.___", state 463, "(1)" - line 598, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 598, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" - line 598, "pan.___", state 468, "(1)" - line 273, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 483, "(1)" - line 281, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 519, "(1)" - line 254, "pan.___", state 527, "(1)" - line 258, "pan.___", state 539, "(1)" - line 262, "pan.___", state 547, "(1)" - line 412, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 629, "(1)" - line 254, "pan.___", state 637, "(1)" - line 258, "pan.___", state 649, "(1)" - line 262, "pan.___", state 657, "(1)" - line 412, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 747, "(1)" - line 258, "pan.___", state 767, "(1)" - line 262, "pan.___", state 775, "(1)" - line 412, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 796, "(1)" - line 412, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 797, "else" - line 412, "pan.___", state 800, "(1)" - line 416, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 810, "(1)" - line 416, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 811, "else" - line 416, "pan.___", state 814, "(1)" - line 416, "pan.___", state 815, "(1)" - line 416, "pan.___", state 815, "(1)" - line 414, "pan.___", state 820, "((i<1))" - line 414, "pan.___", state 820, "((i>=1))" - line 421, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 828, "(1)" - line 421, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 829, "else" - line 421, "pan.___", state 832, "(1)" - line 421, "pan.___", state 833, "(1)" - line 421, "pan.___", state 833, "(1)" - line 425, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 842, "(1)" - line 425, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 843, "else" - line 425, "pan.___", state 846, "(1)" - line 425, "pan.___", state 847, "(1)" - line 425, "pan.___", state 847, "(1)" - line 423, "pan.___", state 852, "((i<2))" - line 423, "pan.___", state 852, "((i>=2))" - line 250, "pan.___", state 858, "(1)" - line 254, "pan.___", state 866, "(1)" - line 254, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 867, "else" - line 252, "pan.___", state 872, "((i<1))" - line 252, "pan.___", state 872, "((i>=1))" - line 258, "pan.___", state 878, "(1)" - line 258, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 879, "else" - line 262, "pan.___", state 886, "(1)" - line 262, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 887, "else" - line 260, "pan.___", state 892, "((i<2))" - line 260, "pan.___", state 892, "((i>=2))" - line 267, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 896, "else" - line 432, "pan.___", state 898, "(1)" - line 432, "pan.___", state 898, "(1)" - line 606, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" - line 412, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 971, "(1)" - line 254, "pan.___", state 979, "(1)" - line 258, "pan.___", state 991, "(1)" - line 262, "pan.___", state 999, "(1)" - line 412, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1085, "(1)" - line 258, "pan.___", state 1105, "(1)" - line 262, "pan.___", state 1113, "(1)" - line 412, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1200, "(1)" - line 258, "pan.___", state 1220, "(1)" - line 262, "pan.___", state 1228, "(1)" - line 412, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1311, "(1)" - line 258, "pan.___", state 1331, "(1)" - line 262, "pan.___", state 1339, "(1)" - line 273, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1407, "(1)" - line 254, "pan.___", state 1415, "(1)" - line 258, "pan.___", state 1427, "(1)" - line 262, "pan.___", state 1435, "(1)" - line 412, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1517, "(1)" - line 254, "pan.___", state 1525, "(1)" - line 258, "pan.___", state 1537, "(1)" - line 262, "pan.___", state 1545, "(1)" - line 412, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1628, "(1)" - line 254, "pan.___", state 1636, "(1)" - line 258, "pan.___", state 1648, "(1)" - line 262, "pan.___", state 1656, "(1)" - line 412, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1742, "(1)" - line 258, "pan.___", state 1762, "(1)" - line 262, "pan.___", state 1770, "(1)" - line 645, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" - line 412, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1860, "(1)" - line 258, "pan.___", state 1880, "(1)" - line 262, "pan.___", state 1888, "(1)" - line 412, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1971, "(1)" - line 258, "pan.___", state 1991, "(1)" - line 262, "pan.___", state 1999, "(1)" - line 412, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 2022, "(1)" - line 412, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 2023, "else" - line 412, "pan.___", state 2026, "(1)" - line 416, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2036, "(1)" - line 416, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 2037, "else" - line 416, "pan.___", state 2040, "(1)" - line 416, "pan.___", state 2041, "(1)" - line 416, "pan.___", state 2041, "(1)" - line 414, "pan.___", state 2046, "((i<1))" - line 414, "pan.___", state 2046, "((i>=1))" - line 421, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2054, "(1)" - line 421, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 2055, "else" - line 421, "pan.___", state 2058, "(1)" - line 421, "pan.___", state 2059, "(1)" - line 421, "pan.___", state 2059, "(1)" - line 425, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2068, "(1)" - line 425, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 2069, "else" - line 425, "pan.___", state 2072, "(1)" - line 425, "pan.___", state 2073, "(1)" - line 425, "pan.___", state 2073, "(1)" - line 423, "pan.___", state 2078, "((i<2))" - line 423, "pan.___", state 2078, "((i>=2))" - line 250, "pan.___", state 2084, "(1)" - line 254, "pan.___", state 2092, "(1)" - line 254, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 2093, "else" - line 252, "pan.___", state 2098, "((i<1))" - line 252, "pan.___", state 2098, "((i>=1))" - line 258, "pan.___", state 2104, "(1)" - line 258, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 2105, "else" - line 262, "pan.___", state 2112, "(1)" - line 262, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 2113, "else" - line 260, "pan.___", state 2118, "((i<2))" - line 260, "pan.___", state 2118, "((i>=2))" - line 267, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 2122, "else" - line 432, "pan.___", state 2124, "(1)" - line 432, "pan.___", state 2124, "(1)" - line 645, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" - line 645, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" - line 645, "pan.___", state 2129, "(1)" - line 273, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 2180, "(1)" - line 254, "pan.___", state 2188, "(1)" - line 258, "pan.___", state 2200, "(1)" - line 262, "pan.___", state 2208, "(1)" - line 412, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 2290, "(1)" - line 254, "pan.___", state 2298, "(1)" - line 258, "pan.___", state 2310, "(1)" - line 262, "pan.___", state 2318, "(1)" - line 273, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 2387, "(1)" - line 254, "pan.___", state 2395, "(1)" - line 258, "pan.___", state 2407, "(1)" - line 262, "pan.___", state 2415, "(1)" - line 412, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 2497, "(1)" - line 254, "pan.___", state 2505, "(1)" - line 258, "pan.___", state 2517, "(1)" - line 262, "pan.___", state 2525, "(1)" - line 412, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 2608, "(1)" - line 254, "pan.___", state 2616, "(1)" - line 258, "pan.___", state 2628, "(1)" - line 262, "pan.___", state 2636, "(1)" - line 250, "pan.___", state 2667, "(1)" - line 258, "pan.___", state 2687, "(1)" - line 262, "pan.___", state 2695, "(1)" - line 250, "pan.___", state 2710, "(1)" - line 254, "pan.___", state 2718, "(1)" - line 258, "pan.___", state 2730, "(1)" - line 262, "pan.___", state 2738, "(1)" - line 899, "pan.___", state 2755, "-end-" - (259 of 2755 states) -unreached in proctype urcu_writer - line 412, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 24, "(1)" - line 416, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 38, "(1)" - line 416, "pan.___", state 39, "(1)" - line 416, "pan.___", state 39, "(1)" - line 414, "pan.___", state 44, "((i<1))" - line 414, "pan.___", state 44, "((i>=1))" - line 421, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 56, "(1)" - line 421, "pan.___", state 57, "(1)" - line 421, "pan.___", state 57, "(1)" - line 425, "pan.___", state 64, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 70, "(1)" - line 425, "pan.___", state 71, "(1)" - line 425, "pan.___", state 71, "(1)" - line 423, "pan.___", state 76, "((i<2))" - line 423, "pan.___", state 76, "((i>=2))" - line 250, "pan.___", state 82, "(1)" - line 254, "pan.___", state 90, "(1)" - line 254, "pan.___", state 91, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 91, "else" - line 252, "pan.___", state 96, "((i<1))" - line 252, "pan.___", state 96, "((i>=1))" - line 258, "pan.___", state 102, "(1)" - line 258, "pan.___", state 103, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 103, "else" - line 262, "pan.___", state 110, "(1)" - line 262, "pan.___", state 111, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 111, "else" - line 260, "pan.___", state 116, "((i<2))" - line 260, "pan.___", state 116, "((i>=2))" - line 267, "pan.___", state 120, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 120, "else" - line 432, "pan.___", state 122, "(1)" - line 432, "pan.___", state 122, "(1)" - line 273, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 148, "((i<1))" - line 275, "pan.___", state 148, "((i>=1))" - line 281, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 1022, "pan.___", state 181, "old_data = cached_rcu_ptr.val[_pid]" - line 412, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 199, "(1)" - line 416, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 213, "(1)" - line 416, "pan.___", state 214, "(1)" - line 416, "pan.___", state 214, "(1)" - line 414, "pan.___", state 219, "((i<1))" - line 414, "pan.___", state 219, "((i>=1))" - line 421, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 231, "(1)" - line 421, "pan.___", state 232, "(1)" - line 421, "pan.___", state 232, "(1)" - line 425, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 245, "(1)" - line 425, "pan.___", state 246, "(1)" - line 425, "pan.___", state 246, "(1)" - line 423, "pan.___", state 251, "((i<2))" - line 423, "pan.___", state 251, "((i>=2))" - line 250, "pan.___", state 257, "(1)" - line 254, "pan.___", state 265, "(1)" - line 254, "pan.___", state 266, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 266, "else" - line 252, "pan.___", state 271, "((i<1))" - line 252, "pan.___", state 271, "((i>=1))" - line 258, "pan.___", state 277, "(1)" - line 258, "pan.___", state 278, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 278, "else" - line 262, "pan.___", state 285, "(1)" - line 262, "pan.___", state 286, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 286, "else" - line 260, "pan.___", state 291, "((i<2))" - line 260, "pan.___", state 291, "((i>=2))" - line 267, "pan.___", state 295, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 295, "else" - line 432, "pan.___", state 297, "(1)" - line 432, "pan.___", state 297, "(1)" - line 412, "pan.___", state 308, "(1)" - line 412, "pan.___", state 309, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 309, "else" - line 412, "pan.___", state 312, "(1)" - line 416, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 326, "(1)" - line 416, "pan.___", state 327, "(1)" - line 416, "pan.___", state 327, "(1)" - line 414, "pan.___", state 332, "((i<1))" - line 414, "pan.___", state 332, "((i>=1))" - line 421, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 344, "(1)" - line 421, "pan.___", state 345, "(1)" - line 421, "pan.___", state 345, "(1)" - line 425, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 358, "(1)" - line 425, "pan.___", state 359, "(1)" - line 425, "pan.___", state 359, "(1)" - line 423, "pan.___", state 364, "((i<2))" - line 423, "pan.___", state 364, "((i>=2))" - line 250, "pan.___", state 370, "(1)" - line 254, "pan.___", state 378, "(1)" - line 254, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 379, "else" - line 252, "pan.___", state 384, "((i<1))" - line 252, "pan.___", state 384, "((i>=1))" - line 258, "pan.___", state 390, "(1)" - line 258, "pan.___", state 391, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 391, "else" - line 262, "pan.___", state 398, "(1)" - line 262, "pan.___", state 399, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 399, "else" - line 260, "pan.___", state 404, "((i<2))" - line 260, "pan.___", state 404, "((i>=2))" - line 267, "pan.___", state 408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 408, "else" - line 432, "pan.___", state 410, "(1)" - line 432, "pan.___", state 410, "(1)" - line 412, "pan.___", state 423, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 425, "(1)" - line 412, "pan.___", state 426, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 412, "pan.___", state 426, "else" - line 412, "pan.___", state 429, "(1)" - line 416, "pan.___", state 437, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 439, "(1)" - line 416, "pan.___", state 440, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 416, "pan.___", state 440, "else" - line 416, "pan.___", state 443, "(1)" - line 416, "pan.___", state 444, "(1)" - line 416, "pan.___", state 444, "(1)" - line 414, "pan.___", state 449, "((i<1))" - line 414, "pan.___", state 449, "((i>=1))" - line 421, "pan.___", state 455, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 457, "(1)" - line 421, "pan.___", state 458, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 421, "pan.___", state 458, "else" - line 421, "pan.___", state 461, "(1)" - line 421, "pan.___", state 462, "(1)" - line 421, "pan.___", state 462, "(1)" - line 425, "pan.___", state 469, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 471, "(1)" - line 425, "pan.___", state 472, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" - line 425, "pan.___", state 472, "else" - line 425, "pan.___", state 475, "(1)" - line 425, "pan.___", state 476, "(1)" - line 425, "pan.___", state 476, "(1)" - line 423, "pan.___", state 481, "((i<2))" - line 423, "pan.___", state 481, "((i>=2))" - line 250, "pan.___", state 487, "(1)" - line 254, "pan.___", state 495, "(1)" - line 254, "pan.___", state 496, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 496, "else" - line 252, "pan.___", state 501, "((i<1))" - line 252, "pan.___", state 501, "((i>=1))" - line 258, "pan.___", state 507, "(1)" - line 258, "pan.___", state 508, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 508, "else" - line 262, "pan.___", state 515, "(1)" - line 262, "pan.___", state 516, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 516, "else" - line 267, "pan.___", state 525, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 525, "else" - line 432, "pan.___", state 527, "(1)" - line 432, "pan.___", state 527, "(1)" - line 412, "pan.___", state 533, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 539, "(1)" - line 416, "pan.___", state 547, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 553, "(1)" - line 416, "pan.___", state 554, "(1)" - line 416, "pan.___", state 554, "(1)" - line 414, "pan.___", state 559, "((i<1))" - line 414, "pan.___", state 559, "((i>=1))" - line 421, "pan.___", state 565, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 571, "(1)" - line 421, "pan.___", state 572, "(1)" - line 421, "pan.___", state 572, "(1)" - line 425, "pan.___", state 579, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 585, "(1)" - line 425, "pan.___", state 586, "(1)" - line 425, "pan.___", state 586, "(1)" - line 423, "pan.___", state 591, "((i<2))" - line 423, "pan.___", state 591, "((i>=2))" - line 250, "pan.___", state 597, "(1)" - line 254, "pan.___", state 605, "(1)" - line 254, "pan.___", state 606, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 606, "else" - line 252, "pan.___", state 611, "((i<1))" - line 252, "pan.___", state 611, "((i>=1))" - line 258, "pan.___", state 617, "(1)" - line 258, "pan.___", state 618, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 618, "else" - line 262, "pan.___", state 625, "(1)" - line 262, "pan.___", state 626, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 626, "else" - line 267, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 635, "else" - line 432, "pan.___", state 637, "(1)" - line 432, "pan.___", state 637, "(1)" - line 412, "pan.___", state 644, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 650, "(1)" - line 416, "pan.___", state 658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 416, "pan.___", state 664, "(1)" - line 416, "pan.___", state 665, "(1)" - line 416, "pan.___", state 665, "(1)" - line 414, "pan.___", state 670, "((i<1))" - line 414, "pan.___", state 670, "((i>=1))" - line 421, "pan.___", state 676, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 682, "(1)" - line 421, "pan.___", state 683, "(1)" - line 421, "pan.___", state 683, "(1)" - line 425, "pan.___", state 690, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 425, "pan.___", state 696, "(1)" - line 425, "pan.___", state 697, "(1)" - line 425, "pan.___", state 697, "(1)" - line 423, "pan.___", state 702, "((i<2))" - line 423, "pan.___", state 702, "((i>=2))" - line 250, "pan.___", state 708, "(1)" - line 254, "pan.___", state 716, "(1)" - line 254, "pan.___", state 717, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 717, "else" - line 252, "pan.___", state 722, "((i<1))" - line 252, "pan.___", state 722, "((i>=1))" - line 258, "pan.___", state 728, "(1)" - line 258, "pan.___", state 729, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 729, "else" - line 262, "pan.___", state 736, "(1)" - line 262, "pan.___", state 737, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 737, "else" - line 260, "pan.___", state 742, "((i<2))" - line 260, "pan.___", state 742, "((i>=2))" - line 267, "pan.___", state 746, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 746, "else" - line 432, "pan.___", state 748, "(1)" - line 432, "pan.___", state 748, "(1)" - line 416, "pan.___", state 771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 254, "pan.___", state 829, "(1)" - line 258, "pan.___", state 841, "(1)" - line 262, "pan.___", state 849, "(1)" - line 416, "pan.___", state 887, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 421, "pan.___", state 905, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 425, "pan.___", state 919, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 254, "pan.___", state 945, "(1)" - line 258, "pan.___", state 957, "(1)" - line 262, "pan.___", state 965, "(1)" - line 273, "pan.___", state 1009, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 277, "pan.___", state 1018, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 275, "pan.___", state 1026, "((i<1))" - line 275, "pan.___", state 1026, "((i>=1))" - line 281, "pan.___", state 1033, "(1)" - line 281, "pan.___", state 1034, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" - line 281, "pan.___", state 1034, "else" - line 285, "pan.___", state 1040, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 283, "pan.___", state 1048, "((i<2))" - line 283, "pan.___", state 1048, "((i>=2))" - line 250, "pan.___", state 1056, "(1)" - line 254, "pan.___", state 1064, "(1)" - line 254, "pan.___", state 1065, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 254, "pan.___", state 1065, "else" - line 252, "pan.___", state 1070, "((i<1))" - line 252, "pan.___", state 1070, "((i>=1))" - line 258, "pan.___", state 1076, "(1)" - line 258, "pan.___", state 1077, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" - line 258, "pan.___", state 1077, "else" - line 262, "pan.___", state 1084, "(1)" - line 262, "pan.___", state 1085, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" - line 262, "pan.___", state 1085, "else" - line 267, "pan.___", state 1094, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 267, "pan.___", state 1094, "else" - line 277, "pan.___", state 1109, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 281, "pan.___", state 1122, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" - line 285, "pan.___", state 1131, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" - line 250, "pan.___", state 1147, "(1)" - line 254, "pan.___", state 1155, "(1)" - line 258, "pan.___", state 1167, "(1)" - line 262, "pan.___", state 1175, "(1)" - line 1238, "pan.___", state 1190, "-end-" - (192 of 1190 states) -unreached in proctype :init: - (0 of 78 states) -unreached in proctype :never: - line 1303, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 8.1 seconds -pan: rate 24329.259 states/second -pan: avg transition delay 2.7644e-06 usec -cp .input.spin urcu_progress_writer_error.spin.input -cp .input.spin.trail urcu_progress_writer_error.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input deleted file mode 100644 index 67fec75..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,1274 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -//#define ARCH_ALPHA -#define ARCH_INTEL -//#define ARCH_POWERPC -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bitfield cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(rcu_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE, j); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON, j); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index e5fdf5a..0000000 --- a/formal-model/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,5000 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:4025 -2:3:3945 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-4988:1:2286 -4989:1:2293 -4990:1:2294 -4991:1:2301 -4992:1:2306 -4993:1:2313 -4994:1:2314 -4995:1:2313 -4996:1:2314 -4997:1:2321 diff --git a/formal-model/urcu-controldataflow/DEFINES b/formal-model/urcu-controldataflow/DEFINES deleted file mode 100644 index a1008a6..0000000 --- a/formal-model/urcu-controldataflow/DEFINES +++ /dev/null @@ -1,18 +0,0 @@ - -// Poison value for freed memory -#define POISON 1 -// Memory with correct data -#define WINE 0 -#define SLAB_SIZE 2 - -#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -//disabled -//#define REMOTE_BARRIERS - -#define ARCH_ALPHA -//#define ARCH_INTEL -//#define ARCH_POWERPC diff --git a/formal-model/urcu-controldataflow/Makefile b/formal-model/urcu-controldataflow/Makefile deleted file mode 100644 index abf201c..0000000 --- a/formal-model/urcu-controldataflow/Makefile +++ /dev/null @@ -1,171 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 -DCOLLAPSE -#CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-controldataflow/references.txt b/formal-model/urcu-controldataflow/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-controldataflow/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-controldataflow/urcu.sh b/formal-model/urcu-controldataflow/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-controldataflow/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-controldataflow/urcu.spin b/formal-model/urcu-controldataflow/urcu.spin deleted file mode 100644 index 8075506..0000000 --- a/formal-model/urcu-controldataflow/urcu.spin +++ /dev/null @@ -1,1321 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory - * and out-of-order instruction scheduling. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -#define get_readerid() (get_pid()) - -/* - * Produced process control and data flow. Updated after each instruction to - * show which variables are ready. Using one-hot bit encoding per variable to - * save state space. Used as triggers to execute the instructions having those - * variables as input. Leaving bits active to inhibit instruction execution. - * Scheme used to make instruction disabling and automatic dependency fall-back - * automatic. - */ - -#define CONSUME_TOKENS(state, bits, notbits) \ - ((!(state & (notbits))) && (state & (bits)) == (bits)) - -#define PRODUCE_TOKENS(state, bits) \ - state = state | (bits); - -#define CLEAR_TOKENS(state, bits) \ - state = state & ~(bits) - -/* - * Types of dependency : - * - * Data dependency - * - * - True dependency, Read-after-Write (RAW) - * - * This type of dependency happens when a statement depends on the result of a - * previous statement. This applies to any statement which needs to read a - * variable written by a preceding statement. - * - * - False dependency, Write-after-Read (WAR) - * - * Typically, variable renaming can ensure that this dependency goes away. - * However, if the statements must read and then write from/to the same variable - * in the OOO memory model, renaming may be impossible, and therefore this - * causes a WAR dependency. - * - * - Output dependency, Write-after-Write (WAW) - * - * Two writes to the same variable in subsequent statements. Variable renaming - * can ensure this is not needed, but can be required when writing multiple - * times to the same OOO mem model variable. - * - * Control dependency - * - * Execution of a given instruction depends on a previous instruction evaluating - * in a way that allows its execution. E.g. : branches. - * - * Useful considerations for joining dependencies after branch - * - * - Pre-dominance - * - * "We say box i dominates box j if every path (leading from input to output - * through the diagram) which passes through box j must also pass through box - * i. Thus box i dominates box j if box j is subordinate to box i in the - * program." - * - * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf - * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) - * - * - Post-dominance - * - * Just as pre-dominance, but with arcs of the data flow inverted, and input vs - * output exchanged. Therefore, i post-dominating j ensures that every path - * passing by j will pass by i before reaching the output. - * - * Prefetch and speculative execution - * - * If an instruction depends on the result of a previous branch, but it does not - * have side-effects, it can be executed before the branch result is known. - * however, it must be restarted if a core-synchronizing instruction is issued. - * Note that instructions which depend on the speculative instruction result - * but that have side-effects must depend on the branch completion in addition - * to the speculatively executed instruction. - * - * Other considerations - * - * Note about "volatile" keyword dependency : The compiler will order volatile - * accesses so they appear in the right order on a given CPU. They can be - * reordered by the CPU instruction scheduling. This therefore cannot be - * considered as a depencency. - * - * References : - * - * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan - * Kaufmann. ISBN 1-55860-698-X. - * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern - * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN - * 1-55860-286-0. - * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. - * Morgan Kaufmann. ISBN 1-55860-320-4. - */ - -/* - * Note about loops and nested calls - * - * To keep this model simple, loops expressed in the framework will behave as if - * there was a core synchronizing instruction between loops. To see the effect - * of loop unrolling, manually unrolling loops is required. Note that if loops - * end or start with a core synchronizing instruction, the model is appropriate. - * Nested calls are not supported. - */ - -/* - * Only Alpha has out-of-order cache bank loads. Other architectures (intel, - * powerpc, arm) ensure that dependent reads won't be reordered. c.f. - * http://www.linuxjournal.com/article/8212) - */ -#ifdef ARCH_ALPHA -#define HAVE_OOO_CACHE_READ -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -typedef per_proc_bit { - bit val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bitfield { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; - -#define DECLARE_PROC_CACHED_VAR(type, x)\ - type cached_##x; \ - bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v) \ - mem_##x = v; - -#define INIT_PROC_CACHED_VAR(x, v) \ - cache_dirty_##x = 0; \ - cached_##x = v; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) - -#define READ_CACHED_VAR(x) (cached_##x) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x = v; \ - cache_dirty_##x = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x; \ - cache_dirty_##x = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x = mem_##x; \ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* Must consume all prior read tokens. All subsequent reads depend on it. */ -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Must consume all prior write tokens. All subsequent writes depend on it. */ -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; - } -} - -/* Synchronization point. Must consume all prior read and write tokens. All - * subsequent reads and writes depend on it. */ -inline smp_mb(i) -{ - atomic { - smp_wmb(i); - smp_rmb(i); - } -} - -#ifdef REMOTE_BARRIERS - -bit reader_barrier[NR_READERS]; - -/* - * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode - * because they would add unexisting core synchronization and would therefore - * create an incomplete model. - * Therefore, we model the read-side memory barriers by completely disabling the - * memory barriers and their dependencies from the read-side. One at a time - * (different verification runs), we make a different instruction listen for - * signals. - */ - -#define smp_mb_reader(i, j) - -/* - * Service 0, 1 or many barrier requests. - */ -inline smp_mb_recv(i, j) -{ - do - :: (reader_barrier[get_readerid()] == 1) -> - /* - * We choose to ignore cycles caused by writer busy-looping, - * waiting for the reader, sending barrier requests, and the - * reader always services them without continuing execution. - */ -progress_ignoring_mb1: - smp_mb(i); - reader_barrier[get_readerid()] = 0; - :: 1 -> - /* - * We choose to ignore writer's non-progress caused by the - * reader ignoring the writer's mb() requests. - */ -progress_ignoring_mb2: - break; - od; -} - -#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: - -#define smp_mb_send(i, j, progressid) \ -{ \ - smp_mb(i); \ - i = 0; \ - do \ - :: i < NR_READERS -> \ - reader_barrier[i] = 1; \ - /* \ - * Busy-looping waiting for reader barrier handling is of little\ - * interest, given the reader has the ability to totally ignore \ - * barrier requests. \ - */ \ - do \ - :: (reader_barrier[i] == 1) -> \ -PROGRESS_LABEL(progressid) \ - skip; \ - :: (reader_barrier[i] == 0) -> break; \ - od; \ - i++; \ - :: i >= NR_READERS -> \ - break \ - od; \ - smp_mb(i); \ -} - -#else - -#define smp_mb_send(i, j, progressid) smp_mb(i) -#define smp_mb_reader(i, j) smp_mb(i) -#define smp_mb_recv(i, j) - -#endif - -/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* RCU data */ -DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - -/* RCU pointer */ -#if (SLAB_SIZE == 2) -DECLARE_CACHED_VAR(bit, rcu_ptr); -bit ptr_read_first[NR_READERS]; -bit ptr_read_second[NR_READERS]; -#else -DECLARE_CACHED_VAR(byte, rcu_ptr); -byte ptr_read_first[NR_READERS]; -byte ptr_read_second[NR_READERS]; -#endif - -bit data_read_first[NR_READERS]; -bit data_read_second[NR_READERS]; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#ifdef HAVE_OOO_CACHE_READ - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); - i = 0; - do - :: i < SLAB_SIZE -> - RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); - i++ - :: i >= SLAB_SIZE -> break - od; -#else - smp_rmb(i); -#endif /* HAVE_OOO_CACHE_READ */ - } -} - -/* - * Bit encoding, urcu_reader : - */ - -int _proc_urcu_reader; -#define proc_urcu_reader _proc_urcu_reader - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROD_A_READ (1 << 0) -#define READ_PROD_B_IF_TRUE (1 << 1) -#define READ_PROD_B_IF_FALSE (1 << 2) -#define READ_PROD_C_IF_TRUE_READ (1 << 3) - -#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ - (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ - if \ - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ - :: else -> \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ - fi; \ - /* IF TRUE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ - READ_PROD_C_IF_TRUE_READ << base) -> \ - ooo_mem(i); \ - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_TRUE \ - | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ELSE */ \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - (READ_PROD_B_IF_FALSE /* pre-dominant */ \ - | READ_PROD_A_READ) << base, /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ - tmp + 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - /* IF_MERGE implies \ - * post-dominance */ \ - /* ENDIF */ \ - skip - -/* Body of PROCEDURE_READ_LOCK */ -#define READ_PROC_READ_UNLOCK (1 << 0) - -#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken, \ - READ_PROC_READ_UNLOCK << base) -> \ - ooo_mem(i); \ - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ - :: CONSUME_TOKENS(proc_urcu_reader, \ - consumetoken \ - | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ - producetoken) -> \ - ooo_mem(i); \ - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ - PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ - skip - - -#define READ_PROD_NONE (1 << 0) - -/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ -#define READ_LOCK_BASE 1 -#define READ_LOCK_OUT (1 << 5) - -#define READ_PROC_FIRST_MB (1 << 6) - -/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ -#define READ_LOCK_NESTED_BASE 7 -#define READ_LOCK_NESTED_OUT (1 << 11) - -#define READ_PROC_READ_GEN (1 << 12) -#define READ_PROC_ACCESS_GEN (1 << 13) - -/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ -#define READ_UNLOCK_NESTED_BASE 14 -#define READ_UNLOCK_NESTED_OUT (1 << 15) - -#define READ_PROC_SECOND_MB (1 << 16) - -/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ -#define READ_UNLOCK_BASE 17 -#define READ_UNLOCK_OUT (1 << 18) - -/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ -#define READ_LOCK_UNROLL_BASE 19 -#define READ_LOCK_OUT_UNROLL (1 << 23) - -#define READ_PROC_THIRD_MB (1 << 24) - -#define READ_PROC_READ_GEN_UNROLL (1 << 25) -#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) - -#define READ_PROC_FOURTH_MB (1 << 27) - -/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ -#define READ_UNLOCK_UNROLL_BASE 28 -#define READ_UNLOCK_OUT_UNROLL (1 << 29) - - -/* Should not include branches */ -#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ - | READ_LOCK_OUT \ - | READ_PROC_FIRST_MB \ - | READ_LOCK_NESTED_OUT \ - | READ_PROC_READ_GEN \ - | READ_PROC_ACCESS_GEN \ - | READ_UNLOCK_NESTED_OUT \ - | READ_PROC_SECOND_MB \ - | READ_UNLOCK_OUT \ - | READ_LOCK_OUT_UNROLL \ - | READ_PROC_THIRD_MB \ - | READ_PROC_READ_GEN_UNROLL \ - | READ_PROC_ACCESS_GEN_UNROLL \ - | READ_PROC_FOURTH_MB \ - | READ_UNLOCK_OUT_UNROLL) - -/* Must clear all tokens, including branches */ -#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - -#ifdef REMOTE_BARRIERS - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); -#endif - - do - :: 1 -> - -#ifdef REMOTE_BARRIERS - /* - * Signal-based memory barrier will only execute when the - * execution order appears in program order. - */ - if - :: 1 -> - atomic { - if - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, - READ_LOCK_OUT | READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, - READ_LOCK_NESTED_OUT - | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, - READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, - READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, - READ_UNLOCK_OUT - | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, - READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL, - READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN - | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, - READ_UNLOCK_OUT_UNROLL) - || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL - | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, - 0) -> - goto non_atomic3; -non_atomic3_end: - skip; - fi; - } - fi; - - goto non_atomic3_skip; -non_atomic3: - smp_mb_recv(i, j); - goto non_atomic3_end; -non_atomic3_skip: - -#endif /* REMOTE_BARRIERS */ - - atomic { - if - PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_LOCK_OUT, /* post-dominant */ - READ_PROC_FIRST_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); - - PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, - READ_LOCK_NESTED_OUT); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_PROC_READ_GEN) -> - ooo_mem(i); - ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_READ_GEN, - READ_PROC_ACCESS_GEN) -> - /* smp_read_barrier_depends */ - goto rmb1; -rmb1_end: - data_read_first[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); - - - /* Note : we remove the nested memory barrier from the read unlock - * model, given it is not usually needed. The implementation has the barrier - * because the performance impact added by a branch in the common case does not - * justify it. - */ - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, - READ_PROC_FIRST_MB - | READ_LOCK_OUT - | READ_LOCK_NESTED_OUT, - READ_UNLOCK_NESTED_OUT); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_ACCESS_GEN /* mb() orders reads */ - | READ_PROC_READ_GEN /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_LOCK_OUT /* post-dominant */ - | READ_LOCK_NESTED_OUT /* post-dominant */ - | READ_UNLOCK_NESTED_OUT, - READ_PROC_SECOND_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT); - - /* Unrolling loop : second consecutive lock */ - /* reading urcu_active_readers, which have been written by - * READ_UNLOCK_OUT : RAW */ - PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, - READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB, /* mb() orders reads */ - READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT /* RAW */ - | READ_UNLOCK_OUT, /* RAW */ - READ_LOCK_OUT_UNROLL); - - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_THIRD_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_READ_GEN_UNROLL) -> - ooo_mem(i); - ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB, /* mb() orders reads */ - READ_PROC_ACCESS_GEN_UNROLL) -> - /* smp_read_barrier_depends */ - goto rmb2; -rmb2_end: - data_read_second[get_readerid()] = - READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); - - :: CONSUME_TOKENS(proc_urcu_reader, - READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() ordered */ - | READ_PROC_SECOND_MB /* mb() ordered */ - | READ_PROC_THIRD_MB /* mb() ordered */ - | READ_LOCK_OUT_UNROLL /* post-dominant */ - | READ_LOCK_NESTED_OUT - | READ_LOCK_OUT - | READ_UNLOCK_NESTED_OUT - | READ_UNLOCK_OUT, - READ_PROC_FOURTH_MB) -> - smp_mb_reader(i, j); - PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); - - PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, - READ_PROC_FOURTH_MB /* mb() orders reads */ - | READ_PROC_THIRD_MB /* mb() orders reads */ - | READ_LOCK_OUT_UNROLL /* RAW */ - | READ_PROC_SECOND_MB /* mb() orders reads */ - | READ_PROC_FIRST_MB /* mb() orders reads */ - | READ_LOCK_NESTED_OUT /* RAW */ - | READ_LOCK_OUT /* RAW */ - | READ_UNLOCK_NESTED_OUT, /* RAW */ - READ_UNLOCK_OUT_UNROLL); - :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Dependency between consecutive loops : - * RAW dependency on - * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) - * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - * between loops. - * _WHEN THE MB()s are in place_, they add full ordering of the - * generation pointer read wrt active reader count read, which ensures - * execution will not spill across loop execution. - * However, in the event mb()s are removed (execution using signal - * handler to promote barrier()() -> smp_mb()), nothing prevents one loop - * to spill its execution on other loop's execution. - */ - goto end; -rmb1: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb1_end; -rmb2: -#ifndef NO_RMB - smp_rmb(i); -#else - ooo_mem(i); -#endif - goto rmb2_end; -end: - skip; -} - - - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* no name clash please */ -#undef proc_urcu_reader - - -/* Model the RCU update process. */ - -/* - * Bit encoding, urcu_writer : - * Currently only supports one reader. - */ - -int _proc_urcu_writer; -#define proc_urcu_writer _proc_urcu_writer - -#define WRITE_PROD_NONE (1 << 0) - -#define WRITE_DATA (1 << 1) -#define WRITE_PROC_WMB (1 << 2) -#define WRITE_XCHG_PTR (1 << 3) - -#define WRITE_PROC_FIRST_MB (1 << 4) - -/* first flip */ -#define WRITE_PROC_FIRST_READ_GP (1 << 5) -#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) -#define WRITE_PROC_FIRST_WAIT (1 << 7) -#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) - -/* second flip */ -#define WRITE_PROC_SECOND_READ_GP (1 << 9) -#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) -#define WRITE_PROC_SECOND_WAIT (1 << 11) -#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) - -#define WRITE_PROC_SECOND_MB (1 << 13) - -#define WRITE_FREE (1 << 14) - -#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ - | WRITE_DATA \ - | WRITE_PROC_WMB \ - | WRITE_XCHG_PTR \ - | WRITE_PROC_FIRST_MB \ - | WRITE_PROC_FIRST_READ_GP \ - | WRITE_PROC_FIRST_WRITE_GP \ - | WRITE_PROC_FIRST_WAIT \ - | WRITE_PROC_SECOND_READ_GP \ - | WRITE_PROC_SECOND_WRITE_GP \ - | WRITE_PROC_SECOND_WAIT \ - | WRITE_PROC_SECOND_MB \ - | WRITE_FREE) - -#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) - -/* - * Mutexes are implied around writer execution. A single writer at a time. - */ -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2, tmpa; - byte cur_data = 0, old_data, loop_nr = 0; - byte cur_gp_val = 0; /* - * Keep a local trace of the current parity so - * we don't add non-existing dependencies on the global - * GP update. Needed to test single flip case. - */ - - /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ - DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); - /* Note ! currently only one reader */ - DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); - /* RCU data */ - DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); - - /* RCU pointer */ -#if (SLAB_SIZE == 2) - DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); -#else - DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); -#endif - - atomic { - INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); - INIT_PROC_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); - i++; - :: i >= NR_READERS -> break - od; - INIT_PROC_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_PROC_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - } - - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (loop_nr < 3) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - loop_nr = loop_nr + 1; - - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); - -#ifdef NO_WMB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); -#endif - -#ifdef NO_MB - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); -#endif - -#ifdef SINGLE_FLIP - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - /* For single flip, we need to know the current parity */ - cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; -#endif - - do :: 1 -> - atomic { - if - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROD_NONE, - WRITE_DATA) -> - ooo_mem(i); - cur_data = (cur_data + 1) % SLAB_SIZE; - WRITE_CACHED_VAR(rcu_data[cur_data], WINE); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA, - WRITE_PROC_WMB) -> - smp_wmb(i); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_WMB, - WRITE_XCHG_PTR) -> - /* rcu_xchg_pointer() */ - atomic { - old_data = READ_CACHED_VAR(rcu_ptr); - WRITE_CACHED_VAR(rcu_ptr, cur_data); - } - PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, - WRITE_PROC_FIRST_MB) -> - goto smp_mb_send1; -smp_mb_send1_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); - - /* first flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB, - WRITE_PROC_FIRST_READ_GP) -> - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_MB | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP, - WRITE_PROC_FIRST_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); -#ifndef SINGLE_FLIP - /* In normal execution, we are always starting by - * waiting for the even parity. - */ - cur_gp_val = RCU_GP_CTR_BIT; -#endif - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send2; -smp_mb_send2_end: - /* The memory barrier will invalidate the - * second read done as prefetching. Note that all - * instructions with side-effects depending on - * WRITE_PROC_SECOND_READ_GP should also depend on - * completion of this busy-waiting loop. */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_FIRST_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); - - /* second flip */ - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ - WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_READ_GP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - tmpa = READ_CACHED_VAR(urcu_gp_ctr); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this - * instruction has globally observable - * side-effects. - */ - | WRITE_PROC_FIRST_MB - | WRITE_PROC_WMB - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP, - WRITE_PROC_SECOND_WRITE_GP) -> - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> - ooo_mem(i); - //smp_mb(i); /* TEST */ - /* ONLY WAITING FOR READER 0 */ - tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); - :: else -> - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); - fi; - - :: CONSUME_TOKENS(proc_urcu_writer, - //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ - WRITE_PROC_SECOND_WRITE_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_WAIT_LOOP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ - 0) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - goto smp_mb_send3; -smp_mb_send3_end: -#else - ooo_mem(i); -#endif - /* This instruction loops to WRITE_PROC_SECOND_WAIT */ - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); - - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_FIRST_READ_GP - | WRITE_PROC_SECOND_READ_GP - | WRITE_PROC_FIRST_WRITE_GP - | WRITE_PROC_SECOND_WRITE_GP - | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR - | WRITE_PROC_FIRST_MB, - WRITE_PROC_SECOND_MB) -> - goto smp_mb_send4; -smp_mb_send4_end: - PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); - - :: CONSUME_TOKENS(proc_urcu_writer, - WRITE_XCHG_PTR - | WRITE_PROC_FIRST_WAIT - | WRITE_PROC_SECOND_WAIT - | WRITE_PROC_WMB /* No dependency on - * WRITE_DATA because we - * write to a - * different location. */ - | WRITE_PROC_SECOND_MB - | WRITE_PROC_FIRST_MB, - WRITE_FREE) -> - WRITE_CACHED_VAR(rcu_data[old_data], POISON); - PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); - - :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> - CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); - break; - fi; - } - od; - /* - * Note : Promela model adds implicit serialization of the - * WRITE_FREE instruction. Normally, it would be permitted to - * spill on the next loop execution. Given the validation we do - * checks for the data entry read to be poisoned, it's ok if - * we do not check "late arriving" memory poisoning. - */ - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif -#ifdef READER_PROGRESS - /* - * Make sure we don't block the reader's progress. - */ - smp_mb_send(i, j, 5); -#endif - skip; - od; - - /* Non-atomic parts of the loop */ - goto end; -smp_mb_send1: - smp_mb_send(i, j, 1); - goto smp_mb_send1_end; -#ifndef GEN_ERROR_WRITER_PROGRESS -smp_mb_send2: - smp_mb_send(i, j, 2); - goto smp_mb_send2_end; -smp_mb_send3: - smp_mb_send(i, j, 3); - goto smp_mb_send3_end; -#endif -smp_mb_send4: - smp_mb_send(i, j, 4); - goto smp_mb_send4_end; -end: - skip; -} - -/* no name clash please */ -#undef proc_urcu_writer - - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1); - INIT_CACHED_VAR(rcu_ptr, 0); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0); - ptr_read_first[i] = 1; - ptr_read_second[i] = 1; - data_read_first[i] = WINE; - data_read_second[i] = WINE; - i++; - :: i >= NR_READERS -> break - od; - INIT_CACHED_VAR(rcu_data[0], WINE); - i = 1; - do - :: i < SLAB_SIZE -> - INIT_CACHED_VAR(rcu_data[i], POISON); - i++ - :: i >= SLAB_SIZE -> break - od; - - init_done = 1; - } -} diff --git a/formal-model/urcu-controldataflow/urcu_free.ltl b/formal-model/urcu-controldataflow/urcu_free.ltl deleted file mode 100644 index 6be1be9..0000000 --- a/formal-model/urcu-controldataflow/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (!read_poison) diff --git a/formal-model/urcu-controldataflow/urcu_free_nested.define b/formal-model/urcu-controldataflow/urcu_free_nested.define deleted file mode 100644 index 0fb59bd..0000000 --- a/formal-model/urcu-controldataflow/urcu_free_nested.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-controldataflow/urcu_free_no_mb.define b/formal-model/urcu-controldataflow/urcu_free_no_mb.define deleted file mode 100644 index d99d793..0000000 --- a/formal-model/urcu-controldataflow/urcu_free_no_mb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_MB diff --git a/formal-model/urcu-controldataflow/urcu_free_no_rmb.define b/formal-model/urcu-controldataflow/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-controldataflow/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-controldataflow/urcu_free_no_wmb.define b/formal-model/urcu-controldataflow/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-controldataflow/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-controldataflow/urcu_free_single_flip.define b/formal-model/urcu-controldataflow/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-controldataflow/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-controldataflow/urcu_progress.ltl b/formal-model/urcu-controldataflow/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-controldataflow/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-controldataflow/urcu_progress_reader.define b/formal-model/urcu-controldataflow/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-controldataflow/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-controldataflow/urcu_progress_writer.define b/formal-model/urcu-controldataflow/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-controldataflow/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-controldataflow/urcu_progress_writer_error.define b/formal-model/urcu-controldataflow/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-controldataflow/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/DEFINES b/formal-model/urcu-nosched-model/result-signal-over-reader/DEFINES deleted file mode 100644 index 2fcb038..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/DEFINES +++ /dev/null @@ -1,17 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/Makefile b/formal-model/urcu-nosched-model/result-signal-over-reader/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.log b/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.log deleted file mode 100644 index d317f57..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.log +++ /dev/null @@ -1,312 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 4926 States= 1e+06 Transitions= 9.03e+06 Memory= 527.287 t= 5.98 R= 2e+05 -Depth= 7228 States= 2e+06 Transitions= 1.88e+07 Memory= 588.322 t= 12.9 R= 2e+05 -Depth= 7228 States= 3e+06 Transitions= 3.14e+07 Memory= 649.358 t= 21.9 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 7228 States= 4e+06 Transitions= 4.3e+07 Memory= 741.416 t= 30.3 R= 1e+05 -Depth= 7228 States= 5e+06 Transitions= 5.65e+07 Memory= 802.451 t= 39.6 R= 1e+05 -Depth= 7228 States= 6e+06 Transitions= 6.78e+07 Memory= 863.486 t= 47.5 R= 1e+05 -Depth= 7228 States= 7e+06 Transitions= 8.05e+07 Memory= 924.522 t= 56.5 R= 1e+05 -Depth= 7228 States= 8e+06 Transitions= 9.49e+07 Memory= 985.557 t= 66.8 R= 1e+05 -Depth= 7228 States= 9e+06 Transitions= 1.06e+08 Memory= 1046.592 t= 74.7 R= 1e+05 -pan: resizing hashtable to -w24.. done -Depth= 7228 States= 1e+07 Transitions= 1.18e+08 Memory= 1231.721 t= 84.9 R= 1e+05 -Depth= 7228 States= 1.1e+07 Transitions= 1.29e+08 Memory= 1292.756 t= 92.8 R= 1e+05 -Depth= 7228 States= 1.2e+07 Transitions= 1.4e+08 Memory= 1353.791 t= 100 R= 1e+05 -Depth= 7228 States= 1.3e+07 Transitions= 1.53e+08 Memory= 1414.826 t= 109 R= 1e+05 -Depth= 7228 States= 1.4e+07 Transitions= 1.65e+08 Memory= 1475.861 t= 117 R= 1e+05 -Depth= 7228 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1536.897 t= 126 R= 1e+05 -Depth= 7228 States= 1.6e+07 Transitions= 1.89e+08 Memory= 1597.932 t= 134 R= 1e+05 -Depth= 7228 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1658.967 t= 143 R= 1e+05 -Depth= 7228 States= 1.8e+07 Transitions= 2.16e+08 Memory= 1720.002 t= 153 R= 1e+05 -Depth= 7228 States= 1.9e+07 Transitions= 2.27e+08 Memory= 1781.037 t= 160 R= 1e+05 -Depth= 7228 States= 2e+07 Transitions= 2.39e+08 Memory= 1842.072 t= 169 R= 1e+05 -Depth= 7228 States= 2.1e+07 Transitions= 2.51e+08 Memory= 1903.108 t= 177 R= 1e+05 -Depth= 7228 States= 2.2e+07 Transitions= 2.62e+08 Memory= 1964.143 t= 185 R= 1e+05 -Depth= 7228 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2025.178 t= 194 R= 1e+05 -Depth= 7228 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2086.213 t= 203 R= 1e+05 -Depth= 7228 States= 2.5e+07 Transitions= 2.99e+08 Memory= 2147.248 t= 212 R= 1e+05 -Depth= 7228 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2208.283 t= 220 R= 1e+05 -Depth= 7228 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2269.318 t= 230 R= 1e+05 -Depth= 7228 States= 2.8e+07 Transitions= 3.37e+08 Memory= 2330.354 t= 239 R= 1e+05 -Depth= 7228 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2391.389 t= 248 R= 1e+05 -Depth= 7228 States= 3e+07 Transitions= 3.6e+08 Memory= 2452.424 t= 256 R= 1e+05 -Depth= 7228 States= 3.1e+07 Transitions= 3.72e+08 Memory= 2513.459 t= 265 R= 1e+05 -Depth= 7228 States= 3.2e+07 Transitions= 3.83e+08 Memory= 2574.494 t= 273 R= 1e+05 -Depth= 7228 States= 3.3e+07 Transitions= 3.95e+08 Memory= 2635.529 t= 282 R= 1e+05 -Depth= 7228 States= 3.4e+07 Transitions= 4.07e+08 Memory= 2696.565 t= 291 R= 1e+05 -pan: resizing hashtable to -w26.. done -Depth= 7228 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3253.682 t= 308 R= 1e+05 -Depth= 7228 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3314.717 t= 316 R= 1e+05 -Depth= 7228 States= 3.7e+07 Transitions= 4.45e+08 Memory= 3375.752 t= 325 R= 1e+05 -Depth= 7228 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3436.787 t= 334 R= 1e+05 -Depth= 7228 States= 3.9e+07 Transitions= 4.71e+08 Memory= 3497.822 t= 343 R= 1e+05 -Depth= 7228 States= 4e+07 Transitions= 4.82e+08 Memory= 3558.858 t= 350 R= 1e+05 -Depth= 7228 States= 4.1e+07 Transitions= 4.94e+08 Memory= 3619.893 t= 359 R= 1e+05 -Depth= 7228 States= 4.2e+07 Transitions= 5.04e+08 Memory= 3680.928 t= 366 R= 1e+05 -Depth= 7228 States= 4.3e+07 Transitions= 5.16e+08 Memory= 3741.963 t= 374 R= 1e+05 -Depth= 7228 States= 4.4e+07 Transitions= 5.29e+08 Memory= 3802.998 t= 383 R= 1e+05 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 56 byte, depth reached 7228, errors: 0 - 44157204 states, stored -4.8641845e+08 states, matched -5.3057565e+08 transitions (= stored+matched) -1.8453582e+09 atomic steps -hash conflicts: 2.8837553e+08 (resolved) - -Stats on memory usage (in Megabytes): - 3537.374 equivalent memory usage for states (stored*(State-vector + overhead)) - 2843.050 actual memory usage for states (compression: 80.37%) - state-vector as stored = 40 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 3812.568 total actual memory usage - -unreached in proctype urcu_reader - line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 61, "(1)" - line 417, ".input.spin", state 91, "(1)" - line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 158, "(1)" - line 417, ".input.spin", state 188, "(1)" - line 398, ".input.spin", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 256, "(1)" - line 417, ".input.spin", state 286, "(1)" - line 398, ".input.spin", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 395, "(1)" - line 417, ".input.spin", state 425, "(1)" - line 539, ".input.spin", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 398, ".input.spin", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 70, "(1)" - line 417, ".input.spin", state 100, "(1)" - line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 158, "(1)" - line 417, ".input.spin", state 188, "(1)" - line 398, ".input.spin", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 247, "(1)" - line 417, ".input.spin", state 277, "(1)" - line 398, ".input.spin", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 359, "(1)" - line 417, ".input.spin", state 389, "(1)" - line 613, ".input.spin", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 59, "(1)" - line 412, ".input.spin", state 72, "(1)" - line 417, ".input.spin", state 89, "(1)" - line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 153, "(1)" - line 412, ".input.spin", state 166, "(1)" - line 651, ".input.spin", state 199, "(1)" - line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 240, "(1)" - line 163, ".input.spin", state 248, "(1)" - line 167, ".input.spin", state 260, "(1)" - line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 370, "(1)" - line 163, ".input.spin", state 378, "(1)" - line 167, ".input.spin", state 390, "(1)" - line 398, ".input.spin", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 449, "(1)" - line 412, ".input.spin", state 462, "(1)" - line 417, ".input.spin", state 479, "(1)" - line 398, ".input.spin", state 498, "(1)" - line 402, ".input.spin", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 554, "(1)" - line 417, ".input.spin", state 571, "(1)" - line 402, ".input.spin", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 647, "(1)" - line 417, ".input.spin", state 664, "(1)" - line 178, ".input.spin", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 710, "(1)" - line 163, ".input.spin", state 718, "(1)" - line 167, ".input.spin", state 730, "(1)" - line 174, ".input.spin", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 840, "(1)" - line 163, ".input.spin", state 848, "(1)" - line 167, ".input.spin", state 860, "(1)" - line 398, ".input.spin", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 884, "(1)" - line 398, ".input.spin", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 885, "else" - line 398, ".input.spin", state 888, "(1)" - line 402, ".input.spin", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 898, "(1)" - line 402, ".input.spin", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 899, "else" - line 402, ".input.spin", state 902, "(1)" - line 402, ".input.spin", state 903, "(1)" - line 402, ".input.spin", state 903, "(1)" - line 400, ".input.spin", state 908, "((i<1))" - line 400, ".input.spin", state 908, "((i>=1))" - line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 927, "(1)" - line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, ".input.spin", state 928, "else" - line 408, ".input.spin", state 931, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 412, ".input.spin", state 940, "(1)" - line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, ".input.spin", state 941, "else" - line 412, ".input.spin", state 944, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 410, ".input.spin", state 950, "((i<1))" - line 410, ".input.spin", state 950, "((i>=1))" - line 417, ".input.spin", state 957, "(1)" - line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, ".input.spin", state 958, "else" - line 417, ".input.spin", state 961, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1040, "(1)" - line 417, ".input.spin", state 1057, "(1)" - line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1130, "(1)" - line 417, ".input.spin", state 1147, "(1)" - line 398, ".input.spin", state 1166, "(1)" - line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1222, "(1)" - line 417, ".input.spin", state 1239, "(1)" - line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1315, "(1)" - line 417, ".input.spin", state 1332, "(1)" - line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1378, "(1)" - line 163, ".input.spin", state 1386, "(1)" - line 167, ".input.spin", state 1398, "(1)" - line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1508, "(1)" - line 163, ".input.spin", state 1516, "(1)" - line 167, ".input.spin", state 1528, "(1)" - line 398, ".input.spin", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 1552, "(1)" - line 398, ".input.spin", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 1553, "else" - line 398, ".input.spin", state 1556, "(1)" - line 402, ".input.spin", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 1566, "(1)" - line 402, ".input.spin", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 1567, "else" - line 402, ".input.spin", state 1570, "(1)" - line 402, ".input.spin", state 1571, "(1)" - line 402, ".input.spin", state 1571, "(1)" - line 400, ".input.spin", state 1576, "((i<1))" - line 400, ".input.spin", state 1576, "((i>=1))" - line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 1595, "(1)" - line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, ".input.spin", state 1596, "else" - line 408, ".input.spin", state 1599, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 412, ".input.spin", state 1608, "(1)" - line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, ".input.spin", state 1609, "else" - line 412, ".input.spin", state 1612, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 410, ".input.spin", state 1618, "((i<1))" - line 410, ".input.spin", state 1618, "((i>=1))" - line 417, ".input.spin", state 1625, "(1)" - line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, ".input.spin", state 1626, "else" - line 417, ".input.spin", state 1629, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1681, "(1)" - line 163, ".input.spin", state 1689, "(1)" - line 167, ".input.spin", state 1701, "(1)" - line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1811, "(1)" - line 163, ".input.spin", state 1819, "(1)" - line 167, ".input.spin", state 1831, "(1)" - line 701, ".input.spin", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) - -pan: elapsed time 384 seconds -pan: rate 114968.77 states/second -pan: avg transition delay 7.2389e-07 usec -cp .input.spin asserts.spin.input -cp .input.spin.trail asserts.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.spin.input deleted file mode 100644 index 2d7f62d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.spin.input +++ /dev/null @@ -1,722 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/references.txt b/formal-model/urcu-nosched-model/result-signal-over-reader/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu.sh b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu.spin b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.log deleted file mode 100644 index a6ab537..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.log +++ /dev/null @@ -1,326 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) -Depth= 6837 States= 1e+06 Transitions= 9.03e+06 Memory= 534.904 t= 7.74 R= 1e+05 -Depth= 8887 States= 2e+06 Transitions= 1.88e+07 Memory= 603.557 t= 16.6 R= 1e+05 -Depth= 8887 States= 3e+06 Transitions= 3.14e+07 Memory= 672.209 t= 28 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 8887 States= 4e+06 Transitions= 4.33e+07 Memory= 771.885 t= 39.1 R= 1e+05 -Depth= 8887 States= 5e+06 Transitions= 5.65e+07 Memory= 840.635 t= 50.7 R= 1e+05 -Depth= 8887 States= 6e+06 Transitions= 6.79e+07 Memory= 909.287 t= 61 R= 1e+05 -Depth= 8887 States= 7e+06 Transitions= 8.08e+07 Memory= 977.940 t= 72.6 R= 1e+05 -Depth= 8887 States= 8e+06 Transitions= 9.5e+07 Memory= 1046.592 t= 85.5 R= 9e+04 -Depth= 8887 States= 9e+06 Transitions= 1.07e+08 Memory= 1115.342 t= 96.7 R= 9e+04 -pan: resizing hashtable to -w24.. done -Depth= 8887 States= 1e+07 Transitions= 1.18e+08 Memory= 1308.088 t= 108 R= 9e+04 -Depth= 8887 States= 1.1e+07 Transitions= 1.3e+08 Memory= 1376.740 t= 119 R= 9e+04 -Depth= 8887 States= 1.2e+07 Transitions= 1.41e+08 Memory= 1445.393 t= 128 R= 9e+04 -Depth= 8887 States= 1.3e+07 Transitions= 1.51e+08 Memory= 1514.045 t= 138 R= 9e+04 -Depth= 8887 States= 1.4e+07 Transitions= 1.64e+08 Memory= 1582.795 t= 149 R= 9e+04 -Depth= 8887 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1651.447 t= 160 R= 9e+04 -Depth= 8887 States= 1.6e+07 Transitions= 1.9e+08 Memory= 1720.100 t= 172 R= 9e+04 -Depth= 8887 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1788.752 t= 183 R= 9e+04 -Depth= 8887 States= 1.8e+07 Transitions= 2.15e+08 Memory= 1857.502 t= 194 R= 9e+04 -Depth= 8887 States= 1.9e+07 Transitions= 2.29e+08 Memory= 1926.154 t= 207 R= 9e+04 -Depth= 8887 States= 2e+07 Transitions= 2.4e+08 Memory= 1994.807 t= 217 R= 9e+04 -Depth= 8887 States= 2.1e+07 Transitions= 2.51e+08 Memory= 2063.459 t= 227 R= 9e+04 -Depth= 8887 States= 2.2e+07 Transitions= 2.63e+08 Memory= 2132.209 t= 238 R= 9e+04 -Depth= 8887 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2200.861 t= 248 R= 9e+04 -Depth= 8887 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2269.514 t= 259 R= 9e+04 -Depth= 8887 States= 2.5e+07 Transitions= 2.98e+08 Memory= 2338.166 t= 270 R= 9e+04 -Depth= 8887 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2406.916 t= 281 R= 9e+04 -Depth= 8887 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2475.568 t= 294 R= 9e+04 -Depth= 8887 States= 2.8e+07 Transitions= 3.36e+08 Memory= 2544.221 t= 305 R= 9e+04 -Depth= 8887 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2612.873 t= 317 R= 9e+04 -Depth= 8887 States= 3e+07 Transitions= 3.63e+08 Memory= 2681.526 t= 329 R= 9e+04 -Depth= 8887 States= 3.1e+07 Transitions= 3.73e+08 Memory= 2750.276 t= 339 R= 9e+04 -Depth= 8887 States= 3.2e+07 Transitions= 3.85e+08 Memory= 2818.928 t= 351 R= 9e+04 -Depth= 8887 States= 3.3e+07 Transitions= 3.97e+08 Memory= 2887.580 t= 362 R= 9e+04 -Depth= 8887 States= 3.4e+07 Transitions= 4.08e+08 Memory= 2956.233 t= 373 R= 9e+04 -pan: resizing hashtable to -w26.. done -Depth= 8887 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3520.967 t= 391 R= 9e+04 -Depth= 8887 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3589.619 t= 402 R= 9e+04 -Depth= 8887 States= 3.7e+07 Transitions= 4.44e+08 Memory= 3658.272 t= 413 R= 9e+04 -Depth= 8887 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3727.022 t= 425 R= 9e+04 -Depth= 8887 States= 3.9e+07 Transitions= 4.7e+08 Memory= 3795.674 t= 435 R= 9e+04 -Depth= 8887 States= 4e+07 Transitions= 4.83e+08 Memory= 3864.326 t= 447 R= 9e+04 -Depth= 8887 States= 4.1e+07 Transitions= 4.97e+08 Memory= 3932.979 t= 459 R= 9e+04 -Depth= 8887 States= 4.2e+07 Transitions= 5.07e+08 Memory= 4001.729 t= 468 R= 9e+04 -Depth= 8887 States= 4.3e+07 Transitions= 5.19e+08 Memory= 4070.381 t= 479 R= 9e+04 -Depth= 8887 States= 4.4e+07 Transitions= 5.31e+08 Memory= 4139.033 t= 489 R= 9e+04 -Depth= 8887 States= 4.5e+07 Transitions= 5.42e+08 Memory= 4207.686 t= 499 R= 9e+04 -Depth= 8887 States= 4.6e+07 Transitions= 5.54e+08 Memory= 4276.338 t= 510 R= 9e+04 -Depth= 8887 States= 4.7e+07 Transitions= 5.67e+08 Memory= 4345.088 t= 521 R= 9e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 8887, errors: 0 - 47143033 states, stored -5.2129161e+08 states, matched -5.6843464e+08 transitions (= stored+matched) -1.9783052e+09 atomic steps -hash conflicts: 3.1395137e+08 (resolved) - -Stats on memory usage (in Megabytes): - 4136.237 equivalent memory usage for states (stored*(State-vector + overhead)) - 3385.741 actual memory usage for states (compression: 81.86%) - state-vector as stored = 47 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 4354.854 total actual memory usage - -unreached in proctype urcu_reader - line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 61, "(1)" - line 417, "pan.___", state 91, "(1)" - line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 158, "(1)" - line 417, "pan.___", state 188, "(1)" - line 398, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 256, "(1)" - line 417, "pan.___", state 286, "(1)" - line 398, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 395, "(1)" - line 417, "pan.___", state 425, "(1)" - line 539, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 398, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 70, "(1)" - line 417, "pan.___", state 100, "(1)" - line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 158, "(1)" - line 417, "pan.___", state 188, "(1)" - line 398, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 247, "(1)" - line 417, "pan.___", state 277, "(1)" - line 398, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 359, "(1)" - line 417, "pan.___", state 389, "(1)" - line 613, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 59, "(1)" - line 412, "pan.___", state 72, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 153, "(1)" - line 412, "pan.___", state 166, "(1)" - line 651, "pan.___", state 199, "(1)" - line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 240, "(1)" - line 163, "pan.___", state 248, "(1)" - line 167, "pan.___", state 260, "(1)" - line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 370, "(1)" - line 163, "pan.___", state 378, "(1)" - line 167, "pan.___", state 390, "(1)" - line 398, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 449, "(1)" - line 412, "pan.___", state 462, "(1)" - line 417, "pan.___", state 479, "(1)" - line 398, "pan.___", state 498, "(1)" - line 402, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 554, "(1)" - line 417, "pan.___", state 571, "(1)" - line 402, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 647, "(1)" - line 417, "pan.___", state 664, "(1)" - line 178, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 710, "(1)" - line 163, "pan.___", state 718, "(1)" - line 167, "pan.___", state 730, "(1)" - line 174, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 840, "(1)" - line 163, "pan.___", state 848, "(1)" - line 167, "pan.___", state 860, "(1)" - line 398, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 884, "(1)" - line 398, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 885, "else" - line 398, "pan.___", state 888, "(1)" - line 402, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 898, "(1)" - line 402, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 899, "else" - line 402, "pan.___", state 902, "(1)" - line 402, "pan.___", state 903, "(1)" - line 402, "pan.___", state 903, "(1)" - line 400, "pan.___", state 908, "((i<1))" - line 400, "pan.___", state 908, "((i>=1))" - line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 927, "(1)" - line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, "pan.___", state 928, "else" - line 408, "pan.___", state 931, "(1)" - line 408, "pan.___", state 932, "(1)" - line 408, "pan.___", state 932, "(1)" - line 412, "pan.___", state 940, "(1)" - line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, "pan.___", state 941, "else" - line 412, "pan.___", state 944, "(1)" - line 412, "pan.___", state 945, "(1)" - line 412, "pan.___", state 945, "(1)" - line 410, "pan.___", state 950, "((i<1))" - line 410, "pan.___", state 950, "((i>=1))" - line 417, "pan.___", state 957, "(1)" - line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, "pan.___", state 958, "else" - line 417, "pan.___", state 961, "(1)" - line 417, "pan.___", state 962, "(1)" - line 417, "pan.___", state 962, "(1)" - line 419, "pan.___", state 965, "(1)" - line 419, "pan.___", state 965, "(1)" - line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1040, "(1)" - line 417, "pan.___", state 1057, "(1)" - line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1130, "(1)" - line 417, "pan.___", state 1147, "(1)" - line 398, "pan.___", state 1166, "(1)" - line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1222, "(1)" - line 417, "pan.___", state 1239, "(1)" - line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1315, "(1)" - line 417, "pan.___", state 1332, "(1)" - line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1378, "(1)" - line 163, "pan.___", state 1386, "(1)" - line 167, "pan.___", state 1398, "(1)" - line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1508, "(1)" - line 163, "pan.___", state 1516, "(1)" - line 167, "pan.___", state 1528, "(1)" - line 398, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 1552, "(1)" - line 398, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 1553, "else" - line 398, "pan.___", state 1556, "(1)" - line 402, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 1566, "(1)" - line 402, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 1567, "else" - line 402, "pan.___", state 1570, "(1)" - line 402, "pan.___", state 1571, "(1)" - line 402, "pan.___", state 1571, "(1)" - line 400, "pan.___", state 1576, "((i<1))" - line 400, "pan.___", state 1576, "((i>=1))" - line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1595, "(1)" - line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, "pan.___", state 1596, "else" - line 408, "pan.___", state 1599, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 412, "pan.___", state 1608, "(1)" - line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, "pan.___", state 1609, "else" - line 412, "pan.___", state 1612, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 410, "pan.___", state 1618, "((i<1))" - line 410, "pan.___", state 1618, "((i>=1))" - line 417, "pan.___", state 1625, "(1)" - line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, "pan.___", state 1626, "else" - line 417, "pan.___", state 1629, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1681, "(1)" - line 163, "pan.___", state 1689, "(1)" - line 167, "pan.___", state 1701, "(1)" - line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1811, "(1)" - line 163, "pan.___", state 1819, "(1)" - line 167, "pan.___", state 1831, "(1)" - line 701, "pan.___", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 748, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 523 seconds -pan: rate 90149.985 states/second -pan: avg transition delay 9.1997e-07 usec -cp .input.spin urcu_free.spin.input -cp .input.spin.trail urcu_free.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.ltl b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.ltl deleted file mode 100644 index 1954414..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (read_free -> !read_free_race) diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input deleted file mode 100644 index 2d7f62d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input +++ /dev/null @@ -1,722 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input.trail deleted file mode 100644 index 837f3d9..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input.trail +++ /dev/null @@ -1,15043 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 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READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.log deleted file mode 100644 index d503334..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.log +++ /dev/null @@ -1,20 +0,0 @@ -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_nested.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) -Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.48 R= 1e+05 -Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.6 R= 1e+05 -Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.3 R= 1e+05 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input deleted file mode 100644 index c94928c..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input +++ /dev/null @@ -1,696 +0,0 @@ -#define READER_NEST_LEVEL 1 - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE -#define get_pid() ((_pid < 1) -> 0 : 1) -#elif defined(TEST_SIGNAL_ON_READ) -#define get_pid() ((_pid < 2) -> 0 : 1) -#else -#define get_pid() (_pid) -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - dispatch_sighand_read_exec(); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 1; - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input.trail deleted file mode 100644 index 6f29ad2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input.trail +++ /dev/null @@ -1,11161 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 -21:4:4355 -22:4:4359 -23:4:4360 -24:0:4365 -25:4:4362 -26:0:4365 -27:3:2331 -28:0:4365 -29:3:2337 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b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.log deleted file mode 100644 index 3afaead..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.log +++ /dev/null @@ -1,303 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -Depth= 6009 States= 1e+06 Transitions= 1.08e+07 Memory= 534.904 t= 9.22 R= 1e+05 -Depth= 6009 States= 2e+06 Transitions= 3.4e+07 Memory= 603.557 t= 31.1 R= 6e+04 -Depth= 7527 States= 3e+06 Transitions= 4.91e+07 Memory= 672.209 t= 45.6 R= 7e+04 -pan: resizing hashtable to -w22.. done -Depth= 68651 States= 4e+06 Transitions= 6.74e+07 Memory= 772.080 t= 62.9 R= 6e+04 -Depth= 68651 States= 5e+06 Transitions= 8.62e+07 Memory= 840.733 t= 80.2 R= 6e+04 -Depth= 68651 States= 6e+06 Transitions= 1.03e+08 Memory= 909.385 t= 95.7 R= 6e+04 -Depth= 68651 States= 7e+06 Transitions= 1.21e+08 Memory= 978.037 t= 112 R= 6e+04 -Depth= 68651 States= 8e+06 Transitions= 1.37e+08 Memory= 1046.690 t= 128 R= 6e+04 -Depth= 68651 States= 9e+06 Transitions= 1.52e+08 Memory= 1115.440 t= 143 R= 6e+04 -pan: resizing hashtable to -w24.. done -Depth= 68651 States= 1e+07 Transitions= 1.72e+08 Memory= 1308.186 t= 163 R= 6e+04 -Depth= 68651 States= 1.1e+07 Transitions= 1.89e+08 Memory= 1376.838 t= 178 R= 6e+04 -Depth= 68651 States= 1.2e+07 Transitions= 2.05e+08 Memory= 1445.490 t= 193 R= 6e+04 -Depth= 68651 States= 1.3e+07 Transitions= 2.22e+08 Memory= 1514.143 t= 208 R= 6e+04 -Depth= 68651 States= 1.4e+07 Transitions= 2.39e+08 Memory= 1582.893 t= 224 R= 6e+04 -pan: claim violated! (at depth 2141) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 68651, errors: 1 - 14155711 states, stored -2.2815817e+08 states, matched -2.4231388e+08 transitions (= stored+matched) -8.5461256e+08 atomic steps -hash conflicts: 1.1483359e+08 (resolved) - -Stats on memory usage (in Megabytes): - 1565.993 equivalent memory usage for states (stored*(State-vector + overhead)) - 1008.042 actual memory usage for states (compression: 64.37%) - state-vector as stored = 47 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1593.537 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 227, "(1)" - line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 256, "(1)" - line 419, "pan.___", state 286, "(1)" - line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 366, "(1)" - line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 395, "(1)" - line 419, "pan.___", state 425, "(1)" - line 541, "pan.___", state 456, "-end-" - (19 of 456 states) -unreached in proctype urcu_reader_sig - line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 70, "(1)" - line 419, "pan.___", state 100, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 247, "(1)" - line 419, "pan.___", state 277, "(1)" - line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 330, "(1)" - line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 359, "(1)" - line 419, "pan.___", state 389, "(1)" - line 615, "pan.___", state 411, "-end-" - (18 of 411 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 421, "pan.___", state 97, "(1)" - line 421, "pan.___", state 97, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 410, "pan.___", state 153, "(1)" - line 414, "pan.___", state 166, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 653, "pan.___", state 199, "(1)" - line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 254, "(1)" - line 414, "pan.___", state 267, "(1)" - line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 345, "(1)" - line 414, "pan.___", state 358, "(1)" - line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 440, "(1)" - line 414, "pan.___", state 453, "(1)" - line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 533, "(1)" - line 414, "pan.___", state 546, "(1)" - line 400, "pan.___", state 582, "(1)" - line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 638, "(1)" - line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 731, "(1)" - line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 821, "(1)" - line 419, "pan.___", state 838, "(1)" - line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 912, "(1)" - line 419, "pan.___", state 929, "(1)" - line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1007, "(1)" - line 419, "pan.___", state 1024, "(1)" - line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1053, "else" - line 400, "pan.___", state 1056, "(1)" - line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1066, "(1)" - line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1067, "else" - line 404, "pan.___", state 1070, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 402, "pan.___", state 1076, "((i<1))" - line 402, "pan.___", state 1076, "((i>=1))" - line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1095, "(1)" - line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1096, "else" - line 410, "pan.___", state 1099, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 414, "pan.___", state 1108, "(1)" - line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1109, "else" - line 414, "pan.___", state 1112, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 412, "pan.___", state 1118, "((i<1))" - line 412, "pan.___", state 1118, "((i>=1))" - line 419, "pan.___", state 1125, "(1)" - line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1126, "else" - line 419, "pan.___", state 1129, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1208, "(1)" - line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1298, "(1)" - line 400, "pan.___", state 1334, "(1)" - line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1390, "(1)" - line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1483, "(1)" - line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1573, "(1)" - line 419, "pan.___", state 1590, "(1)" - line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1664, "(1)" - line 419, "pan.___", state 1681, "(1)" - line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1759, "(1)" - line 419, "pan.___", state 1776, "(1)" - line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1804, "(1)" - line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1805, "else" - line 400, "pan.___", state 1808, "(1)" - line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1818, "(1)" - line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1819, "else" - line 404, "pan.___", state 1822, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 402, "pan.___", state 1828, "((i<1))" - line 402, "pan.___", state 1828, "((i>=1))" - line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1847, "(1)" - line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1848, "else" - line 410, "pan.___", state 1851, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 414, "pan.___", state 1860, "(1)" - line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1861, "else" - line 414, "pan.___", state 1864, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 412, "pan.___", state 1870, "((i<1))" - line 412, "pan.___", state 1870, "((i>=1))" - line 419, "pan.___", state 1877, "(1)" - line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1878, "else" - line 419, "pan.___", state 1881, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1960, "(1)" - line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 2051, "(1)" - line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 2146, "(1)" - line 703, "pan.___", state 2192, "-end-" - (144 of 2192 states) -unreached in proctype :init: - line 710, "pan.___", state 9, "((j<2))" - line 710, "pan.___", state 9, "((j>=2))" - line 711, "pan.___", state 20, "((j<2))" - line 711, "pan.___", state 20, "((j>=2))" - line 716, "pan.___", state 33, "((j<2))" - line 716, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 750, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 227 seconds -pan: rate 62472.797 states/second -pan: avg transition delay 9.3511e-07 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input deleted file mode 100644 index 5de16b8..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,724 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index d437aad..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2144 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:3107 -2:4:3059 -3:4:3062 -4:4:3062 -5:4:3065 -6:4:3073 -7:4:3073 -8:4:3076 -9:4:3082 -10:4:3086 -11:4:3086 -12:4:3089 -13:4:3097 -14:4:3101 -15:4:3102 -16:0:3107 -17:4:3104 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-2118:2:729 -2119:0:3107 -2120:3:3052 -2121:0:3107 -2122:2:741 -2123:0:3107 -2124:3:3053 -2125:0:3107 -2126:2:750 -2127:0:3107 -2128:3:3052 -2129:0:3107 -2130:2:753 -2131:0:3107 -2132:3:3053 -2133:0:3107 -2134:2:758 -2135:0:3107 -2136:3:3052 -2137:0:3107 -2138:2:759 -2139:0:3105 -2140:3:3053 -2141:0:3111 -2142:2:647 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.define b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.log deleted file mode 100644 index 5bcef22..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.log +++ /dev/null @@ -1,300 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 5678 States= 1e+06 Transitions= 8.21e+06 Memory= 534.904 t= 6.72 R= 1e+05 -Depth= 5678 States= 2e+06 Transitions= 1.6e+07 Memory= 603.557 t= 13.4 R= 1e+05 -Depth= 16003 States= 3e+06 Transitions= 2.49e+07 Memory= 672.209 t= 21.5 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 31043 States= 4e+06 Transitions= 3.44e+07 Memory= 771.983 t= 30.1 R= 1e+05 -Depth= 31043 States= 5e+06 Transitions= 4.41e+07 Memory= 840.635 t= 38.4 R= 1e+05 -Depth= 31043 States= 6e+06 Transitions= 5.25e+07 Memory= 909.287 t= 45.7 R= 1e+05 -Depth= 31043 States= 7e+06 Transitions= 6.12e+07 Memory= 977.940 t= 53.4 R= 1e+05 -Depth= 31043 States= 8e+06 Transitions= 6.95e+07 Memory= 1046.690 t= 60.8 R= 1e+05 -Depth= 31043 States= 9e+06 Transitions= 7.78e+07 Memory= 1115.342 t= 68.5 R= 1e+05 -pan: resizing hashtable to -w24.. done -Depth= 31043 States= 1e+07 Transitions= 8.68e+07 Memory= 1308.088 t= 77.9 R= 1e+05 -Depth= 31043 States= 1.1e+07 Transitions= 1.01e+08 Memory= 1376.740 t= 90.1 R= 1e+05 -Depth= 31043 States= 1.2e+07 Transitions= 1.13e+08 Memory= 1445.393 t= 101 R= 1e+05 -Depth= 31043 States= 1.3e+07 Transitions= 1.25e+08 Memory= 1514.045 t= 111 R= 1e+05 -Depth= 31043 States= 1.4e+07 Transitions= 1.38e+08 Memory= 1582.795 t= 122 R= 1e+05 -pan: claim violated! (at depth 1774) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 31043, errors: 1 - 14288659 states, stored -1.2755714e+08 states, matched -1.418458e+08 transitions (= stored+matched) -4.6616273e+08 atomic steps -hash conflicts: 65726574 (resolved) - -Stats on memory usage (in Megabytes): - 1253.659 equivalent memory usage for states (stored*(State-vector + overhead)) - 1017.191 actual memory usage for states (compression: 81.14%) - state-vector as stored = 47 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1602.619 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 291, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 304, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 320, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 334, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 352, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 365, "(1)" - line 413, "pan.___", state 378, "(1)" - line 418, "pan.___", state 395, "(1)" - line 399, "pan.___", state 414, "(1)" - line 403, "pan.___", state 426, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 444, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 470, "(1)" - line 418, "pan.___", state 487, "(1)" - line 403, "pan.___", state 519, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 537, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 563, "(1)" - line 418, "pan.___", state 580, "(1)" - line 179, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 629, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 677, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 690, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 714, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 716, "(1)" - line 399, "pan.___", state 717, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 717, "else" - line 399, "pan.___", state 720, "(1)" - line 403, "pan.___", state 728, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 730, "(1)" - line 403, "pan.___", state 731, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 731, "else" - line 403, "pan.___", state 734, "(1)" - line 403, "pan.___", state 735, "(1)" - line 403, "pan.___", state 735, "(1)" - line 401, "pan.___", state 740, "((i<1))" - line 401, "pan.___", state 740, "((i>=1))" - line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 759, "(1)" - line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 760, "else" - line 409, "pan.___", state 763, "(1)" - line 409, "pan.___", state 764, "(1)" - line 409, "pan.___", state 764, "(1)" - line 413, "pan.___", state 772, "(1)" - line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 773, "else" - line 413, "pan.___", state 776, "(1)" - line 413, "pan.___", state 777, "(1)" - line 413, "pan.___", state 777, "(1)" - line 411, "pan.___", state 782, "((i<1))" - line 411, "pan.___", state 782, "((i>=1))" - line 418, "pan.___", state 789, "(1)" - line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 790, "else" - line 418, "pan.___", state 793, "(1)" - line 418, "pan.___", state 794, "(1)" - line 418, "pan.___", state 794, "(1)" - line 420, "pan.___", state 797, "(1)" - line 420, "pan.___", state 797, "(1)" - line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 872, "(1)" - line 418, "pan.___", state 889, "(1)" - line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 962, "(1)" - line 418, "pan.___", state 979, "(1)" - line 399, "pan.___", state 998, "(1)" - line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1054, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1147, "(1)" - line 418, "pan.___", state 1164, "(1)" - line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1261, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1300, "(1)" - line 399, "pan.___", state 1301, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1301, "else" - line 399, "pan.___", state 1304, "(1)" - line 403, "pan.___", state 1312, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1314, "(1)" - line 403, "pan.___", state 1315, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1315, "else" - line 403, "pan.___", state 1318, "(1)" - line 403, "pan.___", state 1319, "(1)" - line 403, "pan.___", state 1319, "(1)" - line 401, "pan.___", state 1324, "((i<1))" - line 401, "pan.___", state 1324, "((i>=1))" - line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1343, "(1)" - line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1344, "else" - line 409, "pan.___", state 1347, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 413, "pan.___", state 1356, "(1)" - line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1357, "else" - line 413, "pan.___", state 1360, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 411, "pan.___", state 1366, "((i<1))" - line 411, "pan.___", state 1366, "((i>=1))" - line 418, "pan.___", state 1373, "(1)" - line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1374, "else" - line 418, "pan.___", state 1377, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1480, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1493, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 702, "pan.___", state 1520, "-end-" - (144 of 1520 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 125 seconds -pan: rate 114108.44 states/second -pan: avg transition delay 8.8279e-07 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input deleted file mode 100644 index ccf5f5c..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_RMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 1e5e132..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1777 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2435 -2:4:2387 -3:4:2390 -4:4:2390 -5:4:2393 -6:4:2401 -7:4:2401 -8:4:2404 -9:4:2410 -10:4:2414 -11:4:2414 -12:4:2417 -13:4:2425 -14:4:2429 -15:4:2430 -16:0:2435 -17:4:2432 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-1732:0:2435 -1733:2:654 -1734:2:658 -1735:2:659 -1736:2:667 -1737:2:668 -1738:2:672 -1739:2:673 -1740:2:681 -1741:2:686 -1742:2:690 -1743:2:691 -1744:2:698 -1745:2:699 -1746:2:710 -1747:2:711 -1748:2:712 -1749:2:723 -1750:2:735 -1751:2:736 -1752:0:2435 -1753:3:2380 -1754:0:2435 -1755:2:741 -1756:0:2435 -1757:3:2381 -1758:0:2435 -1759:2:750 -1760:0:2435 -1761:3:2380 -1762:0:2435 -1763:2:753 -1764:0:2435 -1765:3:2381 -1766:0:2435 -1767:2:758 -1768:0:2435 -1769:3:2380 -1770:0:2435 -1771:2:759 -1772:0:2433 -1773:3:2381 -1774:0:2439 -1775:0:2435 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.define b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.log deleted file mode 100644 index 0423ec5..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.log +++ /dev/null @@ -1,320 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 10656 States= 1e+06 Transitions= 8.86e+06 Memory= 534.807 t= 7.38 R= 1e+05 -Depth= 35214 States= 2e+06 Transitions= 1.82e+07 Memory= 603.557 t= 15.5 R= 1e+05 -Depth= 35214 States= 3e+06 Transitions= 2.73e+07 Memory= 672.209 t= 23.8 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 35214 States= 4e+06 Transitions= 4.08e+07 Memory= 771.885 t= 35.9 R= 1e+05 -pan: claim violated! (at depth 1650) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 35214, errors: 1 - 4154272 states, stored - 38595853 states, matched - 42750125 transitions (= stored+matched) -1.4058824e+08 atomic steps -hash conflicts: 21492325 (resolved) - -Stats on memory usage (in Megabytes): - 364.488 equivalent memory usage for states (stored*(State-vector + overhead)) - 292.863 actual memory usage for states (compression: 80.35%) - state-vector as stored = 46 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 782.529 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 227, "(1)" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 366, "(1)" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (19 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 330, "(1)" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (18 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 401, "pan.___", state 134, "((i<1))" - line 401, "pan.___", state 134, "((i>=1))" - line 409, "pan.___", state 153, "(1)" - line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 154, "else" - line 409, "pan.___", state 157, "(1)" - line 409, "pan.___", state 158, "(1)" - line 409, "pan.___", state 158, "(1)" - line 413, "pan.___", state 166, "(1)" - line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 167, "else" - line 413, "pan.___", state 170, "(1)" - line 413, "pan.___", state 171, "(1)" - line 413, "pan.___", state 171, "(1)" - line 411, "pan.___", state 176, "((i<1))" - line 411, "pan.___", state 176, "((i>=1))" - line 418, "pan.___", state 183, "(1)" - line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 184, "else" - line 418, "pan.___", state 187, "(1)" - line 418, "pan.___", state 188, "(1)" - line 418, "pan.___", state 188, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 369, "pan.___", state 193, "(1)" - line 652, "pan.___", state 199, "(1)" - line 646, "pan.___", state 202, "((write_lock==0))" - line 646, "pan.___", state 202, "else" - line 644, "pan.___", state 203, "(1)" - line 160, "pan.___", state 209, "(1)" - line 164, "pan.___", state 217, "(1)" - line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 164, "pan.___", state 218, "else" - line 162, "pan.___", state 223, "((j<1))" - line 162, "pan.___", state 223, "((j>=1))" - line 168, "pan.___", state 229, "(1)" - line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 168, "pan.___", state 230, "else" - line 160, "pan.___", state 241, "(1)" - line 168, "pan.___", state 261, "(1)" - line 160, "pan.___", state 277, "(1)" - line 164, "pan.___", state 285, "(1)" - line 168, "pan.___", state 297, "(1)" - line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 356, "(1)" - line 413, "pan.___", state 369, "(1)" - line 418, "pan.___", state 386, "(1)" - line 399, "pan.___", state 405, "(1)" - line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 461, "(1)" - line 418, "pan.___", state 478, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 164, "pan.___", state 594, "(1)" - line 168, "pan.___", state 606, "(1)" - line 160, "pan.___", state 618, "(1)" - line 168, "pan.___", state 638, "(1)" - line 164, "pan.___", state 662, "(1)" - line 168, "pan.___", state 674, "(1)" - line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 698, "(1)" - line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 699, "else" - line 399, "pan.___", state 702, "(1)" - line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 712, "(1)" - line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 713, "else" - line 403, "pan.___", state 716, "(1)" - line 403, "pan.___", state 717, "(1)" - line 403, "pan.___", state 717, "(1)" - line 401, "pan.___", state 722, "((i<1))" - line 401, "pan.___", state 722, "((i>=1))" - line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 741, "(1)" - line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 742, "else" - line 409, "pan.___", state 745, "(1)" - line 409, "pan.___", state 746, "(1)" - line 409, "pan.___", state 746, "(1)" - line 413, "pan.___", state 754, "(1)" - line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 755, "else" - line 413, "pan.___", state 758, "(1)" - line 413, "pan.___", state 759, "(1)" - line 413, "pan.___", state 759, "(1)" - line 411, "pan.___", state 764, "((i<1))" - line 411, "pan.___", state 764, "((i>=1))" - line 418, "pan.___", state 771, "(1)" - line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 772, "else" - line 418, "pan.___", state 775, "(1)" - line 418, "pan.___", state 776, "(1)" - line 418, "pan.___", state 776, "(1)" - line 420, "pan.___", state 779, "(1)" - line 420, "pan.___", state 779, "(1)" - line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 854, "(1)" - line 418, "pan.___", state 871, "(1)" - line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 944, "(1)" - line 418, "pan.___", state 961, "(1)" - line 399, "pan.___", state 980, "(1)" - line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1036, "(1)" - line 418, "pan.___", state 1053, "(1)" - line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1129, "(1)" - line 418, "pan.___", state 1146, "(1)" - line 164, "pan.___", state 1169, "(1)" - line 168, "pan.___", state 1181, "(1)" - line 160, "pan.___", state 1193, "(1)" - line 168, "pan.___", state 1213, "(1)" - line 164, "pan.___", state 1237, "(1)" - line 168, "pan.___", state 1249, "(1)" - line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1273, "(1)" - line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1274, "else" - line 399, "pan.___", state 1277, "(1)" - line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1287, "(1)" - line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1288, "else" - line 403, "pan.___", state 1291, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 401, "pan.___", state 1297, "((i<1))" - line 401, "pan.___", state 1297, "((i>=1))" - line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1316, "(1)" - line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1317, "else" - line 409, "pan.___", state 1320, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 413, "pan.___", state 1329, "(1)" - line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1330, "else" - line 413, "pan.___", state 1333, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 411, "pan.___", state 1339, "((i<1))" - line 411, "pan.___", state 1339, "((i>=1))" - line 418, "pan.___", state 1346, "(1)" - line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1347, "else" - line 418, "pan.___", state 1350, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 164, "pan.___", state 1379, "(1)" - line 168, "pan.___", state 1391, "(1)" - line 160, "pan.___", state 1403, "(1)" - line 168, "pan.___", state 1423, "(1)" - line 164, "pan.___", state 1447, "(1)" - line 168, "pan.___", state 1459, "(1)" - line 702, "pan.___", state 1484, "-end-" - (160 of 1484 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 37.6 seconds -pan: rate 110515.35 states/second -pan: avg transition delay 8.793e-07 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input deleted file mode 100644 index d5d174d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index f2ce974..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1653 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2399 -2:4:2351 -3:4:2354 -4:4:2354 -5:4:2357 -6:4:2365 -7:4:2365 -8:4:2368 -9:4:2374 -10:4:2378 -11:4:2378 -12:4:2381 -13:4:2389 -14:4:2393 -15:4:2394 -16:0:2399 -17:4:2396 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a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.define b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.log deleted file mode 100644 index 5d7d35c..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.log +++ /dev/null @@ -1,217 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 8352 States= 1e+06 Transitions= 1.05e+07 Memory= 534.807 t= 8.93 R= 1e+05 -pan: claim violated! (at depth 1352) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 8352, errors: 1 - 1456373 states, stored - 13442538 states, matched - 14898911 transitions (= stored+matched) - 50580660 atomic steps -hash conflicts: 5166006 (resolved) - -Stats on memory usage (in Megabytes): - 127.779 equivalent memory usage for states (stored*(State-vector + overhead)) - 100.443 actual memory usage for states (compression: 78.61%) - state-vector as stored = 44 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 566.154 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 370, "(1)" - line 164, "pan.___", state 378, "(1)" - line 168, "pan.___", state 390, "(1)" - line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 449, "(1)" - line 413, "pan.___", state 462, "(1)" - line 418, "pan.___", state 479, "(1)" - line 399, "pan.___", state 498, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 647, "(1)" - line 418, "pan.___", state 664, "(1)" - line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 710, "(1)" - line 164, "pan.___", state 718, "(1)" - line 168, "pan.___", state 730, "(1)" - line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 840, "(1)" - line 164, "pan.___", state 848, "(1)" - line 168, "pan.___", state 860, "(1)" - line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 884, "(1)" - line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 885, "else" - line 399, "pan.___", state 888, "(1)" - line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 898, "(1)" - line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 899, "else" - line 403, "pan.___", state 902, "(1)" - line 403, "pan.___", state 903, "(1)" - line 403, "pan.___", state 903, "(1)" - line 401, "pan.___", state 908, "((i<1))" - line 401, "pan.___", state 908, "((i>=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1013, "(1)" - line 164, "pan.___", state 1021, "(1)" - line 168, "pan.___", state 1033, "(1)" - line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1133, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1143, "(1)" - line 164, "pan.___", state 1151, "(1)" - line 168, "pan.___", state 1163, "(1)" - line 702, "pan.___", state 1188, "-end-" - (100 of 1188 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 12.8 seconds -pan: rate 113424.69 states/second -pan: avg transition delay 8.6181e-07 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input deleted file mode 100644 index 103464e..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define SINGLE_FLIP - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index e81c46c..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1355 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2103 -2:4:2055 -3:4:2058 -4:4:2058 -5:4:2061 -6:4:2069 -7:4:2069 -8:4:2072 -9:4:2078 -10:4:2082 -11:4:2082 -12:4:2085 -13:4:2093 -14:4:2097 -15:4:2098 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-1346:0:2103 -1347:3:2048 -1348:0:2103 -1349:2:759 -1350:0:2101 -1351:3:2049 -1352:0:2107 -1353:3:1181 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress.ltl b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.define b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.log deleted file mode 100644 index e3ec127..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.log +++ /dev/null @@ -1,506 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 1803: Claim reached state 9 (line 748) -Depth= 5838 States= 1e+06 Transitions= 1.06e+07 Memory= 494.865 t= 9.24 R= 1e+05 -Depth= 5838 States= 2e+06 Transitions= 1.97e+07 Memory= 532.658 t= 17.7 R= 1e+05 -Depth= 5838 States= 3e+06 Transitions= 3.15e+07 Memory= 555.315 t= 28.4 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 6855 States= 4e+06 Transitions= 4.32e+07 Memory= 613.096 t= 39.1 R= 1e+05 -Depth= 9059 States= 5e+06 Transitions= 5.48e+07 Memory= 642.295 t= 49.5 R= 1e+05 -Depth= 9059 States= 6e+06 Transitions= 6.91e+07 Memory= 672.178 t= 62.5 R= 1e+05 -Depth= 9059 States= 7e+06 Transitions= 7.99e+07 Memory= 706.455 t= 72.5 R= 1e+05 -Depth= 9059 States= 8e+06 Transitions= 9.23e+07 Memory= 735.752 t= 84 R= 1e+05 -Depth= 9059 States= 9e+06 Transitions= 1.04e+08 Memory= 766.318 t= 94.5 R= 1e+05 -pan: resizing hashtable to -w24.. done -Depth= 9059 States= 1e+07 Transitions= 1.16e+08 Memory= 920.002 t= 106 R= 9e+04 -Depth= 9059 States= 1.1e+07 Transitions= 1.3e+08 Memory= 945.002 t= 119 R= 9e+04 -Depth= 9059 States= 1.2e+07 Transitions= 1.54e+08 Memory= 967.756 t= 140 R= 9e+04 -Depth= 9059 States= 1.3e+07 Transitions= 1.72e+08 Memory= 995.002 t= 157 R= 8e+04 -Depth= 9059 States= 1.4e+07 Transitions= 1.92e+08 Memory= 1022.736 t= 175 R= 8e+04 -Depth= 9059 States= 1.5e+07 Transitions= 2.1e+08 Memory= 1050.080 t= 191 R= 8e+04 -Depth= 9059 States= 1.6e+07 Transitions= 2.22e+08 Memory= 1082.502 t= 203 R= 8e+04 -Depth= 9059 States= 1.7e+07 Transitions= 2.41e+08 Memory= 1108.479 t= 219 R= 8e+04 -Depth= 9059 States= 1.8e+07 Transitions= 2.58e+08 Memory= 1134.455 t= 235 R= 8e+04 -Depth= 9059 States= 1.9e+07 Transitions= 2.7e+08 Memory= 1164.533 t= 246 R= 8e+04 -Depth= 9059 States= 2e+07 Transitions= 2.83e+08 Memory= 1193.830 t= 258 R= 8e+04 -Depth= 9059 States= 2.1e+07 Transitions= 3.03e+08 Memory= 1219.026 t= 276 R= 8e+04 -Depth= 9059 States= 2.2e+07 Transitions= 3.19e+08 Memory= 1248.420 t= 291 R= 8e+04 -Depth= 9059 States= 2.3e+07 Transitions= 3.42e+08 Memory= 1271.858 t= 312 R= 7e+04 -Depth= 9059 States= 2.4e+07 Transitions= 3.6e+08 Memory= 1298.908 t= 328 R= 7e+04 -Depth= 9059 States= 2.5e+07 Transitions= 3.84e+08 Memory= 1323.127 t= 350 R= 7e+04 -Depth= 9059 States= 2.6e+07 Transitions= 4e+08 Memory= 1348.518 t= 365 R= 7e+04 -Depth= 9059 States= 2.7e+07 Transitions= 4.16e+08 Memory= 1379.865 t= 380 R= 7e+04 -Depth= 9059 States= 2.8e+07 Transitions= 4.26e+08 Memory= 1411.115 t= 389 R= 7e+04 -Depth= 9059 States= 2.9e+07 Transitions= 4.42e+08 Memory= 1439.631 t= 404 R= 7e+04 -Depth= 9059 States= 3e+07 Transitions= 4.64e+08 Memory= 1462.385 t= 423 R= 7e+04 -Depth= 9059 States= 3.1e+07 Transitions= 4.82e+08 Memory= 1490.998 t= 439 R= 7e+04 -Depth= 9059 States= 3.2e+07 Transitions= 4.99e+08 Memory= 1519.514 t= 456 R= 7e+04 -Depth= 9059 States= 3.3e+07 Transitions= 5.18e+08 Memory= 1545.393 t= 473 R= 7e+04 -Depth= 9059 States= 3.4e+07 Transitions= 5.33e+08 Memory= 1578.108 t= 486 R= 7e+04 -pan: resizing hashtable to -w26.. done -Depth= 9059 States= 3.5e+07 Transitions= 5.49e+08 Memory= 2098.994 t= 504 R= 7e+04 -Depth= 9059 States= 3.6e+07 Transitions= 5.74e+08 Memory= 2121.651 t= 528 R= 7e+04 -Depth= 9059 States= 3.7e+07 Transitions= 5.96e+08 Memory= 2147.334 t= 547 R= 7e+04 -Depth= 9059 States= 3.8e+07 Transitions= 6.17e+08 Memory= 2170.186 t= 567 R= 7e+04 -Depth= 9059 States= 3.9e+07 Transitions= 6.3e+08 Memory= 2199.776 t= 578 R= 7e+04 -Depth= 9059 States= 4e+07 Transitions= 6.53e+08 Memory= 2225.459 t= 599 R= 7e+04 -Depth= 9059 States= 4.1e+07 Transitions= 6.69e+08 Memory= 2250.361 t= 614 R= 7e+04 -Depth= 9059 States= 4.2e+07 Transitions= 6.85e+08 Memory= 2279.268 t= 628 R= 7e+04 -Depth= 9059 States= 4.3e+07 Transitions= 7.03e+08 Memory= 2304.463 t= 644 R= 7e+04 -Depth= 9059 States= 4.4e+07 Transitions= 7.13e+08 Memory= 2338.252 t= 654 R= 7e+04 -Depth= 9059 States= 4.5e+07 Transitions= 7.25e+08 Memory= 2366.768 t= 665 R= 7e+04 -Depth= 9059 States= 4.6e+07 Transitions= 7.41e+08 Memory= 2393.330 t= 679 R= 7e+04 -Depth= 9059 States= 4.7e+07 Transitions= 7.57e+08 Memory= 2420.381 t= 694 R= 7e+04 -Depth= 9059 States= 4.8e+07 Transitions= 7.72e+08 Memory= 2447.041 t= 708 R= 7e+04 -Depth= 9059 States= 4.9e+07 Transitions= 7.88e+08 Memory= 2476.143 t= 722 R= 7e+04 -Depth= 9059 States= 5e+07 Transitions= 8.04e+08 Memory= 2501.045 t= 737 R= 7e+04 -Depth= 9059 States= 5.1e+07 Transitions= 8.2e+08 Memory= 2530.440 t= 752 R= 7e+04 -Depth= 9059 States= 5.2e+07 Transitions= 8.37e+08 Memory= 2554.854 t= 766 R= 7e+04 -Depth= 9059 States= 5.3e+07 Transitions= 8.5e+08 Memory= 2583.467 t= 779 R= 7e+04 -Depth= 9059 States= 5.4e+07 Transitions= 8.66e+08 Memory= 2611.299 t= 794 R= 7e+04 -Depth= 9059 States= 5.5e+07 Transitions= 8.79e+08 Memory= 2640.791 t= 805 R= 7e+04 -Depth= 9059 States= 5.6e+07 Transitions= 8.9e+08 Memory= 2672.139 t= 815 R= 7e+04 -Depth= 9059 States= 5.7e+07 Transitions= 9.05e+08 Memory= 2702.705 t= 829 R= 7e+04 -Depth= 9059 States= 5.8e+07 Transitions= 9.22e+08 Memory= 2727.998 t= 845 R= 7e+04 -Depth= 9059 States= 5.9e+07 Transitions= 9.38e+08 Memory= 2754.463 t= 859 R= 7e+04 -Depth= 9059 States= 6e+07 Transitions= 9.49e+08 Memory= 2789.717 t= 870 R= 7e+04 -Depth= 9059 States= 6.1e+07 Transitions= 9.62e+08 Memory= 2817.744 t= 881 R= 7e+04 -Depth= 9059 States= 6.2e+07 Transitions= 9.79e+08 Memory= 2838.447 t= 896 R= 7e+04 -Depth= 9059 States= 6.3e+07 Transitions= 1e+09 Memory= 2863.154 t= 919 R= 7e+04 -Depth= 9059 States= 6.4e+07 Transitions= 1.02e+09 Memory= 2889.131 t= 936 R= 7e+04 -Depth= 9059 States= 6.5e+07 Transitions= 1.04e+09 Memory= 2919.502 t= 952 R= 7e+04 -Depth= 9059 States= 6.6e+07 Transitions= 1.06e+09 Memory= 2943.916 t= 968 R= 7e+04 -Depth= 9059 States= 6.7e+07 Transitions= 1.07e+09 Memory= 2978.975 t= 979 R= 7e+04 -Depth= 9059 States= 6.8e+07 Transitions= 1.09e+09 Memory= 3003.877 t= 996 R= 7e+04 -Depth= 9059 States= 6.9e+07 Transitions= 1.11e+09 Memory= 3028.584 t= 1.01e+03 R= 7e+04 -Depth= 9059 States= 7e+07 Transitions= 1.12e+09 Memory= 3058.174 t= 1.02e+03 R= 7e+04 -Depth= 9059 States= 7.1e+07 Transitions= 1.13e+09 Memory= 3088.350 t= 1.04e+03 R= 7e+04 -Depth= 9059 States= 7.2e+07 Transitions= 1.15e+09 Memory= 3113.350 t= 1.05e+03 R= 7e+04 -Depth= 9059 States= 7.3e+07 Transitions= 1.17e+09 Memory= 3142.158 t= 1.07e+03 R= 7e+04 -Depth= 9059 States= 7.4e+07 Transitions= 1.19e+09 Memory= 3166.279 t= 1.09e+03 R= 7e+04 -Depth= 9059 States= 7.5e+07 Transitions= 1.21e+09 Memory= 3192.744 t= 1.11e+03 R= 7e+04 -Depth= 9059 States= 7.6e+07 Transitions= 1.23e+09 Memory= 3217.256 t= 1.13e+03 R= 7e+04 -Depth= 9059 States= 7.7e+07 Transitions= 1.25e+09 Memory= 3242.549 t= 1.14e+03 R= 7e+04 -Depth= 9059 States= 7.8e+07 Transitions= 1.26e+09 Memory= 3273.115 t= 1.16e+03 R= 7e+04 -Depth= 9059 States= 7.9e+07 Transitions= 1.27e+09 Memory= 3303.975 t= 1.17e+03 R= 7e+04 -Depth= 9059 States= 8e+07 Transitions= 1.29e+09 Memory= 3334.541 t= 1.18e+03 R= 7e+04 -Depth= 9059 States= 8.1e+07 Transitions= 1.31e+09 Memory= 3356.221 t= 1.2e+03 R= 7e+04 -Depth= 9059 States= 8.2e+07 Transitions= 1.33e+09 Memory= 3385.127 t= 1.22e+03 R= 7e+04 -Depth= 9059 States= 8.3e+07 Transitions= 1.35e+09 Memory= 3412.959 t= 1.23e+03 R= 7e+04 -Depth= 9059 States= 8.4e+07 Transitions= 1.37e+09 Memory= 3438.936 t= 1.25e+03 R= 7e+04 -Depth= 9059 States= 8.5e+07 Transitions= 1.38e+09 Memory= 3471.455 t= 1.26e+03 R= 7e+04 -Depth= 9059 States= 8.6e+07 Transitions= 1.4e+09 Memory= 3498.115 t= 1.28e+03 R= 7e+04 -Depth= 9059 States= 8.7e+07 Transitions= 1.42e+09 Memory= 3519.014 t= 1.3e+03 R= 7e+04 -Depth= 9059 States= 8.8e+07 Transitions= 1.44e+09 Memory= 3546.162 t= 1.32e+03 R= 7e+04 -Depth= 9059 States= 8.9e+07 Transitions= 1.46e+09 Memory= 3567.842 t= 1.34e+03 R= 7e+04 -Depth= 9059 States= 9e+07 Transitions= 1.48e+09 Memory= 3598.799 t= 1.35e+03 R= 7e+04 -Depth= 9059 States= 9.1e+07 Transitions= 1.5e+09 Memory= 3622.920 t= 1.37e+03 R= 7e+04 -Depth= 9059 States= 9.2e+07 Transitions= 1.52e+09 Memory= 3648.701 t= 1.39e+03 R= 7e+04 -Depth= 9059 States= 9.3e+07 Transitions= 1.53e+09 Memory= 3676.045 t= 1.4e+03 R= 7e+04 -Depth= 9059 States= 9.4e+07 Transitions= 1.55e+09 Memory= 3702.412 t= 1.42e+03 R= 7e+04 -Depth= 9059 States= 9.5e+07 Transitions= 1.56e+09 Memory= 3735.713 t= 1.43e+03 R= 7e+04 -Depth= 9059 States= 9.6e+07 Transitions= 1.57e+09 Memory= 3764.522 t= 1.44e+03 R= 7e+04 -Depth= 9059 States= 9.7e+07 Transitions= 1.59e+09 Memory= 3790.693 t= 1.45e+03 R= 7e+04 -Depth= 9059 States= 9.8e+07 Transitions= 1.61e+09 Memory= 3817.940 t= 1.47e+03 R= 7e+04 -Depth= 9059 States= 9.9e+07 Transitions= 1.62e+09 Memory= 3845.283 t= 1.48e+03 R= 7e+04 -Depth= 9059 States= 1e+08 Transitions= 1.64e+09 Memory= 3873.213 t= 1.5e+03 R= 7e+04 -Depth= 9059 States= 1.01e+08 Transitions= 1.65e+09 Memory= 3897.920 t= 1.51e+03 R= 7e+04 -Depth= 9059 States= 1.02e+08 Transitions= 1.67e+09 Memory= 3926.631 t= 1.53e+03 R= 7e+04 -Depth= 9059 States= 1.03e+08 Transitions= 1.68e+09 Memory= 3952.315 t= 1.54e+03 R= 7e+04 -Depth= 9059 States= 1.04e+08 Transitions= 1.7e+09 Memory= 3981.026 t= 1.56e+03 R= 7e+04 -Depth= 9059 States= 1.05e+08 Transitions= 1.71e+09 Memory= 4010.029 t= 1.57e+03 R= 7e+04 -Depth= 9059 States= 1.06e+08 Transitions= 1.73e+09 Memory= 4038.838 t= 1.58e+03 R= 7e+04 -Depth= 9059 States= 1.07e+08 Transitions= 1.74e+09 Memory= 4070.381 t= 1.59e+03 R= 7e+04 -Depth= 9059 States= 1.08e+08 Transitions= 1.75e+09 Memory= 4099.385 t= 1.61e+03 R= 7e+04 -Depth= 9059 States= 1.09e+08 Transitions= 1.77e+09 Memory= 4126.338 t= 1.62e+03 R= 7e+04 -Depth= 9059 States= 1.1e+08 Transitions= 1.79e+09 Memory= 4151.924 t= 1.64e+03 R= 7e+04 -Depth= 9059 States= 1.11e+08 Transitions= 1.8e+09 Memory= 4187.276 t= 1.65e+03 R= 7e+04 -Depth= 9059 States= 1.12e+08 Transitions= 1.81e+09 Memory= 4214.326 t= 1.66e+03 R= 7e+04 -Depth= 9059 States= 1.13e+08 Transitions= 1.83e+09 Memory= 4237.471 t= 1.67e+03 R= 7e+04 -Depth= 9059 States= 1.14e+08 Transitions= 1.85e+09 Memory= 4261.104 t= 1.7e+03 R= 7e+04 -Depth= 9059 States= 1.15e+08 Transitions= 1.87e+09 Memory= 4286.690 t= 1.71e+03 R= 7e+04 -Depth= 9059 States= 1.16e+08 Transitions= 1.89e+09 Memory= 4314.619 t= 1.73e+03 R= 7e+04 -Depth= 9059 States= 1.17e+08 Transitions= 1.91e+09 Memory= 4341.768 t= 1.75e+03 R= 7e+04 -Depth= 9059 States= 1.18e+08 Transitions= 1.92e+09 Memory= 4375.166 t= 1.76e+03 R= 7e+04 -Depth= 9059 States= 1.19e+08 Transitions= 1.94e+09 Memory= 4401.338 t= 1.78e+03 R= 7e+04 -Depth= 9059 States= 1.2e+08 Transitions= 1.95e+09 Memory= 4426.436 t= 1.79e+03 R= 7e+04 -Depth= 9059 States= 1.21e+08 Transitions= 1.97e+09 Memory= 4456.807 t= 1.8e+03 R= 7e+04 -Depth= 9059 States= 1.22e+08 Transitions= 1.98e+09 Memory= 4486.592 t= 1.82e+03 R= 7e+04 -Depth= 9059 States= 1.23e+08 Transitions= 2e+09 Memory= 4511.787 t= 1.83e+03 R= 7e+04 -Depth= 9059 States= 1.24e+08 Transitions= 2.02e+09 Memory= 4540.108 t= 1.85e+03 R= 7e+04 -Depth= 9059 States= 1.25e+08 Transitions= 2.04e+09 Memory= 4564.033 t= 1.87e+03 R= 7e+04 -Depth= 9059 States= 1.26e+08 Transitions= 2.06e+09 Memory= 4591.865 t= 1.89e+03 R= 7e+04 -Depth= 9059 States= 1.27e+08 Transitions= 2.08e+09 Memory= 4615.889 t= 1.91e+03 R= 7e+04 -Depth= 9059 States= 1.28e+08 Transitions= 2.1e+09 Memory= 4640.303 t= 1.92e+03 R= 7e+04 -Depth= 9059 States= 1.29e+08 Transitions= 2.11e+09 Memory= 4670.479 t= 1.94e+03 R= 7e+04 -Depth= 9059 States= 1.3e+08 Transitions= 2.12e+09 Memory= 4702.998 t= 1.95e+03 R= 7e+04 -Depth= 9059 States= 1.31e+08 Transitions= 2.14e+09 Memory= 4732.393 t= 1.96e+03 R= 7e+04 -Depth= 9059 States= 1.32e+08 Transitions= 2.16e+09 Memory= 4754.756 t= 1.98e+03 R= 7e+04 -Depth= 9059 States= 1.33e+08 Transitions= 2.18e+09 Memory= 4783.174 t= 2e+03 R= 7e+04 -Depth= 9059 States= 1.34e+08 Transitions= 2.19e+09 Memory= 4810.518 t= 2.01e+03 R= 7e+04 -Depth= 9059 States= 1.35e+08 Transitions= 2.21e+09 Memory= 4837.568 t= 2.03e+03 R= 7e+04 -pan: resizing hashtable to -w28.. done -Depth= 9059 States= 1.36e+08 Transitions= 2.23e+09 Memory= 6885.568 t= 2.06e+03 R= 7e+04 -Depth= 9059 States= 1.37e+08 Transitions= 2.24e+09 Memory= 6885.568 t= 2.08e+03 R= 7e+04 -Depth= 9059 States= 1.38e+08 Transitions= 2.27e+09 Memory= 6900.412 t= 2.1e+03 R= 7e+04 -Depth= 9059 States= 1.39e+08 Transitions= 2.29e+09 Memory= 6927.658 t= 2.12e+03 R= 7e+04 -Depth= 9059 States= 1.4e+08 Transitions= 2.31e+09 Memory= 6950.315 t= 2.14e+03 R= 7e+04 -Depth= 9059 States= 1.41e+08 Transitions= 2.33e+09 Memory= 6981.858 t= 2.15e+03 R= 7e+04 -Depth= 9059 States= 1.42e+08 Transitions= 2.35e+09 Memory= 7005.295 t= 2.17e+03 R= 7e+04 -Depth= 9059 States= 1.43e+08 Transitions= 2.36e+09 Memory= 7031.076 t= 2.18e+03 R= 7e+04 -Depth= 9059 States= 1.44e+08 Transitions= 2.38e+09 Memory= 7056.955 t= 2.2e+03 R= 7e+04 -Depth= 9059 States= 1.45e+08 Transitions= 2.4e+09 Memory= 7084.494 t= 2.22e+03 R= 7e+04 -Depth= 9059 States= 1.46e+08 Transitions= 2.41e+09 Memory= 7115.744 t= 2.23e+03 R= 7e+04 -Depth= 9059 States= 1.47e+08 Transitions= 2.42e+09 Memory= 7146.604 t= 2.24e+03 R= 7e+04 -Depth= 9059 States= 1.48e+08 Transitions= 2.44e+09 Memory= 7172.287 t= 2.25e+03 R= 7e+04 -Depth= 9059 States= 1.49e+08 Transitions= 2.45e+09 Memory= 7200.315 t= 2.26e+03 R= 7e+04 -Depth= 9059 States= 1.5e+08 Transitions= 2.47e+09 Memory= 7226.389 t= 2.28e+03 R= 7e+04 -Depth= 9059 States= 1.51e+08 Transitions= 2.48e+09 Memory= 7253.733 t= 2.29e+03 R= 7e+04 -Depth= 9059 States= 1.52e+08 Transitions= 2.5e+09 Memory= 7279.709 t= 2.31e+03 R= 7e+04 -Depth= 9059 States= 1.53e+08 Transitions= 2.52e+09 Memory= 7309.104 t= 2.32e+03 R= 7e+04 -Depth= 9059 States= 1.54e+08 Transitions= 2.53e+09 Memory= 7334.592 t= 2.34e+03 R= 7e+04 -Depth= 9059 States= 1.55e+08 Transitions= 2.55e+09 Memory= 7362.229 t= 2.35e+03 R= 7e+04 -Depth= 9059 States= 1.56e+08 Transitions= 2.56e+09 Memory= 7391.135 t= 2.36e+03 R= 7e+04 -Depth= 9059 States= 1.57e+08 Transitions= 2.57e+09 Memory= 7420.822 t= 2.38e+03 R= 7e+04 -Depth= 9059 States= 1.58e+08 Transitions= 2.59e+09 Memory= 7452.854 t= 2.39e+03 R= 7e+04 -Depth= 9059 States= 1.59e+08 Transitions= 2.6e+09 Memory= 7481.760 t= 2.4e+03 R= 7e+04 -Depth= 9059 States= 1.6e+08 Transitions= 2.62e+09 Memory= 7509.299 t= 2.41e+03 R= 7e+04 -Depth= 9059 States= 1.61e+08 Transitions= 2.63e+09 Memory= 7534.201 t= 2.43e+03 R= 7e+04 -Depth= 9059 States= 1.62e+08 Transitions= 2.65e+09 Memory= 7567.600 t= 2.44e+03 R= 7e+04 -Depth= 9059 States= 1.63e+08 Transitions= 2.66e+09 Memory= 7594.846 t= 2.45e+03 R= 7e+04 -Depth= 9059 States= 1.64e+08 Transitions= 2.67e+09 Memory= 7619.455 t= 2.47e+03 R= 7e+04 -Depth= 9059 States= 1.65e+08 Transitions= 2.7e+09 Memory= 7642.502 t= 2.49e+03 R= 7e+04 -Depth= 9059 States= 1.66e+08 Transitions= 2.72e+09 Memory= 7669.260 t= 2.51e+03 R= 7e+04 -Depth= 9059 States= 1.67e+08 Transitions= 2.73e+09 Memory= 7696.799 t= 2.52e+03 R= 7e+04 -Depth= 9059 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7723.850 t= 2.54e+03 R= 7e+04 -Depth= 9059 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7757.053 t= 2.55e+03 R= 7e+04 -Depth= 9059 States= 1.7e+08 Transitions= 2.78e+09 Memory= 7782.346 t= 2.57e+03 R= 7e+04 -Depth= 9059 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7808.908 t= 2.58e+03 R= 7e+04 -Depth= 9059 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7838.791 t= 2.59e+03 R= 7e+04 -Depth= 9059 States= 1.73e+08 Transitions= 2.83e+09 Memory= 7867.893 t= 2.61e+03 R= 7e+04 -Depth= 9059 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7892.990 t= 2.62e+03 R= 7e+04 -Depth= 9059 States= 1.75e+08 Transitions= 2.86e+09 Memory= 7922.190 t= 2.64e+03 R= 7e+04 -Depth= 9059 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7945.627 t= 2.66e+03 R= 7e+04 -Depth= 9059 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7973.947 t= 2.68e+03 R= 7e+04 -Depth= 9059 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7997.483 t= 2.7e+03 R= 7e+04 -Depth= 9059 States= 1.79e+08 Transitions= 2.94e+09 Memory= 8020.920 t= 2.71e+03 R= 7e+04 -Depth= 9059 States= 1.8e+08 Transitions= 2.96e+09 Memory= 8050.412 t= 2.73e+03 R= 7e+04 -Depth= 9059 States= 1.81e+08 Transitions= 2.97e+09 Memory= 8085.666 t= 2.74e+03 R= 7e+04 -Depth= 9059 States= 1.82e+08 Transitions= 2.98e+09 Memory= 8114.279 t= 2.75e+03 R= 7e+04 -Depth= 9059 States= 1.83e+08 Transitions= 3e+09 Memory= 8137.131 t= 2.77e+03 R= 7e+04 -Depth= 9059 States= 1.84e+08 Transitions= 3.02e+09 Memory= 8165.451 t= 2.79e+03 R= 7e+04 -Depth= 9059 States= 1.85e+08 Transitions= 3.04e+09 Memory= 8193.186 t= 2.8e+03 R= 7e+04 -Depth= 9059 States= 1.86e+08 Transitions= 3.06e+09 Memory= 8218.674 t= 2.82e+03 R= 7e+04 -Depth= 9059 States= 1.87e+08 Transitions= 3.08e+09 Memory= 8255.100 t= 2.83e+03 R= 7e+04 -Depth= 9059 States= 1.88e+08 Transitions= 3.09e+09 Memory= 8279.221 t= 2.85e+03 R= 7e+04 -Depth= 9059 States= 1.89e+08 Transitions= 3.12e+09 Memory= 8298.264 t= 2.87e+03 R= 7e+04 -Depth= 9059 States= 1.9e+08 Transitions= 3.14e+09 Memory= 8325.998 t= 2.89e+03 R= 7e+04 -Depth= 9059 States= 1.91e+08 Transitions= 3.16e+09 Memory= 8349.338 t= 2.91e+03 R= 7e+04 -Depth= 9059 States= 1.92e+08 Transitions= 3.17e+09 Memory= 8379.221 t= 2.92e+03 R= 7e+04 -Depth= 9059 States= 1.93e+08 Transitions= 3.19e+09 Memory= 8403.440 t= 2.94e+03 R= 7e+04 -Depth= 9059 States= 1.94e+08 Transitions= 3.21e+09 Memory= 8430.100 t= 2.96e+03 R= 7e+04 -Depth= 9059 States= 1.95e+08 Transitions= 3.23e+09 Memory= 8455.295 t= 2.97e+03 R= 7e+04 -Depth= 9059 States= 1.96e+08 Transitions= 3.25e+09 Memory= 8482.932 t= 2.99e+03 R= 7e+04 -Depth= 9059 States= 1.97e+08 Transitions= 3.26e+09 Memory= 8515.256 t= 3e+03 R= 7e+04 -Depth= 9059 States= 1.98e+08 Transitions= 3.27e+09 Memory= 8542.502 t= 3.01e+03 R= 7e+04 -Depth= 9059 States= 1.99e+08 Transitions= 3.29e+09 Memory= 8569.260 t= 3.02e+03 R= 7e+04 -Depth= 9059 States= 2e+08 Transitions= 3.3e+09 Memory= 8598.459 t= 3.04e+03 R= 7e+04 -Depth= 9059 States= 2.01e+08 Transitions= 3.32e+09 Memory= 8624.631 t= 3.05e+03 R= 7e+04 -Depth= 9059 States= 2.02e+08 Transitions= 3.33e+09 Memory= 8652.365 t= 3.07e+03 R= 7e+04 -Depth= 9059 States= 2.03e+08 Transitions= 3.35e+09 Memory= 8678.440 t= 3.08e+03 R= 7e+04 -Depth= 9059 States= 2.04e+08 Transitions= 3.36e+09 Memory= 8706.369 t= 3.1e+03 R= 7e+04 -Depth= 9059 States= 2.05e+08 Transitions= 3.38e+09 Memory= 8732.932 t= 3.11e+03 R= 7e+04 -Depth= 9059 States= 2.06e+08 Transitions= 3.39e+09 Memory= 8760.276 t= 3.12e+03 R= 7e+04 -Depth= 9059 States= 2.07e+08 Transitions= 3.41e+09 Memory= 8789.475 t= 3.14e+03 R= 7e+04 -Depth= 9059 States= 2.08e+08 Transitions= 3.42e+09 Memory= 8819.455 t= 3.15e+03 R= 7e+04 -Depth= 9059 States= 2.09e+08 Transitions= 3.43e+09 Memory= 8851.779 t= 3.16e+03 R= 7e+04 -Depth= 9059 States= 2.1e+08 Transitions= 3.45e+09 Memory= 8880.100 t= 3.17e+03 R= 7e+04 -Depth= 9059 States= 2.11e+08 Transitions= 3.46e+09 Memory= 8907.053 t= 3.19e+03 R= 7e+04 -Depth= 9059 States= 2.12e+08 Transitions= 3.48e+09 Memory= 8932.639 t= 3.2e+03 R= 7e+04 -Depth= 9059 States= 2.13e+08 Transitions= 3.49e+09 Memory= 8964.572 t= 3.22e+03 R= 7e+04 -Depth= 9059 States= 2.14e+08 Transitions= 3.51e+09 Memory= 8991.526 t= 3.23e+03 R= 7e+04 -Depth= 9059 States= 2.15e+08 Transitions= 3.52e+09 Memory= 9018.088 t= 3.24e+03 R= 7e+04 -Depth= 9059 States= 2.16e+08 Transitions= 3.54e+09 Memory= 9039.865 t= 3.26e+03 R= 7e+04 -Depth= 9059 States= 2.17e+08 Transitions= 3.56e+09 Memory= 9067.600 t= 3.28e+03 R= 7e+04 -Depth= 9059 States= 2.18e+08 Transitions= 3.58e+09 Memory= 9094.260 t= 3.3e+03 R= 7e+04 -Depth= 9059 States= 2.19e+08 Transitions= 3.6e+09 Memory= 9122.483 t= 3.31e+03 R= 7e+04 -Depth= 9059 States= 2.2e+08 Transitions= 3.61e+09 Memory= 9153.635 t= 3.32e+03 R= 7e+04 -Depth= 9059 States= 2.21e+08 Transitions= 3.63e+09 Memory= 9181.272 t= 3.34e+03 R= 7e+04 -Depth= 9059 States= 2.22e+08 Transitions= 3.65e+09 Memory= 9207.639 t= 3.36e+03 R= 7e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 9059, errors: 0 - 88961904 states, stored (2.22145e+08 visited) -3.4291111e+09 states, matched -3.6512561e+09 transitions (= visited+matched) -1.2885947e+10 atomic steps -hash conflicts: 7.2188776e+08 (resolved) - -Stats on memory usage (in Megabytes): - 7805.343 equivalent memory usage for states (stored*(State-vector + overhead)) - 6706.219 actual memory usage for states (compression: 85.92%) - state-vector as stored = 51 byte + 28 byte overhead - 2048.000 memory used for hash table (-w28) - 457.764 memory used for DFS stack (-m10000000) - 1.122 memory lost to fragmentation - 9210.861 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 370, "(1)" - line 164, "pan.___", state 378, "(1)" - line 168, "pan.___", state 390, "(1)" - line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 449, "(1)" - line 413, "pan.___", state 462, "(1)" - line 418, "pan.___", state 479, "(1)" - line 399, "pan.___", state 498, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 647, "(1)" - line 418, "pan.___", state 664, "(1)" - line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 710, "(1)" - line 164, "pan.___", state 718, "(1)" - line 168, "pan.___", state 730, "(1)" - line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 840, "(1)" - line 164, "pan.___", state 848, "(1)" - line 168, "pan.___", state 860, "(1)" - line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 884, "(1)" - line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 885, "else" - line 399, "pan.___", state 888, "(1)" - line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 898, "(1)" - line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 899, "else" - line 403, "pan.___", state 902, "(1)" - line 403, "pan.___", state 903, "(1)" - line 403, "pan.___", state 903, "(1)" - line 401, "pan.___", state 908, "((i<1))" - line 401, "pan.___", state 908, "((i>=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1508, "(1)" - line 164, "pan.___", state 1516, "(1)" - line 168, "pan.___", state 1528, "(1)" - line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1552, "(1)" - line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1553, "else" - line 399, "pan.___", state 1556, "(1)" - line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1566, "(1)" - line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1567, "else" - line 403, "pan.___", state 1570, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 401, "pan.___", state 1576, "((i<1))" - line 401, "pan.___", state 1576, "((i>=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1811, "(1)" - line 164, "pan.___", state 1819, "(1)" - line 168, "pan.___", state 1831, "(1)" - line 702, "pan.___", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 751, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 3.36e+03 seconds -pan: rate 66138.803 states/second -pan: avg transition delay 9.1989e-07 usec -cp .input.spin urcu_progress_reader.spin.input -cp .input.spin.trail urcu_progress_reader.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input deleted file mode 100644 index 91b1126..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define READER_PROGRESS - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input.trail deleted file mode 100644 index 7c42af1..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4401 -2:4:4353 -3:4:4356 -4:4:4356 -5:4:4359 -6:4:4367 -7:4:4367 -8:4:4370 -9:4:4376 -10:4:4380 -11:4:4380 -12:4:4383 -13:4:4391 -14:4:4395 -15:4:4396 -16:0:4401 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-1252:0:4405 -1253:1:105 -1254:0:4405 -1255:3:4347 -1256:0:4405 -1257:3:4346 -1258:0:4405 -1259:2:1348 -1260:0:4405 -1261:3:4347 -1262:0:4405 -1263:2:1347 -1264:0:4405 -1265:3:4346 -1266:0:4405 -1267:1:104 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.define b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.log deleted file mode 100644 index fc83245..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.log +++ /dev/null @@ -1,524 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 1194: Claim reached state 9 (line 748) -Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.64 R= 1e+05 -Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.6 R= 1e+05 -Depth= 3253 States= 3e+06 Transitions= 3.44e+07 Memory= 516.252 t= 31.6 R= 9e+04 -pan: resizing hashtable to -w22.. done -Depth= 7995 States= 4e+06 Transitions= 4.66e+07 Memory= 563.486 t= 42.8 R= 9e+04 -Depth= 7995 States= 5e+06 Transitions= 6.05e+07 Memory= 580.674 t= 55.6 R= 9e+04 -Depth= 7995 States= 6e+06 Transitions= 7.12e+07 Memory= 599.229 t= 65.5 R= 9e+04 -Depth= 7995 States= 7e+06 Transitions= 8.58e+07 Memory= 613.975 t= 78.9 R= 9e+04 -Depth= 7995 States= 8e+06 Transitions= 9.62e+07 Memory= 631.846 t= 88.7 R= 9e+04 -Depth= 7995 States= 9e+06 Transitions= 1.1e+08 Memory= 646.592 t= 101 R= 9e+04 -pan: resizing hashtable to -w24.. done -Depth= 7995 States= 1e+07 Transitions= 1.32e+08 Memory= 783.869 t= 122 R= 8e+04 -Depth= 7995 States= 1.1e+07 Transitions= 1.52e+08 Memory= 799.104 t= 140 R= 8e+04 -Depth= 7995 States= 1.2e+07 Transitions= 1.71e+08 Memory= 814.533 t= 157 R= 8e+04 -Depth= 7995 States= 1.3e+07 Transitions= 1.9e+08 Memory= 829.670 t= 174 R= 7e+04 -Depth= 7995 States= 1.4e+07 Transitions= 2.01e+08 Memory= 848.029 t= 185 R= 8e+04 -Depth= 7995 States= 1.5e+07 Transitions= 2.21e+08 Memory= 862.287 t= 203 R= 7e+04 -Depth= 7995 States= 1.6e+07 Transitions= 2.35e+08 Memory= 877.815 t= 215 R= 7e+04 -Depth= 7995 States= 1.7e+07 Transitions= 2.44e+08 Memory= 897.736 t= 223 R= 8e+04 -Depth= 7995 States= 1.8e+07 Transitions= 2.57e+08 Memory= 911.115 t= 235 R= 8e+04 -Depth= 7995 States= 1.9e+07 Transitions= 2.69e+08 Memory= 927.033 t= 246 R= 8e+04 -Depth= 8341 States= 2e+07 Transitions= 2.83e+08 Memory= 943.440 t= 259 R= 8e+04 -Depth= 8341 States= 2.1e+07 Transitions= 2.96e+08 Memory= 961.604 t= 271 R= 8e+04 -Depth= 8341 States= 2.2e+07 Transitions= 3.07e+08 Memory= 978.791 t= 281 R= 8e+04 -Depth= 8341 States= 2.3e+07 Transitions= 3.2e+08 Memory= 996.369 t= 293 R= 8e+04 -Depth= 8341 States= 2.4e+07 Transitions= 3.32e+08 Memory= 1013.264 t= 304 R= 8e+04 -Depth= 8341 States= 2.5e+07 Transitions= 3.48e+08 Memory= 1024.885 t= 319 R= 8e+04 -Depth= 8341 States= 2.6e+07 Transitions= 3.72e+08 Memory= 1038.947 t= 341 R= 8e+04 -Depth= 8341 States= 2.7e+07 Transitions= 3.91e+08 Memory= 1055.158 t= 358 R= 8e+04 -Depth= 8341 States= 2.8e+07 Transitions= 4.09e+08 Memory= 1069.904 t= 374 R= 7e+04 -Depth= 8341 States= 2.9e+07 Transitions= 4.25e+08 Memory= 1086.701 t= 389 R= 7e+04 -Depth= 8341 States= 3e+07 Transitions= 4.43e+08 Memory= 1102.131 t= 405 R= 7e+04 -Depth= 8341 States= 3.1e+07 Transitions= 4.58e+08 Memory= 1117.268 t= 419 R= 7e+04 -Depth= 8341 States= 3.2e+07 Transitions= 4.68e+08 Memory= 1136.213 t= 429 R= 7e+04 -Depth= 8341 States= 3.3e+07 Transitions= 4.8e+08 Memory= 1151.154 t= 440 R= 8e+04 -Depth= 8341 States= 3.4e+07 Transitions= 4.92e+08 Memory= 1166.779 t= 451 R= 8e+04 -pan: resizing hashtable to -w26.. done -Depth= 8687 States= 3.5e+07 Transitions= 5.05e+08 Memory= 1679.658 t= 464 R= 8e+04 -Depth= 8687 States= 3.6e+07 Transitions= 5.18e+08 Memory= 1697.432 t= 477 R= 8e+04 -Depth= 8687 States= 3.7e+07 Transitions= 5.29e+08 Memory= 1714.326 t= 487 R= 8e+04 -Depth= 8687 States= 3.8e+07 Transitions= 5.44e+08 Memory= 1730.244 t= 500 R= 8e+04 -Depth= 8687 States= 3.9e+07 Transitions= 5.55e+08 Memory= 1747.920 t= 511 R= 8e+04 -Depth= 8687 States= 4e+07 Transitions= 5.69e+08 Memory= 1761.885 t= 523 R= 8e+04 -Depth= 8687 States= 4.1e+07 Transitions= 5.92e+08 Memory= 1775.850 t= 544 R= 8e+04 -Depth= 8687 States= 4.2e+07 Transitions= 6.12e+08 Memory= 1790.498 t= 562 R= 7e+04 -Depth= 8687 States= 4.3e+07 Transitions= 6.29e+08 Memory= 1807.783 t= 578 R= 7e+04 -Depth= 8687 States= 4.4e+07 Transitions= 6.48e+08 Memory= 1822.432 t= 595 R= 7e+04 -Depth= 8687 States= 4.5e+07 Transitions= 6.61e+08 Memory= 1838.838 t= 606 R= 7e+04 -Depth= 8687 States= 4.6e+07 Transitions= 6.81e+08 Memory= 1853.291 t= 625 R= 7e+04 -Depth= 8687 States= 4.7e+07 Transitions= 6.93e+08 Memory= 1870.772 t= 635 R= 7e+04 -Depth= 8687 States= 4.8e+07 Transitions= 7.02e+08 Memory= 1889.912 t= 644 R= 7e+04 -Depth= 8687 States= 4.9e+07 Transitions= 7.15e+08 Memory= 1902.998 t= 656 R= 7e+04 -Depth= 8687 States= 5e+07 Transitions= 7.27e+08 Memory= 1919.600 t= 667 R= 7e+04 -Depth= 9033 States= 5.1e+07 Transitions= 7.42e+08 Memory= 1935.518 t= 681 R= 7e+04 -Depth= 9033 States= 5.2e+07 Transitions= 7.53e+08 Memory= 1954.170 t= 691 R= 8e+04 -Depth= 9033 States= 5.3e+07 Transitions= 7.66e+08 Memory= 1969.990 t= 703 R= 8e+04 -Depth= 9033 States= 5.4e+07 Transitions= 7.77e+08 Memory= 1988.545 t= 713 R= 8e+04 -Depth= 9033 States= 5.5e+07 Transitions= 7.9e+08 Memory= 2004.756 t= 725 R= 8e+04 -Depth= 9033 States= 5.6e+07 Transitions= 8.1e+08 Memory= 2016.084 t= 743 R= 8e+04 -Depth= 9033 States= 5.7e+07 Transitions= 8.32e+08 Memory= 2030.440 t= 763 R= 7e+04 -Depth= 9033 States= 5.8e+07 Transitions= 8.51e+08 Memory= 2046.260 t= 781 R= 7e+04 -Depth= 9033 States= 5.9e+07 Transitions= 8.7e+08 Memory= 2061.592 t= 797 R= 7e+04 -Depth= 9033 States= 6e+07 Transitions= 8.83e+08 Memory= 2078.779 t= 809 R= 7e+04 -Depth= 9033 States= 6.1e+07 Transitions= 9.01e+08 Memory= 2094.014 t= 826 R= 7e+04 -Depth= 9033 States= 6.2e+07 Transitions= 9.16e+08 Memory= 2108.467 t= 840 R= 7e+04 -Depth= 9033 States= 6.3e+07 Transitions= 9.26e+08 Memory= 2126.924 t= 849 R= 7e+04 -Depth= 9033 States= 6.4e+07 Transitions= 9.38e+08 Memory= 2142.158 t= 860 R= 7e+04 -Depth= 9033 States= 6.5e+07 Transitions= 9.51e+08 Memory= 2157.295 t= 871 R= 7e+04 -Depth= 9379 States= 6.6e+07 Transitions= 9.63e+08 Memory= 2173.115 t= 883 R= 7e+04 -Depth= 9379 States= 6.7e+07 Transitions= 9.77e+08 Memory= 2190.401 t= 895 R= 7e+04 -Depth= 9379 States= 6.8e+07 Transitions= 9.88e+08 Memory= 2208.955 t= 905 R= 8e+04 -Depth= 9379 States= 6.9e+07 Transitions= 1e+09 Memory= 2223.311 t= 919 R= 8e+04 -Depth= 9379 States= 7e+07 Transitions= 1.01e+09 Memory= 2242.256 t= 928 R= 8e+04 -Depth= 9379 States= 7.1e+07 Transitions= 1.03e+09 Memory= 2257.295 t= 940 R= 8e+04 -Depth= 9379 States= 7.2e+07 Transitions= 1.05e+09 Memory= 2269.307 t= 960 R= 8e+04 -Depth= 9379 States= 7.3e+07 Transitions= 1.07e+09 Memory= 2283.760 t= 979 R= 7e+04 -Depth= 9379 States= 7.4e+07 Transitions= 1.09e+09 Memory= 2299.385 t= 996 R= 7e+04 -Depth= 9379 States= 7.5e+07 Transitions= 1.11e+09 Memory= 2314.619 t= 1.01e+03 R= 7e+04 -Depth= 9379 States= 7.6e+07 Transitions= 1.12e+09 Memory= 2333.369 t= 1.02e+03 R= 7e+04 -Depth= 9379 States= 7.7e+07 Transitions= 1.14e+09 Memory= 2347.139 t= 1.04e+03 R= 7e+04 -Depth= 9379 States= 7.8e+07 Transitions= 1.15e+09 Memory= 2385.029 t= 1.06e+03 R= 7e+04 -Depth= 9379 States= 7.9e+07 Transitions= 1.17e+09 Memory= 2453.682 t= 1.07e+03 R= 7e+04 -Depth= 9379 States= 8e+07 Transitions= 1.18e+09 Memory= 2522.236 t= 1.08e+03 R= 7e+04 -Depth= 9379 States= 8.1e+07 Transitions= 1.2e+09 Memory= 2590.889 t= 1.1e+03 R= 7e+04 -Depth= 9379 States= 8.2e+07 Transitions= 1.22e+09 Memory= 2624.287 t= 1.12e+03 R= 7e+04 -Depth= 9379 States= 8.3e+07 Transitions= 1.23e+09 Memory= 2640.303 t= 1.13e+03 R= 7e+04 -Depth= 9379 States= 8.4e+07 Transitions= 1.25e+09 Memory= 2654.170 t= 1.15e+03 R= 7e+04 -Depth= 9379 States= 8.5e+07 Transitions= 1.27e+09 Memory= 2669.111 t= 1.16e+03 R= 7e+04 -Depth= 9379 States= 8.6e+07 Transitions= 1.29e+09 Memory= 2684.053 t= 1.18e+03 R= 7e+04 -Depth= 9379 States= 8.7e+07 Transitions= 1.31e+09 Memory= 2698.604 t= 1.2e+03 R= 7e+04 -Depth= 9379 States= 8.8e+07 Transitions= 1.33e+09 Memory= 2719.697 t= 1.22e+03 R= 7e+04 -Depth= 9379 States= 8.9e+07 Transitions= 1.35e+09 Memory= 2788.350 t= 1.24e+03 R= 7e+04 -Depth= 9379 States= 9e+07 Transitions= 1.37e+09 Memory= 2819.990 t= 1.26e+03 R= 7e+04 -Depth= 9379 States= 9.1e+07 Transitions= 1.39e+09 Memory= 2846.553 t= 1.27e+03 R= 7e+04 -Depth= 9379 States= 9.2e+07 Transitions= 1.4e+09 Memory= 2864.912 t= 1.28e+03 R= 7e+04 -Depth= 9379 States= 9.3e+07 Transitions= 1.41e+09 Memory= 2877.901 t= 1.3e+03 R= 7e+04 -Depth= 9379 States= 9.4e+07 Transitions= 1.44e+09 Memory= 2892.842 t= 1.31e+03 R= 7e+04 -Depth= 9379 States= 9.5e+07 Transitions= 1.45e+09 Memory= 2908.076 t= 1.33e+03 R= 7e+04 -Depth= 9379 States= 9.6e+07 Transitions= 1.47e+09 Memory= 2922.627 t= 1.35e+03 R= 7e+04 -Depth= 9379 States= 9.7e+07 Transitions= 1.49e+09 Memory= 2940.693 t= 1.36e+03 R= 7e+04 -Depth= 9379 States= 9.8e+07 Transitions= 1.51e+09 Memory= 2953.291 t= 1.38e+03 R= 7e+04 -Depth= 9379 States= 9.9e+07 Transitions= 1.53e+09 Memory= 2968.526 t= 1.4e+03 R= 7e+04 -Depth= 9379 States= 1e+08 Transitions= 1.56e+09 Memory= 2981.709 t= 1.42e+03 R= 7e+04 -Depth= 9379 States= 1.01e+08 Transitions= 1.57e+09 Memory= 2997.236 t= 1.44e+03 R= 7e+04 -Depth= 9379 States= 1.02e+08 Transitions= 1.59e+09 Memory= 3011.592 t= 1.46e+03 R= 7e+04 -Depth= 9379 States= 1.03e+08 Transitions= 1.61e+09 Memory= 3037.861 t= 1.47e+03 R= 7e+04 -Depth= 9379 States= 1.04e+08 Transitions= 1.63e+09 Memory= 3106.514 t= 1.49e+03 R= 7e+04 -Depth= 9379 States= 1.05e+08 Transitions= 1.65e+09 Memory= 3175.166 t= 1.51e+03 R= 7e+04 -Depth= 9379 States= 1.06e+08 Transitions= 1.67e+09 Memory= 3223.897 t= 1.52e+03 R= 7e+04 -Depth= 9379 States= 1.07e+08 Transitions= 1.68e+09 Memory= 3246.846 t= 1.54e+03 R= 7e+04 -Depth= 9379 States= 1.08e+08 Transitions= 1.7e+09 Memory= 3283.467 t= 1.56e+03 R= 7e+04 -Depth= 9379 States= 1.09e+08 Transitions= 1.72e+09 Memory= 3316.670 t= 1.57e+03 R= 7e+04 -Depth= 9379 States= 1.1e+08 Transitions= 1.73e+09 Memory= 3344.209 t= 1.59e+03 R= 7e+04 -Depth= 9379 States= 1.11e+08 Transitions= 1.75e+09 Memory= 3376.338 t= 1.6e+03 R= 7e+04 -Depth= 9379 States= 1.12e+08 Transitions= 1.76e+09 Memory= 3396.943 t= 1.62e+03 R= 7e+04 -Depth= 9379 States= 1.13e+08 Transitions= 1.78e+09 Memory= 3426.143 t= 1.63e+03 R= 7e+04 -Depth= 9379 States= 1.14e+08 Transitions= 1.8e+09 Memory= 3452.705 t= 1.65e+03 R= 7e+04 -Depth= 9379 States= 1.15e+08 Transitions= 1.81e+09 Memory= 3493.818 t= 1.66e+03 R= 7e+04 -Depth= 9379 States= 1.16e+08 Transitions= 1.83e+09 Memory= 3533.369 t= 1.67e+03 R= 7e+04 -Depth= 9379 States= 1.17e+08 Transitions= 1.84e+09 Memory= 3566.182 t= 1.69e+03 R= 7e+04 -Depth= 9379 States= 1.18e+08 Transitions= 1.86e+09 Memory= 3582.881 t= 1.7e+03 R= 7e+04 -Depth= 9379 States= 1.19e+08 Transitions= 1.88e+09 Memory= 3630.830 t= 1.72e+03 R= 7e+04 -Depth= 9379 States= 1.2e+08 Transitions= 1.89e+09 Memory= 3692.744 t= 1.74e+03 R= 7e+04 -Depth= 9379 States= 1.21e+08 Transitions= 1.91e+09 Memory= 3750.361 t= 1.75e+03 R= 7e+04 -Depth= 9379 States= 1.22e+08 Transitions= 1.92e+09 Memory= 3767.354 t= 1.76e+03 R= 7e+04 -Depth= 9379 States= 1.23e+08 Transitions= 1.94e+09 Memory= 3781.904 t= 1.78e+03 R= 7e+04 -Depth= 9379 States= 1.24e+08 Transitions= 1.96e+09 Memory= 3797.529 t= 1.8e+03 R= 7e+04 -Depth= 9379 States= 1.25e+08 Transitions= 1.98e+09 Memory= 3810.908 t= 1.82e+03 R= 7e+04 -Depth= 9379 States= 1.26e+08 Transitions= 2e+09 Memory= 3826.143 t= 1.83e+03 R= 7e+04 -Depth= 9379 States= 1.27e+08 Transitions= 2.02e+09 Memory= 3839.717 t= 1.86e+03 R= 7e+04 -Depth= 9379 States= 1.28e+08 Transitions= 2.04e+09 Memory= 3881.709 t= 1.87e+03 R= 7e+04 -Depth= 9379 States= 1.29e+08 Transitions= 2.06e+09 Memory= 3946.553 t= 1.89e+03 R= 7e+04 -Depth= 9379 States= 1.3e+08 Transitions= 2.08e+09 Memory= 3970.479 t= 1.91e+03 R= 7e+04 -Depth= 9379 States= 1.31e+08 Transitions= 2.09e+09 Memory= 3991.768 t= 1.92e+03 R= 7e+04 -Depth= 9379 States= 1.32e+08 Transitions= 2.1e+09 Memory= 4007.490 t= 1.93e+03 R= 7e+04 -Depth= 9379 States= 1.33e+08 Transitions= 2.13e+09 Memory= 4020.772 t= 1.95e+03 R= 7e+04 -Depth= 9379 States= 1.34e+08 Transitions= 2.14e+09 Memory= 4036.201 t= 1.97e+03 R= 7e+04 -Depth= 9379 States= 1.35e+08 Transitions= 2.16e+09 Memory= 4051.924 t= 1.98e+03 R= 7e+04 -pan: resizing hashtable to -w28.. done -Depth= 9379 States= 1.36e+08 Transitions= 2.18e+09 Memory= 6099.924 t= 2.02e+03 R= 7e+04 -Depth= 9379 States= 1.37e+08 Transitions= 2.2e+09 Memory= 6099.924 t= 2.03e+03 R= 7e+04 -Depth= 9379 States= 1.38e+08 Transitions= 2.22e+09 Memory= 6099.924 t= 2.05e+03 R= 7e+04 -Depth= 9379 States= 1.39e+08 Transitions= 2.24e+09 Memory= 6099.924 t= 2.07e+03 R= 7e+04 -Depth= 9379 States= 1.4e+08 Transitions= 2.26e+09 Memory= 6108.518 t= 2.09e+03 R= 7e+04 -Depth= 9379 States= 1.41e+08 Transitions= 2.28e+09 Memory= 6124.729 t= 2.1e+03 R= 7e+04 -Depth= 9379 States= 1.42e+08 Transitions= 2.3e+09 Memory= 6138.889 t= 2.12e+03 R= 7e+04 -Depth= 9379 States= 1.43e+08 Transitions= 2.31e+09 Memory= 6178.928 t= 2.13e+03 R= 7e+04 -Depth= 9379 States= 1.44e+08 Transitions= 2.33e+09 Memory= 6247.483 t= 2.15e+03 R= 7e+04 -Depth= 9379 States= 1.45e+08 Transitions= 2.35e+09 Memory= 6316.135 t= 2.17e+03 R= 7e+04 -Depth= 9379 States= 1.46e+08 Transitions= 2.37e+09 Memory= 6353.440 t= 2.19e+03 R= 7e+04 -Depth= 9379 States= 1.47e+08 Transitions= 2.39e+09 Memory= 6381.662 t= 2.21e+03 R= 7e+04 -Depth= 9379 States= 1.48e+08 Transitions= 2.41e+09 Memory= 6422.190 t= 2.22e+03 R= 7e+04 -Depth= 9379 States= 1.49e+08 Transitions= 2.42e+09 Memory= 6449.143 t= 2.23e+03 R= 7e+04 -Depth= 9379 States= 1.5e+08 Transitions= 2.44e+09 Memory= 6472.580 t= 2.25e+03 R= 7e+04 -Depth= 9379 States= 1.51e+08 Transitions= 2.45e+09 Memory= 6503.733 t= 2.26e+03 R= 7e+04 -Depth= 9379 States= 1.52e+08 Transitions= 2.47e+09 Memory= 6531.369 t= 2.28e+03 R= 7e+04 -Depth= 9379 States= 1.53e+08 Transitions= 2.49e+09 Memory= 6554.123 t= 2.29e+03 R= 7e+04 -Depth= 9379 States= 1.54e+08 Transitions= 2.5e+09 Memory= 6585.373 t= 2.31e+03 R= 7e+04 -Depth= 9379 States= 1.55e+08 Transitions= 2.52e+09 Memory= 6622.776 t= 2.32e+03 R= 7e+04 -Depth= 9379 States= 1.56e+08 Transitions= 2.54e+09 Memory= 6671.213 t= 2.34e+03 R= 7e+04 -Depth= 9379 States= 1.57e+08 Transitions= 2.55e+09 Memory= 6696.115 t= 2.35e+03 R= 7e+04 -Depth= 9379 States= 1.58e+08 Transitions= 2.57e+09 Memory= 6722.776 t= 2.37e+03 R= 7e+04 -Depth= 9379 States= 1.59e+08 Transitions= 2.58e+09 Memory= 6764.572 t= 2.38e+03 R= 7e+04 -Depth= 9379 States= 1.6e+08 Transitions= 2.6e+09 Memory= 6830.490 t= 2.4e+03 R= 7e+04 -Depth= 9379 States= 1.61e+08 Transitions= 2.62e+09 Memory= 6879.026 t= 2.41e+03 R= 7e+04 -Depth= 9379 States= 1.62e+08 Transitions= 2.63e+09 Memory= 6895.432 t= 2.42e+03 R= 7e+04 -Depth= 9379 States= 1.63e+08 Transitions= 2.65e+09 Memory= 6909.787 t= 2.44e+03 R= 7e+04 -Depth= 9379 States= 1.64e+08 Transitions= 2.67e+09 Memory= 6925.217 t= 2.46e+03 R= 7e+04 -Depth= 9379 States= 1.65e+08 Transitions= 2.69e+09 Memory= 6938.986 t= 2.48e+03 R= 7e+04 -Depth= 9379 States= 1.66e+08 Transitions= 2.71e+09 Memory= 6953.537 t= 2.5e+03 R= 7e+04 -Depth= 9379 States= 1.67e+08 Transitions= 2.73e+09 Memory= 6967.893 t= 2.52e+03 R= 7e+04 -Depth= 9379 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7022.190 t= 2.53e+03 R= 7e+04 -Depth= 9379 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7076.779 t= 2.55e+03 R= 7e+04 -Depth= 9379 States= 1.7e+08 Transitions= 2.79e+09 Memory= 7102.365 t= 2.57e+03 R= 7e+04 -Depth= 9379 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7119.162 t= 2.58e+03 R= 7e+04 -Depth= 9379 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7135.178 t= 2.59e+03 R= 7e+04 -Depth= 9379 States= 1.73e+08 Transitions= 2.84e+09 Memory= 7150.022 t= 2.61e+03 R= 7e+04 -Depth= 9379 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7164.475 t= 2.63e+03 R= 7e+04 -Depth= 9379 States= 1.75e+08 Transitions= 2.87e+09 Memory= 7180.295 t= 2.64e+03 R= 7e+04 -Depth= 9379 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7198.264 t= 2.66e+03 R= 7e+04 -Depth= 9379 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7211.447 t= 2.67e+03 R= 7e+04 -Depth= 9379 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7224.338 t= 2.7e+03 R= 7e+04 -Depth= 9379 States= 1.79e+08 Transitions= 2.95e+09 Memory= 7239.084 t= 2.72e+03 R= 7e+04 -Depth= 9379 States= 1.8e+08 Transitions= 2.97e+09 Memory= 7253.342 t= 2.74e+03 R= 7e+04 -Depth= 9379 States= 1.81e+08 Transitions= 2.99e+09 Memory= 7268.283 t= 2.75e+03 R= 7e+04 -Depth= 9379 States= 1.82e+08 Transitions= 3.01e+09 Memory= 7283.615 t= 2.77e+03 R= 7e+04 -Depth= 9379 States= 1.83e+08 Transitions= 3.02e+09 Memory= 7335.276 t= 2.78e+03 R= 7e+04 -Depth= 9379 States= 1.84e+08 Transitions= 3.04e+09 Memory= 7403.928 t= 2.8e+03 R= 7e+04 -Depth= 9379 States= 1.85e+08 Transitions= 3.06e+09 Memory= 7472.580 t= 2.82e+03 R= 7e+04 -Depth= 9379 States= 1.86e+08 Transitions= 3.08e+09 Memory= 7501.877 t= 2.84e+03 R= 7e+04 -Depth= 9379 States= 1.87e+08 Transitions= 3.1e+09 Memory= 7528.147 t= 2.85e+03 R= 7e+04 -Depth= 9379 States= 1.88e+08 Transitions= 3.11e+09 Memory= 7566.135 t= 2.87e+03 R= 7e+04 -Depth= 9379 States= 1.89e+08 Transitions= 3.13e+09 Memory= 7593.479 t= 2.88e+03 R= 7e+04 -Depth= 9379 States= 1.9e+08 Transitions= 3.15e+09 Memory= 7625.119 t= 2.9e+03 R= 7e+04 -Depth= 9379 States= 1.91e+08 Transitions= 3.16e+09 Memory= 7647.483 t= 2.91e+03 R= 7e+04 -Depth= 9379 States= 1.92e+08 Transitions= 3.18e+09 Memory= 7677.951 t= 2.93e+03 R= 7e+04 -Depth= 9379 States= 1.93e+08 Transitions= 3.2e+09 Memory= 7698.947 t= 2.94e+03 R= 7e+04 -Depth= 9379 States= 1.94e+08 Transitions= 3.21e+09 Memory= 7732.443 t= 2.96e+03 R= 7e+04 -Depth= 9379 States= 1.95e+08 Transitions= 3.23e+09 Memory= 7772.092 t= 2.97e+03 R= 7e+04 -Depth= 9379 States= 1.96e+08 Transitions= 3.24e+09 Memory= 7815.451 t= 2.98e+03 R= 7e+04 -Depth= 9379 States= 1.97e+08 Transitions= 3.26e+09 Memory= 7839.865 t= 3e+03 R= 7e+04 -Depth= 9379 States= 1.98e+08 Transitions= 3.28e+09 Memory= 7869.651 t= 3.01e+03 R= 7e+04 -Depth= 9379 States= 1.99e+08 Transitions= 3.29e+09 Memory= 7921.018 t= 3.03e+03 R= 7e+04 -Depth= 9379 States= 2e+08 Transitions= 3.31e+09 Memory= 7986.740 t= 3.05e+03 R= 7e+04 -Depth= 9379 States= 2.01e+08 Transitions= 3.33e+09 Memory= 8023.752 t= 3.06e+03 R= 7e+04 -Depth= 9379 States= 2.02e+08 Transitions= 3.34e+09 Memory= 8039.768 t= 3.07e+03 R= 7e+04 -Depth= 9379 States= 2.03e+08 Transitions= 3.36e+09 Memory= 8053.830 t= 3.09e+03 R= 7e+04 -Depth= 9379 States= 2.04e+08 Transitions= 3.38e+09 Memory= 8068.772 t= 3.11e+03 R= 7e+04 -Depth= 9379 States= 2.05e+08 Transitions= 3.4e+09 Memory= 8083.127 t= 3.13e+03 R= 7e+04 -Depth= 9379 States= 2.06e+08 Transitions= 3.42e+09 Memory= 8098.068 t= 3.15e+03 R= 7e+04 -Depth= 9379 States= 2.07e+08 Transitions= 3.44e+09 Memory= 8115.744 t= 3.16e+03 R= 7e+04 -Depth= 9379 States= 2.08e+08 Transitions= 3.46e+09 Memory= 8178.537 t= 3.18e+03 R= 7e+04 -Depth= 9379 States= 2.09e+08 Transitions= 3.48e+09 Memory= 8220.627 t= 3.2e+03 R= 7e+04 -Depth= 9379 States= 2.1e+08 Transitions= 3.49e+09 Memory= 8246.799 t= 3.21e+03 R= 7e+04 -Depth= 9379 States= 2.11e+08 Transitions= 3.5e+09 Memory= 8263.791 t= 3.22e+03 R= 7e+04 -Depth= 9379 States= 2.12e+08 Transitions= 3.52e+09 Memory= 8279.514 t= 3.24e+03 R= 7e+04 -Depth= 9379 States= 2.13e+08 Transitions= 3.54e+09 Memory= 8293.772 t= 3.26e+03 R= 7e+04 -Depth= 9379 States= 2.14e+08 Transitions= 3.56e+09 Memory= 8309.201 t= 3.28e+03 R= 7e+04 -Depth= 9379 States= 2.15e+08 Transitions= 3.58e+09 Memory= 8323.752 t= 3.29e+03 R= 7e+04 -Depth= 9379 States= 2.16e+08 Transitions= 3.6e+09 Memory= 8342.990 t= 3.31e+03 R= 7e+04 -Depth= 9379 States= 2.17e+08 Transitions= 3.61e+09 Memory= 8355.197 t= 3.32e+03 R= 7e+04 -Depth= 9379 States= 2.18e+08 Transitions= 3.64e+09 Memory= 8368.674 t= 3.35e+03 R= 7e+04 -Depth= 9379 States= 2.19e+08 Transitions= 3.66e+09 Memory= 8382.932 t= 3.37e+03 R= 7e+04 -Depth= 9379 States= 2.2e+08 Transitions= 3.68e+09 Memory= 8398.459 t= 3.38e+03 R= 7e+04 -Depth= 9379 States= 2.21e+08 Transitions= 3.7e+09 Memory= 8412.912 t= 3.4e+03 R= 6e+04 -Depth= 9379 States= 2.22e+08 Transitions= 3.71e+09 Memory= 8428.244 t= 3.42e+03 R= 6e+04 -Depth= 9379 States= 2.23e+08 Transitions= 3.73e+09 Memory= 8491.721 t= 3.43e+03 R= 6e+04 -Depth= 9379 States= 2.24e+08 Transitions= 3.75e+09 Memory= 8560.373 t= 3.45e+03 R= 6e+04 -Depth= 9379 States= 2.25e+08 Transitions= 3.77e+09 Memory= 8621.604 t= 3.47e+03 R= 6e+04 -Depth= 9379 States= 2.26e+08 Transitions= 3.79e+09 Memory= 8648.850 t= 3.48e+03 R= 6e+04 -Depth= 9379 States= 2.27e+08 Transitions= 3.81e+09 Memory= 8671.994 t= 3.5e+03 R= 6e+04 -Depth= 9379 States= 2.28e+08 Transitions= 3.82e+09 Memory= 8710.861 t= 3.51e+03 R= 6e+04 -Depth= 9379 States= 2.29e+08 Transitions= 3.84e+09 Memory= 8742.893 t= 3.53e+03 R= 6e+04 -Depth= 9379 States= 2.3e+08 Transitions= 3.85e+09 Memory= 8771.799 t= 3.54e+03 R= 6e+04 -Depth= 9379 States= 2.31e+08 Transitions= 3.87e+09 Memory= 8792.600 t= 3.56e+03 R= 6e+04 -Depth= 9379 States= 2.32e+08 Transitions= 3.89e+09 Memory= 8828.733 t= 3.57e+03 R= 6e+04 -Depth= 9379 States= 2.33e+08 Transitions= 3.9e+09 Memory= 8843.869 t= 3.59e+03 R= 6e+04 -Depth= 9379 States= 2.34e+08 Transitions= 3.92e+09 Memory= 8884.787 t= 3.6e+03 R= 6e+04 -Depth= 9379 States= 2.35e+08 Transitions= 3.93e+09 Memory= 8924.240 t= 3.62e+03 R= 6e+04 -Depth= 9379 States= 2.36e+08 Transitions= 3.95e+09 Memory= 8960.276 t= 3.63e+03 R= 6e+04 -Depth= 9379 States= 2.37e+08 Transitions= 3.97e+09 Memory= 8984.494 t= 3.65e+03 R= 6e+04 -Depth= 9379 States= 2.38e+08 Transitions= 3.98e+09 Memory= 9016.428 t= 3.66e+03 R= 6e+04 -Depth= 9379 States= 2.39e+08 Transitions= 4e+09 Memory= 9077.365 t= 3.68e+03 R= 6e+04 -Depth= 9379 States= 2.4e+08 Transitions= 4.02e+09 Memory= 9143.088 t= 3.7e+03 R= 6e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 9379, errors: 0 - 88114592 states, stored (2.40192e+08 visited) -3.782223e+09 states, matched -4.0224152e+09 transitions (= visited+matched) -1.4282782e+10 atomic steps -hash conflicts: 5.384059e+08 (resolved) - -Stats on memory usage (in Megabytes): - 7731.001 equivalent memory usage for states (stored*(State-vector + overhead)) - 6648.180 actual memory usage for states (compression: 85.99%) - state-vector as stored = 51 byte + 28 byte overhead - 2048.000 memory used for hash table (-w28) - 457.764 memory used for DFS stack (-m10000000) - 1.188 memory lost to fragmentation - 9152.756 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 370, "(1)" - line 164, "pan.___", state 378, "(1)" - line 168, "pan.___", state 390, "(1)" - line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 449, "(1)" - line 413, "pan.___", state 462, "(1)" - line 418, "pan.___", state 479, "(1)" - line 399, "pan.___", state 498, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 647, "(1)" - line 418, "pan.___", state 664, "(1)" - line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 710, "(1)" - line 164, "pan.___", state 718, "(1)" - line 168, "pan.___", state 730, "(1)" - line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 840, "(1)" - line 164, "pan.___", state 848, "(1)" - line 168, "pan.___", state 860, "(1)" - line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 884, "(1)" - line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 885, "else" - line 399, "pan.___", state 888, "(1)" - line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 898, "(1)" - line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 899, "else" - line 403, "pan.___", state 902, "(1)" - line 403, "pan.___", state 903, "(1)" - line 403, "pan.___", state 903, "(1)" - line 401, "pan.___", state 908, "((i<1))" - line 401, "pan.___", state 908, "((i>=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1508, "(1)" - line 164, "pan.___", state 1516, "(1)" - line 168, "pan.___", state 1528, "(1)" - line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1552, "(1)" - line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1553, "else" - line 399, "pan.___", state 1556, "(1)" - line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1566, "(1)" - line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1567, "else" - line 403, "pan.___", state 1570, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 401, "pan.___", state 1576, "((i<1))" - line 401, "pan.___", state 1576, "((i>=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1811, "(1)" - line 164, "pan.___", state 1819, "(1)" - line 168, "pan.___", state 1831, "(1)" - line 702, "pan.___", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 751, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 3.7e+03 seconds -pan: rate 64918.749 states/second -pan: avg transition delay 9.1982e-07 usec -cp .input.spin urcu_progress_writer.spin.input -cp .input.spin.trail urcu_progress_writer.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input deleted file mode 100644 index 43221e7..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define WRITER_PROGRESS - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.define b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.log b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.log deleted file mode 100644 index f870a6e..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.log +++ /dev/null @@ -1,535 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -depth 15: Claim reached state 9 (line 750) -depth 1194: Claim reached state 9 (line 749) -Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.57 R= 1e+05 -Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.5 R= 1e+05 -pan: acceptance cycle (at depth 1938) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 23684, errors: 1 - 682672 states, stored (2.81536e+06 visited) - 30226122 states, matched - 33041487 transitions (= visited+matched) -1.1631626e+08 atomic steps -hash conflicts: 6056013 (resolved) - -Stats on memory usage (in Megabytes): - 59.896 equivalent memory usage for states (stored*(State-vector + overhead)) - 47.456 actual memory usage for states (compression: 79.23%) - state-vector as stored = 45 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 513.127 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 256, "(1)" - line 419, "pan.___", state 286, "(1)" - line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 395, "(1)" - line 419, "pan.___", state 425, "(1)" - line 541, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 70, "(1)" - line 419, "pan.___", state 100, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 247, "(1)" - line 419, "pan.___", state 277, "(1)" - line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 359, "(1)" - line 419, "pan.___", state 389, "(1)" - line 615, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 402, "pan.___", state 134, "((i<1))" - line 402, "pan.___", state 134, "((i>=1))" - line 410, "pan.___", state 153, "(1)" - line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 154, "else" - line 410, "pan.___", state 157, "(1)" - line 410, "pan.___", state 158, "(1)" - line 410, "pan.___", state 158, "(1)" - line 414, "pan.___", state 166, "(1)" - line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 167, "else" - line 414, "pan.___", state 170, "(1)" - line 414, "pan.___", state 171, "(1)" - line 414, "pan.___", state 171, "(1)" - line 412, "pan.___", state 176, "((i<1))" - line 412, "pan.___", state 176, "((i>=1))" - line 419, "pan.___", state 183, "(1)" - line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 184, "else" - line 419, "pan.___", state 187, "(1)" - line 419, "pan.___", state 188, "(1)" - line 419, "pan.___", state 188, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 370, "pan.___", state 193, "(1)" - line 653, "pan.___", state 199, "(1)" - line 647, "pan.___", state 202, "((write_lock==0))" - line 647, "pan.___", state 202, "else" - line 645, "pan.___", state 203, "(1)" - line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, "pan.___", state 225, "((j<1))" - line 178, "pan.___", state 225, "((j>=1))" - line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 240, "(1)" - line 165, "pan.___", state 248, "(1)" - line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 165, "pan.___", state 249, "else" - line 163, "pan.___", state 254, "((j<1))" - line 163, "pan.___", state 254, "((j>=1))" - line 169, "pan.___", state 260, "(1)" - line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 169, "pan.___", state 261, "else" - line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 171, "pan.___", state 264, "else" - line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 169, "pan.___", state 323, "(1)" - line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, "pan.___", state 355, "((j<1))" - line 178, "pan.___", state 355, "((j>=1))" - line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 370, "(1)" - line 165, "pan.___", state 378, "(1)" - line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 165, "pan.___", state 379, "else" - line 163, "pan.___", state 384, "((j<1))" - line 163, "pan.___", state 384, "((j>=1))" - line 169, "pan.___", state 390, "(1)" - line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 169, "pan.___", state 391, "else" - line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 171, "pan.___", state 394, "else" - line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 410, "(1)" - line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 424, "(1)" - line 404, "pan.___", state 425, "(1)" - line 404, "pan.___", state 425, "(1)" - line 402, "pan.___", state 430, "((i<1))" - line 402, "pan.___", state 430, "((i>=1))" - line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 449, "(1)" - line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 450, "else" - line 410, "pan.___", state 453, "(1)" - line 410, "pan.___", state 454, "(1)" - line 410, "pan.___", state 454, "(1)" - line 414, "pan.___", state 462, "(1)" - line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 463, "else" - line 414, "pan.___", state 466, "(1)" - line 414, "pan.___", state 467, "(1)" - line 414, "pan.___", state 467, "(1)" - line 412, "pan.___", state 472, "((i<1))" - line 412, "pan.___", state 472, "((i>=1))" - line 419, "pan.___", state 479, "(1)" - line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 480, "else" - line 419, "pan.___", state 483, "(1)" - line 419, "pan.___", state 484, "(1)" - line 419, "pan.___", state 484, "(1)" - line 421, "pan.___", state 487, "(1)" - line 421, "pan.___", state 487, "(1)" - line 370, "pan.___", state 489, "(1)" - line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )] = (tmp^(1<<7))" - line 400, "pan.___", state 498, "(1)" - line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 499, "else" - line 400, "pan.___", state 502, "(1)" - line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 516, "(1)" - line 404, "pan.___", state 517, "(1)" - line 404, "pan.___", state 517, "(1)" - line 402, "pan.___", state 522, "((i<1))" - line 402, "pan.___", state 522, "((i>=1))" - line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 541, "(1)" - line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 542, "else" - line 410, "pan.___", state 545, "(1)" - line 410, "pan.___", state 546, "(1)" - line 410, "pan.___", state 546, "(1)" - line 414, "pan.___", state 554, "(1)" - line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 555, "else" - line 414, "pan.___", state 558, "(1)" - line 414, "pan.___", state 559, "(1)" - line 414, "pan.___", state 559, "(1)" - line 412, "pan.___", state 564, "((i<1))" - line 412, "pan.___", state 564, "((i>=1))" - line 419, "pan.___", state 571, "(1)" - line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 572, "else" - line 419, "pan.___", state 575, "(1)" - line 419, "pan.___", state 576, "(1)" - line 419, "pan.___", state 576, "(1)" - line 421, "pan.___", state 579, "(1)" - line 421, "pan.___", state 579, "(1)" - line 370, "pan.___", state 581, "(1)" - line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 595, "(1)" - line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 609, "(1)" - line 404, "pan.___", state 610, "(1)" - line 404, "pan.___", state 610, "(1)" - line 402, "pan.___", state 615, "((i<1))" - line 402, "pan.___", state 615, "((i>=1))" - line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 634, "(1)" - line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 635, "else" - line 410, "pan.___", state 638, "(1)" - line 410, "pan.___", state 639, "(1)" - line 410, "pan.___", state 639, "(1)" - line 414, "pan.___", state 647, "(1)" - line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 648, "else" - line 414, "pan.___", state 651, "(1)" - line 414, "pan.___", state 652, "(1)" - line 414, "pan.___", state 652, "(1)" - line 412, "pan.___", state 657, "((i<1))" - line 412, "pan.___", state 657, "((i>=1))" - line 419, "pan.___", state 664, "(1)" - line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 665, "else" - line 419, "pan.___", state 668, "(1)" - line 419, "pan.___", state 669, "(1)" - line 419, "pan.___", state 669, "(1)" - line 421, "pan.___", state 672, "(1)" - line 421, "pan.___", state 672, "(1)" - line 370, "pan.___", state 674, "(1)" - line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 681, "(1)" - line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 682, "else" - line 400, "pan.___", state 685, "(1)" - line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 695, "(1)" - line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 696, "else" - line 404, "pan.___", state 699, "(1)" - line 404, "pan.___", state 700, "(1)" - line 404, "pan.___", state 700, "(1)" - line 402, "pan.___", state 705, "((i<1))" - line 402, "pan.___", state 705, "((i>=1))" - line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 724, "(1)" - line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 725, "else" - line 410, "pan.___", state 728, "(1)" - line 410, "pan.___", state 729, "(1)" - line 410, "pan.___", state 729, "(1)" - line 414, "pan.___", state 737, "(1)" - line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 738, "else" - line 414, "pan.___", state 741, "(1)" - line 414, "pan.___", state 742, "(1)" - line 414, "pan.___", state 742, "(1)" - line 412, "pan.___", state 747, "((i<1))" - line 412, "pan.___", state 747, "((i>=1))" - line 419, "pan.___", state 754, "(1)" - line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 755, "else" - line 419, "pan.___", state 758, "(1)" - line 419, "pan.___", state 759, "(1)" - line 419, "pan.___", state 759, "(1)" - line 421, "pan.___", state 762, "(1)" - line 421, "pan.___", state 762, "(1)" - line 370, "pan.___", state 764, "(1)" - line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )])&(1<<7))))" - line 430, "pan.___", state 767, "else" - line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 779, "(1)" - line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 780, "else" - line 400, "pan.___", state 783, "(1)" - line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 793, "(1)" - line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 794, "else" - line 404, "pan.___", state 797, "(1)" - line 404, "pan.___", state 798, "(1)" - line 404, "pan.___", state 798, "(1)" - line 402, "pan.___", state 803, "((i<1))" - line 402, "pan.___", state 803, "((i>=1))" - line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 822, "(1)" - line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 823, "else" - line 410, "pan.___", state 826, "(1)" - line 410, "pan.___", state 827, "(1)" - line 410, "pan.___", state 827, "(1)" - line 414, "pan.___", state 835, "(1)" - line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 836, "else" - line 414, "pan.___", state 839, "(1)" - line 414, "pan.___", state 840, "(1)" - line 414, "pan.___", state 840, "(1)" - line 412, "pan.___", state 845, "((i<1))" - line 412, "pan.___", state 845, "((i>=1))" - line 419, "pan.___", state 852, "(1)" - line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 853, "else" - line 419, "pan.___", state 856, "(1)" - line 419, "pan.___", state 857, "(1)" - line 419, "pan.___", state 857, "(1)" - line 421, "pan.___", state 860, "(1)" - line 421, "pan.___", state 860, "(1)" - line 370, "pan.___", state 862, "(1)" - line 449, "pan.___", state 870, "((tmp<1))" - line 449, "pan.___", state 870, "((tmp>=1))" - line 462, "pan.___", state 873, "tmp = 0" - line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 883, "(1)" - line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 897, "(1)" - line 404, "pan.___", state 898, "(1)" - line 404, "pan.___", state 898, "(1)" - line 402, "pan.___", state 903, "((i<1))" - line 402, "pan.___", state 903, "((i>=1))" - line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 922, "(1)" - line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 923, "else" - line 410, "pan.___", state 926, "(1)" - line 410, "pan.___", state 927, "(1)" - line 410, "pan.___", state 927, "(1)" - line 414, "pan.___", state 935, "(1)" - line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 936, "else" - line 414, "pan.___", state 939, "(1)" - line 414, "pan.___", state 940, "(1)" - line 414, "pan.___", state 940, "(1)" - line 412, "pan.___", state 945, "((i<1))" - line 412, "pan.___", state 945, "((i>=1))" - line 419, "pan.___", state 952, "(1)" - line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 953, "else" - line 419, "pan.___", state 956, "(1)" - line 419, "pan.___", state 957, "(1)" - line 419, "pan.___", state 957, "(1)" - line 421, "pan.___", state 960, "(1)" - line 421, "pan.___", state 960, "(1)" - line 370, "pan.___", state 962, "(1)" - line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )]" - line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 973, "(1)" - line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 987, "(1)" - line 404, "pan.___", state 988, "(1)" - line 404, "pan.___", state 988, "(1)" - line 402, "pan.___", state 993, "((i<1))" - line 402, "pan.___", state 993, "((i>=1))" - line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1012, "(1)" - line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1013, "else" - line 410, "pan.___", state 1016, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 414, "pan.___", state 1025, "(1)" - line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1026, "else" - line 414, "pan.___", state 1029, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 412, "pan.___", state 1035, "((i<1))" - line 412, "pan.___", state 1035, "((i>=1))" - line 419, "pan.___", state 1042, "(1)" - line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1043, "else" - line 419, "pan.___", state 1046, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 370, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1061, "(1)" - line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1117, "(1)" - line 419, "pan.___", state 1134, "(1)" - line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1210, "(1)" - line 419, "pan.___", state 1227, "(1)" - line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1287, "(1)" - line 414, "pan.___", state 1300, "(1)" - line 419, "pan.___", state 1317, "(1)" - line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1342, "(1)" - line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1343, "else" - line 400, "pan.___", state 1346, "(1)" - line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1356, "(1)" - line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1357, "else" - line 404, "pan.___", state 1360, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 402, "pan.___", state 1366, "((i<1))" - line 402, "pan.___", state 1366, "((i>=1))" - line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1385, "(1)" - line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1386, "else" - line 410, "pan.___", state 1389, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 414, "pan.___", state 1398, "(1)" - line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1399, "else" - line 414, "pan.___", state 1402, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 412, "pan.___", state 1408, "((i<1))" - line 412, "pan.___", state 1408, "((i>=1))" - line 419, "pan.___", state 1415, "(1)" - line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1416, "else" - line 419, "pan.___", state 1419, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 1471, "(1)" - line 165, "pan.___", state 1479, "(1)" - line 169, "pan.___", state 1491, "(1)" - line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 180, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 184, "pan.___", state 1591, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 1601, "(1)" - line 165, "pan.___", state 1609, "(1)" - line 169, "pan.___", state 1621, "(1)" - line 370, "pan.___", state 1642, "(1)" - line 696, "pan.___", state 1643, "(1)" - line 703, "pan.___", state 1646, "-end-" - (308 of 1646 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 752, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 30.2 seconds -pan: rate 93347.646 states/second -pan: avg transition delay 9.1279e-07 usec -cp .input.spin urcu_progress_writer_error.spin.input -cp .input.spin.trail urcu_progress_writer_error.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input deleted file mode 100644 index eb1d4e6..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,724 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index c5a6fbf..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,23572 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2561 -2:4:2513 -3:4:2516 -4:4:2516 -5:4:2519 -6:4:2527 -7:4:2527 -8:4:2530 -9:4:2536 -10:4:2540 -11:4:2540 -12:4:2543 -13:4:2551 -14:4:2555 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-23556:3:2161 -23557:3:2169 -23558:3:2170 -23559:3:2174 -23560:3:2179 -23561:3:2180 -23562:0:2565 -23563:3:2192 -23564:0:2565 -23565:3:2013 -23566:0:2565 -23567:3:2014 -23568:0:2565 -23569:1:206 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/DEFINES b/formal-model/urcu-nosched-model/result-signal-over-writer/DEFINES deleted file mode 100644 index ec600f0..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/DEFINES +++ /dev/null @@ -1,16 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/Makefile b/formal-model/urcu-nosched-model/result-signal-over-writer/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/asserts.log b/formal-model/urcu-nosched-model/result-signal-over-writer/asserts.log deleted file mode 100644 index c102ffb..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/asserts.log +++ /dev/null @@ -1,334 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 40 byte, depth reached 7872, errors: 0 - 20128 states, stored - 191477 states, matched - 211605 transitions (= stored+matched) - 712166 atomic steps -hash conflicts: 942 (resolved) - -Stats on memory usage (in Megabytes): - 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.467 actual memory usage for states (unsuccessful compression: 112.36%) - state-vector as stored = 48 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.229 total actual memory usage - -unreached in proctype urcu_reader_sig - line 401, ".input.spin", state 330, "(1)" - line 612, ".input.spin", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 59, "(1)" - line 416, ".input.spin", state 89, "(1)" - line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 160, "(1)" - line 650, ".input.spin", state 213, "(1)" - line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 177, ".input.spin", state 233, "(1)" - line 158, ".input.spin", state 254, "(1)" - line 162, ".input.spin", state 262, "(1)" - line 166, ".input.spin", state 274, "(1)" - line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 752, "(1)" - line 162, ".input.spin", state 760, "(1)" - line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 761, "else" - line 160, ".input.spin", state 766, "((j<1))" - line 160, ".input.spin", state 766, "((j>=1))" - line 166, ".input.spin", state 772, "(1)" - line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 773, "else" - line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 776, "else" - line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 835, "(1)" - line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 852, "(1)" - line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 861, "(1)" - line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 862, "else" - line 175, ".input.spin", state 867, "((j<1))" - line 175, ".input.spin", state 867, "((j>=1))" - line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 882, "(1)" - line 162, ".input.spin", state 890, "(1)" - line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 891, "else" - line 160, ".input.spin", state 896, "((j<1))" - line 160, ".input.spin", state 896, "((j>=1))" - line 166, ".input.spin", state 902, "(1)" - line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 903, "else" - line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 906, "else" - line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 908, "else" - line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 909, "else" - line 354, ".input.spin", state 915, "((sighand_exec==1))" - line 354, ".input.spin", state 915, "else" - line 360, ".input.spin", state 918, "sighand_exec = 1" - line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 933, "(1)" - line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 934, "else" - line 397, ".input.spin", state 937, "(1)" - line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 947, "(1)" - line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 948, "else" - line 401, ".input.spin", state 951, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 399, ".input.spin", state 957, "((i<1))" - line 399, ".input.spin", state 957, "((i>=1))" - line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 976, "(1)" - line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 977, "else" - line 407, ".input.spin", state 980, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 411, ".input.spin", state 989, "(1)" - line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 990, "else" - line 411, ".input.spin", state 993, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 409, ".input.spin", state 999, "((i<1))" - line 409, ".input.spin", state 999, "((i>=1))" - line 416, ".input.spin", state 1006, "(1)" - line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1007, "else" - line 416, ".input.spin", state 1010, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 360, ".input.spin", state 1023, "sighand_exec = 1" - line 401, ".input.spin", state 1054, "(1)" - line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1113, "(1)" - line 401, ".input.spin", state 1151, "(1)" - line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1210, "(1)" - line 397, ".input.spin", state 1236, "(1)" - line 401, ".input.spin", state 1250, "(1)" - line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1309, "(1)" - line 401, ".input.spin", state 1350, "(1)" - line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1409, "(1)" - line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1432, "(1)" - line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1441, "(1)" - line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1442, "else" - line 175, ".input.spin", state 1447, "((j<1))" - line 175, ".input.spin", state 1447, "((j>=1))" - line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1462, "(1)" - line 162, ".input.spin", state 1470, "(1)" - line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1471, "else" - line 160, ".input.spin", state 1476, "((j<1))" - line 160, ".input.spin", state 1476, "((j>=1))" - line 166, ".input.spin", state 1482, "(1)" - line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1483, "else" - line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1486, "else" - line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 1545, "(1)" - line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1562, "(1)" - line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1571, "(1)" - line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1572, "else" - line 175, ".input.spin", state 1577, "((j<1))" - line 175, ".input.spin", state 1577, "((j>=1))" - line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1592, "(1)" - line 162, ".input.spin", state 1600, "(1)" - line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1601, "else" - line 160, ".input.spin", state 1606, "((j<1))" - line 160, ".input.spin", state 1606, "((j>=1))" - line 166, ".input.spin", state 1612, "(1)" - line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1613, "else" - line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1616, "else" - line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 1618, "else" - line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 1619, "else" - line 354, ".input.spin", state 1625, "((sighand_exec==1))" - line 354, ".input.spin", state 1625, "else" - line 360, ".input.spin", state 1628, "sighand_exec = 1" - line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 1643, "(1)" - line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 1644, "else" - line 397, ".input.spin", state 1647, "(1)" - line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 1657, "(1)" - line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 1658, "else" - line 401, ".input.spin", state 1661, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 399, ".input.spin", state 1667, "((i<1))" - line 399, ".input.spin", state 1667, "((i>=1))" - line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 1686, "(1)" - line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 1687, "else" - line 407, ".input.spin", state 1690, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 411, ".input.spin", state 1699, "(1)" - line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 1700, "else" - line 411, ".input.spin", state 1703, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 409, ".input.spin", state 1709, "((i<1))" - line 409, ".input.spin", state 1709, "((i>=1))" - line 416, ".input.spin", state 1716, "(1)" - line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1717, "else" - line 416, ".input.spin", state 1720, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 360, ".input.spin", state 1733, "sighand_exec = 1" - line 177, ".input.spin", state 1758, "(1)" - line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1779, "(1)" - line 162, ".input.spin", state 1787, "(1)" - line 166, ".input.spin", state 1799, "(1)" - line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/asserts.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/references.txt b/formal-model/urcu-nosched-model/result-signal-over-writer/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/DEFINES b/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/DEFINES deleted file mode 100644 index ec600f0..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/DEFINES +++ /dev/null @@ -1,16 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/Makefile b/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.log b/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.log deleted file mode 100644 index c102ffb..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.log +++ /dev/null @@ -1,334 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 40 byte, depth reached 7872, errors: 0 - 20128 states, stored - 191477 states, matched - 211605 transitions (= stored+matched) - 712166 atomic steps -hash conflicts: 942 (resolved) - -Stats on memory usage (in Megabytes): - 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.467 actual memory usage for states (unsuccessful compression: 112.36%) - state-vector as stored = 48 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.229 total actual memory usage - -unreached in proctype urcu_reader_sig - line 401, ".input.spin", state 330, "(1)" - line 612, ".input.spin", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 59, "(1)" - line 416, ".input.spin", state 89, "(1)" - line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 160, "(1)" - line 650, ".input.spin", state 213, "(1)" - line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 177, ".input.spin", state 233, "(1)" - line 158, ".input.spin", state 254, "(1)" - line 162, ".input.spin", state 262, "(1)" - line 166, ".input.spin", state 274, "(1)" - line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 752, "(1)" - line 162, ".input.spin", state 760, "(1)" - line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 761, "else" - line 160, ".input.spin", state 766, "((j<1))" - line 160, ".input.spin", state 766, "((j>=1))" - line 166, ".input.spin", state 772, "(1)" - line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 773, "else" - line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 776, "else" - line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 835, "(1)" - line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 852, "(1)" - line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 861, "(1)" - line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 862, "else" - line 175, ".input.spin", state 867, "((j<1))" - line 175, ".input.spin", state 867, "((j>=1))" - line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 882, "(1)" - line 162, ".input.spin", state 890, "(1)" - line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 891, "else" - line 160, ".input.spin", state 896, "((j<1))" - line 160, ".input.spin", state 896, "((j>=1))" - line 166, ".input.spin", state 902, "(1)" - line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 903, "else" - line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 906, "else" - line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 908, "else" - line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 909, "else" - line 354, ".input.spin", state 915, "((sighand_exec==1))" - line 354, ".input.spin", state 915, "else" - line 360, ".input.spin", state 918, "sighand_exec = 1" - line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 933, "(1)" - line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 934, "else" - line 397, ".input.spin", state 937, "(1)" - line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 947, "(1)" - line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 948, "else" - line 401, ".input.spin", state 951, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 399, ".input.spin", state 957, "((i<1))" - line 399, ".input.spin", state 957, "((i>=1))" - line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 976, "(1)" - line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 977, "else" - line 407, ".input.spin", state 980, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 411, ".input.spin", state 989, "(1)" - line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 990, "else" - line 411, ".input.spin", state 993, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 409, ".input.spin", state 999, "((i<1))" - line 409, ".input.spin", state 999, "((i>=1))" - line 416, ".input.spin", state 1006, "(1)" - line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1007, "else" - line 416, ".input.spin", state 1010, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 360, ".input.spin", state 1023, "sighand_exec = 1" - line 401, ".input.spin", state 1054, "(1)" - line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1113, "(1)" - line 401, ".input.spin", state 1151, "(1)" - line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1210, "(1)" - line 397, ".input.spin", state 1236, "(1)" - line 401, ".input.spin", state 1250, "(1)" - line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1309, "(1)" - line 401, ".input.spin", state 1350, "(1)" - line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1409, "(1)" - line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1432, "(1)" - line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1441, "(1)" - line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1442, "else" - line 175, ".input.spin", state 1447, "((j<1))" - line 175, ".input.spin", state 1447, "((j>=1))" - line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1462, "(1)" - line 162, ".input.spin", state 1470, "(1)" - line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1471, "else" - line 160, ".input.spin", state 1476, "((j<1))" - line 160, ".input.spin", state 1476, "((j>=1))" - line 166, ".input.spin", state 1482, "(1)" - line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1483, "else" - line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1486, "else" - line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 1545, "(1)" - line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1562, "(1)" - line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1571, "(1)" - line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1572, "else" - line 175, ".input.spin", state 1577, "((j<1))" - line 175, ".input.spin", state 1577, "((j>=1))" - line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1592, "(1)" - line 162, ".input.spin", state 1600, "(1)" - line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1601, "else" - line 160, ".input.spin", state 1606, "((j<1))" - line 160, ".input.spin", state 1606, "((j>=1))" - line 166, ".input.spin", state 1612, "(1)" - line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1613, "else" - line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1616, "else" - line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 1618, "else" - line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 1619, "else" - line 354, ".input.spin", state 1625, "((sighand_exec==1))" - line 354, ".input.spin", state 1625, "else" - line 360, ".input.spin", state 1628, "sighand_exec = 1" - line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 1643, "(1)" - line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 1644, "else" - line 397, ".input.spin", state 1647, "(1)" - line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 1657, "(1)" - line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 1658, "else" - line 401, ".input.spin", state 1661, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 399, ".input.spin", state 1667, "((i<1))" - line 399, ".input.spin", state 1667, "((i>=1))" - line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 1686, "(1)" - line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 1687, "else" - line 407, ".input.spin", state 1690, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 411, ".input.spin", state 1699, "(1)" - line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 1700, "else" - line 411, ".input.spin", state 1703, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 409, ".input.spin", state 1709, "((i<1))" - line 409, ".input.spin", state 1709, "((i>=1))" - line 416, ".input.spin", state 1716, "(1)" - line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1717, "else" - line 416, ".input.spin", state 1720, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 360, ".input.spin", state 1733, "sighand_exec = 1" - line 177, ".input.spin", state 1758, "(1)" - line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1779, "(1)" - line 162, ".input.spin", state 1787, "(1)" - line 166, ".input.spin", state 1799, "(1)" - line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/references.txt b/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/.input.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/.input.define deleted file mode 100644 index e69de29..0000000 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/.input.spin b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/.input.spin deleted file mode 100644 index f2737c4..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/.input.spin +++ /dev/null @@ -1,531 +0,0 @@ - -#define NR_READERS 2 -#define NR_WRITERS 1 - -#define NR_PROCS 3 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/DEFINES b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/DEFINES deleted file mode 100644 index 12c751b..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/DEFINES +++ /dev/null @@ -1,31 +0,0 @@ - -#define NR_READERS 2 -#define NR_WRITERS 1 - -#define NR_PROCS 3 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/Makefile b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/Makefile deleted file mode 100644 index ca932b7..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/Makefile +++ /dev/null @@ -1,165 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.log deleted file mode 100644 index 75f2427..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.log +++ /dev/null @@ -1,10 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -spin: line 295 replacement value: tmp -spin: line 295 ".input.spin", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' -spin: 1 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input deleted file mode 100644 index b06898a..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input +++ /dev/null @@ -1,409 +0,0 @@ -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/references.txt b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.sh b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin deleted file mode 100644 index 61d9052..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin +++ /dev/null @@ -1,500 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp2 b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp2 deleted file mode 100644 index b1c8311..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp2 +++ /dev/null @@ -1,395 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_WRITERS 1 -#define NR_READERS 3 - -/* Number of reader and writer processes */ -#define NR_PROCS 5 - -/* Includes reader, writer and init process */ -#define MAX_NR_PROCS 5 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif - skip; - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif - skip; - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_writerid() (get_pid()) -#define get_readerid() (get_writerrid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - skip; -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2, nest) -{ - nest_i = 0; - do - :: nest_i < nest -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - ooo_mem(i); - smp_mb(i); - nest_i++; - :: nest_i >= nest -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < nest -> - ooo_mem(i); - smp_mb(i); - ooo_mem(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= nest -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [2] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2, 2); - od; -} - -/* Model the RCU update process. */ - -active [1] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - ooo_mem(i); - smp_mb(i); - ooo_mem(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp5 b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp5 deleted file mode 100644 index 324ee39..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp5 +++ /dev/null @@ -1,398 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.log deleted file mode 100644 index 6a04aba..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.log +++ /dev/null @@ -1,414 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 566) -Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.3 R= 3e+04 -Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.9 R= 3e+04 -Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 97 R= 3e+04 -pan: resizing hashtable to -w22.. done -Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4234, errors: 0 - 4027146 states, stored - 66145121 states, matched - 70172267 transitions (= stored+matched) -2.6437688e+08 atomic steps -hash conflicts: 47318190 (resolved) - -Stats on memory usage (in Megabytes): - 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) - 253.418 actual memory usage for states (compression: 78.55%) - state-vector as stored = 38 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 743.076 total actual memory usage - -unreached in proctype urcu_reader - line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 61, "(1)" - line 307, "pan.___", state 91, "(1)" - line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 149, "(1)" - line 307, "pan.___", state 179, "(1)" - line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 238, "(1)" - line 307, "pan.___", state 268, "(1)" - line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 291, "(1)" - line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 300, "(1)" - line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 301, "else" - line 160, "pan.___", state 306, "((j<1))" - line 160, "pan.___", state 306, "((j>=1))" - line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 321, "(1)" - line 147, "pan.___", state 329, "(1)" - line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 330, "else" - line 145, "pan.___", state 335, "((j<1))" - line 145, "pan.___", state 335, "((j>=1))" - line 151, "pan.___", state 341, "(1)" - line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 342, "else" - line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 345, "else" - line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 347, "else" - line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 404, "(1)" - line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 421, "(1)" - line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 430, "(1)" - line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 431, "else" - line 160, "pan.___", state 436, "((j<1))" - line 160, "pan.___", state 436, "((j>=1))" - line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 451, "(1)" - line 147, "pan.___", state 459, "(1)" - line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 460, "else" - line 145, "pan.___", state 465, "((j<1))" - line 145, "pan.___", state 465, "((j>=1))" - line 151, "pan.___", state 471, "(1)" - line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 472, "else" - line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 475, "else" - line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 477, "else" - line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 537, "(1)" - line 307, "pan.___", state 567, "(1)" - line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 625, "(1)" - line 307, "pan.___", state 655, "(1)" - line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 713, "(1)" - line 307, "pan.___", state 743, "(1)" - line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 760, "(1)" - line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 769, "(1)" - line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 770, "else" - line 160, "pan.___", state 775, "((j<1))" - line 160, "pan.___", state 775, "((j>=1))" - line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 790, "(1)" - line 147, "pan.___", state 798, "(1)" - line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 799, "else" - line 145, "pan.___", state 804, "((j<1))" - line 145, "pan.___", state 804, "((j>=1))" - line 151, "pan.___", state 810, "(1)" - line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 811, "else" - line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 814, "else" - line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 816, "else" - line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 873, "(1)" - line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 890, "(1)" - line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 899, "(1)" - line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 900, "else" - line 160, "pan.___", state 905, "((j<1))" - line 160, "pan.___", state 905, "((j>=1))" - line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 920, "(1)" - line 147, "pan.___", state 928, "(1)" - line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 929, "else" - line 145, "pan.___", state 934, "((j<1))" - line 145, "pan.___", state 934, "((j>=1))" - line 151, "pan.___", state 940, "(1)" - line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 941, "else" - line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 944, "else" - line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 946, "else" - line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1001, "(1)" - line 307, "pan.___", state 1031, "(1)" - line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1097, "(1)" - line 307, "pan.___", state 1127, "(1)" - line 433, "pan.___", state 1140, "-end-" - (125 of 1140 states) -unreached in proctype urcu_writer - line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 59, "(1)" - line 302, "pan.___", state 72, "(1)" - line 307, "pan.___", state 89, "(1)" - line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 151, "(1)" - line 302, "pan.___", state 164, "(1)" - line 467, "pan.___", state 195, "(1)" - line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 237, "(1)" - line 147, "pan.___", state 245, "(1)" - line 151, "pan.___", state 257, "(1)" - line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 923, "(1)" - line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 924, "else" - line 298, "pan.___", state 927, "(1)" - line 298, "pan.___", state 928, "(1)" - line 298, "pan.___", state 928, "(1)" - line 302, "pan.___", state 936, "(1)" - line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 937, "else" - line 302, "pan.___", state 940, "(1)" - line 302, "pan.___", state 941, "(1)" - line 302, "pan.___", state 941, "(1)" - line 300, "pan.___", state 946, "((i<1))" - line 300, "pan.___", state 946, "((i>=1))" - line 307, "pan.___", state 953, "(1)" - line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 954, "else" - line 307, "pan.___", state 957, "(1)" - line 307, "pan.___", state 958, "(1)" - line 307, "pan.___", state 958, "(1)" - line 309, "pan.___", state 961, "(1)" - line 309, "pan.___", state 961, "(1)" - line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1034, "(1)" - line 307, "pan.___", state 1051, "(1)" - line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1122, "(1)" - line 307, "pan.___", state 1139, "(1)" - line 288, "pan.___", state 1156, "(1)" - line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1212, "(1)" - line 307, "pan.___", state 1229, "(1)" - line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1303, "(1)" - line 307, "pan.___", state 1320, "(1)" - line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1365, "(1)" - line 147, "pan.___", state 1373, "(1)" - line 151, "pan.___", state 1385, "(1)" - line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1584, "(1)" - line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 1585, "else" - line 298, "pan.___", state 1588, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 302, "pan.___", state 1597, "(1)" - line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 1598, "else" - line 302, "pan.___", state 1601, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 300, "pan.___", state 1607, "((i<1))" - line 300, "pan.___", state 1607, "((i>=1))" - line 307, "pan.___", state 1614, "(1)" - line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 1615, "else" - line 307, "pan.___", state 1618, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1669, "(1)" - line 147, "pan.___", state 1677, "(1)" - line 151, "pan.___", state 1689, "(1)" - line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input deleted file mode 100644 index 18f99c4..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input +++ /dev/null @@ -1,531 +0,0 @@ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input.trail deleted file mode 100644 index 0d22946..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input.trail +++ /dev/null @@ -1,1902 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3013 -2:2:1132 -3:0:3013 -4:1:0 -5:0:3013 -6:1:1 -7:0:3013 -8:1:2 -9:0:3013 -10:1:3 -11:0:3013 -12:3:2969 -13:0:3013 -14:3:2970 -15:0:3013 -16:3:2971 -17:0:3013 -18:3:2972 -19:0:3013 -20:3:2973 -21:0:3013 -22:3:2974 -23:0:3013 -24:3:2971 -25:0:3013 -26:3:2972 -27:0:3013 -28:3:2973 -29:0:3013 -30:3:2974 -31:0:3013 -32:3:2975 -33:0:3013 -34:3:2980 -35:0:3013 -36:3:2981 -37:0:3013 -38:3:2982 -39:0:3013 -40:3:2983 -41:0:3013 -42:3:2984 -43:0:3013 -44:3:2985 -45:0:3013 -46:3:2982 -47:0:3013 -48:3:2983 -49:0:3013 -50:3:2984 -51:0:3013 -52:3:2985 -53:0:3013 -54:3:2986 -55:0:3013 -56:3:2992 -57:0:3013 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-1836:2:2824 -1837:2:2825 -1838:2:2829 -1839:2:2833 -1840:2:2834 -1841:2:2838 -1842:2:2846 -1843:2:2847 -1844:2:2852 -1845:2:2859 -1846:2:2860 -1847:2:2867 -1848:2:2872 -1849:0:3013 -1850:2:2883 -1851:0:3013 -1852:2:2891 -1853:2:2892 -1854:2:2896 -1855:2:2900 -1856:2:2901 -1857:2:2905 -1858:2:2913 -1859:2:2914 -1860:2:2919 -1861:2:2926 -1862:2:2927 -1863:2:2934 -1864:2:2939 -1865:0:3013 -1866:2:2954 -1867:0:3013 -1868:2:2955 -1869:0:3013 -1870:2:2958 -1871:0:3013 -1872:2:2963 -1873:0:3013 -1874:1:568 -1875:1:572 -1876:1:573 -1877:1:581 -1878:1:582 -1879:1:586 -1880:1:587 -1881:1:595 -1882:1:600 -1883:1:604 -1884:1:605 -1885:1:612 -1886:1:613 -1887:1:624 -1888:1:625 -1889:1:626 -1890:1:637 -1891:1:642 -1892:1:643 -1893:0:3013 -1894:2:2964 -1895:0:3013 -1896:1:655 -1897:0:3011 -1898:2:2963 -1899:0:3017 -1900:1:655 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.define deleted file mode 100644 index e69de29..0000000 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.log deleted file mode 100644 index 708dee2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.log +++ /dev/null @@ -1,415 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_nested.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 566) -Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.2 R= 3e+04 -Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.7 R= 3e+04 -Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 96.8 R= 3e+04 -pan: resizing hashtable to -w22.. done -Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4234, errors: 0 - 4027146 states, stored - 66145121 states, matched - 70172267 transitions (= stored+matched) -2.6437688e+08 atomic steps -hash conflicts: 47318190 (resolved) - -Stats on memory usage (in Megabytes): - 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) - 253.418 actual memory usage for states (compression: 78.55%) - state-vector as stored = 38 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 743.076 total actual memory usage - -unreached in proctype urcu_reader - line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 61, "(1)" - line 307, "pan.___", state 91, "(1)" - line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 149, "(1)" - line 307, "pan.___", state 179, "(1)" - line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 238, "(1)" - line 307, "pan.___", state 268, "(1)" - line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 291, "(1)" - line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 300, "(1)" - line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 301, "else" - line 160, "pan.___", state 306, "((j<1))" - line 160, "pan.___", state 306, "((j>=1))" - line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 321, "(1)" - line 147, "pan.___", state 329, "(1)" - line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 330, "else" - line 145, "pan.___", state 335, "((j<1))" - line 145, "pan.___", state 335, "((j>=1))" - line 151, "pan.___", state 341, "(1)" - line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 342, "else" - line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 345, "else" - line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 347, "else" - line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 404, "(1)" - line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 421, "(1)" - line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 430, "(1)" - line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 431, "else" - line 160, "pan.___", state 436, "((j<1))" - line 160, "pan.___", state 436, "((j>=1))" - line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 451, "(1)" - line 147, "pan.___", state 459, "(1)" - line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 460, "else" - line 145, "pan.___", state 465, "((j<1))" - line 145, "pan.___", state 465, "((j>=1))" - line 151, "pan.___", state 471, "(1)" - line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 472, "else" - line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 475, "else" - line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 477, "else" - line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 537, "(1)" - line 307, "pan.___", state 567, "(1)" - line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 625, "(1)" - line 307, "pan.___", state 655, "(1)" - line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 713, "(1)" - line 307, "pan.___", state 743, "(1)" - line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 760, "(1)" - line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 769, "(1)" - line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 770, "else" - line 160, "pan.___", state 775, "((j<1))" - line 160, "pan.___", state 775, "((j>=1))" - line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 790, "(1)" - line 147, "pan.___", state 798, "(1)" - line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 799, "else" - line 145, "pan.___", state 804, "((j<1))" - line 145, "pan.___", state 804, "((j>=1))" - line 151, "pan.___", state 810, "(1)" - line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 811, "else" - line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 814, "else" - line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 816, "else" - line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 873, "(1)" - line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 890, "(1)" - line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 899, "(1)" - line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 900, "else" - line 160, "pan.___", state 905, "((j<1))" - line 160, "pan.___", state 905, "((j>=1))" - line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 920, "(1)" - line 147, "pan.___", state 928, "(1)" - line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 929, "else" - line 145, "pan.___", state 934, "((j<1))" - line 145, "pan.___", state 934, "((j>=1))" - line 151, "pan.___", state 940, "(1)" - line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 941, "else" - line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 944, "else" - line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 946, "else" - line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1001, "(1)" - line 307, "pan.___", state 1031, "(1)" - line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1097, "(1)" - line 307, "pan.___", state 1127, "(1)" - line 433, "pan.___", state 1140, "-end-" - (125 of 1140 states) -unreached in proctype urcu_writer - line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 59, "(1)" - line 302, "pan.___", state 72, "(1)" - line 307, "pan.___", state 89, "(1)" - line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 151, "(1)" - line 302, "pan.___", state 164, "(1)" - line 467, "pan.___", state 195, "(1)" - line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 237, "(1)" - line 147, "pan.___", state 245, "(1)" - line 151, "pan.___", state 257, "(1)" - line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 923, "(1)" - line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 924, "else" - line 298, "pan.___", state 927, "(1)" - line 298, "pan.___", state 928, "(1)" - line 298, "pan.___", state 928, "(1)" - line 302, "pan.___", state 936, "(1)" - line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 937, "else" - line 302, "pan.___", state 940, "(1)" - line 302, "pan.___", state 941, "(1)" - line 302, "pan.___", state 941, "(1)" - line 300, "pan.___", state 946, "((i<1))" - line 300, "pan.___", state 946, "((i>=1))" - line 307, "pan.___", state 953, "(1)" - line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 954, "else" - line 307, "pan.___", state 957, "(1)" - line 307, "pan.___", state 958, "(1)" - line 307, "pan.___", state 958, "(1)" - line 309, "pan.___", state 961, "(1)" - line 309, "pan.___", state 961, "(1)" - line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1034, "(1)" - line 307, "pan.___", state 1051, "(1)" - line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1122, "(1)" - line 307, "pan.___", state 1139, "(1)" - line 288, "pan.___", state 1156, "(1)" - line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1212, "(1)" - line 307, "pan.___", state 1229, "(1)" - line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1303, "(1)" - line 307, "pan.___", state 1320, "(1)" - line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1365, "(1)" - line 147, "pan.___", state 1373, "(1)" - line 151, "pan.___", state 1385, "(1)" - line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1584, "(1)" - line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 1585, "else" - line 298, "pan.___", state 1588, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 302, "pan.___", state 1597, "(1)" - line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 1598, "else" - line 302, "pan.___", state 1601, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 300, "pan.___", state 1607, "((i<1))" - line 300, "pan.___", state 1607, "((i>=1))" - line 307, "pan.___", state 1614, "(1)" - line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 1615, "else" - line 307, "pan.___", state 1618, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1669, "(1)" - line 147, "pan.___", state 1677, "(1)" - line 151, "pan.___", state 1689, "(1)" - line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail deleted file mode 100644 index 2cefe6b..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail +++ /dev/null @@ -1,7 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:0:2679 -5:3:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.log deleted file mode 100644 index c722840..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.log +++ /dev/null @@ -1,16 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -spin: line 291 "pan.___", Error: syntax error saw 'operator: =' -spin: line 291 "pan.___", Error: syntax error saw 'operator: =' -spin: 2 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input deleted file mode 100644 index 1346c4e..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,533 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 3d2a95e..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2082 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3537 -2:3:3489 -3:3:3492 -4:3:3492 -5:3:3495 -6:3:3503 -7:3:3503 -8:3:3506 -9:3:3512 -10:3:3516 -11:3:3516 -12:3:3519 -13:3:3527 -14:3:3531 -15:3:3532 -16:0:3537 -17:3:3534 -18:0:3537 -19:2:1310 -20:0:3537 -21:2:1316 -22:0:3537 -23:2:1317 -24:0:3537 -25:2:1318 -26:2:1322 -27:2:1323 -28:2:1331 -29:2:1332 -30:2:1336 -31:2:1337 -32:2:1345 -33:2:1350 -34:2:1354 -35:2:1355 -36:2:1362 -37:2:1363 -38:2:1374 -39:2:1375 -40:2:1376 -41:2:1387 -42:2:1392 -43:2:1393 -44:0:3537 -45:2:1405 -46:2:1406 -47:0:3537 -48:2:1410 -49:2:1414 -50:2:1415 -51:2:1423 -52:2:1424 -53:2:1428 -54:2:1429 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-2065:1:704 -2066:1:705 -2067:1:716 -2068:1:717 -2069:1:718 -2070:1:729 -2071:1:734 -2072:1:735 -2073:0:3537 -2074:2:3483 -2075:0:3537 -2076:1:747 -2077:0:3535 -2078:2:3484 -2079:0:3541 -2080:1:1280 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.log deleted file mode 100644 index 6a46f80..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.log +++ /dev/null @@ -1,369 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 567) -Depth= 5645 States= 1e+06 Transitions= 1.47e+07 Memory= 527.287 t= 27.1 R= 4e+04 -pan: claim violated! (at depth 1736) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 5645, errors: 1 - 1039881 states, stored - 14441478 states, matched - 15481359 transitions (= stored+matched) - 57000435 atomic steps -hash conflicts: 2892596 (resolved) - -Stats on memory usage (in Megabytes): - 83.303 equivalent memory usage for states (stored*(State-vector + overhead)) - 64.050 actual memory usage for states (compression: 76.89%) - state-vector as stored = 37 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 529.729 total actual memory usage - -unreached in proctype urcu_reader - line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 61, "(1)" - line 308, "pan.___", state 91, "(1)" - line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 149, "(1)" - line 308, "pan.___", state 179, "(1)" - line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 238, "(1)" - line 308, "pan.___", state 268, "(1)" - line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 291, "(1)" - line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 300, "(1)" - line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 301, "else" - line 161, "pan.___", state 306, "((j<1))" - line 161, "pan.___", state 306, "((j>=1))" - line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 313, "(1)" - line 167, "pan.___", state 314, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 314, "else" - line 177, "pan.___", state 319, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 319, "else" - line 159, "pan.___", state 324, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 159, "pan.___", state 363, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 365, "(1)" - line 163, "pan.___", state 372, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 374, "(1)" - line 163, "pan.___", state 375, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 375, "else" - line 161, "pan.___", state 380, "((j<1))" - line 161, "pan.___", state 380, "((j>=1))" - line 167, "pan.___", state 385, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 387, "(1)" - line 167, "pan.___", state 388, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 388, "else" - line 177, "pan.___", state 393, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 393, "else" - line 289, "pan.___", state 408, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 440, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 453, "(1)" - line 308, "pan.___", state 483, "(1)" - line 289, "pan.___", state 496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 541, "(1)" - line 308, "pan.___", state 571, "(1)" - line 289, "pan.___", state 584, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 629, "(1)" - line 308, "pan.___", state 659, "(1)" - line 159, "pan.___", state 674, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 676, "(1)" - line 163, "pan.___", state 683, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 685, "(1)" - line 163, "pan.___", state 686, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 686, "else" - line 161, "pan.___", state 691, "((j<1))" - line 161, "pan.___", state 691, "((j>=1))" - line 167, "pan.___", state 696, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 698, "(1)" - line 167, "pan.___", state 699, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 699, "else" - line 177, "pan.___", state 704, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 704, "else" - line 159, "pan.___", state 709, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 731, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 159, "pan.___", state 748, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 750, "(1)" - line 163, "pan.___", state 757, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 759, "(1)" - line 163, "pan.___", state 760, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 760, "else" - line 161, "pan.___", state 765, "((j<1))" - line 161, "pan.___", state 765, "((j>=1))" - line 167, "pan.___", state 770, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 773, "else" - line 177, "pan.___", state 778, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 778, "else" - line 289, "pan.___", state 788, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 820, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 833, "(1)" - line 308, "pan.___", state 863, "(1)" - line 289, "pan.___", state 884, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 916, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 929, "(1)" - line 308, "pan.___", state 959, "(1)" - line 434, "pan.___", state 972, "-end-" - (95 of 972 states) -unreached in proctype urcu_writer - line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 20, "(1)" - line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 34, "(1)" - line 293, "pan.___", state 35, "(1)" - line 293, "pan.___", state 35, "(1)" - line 291, "pan.___", state 40, "((i<1))" - line 291, "pan.___", state 40, "((i>=1))" - line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 59, "(1)" - line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 60, "else" - line 299, "pan.___", state 63, "(1)" - line 299, "pan.___", state 64, "(1)" - line 299, "pan.___", state 64, "(1)" - line 303, "pan.___", state 72, "(1)" - line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 73, "else" - line 303, "pan.___", state 76, "(1)" - line 303, "pan.___", state 77, "(1)" - line 303, "pan.___", state 77, "(1)" - line 301, "pan.___", state 82, "((i<1))" - line 301, "pan.___", state 82, "((i>=1))" - line 308, "pan.___", state 89, "(1)" - line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 90, "else" - line 308, "pan.___", state 93, "(1)" - line 308, "pan.___", state 94, "(1)" - line 308, "pan.___", state 94, "(1)" - line 310, "pan.___", state 97, "(1)" - line 310, "pan.___", state 97, "(1)" - line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" - line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 112, "(1)" - line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 126, "(1)" - line 293, "pan.___", state 127, "(1)" - line 293, "pan.___", state 127, "(1)" - line 299, "pan.___", state 151, "(1)" - line 303, "pan.___", state 164, "(1)" - line 310, "pan.___", state 189, "(1)" - line 310, "pan.___", state 189, "(1)" - line 468, "pan.___", state 195, "(1)" - line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 240, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 298, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 755, "(1)" - line 299, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 756, "else" - line 299, "pan.___", state 759, "(1)" - line 299, "pan.___", state 760, "(1)" - line 299, "pan.___", state 760, "(1)" - line 303, "pan.___", state 768, "(1)" - line 303, "pan.___", state 769, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 769, "else" - line 303, "pan.___", state 772, "(1)" - line 303, "pan.___", state 773, "(1)" - line 303, "pan.___", state 773, "(1)" - line 301, "pan.___", state 778, "((i<1))" - line 301, "pan.___", state 778, "((i>=1))" - line 308, "pan.___", state 785, "(1)" - line 308, "pan.___", state 786, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 786, "else" - line 308, "pan.___", state 789, "(1)" - line 308, "pan.___", state 790, "(1)" - line 308, "pan.___", state 790, "(1)" - line 310, "pan.___", state 793, "(1)" - line 310, "pan.___", state 793, "(1)" - line 293, "pan.___", state 822, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 840, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 866, "(1)" - line 308, "pan.___", state 883, "(1)" - line 293, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 954, "(1)" - line 308, "pan.___", state 971, "(1)" - line 289, "pan.___", state 988, "(1)" - line 293, "pan.___", state 1000, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1018, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1044, "(1)" - line 308, "pan.___", state 1061, "(1)" - line 293, "pan.___", state 1091, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1109, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1135, "(1)" - line 308, "pan.___", state 1152, "(1)" - line 163, "pan.___", state 1174, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 1187, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1200, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 298, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1332, "(1)" - line 299, "pan.___", state 1333, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 1333, "else" - line 299, "pan.___", state 1336, "(1)" - line 299, "pan.___", state 1337, "(1)" - line 299, "pan.___", state 1337, "(1)" - line 303, "pan.___", state 1345, "(1)" - line 303, "pan.___", state 1346, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 1346, "else" - line 303, "pan.___", state 1349, "(1)" - line 303, "pan.___", state 1350, "(1)" - line 303, "pan.___", state 1350, "(1)" - line 301, "pan.___", state 1355, "((i<1))" - line 301, "pan.___", state 1355, "((i>=1))" - line 308, "pan.___", state 1362, "(1)" - line 308, "pan.___", state 1363, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 1363, "else" - line 308, "pan.___", state 1366, "(1)" - line 308, "pan.___", state 1367, "(1)" - line 308, "pan.___", state 1367, "(1)" - line 310, "pan.___", state 1370, "(1)" - line 310, "pan.___", state 1370, "(1)" - line 163, "pan.___", state 1394, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 1407, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1420, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 519, "pan.___", state 20, "((j<2))" - line 519, "pan.___", state 20, "((j>=2))" - line 524, "pan.___", state 33, "((j<2))" - line 524, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 572, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 28.5 seconds -pan: rate 36487.053 states/second -pan: avg transition delay 1.8409e-06 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input deleted file mode 100644 index 899fdb4..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,532 +0,0 @@ -#define NO_RMB - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 0aacf1a..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1739 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2529 -2:3:2481 -3:3:2484 -4:3:2484 -5:3:2487 -6:3:2495 -7:3:2495 -8:3:2498 -9:3:2504 -10:3:2508 -11:3:2508 -12:3:2511 -13:3:2519 -14:3:2523 -15:3:2524 -16:0:2529 -17:3:2526 -18:0:2529 -19:2:974 -20:0:2529 -21:2:980 -22:0:2529 -23:2:981 -24:0:2529 -25:2:982 -26:2:986 -27:2:987 -28:2:995 -29:2:996 -30:2:1000 -31:2:1001 -32:2:1009 -33:2:1014 -34:2:1018 -35:2:1019 -36:2:1026 -37:2:1027 -38:2:1038 -39:2:1039 -40:2:1040 -41:2:1051 -42:2:1056 -43:2:1057 -44:0:2529 -45:2:1069 -46:2:1070 -47:0:2529 -48:2:1074 -49:2:1078 -50:2:1079 -51:2:1087 -52:2:1088 -53:2:1092 -54:2:1093 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-1679:0:2529 -1680:2:2475 -1681:0:2529 -1682:1:399 -1683:0:2529 -1684:2:2476 -1685:0:2529 -1686:1:404 -1687:1:408 -1688:1:409 -1689:1:417 -1690:1:418 -1691:1:419 -1692:1:431 -1693:1:436 -1694:1:440 -1695:1:441 -1696:1:448 -1697:1:449 -1698:1:460 -1699:1:461 -1700:1:462 -1701:1:473 -1702:1:485 -1703:1:486 -1704:0:2529 -1705:2:2475 -1706:0:2529 -1707:1:491 -1708:0:2529 -1709:2:2476 -1710:0:2529 -1711:1:492 -1712:1:496 -1713:1:497 -1714:1:505 -1715:1:506 -1716:1:510 -1717:1:511 -1718:1:519 -1719:1:524 -1720:1:528 -1721:1:529 -1722:1:536 -1723:1:537 -1724:1:548 -1725:1:549 -1726:1:550 -1727:1:561 -1728:1:566 -1729:1:567 -1730:0:2529 -1731:2:2475 -1732:0:2529 -1733:1:579 -1734:0:2527 -1735:2:2476 -1736:0:2533 -1737:1:662 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.log deleted file mode 100644 index 477c85d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.log +++ /dev/null @@ -1,381 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 567) -pan: claim violated! (at depth 1889) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 6646, errors: 1 - 377244 states, stored - 5291719 states, matched - 5668963 transitions (= stored+matched) - 20822372 atomic steps -hash conflicts: 405371 (resolved) - -Stats on memory usage (in Megabytes): - 30.221 equivalent memory usage for states (stored*(State-vector + overhead)) - 23.526 actual memory usage for states (compression: 77.85%) - state-vector as stored = 37 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 489.201 total actual memory usage - -unreached in proctype urcu_reader - line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 61, "(1)" - line 308, "pan.___", state 91, "(1)" - line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 149, "(1)" - line 308, "pan.___", state 179, "(1)" - line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 238, "(1)" - line 308, "pan.___", state 268, "(1)" - line 144, "pan.___", state 290, "(1)" - line 148, "pan.___", state 298, "(1)" - line 148, "pan.___", state 299, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 299, "else" - line 146, "pan.___", state 304, "((j<1))" - line 146, "pan.___", state 304, "((j>=1))" - line 152, "pan.___", state 310, "(1)" - line 152, "pan.___", state 311, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 311, "else" - line 186, "pan.___", state 316, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 316, "else" - line 144, "pan.___", state 322, "(1)" - line 148, "pan.___", state 330, "(1)" - line 148, "pan.___", state 331, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 152, "pan.___", state 342, "(1)" - line 152, "pan.___", state 343, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 144, "pan.___", state 358, "(1)" - line 148, "pan.___", state 366, "(1)" - line 148, "pan.___", state 367, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 367, "else" - line 146, "pan.___", state 372, "((j<1))" - line 146, "pan.___", state 372, "((j>=1))" - line 152, "pan.___", state 378, "(1)" - line 152, "pan.___", state 379, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 379, "else" - line 186, "pan.___", state 384, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 384, "else" - line 289, "pan.___", state 399, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 415, "(1)" - line 298, "pan.___", state 431, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 444, "(1)" - line 308, "pan.___", state 474, "(1)" - line 289, "pan.___", state 487, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 519, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 532, "(1)" - line 308, "pan.___", state 562, "(1)" - line 289, "pan.___", state 575, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 607, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 620, "(1)" - line 308, "pan.___", state 650, "(1)" - line 144, "pan.___", state 666, "(1)" - line 148, "pan.___", state 674, "(1)" - line 148, "pan.___", state 675, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 675, "else" - line 146, "pan.___", state 680, "((j<1))" - line 146, "pan.___", state 680, "((j>=1))" - line 152, "pan.___", state 686, "(1)" - line 152, "pan.___", state 687, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 687, "else" - line 186, "pan.___", state 692, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 692, "else" - line 144, "pan.___", state 698, "(1)" - line 148, "pan.___", state 706, "(1)" - line 148, "pan.___", state 707, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 152, "pan.___", state 718, "(1)" - line 152, "pan.___", state 719, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 144, "pan.___", state 734, "(1)" - line 148, "pan.___", state 742, "(1)" - line 148, "pan.___", state 743, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 743, "else" - line 146, "pan.___", state 748, "((j<1))" - line 146, "pan.___", state 748, "((j>=1))" - line 152, "pan.___", state 754, "(1)" - line 152, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 755, "else" - line 186, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 760, "else" - line 289, "pan.___", state 770, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 802, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 815, "(1)" - line 308, "pan.___", state 845, "(1)" - line 289, "pan.___", state 866, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 882, "(1)" - line 298, "pan.___", state 898, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 911, "(1)" - line 308, "pan.___", state 941, "(1)" - line 434, "pan.___", state 954, "-end-" - (79 of 954 states) -unreached in proctype urcu_writer - line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 20, "(1)" - line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 34, "(1)" - line 293, "pan.___", state 35, "(1)" - line 293, "pan.___", state 35, "(1)" - line 291, "pan.___", state 40, "((i<1))" - line 291, "pan.___", state 40, "((i>=1))" - line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 59, "(1)" - line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 60, "else" - line 299, "pan.___", state 63, "(1)" - line 299, "pan.___", state 64, "(1)" - line 299, "pan.___", state 64, "(1)" - line 303, "pan.___", state 72, "(1)" - line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 73, "else" - line 303, "pan.___", state 76, "(1)" - line 303, "pan.___", state 77, "(1)" - line 303, "pan.___", state 77, "(1)" - line 301, "pan.___", state 82, "((i<1))" - line 301, "pan.___", state 82, "((i>=1))" - line 308, "pan.___", state 89, "(1)" - line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 90, "else" - line 308, "pan.___", state 93, "(1)" - line 308, "pan.___", state 94, "(1)" - line 308, "pan.___", state 94, "(1)" - line 310, "pan.___", state 97, "(1)" - line 310, "pan.___", state 97, "(1)" - line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" - line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 112, "(1)" - line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 126, "(1)" - line 293, "pan.___", state 127, "(1)" - line 293, "pan.___", state 127, "(1)" - line 291, "pan.___", state 132, "((i<1))" - line 291, "pan.___", state 132, "((i>=1))" - line 299, "pan.___", state 151, "(1)" - line 299, "pan.___", state 152, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 152, "else" - line 299, "pan.___", state 155, "(1)" - line 299, "pan.___", state 156, "(1)" - line 299, "pan.___", state 156, "(1)" - line 303, "pan.___", state 164, "(1)" - line 303, "pan.___", state 165, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 165, "else" - line 303, "pan.___", state 168, "(1)" - line 303, "pan.___", state 169, "(1)" - line 303, "pan.___", state 169, "(1)" - line 301, "pan.___", state 174, "((i<1))" - line 301, "pan.___", state 174, "((i>=1))" - line 308, "pan.___", state 181, "(1)" - line 308, "pan.___", state 182, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 182, "else" - line 308, "pan.___", state 185, "(1)" - line 308, "pan.___", state 186, "(1)" - line 308, "pan.___", state 186, "(1)" - line 310, "pan.___", state 189, "(1)" - line 310, "pan.___", state 189, "(1)" - line 468, "pan.___", state 195, "(1)" - line 462, "pan.___", state 198, "((write_lock==0))" - line 462, "pan.___", state 198, "else" - line 460, "pan.___", state 199, "(1)" - line 144, "pan.___", state 206, "(1)" - line 148, "pan.___", state 214, "(1)" - line 148, "pan.___", state 215, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 215, "else" - line 146, "pan.___", state 220, "((j<1))" - line 146, "pan.___", state 220, "((j>=1))" - line 152, "pan.___", state 226, "(1)" - line 152, "pan.___", state 227, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 227, "else" - line 186, "pan.___", state 232, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 232, "else" - line 144, "pan.___", state 238, "(1)" - line 152, "pan.___", state 258, "(1)" - line 144, "pan.___", state 274, "(1)" - line 148, "pan.___", state 282, "(1)" - line 152, "pan.___", state 294, "(1)" - line 289, "pan.___", state 310, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 342, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 355, "(1)" - line 303, "pan.___", state 368, "(1)" - line 308, "pan.___", state 385, "(1)" - line 289, "pan.___", state 402, "(1)" - line 293, "pan.___", state 414, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 432, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 458, "(1)" - line 308, "pan.___", state 475, "(1)" - line 293, "pan.___", state 505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 523, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 549, "(1)" - line 308, "pan.___", state 566, "(1)" - line 148, "pan.___", state 588, "(1)" - line 152, "pan.___", state 600, "(1)" - line 144, "pan.___", state 612, "(1)" - line 152, "pan.___", state 632, "(1)" - line 148, "pan.___", state 656, "(1)" - line 152, "pan.___", state 668, "(1)" - line 289, "pan.___", state 692, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 694, "(1)" - line 289, "pan.___", state 695, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 289, "pan.___", state 695, "else" - line 289, "pan.___", state 698, "(1)" - line 293, "pan.___", state 706, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 708, "(1)" - line 293, "pan.___", state 709, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 293, "pan.___", state 709, "else" - line 293, "pan.___", state 712, "(1)" - line 293, "pan.___", state 713, "(1)" - line 293, "pan.___", state 713, "(1)" - line 291, "pan.___", state 718, "((i<1))" - line 291, "pan.___", state 718, "((i>=1))" - line 298, "pan.___", state 724, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 737, "(1)" - line 299, "pan.___", state 738, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 738, "else" - line 299, "pan.___", state 741, "(1)" - line 299, "pan.___", state 742, "(1)" - line 299, "pan.___", state 742, "(1)" - line 303, "pan.___", state 750, "(1)" - line 303, "pan.___", state 751, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 751, "else" - line 303, "pan.___", state 754, "(1)" - line 303, "pan.___", state 755, "(1)" - line 303, "pan.___", state 755, "(1)" - line 301, "pan.___", state 760, "((i<1))" - line 301, "pan.___", state 760, "((i>=1))" - line 308, "pan.___", state 767, "(1)" - line 308, "pan.___", state 768, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 768, "else" - line 308, "pan.___", state 771, "(1)" - line 308, "pan.___", state 772, "(1)" - line 308, "pan.___", state 772, "(1)" - line 310, "pan.___", state 775, "(1)" - line 310, "pan.___", state 775, "(1)" - line 293, "pan.___", state 804, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 822, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 848, "(1)" - line 308, "pan.___", state 865, "(1)" - line 293, "pan.___", state 892, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 936, "(1)" - line 308, "pan.___", state 953, "(1)" - line 289, "pan.___", state 970, "(1)" - line 293, "pan.___", state 982, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1000, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1026, "(1)" - line 308, "pan.___", state 1043, "(1)" - line 293, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1117, "(1)" - line 308, "pan.___", state 1134, "(1)" - line 148, "pan.___", state 1156, "(1)" - line 152, "pan.___", state 1168, "(1)" - line 144, "pan.___", state 1180, "(1)" - line 152, "pan.___", state 1200, "(1)" - line 148, "pan.___", state 1224, "(1)" - line 152, "pan.___", state 1236, "(1)" - line 289, "pan.___", state 1260, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 1262, "(1)" - line 289, "pan.___", state 1263, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 289, "pan.___", state 1263, "else" - line 289, "pan.___", state 1266, "(1)" - line 293, "pan.___", state 1274, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 1276, "(1)" - line 293, "pan.___", state 1277, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 293, "pan.___", state 1277, "else" - line 293, "pan.___", state 1280, "(1)" - line 293, "pan.___", state 1281, "(1)" - line 293, "pan.___", state 1281, "(1)" - line 291, "pan.___", state 1286, "((i<1))" - line 291, "pan.___", state 1286, "((i>=1))" - line 298, "pan.___", state 1292, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1305, "(1)" - line 299, "pan.___", state 1306, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 1306, "else" - line 299, "pan.___", state 1309, "(1)" - line 299, "pan.___", state 1310, "(1)" - line 299, "pan.___", state 1310, "(1)" - line 303, "pan.___", state 1318, "(1)" - line 303, "pan.___", state 1319, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 1319, "else" - line 303, "pan.___", state 1322, "(1)" - line 303, "pan.___", state 1323, "(1)" - line 303, "pan.___", state 1323, "(1)" - line 301, "pan.___", state 1328, "((i<1))" - line 301, "pan.___", state 1328, "((i>=1))" - line 308, "pan.___", state 1335, "(1)" - line 308, "pan.___", state 1336, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 1336, "else" - line 308, "pan.___", state 1339, "(1)" - line 308, "pan.___", state 1340, "(1)" - line 308, "pan.___", state 1340, "(1)" - line 310, "pan.___", state 1343, "(1)" - line 310, "pan.___", state 1343, "(1)" - line 148, "pan.___", state 1367, "(1)" - line 152, "pan.___", state 1379, "(1)" - line 144, "pan.___", state 1391, "(1)" - line 152, "pan.___", state 1411, "(1)" - line 148, "pan.___", state 1435, "(1)" - line 152, "pan.___", state 1447, "(1)" - line 511, "pan.___", state 1473, "-end-" - (159 of 1473 states) -unreached in proctype :init: - line 518, "pan.___", state 9, "((j<2))" - line 518, "pan.___", state 9, "((j>=2))" - line 519, "pan.___", state 20, "((j<2))" - line 519, "pan.___", state 20, "((j>=2))" - line 524, "pan.___", state 33, "((j<2))" - line 524, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 572, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 10.4 seconds -pan: rate 36378.399 states/second -pan: avg transition delay 1.8293e-06 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input deleted file mode 100644 index 12cde50..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,532 +0,0 @@ -#define NO_WMB - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index ec82525..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1892 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2475 -2:3:2427 -3:3:2430 -4:3:2430 -5:3:2433 -6:3:2441 -7:3:2441 -8:3:2444 -9:3:2450 -10:3:2454 -11:3:2454 -12:3:2457 -13:3:2465 -14:3:2469 -15:3:2470 -16:0:2475 -17:3:2472 -18:0:2475 -19:2:956 -20:0:2475 -21:2:962 -22:0:2475 -23:2:963 -24:0:2475 -25:2:964 -26:2:968 -27:2:969 -28:2:977 -29:2:978 -30:2:982 -31:2:983 -32:2:991 -33:2:996 -34:2:1000 -35:2:1001 -36:2:1008 -37:2:1009 -38:2:1020 -39:2:1021 -40:2:1022 -41:2:1033 -42:2:1038 -43:2:1039 -44:0:2475 -45:2:1051 -46:2:1052 -47:0:2475 -48:2:1056 -49:2:1060 -50:2:1061 -51:2:1069 -52:2:1070 -53:2:1074 -54:2:1075 -55:2:1083 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-1702:0:2475 -1703:2:1440 -1704:0:2475 -1705:2:1441 -1706:2:1445 -1707:2:1446 -1708:2:1454 -1709:2:1455 -1710:2:1459 -1711:2:1460 -1712:2:1468 -1713:2:1473 -1714:2:1477 -1715:2:1478 -1716:2:1485 -1717:2:1486 -1718:2:1497 -1719:2:1498 -1720:2:1499 -1721:2:1510 -1722:2:1515 -1723:2:1516 -1724:0:2475 -1725:2:1633 -1726:0:2475 -1727:2:1729 -1728:0:2475 -1729:2:1730 -1730:0:2475 -1731:2:1734 -1732:0:2475 -1733:2:1740 -1734:2:1744 -1735:2:1745 -1736:2:1753 -1737:2:1754 -1738:2:1758 -1739:2:1759 -1740:2:1767 -1741:2:1772 -1742:2:1776 -1743:2:1777 -1744:2:1784 -1745:2:1785 -1746:2:1796 -1747:2:1797 -1748:2:1798 -1749:2:1809 -1750:2:1814 -1751:2:1815 -1752:0:2475 -1753:2:1827 -1754:0:2475 -1755:2:1828 -1756:2:1832 -1757:2:1833 -1758:2:1841 -1759:2:1842 -1760:2:1846 -1761:2:1847 -1762:2:1855 -1763:2:1860 -1764:2:1864 -1765:2:1865 -1766:2:1872 -1767:2:1873 -1768:2:1884 -1769:2:1885 -1770:2:1886 -1771:2:1897 -1772:2:1902 -1773:2:1903 -1774:0:2475 -1775:2:1915 -1776:0:2475 -1777:2:1918 -1778:2:1919 -1779:2:1931 -1780:2:1932 -1781:2:1936 -1782:2:1937 -1783:2:1945 -1784:2:1950 -1785:2:1954 -1786:2:1955 -1787:2:1962 -1788:2:1963 -1789:2:1974 -1790:2:1975 -1791:2:1976 -1792:2:1987 -1793:2:1992 -1794:2:1993 -1795:0:2475 -1796:2:2005 -1797:0:2475 -1798:2:2006 -1799:0:2475 -1800:2:2007 -1801:0:2475 -1802:2:2008 -1803:0:2475 -1804:2:2009 -1805:2:2013 -1806:2:2014 -1807:2:2022 -1808:2:2023 -1809:2:2027 -1810:2:2028 -1811:2:2036 -1812:2:2041 -1813:2:2045 -1814:2:2046 -1815:2:2053 -1816:2:2054 -1817:2:2065 -1818:2:2066 -1819:2:2067 -1820:2:2078 -1821:2:2083 -1822:2:2084 -1823:0:2475 -1824:2:2201 -1825:0:2475 -1826:2:2297 -1827:0:2475 -1828:2:2298 -1829:0:2475 -1830:2:2302 -1831:0:2475 -1832:2:2308 -1833:0:2475 -1834:2:2309 -1835:2:2316 -1836:2:2317 -1837:2:2324 -1838:2:2329 -1839:0:2475 -1840:2:2340 -1841:0:2475 -1842:2:2341 -1843:2:2348 -1844:2:2351 -1845:2:2352 -1846:2:2356 -1847:2:2361 -1848:0:2475 -1849:2:2372 -1850:0:2475 -1851:2:2377 -1852:2:2384 -1853:2:2385 -1854:2:2392 -1855:2:2397 -1856:0:2475 -1857:2:2412 -1858:0:2475 -1859:2:2413 -1860:0:2475 -1861:2:2416 -1862:0:2475 -1863:2:2421 -1864:0:2475 -1865:1:483 -1866:1:487 -1867:1:488 -1868:1:496 -1869:1:497 -1870:1:498 -1871:1:510 -1872:1:515 -1873:1:519 -1874:1:520 -1875:1:527 -1876:1:528 -1877:1:539 -1878:1:540 -1879:1:541 -1880:1:552 -1881:1:557 -1882:1:558 -1883:0:2475 -1884:2:2422 -1885:0:2475 -1886:1:570 -1887:0:2473 -1888:2:2421 -1889:0:2479 -1890:1:151 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.log deleted file mode 100644 index 6a9d040..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.log +++ /dev/null @@ -1,349 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 567) -pan: claim violated! (at depth 1353) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3705, errors: 1 - 216253 states, stored - 2924019 states, matched - 3140272 transitions (= stored+matched) - 11791015 atomic steps -hash conflicts: 155585 (resolved) - -Stats on memory usage (in Megabytes): - 17.324 equivalent memory usage for states (stored*(State-vector + overhead)) - 13.576 actual memory usage for states (compression: 78.37%) - state-vector as stored = 38 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 479.338 total actual memory usage - -unreached in proctype urcu_reader - line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 61, "(1)" - line 308, "pan.___", state 91, "(1)" - line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 149, "(1)" - line 308, "pan.___", state 179, "(1)" - line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 238, "(1)" - line 308, "pan.___", state 268, "(1)" - line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 291, "(1)" - line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 300, "(1)" - line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 301, "else" - line 161, "pan.___", state 306, "((j<1))" - line 161, "pan.___", state 306, "((j>=1))" - line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 321, "(1)" - line 148, "pan.___", state 329, "(1)" - line 148, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 330, "else" - line 146, "pan.___", state 335, "((j<1))" - line 146, "pan.___", state 335, "((j>=1))" - line 152, "pan.___", state 341, "(1)" - line 152, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 342, "else" - line 154, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 345, "else" - line 186, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 347, "else" - line 159, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 152, "pan.___", state 404, "(1)" - line 152, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 421, "(1)" - line 163, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 430, "(1)" - line 163, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 431, "else" - line 161, "pan.___", state 436, "((j<1))" - line 161, "pan.___", state 436, "((j>=1))" - line 167, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 451, "(1)" - line 148, "pan.___", state 459, "(1)" - line 148, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 460, "else" - line 146, "pan.___", state 465, "((j<1))" - line 146, "pan.___", state 465, "((j>=1))" - line 152, "pan.___", state 471, "(1)" - line 152, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 472, "else" - line 154, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 475, "else" - line 186, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 477, "else" - line 289, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 537, "(1)" - line 308, "pan.___", state 567, "(1)" - line 289, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 625, "(1)" - line 308, "pan.___", state 655, "(1)" - line 289, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 713, "(1)" - line 308, "pan.___", state 743, "(1)" - line 159, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 760, "(1)" - line 163, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 769, "(1)" - line 163, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 770, "else" - line 161, "pan.___", state 775, "((j<1))" - line 161, "pan.___", state 775, "((j>=1))" - line 167, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 790, "(1)" - line 148, "pan.___", state 798, "(1)" - line 148, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 799, "else" - line 146, "pan.___", state 804, "((j<1))" - line 146, "pan.___", state 804, "((j>=1))" - line 152, "pan.___", state 810, "(1)" - line 152, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 811, "else" - line 154, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 814, "else" - line 186, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 816, "else" - line 159, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 152, "pan.___", state 873, "(1)" - line 152, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 890, "(1)" - line 163, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 899, "(1)" - line 163, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 900, "else" - line 161, "pan.___", state 905, "((j<1))" - line 161, "pan.___", state 905, "((j>=1))" - line 167, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 920, "(1)" - line 148, "pan.___", state 928, "(1)" - line 148, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 929, "else" - line 146, "pan.___", state 934, "((j<1))" - line 146, "pan.___", state 934, "((j>=1))" - line 152, "pan.___", state 940, "(1)" - line 152, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 941, "else" - line 154, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 944, "else" - line 186, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 946, "else" - line 289, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1001, "(1)" - line 308, "pan.___", state 1031, "(1)" - line 289, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1097, "(1)" - line 308, "pan.___", state 1127, "(1)" - line 434, "pan.___", state 1140, "-end-" - (125 of 1140 states) -unreached in proctype urcu_writer - line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 59, "(1)" - line 303, "pan.___", state 72, "(1)" - line 308, "pan.___", state 89, "(1)" - line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 151, "(1)" - line 303, "pan.___", state 164, "(1)" - line 468, "pan.___", state 195, "(1)" - line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 237, "(1)" - line 148, "pan.___", state 245, "(1)" - line 152, "pan.___", state 257, "(1)" - line 159, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 923, "(1)" - line 299, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 924, "else" - line 299, "pan.___", state 927, "(1)" - line 299, "pan.___", state 928, "(1)" - line 299, "pan.___", state 928, "(1)" - line 303, "pan.___", state 936, "(1)" - line 303, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 937, "else" - line 303, "pan.___", state 940, "(1)" - line 303, "pan.___", state 941, "(1)" - line 303, "pan.___", state 941, "(1)" - line 301, "pan.___", state 946, "((i<1))" - line 301, "pan.___", state 946, "((i>=1))" - line 308, "pan.___", state 953, "(1)" - line 308, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 954, "else" - line 308, "pan.___", state 957, "(1)" - line 308, "pan.___", state 958, "(1)" - line 308, "pan.___", state 958, "(1)" - line 310, "pan.___", state 961, "(1)" - line 310, "pan.___", state 961, "(1)" - line 163, "pan.___", state 985, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 998, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 1008, "(1)" - line 148, "pan.___", state 1016, "(1)" - line 152, "pan.___", state 1028, "(1)" - line 159, "pan.___", state 1039, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 519, "pan.___", state 20, "((j<2))" - line 519, "pan.___", state 20, "((j>=2))" - line 524, "pan.___", state 33, "((j<2))" - line 524, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 572, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 5.58 seconds -pan: rate 38755.018 states/second -pan: avg transition delay 1.7769e-06 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input deleted file mode 100644 index 244a7b2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,532 +0,0 @@ -#define SINGLE_FLIP - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 363553e..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1356 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2372 -2:3:2324 -3:3:2327 -4:3:2327 -5:3:2330 -6:3:2338 -7:3:2338 -8:3:2341 -9:3:2347 -10:3:2351 -11:3:2351 -12:3:2354 -13:3:2362 -14:3:2366 -15:3:2367 -16:0:2372 -17:3:2369 -18:0:2372 -19:2:1142 -20:0:2372 -21:2:1148 -22:0:2372 -23:2:1149 -24:0:2372 -25:2:1150 -26:2:1154 -27:2:1155 -28:2:1163 -29:2:1164 -30:2:1168 -31:2:1169 -32:2:1177 -33:2:1182 -34:2:1186 -35:2:1187 -36:2:1194 -37:2:1195 -38:2:1206 -39:2:1207 -40:2:1208 -41:2:1219 -42:2:1224 -43:2:1225 -44:0:2372 -45:2:1237 -46:2:1238 -47:0:2372 -48:2:1242 -49:2:1246 -50:2:1247 -51:2:1255 -52:2:1256 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mode 100644 index 8718641..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.log deleted file mode 100644 index ceb438f..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.log +++ /dev/null @@ -1,16 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -spin: line 296 replacement value: tmp -spin: line 296 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' -spin: 1 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input deleted file mode 100644 index cc55960..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input +++ /dev/null @@ -1,410 +0,0 @@ -#define READER_PROGRESS -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.log deleted file mode 100644 index 985f839..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.log +++ /dev/null @@ -1,14 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input deleted file mode 100644 index 28f1299..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input +++ /dev/null @@ -1,410 +0,0 @@ -#define WRITER_PROGRESS -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.define b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.log b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.log deleted file mode 100644 index 26b6236..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.log +++ /dev/null @@ -1,16 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -spin: line 297 replacement value: tmp -spin: line 297 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' -spin: 1 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input deleted file mode 100644 index 43e979c..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,411 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index ff6f1c5..0000000 --- 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WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu.spin b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.log deleted file mode 100644 index 9a22c47..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.log +++ /dev/null @@ -1,345 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 741) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10669, errors: 0 - 20146 states, stored - 191615 states, matched - 211761 transitions (= stored+matched) - 712676 atomic steps -hash conflicts: 1523 (resolved) - -Stats on memory usage (in Megabytes): - 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.661 actual memory usage for states (unsuccessful compression: 102.92%) - state-vector as stored = 58 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.326 total actual memory usage - -unreached in proctype urcu_reader_sig - line 401, "pan.___", state 330, "(1)" - line 612, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 397, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 406, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, "pan.___", state 59, "(1)" - line 416, "pan.___", state 89, "(1)" - line 397, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 160, "(1)" - line 650, "pan.___", state 213, "(1)" - line 173, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 177, "pan.___", state 233, "(1)" - line 158, "pan.___", state 254, "(1)" - line 162, "pan.___", state 262, "(1)" - line 166, "pan.___", state 274, "(1)" - line 173, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 752, "(1)" - line 162, "pan.___", state 760, "(1)" - line 162, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 761, "else" - line 160, "pan.___", state 766, "((j<1))" - line 160, "pan.___", state 766, "((j>=1))" - line 166, "pan.___", state 772, "(1)" - line 166, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 773, "else" - line 168, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 776, "else" - line 173, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, "pan.___", state 835, "(1)" - line 166, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, "pan.___", state 852, "(1)" - line 177, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, "pan.___", state 861, "(1)" - line 177, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, "pan.___", state 862, "else" - line 175, "pan.___", state 867, "((j<1))" - line 175, "pan.___", state 867, "((j>=1))" - line 181, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 882, "(1)" - line 162, "pan.___", state 890, "(1)" - line 162, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 891, "else" - line 160, "pan.___", state 896, "((j<1))" - line 160, "pan.___", state 896, "((j>=1))" - line 166, "pan.___", state 902, "(1)" - line 166, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 903, "else" - line 168, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 906, "else" - line 200, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, "pan.___", state 908, "else" - line 219, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, "pan.___", state 909, "else" - line 354, "pan.___", state 915, "((sighand_exec==1))" - line 354, "pan.___", state 915, "else" - line 360, "pan.___", state 918, "sighand_exec = 1" - line 397, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, "pan.___", state 933, "(1)" - line 397, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, "pan.___", state 934, "else" - line 397, "pan.___", state 937, "(1)" - line 401, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, "pan.___", state 947, "(1)" - line 401, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, "pan.___", state 948, "else" - line 401, "pan.___", state 951, "(1)" - line 401, "pan.___", state 952, "(1)" - line 401, "pan.___", state 952, "(1)" - line 399, "pan.___", state 957, "((i<1))" - line 399, "pan.___", state 957, "((i>=1))" - line 406, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, "pan.___", state 976, "(1)" - line 407, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, "pan.___", state 977, "else" - line 407, "pan.___", state 980, "(1)" - line 407, "pan.___", state 981, "(1)" - line 407, "pan.___", state 981, "(1)" - line 411, "pan.___", state 989, "(1)" - line 411, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, "pan.___", state 990, "else" - line 411, "pan.___", state 993, "(1)" - line 411, "pan.___", state 994, "(1)" - line 411, "pan.___", state 994, "(1)" - line 409, "pan.___", state 999, "((i<1))" - line 409, "pan.___", state 999, "((i>=1))" - line 416, "pan.___", state 1006, "(1)" - line 416, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, "pan.___", state 1007, "else" - line 416, "pan.___", state 1010, "(1)" - line 416, "pan.___", state 1011, "(1)" - line 416, "pan.___", state 1011, "(1)" - line 418, "pan.___", state 1014, "(1)" - line 418, "pan.___", state 1014, "(1)" - line 360, "pan.___", state 1023, "sighand_exec = 1" - line 401, "pan.___", state 1054, "(1)" - line 406, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1113, "(1)" - line 401, "pan.___", state 1151, "(1)" - line 406, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1210, "(1)" - line 397, "pan.___", state 1236, "(1)" - line 401, "pan.___", state 1250, "(1)" - line 406, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1309, "(1)" - line 401, "pan.___", state 1350, "(1)" - line 406, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1409, "(1)" - line 173, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, "pan.___", state 1432, "(1)" - line 177, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, "pan.___", state 1441, "(1)" - line 177, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, "pan.___", state 1442, "else" - line 175, "pan.___", state 1447, "((j<1))" - line 175, "pan.___", state 1447, "((j>=1))" - line 181, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 1462, "(1)" - line 162, "pan.___", state 1470, "(1)" - line 162, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 1471, "else" - line 160, "pan.___", state 1476, "((j<1))" - line 160, "pan.___", state 1476, "((j>=1))" - line 166, "pan.___", state 1482, "(1)" - line 166, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 1483, "else" - line 168, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 1486, "else" - line 173, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, "pan.___", state 1545, "(1)" - line 166, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, "pan.___", state 1562, "(1)" - line 177, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, "pan.___", state 1571, "(1)" - line 177, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, "pan.___", state 1572, "else" - line 175, "pan.___", state 1577, "((j<1))" - line 175, "pan.___", state 1577, "((j>=1))" - line 181, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 1592, "(1)" - line 162, "pan.___", state 1600, "(1)" - line 162, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 1601, "else" - line 160, "pan.___", state 1606, "((j<1))" - line 160, "pan.___", state 1606, "((j>=1))" - line 166, "pan.___", state 1612, "(1)" - line 166, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 1613, "else" - line 168, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 1616, "else" - line 200, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, "pan.___", state 1618, "else" - line 219, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, "pan.___", state 1619, "else" - line 354, "pan.___", state 1625, "((sighand_exec==1))" - line 354, "pan.___", state 1625, "else" - line 360, "pan.___", state 1628, "sighand_exec = 1" - line 397, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, "pan.___", state 1643, "(1)" - line 397, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, "pan.___", state 1644, "else" - line 397, "pan.___", state 1647, "(1)" - line 401, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, "pan.___", state 1657, "(1)" - line 401, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, "pan.___", state 1658, "else" - line 401, "pan.___", state 1661, "(1)" - line 401, "pan.___", state 1662, "(1)" - line 401, "pan.___", state 1662, "(1)" - line 399, "pan.___", state 1667, "((i<1))" - line 399, "pan.___", state 1667, "((i>=1))" - line 406, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, "pan.___", state 1686, "(1)" - line 407, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, "pan.___", state 1687, "else" - line 407, "pan.___", state 1690, "(1)" - line 407, "pan.___", state 1691, "(1)" - line 407, "pan.___", state 1691, "(1)" - line 411, "pan.___", state 1699, "(1)" - line 411, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, "pan.___", state 1700, "else" - line 411, "pan.___", state 1703, "(1)" - line 411, "pan.___", state 1704, "(1)" - line 411, "pan.___", state 1704, "(1)" - line 409, "pan.___", state 1709, "((i<1))" - line 409, "pan.___", state 1709, "((i>=1))" - line 416, "pan.___", state 1716, "(1)" - line 416, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, "pan.___", state 1717, "else" - line 416, "pan.___", state 1720, "(1)" - line 416, "pan.___", state 1721, "(1)" - line 416, "pan.___", state 1721, "(1)" - line 418, "pan.___", state 1724, "(1)" - line 418, "pan.___", state 1724, "(1)" - line 360, "pan.___", state 1733, "sighand_exec = 1" - line 177, "pan.___", state 1758, "(1)" - line 181, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 1779, "(1)" - line 162, "pan.___", state 1787, "(1)" - line 166, "pan.___", state 1799, "(1)" - line 173, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input deleted file mode 100644 index 953115f..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input +++ /dev/null @@ -1,721 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input.trail deleted file mode 100644 index 837f3d9..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input.trail +++ /dev/null @@ -1,15043 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 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READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.log deleted file mode 100644 index 1bc5996..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.log +++ /dev/null @@ -1,232 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_nested.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 715) -Depth= 22961 States= 1e+06 Transitions= 8.79e+06 Memory= 535.002 t= 17.2 R= 6e+04 -Depth= 22961 States= 2e+06 Transitions= 1.79e+07 Memory= 603.654 t= 34.7 R= 6e+04 -Depth= 25030 States= 3e+06 Transitions= 2.69e+07 Memory= 672.404 t= 52.6 R= 6e+04 -pan: resizing hashtable to -w22.. done -Depth= 25030 States= 4e+06 Transitions= 3.73e+07 Memory= 772.080 t= 74.4 R= 5e+04 -Depth= 25030 States= 5e+06 Transitions= 4.77e+07 Memory= 840.830 t= 96.2 R= 5e+04 -Depth= 25030 States= 6e+06 Transitions= 5.45e+07 Memory= 909.483 t= 110 R= 5e+04 -Depth= 25030 States= 7e+06 Transitions= 6.05e+07 Memory= 978.135 t= 122 R= 6e+04 -Depth= 25030 States= 8e+06 Transitions= 6.68e+07 Memory= 1046.787 t= 135 R= 6e+04 -Depth= 25030 States= 9e+06 Transitions= 7.29e+07 Memory= 1115.537 t= 148 R= 6e+04 -pan: resizing hashtable to -w24.. done -Depth= 25030 States= 1e+07 Transitions= 7.91e+07 Memory= 1308.283 t= 162 R= 6e+04 -Depth= 25030 States= 1.1e+07 Transitions= 8.5e+07 Memory= 1376.936 t= 174 R= 6e+04 -Depth= 25030 States= 1.2e+07 Transitions= 9.12e+07 Memory= 1445.588 t= 186 R= 6e+04 -Depth= 25030 States= 1.3e+07 Transitions= 9.79e+07 Memory= 1514.240 t= 200 R= 7e+04 -Depth= 25030 States= 1.4e+07 Transitions= 1.09e+08 Memory= 1582.990 t= 222 R= 6e+04 -Depth= 25030 States= 1.5e+07 Transitions= 1.18e+08 Memory= 1651.643 t= 240 R= 6e+04 -Depth= 25030 States= 1.6e+07 Transitions= 1.27e+08 Memory= 1720.295 t= 258 R= 6e+04 -Depth= 25030 States= 1.7e+07 Transitions= 1.36e+08 Memory= 1788.947 t= 276 R= 6e+04 -Depth= 25030 States= 1.8e+07 Transitions= 1.44e+08 Memory= 1857.697 t= 292 R= 6e+04 -Depth= 25030 States= 1.9e+07 Transitions= 1.54e+08 Memory= 1926.350 t= 313 R= 6e+04 -Depth= 25030 States= 2e+07 Transitions= 1.64e+08 Memory= 1995.002 t= 333 R= 6e+04 -Depth= 25104 States= 2.1e+07 Transitions= 1.73e+08 Memory= 2063.654 t= 350 R= 6e+04 -Depth= 25104 States= 2.2e+07 Transitions= 1.83e+08 Memory= 2132.404 t= 370 R= 6e+04 -Depth= 25104 States= 2.3e+07 Transitions= 1.89e+08 Memory= 2201.057 t= 384 R= 6e+04 -Depth= 25152 States= 2.4e+07 Transitions= 1.98e+08 Memory= 2269.709 t= 402 R= 6e+04 -Depth= 25152 States= 2.5e+07 Transitions= 2.08e+08 Memory= 2338.361 t= 421 R= 6e+04 -Depth= 25152 States= 2.6e+07 Transitions= 2.15e+08 Memory= 2407.111 t= 436 R= 6e+04 -Depth= 25152 States= 2.7e+07 Transitions= 2.24e+08 Memory= 2475.764 t= 454 R= 6e+04 -Depth= 25152 States= 2.8e+07 Transitions= 2.33e+08 Memory= 2544.416 t= 471 R= 6e+04 -Depth= 25152 States= 2.9e+07 Transitions= 2.42e+08 Memory= 2613.068 t= 490 R= 6e+04 -Depth= 32255 States= 3e+07 Transitions= 2.5e+08 Memory= 2681.818 t= 506 R= 6e+04 -Depth= 33413 States= 3.1e+07 Transitions= 2.61e+08 Memory= 2750.471 t= 530 R= 6e+04 -Depth= 33413 States= 3.2e+07 Transitions= 2.73e+08 Memory= 2819.123 t= 555 R= 6e+04 -Depth= 33413 States= 3.3e+07 Transitions= 2.83e+08 Memory= 2887.873 t= 576 R= 6e+04 -Depth= 33413 States= 3.4e+07 Transitions= 2.94e+08 Memory= 2956.526 t= 598 R= 6e+04 -pan: resizing hashtable to -w26.. done -Depth= 33413 States= 3.5e+07 Transitions= 3.03e+08 Memory= 3521.260 t= 624 R= 6e+04 -Depth= 33413 States= 3.6e+07 Transitions= 3.15e+08 Memory= 3589.912 t= 648 R= 6e+04 -Depth= 33413 States= 3.7e+07 Transitions= 3.25e+08 Memory= 3658.565 t= 667 R= 6e+04 -Depth= 33413 States= 3.8e+07 Transitions= 3.34e+08 Memory= 3727.315 t= 687 R= 6e+04 -Depth= 33413 States= 3.9e+07 Transitions= 3.4e+08 Memory= 3795.967 t= 699 R= 6e+04 -Depth= 33413 States= 4e+07 Transitions= 3.48e+08 Memory= 3864.619 t= 715 R= 6e+04 -Depth= 33413 States= 4.1e+07 Transitions= 3.58e+08 Memory= 3933.272 t= 735 R= 6e+04 -Depth= 33413 States= 4.2e+07 Transitions= 3.64e+08 Memory= 4002.022 t= 747 R= 6e+04 -Depth= 33413 States= 4.3e+07 Transitions= 3.72e+08 Memory= 4070.674 t= 762 R= 6e+04 -Depth= 33413 States= 4.4e+07 Transitions= 3.82e+08 Memory= 4139.326 t= 783 R= 6e+04 -Depth= 33413 States= 4.5e+07 Transitions= 3.89e+08 Memory= 4207.979 t= 799 R= 6e+04 -Depth= 33413 States= 4.6e+07 Transitions= 3.95e+08 Memory= 4276.631 t= 810 R= 6e+04 -Depth= 33413 States= 4.7e+07 Transitions= 4.01e+08 Memory= 4345.381 t= 823 R= 6e+04 -Depth= 33413 States= 4.8e+07 Transitions= 4.07e+08 Memory= 4414.033 t= 835 R= 6e+04 -Depth= 33413 States= 4.9e+07 Transitions= 4.16e+08 Memory= 4482.686 t= 852 R= 6e+04 -Depth= 33413 States= 5e+07 Transitions= 4.25e+08 Memory= 4551.338 t= 871 R= 6e+04 -Depth= 33413 States= 5.1e+07 Transitions= 4.31e+08 Memory= 4620.088 t= 883 R= 6e+04 -Depth= 33413 States= 5.2e+07 Transitions= 4.37e+08 Memory= 4688.740 t= 896 R= 6e+04 -Depth= 33413 States= 5.3e+07 Transitions= 4.43e+08 Memory= 4757.393 t= 907 R= 6e+04 -Depth= 33413 States= 5.4e+07 Transitions= 4.5e+08 Memory= 4826.045 t= 922 R= 6e+04 -Depth= 33413 States= 5.5e+07 Transitions= 4.62e+08 Memory= 4894.795 t= 947 R= 6e+04 -Depth= 33413 States= 5.6e+07 Transitions= 4.71e+08 Memory= 4963.447 t= 966 R= 6e+04 -Depth= 33413 States= 5.7e+07 Transitions= 4.81e+08 Memory= 5032.100 t= 987 R= 6e+04 -Depth= 33413 States= 5.8e+07 Transitions= 4.92e+08 Memory= 5100.752 t= 1.01e+03 R= 6e+04 -Depth= 33413 States= 5.9e+07 Transitions= 5.05e+08 Memory= 5169.502 t= 1.03e+03 R= 6e+04 -Depth= 33413 States= 6e+07 Transitions= 5.18e+08 Memory= 5238.154 t= 1.06e+03 R= 6e+04 -Depth= 33413 States= 6.1e+07 Transitions= 5.27e+08 Memory= 5306.807 t= 1.08e+03 R= 6e+04 -Depth= 33413 States= 6.2e+07 Transitions= 5.37e+08 Memory= 5375.459 t= 1.1e+03 R= 6e+04 -Depth= 33413 States= 6.3e+07 Transitions= 5.47e+08 Memory= 5444.111 t= 1.12e+03 R= 6e+04 -Depth= 33413 States= 6.4e+07 Transitions= 5.54e+08 Memory= 5512.861 t= 1.13e+03 R= 6e+04 -Depth= 33413 States= 6.5e+07 Transitions= 5.6e+08 Memory= 5581.514 t= 1.14e+03 R= 6e+04 -Depth= 33413 States= 6.6e+07 Transitions= 5.66e+08 Memory= 5650.166 t= 1.16e+03 R= 6e+04 -Depth= 33413 States= 6.7e+07 Transitions= 5.73e+08 Memory= 5718.818 t= 1.17e+03 R= 6e+04 -Depth= 33413 States= 6.8e+07 Transitions= 5.82e+08 Memory= 5787.568 t= 1.19e+03 R= 6e+04 -Depth= 33413 States= 6.9e+07 Transitions= 5.9e+08 Memory= 5856.221 t= 1.21e+03 R= 6e+04 -Depth= 33413 States= 7e+07 Transitions= 5.99e+08 Memory= 5924.873 t= 1.22e+03 R= 6e+04 -Depth= 33413 States= 7.1e+07 Transitions= 6.08e+08 Memory= 5993.526 t= 1.24e+03 R= 6e+04 -Depth= 33413 States= 7.2e+07 Transitions= 6.18e+08 Memory= 6062.276 t= 1.26e+03 R= 6e+04 -Depth= 33413 States= 7.3e+07 Transitions= 6.27e+08 Memory= 6130.928 t= 1.28e+03 R= 6e+04 -Depth= 33413 States= 7.4e+07 Transitions= 6.33e+08 Memory= 6199.580 t= 1.29e+03 R= 6e+04 -Depth= 33413 States= 7.5e+07 Transitions= 6.39e+08 Memory= 6268.233 t= 1.31e+03 R= 6e+04 -Depth= 33413 States= 7.6e+07 Transitions= 6.45e+08 Memory= 6336.983 t= 1.32e+03 R= 6e+04 -Depth= 33413 States= 7.7e+07 Transitions= 6.55e+08 Memory= 6405.635 t= 1.34e+03 R= 6e+04 -Depth= 33413 States= 7.8e+07 Transitions= 6.61e+08 Memory= 6474.287 t= 1.35e+03 R= 6e+04 -Depth= 33413 States= 7.9e+07 Transitions= 6.71e+08 Memory= 6542.940 t= 1.37e+03 R= 6e+04 -Depth= 33413 States= 8e+07 Transitions= 6.77e+08 Memory= 6611.592 t= 1.38e+03 R= 6e+04 -Depth= 33413 States= 8.1e+07 Transitions= 6.83e+08 Memory= 6680.342 t= 1.4e+03 R= 6e+04 -Depth= 33413 States= 8.2e+07 Transitions= 6.91e+08 Memory= 6748.994 t= 1.41e+03 R= 6e+04 -Depth= 33413 States= 8.3e+07 Transitions= 6.97e+08 Memory= 6817.647 t= 1.43e+03 R= 6e+04 -Depth= 33413 States= 8.4e+07 Transitions= 7.06e+08 Memory= 6886.299 t= 1.44e+03 R= 6e+04 -Depth= 33413 States= 8.5e+07 Transitions= 7.15e+08 Memory= 6955.049 t= 1.46e+03 R= 6e+04 -Depth= 33413 States= 8.6e+07 Transitions= 7.24e+08 Memory= 7023.701 t= 1.48e+03 R= 6e+04 -Depth= 33413 States= 8.7e+07 Transitions= 7.35e+08 Memory= 7092.354 t= 1.5e+03 R= 6e+04 -Depth= 33413 States= 8.8e+07 Transitions= 7.46e+08 Memory= 7161.006 t= 1.52e+03 R= 6e+04 -Depth= 33413 States= 8.9e+07 Transitions= 7.61e+08 Memory= 7229.756 t= 1.56e+03 R= 6e+04 -Depth= 33413 States= 9e+07 Transitions= 7.83e+08 Memory= 7298.408 t= 1.6e+03 R= 6e+04 -Depth= 33413 States= 9.1e+07 Transitions= 7.97e+08 Memory= 7367.061 t= 1.63e+03 R= 6e+04 -Depth= 33413 States= 9.2e+07 Transitions= 8.12e+08 Memory= 7435.713 t= 1.66e+03 R= 6e+04 -Depth= 33413 States= 9.3e+07 Transitions= 8.24e+08 Memory= 7504.463 t= 1.68e+03 R= 6e+04 -Depth= 33413 States= 9.4e+07 Transitions= 8.32e+08 Memory= 7573.115 t= 1.7e+03 R= 6e+04 -Depth= 33413 States= 9.5e+07 Transitions= 8.46e+08 Memory= 7641.768 t= 1.73e+03 R= 5e+04 -Depth= 33413 States= 9.6e+07 Transitions= 8.57e+08 Memory= 7710.420 t= 1.75e+03 R= 5e+04 -Depth= 33413 States= 9.7e+07 Transitions= 8.71e+08 Memory= 7779.072 t= 1.78e+03 R= 5e+04 -Depth= 33413 States= 9.8e+07 Transitions= 8.84e+08 Memory= 7847.822 t= 1.81e+03 R= 5e+04 -Depth= 33413 States= 9.9e+07 Transitions= 8.97e+08 Memory= 7916.475 t= 1.83e+03 R= 5e+04 -Depth= 33413 States= 1e+08 Transitions= 9.08e+08 Memory= 7985.127 t= 1.85e+03 R= 5e+04 -Depth= 33413 States= 1.01e+08 Transitions= 9.22e+08 Memory= 8053.779 t= 1.88e+03 R= 5e+04 -Depth= 33413 States= 1.02e+08 Transitions= 9.35e+08 Memory= 8122.529 t= 1.91e+03 R= 5e+04 -Depth= 33413 States= 1.03e+08 Transitions= 9.47e+08 Memory= 8191.182 t= 1.93e+03 R= 5e+04 -Depth= 33413 States= 1.04e+08 Transitions= 9.59e+08 Memory= 8259.834 t= 1.96e+03 R= 5e+04 -Depth= 33413 States= 1.05e+08 Transitions= 9.68e+08 Memory= 8328.486 t= 1.97e+03 R= 5e+04 -Depth= 33413 States= 1.06e+08 Transitions= 9.78e+08 Memory= 8397.236 t= 2e+03 R= 5e+04 -Depth= 33413 States= 1.07e+08 Transitions= 9.97e+08 Memory= 8465.889 t= 2.04e+03 R= 5e+04 -Depth= 33413 States= 1.08e+08 Transitions= 1.01e+09 Memory= 8534.541 t= 2.06e+03 R= 5e+04 -Depth= 33413 States= 1.09e+08 Transitions= 1.02e+09 Memory= 8603.193 t= 2.09e+03 R= 5e+04 -Depth= 33413 States= 1.1e+08 Transitions= 1.03e+09 Memory= 8671.846 t= 2.1e+03 R= 5e+04 -Depth= 33413 States= 1.11e+08 Transitions= 1.05e+09 Memory= 8740.596 t= 2.13e+03 R= 5e+04 -Depth= 33413 States= 1.12e+08 Transitions= 1.06e+09 Memory= 8809.248 t= 2.17e+03 R= 5e+04 -Depth= 33413 States= 1.13e+08 Transitions= 1.08e+09 Memory= 8877.901 t= 2.19e+03 R= 5e+04 -Depth= 33413 States= 1.14e+08 Transitions= 1.09e+09 Memory= 8946.553 t= 2.22e+03 R= 5e+04 -Depth= 33413 States= 1.15e+08 Transitions= 1.1e+09 Memory= 9015.303 t= 2.24e+03 R= 5e+04 -Depth= 33413 States= 1.16e+08 Transitions= 1.11e+09 Memory= 9083.955 t= 2.26e+03 R= 5e+04 -Depth= 33413 States= 1.17e+08 Transitions= 1.11e+09 Memory= 9152.608 t= 2.27e+03 R= 5e+04 -Depth= 33413 States= 1.18e+08 Transitions= 1.12e+09 Memory= 9221.260 t= 2.29e+03 R= 5e+04 -Depth= 33413 States= 1.19e+08 Transitions= 1.13e+09 Memory= 9290.010 t= 2.3e+03 R= 5e+04 -Depth= 33413 States= 1.2e+08 Transitions= 1.14e+09 Memory= 9358.662 t= 2.32e+03 R= 5e+04 -Depth= 33413 States= 1.21e+08 Transitions= 1.15e+09 Memory= 9427.315 t= 2.34e+03 R= 5e+04 -Depth= 33413 States= 1.22e+08 Transitions= 1.17e+09 Memory= 9495.967 t= 2.38e+03 R= 5e+04 -Depth= 33413 States= 1.23e+08 Transitions= 1.18e+09 Memory= 9564.717 t= 2.41e+03 R= 5e+04 -Depth= 33413 States= 1.24e+08 Transitions= 1.19e+09 Memory= 9633.369 t= 2.43e+03 R= 5e+04 -Depth= 33413 States= 1.25e+08 Transitions= 1.2e+09 Memory= 9702.022 t= 2.46e+03 R= 5e+04 -Depth= 33413 States= 1.26e+08 Transitions= 1.22e+09 Memory= 9770.674 t= 2.48e+03 R= 5e+04 -Depth= 33413 States= 1.27e+08 Transitions= 1.23e+09 Memory= 9839.326 t= 2.51e+03 R= 5e+04 -Depth= 33413 States= 1.28e+08 Transitions= 1.24e+09 Memory= 9908.076 t= 2.54e+03 R= 5e+04 -Depth= 33413 States= 1.29e+08 Transitions= 1.25e+09 Memory= 9976.729 t= 2.56e+03 R= 5e+04 -Depth= 33413 States= 1.3e+08 Transitions= 1.26e+09 Memory= 10045.381 t= 2.58e+03 R= 5e+04 -Depth= 33413 States= 1.31e+08 Transitions= 1.27e+09 Memory= 10114.033 t= 2.61e+03 R= 5e+04 -Depth= 33413 States= 1.32e+08 Transitions= 1.28e+09 Memory= 10182.783 t= 2.62e+03 R= 5e+04 -Depth= 33413 States= 1.33e+08 Transitions= 1.29e+09 Memory= 10251.436 t= 2.64e+03 R= 5e+04 -Depth= 33413 States= 1.34e+08 Transitions= 1.3e+09 Memory= 10320.088 t= 2.66e+03 R= 5e+04 -Depth= 33413 States= 1.35e+08 Transitions= 1.31e+09 Memory= 10388.740 t= 2.68e+03 R= 5e+04 -pan: resizing hashtable to -w28.. done -Depth= 33413 States= 1.36e+08 Transitions= 1.32e+09 Memory= 12441.428 t= 2.73e+03 R= 5e+04 -Depth= 33413 States= 1.37e+08 Transitions= 1.32e+09 Memory= 12510.178 t= 2.75e+03 R= 5e+04 -Depth= 33413 States= 1.38e+08 Transitions= 1.33e+09 Memory= 12578.830 t= 2.77e+03 R= 5e+04 -Depth= 33413 States= 1.39e+08 Transitions= 1.35e+09 Memory= 12647.483 t= 2.79e+03 R= 5e+04 -Depth= 33413 States= 1.4e+08 Transitions= 1.36e+09 Memory= 12716.135 t= 2.82e+03 R= 5e+04 -Depth= 33413 States= 1.41e+08 Transitions= 1.37e+09 Memory= 12784.787 t= 2.84e+03 R= 5e+04 -Depth= 33413 States= 1.42e+08 Transitions= 1.38e+09 Memory= 12853.537 t= 2.86e+03 R= 5e+04 -Depth= 33413 States= 1.43e+08 Transitions= 1.4e+09 Memory= 12922.190 t= 2.9e+03 R= 5e+04 -Depth= 33413 States= 1.44e+08 Transitions= 1.41e+09 Memory= 12990.842 t= 2.91e+03 R= 5e+04 -Depth= 33413 States= 1.45e+08 Transitions= 1.42e+09 Memory= 13059.494 t= 2.93e+03 R= 5e+04 -Depth= 33413 States= 1.46e+08 Transitions= 1.43e+09 Memory= 13128.244 t= 2.96e+03 R= 5e+04 -Depth= 33413 States= 1.47e+08 Transitions= 1.45e+09 Memory= 13196.897 t= 3e+03 R= 5e+04 -Depth= 33413 States= 1.48e+08 Transitions= 1.47e+09 Memory= 13265.549 t= 3.03e+03 R= 5e+04 -Depth= 33413 States= 1.49e+08 Transitions= 1.48e+09 Memory= 13334.201 t= 3.06e+03 R= 5e+04 -Depth= 33413 States= 1.5e+08 Transitions= 1.5e+09 Memory= 13402.951 t= 3.09e+03 R= 5e+04 -Depth= 33413 States= 1.51e+08 Transitions= 1.5e+09 Memory= 13471.604 t= 3.11e+03 R= 5e+04 -Depth= 33413 States= 1.52e+08 Transitions= 1.52e+09 Memory= 13540.256 t= 3.13e+03 R= 5e+04 -Depth= 33413 States= 1.53e+08 Transitions= 1.53e+09 Memory= 13608.908 t= 3.15e+03 R= 5e+04 -Depth= 33413 States= 1.54e+08 Transitions= 1.55e+09 Memory= 13677.658 t= 3.19e+03 R= 5e+04 -Depth= 33413 States= 1.55e+08 Transitions= 1.56e+09 Memory= 13746.311 t= 3.22e+03 R= 5e+04 -Depth= 33413 States= 1.56e+08 Transitions= 1.58e+09 Memory= 13814.963 t= 3.25e+03 R= 5e+04 -Depth= 33413 States= 1.57e+08 Transitions= 1.59e+09 Memory= 13883.615 t= 3.29e+03 R= 5e+04 -Depth= 33413 States= 1.58e+08 Transitions= 1.6e+09 Memory= 13952.268 t= 3.31e+03 R= 5e+04 -Depth= 33413 States= 1.59e+08 Transitions= 1.61e+09 Memory= 14021.018 t= 3.33e+03 R= 5e+04 -Depth= 33413 States= 1.6e+08 Transitions= 1.63e+09 Memory= 14089.670 t= 3.36e+03 R= 5e+04 -Depth= 33413 States= 1.61e+08 Transitions= 1.64e+09 Memory= 14158.322 t= 3.39e+03 R= 5e+04 -Depth= 33413 States= 1.62e+08 Transitions= 1.66e+09 Memory= 14226.975 t= 3.42e+03 R= 5e+04 -Depth= 33413 States= 1.63e+08 Transitions= 1.67e+09 Memory= 14295.725 t= 3.45e+03 R= 5e+04 -Depth= 33413 States= 1.64e+08 Transitions= 1.69e+09 Memory= 14364.377 t= 3.48e+03 R= 5e+04 -Depth= 33413 States= 1.65e+08 Transitions= 1.7e+09 Memory= 14433.029 t= 3.5e+03 R= 5e+04 -Depth= 33413 States= 1.66e+08 Transitions= 1.71e+09 Memory= 14501.682 t= 3.52e+03 R= 5e+04 -Depth= 33413 States= 1.67e+08 Transitions= 1.72e+09 Memory= 14570.432 t= 3.55e+03 R= 5e+04 -Depth= 33413 States= 1.68e+08 Transitions= 1.73e+09 Memory= 14639.084 t= 3.57e+03 R= 5e+04 -Depth= 33413 States= 1.69e+08 Transitions= 1.74e+09 Memory= 14707.736 t= 3.59e+03 R= 5e+04 -Depth= 33413 States= 1.7e+08 Transitions= 1.76e+09 Memory= 14776.389 t= 3.62e+03 R= 5e+04 -Depth= 33413 States= 1.71e+08 Transitions= 1.77e+09 Memory= 14845.041 t= 3.64e+03 R= 5e+04 -Depth= 33413 States= 1.72e+08 Transitions= 1.77e+09 Memory= 14913.791 t= 3.65e+03 R= 5e+04 -Depth= 33413 States= 1.73e+08 Transitions= 1.78e+09 Memory= 14982.443 t= 3.66e+03 R= 5e+04 -Depth= 33413 States= 1.74e+08 Transitions= 1.79e+09 Memory= 15051.096 t= 3.68e+03 R= 5e+04 -Depth= 33413 States= 1.75e+08 Transitions= 1.79e+09 Memory= 15119.748 t= 3.69e+03 R= 5e+04 -Depth= 33413 States= 1.76e+08 Transitions= 1.8e+09 Memory= 15188.498 t= 3.71e+03 R= 5e+04 -Depth= 33413 States= 1.77e+08 Transitions= 1.8e+09 Memory= 15257.151 t= 3.72e+03 R= 5e+04 -Depth= 33413 States= 1.78e+08 Transitions= 1.81e+09 Memory= 15325.803 t= 3.73e+03 R= 5e+04 -Depth= 33413 States= 1.79e+08 Transitions= 1.82e+09 Memory= 15394.455 t= 3.75e+03 R= 5e+04 -Depth= 33413 States= 1.8e+08 Transitions= 1.83e+09 Memory= 15463.205 t= 3.76e+03 R= 5e+04 -Depth= 33413 States= 1.81e+08 Transitions= 1.83e+09 Memory= 15531.858 t= 3.77e+03 R= 5e+04 -Depth= 33413 States= 1.82e+08 Transitions= 1.84e+09 Memory= 15600.510 t= 3.79e+03 R= 5e+04 -Depth= 33413 States= 1.83e+08 Transitions= 1.85e+09 Memory= 15669.162 t= 3.8e+03 R= 5e+04 -Depth= 33413 States= 1.84e+08 Transitions= 1.86e+09 Memory= 15737.912 t= 3.82e+03 R= 5e+04 -Depth= 33413 States= 1.85e+08 Transitions= 1.87e+09 Memory= 15806.565 t= 3.84e+03 R= 5e+04 -Depth= 33413 States= 1.86e+08 Transitions= 1.88e+09 Memory= 15875.217 t= 3.87e+03 R= 5e+04 -Depth= 33413 States= 1.87e+08 Transitions= 1.89e+09 Memory= 15943.869 t= 3.89e+03 R= 5e+04 -Depth= 33413 States= 1.88e+08 Transitions= 1.9e+09 Memory= 16012.522 t= 3.91e+03 R= 5e+04 -Depth= 33413 States= 1.89e+08 Transitions= 1.91e+09 Memory= 16081.272 t= 3.94e+03 R= 5e+04 -Depth= 33413 States= 1.9e+08 Transitions= 1.92e+09 Memory= 16149.924 t= 3.96e+03 R= 5e+04 -Depth= 33413 States= 1.91e+08 Transitions= 1.94e+09 Memory= 16218.576 t= 3.98e+03 R= 5e+04 -Depth= 33413 States= 1.92e+08 Transitions= 1.95e+09 Memory= 16287.229 t= 4.02e+03 R= 5e+04 -Depth= 33413 States= 1.93e+08 Transitions= 1.96e+09 Memory= 16355.979 t= 4.05e+03 R= 5e+04 -Depth= 33413 States= 1.94e+08 Transitions= 1.97e+09 Memory= 16424.631 t= 4.09e+03 R= 5e+04 -Depth= 33413 States= 1.95e+08 Transitions= 1.99e+09 Memory= 16493.283 t= 4.17e+03 R= 5e+04 -Depth= 33413 States= 1.96e+08 Transitions= 2e+09 Memory= 16561.936 t= 4.26e+03 R= 5e+04 -Depth= 33413 States= 1.97e+08 Transitions= 2.02e+09 Memory= 16630.686 t= 4.36e+03 R= 5e+04 -Depth= 33413 States= 1.98e+08 Transitions= 2.04e+09 Memory= 16699.338 t= 4.45e+03 R= 4e+04 -Depth= 33413 States= 1.99e+08 Transitions= 2.05e+09 Memory= 16767.990 t= 4.53e+03 R= 4e+04 -Depth= 33413 States= 2e+08 Transitions= 2.06e+09 Memory= 16836.643 t= 4.59e+03 R= 4e+04 -Depth= 33413 States= 2.01e+08 Transitions= 2.07e+09 Memory= 16905.393 t= 4.64e+03 R= 4e+04 -Depth= 33413 States= 2.02e+08 Transitions= 2.07e+09 Memory= 16974.045 t= 4.7e+03 R= 4e+04 -Depth= 33413 States= 2.03e+08 Transitions= 2.08e+09 Memory= 17042.697 t= 4.78e+03 R= 4e+04 -Depth= 33413 States= 2.04e+08 Transitions= 2.1e+09 Memory= 17111.350 t= 4.9e+03 R= 4e+04 -Depth= 33413 States= 2.05e+08 Transitions= 2.11e+09 Memory= 17180.002 t= 5.05e+03 R= 4e+04 -Depth= 33413 States= 2.06e+08 Transitions= 2.13e+09 Memory= 17248.752 t= 5.25e+03 R= 4e+04 -Depth= 33413 States= 2.07e+08 Transitions= 2.14e+09 Memory= 17317.404 t= 5.45e+03 R= 4e+04 -Depth= 33413 States= 2.08e+08 Transitions= 2.15e+09 Memory= 17386.057 t= 5.65e+03 R= 4e+04 -Depth= 33413 States= 2.09e+08 Transitions= 2.16e+09 Memory= 17454.709 t= 5.86e+03 R= 4e+04 -Depth= 33413 States= 2.1e+08 Transitions= 2.17e+09 Memory= 17523.459 t= 6.1e+03 R= 3e+04 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input deleted file mode 100644 index c94928c..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input +++ /dev/null @@ -1,696 +0,0 @@ -#define READER_NEST_LEVEL 1 - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE -#define get_pid() ((_pid < 1) -> 0 : 1) -#elif defined(TEST_SIGNAL_ON_READ) -#define get_pid() ((_pid < 2) -> 0 : 1) -#else -#define get_pid() (_pid) -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - dispatch_sighand_read_exec(); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 1; - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input.trail deleted file mode 100644 index 6f29ad2..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input.trail +++ /dev/null @@ -1,11161 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 -21:4:4355 -22:4:4359 -23:4:4360 -24:0:4365 -25:4:4362 -26:0:4365 -27:3:2331 -28:0:4365 -29:3:2337 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b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.log deleted file mode 100644 index 4cee7dc..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.log +++ /dev/null @@ -1,382 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 72 byte, depth reached 10856, errors: 0 - 161519 states, stored - 1724866 states, matched - 1886385 transitions (= stored+matched) - 6692565 atomic steps -hash conflicts: 84009 (resolved) - -Stats on memory usage (in Megabytes): - 15.404 equivalent memory usage for states (stored*(State-vector + overhead)) - 10.421 actual memory usage for states (compression: 67.65%) - state-vector as stored = 40 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 476.115 total actual memory usage - -unreached in proctype urcu_reader_sig - line 403, "pan.___", state 330, "(1)" - line 614, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 652, "pan.___", state 213, "(1)" - line 403, "pan.___", state 239, "(1)" - line 403, "pan.___", state 525, "(1)" - line 399, "pan.___", state 610, "(1)" - line 403, "pan.___", state 624, "(1)" - line 403, "pan.___", state 724, "(1)" - line 399, "pan.___", state 805, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 807, "(1)" - line 399, "pan.___", state 808, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 808, "else" - line 399, "pan.___", state 811, "(1)" - line 403, "pan.___", state 819, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 821, "(1)" - line 403, "pan.___", state 822, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 822, "else" - line 403, "pan.___", state 825, "(1)" - line 403, "pan.___", state 826, "(1)" - line 403, "pan.___", state 826, "(1)" - line 401, "pan.___", state 831, "((j<1))" - line 401, "pan.___", state 831, "((j>=1))" - line 408, "pan.___", state 837, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 850, "(1)" - line 409, "pan.___", state 851, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 851, "else" - line 409, "pan.___", state 854, "(1)" - line 409, "pan.___", state 855, "(1)" - line 409, "pan.___", state 855, "(1)" - line 413, "pan.___", state 863, "(1)" - line 413, "pan.___", state 864, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 864, "else" - line 413, "pan.___", state 867, "(1)" - line 413, "pan.___", state 868, "(1)" - line 413, "pan.___", state 868, "(1)" - line 411, "pan.___", state 873, "((j<1))" - line 411, "pan.___", state 873, "((j>=1))" - line 418, "pan.___", state 880, "(1)" - line 418, "pan.___", state 881, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 881, "else" - line 418, "pan.___", state 884, "(1)" - line 418, "pan.___", state 885, "(1)" - line 418, "pan.___", state 885, "(1)" - line 399, "pan.___", state 896, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 898, "(1)" - line 399, "pan.___", state 899, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 899, "else" - line 399, "pan.___", state 902, "(1)" - line 403, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 912, "(1)" - line 403, "pan.___", state 913, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 913, "else" - line 403, "pan.___", state 916, "(1)" - line 403, "pan.___", state 917, "(1)" - line 403, "pan.___", state 917, "(1)" - line 401, "pan.___", state 922, "((j<1))" - line 401, "pan.___", state 922, "((j>=1))" - line 408, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 941, "(1)" - line 409, "pan.___", state 942, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 942, "else" - line 409, "pan.___", state 945, "(1)" - line 409, "pan.___", state 946, "(1)" - line 409, "pan.___", state 946, "(1)" - line 413, "pan.___", state 954, "(1)" - line 413, "pan.___", state 955, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 955, "else" - line 413, "pan.___", state 958, "(1)" - line 413, "pan.___", state 959, "(1)" - line 413, "pan.___", state 959, "(1)" - line 411, "pan.___", state 964, "((j<1))" - line 411, "pan.___", state 964, "((j>=1))" - line 418, "pan.___", state 971, "(1)" - line 418, "pan.___", state 972, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 972, "else" - line 418, "pan.___", state 975, "(1)" - line 418, "pan.___", state 976, "(1)" - line 418, "pan.___", state 976, "(1)" - line 194, "pan.___", state 981, "(1)" - line 194, "pan.___", state 981, "(1)" - line 214, "pan.___", state 985, "((i<1))" - line 214, "pan.___", state 985, "((i>=1))" - line 399, "pan.___", state 991, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 993, "(1)" - line 399, "pan.___", state 994, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 994, "else" - line 399, "pan.___", state 997, "(1)" - line 403, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1007, "(1)" - line 403, "pan.___", state 1008, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1008, "else" - line 403, "pan.___", state 1011, "(1)" - line 403, "pan.___", state 1012, "(1)" - line 403, "pan.___", state 1012, "(1)" - line 401, "pan.___", state 1017, "((j<1))" - line 401, "pan.___", state 1017, "((j>=1))" - line 408, "pan.___", state 1023, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1036, "(1)" - line 409, "pan.___", state 1037, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1037, "else" - line 409, "pan.___", state 1040, "(1)" - line 409, "pan.___", state 1041, "(1)" - line 409, "pan.___", state 1041, "(1)" - line 413, "pan.___", state 1049, "(1)" - line 413, "pan.___", state 1050, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1050, "else" - line 413, "pan.___", state 1053, "(1)" - line 413, "pan.___", state 1054, "(1)" - line 413, "pan.___", state 1054, "(1)" - line 411, "pan.___", state 1059, "((j<1))" - line 411, "pan.___", state 1059, "((j>=1))" - line 418, "pan.___", state 1066, "(1)" - line 418, "pan.___", state 1067, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1067, "else" - line 418, "pan.___", state 1070, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 194, "pan.___", state 1076, "(1)" - line 194, "pan.___", state 1076, "(1)" - line 221, "pan.___", state 1077, "(1)" - line 221, "pan.___", state 1077, "(1)" - line 356, "pan.___", state 1083, "((sighand_exec==1))" - line 356, "pan.___", state 1083, "else" - line 362, "pan.___", state 1086, "sighand_exec = 1" - line 399, "pan.___", state 1099, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1101, "(1)" - line 399, "pan.___", state 1102, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1102, "else" - line 399, "pan.___", state 1105, "(1)" - line 403, "pan.___", state 1113, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1115, "(1)" - line 403, "pan.___", state 1116, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1116, "else" - line 403, "pan.___", state 1119, "(1)" - line 403, "pan.___", state 1120, "(1)" - line 403, "pan.___", state 1120, "(1)" - line 401, "pan.___", state 1125, "((i<1))" - line 401, "pan.___", state 1125, "((i>=1))" - line 408, "pan.___", state 1131, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1144, "(1)" - line 409, "pan.___", state 1145, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1145, "else" - line 409, "pan.___", state 1148, "(1)" - line 409, "pan.___", state 1149, "(1)" - line 409, "pan.___", state 1149, "(1)" - line 413, "pan.___", state 1157, "(1)" - line 413, "pan.___", state 1158, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1158, "else" - line 413, "pan.___", state 1161, "(1)" - line 413, "pan.___", state 1162, "(1)" - line 413, "pan.___", state 1162, "(1)" - line 411, "pan.___", state 1167, "((i<1))" - line 411, "pan.___", state 1167, "((i>=1))" - line 418, "pan.___", state 1174, "(1)" - line 418, "pan.___", state 1175, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1175, "else" - line 418, "pan.___", state 1178, "(1)" - line 418, "pan.___", state 1179, "(1)" - line 418, "pan.___", state 1179, "(1)" - line 420, "pan.___", state 1182, "(1)" - line 420, "pan.___", state 1182, "(1)" - line 362, "pan.___", state 1191, "sighand_exec = 1" - line 403, "pan.___", state 1222, "(1)" - line 403, "pan.___", state 1319, "(1)" - line 399, "pan.___", state 1404, "(1)" - line 403, "pan.___", state 1418, "(1)" - line 403, "pan.___", state 1518, "(1)" - line 399, "pan.___", state 1599, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1601, "(1)" - line 399, "pan.___", state 1602, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1602, "else" - line 399, "pan.___", state 1605, "(1)" - line 403, "pan.___", state 1613, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1615, "(1)" - line 403, "pan.___", state 1616, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1616, "else" - line 403, "pan.___", state 1619, "(1)" - line 403, "pan.___", state 1620, "(1)" - line 403, "pan.___", state 1620, "(1)" - line 401, "pan.___", state 1625, "((j<1))" - line 401, "pan.___", state 1625, "((j>=1))" - line 408, "pan.___", state 1631, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1644, "(1)" - line 409, "pan.___", state 1645, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1645, "else" - line 409, "pan.___", state 1648, "(1)" - line 409, "pan.___", state 1649, "(1)" - line 409, "pan.___", state 1649, "(1)" - line 413, "pan.___", state 1657, "(1)" - line 413, "pan.___", state 1658, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1658, "else" - line 413, "pan.___", state 1661, "(1)" - line 413, "pan.___", state 1662, "(1)" - line 413, "pan.___", state 1662, "(1)" - line 411, "pan.___", state 1667, "((j<1))" - line 411, "pan.___", state 1667, "((j>=1))" - line 418, "pan.___", state 1674, "(1)" - line 418, "pan.___", state 1675, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1675, "else" - line 418, "pan.___", state 1678, "(1)" - line 418, "pan.___", state 1679, "(1)" - line 418, "pan.___", state 1679, "(1)" - line 399, "pan.___", state 1690, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1692, "(1)" - line 399, "pan.___", state 1693, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1693, "else" - line 399, "pan.___", state 1696, "(1)" - line 403, "pan.___", state 1704, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1706, "(1)" - line 403, "pan.___", state 1707, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1707, "else" - line 403, "pan.___", state 1710, "(1)" - line 403, "pan.___", state 1711, "(1)" - line 403, "pan.___", state 1711, "(1)" - line 401, "pan.___", state 1716, "((j<1))" - line 401, "pan.___", state 1716, "((j>=1))" - line 408, "pan.___", state 1722, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1735, "(1)" - line 409, "pan.___", state 1736, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1736, "else" - line 409, "pan.___", state 1739, "(1)" - line 409, "pan.___", state 1740, "(1)" - line 409, "pan.___", state 1740, "(1)" - line 413, "pan.___", state 1748, "(1)" - line 413, "pan.___", state 1749, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1749, "else" - line 413, "pan.___", state 1752, "(1)" - line 413, "pan.___", state 1753, "(1)" - line 413, "pan.___", state 1753, "(1)" - line 411, "pan.___", state 1758, "((j<1))" - line 411, "pan.___", state 1758, "((j>=1))" - line 418, "pan.___", state 1765, "(1)" - line 418, "pan.___", state 1766, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1766, "else" - line 418, "pan.___", state 1769, "(1)" - line 418, "pan.___", state 1770, "(1)" - line 418, "pan.___", state 1770, "(1)" - line 194, "pan.___", state 1775, "(1)" - line 194, "pan.___", state 1775, "(1)" - line 214, "pan.___", state 1779, "((i<1))" - line 214, "pan.___", state 1779, "((i>=1))" - line 399, "pan.___", state 1785, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1787, "(1)" - line 399, "pan.___", state 1788, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1788, "else" - line 399, "pan.___", state 1791, "(1)" - line 403, "pan.___", state 1799, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1801, "(1)" - line 403, "pan.___", state 1802, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1802, "else" - line 403, "pan.___", state 1805, "(1)" - line 403, "pan.___", state 1806, "(1)" - line 403, "pan.___", state 1806, "(1)" - line 401, "pan.___", state 1811, "((j<1))" - line 401, "pan.___", state 1811, "((j>=1))" - line 408, "pan.___", state 1817, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1830, "(1)" - line 409, "pan.___", state 1831, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1831, "else" - line 409, "pan.___", state 1834, "(1)" - line 409, "pan.___", state 1835, "(1)" - line 409, "pan.___", state 1835, "(1)" - line 413, "pan.___", state 1843, "(1)" - line 413, "pan.___", state 1844, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1844, "else" - line 413, "pan.___", state 1847, "(1)" - line 413, "pan.___", state 1848, "(1)" - line 413, "pan.___", state 1848, "(1)" - line 411, "pan.___", state 1853, "((j<1))" - line 411, "pan.___", state 1853, "((j>=1))" - line 418, "pan.___", state 1860, "(1)" - line 418, "pan.___", state 1861, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1861, "else" - line 418, "pan.___", state 1864, "(1)" - line 418, "pan.___", state 1865, "(1)" - line 418, "pan.___", state 1865, "(1)" - line 194, "pan.___", state 1870, "(1)" - line 194, "pan.___", state 1870, "(1)" - line 221, "pan.___", state 1871, "(1)" - line 221, "pan.___", state 1871, "(1)" - line 356, "pan.___", state 1877, "((sighand_exec==1))" - line 356, "pan.___", state 1877, "else" - line 362, "pan.___", state 1880, "sighand_exec = 1" - line 399, "pan.___", state 1893, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1895, "(1)" - line 399, "pan.___", state 1896, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1896, "else" - line 399, "pan.___", state 1899, "(1)" - line 403, "pan.___", state 1907, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1909, "(1)" - line 403, "pan.___", state 1910, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1910, "else" - line 403, "pan.___", state 1913, "(1)" - line 403, "pan.___", state 1914, "(1)" - line 403, "pan.___", state 1914, "(1)" - line 401, "pan.___", state 1919, "((i<1))" - line 401, "pan.___", state 1919, "((i>=1))" - line 408, "pan.___", state 1925, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1938, "(1)" - line 409, "pan.___", state 1939, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1939, "else" - line 409, "pan.___", state 1942, "(1)" - line 409, "pan.___", state 1943, "(1)" - line 409, "pan.___", state 1943, "(1)" - line 413, "pan.___", state 1951, "(1)" - line 413, "pan.___", state 1952, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1952, "else" - line 413, "pan.___", state 1955, "(1)" - line 413, "pan.___", state 1956, "(1)" - line 413, "pan.___", state 1956, "(1)" - line 411, "pan.___", state 1961, "((i<1))" - line 411, "pan.___", state 1961, "((i>=1))" - line 418, "pan.___", state 1968, "(1)" - line 418, "pan.___", state 1969, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1969, "else" - line 418, "pan.___", state 1972, "(1)" - line 418, "pan.___", state 1973, "(1)" - line 418, "pan.___", state 1973, "(1)" - line 420, "pan.___", state 1976, "(1)" - line 420, "pan.___", state 1976, "(1)" - line 362, "pan.___", state 1985, "sighand_exec = 1" - line 403, "pan.___", state 2016, "(1)" - line 702, "pan.___", state 2304, "-end-" - (221 of 2304 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 748, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.47 seconds -pan: rate 109876.87 states/second -pan: avg transition delay 7.7927e-07 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input deleted file mode 100644 index 48411ec..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 00fba51..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2172 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4249 -2:4:4201 -3:4:4204 -4:4:4204 -5:4:4207 -6:4:4215 -7:4:4215 -8:4:4218 -9:4:4224 -10:4:4228 -11:4:4228 -12:4:4231 -13:4:4239 -14:4:4243 -15:4:4244 -16:0:4249 -17:4:4246 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a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.define b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.log deleted file mode 100644 index 5eb694e..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.log +++ /dev/null @@ -1,280 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10519, errors: 0 - 20146 states, stored - 191615 states, matched - 211761 transitions (= stored+matched) - 711676 atomic steps -hash conflicts: 1222 (resolved) - -Stats on memory usage (in Megabytes): - 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.509 actual memory usage for states (compression: 93.51%) - state-vector as stored = 51 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.229 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 174, "pan.___", state 257, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 658, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 660, "(1)" - line 182, "pan.___", state 661, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 661, "else" - line 174, "pan.___", state 671, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 693, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 174, "pan.___", state 710, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 712, "(1)" - line 178, "pan.___", state 719, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 721, "(1)" - line 178, "pan.___", state 722, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 722, "else" - line 176, "pan.___", state 727, "((j<1))" - line 176, "pan.___", state 727, "((j>=1))" - line 182, "pan.___", state 732, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 734, "(1)" - line 182, "pan.___", state 735, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 735, "else" - line 192, "pan.___", state 740, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 192, "pan.___", state 740, "else" - line 220, "pan.___", state 741, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 741, "else" - line 355, "pan.___", state 747, "((sighand_exec==1))" - line 355, "pan.___", state 747, "else" - line 361, "pan.___", state 750, "sighand_exec = 1" - line 398, "pan.___", state 763, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 765, "(1)" - line 398, "pan.___", state 766, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 766, "else" - line 398, "pan.___", state 769, "(1)" - line 402, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 779, "(1)" - line 402, "pan.___", state 780, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 780, "else" - line 402, "pan.___", state 783, "(1)" - line 402, "pan.___", state 784, "(1)" - line 402, "pan.___", state 784, "(1)" - line 400, "pan.___", state 789, "((i<1))" - line 400, "pan.___", state 789, "((i>=1))" - line 407, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 808, "(1)" - line 408, "pan.___", state 809, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 809, "else" - line 408, "pan.___", state 812, "(1)" - line 408, "pan.___", state 813, "(1)" - line 408, "pan.___", state 813, "(1)" - line 412, "pan.___", state 821, "(1)" - line 412, "pan.___", state 822, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 822, "else" - line 412, "pan.___", state 825, "(1)" - line 412, "pan.___", state 826, "(1)" - line 412, "pan.___", state 826, "(1)" - line 410, "pan.___", state 831, "((i<1))" - line 410, "pan.___", state 831, "((i>=1))" - line 417, "pan.___", state 838, "(1)" - line 417, "pan.___", state 839, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 839, "else" - line 417, "pan.___", state 842, "(1)" - line 417, "pan.___", state 843, "(1)" - line 417, "pan.___", state 843, "(1)" - line 419, "pan.___", state 846, "(1)" - line 419, "pan.___", state 846, "(1)" - line 361, "pan.___", state 855, "sighand_exec = 1" - line 402, "pan.___", state 886, "(1)" - line 407, "pan.___", state 902, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 945, "(1)" - line 402, "pan.___", state 983, "(1)" - line 407, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1042, "(1)" - line 398, "pan.___", state 1068, "(1)" - line 402, "pan.___", state 1082, "(1)" - line 407, "pan.___", state 1098, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1141, "(1)" - line 402, "pan.___", state 1182, "(1)" - line 407, "pan.___", state 1198, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1241, "(1)" - line 174, "pan.___", state 1262, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1264, "(1)" - line 178, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1273, "(1)" - line 178, "pan.___", state 1274, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1274, "else" - line 176, "pan.___", state 1279, "((j<1))" - line 176, "pan.___", state 1279, "((j>=1))" - line 182, "pan.___", state 1284, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 1286, "(1)" - line 182, "pan.___", state 1287, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 1287, "else" - line 174, "pan.___", state 1297, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 174, "pan.___", state 1336, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1338, "(1)" - line 178, "pan.___", state 1345, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1347, "(1)" - line 178, "pan.___", state 1348, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1348, "else" - line 176, "pan.___", state 1353, "((j<1))" - line 176, "pan.___", state 1353, "((j>=1))" - line 182, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 1360, "(1)" - line 182, "pan.___", state 1361, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 1361, "else" - line 192, "pan.___", state 1366, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 192, "pan.___", state 1366, "else" - line 220, "pan.___", state 1367, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 1367, "else" - line 355, "pan.___", state 1373, "((sighand_exec==1))" - line 355, "pan.___", state 1373, "else" - line 361, "pan.___", state 1376, "sighand_exec = 1" - line 398, "pan.___", state 1389, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1391, "(1)" - line 398, "pan.___", state 1392, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1392, "else" - line 398, "pan.___", state 1395, "(1)" - line 402, "pan.___", state 1403, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1405, "(1)" - line 402, "pan.___", state 1406, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1406, "else" - line 402, "pan.___", state 1409, "(1)" - line 402, "pan.___", state 1410, "(1)" - line 402, "pan.___", state 1410, "(1)" - line 400, "pan.___", state 1415, "((i<1))" - line 400, "pan.___", state 1415, "((i>=1))" - line 407, "pan.___", state 1421, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1434, "(1)" - line 408, "pan.___", state 1435, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1435, "else" - line 408, "pan.___", state 1438, "(1)" - line 408, "pan.___", state 1439, "(1)" - line 408, "pan.___", state 1439, "(1)" - line 412, "pan.___", state 1447, "(1)" - line 412, "pan.___", state 1448, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1448, "else" - line 412, "pan.___", state 1451, "(1)" - line 412, "pan.___", state 1452, "(1)" - line 412, "pan.___", state 1452, "(1)" - line 410, "pan.___", state 1457, "((i<1))" - line 410, "pan.___", state 1457, "((i>=1))" - line 417, "pan.___", state 1464, "(1)" - line 417, "pan.___", state 1465, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1465, "else" - line 417, "pan.___", state 1468, "(1)" - line 417, "pan.___", state 1469, "(1)" - line 417, "pan.___", state 1469, "(1)" - line 419, "pan.___", state 1472, "(1)" - line 419, "pan.___", state 1472, "(1)" - line 361, "pan.___", state 1481, "sighand_exec = 1" - line 178, "pan.___", state 1506, "(1)" - line 182, "pan.___", state 1517, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1530, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 8219815..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1805 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2905 -2:4:2857 -3:4:2860 -4:4:2860 -5:4:2863 -6:4:2871 -7:4:2871 -8:4:2874 -9:4:2880 -10:4:2884 -11:4:2884 -12:4:2887 -13:4:2895 -14:4:2899 -15:4:2900 -16:0:2905 -17:4:2902 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-1797:3:2850 -1798:0:2905 -1799:2:1098 -1800:0:2903 -1801:3:2851 -1802:0:2909 -1803:3:1630 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.define b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.log deleted file mode 100644 index a346ed9..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.log +++ /dev/null @@ -1,224 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10499, errors: 0 - 159431 states, stored - 1505398 states, matched - 1664829 transitions (= stored+matched) - 5794809 atomic steps -hash conflicts: 62144 (resolved) - -Stats on memory usage (in Megabytes): - 12.772 equivalent memory usage for states (stored*(State-vector + overhead)) - 8.936 actual memory usage for states (compression: 69.96%) - state-vector as stored = 31 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 474.651 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 651, "pan.___", state 213, "(1)" - line 402, "pan.___", state 348, "(1)" - line 398, "pan.___", state 433, "(1)" - line 402, "pan.___", state 447, "(1)" - line 402, "pan.___", state 547, "(1)" - line 159, "pan.___", state 628, "(1)" - line 163, "pan.___", state 636, "(1)" - line 163, "pan.___", state 637, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 637, "else" - line 161, "pan.___", state 642, "((j<1))" - line 161, "pan.___", state 642, "((j>=1))" - line 167, "pan.___", state 648, "(1)" - line 167, "pan.___", state 649, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 649, "else" - line 159, "pan.___", state 660, "(1)" - line 163, "pan.___", state 668, "(1)" - line 163, "pan.___", state 669, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 167, "pan.___", state 680, "(1)" - line 167, "pan.___", state 681, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 696, "(1)" - line 163, "pan.___", state 704, "(1)" - line 163, "pan.___", state 705, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 705, "else" - line 161, "pan.___", state 710, "((j<1))" - line 161, "pan.___", state 710, "((j>=1))" - line 167, "pan.___", state 716, "(1)" - line 167, "pan.___", state 717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 717, "else" - line 201, "pan.___", state 722, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 201, "pan.___", state 722, "else" - line 220, "pan.___", state 723, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 220, "pan.___", state 723, "else" - line 355, "pan.___", state 729, "((sighand_exec==1))" - line 355, "pan.___", state 729, "else" - line 361, "pan.___", state 732, "sighand_exec = 1" - line 398, "pan.___", state 745, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 747, "(1)" - line 398, "pan.___", state 748, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 748, "else" - line 398, "pan.___", state 751, "(1)" - line 402, "pan.___", state 759, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 761, "(1)" - line 402, "pan.___", state 762, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 762, "else" - line 402, "pan.___", state 765, "(1)" - line 402, "pan.___", state 766, "(1)" - line 402, "pan.___", state 766, "(1)" - line 400, "pan.___", state 771, "((i<1))" - line 400, "pan.___", state 771, "((i>=1))" - line 407, "pan.___", state 777, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 790, "(1)" - line 408, "pan.___", state 791, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 791, "else" - line 408, "pan.___", state 794, "(1)" - line 408, "pan.___", state 795, "(1)" - line 408, "pan.___", state 795, "(1)" - line 412, "pan.___", state 803, "(1)" - line 412, "pan.___", state 804, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 804, "else" - line 412, "pan.___", state 807, "(1)" - line 412, "pan.___", state 808, "(1)" - line 412, "pan.___", state 808, "(1)" - line 410, "pan.___", state 813, "((i<1))" - line 410, "pan.___", state 813, "((i>=1))" - line 417, "pan.___", state 820, "(1)" - line 417, "pan.___", state 821, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 821, "else" - line 417, "pan.___", state 824, "(1)" - line 417, "pan.___", state 825, "(1)" - line 417, "pan.___", state 825, "(1)" - line 419, "pan.___", state 828, "(1)" - line 419, "pan.___", state 828, "(1)" - line 361, "pan.___", state 837, "sighand_exec = 1" - line 402, "pan.___", state 868, "(1)" - line 402, "pan.___", state 965, "(1)" - line 398, "pan.___", state 1050, "(1)" - line 402, "pan.___", state 1064, "(1)" - line 402, "pan.___", state 1164, "(1)" - line 159, "pan.___", state 1245, "(1)" - line 163, "pan.___", state 1253, "(1)" - line 163, "pan.___", state 1254, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1254, "else" - line 161, "pan.___", state 1259, "((j<1))" - line 161, "pan.___", state 1259, "((j>=1))" - line 167, "pan.___", state 1265, "(1)" - line 167, "pan.___", state 1266, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1266, "else" - line 159, "pan.___", state 1277, "(1)" - line 163, "pan.___", state 1285, "(1)" - line 163, "pan.___", state 1286, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 167, "pan.___", state 1297, "(1)" - line 167, "pan.___", state 1298, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 1313, "(1)" - line 163, "pan.___", state 1321, "(1)" - line 163, "pan.___", state 1322, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1322, "else" - line 161, "pan.___", state 1327, "((j<1))" - line 161, "pan.___", state 1327, "((j>=1))" - line 167, "pan.___", state 1333, "(1)" - line 167, "pan.___", state 1334, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1334, "else" - line 201, "pan.___", state 1339, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 201, "pan.___", state 1339, "else" - line 220, "pan.___", state 1340, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 220, "pan.___", state 1340, "else" - line 355, "pan.___", state 1346, "((sighand_exec==1))" - line 355, "pan.___", state 1346, "else" - line 361, "pan.___", state 1349, "sighand_exec = 1" - line 398, "pan.___", state 1362, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1364, "(1)" - line 398, "pan.___", state 1365, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1365, "else" - line 398, "pan.___", state 1368, "(1)" - line 402, "pan.___", state 1376, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1378, "(1)" - line 402, "pan.___", state 1379, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1379, "else" - line 402, "pan.___", state 1382, "(1)" - line 402, "pan.___", state 1383, "(1)" - line 402, "pan.___", state 1383, "(1)" - line 400, "pan.___", state 1388, "((i<1))" - line 400, "pan.___", state 1388, "((i>=1))" - line 407, "pan.___", state 1394, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1407, "(1)" - line 408, "pan.___", state 1408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1408, "else" - line 408, "pan.___", state 1411, "(1)" - line 408, "pan.___", state 1412, "(1)" - line 408, "pan.___", state 1412, "(1)" - line 412, "pan.___", state 1420, "(1)" - line 412, "pan.___", state 1421, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1421, "else" - line 412, "pan.___", state 1424, "(1)" - line 412, "pan.___", state 1425, "(1)" - line 412, "pan.___", state 1425, "(1)" - line 410, "pan.___", state 1430, "((i<1))" - line 410, "pan.___", state 1430, "((i>=1))" - line 417, "pan.___", state 1437, "(1)" - line 417, "pan.___", state 1438, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1438, "else" - line 417, "pan.___", state 1441, "(1)" - line 417, "pan.___", state 1442, "(1)" - line 417, "pan.___", state 1442, "(1)" - line 419, "pan.___", state 1445, "(1)" - line 419, "pan.___", state 1445, "(1)" - line 361, "pan.___", state 1454, "sighand_exec = 1" - line 701, "pan.___", state 1596, "-end-" - (111 of 1596 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 747, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.23 seconds -pan: rate 129618.7 states/second -pan: avg transition delay 7.3881e-07 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input deleted file mode 100644 index 808154e..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,722 +0,0 @@ -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index 522df0a..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1677 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2833 -2:4:2785 -3:4:2788 -4:4:2788 -5:4:2791 -6:4:2799 -7:4:2799 -8:4:2802 -9:4:2808 -10:4:2812 -11:4:2812 -12:4:2815 -13:4:2823 -14:4:2827 -15:4:2828 -16:0:2833 -17:4:2830 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-1644:3:2695 -1645:0:2833 -1646:3:2696 -1647:3:2703 -1648:3:2706 -1649:3:2707 -1650:3:2711 -1651:3:2716 -1652:0:2833 -1653:3:2727 -1654:0:2833 -1655:3:2732 -1656:3:2739 -1657:3:2740 -1658:3:2747 -1659:3:2752 -1660:0:2833 -1661:3:2767 -1662:0:2833 -1663:3:2769 -1664:0:2833 -1665:3:2770 -1666:0:2833 -1667:3:2773 -1668:0:2833 -1669:3:2778 -1670:0:2833 -1671:2:1071 -1672:0:2831 -1673:3:2779 -1674:0:2837 -1675:1:288 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.define b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.log deleted file mode 100644 index f854175..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.log +++ /dev/null @@ -1,224 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 6934, errors: 0 - 7626 states, stored - 67235 states, matched - 74861 transitions (= stored+matched) - 248896 atomic steps -hash conflicts: 113 (resolved) - -Stats on memory usage (in Megabytes): - 0.611 equivalent memory usage for states (stored*(State-vector + overhead)) - 0.867 actual memory usage for states (unsuccessful compression: 141.88%) - state-vector as stored = 91 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 466.545 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 159, "pan.___", state 254, "(1)" - line 163, "pan.___", state 262, "(1)" - line 167, "pan.___", state 274, "(1)" - line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 752, "(1)" - line 163, "pan.___", state 760, "(1)" - line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 761, "else" - line 161, "pan.___", state 766, "((j<1))" - line 161, "pan.___", state 766, "((j>=1))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 773, "else" - line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 776, "else" - line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 835, "(1)" - line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 852, "(1)" - line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 861, "(1)" - line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 862, "else" - line 176, "pan.___", state 867, "((j<1))" - line 176, "pan.___", state 867, "((j>=1))" - line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 882, "(1)" - line 163, "pan.___", state 890, "(1)" - line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 891, "else" - line 161, "pan.___", state 896, "((j<1))" - line 161, "pan.___", state 896, "((j>=1))" - line 167, "pan.___", state 902, "(1)" - line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 903, "else" - line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 906, "else" - line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 908, "else" - line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 909, "else" - line 355, "pan.___", state 915, "((sighand_exec==1))" - line 355, "pan.___", state 915, "else" - line 361, "pan.___", state 918, "sighand_exec = 1" - line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 933, "(1)" - line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 934, "else" - line 398, "pan.___", state 937, "(1)" - line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 947, "(1)" - line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 948, "else" - line 402, "pan.___", state 951, "(1)" - line 402, "pan.___", state 952, "(1)" - line 402, "pan.___", state 952, "(1)" - line 400, "pan.___", state 957, "((i<1))" - line 400, "pan.___", state 957, "((i>=1))" - line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 976, "(1)" - line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 977, "else" - line 408, "pan.___", state 980, "(1)" - line 408, "pan.___", state 981, "(1)" - line 408, "pan.___", state 981, "(1)" - line 412, "pan.___", state 989, "(1)" - line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 990, "else" - line 412, "pan.___", state 993, "(1)" - line 412, "pan.___", state 994, "(1)" - line 412, "pan.___", state 994, "(1)" - line 410, "pan.___", state 999, "((i<1))" - line 410, "pan.___", state 999, "((i>=1))" - line 417, "pan.___", state 1006, "(1)" - line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1007, "else" - line 417, "pan.___", state 1010, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 361, "pan.___", state 1023, "sighand_exec = 1" - line 178, "pan.___", state 1048, "(1)" - line 182, "pan.___", state 1059, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1069, "(1)" - line 163, "pan.___", state 1077, "(1)" - line 167, "pan.___", state 1089, "(1)" - line 174, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 84cf653..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1379 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2904 -2:4:2856 -3:4:2859 -4:4:2859 -5:4:2862 -6:4:2870 -7:4:2870 -8:4:2873 -9:4:2879 -10:4:2883 -11:4:2883 -12:4:2886 -13:4:2894 -14:4:2898 -15:4:2899 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-1332:0:2904 -1333:3:2708 -1334:3:2709 -1335:3:2713 -1336:3:2717 -1337:3:2718 -1338:3:2722 -1339:3:2730 -1340:3:2731 -1341:3:2736 -1342:3:2743 -1343:3:2744 -1344:3:2751 -1345:3:2756 -1346:0:2904 -1347:3:2767 -1348:0:2904 -1349:3:2775 -1350:3:2776 -1351:3:2780 -1352:3:2784 -1353:3:2785 -1354:3:2789 -1355:3:2797 -1356:3:2798 -1357:3:2803 -1358:3:2810 -1359:3:2811 -1360:3:2818 -1361:3:2823 -1362:0:2904 -1363:3:2838 -1364:0:2904 -1365:3:2840 -1366:0:2904 -1367:3:2841 -1368:0:2904 -1369:3:2844 -1370:0:2904 -1371:3:2849 -1372:0:2904 -1373:2:1350 -1374:0:2902 -1375:3:2850 -1376:0:2908 -1377:1:296 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress.ltl b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.define b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.log deleted file mode 100644 index a1a6122..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.log +++ /dev/null @@ -1,348 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) -depth 12: Claim reached state 9 (line 747) -depth 86: Claim reached state 9 (line 746) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10679, errors: 0 - 38182 states, stored (88898 visited) - 997091 states, matched - 1085989 transitions (= visited+matched) - 3694897 atomic steps -hash conflicts: 9602 (resolved) - -Stats on memory usage (in Megabytes): - 3.059 equivalent memory usage for states (stored*(State-vector + overhead)) - 2.930 actual memory usage for states (compression: 95.79%) - state-vector as stored = 52 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 468.596 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 159, "pan.___", state 254, "(1)" - line 163, "pan.___", state 262, "(1)" - line 167, "pan.___", state 274, "(1)" - line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 752, "(1)" - line 163, "pan.___", state 760, "(1)" - line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 761, "else" - line 161, "pan.___", state 766, "((j<1))" - line 161, "pan.___", state 766, "((j>=1))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 773, "else" - line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 776, "else" - line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 835, "(1)" - line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 852, "(1)" - line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 861, "(1)" - line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 862, "else" - line 176, "pan.___", state 867, "((j<1))" - line 176, "pan.___", state 867, "((j>=1))" - line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 882, "(1)" - line 163, "pan.___", state 890, "(1)" - line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 891, "else" - line 161, "pan.___", state 896, "((j<1))" - line 161, "pan.___", state 896, "((j>=1))" - line 167, "pan.___", state 902, "(1)" - line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 903, "else" - line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 906, "else" - line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 908, "else" - line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 909, "else" - line 355, "pan.___", state 915, "((sighand_exec==1))" - line 355, "pan.___", state 915, "else" - line 361, "pan.___", state 918, "sighand_exec = 1" - line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 933, "(1)" - line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 934, "else" - line 398, "pan.___", state 937, "(1)" - line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 947, "(1)" - line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 948, "else" - line 402, "pan.___", state 951, "(1)" - line 402, "pan.___", state 952, "(1)" - line 402, "pan.___", state 952, "(1)" - line 400, "pan.___", state 957, "((i<1))" - line 400, "pan.___", state 957, "((i>=1))" - line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 976, "(1)" - line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 977, "else" - line 408, "pan.___", state 980, "(1)" - line 408, "pan.___", state 981, "(1)" - line 408, "pan.___", state 981, "(1)" - line 412, "pan.___", state 989, "(1)" - line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 990, "else" - line 412, "pan.___", state 993, "(1)" - line 412, "pan.___", state 994, "(1)" - line 412, "pan.___", state 994, "(1)" - line 410, "pan.___", state 999, "((i<1))" - line 410, "pan.___", state 999, "((i>=1))" - line 417, "pan.___", state 1006, "(1)" - line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1007, "else" - line 417, "pan.___", state 1010, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 361, "pan.___", state 1023, "sighand_exec = 1" - line 402, "pan.___", state 1054, "(1)" - line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1113, "(1)" - line 402, "pan.___", state 1151, "(1)" - line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1210, "(1)" - line 398, "pan.___", state 1236, "(1)" - line 402, "pan.___", state 1250, "(1)" - line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1309, "(1)" - line 402, "pan.___", state 1350, "(1)" - line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1409, "(1)" - line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1432, "(1)" - line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1441, "(1)" - line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1442, "else" - line 176, "pan.___", state 1447, "((j<1))" - line 176, "pan.___", state 1447, "((j>=1))" - line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1462, "(1)" - line 163, "pan.___", state 1470, "(1)" - line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1471, "else" - line 161, "pan.___", state 1476, "((j<1))" - line 161, "pan.___", state 1476, "((j>=1))" - line 167, "pan.___", state 1482, "(1)" - line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1483, "else" - line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1486, "else" - line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 1545, "(1)" - line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1562, "(1)" - line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1571, "(1)" - line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1572, "else" - line 176, "pan.___", state 1577, "((j<1))" - line 176, "pan.___", state 1577, "((j>=1))" - line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1592, "(1)" - line 163, "pan.___", state 1600, "(1)" - line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1601, "else" - line 161, "pan.___", state 1606, "((j<1))" - line 161, "pan.___", state 1606, "((j>=1))" - line 167, "pan.___", state 1612, "(1)" - line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1613, "else" - line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1616, "else" - line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 1618, "else" - line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 1619, "else" - line 355, "pan.___", state 1625, "((sighand_exec==1))" - line 355, "pan.___", state 1625, "else" - line 361, "pan.___", state 1628, "sighand_exec = 1" - line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1643, "(1)" - line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1644, "else" - line 398, "pan.___", state 1647, "(1)" - line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1657, "(1)" - line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1658, "else" - line 402, "pan.___", state 1661, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 400, "pan.___", state 1667, "((i<1))" - line 400, "pan.___", state 1667, "((i>=1))" - line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1686, "(1)" - line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1687, "else" - line 408, "pan.___", state 1690, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 412, "pan.___", state 1699, "(1)" - line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1700, "else" - line 412, "pan.___", state 1703, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 410, "pan.___", state 1709, "((i<1))" - line 410, "pan.___", state 1709, "((i>=1))" - line 417, "pan.___", state 1716, "(1)" - line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1717, "else" - line 417, "pan.___", state 1720, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 361, "pan.___", state 1733, "sighand_exec = 1" - line 178, "pan.___", state 1758, "(1)" - line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1779, "(1)" - line 163, "pan.___", state 1787, "(1)" - line 167, "pan.___", state 1799, "(1)" - line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.spin.input.trail deleted file mode 100644 index 7c42af1..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4401 -2:4:4353 -3:4:4356 -4:4:4356 -5:4:4359 -6:4:4367 -7:4:4367 -8:4:4370 -9:4:4376 -10:4:4380 -11:4:4380 -12:4:4383 -13:4:4391 -14:4:4395 -15:4:4396 -16:0:4401 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-1176:0:4401 -1177:3:4347 -1178:0:4401 -1179:1:103 -1180:0:4401 -1181:3:4346 -1182:0:4401 -1183:2:1246 -1184:0:4401 -1185:3:4347 -1186:0:4401 -1187:2:1247 -1188:0:4401 -1189:3:4346 -1190:0:4401 -1191:2:1253 -1192:0:4401 -1193:3:4347 -1194:0:4401 -1195:2:1254 -1196:0:4399 -1197:3:4346 -1198:0:4405 -1199:3:4347 -1200:0:4405 -1201:2:1257 -1202:0:4405 -1203:3:4346 -1204:0:4405 -1205:2:1258 -1206:0:4405 -1207:3:4347 -1208:0:4405 -1209:2:1259 -1210:2:1263 -1211:2:1264 -1212:2:1272 -1213:2:1273 -1214:2:1277 -1215:2:1278 -1216:2:1286 -1217:2:1291 -1218:2:1295 -1219:2:1296 -1220:2:1303 -1221:2:1304 -1222:2:1315 -1223:2:1316 -1224:2:1317 -1225:2:1328 -1226:2:1333 -1227:2:1334 -1228:0:4405 -1229:3:4346 -1230:0:4405 -1231:2:1346 -1232:0:4405 -1233:3:4347 -1234:0:4405 -1235:2:1347 -1236:0:4405 -1237:3:4346 -1238:0:4405 -1239:1:104 --1:-1:-1 -1240:0:4405 -1241:3:4347 -1242:0:4405 -1243:3:4346 -1244:0:4405 -1245:2:1348 -1246:0:4405 -1247:3:4347 -1248:0:4405 -1249:2:1347 -1250:0:4405 -1251:3:4346 -1252:0:4405 -1253:1:105 -1254:0:4405 -1255:3:4347 -1256:0:4405 -1257:3:4346 -1258:0:4405 -1259:2:1348 -1260:0:4405 -1261:3:4347 -1262:0:4405 -1263:2:1347 -1264:0:4405 -1265:3:4346 -1266:0:4405 -1267:1:104 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.define b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.log deleted file mode 100644 index 02c53cf..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.log +++ /dev/null @@ -1,348 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) -depth 12: Claim reached state 9 (line 747) -depth 28: Claim reached state 9 (line 746) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10679, errors: 0 - 38555 states, stored (92500 visited) - 1044204 states, matched - 1136704 transitions (= visited+matched) - 3867169 atomic steps -hash conflicts: 8572 (resolved) - -Stats on memory usage (in Megabytes): - 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) - 2.930 actual memory usage for states (compression: 94.87%) - state-vector as stored = 52 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 468.596 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 159, "pan.___", state 254, "(1)" - line 163, "pan.___", state 262, "(1)" - line 167, "pan.___", state 274, "(1)" - line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 752, "(1)" - line 163, "pan.___", state 760, "(1)" - line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 761, "else" - line 161, "pan.___", state 766, "((j<1))" - line 161, "pan.___", state 766, "((j>=1))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 773, "else" - line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 776, "else" - line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 835, "(1)" - line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 852, "(1)" - line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 861, "(1)" - line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 862, "else" - line 176, "pan.___", state 867, "((j<1))" - line 176, "pan.___", state 867, "((j>=1))" - line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 882, "(1)" - line 163, "pan.___", state 890, "(1)" - line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 891, "else" - line 161, "pan.___", state 896, "((j<1))" - line 161, "pan.___", state 896, "((j>=1))" - line 167, "pan.___", state 902, "(1)" - line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 903, "else" - line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 906, "else" - line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 908, "else" - line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 909, "else" - line 355, "pan.___", state 915, "((sighand_exec==1))" - line 355, "pan.___", state 915, "else" - line 361, "pan.___", state 918, "sighand_exec = 1" - line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 933, "(1)" - line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 934, "else" - line 398, "pan.___", state 937, "(1)" - line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 947, "(1)" - line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 948, "else" - line 402, "pan.___", state 951, "(1)" - line 402, "pan.___", state 952, "(1)" - line 402, "pan.___", state 952, "(1)" - line 400, "pan.___", state 957, "((i<1))" - line 400, "pan.___", state 957, "((i>=1))" - line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 976, "(1)" - line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 977, "else" - line 408, "pan.___", state 980, "(1)" - line 408, "pan.___", state 981, "(1)" - line 408, "pan.___", state 981, "(1)" - line 412, "pan.___", state 989, "(1)" - line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 990, "else" - line 412, "pan.___", state 993, "(1)" - line 412, "pan.___", state 994, "(1)" - line 412, "pan.___", state 994, "(1)" - line 410, "pan.___", state 999, "((i<1))" - line 410, "pan.___", state 999, "((i>=1))" - line 417, "pan.___", state 1006, "(1)" - line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1007, "else" - line 417, "pan.___", state 1010, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 361, "pan.___", state 1023, "sighand_exec = 1" - line 402, "pan.___", state 1054, "(1)" - line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1113, "(1)" - line 402, "pan.___", state 1151, "(1)" - line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1210, "(1)" - line 398, "pan.___", state 1236, "(1)" - line 402, "pan.___", state 1250, "(1)" - line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1309, "(1)" - line 402, "pan.___", state 1350, "(1)" - line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1409, "(1)" - line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1432, "(1)" - line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1441, "(1)" - line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1442, "else" - line 176, "pan.___", state 1447, "((j<1))" - line 176, "pan.___", state 1447, "((j>=1))" - line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1462, "(1)" - line 163, "pan.___", state 1470, "(1)" - line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1471, "else" - line 161, "pan.___", state 1476, "((j<1))" - line 161, "pan.___", state 1476, "((j>=1))" - line 167, "pan.___", state 1482, "(1)" - line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1483, "else" - line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1486, "else" - line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 1545, "(1)" - line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1562, "(1)" - line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1571, "(1)" - line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1572, "else" - line 176, "pan.___", state 1577, "((j<1))" - line 176, "pan.___", state 1577, "((j>=1))" - line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1592, "(1)" - line 163, "pan.___", state 1600, "(1)" - line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1601, "else" - line 161, "pan.___", state 1606, "((j<1))" - line 161, "pan.___", state 1606, "((j>=1))" - line 167, "pan.___", state 1612, "(1)" - line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1613, "else" - line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1616, "else" - line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 1618, "else" - line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 1619, "else" - line 355, "pan.___", state 1625, "((sighand_exec==1))" - line 355, "pan.___", state 1625, "else" - line 361, "pan.___", state 1628, "sighand_exec = 1" - line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1643, "(1)" - line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1644, "else" - line 398, "pan.___", state 1647, "(1)" - line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1657, "(1)" - line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1658, "else" - line 402, "pan.___", state 1661, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 400, "pan.___", state 1667, "((i<1))" - line 400, "pan.___", state 1667, "((i>=1))" - line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1686, "(1)" - line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1687, "else" - line 408, "pan.___", state 1690, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 412, "pan.___", state 1699, "(1)" - line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1700, "else" - line 412, "pan.___", state 1703, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 410, "pan.___", state 1709, "((i<1))" - line 410, "pan.___", state 1709, "((i>=1))" - line 417, "pan.___", state 1716, "(1)" - line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1717, "else" - line 417, "pan.___", state 1720, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 361, "pan.___", state 1733, "sighand_exec = 1" - line 178, "pan.___", state 1758, "(1)" - line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1779, "(1)" - line 163, "pan.___", state 1787, "(1)" - line 167, "pan.___", state 1799, "(1)" - line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.define b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.log b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.log deleted file mode 100644 index cd4e32b..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.log +++ /dev/null @@ -1,286 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) -depth 12: Claim reached state 9 (line 748) -depth 28: Claim reached state 9 (line 747) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10679, errors: 0 - 38555 states, stored (92500 visited) - 1044204 states, matched - 1136704 transitions (= visited+matched) - 3867169 atomic steps -hash conflicts: 6390 (resolved) - -Stats on memory usage (in Megabytes): - 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) - 2.767 actual memory usage for states (compression: 89.58%) - state-vector as stored = 47 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 468.498 total actual memory usage - -unreached in proctype urcu_reader_sig - line 403, "pan.___", state 330, "(1)" - line 614, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 59, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 409, "pan.___", state 160, "(1)" - line 652, "pan.___", state 213, "(1)" - line 175, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 179, "pan.___", state 233, "(1)" - line 160, "pan.___", state 254, "(1)" - line 164, "pan.___", state 262, "(1)" - line 168, "pan.___", state 274, "(1)" - line 175, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 753, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 766, "(1)" - line 409, "pan.___", state 767, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 767, "else" - line 409, "pan.___", state 770, "(1)" - line 409, "pan.___", state 771, "(1)" - line 409, "pan.___", state 771, "(1)" - line 413, "pan.___", state 779, "(1)" - line 413, "pan.___", state 780, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 780, "else" - line 413, "pan.___", state 783, "(1)" - line 413, "pan.___", state 784, "(1)" - line 413, "pan.___", state 784, "(1)" - line 411, "pan.___", state 789, "((i<1))" - line 411, "pan.___", state 789, "((i>=1))" - line 418, "pan.___", state 796, "(1)" - line 418, "pan.___", state 797, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 797, "else" - line 418, "pan.___", state 800, "(1)" - line 418, "pan.___", state 801, "(1)" - line 418, "pan.___", state 801, "(1)" - line 420, "pan.___", state 804, "(1)" - line 420, "pan.___", state 804, "(1)" - line 356, "pan.___", state 810, "((sighand_exec==1))" - line 356, "pan.___", state 810, "else" - line 362, "pan.___", state 813, "sighand_exec = 1" - line 399, "pan.___", state 826, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 828, "(1)" - line 399, "pan.___", state 829, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 829, "else" - line 399, "pan.___", state 832, "(1)" - line 403, "pan.___", state 840, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 842, "(1)" - line 403, "pan.___", state 843, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 843, "else" - line 403, "pan.___", state 846, "(1)" - line 403, "pan.___", state 847, "(1)" - line 403, "pan.___", state 847, "(1)" - line 401, "pan.___", state 852, "((i<1))" - line 401, "pan.___", state 852, "((i>=1))" - line 408, "pan.___", state 858, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 871, "(1)" - line 409, "pan.___", state 872, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 872, "else" - line 409, "pan.___", state 875, "(1)" - line 409, "pan.___", state 876, "(1)" - line 409, "pan.___", state 876, "(1)" - line 413, "pan.___", state 884, "(1)" - line 413, "pan.___", state 885, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 885, "else" - line 413, "pan.___", state 888, "(1)" - line 413, "pan.___", state 889, "(1)" - line 413, "pan.___", state 889, "(1)" - line 411, "pan.___", state 894, "((i<1))" - line 411, "pan.___", state 894, "((i>=1))" - line 418, "pan.___", state 901, "(1)" - line 418, "pan.___", state 902, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 902, "else" - line 418, "pan.___", state 905, "(1)" - line 418, "pan.___", state 906, "(1)" - line 418, "pan.___", state 906, "(1)" - line 420, "pan.___", state 909, "(1)" - line 420, "pan.___", state 909, "(1)" - line 362, "pan.___", state 918, "sighand_exec = 1" - line 403, "pan.___", state 949, "(1)" - line 408, "pan.___", state 965, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1008, "(1)" - line 403, "pan.___", state 1046, "(1)" - line 408, "pan.___", state 1062, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1105, "(1)" - line 399, "pan.___", state 1131, "(1)" - line 403, "pan.___", state 1145, "(1)" - line 408, "pan.___", state 1161, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1204, "(1)" - line 403, "pan.___", state 1245, "(1)" - line 408, "pan.___", state 1261, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1304, "(1)" - line 399, "pan.___", state 1326, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1328, "(1)" - line 399, "pan.___", state 1329, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1329, "else" - line 399, "pan.___", state 1332, "(1)" - line 403, "pan.___", state 1340, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1342, "(1)" - line 403, "pan.___", state 1343, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1343, "else" - line 403, "pan.___", state 1346, "(1)" - line 403, "pan.___", state 1347, "(1)" - line 403, "pan.___", state 1347, "(1)" - line 401, "pan.___", state 1352, "((i<1))" - line 401, "pan.___", state 1352, "((i>=1))" - line 408, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1371, "(1)" - line 409, "pan.___", state 1372, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1372, "else" - line 409, "pan.___", state 1375, "(1)" - line 409, "pan.___", state 1376, "(1)" - line 409, "pan.___", state 1376, "(1)" - line 413, "pan.___", state 1384, "(1)" - line 413, "pan.___", state 1385, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1385, "else" - line 413, "pan.___", state 1388, "(1)" - line 413, "pan.___", state 1389, "(1)" - line 413, "pan.___", state 1389, "(1)" - line 411, "pan.___", state 1394, "((i<1))" - line 411, "pan.___", state 1394, "((i>=1))" - line 418, "pan.___", state 1401, "(1)" - line 418, "pan.___", state 1402, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1402, "else" - line 418, "pan.___", state 1405, "(1)" - line 418, "pan.___", state 1406, "(1)" - line 418, "pan.___", state 1406, "(1)" - line 420, "pan.___", state 1409, "(1)" - line 420, "pan.___", state 1409, "(1)" - line 356, "pan.___", state 1415, "((sighand_exec==1))" - line 356, "pan.___", state 1415, "else" - line 362, "pan.___", state 1418, "sighand_exec = 1" - line 399, "pan.___", state 1431, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1433, "(1)" - line 399, "pan.___", state 1434, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1434, "else" - line 399, "pan.___", state 1437, "(1)" - line 403, "pan.___", state 1445, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1447, "(1)" - line 403, "pan.___", state 1448, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1448, "else" - line 403, "pan.___", state 1451, "(1)" - line 403, "pan.___", state 1452, "(1)" - line 403, "pan.___", state 1452, "(1)" - line 401, "pan.___", state 1457, "((i<1))" - line 401, "pan.___", state 1457, "((i>=1))" - line 408, "pan.___", state 1463, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1476, "(1)" - line 409, "pan.___", state 1477, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1477, "else" - line 409, "pan.___", state 1480, "(1)" - line 409, "pan.___", state 1481, "(1)" - line 409, "pan.___", state 1481, "(1)" - line 413, "pan.___", state 1489, "(1)" - line 413, "pan.___", state 1490, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1490, "else" - line 413, "pan.___", state 1493, "(1)" - line 413, "pan.___", state 1494, "(1)" - line 413, "pan.___", state 1494, "(1)" - line 411, "pan.___", state 1499, "((i<1))" - line 411, "pan.___", state 1499, "((i>=1))" - line 418, "pan.___", state 1506, "(1)" - line 418, "pan.___", state 1507, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1507, "else" - line 418, "pan.___", state 1510, "(1)" - line 418, "pan.___", state 1511, "(1)" - line 418, "pan.___", state 1511, "(1)" - line 420, "pan.___", state 1514, "(1)" - line 420, "pan.___", state 1514, "(1)" - line 362, "pan.___", state 1523, "sighand_exec = 1" - line 179, "pan.___", state 1548, "(1)" - line 183, "pan.___", state 1559, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 160, "pan.___", state 1569, "(1)" - line 164, "pan.___", state 1577, "(1)" - line 168, "pan.___", state 1589, "(1)" - line 175, "pan.___", state 1600, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index 5b0eadd..0000000 --- a/formal-model/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,4231 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2965 -2:3:2917 -3:3:2920 -4:3:2920 -5:3:2920 -6:3:2923 -7:3:2931 -8:3:2931 -9:3:2931 -10:3:2934 -11:3:2940 -12:3:2944 -13:3:2944 -14:3:2944 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RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/Makefile b/formal-model/urcu-nosched-model/result-standard-execution-nest/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/asserts.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/asserts.log deleted file mode 100644 index 51f1ac0..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/asserts.log +++ /dev/null @@ -1,250 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 3212 States= 1e+06 Transitions= 1.17e+07 Memory= 519.572 t= 7.66 R= 1e+05 -Depth= 3212 States= 2e+06 Transitions= 2.38e+07 Memory= 572.990 t= 16 R= 1e+05 -Depth= 3212 States= 3e+06 Transitions= 3.62e+07 Memory= 626.408 t= 24.9 R= 1e+05 -pan: resizing hashtable to -w22.. done - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 48 byte, depth reached 3212, errors: 0 - 3539988 states, stored - 39085459 states, matched - 42625447 transitions (= stored+matched) -1.5602888e+08 atomic steps -hash conflicts: 28971442 (resolved) - -Stats on memory usage (in Megabytes): - 256.576 equivalent memory usage for states (stored*(State-vector + overhead)) - 196.718 actual memory usage for states (compression: 76.67%) - state-vector as stored = 30 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 686.338 total actual memory usage - -unreached in proctype urcu_reader - line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 61, "(1)" - line 417, ".input.spin", state 91, "(1)" - line 398, ".input.spin", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 151, "(1)" - line 417, ".input.spin", state 181, "(1)" - line 398, ".input.spin", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 242, "(1)" - line 417, ".input.spin", state 272, "(1)" - line 398, ".input.spin", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 360, "(1)" - line 417, ".input.spin", state 390, "(1)" - line 539, ".input.spin", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 59, "(1)" - line 412, ".input.spin", state 72, "(1)" - line 417, ".input.spin", state 89, "(1)" - line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 153, "(1)" - line 412, ".input.spin", state 166, "(1)" - line 651, ".input.spin", state 199, "(1)" - line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 240, "(1)" - line 163, ".input.spin", state 248, "(1)" - line 167, ".input.spin", state 260, "(1)" - line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 927, "(1)" - line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, ".input.spin", state 928, "else" - line 408, ".input.spin", state 931, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 412, ".input.spin", state 940, "(1)" - line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, ".input.spin", state 941, "else" - line 412, ".input.spin", state 944, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 410, ".input.spin", state 950, "((i<1))" - line 410, ".input.spin", state 950, "((i>=1))" - line 417, ".input.spin", state 957, "(1)" - line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, ".input.spin", state 958, "else" - line 417, ".input.spin", state 961, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1040, "(1)" - line 417, ".input.spin", state 1057, "(1)" - line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1130, "(1)" - line 417, ".input.spin", state 1147, "(1)" - line 398, ".input.spin", state 1166, "(1)" - line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1222, "(1)" - line 417, ".input.spin", state 1239, "(1)" - line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1315, "(1)" - line 417, ".input.spin", state 1332, "(1)" - line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 1378, "(1)" - line 163, ".input.spin", state 1386, "(1)" - line 167, ".input.spin", state 1398, "(1)" - line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 1595, "(1)" - line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, ".input.spin", state 1596, "else" - line 408, ".input.spin", state 1599, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 412, ".input.spin", state 1608, "(1)" - line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, ".input.spin", state 1609, "else" - line 412, ".input.spin", state 1612, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 410, ".input.spin", state 1618, "((i<1))" - line 410, ".input.spin", state 1618, "((i>=1))" - line 417, ".input.spin", state 1625, "(1)" - line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, ".input.spin", state 1626, "else" - line 417, ".input.spin", state 1629, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 1681, "(1)" - line 163, ".input.spin", state 1689, "(1)" - line 167, ".input.spin", state 1701, "(1)" - line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/asserts.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/references.txt b/formal-model/urcu-nosched-model/result-standard-execution-nest/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu.sh b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu.spin b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.log deleted file mode 100644 index 884b15e..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.log +++ /dev/null @@ -1,262 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) -Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.53 R= 1e+05 -Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.8 R= 1e+05 -Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.5 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 3880 States= 4e+06 Transitions= 4.84e+07 Memory= 741.318 t= 41.1 R= 1e+05 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3880, errors: 0 - 4015564 states, stored - 44539121 states, matched - 48554685 transitions (= stored+matched) -1.7777933e+08 atomic steps -hash conflicts: 33629695 (resolved) - -Stats on memory usage (in Megabytes): - 321.681 equivalent memory usage for states (stored*(State-vector + overhead)) - 252.629 actual memory usage for states (compression: 78.53%) - state-vector as stored = 38 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 742.295 total actual memory usage - -unreached in proctype urcu_reader - line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 61, "(1)" - line 417, "pan.___", state 91, "(1)" - line 398, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 151, "(1)" - line 417, "pan.___", state 181, "(1)" - line 398, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 242, "(1)" - line 417, "pan.___", state 272, "(1)" - line 398, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 360, "(1)" - line 417, "pan.___", state 390, "(1)" - line 539, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 59, "(1)" - line 412, "pan.___", state 72, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 153, "(1)" - line 412, "pan.___", state 166, "(1)" - line 651, "pan.___", state 199, "(1)" - line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 240, "(1)" - line 163, "pan.___", state 248, "(1)" - line 167, "pan.___", state 260, "(1)" - line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 927, "(1)" - line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, "pan.___", state 928, "else" - line 408, "pan.___", state 931, "(1)" - line 408, "pan.___", state 932, "(1)" - line 408, "pan.___", state 932, "(1)" - line 412, "pan.___", state 940, "(1)" - line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, "pan.___", state 941, "else" - line 412, "pan.___", state 944, "(1)" - line 412, "pan.___", state 945, "(1)" - line 412, "pan.___", state 945, "(1)" - line 410, "pan.___", state 950, "((i<1))" - line 410, "pan.___", state 950, "((i>=1))" - line 417, "pan.___", state 957, "(1)" - line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, "pan.___", state 958, "else" - line 417, "pan.___", state 961, "(1)" - line 417, "pan.___", state 962, "(1)" - line 417, "pan.___", state 962, "(1)" - line 419, "pan.___", state 965, "(1)" - line 419, "pan.___", state 965, "(1)" - line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1040, "(1)" - line 417, "pan.___", state 1057, "(1)" - line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1130, "(1)" - line 417, "pan.___", state 1147, "(1)" - line 398, "pan.___", state 1166, "(1)" - line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1222, "(1)" - line 417, "pan.___", state 1239, "(1)" - line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1315, "(1)" - line 417, "pan.___", state 1332, "(1)" - line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1378, "(1)" - line 163, "pan.___", state 1386, "(1)" - line 167, "pan.___", state 1398, "(1)" - line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1595, "(1)" - line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, "pan.___", state 1596, "else" - line 408, "pan.___", state 1599, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 412, "pan.___", state 1608, "(1)" - line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, "pan.___", state 1609, "else" - line 412, "pan.___", state 1612, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 410, "pan.___", state 1618, "((i<1))" - line 410, "pan.___", state 1618, "((i>=1))" - line 417, "pan.___", state 1625, "(1)" - line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, "pan.___", state 1626, "else" - line 417, "pan.___", state 1629, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1681, "(1)" - line 163, "pan.___", state 1689, "(1)" - line 167, "pan.___", state 1701, "(1)" - line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input deleted file mode 100644 index f2f00e4..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input +++ /dev/null @@ -1,722 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input.trail deleted file mode 100644 index 837f3d9..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input.trail +++ /dev/null @@ -1,15043 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 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@@ -#define READER_NEST_LEVEL 2 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.log deleted file mode 100644 index d503334..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.log +++ /dev/null @@ -1,20 +0,0 @@ -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_nested.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) -Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.48 R= 1e+05 -Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.6 R= 1e+05 -Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.3 R= 1e+05 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input deleted file mode 100644 index c94928c..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input +++ /dev/null @@ -1,696 +0,0 @@ -#define READER_NEST_LEVEL 1 - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE -#define get_pid() ((_pid < 1) -> 0 : 1) -#elif defined(TEST_SIGNAL_ON_READ) -#define get_pid() ((_pid < 2) -> 0 : 1) -#else -#define get_pid() (_pid) -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - dispatch_sighand_read_exec(); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 1; - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input.trail deleted file mode 100644 index 6f29ad2..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input.trail +++ /dev/null @@ -1,11161 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 -21:4:4355 -22:4:4359 -23:4:4360 -24:0:4365 -25:4:4362 -26:0:4365 -27:3:2331 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b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.log deleted file mode 100644 index 27a963a..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.log +++ /dev/null @@ -1,267 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -Depth= 11386 States= 1e+06 Transitions= 1.56e+07 Memory= 527.287 t= 12.8 R= 8e+04 -pan: claim violated! (at depth 2146) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 72 byte, depth reached 11386, errors: 1 - 1223588 states, stored - 17987399 states, matched - 19210987 transitions (= stored+matched) - 70012127 atomic steps -hash conflicts: 4173157 (resolved) - -Stats on memory usage (in Megabytes): - 116.690 equivalent memory usage for states (stored*(State-vector + overhead)) - 75.177 actual memory usage for states (compression: 64.42%) - state-vector as stored = 36 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 540.861 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 151, "(1)" - line 419, "pan.___", state 181, "(1)" - line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 242, "(1)" - line 419, "pan.___", state 272, "(1)" - line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 331, "(1)" - line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 360, "(1)" - line 419, "pan.___", state 390, "(1)" - line 541, "pan.___", state 414, "-end-" - (18 of 414 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 421, "pan.___", state 97, "(1)" - line 421, "pan.___", state 97, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 410, "pan.___", state 153, "(1)" - line 414, "pan.___", state 166, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 653, "pan.___", state 199, "(1)" - line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 254, "(1)" - line 414, "pan.___", state 267, "(1)" - line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 345, "(1)" - line 414, "pan.___", state 358, "(1)" - line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 440, "(1)" - line 414, "pan.___", state 453, "(1)" - line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 533, "(1)" - line 414, "pan.___", state 546, "(1)" - line 400, "pan.___", state 582, "(1)" - line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 638, "(1)" - line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 731, "(1)" - line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 821, "(1)" - line 419, "pan.___", state 838, "(1)" - line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 912, "(1)" - line 419, "pan.___", state 929, "(1)" - line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1007, "(1)" - line 419, "pan.___", state 1024, "(1)" - line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1053, "else" - line 400, "pan.___", state 1056, "(1)" - line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1066, "(1)" - line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1067, "else" - line 404, "pan.___", state 1070, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 402, "pan.___", state 1076, "((i<1))" - line 402, "pan.___", state 1076, "((i>=1))" - line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1095, "(1)" - line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1096, "else" - line 410, "pan.___", state 1099, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 414, "pan.___", state 1108, "(1)" - line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1109, "else" - line 414, "pan.___", state 1112, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 412, "pan.___", state 1118, "((i<1))" - line 412, "pan.___", state 1118, "((i>=1))" - line 419, "pan.___", state 1125, "(1)" - line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1126, "else" - line 419, "pan.___", state 1129, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1208, "(1)" - line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1298, "(1)" - line 400, "pan.___", state 1334, "(1)" - line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1390, "(1)" - line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1483, "(1)" - line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1573, "(1)" - line 419, "pan.___", state 1590, "(1)" - line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1664, "(1)" - line 419, "pan.___", state 1681, "(1)" - line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1759, "(1)" - line 419, "pan.___", state 1776, "(1)" - line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1804, "(1)" - line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1805, "else" - line 400, "pan.___", state 1808, "(1)" - line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1818, "(1)" - line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1819, "else" - line 404, "pan.___", state 1822, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 402, "pan.___", state 1828, "((i<1))" - line 402, "pan.___", state 1828, "((i>=1))" - line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1847, "(1)" - line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1848, "else" - line 410, "pan.___", state 1851, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 414, "pan.___", state 1860, "(1)" - line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1861, "else" - line 414, "pan.___", state 1864, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 412, "pan.___", state 1870, "((i<1))" - line 412, "pan.___", state 1870, "((i>=1))" - line 419, "pan.___", state 1877, "(1)" - line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1878, "else" - line 419, "pan.___", state 1881, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1960, "(1)" - line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2051, "(1)" - line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2146, "(1)" - line 703, "pan.___", state 2192, "-end-" - (144 of 2192 states) -unreached in proctype :init: - line 710, "pan.___", state 9, "((j<2))" - line 710, "pan.___", state 9, "((j>=2))" - line 711, "pan.___", state 20, "((j<2))" - line 711, "pan.___", state 20, "((j>=2))" - line 716, "pan.___", state 33, "((j<2))" - line 716, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 750, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 15.9 seconds -pan: rate 77100.693 states/second -pan: avg transition delay 8.2609e-07 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input deleted file mode 100644 index 927df3f..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,724 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 04e7425..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2149 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2654 -2:3:2606 -3:3:2609 -4:3:2609 -5:3:2612 -6:3:2620 -7:3:2620 -8:3:2623 -9:3:2629 -10:3:2633 -11:3:2633 -12:3:2636 -13:3:2644 -14:3:2648 -15:3:2649 -16:0:2654 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-2076:1:68 -2077:1:69 -2078:1:70 -2079:1:81 -2080:1:86 -2081:1:87 -2082:0:2654 -2083:2:2600 -2084:0:2654 -2085:1:99 -2086:0:2654 -2087:2:2599 -2088:0:2654 -2089:1:101 -2090:0:2654 -2091:2:2600 -2092:0:2654 -2093:1:102 -2094:1:106 -2095:1:107 -2096:1:115 -2097:1:116 -2098:1:120 -2099:1:121 -2100:1:129 -2101:1:134 -2102:1:138 -2103:1:139 -2104:1:146 -2105:1:147 -2106:1:158 -2107:1:159 -2108:1:160 -2109:1:171 -2110:1:176 -2111:1:177 -2112:0:2654 -2113:2:2599 -2114:0:2654 -2115:1:189 -2116:0:2654 -2117:2:2600 -2118:0:2654 -2119:1:285 -2120:0:2654 -2121:2:2599 -2122:0:2654 -2123:1:286 -2124:0:2654 -2125:2:2600 -2126:0:2654 -2127:1:291 -2128:0:2654 -2129:2:2599 -2130:0:2654 -2131:1:293 -2132:0:2654 -2133:2:2600 -2134:0:2654 -2135:1:296 -2136:0:2654 -2137:2:2599 -2138:0:2654 -2139:1:301 -2140:0:2654 -2141:2:2600 -2142:0:2654 -2143:1:302 -2144:0:2652 -2145:2:2599 -2146:0:2658 -2147:2:779 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.define b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.log deleted file mode 100644 index b7f3b80..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.log +++ /dev/null @@ -1,266 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 5439 States= 1e+06 Transitions= 1.03e+07 Memory= 527.190 t= 8.16 R= 1e+05 -pan: claim violated! (at depth 1801) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 5439, errors: 1 - 1006552 states, stored - 9396280 states, matched - 10402832 transitions (= stored+matched) - 36844262 atomic steps -hash conflicts: 1832712 (resolved) - -Stats on memory usage (in Megabytes): - 80.634 equivalent memory usage for states (stored*(State-vector + overhead)) - 61.871 actual memory usage for states (compression: 76.73%) - state-vector as stored = 36 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 527.580 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 759, "(1)" - line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 760, "else" - line 409, "pan.___", state 763, "(1)" - line 409, "pan.___", state 764, "(1)" - line 409, "pan.___", state 764, "(1)" - line 413, "pan.___", state 772, "(1)" - line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 773, "else" - line 413, "pan.___", state 776, "(1)" - line 413, "pan.___", state 777, "(1)" - line 413, "pan.___", state 777, "(1)" - line 411, "pan.___", state 782, "((i<1))" - line 411, "pan.___", state 782, "((i>=1))" - line 418, "pan.___", state 789, "(1)" - line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 790, "else" - line 418, "pan.___", state 793, "(1)" - line 418, "pan.___", state 794, "(1)" - line 418, "pan.___", state 794, "(1)" - line 420, "pan.___", state 797, "(1)" - line 420, "pan.___", state 797, "(1)" - line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 872, "(1)" - line 418, "pan.___", state 889, "(1)" - line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 962, "(1)" - line 418, "pan.___", state 979, "(1)" - line 399, "pan.___", state 998, "(1)" - line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1054, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1147, "(1)" - line 418, "pan.___", state 1164, "(1)" - line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1343, "(1)" - line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1344, "else" - line 409, "pan.___", state 1347, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 413, "pan.___", state 1356, "(1)" - line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1357, "else" - line 413, "pan.___", state 1360, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 411, "pan.___", state 1366, "((i<1))" - line 411, "pan.___", state 1366, "((i>=1))" - line 418, "pan.___", state 1373, "(1)" - line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1374, "else" - line 418, "pan.___", state 1377, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 8.24 seconds -pan: rate 122154.37 states/second -pan: avg transition delay 7.9209e-07 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input deleted file mode 100644 index 6dea6e1..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_RMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 071a19e..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1804 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1982 -2:3:1934 -3:3:1937 -4:3:1937 -5:3:1940 -6:3:1948 -7:3:1948 -8:3:1951 -9:3:1957 -10:3:1961 -11:3:1961 -12:3:1964 -13:3:1972 -14:3:1976 -15:3:1977 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-1771:0:1982 -1772:2:1927 -1773:0:1982 -1774:1:285 -1775:0:1982 -1776:2:1928 -1777:0:1982 -1778:1:286 -1779:0:1982 -1780:2:1927 -1781:0:1982 -1782:1:291 -1783:0:1982 -1784:2:1928 -1785:0:1982 -1786:1:293 -1787:0:1982 -1788:2:1927 -1789:0:1982 -1790:1:296 -1791:0:1982 -1792:2:1928 -1793:0:1982 -1794:1:301 -1795:0:1982 -1796:2:1927 -1797:0:1982 -1798:1:302 -1799:0:1980 -1800:2:1928 -1801:0:1986 -1802:1:124 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.define b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.log deleted file mode 100644 index 4dd3892..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.log +++ /dev/null @@ -1,294 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -pan: claim violated! (at depth 1882) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4174, errors: 1 - 367189 states, stored - 3431533 states, matched - 3798722 transitions (= stored+matched) - 13407384 atomic steps -hash conflicts: 253700 (resolved) - -Stats on memory usage (in Megabytes): - 29.415 equivalent memory usage for states (stored*(State-vector + overhead)) - 22.811 actual memory usage for states (compression: 77.55%) - state-vector as stored = 37 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 488.518 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 331, "(1)" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (18 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 401, "pan.___", state 134, "((i<1))" - line 401, "pan.___", state 134, "((i>=1))" - line 409, "pan.___", state 153, "(1)" - line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 154, "else" - line 409, "pan.___", state 157, "(1)" - line 409, "pan.___", state 158, "(1)" - line 409, "pan.___", state 158, "(1)" - line 413, "pan.___", state 166, "(1)" - line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 167, "else" - line 413, "pan.___", state 170, "(1)" - line 413, "pan.___", state 171, "(1)" - line 413, "pan.___", state 171, "(1)" - line 411, "pan.___", state 176, "((i<1))" - line 411, "pan.___", state 176, "((i>=1))" - line 418, "pan.___", state 183, "(1)" - line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 184, "else" - line 418, "pan.___", state 187, "(1)" - line 418, "pan.___", state 188, "(1)" - line 418, "pan.___", state 188, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 369, "pan.___", state 193, "(1)" - line 652, "pan.___", state 199, "(1)" - line 646, "pan.___", state 202, "((write_lock==0))" - line 646, "pan.___", state 202, "else" - line 644, "pan.___", state 203, "(1)" - line 160, "pan.___", state 209, "(1)" - line 164, "pan.___", state 217, "(1)" - line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 164, "pan.___", state 218, "else" - line 162, "pan.___", state 223, "((j<1))" - line 162, "pan.___", state 223, "((j>=1))" - line 168, "pan.___", state 229, "(1)" - line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 168, "pan.___", state 230, "else" - line 160, "pan.___", state 241, "(1)" - line 168, "pan.___", state 261, "(1)" - line 160, "pan.___", state 277, "(1)" - line 164, "pan.___", state 285, "(1)" - line 168, "pan.___", state 297, "(1)" - line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 356, "(1)" - line 413, "pan.___", state 369, "(1)" - line 418, "pan.___", state 386, "(1)" - line 399, "pan.___", state 405, "(1)" - line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 461, "(1)" - line 418, "pan.___", state 478, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 164, "pan.___", state 594, "(1)" - line 168, "pan.___", state 606, "(1)" - line 160, "pan.___", state 618, "(1)" - line 168, "pan.___", state 638, "(1)" - line 164, "pan.___", state 662, "(1)" - line 168, "pan.___", state 674, "(1)" - line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 698, "(1)" - line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 399, "pan.___", state 699, "else" - line 399, "pan.___", state 702, "(1)" - line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 712, "(1)" - line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 403, "pan.___", state 713, "else" - line 403, "pan.___", state 716, "(1)" - line 403, "pan.___", state 717, "(1)" - line 403, "pan.___", state 717, "(1)" - line 401, "pan.___", state 722, "((i<1))" - line 401, "pan.___", state 722, "((i>=1))" - line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 741, "(1)" - line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 742, "else" - line 409, "pan.___", state 745, "(1)" - line 409, "pan.___", state 746, "(1)" - line 409, "pan.___", state 746, "(1)" - line 413, "pan.___", state 754, "(1)" - line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 755, "else" - line 413, "pan.___", state 758, "(1)" - line 413, "pan.___", state 759, "(1)" - line 413, "pan.___", state 759, "(1)" - line 411, "pan.___", state 764, "((i<1))" - line 411, "pan.___", state 764, "((i>=1))" - line 418, "pan.___", state 771, "(1)" - line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 772, "else" - line 418, "pan.___", state 775, "(1)" - line 418, "pan.___", state 776, "(1)" - line 418, "pan.___", state 776, "(1)" - line 420, "pan.___", state 779, "(1)" - line 420, "pan.___", state 779, "(1)" - line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 854, "(1)" - line 418, "pan.___", state 871, "(1)" - line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 944, "(1)" - line 418, "pan.___", state 961, "(1)" - line 399, "pan.___", state 980, "(1)" - line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1036, "(1)" - line 418, "pan.___", state 1053, "(1)" - line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1129, "(1)" - line 418, "pan.___", state 1146, "(1)" - line 164, "pan.___", state 1169, "(1)" - line 168, "pan.___", state 1181, "(1)" - line 160, "pan.___", state 1193, "(1)" - line 168, "pan.___", state 1213, "(1)" - line 164, "pan.___", state 1237, "(1)" - line 168, "pan.___", state 1249, "(1)" - line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 1273, "(1)" - line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 399, "pan.___", state 1274, "else" - line 399, "pan.___", state 1277, "(1)" - line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 1287, "(1)" - line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 403, "pan.___", state 1288, "else" - line 403, "pan.___", state 1291, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 401, "pan.___", state 1297, "((i<1))" - line 401, "pan.___", state 1297, "((i>=1))" - line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1316, "(1)" - line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1317, "else" - line 409, "pan.___", state 1320, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 413, "pan.___", state 1329, "(1)" - line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1330, "else" - line 413, "pan.___", state 1333, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 411, "pan.___", state 1339, "((i<1))" - line 411, "pan.___", state 1339, "((i>=1))" - line 418, "pan.___", state 1346, "(1)" - line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1347, "else" - line 418, "pan.___", state 1350, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 164, "pan.___", state 1379, "(1)" - line 168, "pan.___", state 1391, "(1)" - line 160, "pan.___", state 1403, "(1)" - line 168, "pan.___", state 1423, "(1)" - line 164, "pan.___", state 1447, "(1)" - line 168, "pan.___", state 1459, "(1)" - line 702, "pan.___", state 1484, "-end-" - (160 of 1484 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 2.96 seconds -pan: rate 124050.34 states/second -pan: avg transition delay 7.7921e-07 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input deleted file mode 100644 index f4d8acb..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index f73a838..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1885 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1946 -2:3:1898 -3:3:1901 -4:3:1901 -5:3:1904 -6:3:1912 -7:3:1912 -8:3:1915 -9:3:1921 -10:3:1925 -11:3:1925 -12:3:1928 -13:3:1936 -14:3:1940 -15:3:1941 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-1864:2:1856 -1865:2:1857 -1866:2:1864 -1867:2:1869 -1868:0:1946 -1869:2:1880 -1870:0:1946 -1871:2:1882 -1872:0:1946 -1873:2:1883 -1874:0:1946 -1875:2:1886 -1876:0:1946 -1877:2:1891 -1878:0:1946 -1879:1:302 -1880:0:1944 -1881:2:1892 -1882:0:1950 -1883:1:143 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.define b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.log deleted file mode 100644 index 2a80112..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.log +++ /dev/null @@ -1,197 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -pan: claim violated! (at depth 1371) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3387, errors: 1 - 206295 states, stored - 1902753 states, matched - 2109048 transitions (= stored+matched) - 7663223 atomic steps -hash conflicts: 101109 (resolved) - -Stats on memory usage (in Megabytes): - 16.526 equivalent memory usage for states (stored*(State-vector + overhead)) - 13.080 actual memory usage for states (compression: 79.15%) - state-vector as stored = 38 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 478.752 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1013, "(1)" - line 164, "pan.___", state 1021, "(1)" - line 168, "pan.___", state 1033, "(1)" - line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.66 seconds -pan: rate 124274.1 states/second -pan: avg transition delay 7.8708e-07 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input deleted file mode 100644 index 93aae44..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define SINGLE_FLIP - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 73c1400..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1374 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1650 -2:3:1602 -3:3:1605 -4:3:1605 -5:3:1608 -6:3:1616 -7:3:1616 -8:3:1619 -9:3:1625 -10:3:1629 -11:3:1629 -12:3:1632 -13:3:1640 -14:3:1644 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deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.define b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.log deleted file mode 100644 index 9e98b9f..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.log +++ /dev/null @@ -1,275 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 1767: Claim reached state 9 (line 748) -Depth= 3880 States= 1e+06 Transitions= 1.71e+07 Memory= 499.651 t= 14.5 R= 7e+04 -Depth= 3880 States= 2e+06 Transitions= 3.79e+07 Memory= 532.365 t= 32.3 R= 6e+04 -Depth= 3880 States= 3e+06 Transitions= 5.83e+07 Memory= 564.983 t= 50.2 R= 6e+04 -pan: resizing hashtable to -w22.. done -Depth= 3880 States= 4e+06 Transitions= 7.76e+07 Memory= 629.307 t= 67 R= 6e+04 -Depth= 3880 States= 5e+06 Transitions= 9.78e+07 Memory= 662.315 t= 84.2 R= 6e+04 -Depth= 3880 States= 6e+06 Transitions= 1.19e+08 Memory= 694.736 t= 102 R= 6e+04 -Depth= 3880 States= 7e+06 Transitions= 1.38e+08 Memory= 727.842 t= 119 R= 6e+04 -Depth= 3880 States= 8e+06 Transitions= 1.59e+08 Memory= 760.752 t= 137 R= 6e+04 -Depth= 3880 States= 9e+06 Transitions= 1.79e+08 Memory= 793.174 t= 155 R= 6e+04 -pan: resizing hashtable to -w24.. done -Depth= 3880 States= 1e+07 Transitions= 1.98e+08 Memory= 950.568 t= 172 R= 6e+04 -Depth= 3880 States= 1.1e+07 Transitions= 2.19e+08 Memory= 983.479 t= 189 R= 6e+04 -Depth= 3880 States= 1.2e+07 Transitions= 2.4e+08 Memory= 1015.901 t= 207 R= 6e+04 -Depth= 3880 States= 1.3e+07 Transitions= 2.58e+08 Memory= 1049.397 t= 223 R= 6e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3880, errors: 0 - 7197860 states, stored (1.33457e+07 visited) -2.5266654e+08 states, matched -2.6601223e+08 transitions (= visited+matched) -9.9067284e+08 atomic steps -hash conflicts: 87783920 (resolved) - -Stats on memory usage (in Megabytes): - 576.611 equivalent memory usage for states (stored*(State-vector + overhead)) - 474.839 actual memory usage for states (compression: 82.35%) - state-vector as stored = 41 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1060.529 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.spin.input.trail deleted file mode 100644 index 7c42af1..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4401 -2:4:4353 -3:4:4356 -4:4:4356 -5:4:4359 -6:4:4367 -7:4:4367 -8:4:4370 -9:4:4376 -10:4:4380 -11:4:4380 -12:4:4383 -13:4:4391 -14:4:4395 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-1251:3:4346 -1252:0:4405 -1253:1:105 -1254:0:4405 -1255:3:4347 -1256:0:4405 -1257:3:4346 -1258:0:4405 -1259:2:1348 -1260:0:4405 -1261:3:4347 -1262:0:4405 -1263:2:1347 -1264:0:4405 -1265:3:4346 -1266:0:4405 -1267:1:104 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.define b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.log deleted file mode 100644 index 434151a..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.log +++ /dev/null @@ -1,275 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 291: Claim reached state 9 (line 748) -Depth= 2677 States= 1e+06 Transitions= 1.57e+07 Memory= 487.932 t= 13.4 R= 7e+04 -Depth= 3023 States= 2e+06 Transitions= 3.19e+07 Memory= 509.709 t= 27.3 R= 7e+04 -Depth= 3610 States= 3e+06 Transitions= 4.84e+07 Memory= 531.486 t= 41.6 R= 7e+04 -pan: resizing hashtable to -w22.. done -Depth= 3956 States= 4e+06 Transitions= 6.63e+07 Memory= 595.029 t= 57 R= 7e+04 -Depth= 3956 States= 5e+06 Transitions= 8.67e+07 Memory= 617.783 t= 74.5 R= 7e+04 -Depth= 3956 States= 6e+06 Transitions= 1.08e+08 Memory= 660.850 t= 93 R= 6e+04 -Depth= 3956 States= 7e+06 Transitions= 1.28e+08 Memory= 690.928 t= 110 R= 6e+04 -Depth= 3956 States= 8e+06 Transitions= 1.51e+08 Memory= 729.600 t= 129 R= 6e+04 -Depth= 3956 States= 9e+06 Transitions= 1.7e+08 Memory= 765.830 t= 146 R= 6e+04 -pan: resizing hashtable to -w24.. done -Depth= 3956 States= 1e+07 Transitions= 1.92e+08 Memory= 919.611 t= 166 R= 6e+04 -Depth= 3956 States= 1.1e+07 Transitions= 2.13e+08 Memory= 958.576 t= 183 R= 6e+04 -Depth= 3956 States= 1.2e+07 Transitions= 2.33e+08 Memory= 985.627 t= 201 R= 6e+04 -Depth= 3956 States= 1.3e+07 Transitions= 2.55e+08 Memory= 1027.033 t= 220 R= 6e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3956, errors: 0 - 7045896 states, stored (1.35792e+07 visited) -2.5326206e+08 states, matched -2.668413e+08 transitions (= visited+matched) -9.9425626e+08 atomic steps -hash conflicts: 65494104 (resolved) - -Stats on memory usage (in Megabytes): - 564.437 equivalent memory usage for states (stored*(State-vector + overhead)) - 465.758 actual memory usage for states (compression: 82.52%) - state-vector as stored = 41 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1051.350 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.define b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.log b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.log deleted file mode 100644 index 7fafb9e..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.log +++ /dev/null @@ -1,514 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -depth 15: Claim reached state 9 (line 750) -depth 291: Claim reached state 9 (line 749) -pan: acceptance cycle (at depth 4308) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4820, errors: 1 - 62091 states, stored (169917 visited) - 2179326 states, matched - 2349243 transitions (= visited+matched) - 8805349 atomic steps -hash conflicts: 50953 (resolved) - -Stats on memory usage (in Megabytes): - 4.974 equivalent memory usage for states (stored*(State-vector + overhead)) - 4.145 actual memory usage for states (compression: 83.33%) - state-vector as stored = 42 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 469.865 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 151, "(1)" - line 419, "pan.___", state 181, "(1)" - line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 242, "(1)" - line 419, "pan.___", state 272, "(1)" - line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 360, "(1)" - line 419, "pan.___", state 390, "(1)" - line 541, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 402, "pan.___", state 134, "((i<1))" - line 402, "pan.___", state 134, "((i>=1))" - line 410, "pan.___", state 153, "(1)" - line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 154, "else" - line 410, "pan.___", state 157, "(1)" - line 410, "pan.___", state 158, "(1)" - line 410, "pan.___", state 158, "(1)" - line 414, "pan.___", state 166, "(1)" - line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 167, "else" - line 414, "pan.___", state 170, "(1)" - line 414, "pan.___", state 171, "(1)" - line 414, "pan.___", state 171, "(1)" - line 412, "pan.___", state 176, "((i<1))" - line 412, "pan.___", state 176, "((i>=1))" - line 419, "pan.___", state 183, "(1)" - line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 184, "else" - line 419, "pan.___", state 187, "(1)" - line 419, "pan.___", state 188, "(1)" - line 419, "pan.___", state 188, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 370, "pan.___", state 193, "(1)" - line 653, "pan.___", state 199, "(1)" - line 647, "pan.___", state 202, "((write_lock==0))" - line 647, "pan.___", state 202, "else" - line 645, "pan.___", state 203, "(1)" - line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 225, "((j<1))" - line 178, "pan.___", state 225, "((j>=1))" - line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 240, "(1)" - line 165, "pan.___", state 248, "(1)" - line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 165, "pan.___", state 249, "else" - line 163, "pan.___", state 254, "((j<1))" - line 163, "pan.___", state 254, "((j>=1))" - line 169, "pan.___", state 260, "(1)" - line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 169, "pan.___", state 261, "else" - line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 171, "pan.___", state 264, "else" - line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 169, "pan.___", state 323, "(1)" - line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 355, "((j<1))" - line 178, "pan.___", state 355, "((j>=1))" - line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 370, "(1)" - line 165, "pan.___", state 378, "(1)" - line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 165, "pan.___", state 379, "else" - line 163, "pan.___", state 384, "((j<1))" - line 163, "pan.___", state 384, "((j>=1))" - line 169, "pan.___", state 390, "(1)" - line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 169, "pan.___", state 391, "else" - line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 171, "pan.___", state 394, "else" - line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 410, "(1)" - line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 424, "(1)" - line 404, "pan.___", state 425, "(1)" - line 404, "pan.___", state 425, "(1)" - line 402, "pan.___", state 430, "((i<1))" - line 402, "pan.___", state 430, "((i>=1))" - line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 449, "(1)" - line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 450, "else" - line 410, "pan.___", state 453, "(1)" - line 410, "pan.___", state 454, "(1)" - line 410, "pan.___", state 454, "(1)" - line 414, "pan.___", state 462, "(1)" - line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 463, "else" - line 414, "pan.___", state 466, "(1)" - line 414, "pan.___", state 467, "(1)" - line 414, "pan.___", state 467, "(1)" - line 412, "pan.___", state 472, "((i<1))" - line 412, "pan.___", state 472, "((i>=1))" - line 419, "pan.___", state 479, "(1)" - line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 480, "else" - line 419, "pan.___", state 483, "(1)" - line 419, "pan.___", state 484, "(1)" - line 419, "pan.___", state 484, "(1)" - line 421, "pan.___", state 487, "(1)" - line 421, "pan.___", state 487, "(1)" - line 370, "pan.___", state 489, "(1)" - line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[_pid] = (tmp^(1<<7))" - line 400, "pan.___", state 498, "(1)" - line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 499, "else" - line 400, "pan.___", state 502, "(1)" - line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 516, "(1)" - line 404, "pan.___", state 517, "(1)" - line 404, "pan.___", state 517, "(1)" - line 402, "pan.___", state 522, "((i<1))" - line 402, "pan.___", state 522, "((i>=1))" - line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 541, "(1)" - line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 542, "else" - line 410, "pan.___", state 545, "(1)" - line 410, "pan.___", state 546, "(1)" - line 410, "pan.___", state 546, "(1)" - line 414, "pan.___", state 554, "(1)" - line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 555, "else" - line 414, "pan.___", state 558, "(1)" - line 414, "pan.___", state 559, "(1)" - line 414, "pan.___", state 559, "(1)" - line 412, "pan.___", state 564, "((i<1))" - line 412, "pan.___", state 564, "((i>=1))" - line 419, "pan.___", state 571, "(1)" - line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 572, "else" - line 419, "pan.___", state 575, "(1)" - line 419, "pan.___", state 576, "(1)" - line 419, "pan.___", state 576, "(1)" - line 421, "pan.___", state 579, "(1)" - line 421, "pan.___", state 579, "(1)" - line 370, "pan.___", state 581, "(1)" - line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 595, "(1)" - line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 609, "(1)" - line 404, "pan.___", state 610, "(1)" - line 404, "pan.___", state 610, "(1)" - line 402, "pan.___", state 615, "((i<1))" - line 402, "pan.___", state 615, "((i>=1))" - line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 634, "(1)" - line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 635, "else" - line 410, "pan.___", state 638, "(1)" - line 410, "pan.___", state 639, "(1)" - line 410, "pan.___", state 639, "(1)" - line 414, "pan.___", state 647, "(1)" - line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 648, "else" - line 414, "pan.___", state 651, "(1)" - line 414, "pan.___", state 652, "(1)" - line 414, "pan.___", state 652, "(1)" - line 412, "pan.___", state 657, "((i<1))" - line 412, "pan.___", state 657, "((i>=1))" - line 419, "pan.___", state 664, "(1)" - line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 665, "else" - line 419, "pan.___", state 668, "(1)" - line 419, "pan.___", state 669, "(1)" - line 419, "pan.___", state 669, "(1)" - line 421, "pan.___", state 672, "(1)" - line 421, "pan.___", state 672, "(1)" - line 370, "pan.___", state 674, "(1)" - line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 681, "(1)" - line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 682, "else" - line 400, "pan.___", state 685, "(1)" - line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 695, "(1)" - line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 696, "else" - line 404, "pan.___", state 699, "(1)" - line 404, "pan.___", state 700, "(1)" - line 404, "pan.___", state 700, "(1)" - line 402, "pan.___", state 705, "((i<1))" - line 402, "pan.___", state 705, "((i>=1))" - line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 724, "(1)" - line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 725, "else" - line 410, "pan.___", state 728, "(1)" - line 410, "pan.___", state 729, "(1)" - line 410, "pan.___", state 729, "(1)" - line 414, "pan.___", state 737, "(1)" - line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 738, "else" - line 414, "pan.___", state 741, "(1)" - line 414, "pan.___", state 742, "(1)" - line 414, "pan.___", state 742, "(1)" - line 412, "pan.___", state 747, "((i<1))" - line 412, "pan.___", state 747, "((i>=1))" - line 419, "pan.___", state 754, "(1)" - line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 755, "else" - line 419, "pan.___", state 758, "(1)" - line 419, "pan.___", state 759, "(1)" - line 419, "pan.___", state 759, "(1)" - line 421, "pan.___", state 762, "(1)" - line 421, "pan.___", state 762, "(1)" - line 370, "pan.___", state 764, "(1)" - line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[_pid])&(1<<7))))" - line 430, "pan.___", state 767, "else" - line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 779, "(1)" - line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 780, "else" - line 400, "pan.___", state 783, "(1)" - line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 793, "(1)" - line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 794, "else" - line 404, "pan.___", state 797, "(1)" - line 404, "pan.___", state 798, "(1)" - line 404, "pan.___", state 798, "(1)" - line 402, "pan.___", state 803, "((i<1))" - line 402, "pan.___", state 803, "((i>=1))" - line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 822, "(1)" - line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 823, "else" - line 410, "pan.___", state 826, "(1)" - line 410, "pan.___", state 827, "(1)" - line 410, "pan.___", state 827, "(1)" - line 414, "pan.___", state 835, "(1)" - line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 836, "else" - line 414, "pan.___", state 839, "(1)" - line 414, "pan.___", state 840, "(1)" - line 414, "pan.___", state 840, "(1)" - line 412, "pan.___", state 845, "((i<1))" - line 412, "pan.___", state 845, "((i>=1))" - line 419, "pan.___", state 852, "(1)" - line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 853, "else" - line 419, "pan.___", state 856, "(1)" - line 419, "pan.___", state 857, "(1)" - line 419, "pan.___", state 857, "(1)" - line 421, "pan.___", state 860, "(1)" - line 421, "pan.___", state 860, "(1)" - line 370, "pan.___", state 862, "(1)" - line 449, "pan.___", state 870, "((tmp<1))" - line 449, "pan.___", state 870, "((tmp>=1))" - line 462, "pan.___", state 873, "tmp = 0" - line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 883, "(1)" - line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 897, "(1)" - line 404, "pan.___", state 898, "(1)" - line 404, "pan.___", state 898, "(1)" - line 402, "pan.___", state 903, "((i<1))" - line 402, "pan.___", state 903, "((i>=1))" - line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 922, "(1)" - line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 923, "else" - line 410, "pan.___", state 926, "(1)" - line 410, "pan.___", state 927, "(1)" - line 410, "pan.___", state 927, "(1)" - line 414, "pan.___", state 935, "(1)" - line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 936, "else" - line 414, "pan.___", state 939, "(1)" - line 414, "pan.___", state 940, "(1)" - line 414, "pan.___", state 940, "(1)" - line 412, "pan.___", state 945, "((i<1))" - line 412, "pan.___", state 945, "((i>=1))" - line 419, "pan.___", state 952, "(1)" - line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 953, "else" - line 419, "pan.___", state 956, "(1)" - line 419, "pan.___", state 957, "(1)" - line 419, "pan.___", state 957, "(1)" - line 421, "pan.___", state 960, "(1)" - line 421, "pan.___", state 960, "(1)" - line 370, "pan.___", state 962, "(1)" - line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[_pid]" - line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 973, "(1)" - line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 987, "(1)" - line 404, "pan.___", state 988, "(1)" - line 404, "pan.___", state 988, "(1)" - line 402, "pan.___", state 993, "((i<1))" - line 402, "pan.___", state 993, "((i>=1))" - line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1012, "(1)" - line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1013, "else" - line 410, "pan.___", state 1016, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 414, "pan.___", state 1025, "(1)" - line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1026, "else" - line 414, "pan.___", state 1029, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 412, "pan.___", state 1035, "((i<1))" - line 412, "pan.___", state 1035, "((i>=1))" - line 419, "pan.___", state 1042, "(1)" - line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1043, "else" - line 419, "pan.___", state 1046, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 370, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1061, "(1)" - line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1117, "(1)" - line 419, "pan.___", state 1134, "(1)" - line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1210, "(1)" - line 419, "pan.___", state 1227, "(1)" - line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1287, "(1)" - line 414, "pan.___", state 1300, "(1)" - line 419, "pan.___", state 1317, "(1)" - line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1342, "(1)" - line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1343, "else" - line 400, "pan.___", state 1346, "(1)" - line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1356, "(1)" - line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1357, "else" - line 404, "pan.___", state 1360, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 402, "pan.___", state 1366, "((i<1))" - line 402, "pan.___", state 1366, "((i>=1))" - line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1385, "(1)" - line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1386, "else" - line 410, "pan.___", state 1389, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 414, "pan.___", state 1398, "(1)" - line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1399, "else" - line 414, "pan.___", state 1402, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 412, "pan.___", state 1408, "((i<1))" - line 412, "pan.___", state 1408, "((i>=1))" - line 419, "pan.___", state 1415, "(1)" - line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1416, "else" - line 419, "pan.___", state 1419, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 1471, "(1)" - line 165, "pan.___", state 1479, "(1)" - line 169, "pan.___", state 1491, "(1)" - line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index 5bb8316..0000000 --- a/formal-model/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,4823 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2108 -2:3:2060 -3:3:2063 -4:3:2063 -5:3:2066 -6:3:2074 -7:3:2074 -8:3:2077 -9:3:2083 -10:3:2087 -11:3:2087 -12:3:2090 -13:3:2098 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-4809:1:39 -4810:1:44 -4811:1:48 -4812:1:49 -4813:1:56 -4814:1:57 -4815:1:68 -4816:1:69 -4817:1:70 -4818:1:81 -4819:1:86 -4820:1:87 diff --git a/formal-model/urcu-paulmck/.gitignore b/formal-model/urcu-paulmck/.gitignore deleted file mode 100644 index d62f4bb..0000000 --- a/formal-model/urcu-paulmck/.gitignore +++ /dev/null @@ -1,2 +0,0 @@ -pan* -*.trail diff --git a/formal-model/urcu-paulmck/urcu-paulmck.spin b/formal-model/urcu-paulmck/urcu-paulmck.spin deleted file mode 100644 index 15338de..0000000 --- a/formal-model/urcu-paulmck/urcu-paulmck.spin +++ /dev/null @@ -1,375 +0,0 @@ -/* - * urcu_mbmin.spin: Promela code to validate urcu. See commit number - * 3a9e6e9df706b8d39af94d2f027210e2e7d4106e of Mathieu Desnoyer's - * git archive at git://lttng.org/userspace-rcu.git, but with - * memory barriers removed. - * - * This validates a single reader against a single updater. The - * updater is assumed to have smp_mb() barriers between each pair - * of operations, and this model validates that a signal-mediated - * broadcast barrier is required only at the beginning and end of - * the synchronize_rcu(). - * - * Note that the second half of a prior synchronize_rcu() is modelled - * as well as the current synchronize_rcu(). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Paul E. McKenney, IBM Corporation. - */ - -/* Promela validation variables. */ - -bit removed = 0; /* Has RCU removal happened, e.g., list_del_rcu()? */ -bit free = 0; /* Has RCU reclamation happened, e.g., kfree()? */ -bit need_mb = 0; /* =1 says need reader mb, =0 for reader response. */ -byte reader_progress[4]; /* Count of read-side statement executions. */ -bit reader_done = 0; /* =0 says reader still running, =1 says done. */ -bit updater_done = 0; /* =0 says updater still running, =1 says done. */ - -/* Broadcast memory barriers to enable, prior synchronize_rcu() instance. */ - -/* #define MB_A */ /* Not required for correctness. */ -/* #define MB_B */ /* Not required for correctness. */ -/* #define MB_C */ /* Not required for correctness. */ - -/* Broadcast memory barriers to enable, current synchronize_rcu() instance. */ - -#define MB_D /* First broadcast barrier in synchronize_rcu(). */ -/* #define MB_E */ /* Not required for correctness. */ -/* #define MB_F */ /* Not required for correctness. */ -#define MB_G /* Last broadcast barrier in synchronize_rcu(). */ - -/* urcu definitions and variables, taken straight from the algorithm. */ - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -byte urcu_gp_ctr = 1; -byte urcu_active_readers = 0; - -/* Model the RCU read-side critical section. */ - -proctype urcu_reader() -{ - bit done = 0; - bit mbok; - byte tmp; - byte tmp_removed; - byte tmp_free; - - /* Absorb any early requests for memory barriers. */ - do - :: need_mb == 1 -> - need_mb = 0; - :: 1 -> break; - od; - - /* - * Each pass through this loop executes one read-side statement - * from the following code fragment: - * - * rcu_read_lock(); [0a] - * rcu_read_lock(); [0b] - * p = rcu_dereference(global_p); [1] - * x = p->data; [2] - * rcu_read_unlock(); [3b] - * rcu_read_unlock(); [3a] - * - * Because we are modeling a weak-memory machine, these statements - * can be seen in any order, the only restriction being that - * rcu_read_unlock() cannot precede the corresponding rcu_read_lock(). - * The placement of the inner rcu_read_lock() and rcu_read_unlock() - * is non-deterministic, the above is but one possible placement. - * Intestingly enough, this model validates all possible placements - * of the inner rcu_read_lock() and rcu_read_unlock() statements, - * with the only constraint being that the rcu_read_lock() must - * precede the rcu_read_unlock(). - * - * We also respond to memory-barrier requests, but only if our - * execution happens to be ordered. If the current state is - * misordered, we ignore memory-barrier requests. - */ - do - :: 1 -> - if - :: reader_progress[0] < 2 -> /* [0a and 0b] */ - tmp = urcu_active_readers; - if - :: (tmp & RCU_GP_CTR_NEST_MASK) == 0 -> - tmp = urcu_gp_ctr; - do - :: (reader_progress[1] + - reader_progress[2] + - reader_progress[3] == 0) && need_mb == 1 -> - need_mb = 0; - :: need_mb == 0 && !updater_done -> skip; - :: 1 -> break; - od; - urcu_active_readers = tmp; - :: else -> - urcu_active_readers = tmp + 1; - fi; - reader_progress[0] = reader_progress[0] + 1; - :: reader_progress[1] == 0 -> /* [1] */ - tmp_removed = removed; - reader_progress[1] = 1; - :: reader_progress[2] == 0 -> /* [2] */ - tmp_free = free; - reader_progress[2] = 1; - :: ((reader_progress[0] > reader_progress[3]) && - (reader_progress[3] < 2)) -> /* [3a and 3b] */ - tmp = urcu_active_readers - 1; - urcu_active_readers = tmp; - reader_progress[3] = reader_progress[3] + 1; - :: else -> break; - fi; - - /* Process memory-barrier requests, if it is safe to do so. */ - atomic { - mbok = 0; - tmp = 0; - do - :: tmp < 4 && reader_progress[tmp] == 0 -> - tmp = tmp + 1; - break; - :: tmp < 4 && reader_progress[tmp] != 0 -> - tmp = tmp + 1; - :: tmp >= 4 && - reader_progress[0] == reader_progress[3] -> - done = 1; - break; - :: tmp >= 4 && - reader_progress[0] != reader_progress[3] -> - break; - od; - do - :: tmp < 4 && reader_progress[tmp] == 0 -> - tmp = tmp + 1; - :: tmp < 4 && reader_progress[tmp] != 0 -> - break; - :: tmp >= 4 -> - mbok = 1; - break; - od - - } - - if - :: mbok == 1 -> - /* We get here if mb processing is safe. */ - do - :: need_mb == 1 -> - need_mb = 0; - :: 1 -> break; - od; - :: else -> skip; - fi; - - /* - * Check to see if we have modeled the entire RCU read-side - * critical section, and leave if so. - */ - if - :: done == 1 -> break; - :: else -> skip; - fi - od; - assert((tmp_free == 0) || (tmp_removed == 1)); - - /* Reader has completed. */ - reader_done = 1; - - /* - * Process any late-arriving memory-barrier requests, and - * in addition create a progress cycle. - */ - reader_done = 1; - - do - :: need_mb == 1 -> - need_mb = 0; - :: 1 -> -progress_reader: - skip; - :: 1 -> break; - od; -} - -/* Model the RCU update process. */ - -proctype urcu_updater() -{ - byte tmp; - - /* - * ---------------------------------------------------------------- - * prior synchronize_rcu(). - */ - - /* prior synchronize_rcu(), second counter flip. */ -#ifdef MB_A - need_mb = 1; /* mb() A (analogous to omitted barrier between E and F) */ - do - :: need_mb == 1 && !reader_done -> skip; - :: need_mb == 0 || reader_done -> break; - od; -#endif /* #ifdef MB_A */ - urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; -#ifdef MB_B - need_mb = 1; /* mb() B (analogous to F) */ - do - :: need_mb == 1 && !reader_done -> skip; - :: need_mb == 0 || reader_done -> break; - od; -#endif /* #ifdef MB_B */ - do - :: 1 -> - if - :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && - (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != - (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> - skip; - :: else -> break; - fi - od; -#ifdef MB_C - need_mb = 1; /* mb() C absolutely required by analogy with G */ - do - :: need_mb == 1 && !reader_done -> skip; - :: need_mb == 0 || reader_done -> break; - od; -#endif /* #ifdef MB_C */ - - /* Removal statement, e.g., list_del_rcu(). */ - removed = 1; - - /* - * prior synchronize_rcu(). - * ---------------------------------------------------------------- - */ - - /* - * ---------------------------------------------------------------- - * current synchronize_rcu(). - */ - - /* current synchronize_rcu(), first counter flip. */ -#ifdef MB_D - need_mb = 1; /* mb() D suggested */ - do - :: need_mb == 1 && !reader_done -> skip; - :: need_mb == 0 || reader_done -> break; - od; -#endif /* #ifdef MB_D */ - urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; -#ifdef MB_E - need_mb = 1; /* mb() E required if D not present */ - do - :: need_mb == 1 && !reader_done -> skip; - :: need_mb == 0 || reader_done -> break; - od; -#endif /* #ifdef MB_E */ - - /* current synchronize_rcu(), first-flip check plus second flip. */ - if - :: 1 -> - do - :: 1 -> - if - :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && - (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != - (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> - skip; - :: else -> break; - fi; - od; - urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; - :: 1 -> - tmp = urcu_gp_ctr; - urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; - do - :: 1 -> - if - :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && - (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != - (tmp & ~RCU_GP_CTR_NEST_MASK) -> - skip; - :: else -> break; - fi; - od; - fi; - - /* current synchronize_rcu(), second counter flip check. */ -#ifdef MB_F - need_mb = 1; /* mb() F not required */ - do - :: need_mb == 1 && !reader_done -> skip; - :: need_mb == 0 || reader_done -> break; - od; -#endif /* #ifdef MB_F */ - do - :: 1 -> - if - :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && - (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != - (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> - skip; - :: else -> break; - fi; - od; -#ifdef MB_G - need_mb = 1; /* mb() G absolutely required */ - do - :: need_mb == 1 && !reader_done -> skip; - :: need_mb == 0 || reader_done -> break; - od; -#endif /* #ifdef MB_G */ - - /* - * current synchronize_rcu(). - * ---------------------------------------------------------------- - */ - - /* free-up step, e.g., kfree(). */ - free = 1; - - /* We are done, so kill all the infinite loops in the reader. */ - updater_done = 1; - - /* Create a progress cycle. Correctness requires we get here. */ - do - :: 1 -> -progress_updater: - skip; - :: 1 -> break; - od; -} - -/* - * Initialize the array, spawn a reader and an updater. Because readers - * are independent of each other, only one reader is needed. - */ - -init { - atomic { - reader_progress[0] = 0; - reader_progress[1] = 0; - reader_progress[2] = 0; - reader_progress[3] = 0; - run urcu_reader(); - run urcu_updater(); - } -} diff --git a/formal-model/urcu-paulmck/urcu.sh b/formal-model/urcu-paulmck/urcu.sh deleted file mode 100644 index 0c5e492..0000000 --- a/formal-model/urcu-paulmck/urcu.sh +++ /dev/null @@ -1,3 +0,0 @@ -spin -a urcu-paulmck.spin -cc -DNP -o pan pan.c -./pan -f -l diff --git a/formal-model/urcu.sh b/formal-model/urcu.sh deleted file mode 100644 index b76c764..0000000 --- a/formal-model/urcu.sh +++ /dev/null @@ -1,3 +0,0 @@ -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan diff --git a/formal-model/urcu.spin b/formal-model/urcu.spin deleted file mode 100644 index 3e18457..0000000 --- a/formal-model/urcu.spin +++ /dev/null @@ -1,301 +0,0 @@ -/* - * urcu.spin: Promela code to validate urcu. See commit number - * 3a9e6e9df706b8d39af94d2f027210e2e7d4106e of Mathieu Desnoyer's - * git archive at git://lttng.org/userspace-rcu.git - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Paul E. McKenney, IBM Corporation. - */ - -/* Promela validation variables. */ - -bit removed = 0; /* Has RCU removal happened, e.g., list_del_rcu()? */ -bit free = 0; /* Has RCU reclamation happened, e.g., kfree()? */ -bit need_mb = 0; /* =1 says need reader mb, =0 for reader response. */ -byte reader_progress[4]; - /* Count of read-side statement executions. */ -bit reader_done = 0; - /* =0 says reader still running, =1 says done. */ -bit updater_done = 0; - /* =0 says updater still running, =1 says done. */ - -/* urcu definitions and variables, taken straight from the algorithm. */ - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -byte urcu_gp_ctr = 1; -byte urcu_active_readers = 0; - -/* Model the RCU read-side critical section. */ - -proctype urcu_reader() -{ - bit done = 0; - bit mbok; - byte tmp; - byte tmp_removed; - byte tmp_free; - - /* Absorb any early requests for memory barriers. */ - do - :: need_mb == 1 -> - need_mb = 0; - :: !updater_done -> skip; - :: 1 -> break; - od; - - /* - * Each pass through this loop executes one read-side statement - * from the following code fragment: - * - * rcu_read_lock(); [0a] - * rcu_read_lock(); [0b] - * p = rcu_dereference(global_p); [1] - * x = p->data; [2] - * rcu_read_unlock(); [3b] - * rcu_read_unlock(); [3a] - * - * Because we are modeling a weak-memory machine, these statements - * can be seen in any order, the only restriction being that - * rcu_read_unlock() cannot precede the corresponding rcu_read_lock(). - * The placement of the inner rcu_read_lock() and rcu_read_unlock() - * is non-deterministic, the above is but one possible placement. - * Intestingly enough, this model validates all possible placements - * of the inner rcu_read_lock() and rcu_read_unlock() statements, - * with the only constraint being that the rcu_read_lock() must - * precede the rcu_read_unlock(). - * - * We also respond to memory-barrier requests, but only if our - * execution happens to be ordered. If the current state is - * misordered, we ignore memory-barrier requests. - */ - do - :: 1 -> - if - :: reader_progress[0] < 2 -> /* [0a and 0b] */ - tmp = urcu_active_readers; - if - :: (tmp & RCU_GP_CTR_NEST_MASK) == 0 -> - tmp = urcu_gp_ctr; - do - :: (reader_progress[1] + - reader_progress[2] + - reader_progress[3] == 0) && need_mb == 1 -> - need_mb = 0; - :: !updater_done -> skip; - :: 1 -> break; - od; - urcu_active_readers = tmp; - :: else -> - urcu_active_readers = tmp + 1; - fi; - reader_progress[0] = reader_progress[0] + 1; - :: reader_progress[1] == 0 -> /* [1] */ - tmp_removed = removed; - reader_progress[1] = 1; - :: reader_progress[2] == 0 -> /* [2] */ - tmp_free = free; - reader_progress[2] = 1; - :: ((reader_progress[0] > reader_progress[3]) && - (reader_progress[3] < 2)) -> /* [3a and 3b] */ - tmp = urcu_active_readers - 1; - urcu_active_readers = tmp; - reader_progress[3] = reader_progress[3] + 1; - :: else -> break; - fi; - - /* Process memory-barrier requests, if it is safe to do so. */ - atomic { - mbok = 0; - tmp = 0; - do - :: tmp < 4 && reader_progress[tmp] == 0 -> - tmp = tmp + 1; - break; - :: tmp < 4 && reader_progress[tmp] != 0 -> - tmp = tmp + 1; - :: tmp >= 4 && - reader_progress[0] == reader_progress[3] -> - done = 1; - break; - :: tmp >= 4 && - reader_progress[0] != reader_progress[3] -> - break; - od; - do - :: tmp < 4 && reader_progress[tmp] == 0 -> - tmp = tmp + 1; - :: tmp < 4 && reader_progress[tmp] != 0 -> - break; - :: tmp >= 4 -> - mbok = 1; - break; - od - - } - - if - :: mbok == 1 -> - /* We get here if mb processing is safe. */ - do - :: need_mb == 1 -> - need_mb = 0; - :: !updater_done -> skip; - :: 1 -> break; - od; - :: else -> skip; - fi; - - /* - * Check to see if we have modeled the entire RCU read-side - * critical section, and leave if so. - */ - if - :: done == 1 -> break; - :: else -> skip; - fi - od; - assert((tmp_free == 0) || (tmp_removed == 1)); - - /* Reader has completed. */ - reader_done = 1; - - /* Process any late-arriving memory-barrier requests. */ - do - :: need_mb == 1 -> - need_mb = 0; - :: !updater_done -> skip; - :: 1 -> break; - od; -} - -/* Model the RCU update process. */ - -proctype urcu_updater() -{ - /* prior synchronize_rcu(), second counter flip. */ - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - do - :: 1 -> - if - :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && - (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != - (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> - skip; - :: else -> break; - fi; - od; - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - - /* Removal statement, e.g., list_del_rcu(). */ - removed = 1; - - /* current synchronize_rcu(), first counter flip. */ - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - do - :: 1 -> - if - :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && - (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != - (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> - skip; - :: else -> break; - fi; - od; - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - - /* current synchronize_rcu(), second counter flip. */ - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - do - :: 1 -> - if - :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && - (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != - (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> - skip; - :: else -> break; - fi; - od; - need_mb = 1; - do - :: need_mb == 1 -> skip; - :: need_mb == 0 -> break; - od; - - /* free-up step, e.g., kfree(). */ - free = 1; - - /* - * Signal updater done, ending any otherwise-infinite loops - * in the reading process. - */ - updater_done = 1; -} - -/* - * Initialize the array, spawn a reader and an updater. Because readers - * are independent of each other, only one reader is needed. - */ - -init { - atomic { - reader_progress[0] = 0; - reader_progress[1] = 0; - reader_progress[2] = 0; - reader_progress[3] = 0; - run urcu_reader(); - run urcu_updater(); - } -} diff --git a/formal-model/urcu/DEFINES b/formal-model/urcu/DEFINES deleted file mode 100644 index 5d5147e..0000000 --- a/formal-model/urcu/DEFINES +++ /dev/null @@ -1,17 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu/Makefile b/formal-model/urcu/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu/references.txt b/formal-model/urcu/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu/result-signal-over-reader/DEFINES b/formal-model/urcu/result-signal-over-reader/DEFINES deleted file mode 100644 index 2fcb038..0000000 --- a/formal-model/urcu/result-signal-over-reader/DEFINES +++ /dev/null @@ -1,17 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu/result-signal-over-reader/Makefile b/formal-model/urcu/result-signal-over-reader/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu/result-signal-over-reader/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu/result-signal-over-reader/asserts.log b/formal-model/urcu/result-signal-over-reader/asserts.log deleted file mode 100644 index d317f57..0000000 --- a/formal-model/urcu/result-signal-over-reader/asserts.log +++ /dev/null @@ -1,312 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 4926 States= 1e+06 Transitions= 9.03e+06 Memory= 527.287 t= 5.98 R= 2e+05 -Depth= 7228 States= 2e+06 Transitions= 1.88e+07 Memory= 588.322 t= 12.9 R= 2e+05 -Depth= 7228 States= 3e+06 Transitions= 3.14e+07 Memory= 649.358 t= 21.9 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 7228 States= 4e+06 Transitions= 4.3e+07 Memory= 741.416 t= 30.3 R= 1e+05 -Depth= 7228 States= 5e+06 Transitions= 5.65e+07 Memory= 802.451 t= 39.6 R= 1e+05 -Depth= 7228 States= 6e+06 Transitions= 6.78e+07 Memory= 863.486 t= 47.5 R= 1e+05 -Depth= 7228 States= 7e+06 Transitions= 8.05e+07 Memory= 924.522 t= 56.5 R= 1e+05 -Depth= 7228 States= 8e+06 Transitions= 9.49e+07 Memory= 985.557 t= 66.8 R= 1e+05 -Depth= 7228 States= 9e+06 Transitions= 1.06e+08 Memory= 1046.592 t= 74.7 R= 1e+05 -pan: resizing hashtable to -w24.. done -Depth= 7228 States= 1e+07 Transitions= 1.18e+08 Memory= 1231.721 t= 84.9 R= 1e+05 -Depth= 7228 States= 1.1e+07 Transitions= 1.29e+08 Memory= 1292.756 t= 92.8 R= 1e+05 -Depth= 7228 States= 1.2e+07 Transitions= 1.4e+08 Memory= 1353.791 t= 100 R= 1e+05 -Depth= 7228 States= 1.3e+07 Transitions= 1.53e+08 Memory= 1414.826 t= 109 R= 1e+05 -Depth= 7228 States= 1.4e+07 Transitions= 1.65e+08 Memory= 1475.861 t= 117 R= 1e+05 -Depth= 7228 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1536.897 t= 126 R= 1e+05 -Depth= 7228 States= 1.6e+07 Transitions= 1.89e+08 Memory= 1597.932 t= 134 R= 1e+05 -Depth= 7228 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1658.967 t= 143 R= 1e+05 -Depth= 7228 States= 1.8e+07 Transitions= 2.16e+08 Memory= 1720.002 t= 153 R= 1e+05 -Depth= 7228 States= 1.9e+07 Transitions= 2.27e+08 Memory= 1781.037 t= 160 R= 1e+05 -Depth= 7228 States= 2e+07 Transitions= 2.39e+08 Memory= 1842.072 t= 169 R= 1e+05 -Depth= 7228 States= 2.1e+07 Transitions= 2.51e+08 Memory= 1903.108 t= 177 R= 1e+05 -Depth= 7228 States= 2.2e+07 Transitions= 2.62e+08 Memory= 1964.143 t= 185 R= 1e+05 -Depth= 7228 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2025.178 t= 194 R= 1e+05 -Depth= 7228 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2086.213 t= 203 R= 1e+05 -Depth= 7228 States= 2.5e+07 Transitions= 2.99e+08 Memory= 2147.248 t= 212 R= 1e+05 -Depth= 7228 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2208.283 t= 220 R= 1e+05 -Depth= 7228 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2269.318 t= 230 R= 1e+05 -Depth= 7228 States= 2.8e+07 Transitions= 3.37e+08 Memory= 2330.354 t= 239 R= 1e+05 -Depth= 7228 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2391.389 t= 248 R= 1e+05 -Depth= 7228 States= 3e+07 Transitions= 3.6e+08 Memory= 2452.424 t= 256 R= 1e+05 -Depth= 7228 States= 3.1e+07 Transitions= 3.72e+08 Memory= 2513.459 t= 265 R= 1e+05 -Depth= 7228 States= 3.2e+07 Transitions= 3.83e+08 Memory= 2574.494 t= 273 R= 1e+05 -Depth= 7228 States= 3.3e+07 Transitions= 3.95e+08 Memory= 2635.529 t= 282 R= 1e+05 -Depth= 7228 States= 3.4e+07 Transitions= 4.07e+08 Memory= 2696.565 t= 291 R= 1e+05 -pan: resizing hashtable to -w26.. done -Depth= 7228 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3253.682 t= 308 R= 1e+05 -Depth= 7228 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3314.717 t= 316 R= 1e+05 -Depth= 7228 States= 3.7e+07 Transitions= 4.45e+08 Memory= 3375.752 t= 325 R= 1e+05 -Depth= 7228 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3436.787 t= 334 R= 1e+05 -Depth= 7228 States= 3.9e+07 Transitions= 4.71e+08 Memory= 3497.822 t= 343 R= 1e+05 -Depth= 7228 States= 4e+07 Transitions= 4.82e+08 Memory= 3558.858 t= 350 R= 1e+05 -Depth= 7228 States= 4.1e+07 Transitions= 4.94e+08 Memory= 3619.893 t= 359 R= 1e+05 -Depth= 7228 States= 4.2e+07 Transitions= 5.04e+08 Memory= 3680.928 t= 366 R= 1e+05 -Depth= 7228 States= 4.3e+07 Transitions= 5.16e+08 Memory= 3741.963 t= 374 R= 1e+05 -Depth= 7228 States= 4.4e+07 Transitions= 5.29e+08 Memory= 3802.998 t= 383 R= 1e+05 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 56 byte, depth reached 7228, errors: 0 - 44157204 states, stored -4.8641845e+08 states, matched -5.3057565e+08 transitions (= stored+matched) -1.8453582e+09 atomic steps -hash conflicts: 2.8837553e+08 (resolved) - -Stats on memory usage (in Megabytes): - 3537.374 equivalent memory usage for states (stored*(State-vector + overhead)) - 2843.050 actual memory usage for states (compression: 80.37%) - state-vector as stored = 40 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 3812.568 total actual memory usage - -unreached in proctype urcu_reader - line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 61, "(1)" - line 417, ".input.spin", state 91, "(1)" - line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 158, "(1)" - line 417, ".input.spin", state 188, "(1)" - line 398, ".input.spin", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 256, "(1)" - line 417, ".input.spin", state 286, "(1)" - line 398, ".input.spin", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 395, "(1)" - line 417, ".input.spin", state 425, "(1)" - line 539, ".input.spin", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 398, ".input.spin", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 70, "(1)" - line 417, ".input.spin", state 100, "(1)" - line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 158, "(1)" - line 417, ".input.spin", state 188, "(1)" - line 398, ".input.spin", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 247, "(1)" - line 417, ".input.spin", state 277, "(1)" - line 398, ".input.spin", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 359, "(1)" - line 417, ".input.spin", state 389, "(1)" - line 613, ".input.spin", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 59, "(1)" - line 412, ".input.spin", state 72, "(1)" - line 417, ".input.spin", state 89, "(1)" - line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 153, "(1)" - line 412, ".input.spin", state 166, "(1)" - line 651, ".input.spin", state 199, "(1)" - line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 240, "(1)" - line 163, ".input.spin", state 248, "(1)" - line 167, ".input.spin", state 260, "(1)" - line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 370, "(1)" - line 163, ".input.spin", state 378, "(1)" - line 167, ".input.spin", state 390, "(1)" - line 398, ".input.spin", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 449, "(1)" - line 412, ".input.spin", state 462, "(1)" - line 417, ".input.spin", state 479, "(1)" - line 398, ".input.spin", state 498, "(1)" - line 402, ".input.spin", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 554, "(1)" - line 417, ".input.spin", state 571, "(1)" - line 402, ".input.spin", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 647, "(1)" - line 417, ".input.spin", state 664, "(1)" - line 178, ".input.spin", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 710, "(1)" - line 163, ".input.spin", state 718, "(1)" - line 167, ".input.spin", state 730, "(1)" - line 174, ".input.spin", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 840, "(1)" - line 163, ".input.spin", state 848, "(1)" - line 167, ".input.spin", state 860, "(1)" - line 398, ".input.spin", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 884, "(1)" - line 398, ".input.spin", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 885, "else" - line 398, ".input.spin", state 888, "(1)" - line 402, ".input.spin", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 898, "(1)" - line 402, ".input.spin", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 899, "else" - line 402, ".input.spin", state 902, "(1)" - line 402, ".input.spin", state 903, "(1)" - line 402, ".input.spin", state 903, "(1)" - line 400, ".input.spin", state 908, "((i<1))" - line 400, ".input.spin", state 908, "((i>=1))" - line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 927, "(1)" - line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, ".input.spin", state 928, "else" - line 408, ".input.spin", state 931, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 412, ".input.spin", state 940, "(1)" - line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, ".input.spin", state 941, "else" - line 412, ".input.spin", state 944, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 410, ".input.spin", state 950, "((i<1))" - line 410, ".input.spin", state 950, "((i>=1))" - line 417, ".input.spin", state 957, "(1)" - line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, ".input.spin", state 958, "else" - line 417, ".input.spin", state 961, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1040, "(1)" - line 417, ".input.spin", state 1057, "(1)" - line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1130, "(1)" - line 417, ".input.spin", state 1147, "(1)" - line 398, ".input.spin", state 1166, "(1)" - line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1222, "(1)" - line 417, ".input.spin", state 1239, "(1)" - line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, ".input.spin", state 1315, "(1)" - line 417, ".input.spin", state 1332, "(1)" - line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1378, "(1)" - line 163, ".input.spin", state 1386, "(1)" - line 167, ".input.spin", state 1398, "(1)" - line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1508, "(1)" - line 163, ".input.spin", state 1516, "(1)" - line 167, ".input.spin", state 1528, "(1)" - line 398, ".input.spin", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 1552, "(1)" - line 398, ".input.spin", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, ".input.spin", state 1553, "else" - line 398, ".input.spin", state 1556, "(1)" - line 402, ".input.spin", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 1566, "(1)" - line 402, ".input.spin", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, ".input.spin", state 1567, "else" - line 402, ".input.spin", state 1570, "(1)" - line 402, ".input.spin", state 1571, "(1)" - line 402, ".input.spin", state 1571, "(1)" - line 400, ".input.spin", state 1576, "((i<1))" - line 400, ".input.spin", state 1576, "((i>=1))" - line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, ".input.spin", state 1595, "(1)" - line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, ".input.spin", state 1596, "else" - line 408, ".input.spin", state 1599, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 412, ".input.spin", state 1608, "(1)" - line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, ".input.spin", state 1609, "else" - line 412, ".input.spin", state 1612, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 410, ".input.spin", state 1618, "((i<1))" - line 410, ".input.spin", state 1618, "((i>=1))" - line 417, ".input.spin", state 1625, "(1)" - line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, ".input.spin", state 1626, "else" - line 417, ".input.spin", state 1629, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1681, "(1)" - line 163, ".input.spin", state 1689, "(1)" - line 167, ".input.spin", state 1701, "(1)" - line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, ".input.spin", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, ".input.spin", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, ".input.spin", state 1811, "(1)" - line 163, ".input.spin", state 1819, "(1)" - line 167, ".input.spin", state 1831, "(1)" - line 701, ".input.spin", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) - -pan: elapsed time 384 seconds -pan: rate 114968.77 states/second -pan: avg transition delay 7.2389e-07 usec -cp .input.spin asserts.spin.input -cp .input.spin.trail asserts.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/asserts.spin.input b/formal-model/urcu/result-signal-over-reader/asserts.spin.input deleted file mode 100644 index 2d7f62d..0000000 --- a/formal-model/urcu/result-signal-over-reader/asserts.spin.input +++ /dev/null @@ -1,722 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/asserts.spin.input.trail b/formal-model/urcu/result-signal-over-reader/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu/result-signal-over-reader/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu/result-signal-over-reader/urcu.sh b/formal-model/urcu/result-signal-over-reader/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu/result-signal-over-reader/urcu.spin b/formal-model/urcu/result-signal-over-reader/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free.log b/formal-model/urcu/result-signal-over-reader/urcu_free.log deleted file mode 100644 index a6ab537..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free.log +++ /dev/null @@ -1,326 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) -Depth= 6837 States= 1e+06 Transitions= 9.03e+06 Memory= 534.904 t= 7.74 R= 1e+05 -Depth= 8887 States= 2e+06 Transitions= 1.88e+07 Memory= 603.557 t= 16.6 R= 1e+05 -Depth= 8887 States= 3e+06 Transitions= 3.14e+07 Memory= 672.209 t= 28 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 8887 States= 4e+06 Transitions= 4.33e+07 Memory= 771.885 t= 39.1 R= 1e+05 -Depth= 8887 States= 5e+06 Transitions= 5.65e+07 Memory= 840.635 t= 50.7 R= 1e+05 -Depth= 8887 States= 6e+06 Transitions= 6.79e+07 Memory= 909.287 t= 61 R= 1e+05 -Depth= 8887 States= 7e+06 Transitions= 8.08e+07 Memory= 977.940 t= 72.6 R= 1e+05 -Depth= 8887 States= 8e+06 Transitions= 9.5e+07 Memory= 1046.592 t= 85.5 R= 9e+04 -Depth= 8887 States= 9e+06 Transitions= 1.07e+08 Memory= 1115.342 t= 96.7 R= 9e+04 -pan: resizing hashtable to -w24.. done -Depth= 8887 States= 1e+07 Transitions= 1.18e+08 Memory= 1308.088 t= 108 R= 9e+04 -Depth= 8887 States= 1.1e+07 Transitions= 1.3e+08 Memory= 1376.740 t= 119 R= 9e+04 -Depth= 8887 States= 1.2e+07 Transitions= 1.41e+08 Memory= 1445.393 t= 128 R= 9e+04 -Depth= 8887 States= 1.3e+07 Transitions= 1.51e+08 Memory= 1514.045 t= 138 R= 9e+04 -Depth= 8887 States= 1.4e+07 Transitions= 1.64e+08 Memory= 1582.795 t= 149 R= 9e+04 -Depth= 8887 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1651.447 t= 160 R= 9e+04 -Depth= 8887 States= 1.6e+07 Transitions= 1.9e+08 Memory= 1720.100 t= 172 R= 9e+04 -Depth= 8887 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1788.752 t= 183 R= 9e+04 -Depth= 8887 States= 1.8e+07 Transitions= 2.15e+08 Memory= 1857.502 t= 194 R= 9e+04 -Depth= 8887 States= 1.9e+07 Transitions= 2.29e+08 Memory= 1926.154 t= 207 R= 9e+04 -Depth= 8887 States= 2e+07 Transitions= 2.4e+08 Memory= 1994.807 t= 217 R= 9e+04 -Depth= 8887 States= 2.1e+07 Transitions= 2.51e+08 Memory= 2063.459 t= 227 R= 9e+04 -Depth= 8887 States= 2.2e+07 Transitions= 2.63e+08 Memory= 2132.209 t= 238 R= 9e+04 -Depth= 8887 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2200.861 t= 248 R= 9e+04 -Depth= 8887 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2269.514 t= 259 R= 9e+04 -Depth= 8887 States= 2.5e+07 Transitions= 2.98e+08 Memory= 2338.166 t= 270 R= 9e+04 -Depth= 8887 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2406.916 t= 281 R= 9e+04 -Depth= 8887 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2475.568 t= 294 R= 9e+04 -Depth= 8887 States= 2.8e+07 Transitions= 3.36e+08 Memory= 2544.221 t= 305 R= 9e+04 -Depth= 8887 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2612.873 t= 317 R= 9e+04 -Depth= 8887 States= 3e+07 Transitions= 3.63e+08 Memory= 2681.526 t= 329 R= 9e+04 -Depth= 8887 States= 3.1e+07 Transitions= 3.73e+08 Memory= 2750.276 t= 339 R= 9e+04 -Depth= 8887 States= 3.2e+07 Transitions= 3.85e+08 Memory= 2818.928 t= 351 R= 9e+04 -Depth= 8887 States= 3.3e+07 Transitions= 3.97e+08 Memory= 2887.580 t= 362 R= 9e+04 -Depth= 8887 States= 3.4e+07 Transitions= 4.08e+08 Memory= 2956.233 t= 373 R= 9e+04 -pan: resizing hashtable to -w26.. done -Depth= 8887 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3520.967 t= 391 R= 9e+04 -Depth= 8887 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3589.619 t= 402 R= 9e+04 -Depth= 8887 States= 3.7e+07 Transitions= 4.44e+08 Memory= 3658.272 t= 413 R= 9e+04 -Depth= 8887 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3727.022 t= 425 R= 9e+04 -Depth= 8887 States= 3.9e+07 Transitions= 4.7e+08 Memory= 3795.674 t= 435 R= 9e+04 -Depth= 8887 States= 4e+07 Transitions= 4.83e+08 Memory= 3864.326 t= 447 R= 9e+04 -Depth= 8887 States= 4.1e+07 Transitions= 4.97e+08 Memory= 3932.979 t= 459 R= 9e+04 -Depth= 8887 States= 4.2e+07 Transitions= 5.07e+08 Memory= 4001.729 t= 468 R= 9e+04 -Depth= 8887 States= 4.3e+07 Transitions= 5.19e+08 Memory= 4070.381 t= 479 R= 9e+04 -Depth= 8887 States= 4.4e+07 Transitions= 5.31e+08 Memory= 4139.033 t= 489 R= 9e+04 -Depth= 8887 States= 4.5e+07 Transitions= 5.42e+08 Memory= 4207.686 t= 499 R= 9e+04 -Depth= 8887 States= 4.6e+07 Transitions= 5.54e+08 Memory= 4276.338 t= 510 R= 9e+04 -Depth= 8887 States= 4.7e+07 Transitions= 5.67e+08 Memory= 4345.088 t= 521 R= 9e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 8887, errors: 0 - 47143033 states, stored -5.2129161e+08 states, matched -5.6843464e+08 transitions (= stored+matched) -1.9783052e+09 atomic steps -hash conflicts: 3.1395137e+08 (resolved) - -Stats on memory usage (in Megabytes): - 4136.237 equivalent memory usage for states (stored*(State-vector + overhead)) - 3385.741 actual memory usage for states (compression: 81.86%) - state-vector as stored = 47 byte + 28 byte overhead - 512.000 memory used for hash table (-w26) - 457.764 memory used for DFS stack (-m10000000) - 4354.854 total actual memory usage - -unreached in proctype urcu_reader - line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 61, "(1)" - line 417, "pan.___", state 91, "(1)" - line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 158, "(1)" - line 417, "pan.___", state 188, "(1)" - line 398, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 256, "(1)" - line 417, "pan.___", state 286, "(1)" - line 398, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 395, "(1)" - line 417, "pan.___", state 425, "(1)" - line 539, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 398, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 70, "(1)" - line 417, "pan.___", state 100, "(1)" - line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 158, "(1)" - line 417, "pan.___", state 188, "(1)" - line 398, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 247, "(1)" - line 417, "pan.___", state 277, "(1)" - line 398, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 359, "(1)" - line 417, "pan.___", state 389, "(1)" - line 613, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 59, "(1)" - line 412, "pan.___", state 72, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 153, "(1)" - line 412, "pan.___", state 166, "(1)" - line 651, "pan.___", state 199, "(1)" - line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 240, "(1)" - line 163, "pan.___", state 248, "(1)" - line 167, "pan.___", state 260, "(1)" - line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 370, "(1)" - line 163, "pan.___", state 378, "(1)" - line 167, "pan.___", state 390, "(1)" - line 398, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 449, "(1)" - line 412, "pan.___", state 462, "(1)" - line 417, "pan.___", state 479, "(1)" - line 398, "pan.___", state 498, "(1)" - line 402, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 554, "(1)" - line 417, "pan.___", state 571, "(1)" - line 402, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 647, "(1)" - line 417, "pan.___", state 664, "(1)" - line 178, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 710, "(1)" - line 163, "pan.___", state 718, "(1)" - line 167, "pan.___", state 730, "(1)" - line 174, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 840, "(1)" - line 163, "pan.___", state 848, "(1)" - line 167, "pan.___", state 860, "(1)" - line 398, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 884, "(1)" - line 398, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 885, "else" - line 398, "pan.___", state 888, "(1)" - line 402, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 898, "(1)" - line 402, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 899, "else" - line 402, "pan.___", state 902, "(1)" - line 402, "pan.___", state 903, "(1)" - line 402, "pan.___", state 903, "(1)" - line 400, "pan.___", state 908, "((i<1))" - line 400, "pan.___", state 908, "((i>=1))" - line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 927, "(1)" - line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, "pan.___", state 928, "else" - line 408, "pan.___", state 931, "(1)" - line 408, "pan.___", state 932, "(1)" - line 408, "pan.___", state 932, "(1)" - line 412, "pan.___", state 940, "(1)" - line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, "pan.___", state 941, "else" - line 412, "pan.___", state 944, "(1)" - line 412, "pan.___", state 945, "(1)" - line 412, "pan.___", state 945, "(1)" - line 410, "pan.___", state 950, "((i<1))" - line 410, "pan.___", state 950, "((i>=1))" - line 417, "pan.___", state 957, "(1)" - line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, "pan.___", state 958, "else" - line 417, "pan.___", state 961, "(1)" - line 417, "pan.___", state 962, "(1)" - line 417, "pan.___", state 962, "(1)" - line 419, "pan.___", state 965, "(1)" - line 419, "pan.___", state 965, "(1)" - line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1040, "(1)" - line 417, "pan.___", state 1057, "(1)" - line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1130, "(1)" - line 417, "pan.___", state 1147, "(1)" - line 398, "pan.___", state 1166, "(1)" - line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1222, "(1)" - line 417, "pan.___", state 1239, "(1)" - line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 412, "pan.___", state 1315, "(1)" - line 417, "pan.___", state 1332, "(1)" - line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1378, "(1)" - line 163, "pan.___", state 1386, "(1)" - line 167, "pan.___", state 1398, "(1)" - line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1508, "(1)" - line 163, "pan.___", state 1516, "(1)" - line 167, "pan.___", state 1528, "(1)" - line 398, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 1552, "(1)" - line 398, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 398, "pan.___", state 1553, "else" - line 398, "pan.___", state 1556, "(1)" - line 402, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 1566, "(1)" - line 402, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 402, "pan.___", state 1567, "else" - line 402, "pan.___", state 1570, "(1)" - line 402, "pan.___", state 1571, "(1)" - line 402, "pan.___", state 1571, "(1)" - line 400, "pan.___", state 1576, "((i<1))" - line 400, "pan.___", state 1576, "((i>=1))" - line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1595, "(1)" - line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 408, "pan.___", state 1596, "else" - line 408, "pan.___", state 1599, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 412, "pan.___", state 1608, "(1)" - line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 412, "pan.___", state 1609, "else" - line 412, "pan.___", state 1612, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 410, "pan.___", state 1618, "((i<1))" - line 410, "pan.___", state 1618, "((i>=1))" - line 417, "pan.___", state 1625, "(1)" - line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 417, "pan.___", state 1626, "else" - line 417, "pan.___", state 1629, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1681, "(1)" - line 163, "pan.___", state 1689, "(1)" - line 167, "pan.___", state 1701, "(1)" - line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 178, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 182, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 159, "pan.___", state 1811, "(1)" - line 163, "pan.___", state 1819, "(1)" - line 167, "pan.___", state 1831, "(1)" - line 701, "pan.___", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 748, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 523 seconds -pan: rate 90149.985 states/second -pan: avg transition delay 9.1997e-07 usec -cp .input.spin urcu_free.spin.input -cp .input.spin.trail urcu_free.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free.ltl b/formal-model/urcu/result-signal-over-reader/urcu_free.ltl deleted file mode 100644 index 1954414..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (read_free -> !read_free_race) diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_free.spin.input deleted file mode 100644 index 2d7f62d..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free.spin.input +++ /dev/null @@ -1,722 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_free.spin.input.trail deleted file mode 100644 index 837f3d9..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free.spin.input.trail +++ /dev/null @@ -1,15043 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 -21:4:4355 -22:4:4359 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-14999:2:1752 -15000:0:4365 -15001:3:2427 -15002:0:4365 -15003:2:1754 -15004:0:4365 -15005:3:2428 -15006:0:4365 -15007:2:1755 -15008:2:1759 -15009:2:1760 -15010:2:1768 -15011:2:1769 -15012:2:1773 -15013:2:1774 -15014:2:1768 -15015:2:1769 -15016:2:1773 -15017:2:1774 -15018:2:1782 -15019:2:1787 -15020:2:1791 -15021:2:1792 -15022:2:1799 -15023:2:1800 -15024:2:1811 -15025:2:1812 -15026:2:1813 -15027:2:1811 -15028:2:1812 -15029:2:1813 -15030:2:1824 -15031:2:1829 -15032:2:1830 -15033:0:4365 -15034:2:1842 -15035:0:4365 -15036:3:2427 -15037:0:4365 -15038:2:1844 -15039:0:4363 -15040:3:2428 -15041:0:4369 diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.define b/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.log b/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.log deleted file mode 100644 index 3afaead..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.log +++ /dev/null @@ -1,303 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -Depth= 6009 States= 1e+06 Transitions= 1.08e+07 Memory= 534.904 t= 9.22 R= 1e+05 -Depth= 6009 States= 2e+06 Transitions= 3.4e+07 Memory= 603.557 t= 31.1 R= 6e+04 -Depth= 7527 States= 3e+06 Transitions= 4.91e+07 Memory= 672.209 t= 45.6 R= 7e+04 -pan: resizing hashtable to -w22.. done -Depth= 68651 States= 4e+06 Transitions= 6.74e+07 Memory= 772.080 t= 62.9 R= 6e+04 -Depth= 68651 States= 5e+06 Transitions= 8.62e+07 Memory= 840.733 t= 80.2 R= 6e+04 -Depth= 68651 States= 6e+06 Transitions= 1.03e+08 Memory= 909.385 t= 95.7 R= 6e+04 -Depth= 68651 States= 7e+06 Transitions= 1.21e+08 Memory= 978.037 t= 112 R= 6e+04 -Depth= 68651 States= 8e+06 Transitions= 1.37e+08 Memory= 1046.690 t= 128 R= 6e+04 -Depth= 68651 States= 9e+06 Transitions= 1.52e+08 Memory= 1115.440 t= 143 R= 6e+04 -pan: resizing hashtable to -w24.. done -Depth= 68651 States= 1e+07 Transitions= 1.72e+08 Memory= 1308.186 t= 163 R= 6e+04 -Depth= 68651 States= 1.1e+07 Transitions= 1.89e+08 Memory= 1376.838 t= 178 R= 6e+04 -Depth= 68651 States= 1.2e+07 Transitions= 2.05e+08 Memory= 1445.490 t= 193 R= 6e+04 -Depth= 68651 States= 1.3e+07 Transitions= 2.22e+08 Memory= 1514.143 t= 208 R= 6e+04 -Depth= 68651 States= 1.4e+07 Transitions= 2.39e+08 Memory= 1582.893 t= 224 R= 6e+04 -pan: claim violated! (at depth 2141) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 88 byte, depth reached 68651, errors: 1 - 14155711 states, stored -2.2815817e+08 states, matched -2.4231388e+08 transitions (= stored+matched) -8.5461256e+08 atomic steps -hash conflicts: 1.1483359e+08 (resolved) - -Stats on memory usage (in Megabytes): - 1565.993 equivalent memory usage for states (stored*(State-vector + overhead)) - 1008.042 actual memory usage for states (compression: 64.37%) - state-vector as stored = 47 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1593.537 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 227, "(1)" - line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 256, "(1)" - line 419, "pan.___", state 286, "(1)" - line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 366, "(1)" - line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 395, "(1)" - line 419, "pan.___", state 425, "(1)" - line 541, "pan.___", state 456, "-end-" - (19 of 456 states) -unreached in proctype urcu_reader_sig - line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 70, "(1)" - line 419, "pan.___", state 100, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 247, "(1)" - line 419, "pan.___", state 277, "(1)" - line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 330, "(1)" - line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 359, "(1)" - line 419, "pan.___", state 389, "(1)" - line 615, "pan.___", state 411, "-end-" - (18 of 411 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 421, "pan.___", state 97, "(1)" - line 421, "pan.___", state 97, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 410, "pan.___", state 153, "(1)" - line 414, "pan.___", state 166, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 653, "pan.___", state 199, "(1)" - line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 254, "(1)" - line 414, "pan.___", state 267, "(1)" - line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 345, "(1)" - line 414, "pan.___", state 358, "(1)" - line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 440, "(1)" - line 414, "pan.___", state 453, "(1)" - line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 533, "(1)" - line 414, "pan.___", state 546, "(1)" - line 400, "pan.___", state 582, "(1)" - line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 638, "(1)" - line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 731, "(1)" - line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 821, "(1)" - line 419, "pan.___", state 838, "(1)" - line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 912, "(1)" - line 419, "pan.___", state 929, "(1)" - line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1007, "(1)" - line 419, "pan.___", state 1024, "(1)" - line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1053, "else" - line 400, "pan.___", state 1056, "(1)" - line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1066, "(1)" - line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1067, "else" - line 404, "pan.___", state 1070, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 402, "pan.___", state 1076, "((i<1))" - line 402, "pan.___", state 1076, "((i>=1))" - line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1095, "(1)" - line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1096, "else" - line 410, "pan.___", state 1099, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 414, "pan.___", state 1108, "(1)" - line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1109, "else" - line 414, "pan.___", state 1112, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 412, "pan.___", state 1118, "((i<1))" - line 412, "pan.___", state 1118, "((i>=1))" - line 419, "pan.___", state 1125, "(1)" - line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1126, "else" - line 419, "pan.___", state 1129, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1208, "(1)" - line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1298, "(1)" - line 400, "pan.___", state 1334, "(1)" - line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1390, "(1)" - line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1483, "(1)" - line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1573, "(1)" - line 419, "pan.___", state 1590, "(1)" - line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1664, "(1)" - line 419, "pan.___", state 1681, "(1)" - line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1759, "(1)" - line 419, "pan.___", state 1776, "(1)" - line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1804, "(1)" - line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1805, "else" - line 400, "pan.___", state 1808, "(1)" - line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1818, "(1)" - line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1819, "else" - line 404, "pan.___", state 1822, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 402, "pan.___", state 1828, "((i<1))" - line 402, "pan.___", state 1828, "((i>=1))" - line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1847, "(1)" - line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1848, "else" - line 410, "pan.___", state 1851, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 414, "pan.___", state 1860, "(1)" - line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1861, "else" - line 414, "pan.___", state 1864, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 412, "pan.___", state 1870, "((i<1))" - line 412, "pan.___", state 1870, "((i>=1))" - line 419, "pan.___", state 1877, "(1)" - line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1878, "else" - line 419, "pan.___", state 1881, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1960, "(1)" - line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 2051, "(1)" - line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 2146, "(1)" - line 703, "pan.___", state 2192, "-end-" - (144 of 2192 states) -unreached in proctype :init: - line 710, "pan.___", state 9, "((j<2))" - line 710, "pan.___", state 9, "((j>=2))" - line 711, "pan.___", state 20, "((j<2))" - line 711, "pan.___", state 20, "((j>=2))" - line 716, "pan.___", state 33, "((j<2))" - line 716, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 750, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 227 seconds -pan: rate 62472.797 states/second -pan: avg transition delay 9.3511e-07 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input deleted file mode 100644 index 5de16b8..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,724 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index d437aad..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2144 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:3107 -2:4:3059 -3:4:3062 -4:4:3062 -5:4:3065 -6:4:3073 -7:4:3073 -8:4:3076 -9:4:3082 -10:4:3086 -11:4:3086 -12:4:3089 -13:4:3097 -14:4:3101 -15:4:3102 -16:0:3107 -17:4:3104 -18:0:3107 -19:3:869 -20:0:3107 -21:3:875 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-2038:3:3053 -2039:0:3107 -2040:2:476 -2041:0:3107 -2042:3:3052 -2043:0:3107 -2044:2:477 -2045:2:481 -2046:2:482 -2047:2:490 -2048:2:491 -2049:2:495 -2050:2:496 -2051:2:504 -2052:2:509 -2053:2:513 -2054:2:514 -2055:2:521 -2056:2:522 -2057:2:533 -2058:2:534 -2059:2:535 -2060:2:546 -2061:2:551 -2062:2:552 -2063:0:3107 -2064:3:3053 -2065:0:3107 -2066:2:564 -2067:0:3107 -2068:3:3052 -2069:0:3107 -2070:2:565 -2071:2:569 -2072:2:570 -2073:2:578 -2074:2:579 -2075:2:583 -2076:2:584 -2077:2:592 -2078:2:597 -2079:2:601 -2080:2:602 -2081:2:609 -2082:2:610 -2083:2:621 -2084:2:622 -2085:2:623 -2086:2:634 -2087:2:639 -2088:2:640 -2089:0:3107 -2090:3:3053 -2091:0:3107 -2092:2:652 -2093:0:3107 -2094:3:3052 -2095:0:3107 -2096:2:653 -2097:0:3107 -2098:3:3053 -2099:0:3107 -2100:2:654 -2101:2:658 -2102:2:659 -2103:2:667 -2104:2:668 -2105:2:672 -2106:2:673 -2107:2:681 -2108:2:686 -2109:2:690 -2110:2:691 -2111:2:698 -2112:2:699 -2113:2:710 -2114:2:711 -2115:2:712 -2116:2:723 -2117:2:728 -2118:2:729 -2119:0:3107 -2120:3:3052 -2121:0:3107 -2122:2:741 -2123:0:3107 -2124:3:3053 -2125:0:3107 -2126:2:750 -2127:0:3107 -2128:3:3052 -2129:0:3107 -2130:2:753 -2131:0:3107 -2132:3:3053 -2133:0:3107 -2134:2:758 -2135:0:3107 -2136:3:3052 -2137:0:3107 -2138:2:759 -2139:0:3105 -2140:3:3053 -2141:0:3111 -2142:2:647 diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.define b/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.log b/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.log deleted file mode 100644 index 5bcef22..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.log +++ /dev/null @@ -1,300 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 5678 States= 1e+06 Transitions= 8.21e+06 Memory= 534.904 t= 6.72 R= 1e+05 -Depth= 5678 States= 2e+06 Transitions= 1.6e+07 Memory= 603.557 t= 13.4 R= 1e+05 -Depth= 16003 States= 3e+06 Transitions= 2.49e+07 Memory= 672.209 t= 21.5 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 31043 States= 4e+06 Transitions= 3.44e+07 Memory= 771.983 t= 30.1 R= 1e+05 -Depth= 31043 States= 5e+06 Transitions= 4.41e+07 Memory= 840.635 t= 38.4 R= 1e+05 -Depth= 31043 States= 6e+06 Transitions= 5.25e+07 Memory= 909.287 t= 45.7 R= 1e+05 -Depth= 31043 States= 7e+06 Transitions= 6.12e+07 Memory= 977.940 t= 53.4 R= 1e+05 -Depth= 31043 States= 8e+06 Transitions= 6.95e+07 Memory= 1046.690 t= 60.8 R= 1e+05 -Depth= 31043 States= 9e+06 Transitions= 7.78e+07 Memory= 1115.342 t= 68.5 R= 1e+05 -pan: resizing hashtable to -w24.. done -Depth= 31043 States= 1e+07 Transitions= 8.68e+07 Memory= 1308.088 t= 77.9 R= 1e+05 -Depth= 31043 States= 1.1e+07 Transitions= 1.01e+08 Memory= 1376.740 t= 90.1 R= 1e+05 -Depth= 31043 States= 1.2e+07 Transitions= 1.13e+08 Memory= 1445.393 t= 101 R= 1e+05 -Depth= 31043 States= 1.3e+07 Transitions= 1.25e+08 Memory= 1514.045 t= 111 R= 1e+05 -Depth= 31043 States= 1.4e+07 Transitions= 1.38e+08 Memory= 1582.795 t= 122 R= 1e+05 -pan: claim violated! (at depth 1774) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 31043, errors: 1 - 14288659 states, stored -1.2755714e+08 states, matched -1.418458e+08 transitions (= stored+matched) -4.6616273e+08 atomic steps -hash conflicts: 65726574 (resolved) - -Stats on memory usage (in Megabytes): - 1253.659 equivalent memory usage for states (stored*(State-vector + overhead)) - 1017.191 actual memory usage for states (compression: 81.14%) - state-vector as stored = 47 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1602.619 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 291, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 304, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 320, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 334, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 352, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 365, "(1)" - line 413, "pan.___", state 378, "(1)" - line 418, "pan.___", state 395, "(1)" - line 399, "pan.___", state 414, "(1)" - line 403, "pan.___", state 426, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 444, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 470, "(1)" - line 418, "pan.___", state 487, "(1)" - line 403, "pan.___", state 519, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 537, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 563, "(1)" - line 418, "pan.___", state 580, "(1)" - line 179, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 629, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 677, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 690, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 714, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 716, "(1)" - line 399, "pan.___", state 717, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 717, "else" - line 399, "pan.___", state 720, "(1)" - line 403, "pan.___", state 728, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 730, "(1)" - line 403, "pan.___", state 731, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 731, "else" - line 403, "pan.___", state 734, "(1)" - line 403, "pan.___", state 735, "(1)" - line 403, "pan.___", state 735, "(1)" - line 401, "pan.___", state 740, "((i<1))" - line 401, "pan.___", state 740, "((i>=1))" - line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 759, "(1)" - line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 760, "else" - line 409, "pan.___", state 763, "(1)" - line 409, "pan.___", state 764, "(1)" - line 409, "pan.___", state 764, "(1)" - line 413, "pan.___", state 772, "(1)" - line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 773, "else" - line 413, "pan.___", state 776, "(1)" - line 413, "pan.___", state 777, "(1)" - line 413, "pan.___", state 777, "(1)" - line 411, "pan.___", state 782, "((i<1))" - line 411, "pan.___", state 782, "((i>=1))" - line 418, "pan.___", state 789, "(1)" - line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 790, "else" - line 418, "pan.___", state 793, "(1)" - line 418, "pan.___", state 794, "(1)" - line 418, "pan.___", state 794, "(1)" - line 420, "pan.___", state 797, "(1)" - line 420, "pan.___", state 797, "(1)" - line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 872, "(1)" - line 418, "pan.___", state 889, "(1)" - line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 962, "(1)" - line 418, "pan.___", state 979, "(1)" - line 399, "pan.___", state 998, "(1)" - line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1054, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1147, "(1)" - line 418, "pan.___", state 1164, "(1)" - line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1261, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1300, "(1)" - line 399, "pan.___", state 1301, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1301, "else" - line 399, "pan.___", state 1304, "(1)" - line 403, "pan.___", state 1312, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1314, "(1)" - line 403, "pan.___", state 1315, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1315, "else" - line 403, "pan.___", state 1318, "(1)" - line 403, "pan.___", state 1319, "(1)" - line 403, "pan.___", state 1319, "(1)" - line 401, "pan.___", state 1324, "((i<1))" - line 401, "pan.___", state 1324, "((i>=1))" - line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1343, "(1)" - line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1344, "else" - line 409, "pan.___", state 1347, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 413, "pan.___", state 1356, "(1)" - line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1357, "else" - line 413, "pan.___", state 1360, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 411, "pan.___", state 1366, "((i<1))" - line 411, "pan.___", state 1366, "((i>=1))" - line 418, "pan.___", state 1373, "(1)" - line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1374, "else" - line 418, "pan.___", state 1377, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1480, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1493, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 702, "pan.___", state 1520, "-end-" - (144 of 1520 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 125 seconds -pan: rate 114108.44 states/second -pan: avg transition delay 8.8279e-07 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input deleted file mode 100644 index ccf5f5c..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_RMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 1e5e132..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1777 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2435 -2:4:2387 -3:4:2390 -4:4:2390 -5:4:2393 -6:4:2401 -7:4:2401 -8:4:2404 -9:4:2410 -10:4:2414 -11:4:2414 -12:4:2417 -13:4:2425 -14:4:2429 -15:4:2430 -16:0:2435 -17:4:2432 -18:0:2435 -19:3:869 -20:0:2435 -21:3:875 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-1735:2:659 -1736:2:667 -1737:2:668 -1738:2:672 -1739:2:673 -1740:2:681 -1741:2:686 -1742:2:690 -1743:2:691 -1744:2:698 -1745:2:699 -1746:2:710 -1747:2:711 -1748:2:712 -1749:2:723 -1750:2:735 -1751:2:736 -1752:0:2435 -1753:3:2380 -1754:0:2435 -1755:2:741 -1756:0:2435 -1757:3:2381 -1758:0:2435 -1759:2:750 -1760:0:2435 -1761:3:2380 -1762:0:2435 -1763:2:753 -1764:0:2435 -1765:3:2381 -1766:0:2435 -1767:2:758 -1768:0:2435 -1769:3:2380 -1770:0:2435 -1771:2:759 -1772:0:2433 -1773:3:2381 -1774:0:2439 -1775:0:2435 diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.define b/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.log b/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.log deleted file mode 100644 index 0423ec5..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.log +++ /dev/null @@ -1,320 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 10656 States= 1e+06 Transitions= 8.86e+06 Memory= 534.807 t= 7.38 R= 1e+05 -Depth= 35214 States= 2e+06 Transitions= 1.82e+07 Memory= 603.557 t= 15.5 R= 1e+05 -Depth= 35214 States= 3e+06 Transitions= 2.73e+07 Memory= 672.209 t= 23.8 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 35214 States= 4e+06 Transitions= 4.08e+07 Memory= 771.885 t= 35.9 R= 1e+05 -pan: claim violated! (at depth 1650) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 35214, errors: 1 - 4154272 states, stored - 38595853 states, matched - 42750125 transitions (= stored+matched) -1.4058824e+08 atomic steps -hash conflicts: 21492325 (resolved) - -Stats on memory usage (in Megabytes): - 364.488 equivalent memory usage for states (stored*(State-vector + overhead)) - 292.863 actual memory usage for states (compression: 80.35%) - state-vector as stored = 46 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 782.529 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 227, "(1)" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 366, "(1)" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (19 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 330, "(1)" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (18 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 401, "pan.___", state 134, "((i<1))" - line 401, "pan.___", state 134, "((i>=1))" - line 409, "pan.___", state 153, "(1)" - line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 154, "else" - line 409, "pan.___", state 157, "(1)" - line 409, "pan.___", state 158, "(1)" - line 409, "pan.___", state 158, "(1)" - line 413, "pan.___", state 166, "(1)" - line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 167, "else" - line 413, "pan.___", state 170, "(1)" - line 413, "pan.___", state 171, "(1)" - line 413, "pan.___", state 171, "(1)" - line 411, "pan.___", state 176, "((i<1))" - line 411, "pan.___", state 176, "((i>=1))" - line 418, "pan.___", state 183, "(1)" - line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 184, "else" - line 418, "pan.___", state 187, "(1)" - line 418, "pan.___", state 188, "(1)" - line 418, "pan.___", state 188, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 369, "pan.___", state 193, "(1)" - line 652, "pan.___", state 199, "(1)" - line 646, "pan.___", state 202, "((write_lock==0))" - line 646, "pan.___", state 202, "else" - line 644, "pan.___", state 203, "(1)" - line 160, "pan.___", state 209, "(1)" - line 164, "pan.___", state 217, "(1)" - line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 164, "pan.___", state 218, "else" - line 162, "pan.___", state 223, "((j<1))" - line 162, "pan.___", state 223, "((j>=1))" - line 168, "pan.___", state 229, "(1)" - line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 168, "pan.___", state 230, "else" - line 160, "pan.___", state 241, "(1)" - line 168, "pan.___", state 261, "(1)" - line 160, "pan.___", state 277, "(1)" - line 164, "pan.___", state 285, "(1)" - line 168, "pan.___", state 297, "(1)" - line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 356, "(1)" - line 413, "pan.___", state 369, "(1)" - line 418, "pan.___", state 386, "(1)" - line 399, "pan.___", state 405, "(1)" - line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 461, "(1)" - line 418, "pan.___", state 478, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 164, "pan.___", state 594, "(1)" - line 168, "pan.___", state 606, "(1)" - line 160, "pan.___", state 618, "(1)" - line 168, "pan.___", state 638, "(1)" - line 164, "pan.___", state 662, "(1)" - line 168, "pan.___", state 674, "(1)" - line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 698, "(1)" - line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 699, "else" - line 399, "pan.___", state 702, "(1)" - line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 712, "(1)" - line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 713, "else" - line 403, "pan.___", state 716, "(1)" - line 403, "pan.___", state 717, "(1)" - line 403, "pan.___", state 717, "(1)" - line 401, "pan.___", state 722, "((i<1))" - line 401, "pan.___", state 722, "((i>=1))" - line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 741, "(1)" - line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 742, "else" - line 409, "pan.___", state 745, "(1)" - line 409, "pan.___", state 746, "(1)" - line 409, "pan.___", state 746, "(1)" - line 413, "pan.___", state 754, "(1)" - line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 755, "else" - line 413, "pan.___", state 758, "(1)" - line 413, "pan.___", state 759, "(1)" - line 413, "pan.___", state 759, "(1)" - line 411, "pan.___", state 764, "((i<1))" - line 411, "pan.___", state 764, "((i>=1))" - line 418, "pan.___", state 771, "(1)" - line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 772, "else" - line 418, "pan.___", state 775, "(1)" - line 418, "pan.___", state 776, "(1)" - line 418, "pan.___", state 776, "(1)" - line 420, "pan.___", state 779, "(1)" - line 420, "pan.___", state 779, "(1)" - line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 854, "(1)" - line 418, "pan.___", state 871, "(1)" - line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 944, "(1)" - line 418, "pan.___", state 961, "(1)" - line 399, "pan.___", state 980, "(1)" - line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1036, "(1)" - line 418, "pan.___", state 1053, "(1)" - line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1129, "(1)" - line 418, "pan.___", state 1146, "(1)" - line 164, "pan.___", state 1169, "(1)" - line 168, "pan.___", state 1181, "(1)" - line 160, "pan.___", state 1193, "(1)" - line 168, "pan.___", state 1213, "(1)" - line 164, "pan.___", state 1237, "(1)" - line 168, "pan.___", state 1249, "(1)" - line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1273, "(1)" - line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1274, "else" - line 399, "pan.___", state 1277, "(1)" - line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1287, "(1)" - line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1288, "else" - line 403, "pan.___", state 1291, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 401, "pan.___", state 1297, "((i<1))" - line 401, "pan.___", state 1297, "((i>=1))" - line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1316, "(1)" - line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1317, "else" - line 409, "pan.___", state 1320, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 413, "pan.___", state 1329, "(1)" - line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1330, "else" - line 413, "pan.___", state 1333, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 411, "pan.___", state 1339, "((i<1))" - line 411, "pan.___", state 1339, "((i>=1))" - line 418, "pan.___", state 1346, "(1)" - line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1347, "else" - line 418, "pan.___", state 1350, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 164, "pan.___", state 1379, "(1)" - line 168, "pan.___", state 1391, "(1)" - line 160, "pan.___", state 1403, "(1)" - line 168, "pan.___", state 1423, "(1)" - line 164, "pan.___", state 1447, "(1)" - line 168, "pan.___", state 1459, "(1)" - line 702, "pan.___", state 1484, "-end-" - (160 of 1484 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 37.6 seconds -pan: rate 110515.35 states/second -pan: avg transition delay 8.793e-07 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input deleted file mode 100644 index d5d174d..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index f2ce974..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1653 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2399 -2:4:2351 -3:4:2354 -4:4:2354 -5:4:2357 -6:4:2365 -7:4:2365 -8:4:2368 -9:4:2374 -10:4:2378 -11:4:2378 -12:4:2381 -13:4:2389 -14:4:2393 -15:4:2394 -16:0:2399 -17:4:2396 -18:0:2399 -19:3:869 -20:0:2399 -21:3:875 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b/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.log b/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.log deleted file mode 100644 index 5d7d35c..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.log +++ /dev/null @@ -1,217 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 8352 States= 1e+06 Transitions= 1.05e+07 Memory= 534.807 t= 8.93 R= 1e+05 -pan: claim violated! (at depth 1352) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 8352, errors: 1 - 1456373 states, stored - 13442538 states, matched - 14898911 transitions (= stored+matched) - 50580660 atomic steps -hash conflicts: 5166006 (resolved) - -Stats on memory usage (in Megabytes): - 127.779 equivalent memory usage for states (stored*(State-vector + overhead)) - 100.443 actual memory usage for states (compression: 78.61%) - state-vector as stored = 44 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 566.154 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 370, "(1)" - line 164, "pan.___", state 378, "(1)" - line 168, "pan.___", state 390, "(1)" - line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 449, "(1)" - line 413, "pan.___", state 462, "(1)" - line 418, "pan.___", state 479, "(1)" - line 399, "pan.___", state 498, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 647, "(1)" - line 418, "pan.___", state 664, "(1)" - line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 710, "(1)" - line 164, "pan.___", state 718, "(1)" - line 168, "pan.___", state 730, "(1)" - line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 840, "(1)" - line 164, "pan.___", state 848, "(1)" - line 168, "pan.___", state 860, "(1)" - line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 884, "(1)" - line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 885, "else" - line 399, "pan.___", state 888, "(1)" - line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 898, "(1)" - line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 899, "else" - line 403, "pan.___", state 902, "(1)" - line 403, "pan.___", state 903, "(1)" - line 403, "pan.___", state 903, "(1)" - line 401, "pan.___", state 908, "((i<1))" - line 401, "pan.___", state 908, "((i>=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1013, "(1)" - line 164, "pan.___", state 1021, "(1)" - line 168, "pan.___", state 1033, "(1)" - line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1133, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1143, "(1)" - line 164, "pan.___", state 1151, "(1)" - line 168, "pan.___", state 1163, "(1)" - line 702, "pan.___", state 1188, "-end-" - (100 of 1188 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 12.8 seconds -pan: rate 113424.69 states/second -pan: avg transition delay 8.6181e-07 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input deleted file mode 100644 index 103464e..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define SINGLE_FLIP - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index e81c46c..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1355 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2103 -2:4:2055 -3:4:2058 -4:4:2058 -5:4:2061 -6:4:2069 -7:4:2069 -8:4:2072 -9:4:2078 -10:4:2082 -11:4:2082 -12:4:2085 -13:4:2093 -14:4:2097 -15:4:2098 -16:0:2103 -17:4:2100 -18:0:2103 -19:3:869 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-1348:0:2103 -1349:2:759 -1350:0:2101 -1351:3:2049 -1352:0:2107 -1353:3:1181 diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress.ltl b/formal-model/urcu/result-signal-over-reader/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.define b/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.log b/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.log deleted file mode 100644 index e3ec127..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.log +++ /dev/null @@ -1,506 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 1803: Claim reached state 9 (line 748) -Depth= 5838 States= 1e+06 Transitions= 1.06e+07 Memory= 494.865 t= 9.24 R= 1e+05 -Depth= 5838 States= 2e+06 Transitions= 1.97e+07 Memory= 532.658 t= 17.7 R= 1e+05 -Depth= 5838 States= 3e+06 Transitions= 3.15e+07 Memory= 555.315 t= 28.4 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 6855 States= 4e+06 Transitions= 4.32e+07 Memory= 613.096 t= 39.1 R= 1e+05 -Depth= 9059 States= 5e+06 Transitions= 5.48e+07 Memory= 642.295 t= 49.5 R= 1e+05 -Depth= 9059 States= 6e+06 Transitions= 6.91e+07 Memory= 672.178 t= 62.5 R= 1e+05 -Depth= 9059 States= 7e+06 Transitions= 7.99e+07 Memory= 706.455 t= 72.5 R= 1e+05 -Depth= 9059 States= 8e+06 Transitions= 9.23e+07 Memory= 735.752 t= 84 R= 1e+05 -Depth= 9059 States= 9e+06 Transitions= 1.04e+08 Memory= 766.318 t= 94.5 R= 1e+05 -pan: resizing hashtable to -w24.. done -Depth= 9059 States= 1e+07 Transitions= 1.16e+08 Memory= 920.002 t= 106 R= 9e+04 -Depth= 9059 States= 1.1e+07 Transitions= 1.3e+08 Memory= 945.002 t= 119 R= 9e+04 -Depth= 9059 States= 1.2e+07 Transitions= 1.54e+08 Memory= 967.756 t= 140 R= 9e+04 -Depth= 9059 States= 1.3e+07 Transitions= 1.72e+08 Memory= 995.002 t= 157 R= 8e+04 -Depth= 9059 States= 1.4e+07 Transitions= 1.92e+08 Memory= 1022.736 t= 175 R= 8e+04 -Depth= 9059 States= 1.5e+07 Transitions= 2.1e+08 Memory= 1050.080 t= 191 R= 8e+04 -Depth= 9059 States= 1.6e+07 Transitions= 2.22e+08 Memory= 1082.502 t= 203 R= 8e+04 -Depth= 9059 States= 1.7e+07 Transitions= 2.41e+08 Memory= 1108.479 t= 219 R= 8e+04 -Depth= 9059 States= 1.8e+07 Transitions= 2.58e+08 Memory= 1134.455 t= 235 R= 8e+04 -Depth= 9059 States= 1.9e+07 Transitions= 2.7e+08 Memory= 1164.533 t= 246 R= 8e+04 -Depth= 9059 States= 2e+07 Transitions= 2.83e+08 Memory= 1193.830 t= 258 R= 8e+04 -Depth= 9059 States= 2.1e+07 Transitions= 3.03e+08 Memory= 1219.026 t= 276 R= 8e+04 -Depth= 9059 States= 2.2e+07 Transitions= 3.19e+08 Memory= 1248.420 t= 291 R= 8e+04 -Depth= 9059 States= 2.3e+07 Transitions= 3.42e+08 Memory= 1271.858 t= 312 R= 7e+04 -Depth= 9059 States= 2.4e+07 Transitions= 3.6e+08 Memory= 1298.908 t= 328 R= 7e+04 -Depth= 9059 States= 2.5e+07 Transitions= 3.84e+08 Memory= 1323.127 t= 350 R= 7e+04 -Depth= 9059 States= 2.6e+07 Transitions= 4e+08 Memory= 1348.518 t= 365 R= 7e+04 -Depth= 9059 States= 2.7e+07 Transitions= 4.16e+08 Memory= 1379.865 t= 380 R= 7e+04 -Depth= 9059 States= 2.8e+07 Transitions= 4.26e+08 Memory= 1411.115 t= 389 R= 7e+04 -Depth= 9059 States= 2.9e+07 Transitions= 4.42e+08 Memory= 1439.631 t= 404 R= 7e+04 -Depth= 9059 States= 3e+07 Transitions= 4.64e+08 Memory= 1462.385 t= 423 R= 7e+04 -Depth= 9059 States= 3.1e+07 Transitions= 4.82e+08 Memory= 1490.998 t= 439 R= 7e+04 -Depth= 9059 States= 3.2e+07 Transitions= 4.99e+08 Memory= 1519.514 t= 456 R= 7e+04 -Depth= 9059 States= 3.3e+07 Transitions= 5.18e+08 Memory= 1545.393 t= 473 R= 7e+04 -Depth= 9059 States= 3.4e+07 Transitions= 5.33e+08 Memory= 1578.108 t= 486 R= 7e+04 -pan: resizing hashtable to -w26.. done -Depth= 9059 States= 3.5e+07 Transitions= 5.49e+08 Memory= 2098.994 t= 504 R= 7e+04 -Depth= 9059 States= 3.6e+07 Transitions= 5.74e+08 Memory= 2121.651 t= 528 R= 7e+04 -Depth= 9059 States= 3.7e+07 Transitions= 5.96e+08 Memory= 2147.334 t= 547 R= 7e+04 -Depth= 9059 States= 3.8e+07 Transitions= 6.17e+08 Memory= 2170.186 t= 567 R= 7e+04 -Depth= 9059 States= 3.9e+07 Transitions= 6.3e+08 Memory= 2199.776 t= 578 R= 7e+04 -Depth= 9059 States= 4e+07 Transitions= 6.53e+08 Memory= 2225.459 t= 599 R= 7e+04 -Depth= 9059 States= 4.1e+07 Transitions= 6.69e+08 Memory= 2250.361 t= 614 R= 7e+04 -Depth= 9059 States= 4.2e+07 Transitions= 6.85e+08 Memory= 2279.268 t= 628 R= 7e+04 -Depth= 9059 States= 4.3e+07 Transitions= 7.03e+08 Memory= 2304.463 t= 644 R= 7e+04 -Depth= 9059 States= 4.4e+07 Transitions= 7.13e+08 Memory= 2338.252 t= 654 R= 7e+04 -Depth= 9059 States= 4.5e+07 Transitions= 7.25e+08 Memory= 2366.768 t= 665 R= 7e+04 -Depth= 9059 States= 4.6e+07 Transitions= 7.41e+08 Memory= 2393.330 t= 679 R= 7e+04 -Depth= 9059 States= 4.7e+07 Transitions= 7.57e+08 Memory= 2420.381 t= 694 R= 7e+04 -Depth= 9059 States= 4.8e+07 Transitions= 7.72e+08 Memory= 2447.041 t= 708 R= 7e+04 -Depth= 9059 States= 4.9e+07 Transitions= 7.88e+08 Memory= 2476.143 t= 722 R= 7e+04 -Depth= 9059 States= 5e+07 Transitions= 8.04e+08 Memory= 2501.045 t= 737 R= 7e+04 -Depth= 9059 States= 5.1e+07 Transitions= 8.2e+08 Memory= 2530.440 t= 752 R= 7e+04 -Depth= 9059 States= 5.2e+07 Transitions= 8.37e+08 Memory= 2554.854 t= 766 R= 7e+04 -Depth= 9059 States= 5.3e+07 Transitions= 8.5e+08 Memory= 2583.467 t= 779 R= 7e+04 -Depth= 9059 States= 5.4e+07 Transitions= 8.66e+08 Memory= 2611.299 t= 794 R= 7e+04 -Depth= 9059 States= 5.5e+07 Transitions= 8.79e+08 Memory= 2640.791 t= 805 R= 7e+04 -Depth= 9059 States= 5.6e+07 Transitions= 8.9e+08 Memory= 2672.139 t= 815 R= 7e+04 -Depth= 9059 States= 5.7e+07 Transitions= 9.05e+08 Memory= 2702.705 t= 829 R= 7e+04 -Depth= 9059 States= 5.8e+07 Transitions= 9.22e+08 Memory= 2727.998 t= 845 R= 7e+04 -Depth= 9059 States= 5.9e+07 Transitions= 9.38e+08 Memory= 2754.463 t= 859 R= 7e+04 -Depth= 9059 States= 6e+07 Transitions= 9.49e+08 Memory= 2789.717 t= 870 R= 7e+04 -Depth= 9059 States= 6.1e+07 Transitions= 9.62e+08 Memory= 2817.744 t= 881 R= 7e+04 -Depth= 9059 States= 6.2e+07 Transitions= 9.79e+08 Memory= 2838.447 t= 896 R= 7e+04 -Depth= 9059 States= 6.3e+07 Transitions= 1e+09 Memory= 2863.154 t= 919 R= 7e+04 -Depth= 9059 States= 6.4e+07 Transitions= 1.02e+09 Memory= 2889.131 t= 936 R= 7e+04 -Depth= 9059 States= 6.5e+07 Transitions= 1.04e+09 Memory= 2919.502 t= 952 R= 7e+04 -Depth= 9059 States= 6.6e+07 Transitions= 1.06e+09 Memory= 2943.916 t= 968 R= 7e+04 -Depth= 9059 States= 6.7e+07 Transitions= 1.07e+09 Memory= 2978.975 t= 979 R= 7e+04 -Depth= 9059 States= 6.8e+07 Transitions= 1.09e+09 Memory= 3003.877 t= 996 R= 7e+04 -Depth= 9059 States= 6.9e+07 Transitions= 1.11e+09 Memory= 3028.584 t= 1.01e+03 R= 7e+04 -Depth= 9059 States= 7e+07 Transitions= 1.12e+09 Memory= 3058.174 t= 1.02e+03 R= 7e+04 -Depth= 9059 States= 7.1e+07 Transitions= 1.13e+09 Memory= 3088.350 t= 1.04e+03 R= 7e+04 -Depth= 9059 States= 7.2e+07 Transitions= 1.15e+09 Memory= 3113.350 t= 1.05e+03 R= 7e+04 -Depth= 9059 States= 7.3e+07 Transitions= 1.17e+09 Memory= 3142.158 t= 1.07e+03 R= 7e+04 -Depth= 9059 States= 7.4e+07 Transitions= 1.19e+09 Memory= 3166.279 t= 1.09e+03 R= 7e+04 -Depth= 9059 States= 7.5e+07 Transitions= 1.21e+09 Memory= 3192.744 t= 1.11e+03 R= 7e+04 -Depth= 9059 States= 7.6e+07 Transitions= 1.23e+09 Memory= 3217.256 t= 1.13e+03 R= 7e+04 -Depth= 9059 States= 7.7e+07 Transitions= 1.25e+09 Memory= 3242.549 t= 1.14e+03 R= 7e+04 -Depth= 9059 States= 7.8e+07 Transitions= 1.26e+09 Memory= 3273.115 t= 1.16e+03 R= 7e+04 -Depth= 9059 States= 7.9e+07 Transitions= 1.27e+09 Memory= 3303.975 t= 1.17e+03 R= 7e+04 -Depth= 9059 States= 8e+07 Transitions= 1.29e+09 Memory= 3334.541 t= 1.18e+03 R= 7e+04 -Depth= 9059 States= 8.1e+07 Transitions= 1.31e+09 Memory= 3356.221 t= 1.2e+03 R= 7e+04 -Depth= 9059 States= 8.2e+07 Transitions= 1.33e+09 Memory= 3385.127 t= 1.22e+03 R= 7e+04 -Depth= 9059 States= 8.3e+07 Transitions= 1.35e+09 Memory= 3412.959 t= 1.23e+03 R= 7e+04 -Depth= 9059 States= 8.4e+07 Transitions= 1.37e+09 Memory= 3438.936 t= 1.25e+03 R= 7e+04 -Depth= 9059 States= 8.5e+07 Transitions= 1.38e+09 Memory= 3471.455 t= 1.26e+03 R= 7e+04 -Depth= 9059 States= 8.6e+07 Transitions= 1.4e+09 Memory= 3498.115 t= 1.28e+03 R= 7e+04 -Depth= 9059 States= 8.7e+07 Transitions= 1.42e+09 Memory= 3519.014 t= 1.3e+03 R= 7e+04 -Depth= 9059 States= 8.8e+07 Transitions= 1.44e+09 Memory= 3546.162 t= 1.32e+03 R= 7e+04 -Depth= 9059 States= 8.9e+07 Transitions= 1.46e+09 Memory= 3567.842 t= 1.34e+03 R= 7e+04 -Depth= 9059 States= 9e+07 Transitions= 1.48e+09 Memory= 3598.799 t= 1.35e+03 R= 7e+04 -Depth= 9059 States= 9.1e+07 Transitions= 1.5e+09 Memory= 3622.920 t= 1.37e+03 R= 7e+04 -Depth= 9059 States= 9.2e+07 Transitions= 1.52e+09 Memory= 3648.701 t= 1.39e+03 R= 7e+04 -Depth= 9059 States= 9.3e+07 Transitions= 1.53e+09 Memory= 3676.045 t= 1.4e+03 R= 7e+04 -Depth= 9059 States= 9.4e+07 Transitions= 1.55e+09 Memory= 3702.412 t= 1.42e+03 R= 7e+04 -Depth= 9059 States= 9.5e+07 Transitions= 1.56e+09 Memory= 3735.713 t= 1.43e+03 R= 7e+04 -Depth= 9059 States= 9.6e+07 Transitions= 1.57e+09 Memory= 3764.522 t= 1.44e+03 R= 7e+04 -Depth= 9059 States= 9.7e+07 Transitions= 1.59e+09 Memory= 3790.693 t= 1.45e+03 R= 7e+04 -Depth= 9059 States= 9.8e+07 Transitions= 1.61e+09 Memory= 3817.940 t= 1.47e+03 R= 7e+04 -Depth= 9059 States= 9.9e+07 Transitions= 1.62e+09 Memory= 3845.283 t= 1.48e+03 R= 7e+04 -Depth= 9059 States= 1e+08 Transitions= 1.64e+09 Memory= 3873.213 t= 1.5e+03 R= 7e+04 -Depth= 9059 States= 1.01e+08 Transitions= 1.65e+09 Memory= 3897.920 t= 1.51e+03 R= 7e+04 -Depth= 9059 States= 1.02e+08 Transitions= 1.67e+09 Memory= 3926.631 t= 1.53e+03 R= 7e+04 -Depth= 9059 States= 1.03e+08 Transitions= 1.68e+09 Memory= 3952.315 t= 1.54e+03 R= 7e+04 -Depth= 9059 States= 1.04e+08 Transitions= 1.7e+09 Memory= 3981.026 t= 1.56e+03 R= 7e+04 -Depth= 9059 States= 1.05e+08 Transitions= 1.71e+09 Memory= 4010.029 t= 1.57e+03 R= 7e+04 -Depth= 9059 States= 1.06e+08 Transitions= 1.73e+09 Memory= 4038.838 t= 1.58e+03 R= 7e+04 -Depth= 9059 States= 1.07e+08 Transitions= 1.74e+09 Memory= 4070.381 t= 1.59e+03 R= 7e+04 -Depth= 9059 States= 1.08e+08 Transitions= 1.75e+09 Memory= 4099.385 t= 1.61e+03 R= 7e+04 -Depth= 9059 States= 1.09e+08 Transitions= 1.77e+09 Memory= 4126.338 t= 1.62e+03 R= 7e+04 -Depth= 9059 States= 1.1e+08 Transitions= 1.79e+09 Memory= 4151.924 t= 1.64e+03 R= 7e+04 -Depth= 9059 States= 1.11e+08 Transitions= 1.8e+09 Memory= 4187.276 t= 1.65e+03 R= 7e+04 -Depth= 9059 States= 1.12e+08 Transitions= 1.81e+09 Memory= 4214.326 t= 1.66e+03 R= 7e+04 -Depth= 9059 States= 1.13e+08 Transitions= 1.83e+09 Memory= 4237.471 t= 1.67e+03 R= 7e+04 -Depth= 9059 States= 1.14e+08 Transitions= 1.85e+09 Memory= 4261.104 t= 1.7e+03 R= 7e+04 -Depth= 9059 States= 1.15e+08 Transitions= 1.87e+09 Memory= 4286.690 t= 1.71e+03 R= 7e+04 -Depth= 9059 States= 1.16e+08 Transitions= 1.89e+09 Memory= 4314.619 t= 1.73e+03 R= 7e+04 -Depth= 9059 States= 1.17e+08 Transitions= 1.91e+09 Memory= 4341.768 t= 1.75e+03 R= 7e+04 -Depth= 9059 States= 1.18e+08 Transitions= 1.92e+09 Memory= 4375.166 t= 1.76e+03 R= 7e+04 -Depth= 9059 States= 1.19e+08 Transitions= 1.94e+09 Memory= 4401.338 t= 1.78e+03 R= 7e+04 -Depth= 9059 States= 1.2e+08 Transitions= 1.95e+09 Memory= 4426.436 t= 1.79e+03 R= 7e+04 -Depth= 9059 States= 1.21e+08 Transitions= 1.97e+09 Memory= 4456.807 t= 1.8e+03 R= 7e+04 -Depth= 9059 States= 1.22e+08 Transitions= 1.98e+09 Memory= 4486.592 t= 1.82e+03 R= 7e+04 -Depth= 9059 States= 1.23e+08 Transitions= 2e+09 Memory= 4511.787 t= 1.83e+03 R= 7e+04 -Depth= 9059 States= 1.24e+08 Transitions= 2.02e+09 Memory= 4540.108 t= 1.85e+03 R= 7e+04 -Depth= 9059 States= 1.25e+08 Transitions= 2.04e+09 Memory= 4564.033 t= 1.87e+03 R= 7e+04 -Depth= 9059 States= 1.26e+08 Transitions= 2.06e+09 Memory= 4591.865 t= 1.89e+03 R= 7e+04 -Depth= 9059 States= 1.27e+08 Transitions= 2.08e+09 Memory= 4615.889 t= 1.91e+03 R= 7e+04 -Depth= 9059 States= 1.28e+08 Transitions= 2.1e+09 Memory= 4640.303 t= 1.92e+03 R= 7e+04 -Depth= 9059 States= 1.29e+08 Transitions= 2.11e+09 Memory= 4670.479 t= 1.94e+03 R= 7e+04 -Depth= 9059 States= 1.3e+08 Transitions= 2.12e+09 Memory= 4702.998 t= 1.95e+03 R= 7e+04 -Depth= 9059 States= 1.31e+08 Transitions= 2.14e+09 Memory= 4732.393 t= 1.96e+03 R= 7e+04 -Depth= 9059 States= 1.32e+08 Transitions= 2.16e+09 Memory= 4754.756 t= 1.98e+03 R= 7e+04 -Depth= 9059 States= 1.33e+08 Transitions= 2.18e+09 Memory= 4783.174 t= 2e+03 R= 7e+04 -Depth= 9059 States= 1.34e+08 Transitions= 2.19e+09 Memory= 4810.518 t= 2.01e+03 R= 7e+04 -Depth= 9059 States= 1.35e+08 Transitions= 2.21e+09 Memory= 4837.568 t= 2.03e+03 R= 7e+04 -pan: resizing hashtable to -w28.. done -Depth= 9059 States= 1.36e+08 Transitions= 2.23e+09 Memory= 6885.568 t= 2.06e+03 R= 7e+04 -Depth= 9059 States= 1.37e+08 Transitions= 2.24e+09 Memory= 6885.568 t= 2.08e+03 R= 7e+04 -Depth= 9059 States= 1.38e+08 Transitions= 2.27e+09 Memory= 6900.412 t= 2.1e+03 R= 7e+04 -Depth= 9059 States= 1.39e+08 Transitions= 2.29e+09 Memory= 6927.658 t= 2.12e+03 R= 7e+04 -Depth= 9059 States= 1.4e+08 Transitions= 2.31e+09 Memory= 6950.315 t= 2.14e+03 R= 7e+04 -Depth= 9059 States= 1.41e+08 Transitions= 2.33e+09 Memory= 6981.858 t= 2.15e+03 R= 7e+04 -Depth= 9059 States= 1.42e+08 Transitions= 2.35e+09 Memory= 7005.295 t= 2.17e+03 R= 7e+04 -Depth= 9059 States= 1.43e+08 Transitions= 2.36e+09 Memory= 7031.076 t= 2.18e+03 R= 7e+04 -Depth= 9059 States= 1.44e+08 Transitions= 2.38e+09 Memory= 7056.955 t= 2.2e+03 R= 7e+04 -Depth= 9059 States= 1.45e+08 Transitions= 2.4e+09 Memory= 7084.494 t= 2.22e+03 R= 7e+04 -Depth= 9059 States= 1.46e+08 Transitions= 2.41e+09 Memory= 7115.744 t= 2.23e+03 R= 7e+04 -Depth= 9059 States= 1.47e+08 Transitions= 2.42e+09 Memory= 7146.604 t= 2.24e+03 R= 7e+04 -Depth= 9059 States= 1.48e+08 Transitions= 2.44e+09 Memory= 7172.287 t= 2.25e+03 R= 7e+04 -Depth= 9059 States= 1.49e+08 Transitions= 2.45e+09 Memory= 7200.315 t= 2.26e+03 R= 7e+04 -Depth= 9059 States= 1.5e+08 Transitions= 2.47e+09 Memory= 7226.389 t= 2.28e+03 R= 7e+04 -Depth= 9059 States= 1.51e+08 Transitions= 2.48e+09 Memory= 7253.733 t= 2.29e+03 R= 7e+04 -Depth= 9059 States= 1.52e+08 Transitions= 2.5e+09 Memory= 7279.709 t= 2.31e+03 R= 7e+04 -Depth= 9059 States= 1.53e+08 Transitions= 2.52e+09 Memory= 7309.104 t= 2.32e+03 R= 7e+04 -Depth= 9059 States= 1.54e+08 Transitions= 2.53e+09 Memory= 7334.592 t= 2.34e+03 R= 7e+04 -Depth= 9059 States= 1.55e+08 Transitions= 2.55e+09 Memory= 7362.229 t= 2.35e+03 R= 7e+04 -Depth= 9059 States= 1.56e+08 Transitions= 2.56e+09 Memory= 7391.135 t= 2.36e+03 R= 7e+04 -Depth= 9059 States= 1.57e+08 Transitions= 2.57e+09 Memory= 7420.822 t= 2.38e+03 R= 7e+04 -Depth= 9059 States= 1.58e+08 Transitions= 2.59e+09 Memory= 7452.854 t= 2.39e+03 R= 7e+04 -Depth= 9059 States= 1.59e+08 Transitions= 2.6e+09 Memory= 7481.760 t= 2.4e+03 R= 7e+04 -Depth= 9059 States= 1.6e+08 Transitions= 2.62e+09 Memory= 7509.299 t= 2.41e+03 R= 7e+04 -Depth= 9059 States= 1.61e+08 Transitions= 2.63e+09 Memory= 7534.201 t= 2.43e+03 R= 7e+04 -Depth= 9059 States= 1.62e+08 Transitions= 2.65e+09 Memory= 7567.600 t= 2.44e+03 R= 7e+04 -Depth= 9059 States= 1.63e+08 Transitions= 2.66e+09 Memory= 7594.846 t= 2.45e+03 R= 7e+04 -Depth= 9059 States= 1.64e+08 Transitions= 2.67e+09 Memory= 7619.455 t= 2.47e+03 R= 7e+04 -Depth= 9059 States= 1.65e+08 Transitions= 2.7e+09 Memory= 7642.502 t= 2.49e+03 R= 7e+04 -Depth= 9059 States= 1.66e+08 Transitions= 2.72e+09 Memory= 7669.260 t= 2.51e+03 R= 7e+04 -Depth= 9059 States= 1.67e+08 Transitions= 2.73e+09 Memory= 7696.799 t= 2.52e+03 R= 7e+04 -Depth= 9059 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7723.850 t= 2.54e+03 R= 7e+04 -Depth= 9059 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7757.053 t= 2.55e+03 R= 7e+04 -Depth= 9059 States= 1.7e+08 Transitions= 2.78e+09 Memory= 7782.346 t= 2.57e+03 R= 7e+04 -Depth= 9059 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7808.908 t= 2.58e+03 R= 7e+04 -Depth= 9059 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7838.791 t= 2.59e+03 R= 7e+04 -Depth= 9059 States= 1.73e+08 Transitions= 2.83e+09 Memory= 7867.893 t= 2.61e+03 R= 7e+04 -Depth= 9059 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7892.990 t= 2.62e+03 R= 7e+04 -Depth= 9059 States= 1.75e+08 Transitions= 2.86e+09 Memory= 7922.190 t= 2.64e+03 R= 7e+04 -Depth= 9059 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7945.627 t= 2.66e+03 R= 7e+04 -Depth= 9059 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7973.947 t= 2.68e+03 R= 7e+04 -Depth= 9059 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7997.483 t= 2.7e+03 R= 7e+04 -Depth= 9059 States= 1.79e+08 Transitions= 2.94e+09 Memory= 8020.920 t= 2.71e+03 R= 7e+04 -Depth= 9059 States= 1.8e+08 Transitions= 2.96e+09 Memory= 8050.412 t= 2.73e+03 R= 7e+04 -Depth= 9059 States= 1.81e+08 Transitions= 2.97e+09 Memory= 8085.666 t= 2.74e+03 R= 7e+04 -Depth= 9059 States= 1.82e+08 Transitions= 2.98e+09 Memory= 8114.279 t= 2.75e+03 R= 7e+04 -Depth= 9059 States= 1.83e+08 Transitions= 3e+09 Memory= 8137.131 t= 2.77e+03 R= 7e+04 -Depth= 9059 States= 1.84e+08 Transitions= 3.02e+09 Memory= 8165.451 t= 2.79e+03 R= 7e+04 -Depth= 9059 States= 1.85e+08 Transitions= 3.04e+09 Memory= 8193.186 t= 2.8e+03 R= 7e+04 -Depth= 9059 States= 1.86e+08 Transitions= 3.06e+09 Memory= 8218.674 t= 2.82e+03 R= 7e+04 -Depth= 9059 States= 1.87e+08 Transitions= 3.08e+09 Memory= 8255.100 t= 2.83e+03 R= 7e+04 -Depth= 9059 States= 1.88e+08 Transitions= 3.09e+09 Memory= 8279.221 t= 2.85e+03 R= 7e+04 -Depth= 9059 States= 1.89e+08 Transitions= 3.12e+09 Memory= 8298.264 t= 2.87e+03 R= 7e+04 -Depth= 9059 States= 1.9e+08 Transitions= 3.14e+09 Memory= 8325.998 t= 2.89e+03 R= 7e+04 -Depth= 9059 States= 1.91e+08 Transitions= 3.16e+09 Memory= 8349.338 t= 2.91e+03 R= 7e+04 -Depth= 9059 States= 1.92e+08 Transitions= 3.17e+09 Memory= 8379.221 t= 2.92e+03 R= 7e+04 -Depth= 9059 States= 1.93e+08 Transitions= 3.19e+09 Memory= 8403.440 t= 2.94e+03 R= 7e+04 -Depth= 9059 States= 1.94e+08 Transitions= 3.21e+09 Memory= 8430.100 t= 2.96e+03 R= 7e+04 -Depth= 9059 States= 1.95e+08 Transitions= 3.23e+09 Memory= 8455.295 t= 2.97e+03 R= 7e+04 -Depth= 9059 States= 1.96e+08 Transitions= 3.25e+09 Memory= 8482.932 t= 2.99e+03 R= 7e+04 -Depth= 9059 States= 1.97e+08 Transitions= 3.26e+09 Memory= 8515.256 t= 3e+03 R= 7e+04 -Depth= 9059 States= 1.98e+08 Transitions= 3.27e+09 Memory= 8542.502 t= 3.01e+03 R= 7e+04 -Depth= 9059 States= 1.99e+08 Transitions= 3.29e+09 Memory= 8569.260 t= 3.02e+03 R= 7e+04 -Depth= 9059 States= 2e+08 Transitions= 3.3e+09 Memory= 8598.459 t= 3.04e+03 R= 7e+04 -Depth= 9059 States= 2.01e+08 Transitions= 3.32e+09 Memory= 8624.631 t= 3.05e+03 R= 7e+04 -Depth= 9059 States= 2.02e+08 Transitions= 3.33e+09 Memory= 8652.365 t= 3.07e+03 R= 7e+04 -Depth= 9059 States= 2.03e+08 Transitions= 3.35e+09 Memory= 8678.440 t= 3.08e+03 R= 7e+04 -Depth= 9059 States= 2.04e+08 Transitions= 3.36e+09 Memory= 8706.369 t= 3.1e+03 R= 7e+04 -Depth= 9059 States= 2.05e+08 Transitions= 3.38e+09 Memory= 8732.932 t= 3.11e+03 R= 7e+04 -Depth= 9059 States= 2.06e+08 Transitions= 3.39e+09 Memory= 8760.276 t= 3.12e+03 R= 7e+04 -Depth= 9059 States= 2.07e+08 Transitions= 3.41e+09 Memory= 8789.475 t= 3.14e+03 R= 7e+04 -Depth= 9059 States= 2.08e+08 Transitions= 3.42e+09 Memory= 8819.455 t= 3.15e+03 R= 7e+04 -Depth= 9059 States= 2.09e+08 Transitions= 3.43e+09 Memory= 8851.779 t= 3.16e+03 R= 7e+04 -Depth= 9059 States= 2.1e+08 Transitions= 3.45e+09 Memory= 8880.100 t= 3.17e+03 R= 7e+04 -Depth= 9059 States= 2.11e+08 Transitions= 3.46e+09 Memory= 8907.053 t= 3.19e+03 R= 7e+04 -Depth= 9059 States= 2.12e+08 Transitions= 3.48e+09 Memory= 8932.639 t= 3.2e+03 R= 7e+04 -Depth= 9059 States= 2.13e+08 Transitions= 3.49e+09 Memory= 8964.572 t= 3.22e+03 R= 7e+04 -Depth= 9059 States= 2.14e+08 Transitions= 3.51e+09 Memory= 8991.526 t= 3.23e+03 R= 7e+04 -Depth= 9059 States= 2.15e+08 Transitions= 3.52e+09 Memory= 9018.088 t= 3.24e+03 R= 7e+04 -Depth= 9059 States= 2.16e+08 Transitions= 3.54e+09 Memory= 9039.865 t= 3.26e+03 R= 7e+04 -Depth= 9059 States= 2.17e+08 Transitions= 3.56e+09 Memory= 9067.600 t= 3.28e+03 R= 7e+04 -Depth= 9059 States= 2.18e+08 Transitions= 3.58e+09 Memory= 9094.260 t= 3.3e+03 R= 7e+04 -Depth= 9059 States= 2.19e+08 Transitions= 3.6e+09 Memory= 9122.483 t= 3.31e+03 R= 7e+04 -Depth= 9059 States= 2.2e+08 Transitions= 3.61e+09 Memory= 9153.635 t= 3.32e+03 R= 7e+04 -Depth= 9059 States= 2.21e+08 Transitions= 3.63e+09 Memory= 9181.272 t= 3.34e+03 R= 7e+04 -Depth= 9059 States= 2.22e+08 Transitions= 3.65e+09 Memory= 9207.639 t= 3.36e+03 R= 7e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 9059, errors: 0 - 88961904 states, stored (2.22145e+08 visited) -3.4291111e+09 states, matched -3.6512561e+09 transitions (= visited+matched) -1.2885947e+10 atomic steps -hash conflicts: 7.2188776e+08 (resolved) - -Stats on memory usage (in Megabytes): - 7805.343 equivalent memory usage for states (stored*(State-vector + overhead)) - 6706.219 actual memory usage for states (compression: 85.92%) - state-vector as stored = 51 byte + 28 byte overhead - 2048.000 memory used for hash table (-w28) - 457.764 memory used for DFS stack (-m10000000) - 1.122 memory lost to fragmentation - 9210.861 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 370, "(1)" - line 164, "pan.___", state 378, "(1)" - line 168, "pan.___", state 390, "(1)" - line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 449, "(1)" - line 413, "pan.___", state 462, "(1)" - line 418, "pan.___", state 479, "(1)" - line 399, "pan.___", state 498, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 647, "(1)" - line 418, "pan.___", state 664, "(1)" - line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 710, "(1)" - line 164, "pan.___", state 718, "(1)" - line 168, "pan.___", state 730, "(1)" - line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 840, "(1)" - line 164, "pan.___", state 848, "(1)" - line 168, "pan.___", state 860, "(1)" - line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 884, "(1)" - line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 885, "else" - line 399, "pan.___", state 888, "(1)" - line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 898, "(1)" - line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 899, "else" - line 403, "pan.___", state 902, "(1)" - line 403, "pan.___", state 903, "(1)" - line 403, "pan.___", state 903, "(1)" - line 401, "pan.___", state 908, "((i<1))" - line 401, "pan.___", state 908, "((i>=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1508, "(1)" - line 164, "pan.___", state 1516, "(1)" - line 168, "pan.___", state 1528, "(1)" - line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1552, "(1)" - line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1553, "else" - line 399, "pan.___", state 1556, "(1)" - line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1566, "(1)" - line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1567, "else" - line 403, "pan.___", state 1570, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 401, "pan.___", state 1576, "((i<1))" - line 401, "pan.___", state 1576, "((i>=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1811, "(1)" - line 164, "pan.___", state 1819, "(1)" - line 168, "pan.___", state 1831, "(1)" - line 702, "pan.___", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 751, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 3.36e+03 seconds -pan: rate 66138.803 states/second -pan: avg transition delay 9.1989e-07 usec -cp .input.spin urcu_progress_reader.spin.input -cp .input.spin.trail urcu_progress_reader.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.spin.input deleted file mode 100644 index 91b1126..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define READER_PROGRESS - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.spin.input.trail deleted file mode 100644 index 7c42af1..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4401 -2:4:4353 -3:4:4356 -4:4:4356 -5:4:4359 -6:4:4367 -7:4:4367 -8:4:4370 -9:4:4376 -10:4:4380 -11:4:4380 -12:4:4383 -13:4:4391 -14:4:4395 -15:4:4396 -16:0:4401 -17:4:4398 -18:0:4401 -19:3:2479 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-1255:3:4347 -1256:0:4405 -1257:3:4346 -1258:0:4405 -1259:2:1348 -1260:0:4405 -1261:3:4347 -1262:0:4405 -1263:2:1347 -1264:0:4405 -1265:3:4346 -1266:0:4405 -1267:1:104 diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.define b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.log b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.log deleted file mode 100644 index fc83245..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.log +++ /dev/null @@ -1,524 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 1194: Claim reached state 9 (line 748) -Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.64 R= 1e+05 -Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.6 R= 1e+05 -Depth= 3253 States= 3e+06 Transitions= 3.44e+07 Memory= 516.252 t= 31.6 R= 9e+04 -pan: resizing hashtable to -w22.. done -Depth= 7995 States= 4e+06 Transitions= 4.66e+07 Memory= 563.486 t= 42.8 R= 9e+04 -Depth= 7995 States= 5e+06 Transitions= 6.05e+07 Memory= 580.674 t= 55.6 R= 9e+04 -Depth= 7995 States= 6e+06 Transitions= 7.12e+07 Memory= 599.229 t= 65.5 R= 9e+04 -Depth= 7995 States= 7e+06 Transitions= 8.58e+07 Memory= 613.975 t= 78.9 R= 9e+04 -Depth= 7995 States= 8e+06 Transitions= 9.62e+07 Memory= 631.846 t= 88.7 R= 9e+04 -Depth= 7995 States= 9e+06 Transitions= 1.1e+08 Memory= 646.592 t= 101 R= 9e+04 -pan: resizing hashtable to -w24.. done -Depth= 7995 States= 1e+07 Transitions= 1.32e+08 Memory= 783.869 t= 122 R= 8e+04 -Depth= 7995 States= 1.1e+07 Transitions= 1.52e+08 Memory= 799.104 t= 140 R= 8e+04 -Depth= 7995 States= 1.2e+07 Transitions= 1.71e+08 Memory= 814.533 t= 157 R= 8e+04 -Depth= 7995 States= 1.3e+07 Transitions= 1.9e+08 Memory= 829.670 t= 174 R= 7e+04 -Depth= 7995 States= 1.4e+07 Transitions= 2.01e+08 Memory= 848.029 t= 185 R= 8e+04 -Depth= 7995 States= 1.5e+07 Transitions= 2.21e+08 Memory= 862.287 t= 203 R= 7e+04 -Depth= 7995 States= 1.6e+07 Transitions= 2.35e+08 Memory= 877.815 t= 215 R= 7e+04 -Depth= 7995 States= 1.7e+07 Transitions= 2.44e+08 Memory= 897.736 t= 223 R= 8e+04 -Depth= 7995 States= 1.8e+07 Transitions= 2.57e+08 Memory= 911.115 t= 235 R= 8e+04 -Depth= 7995 States= 1.9e+07 Transitions= 2.69e+08 Memory= 927.033 t= 246 R= 8e+04 -Depth= 8341 States= 2e+07 Transitions= 2.83e+08 Memory= 943.440 t= 259 R= 8e+04 -Depth= 8341 States= 2.1e+07 Transitions= 2.96e+08 Memory= 961.604 t= 271 R= 8e+04 -Depth= 8341 States= 2.2e+07 Transitions= 3.07e+08 Memory= 978.791 t= 281 R= 8e+04 -Depth= 8341 States= 2.3e+07 Transitions= 3.2e+08 Memory= 996.369 t= 293 R= 8e+04 -Depth= 8341 States= 2.4e+07 Transitions= 3.32e+08 Memory= 1013.264 t= 304 R= 8e+04 -Depth= 8341 States= 2.5e+07 Transitions= 3.48e+08 Memory= 1024.885 t= 319 R= 8e+04 -Depth= 8341 States= 2.6e+07 Transitions= 3.72e+08 Memory= 1038.947 t= 341 R= 8e+04 -Depth= 8341 States= 2.7e+07 Transitions= 3.91e+08 Memory= 1055.158 t= 358 R= 8e+04 -Depth= 8341 States= 2.8e+07 Transitions= 4.09e+08 Memory= 1069.904 t= 374 R= 7e+04 -Depth= 8341 States= 2.9e+07 Transitions= 4.25e+08 Memory= 1086.701 t= 389 R= 7e+04 -Depth= 8341 States= 3e+07 Transitions= 4.43e+08 Memory= 1102.131 t= 405 R= 7e+04 -Depth= 8341 States= 3.1e+07 Transitions= 4.58e+08 Memory= 1117.268 t= 419 R= 7e+04 -Depth= 8341 States= 3.2e+07 Transitions= 4.68e+08 Memory= 1136.213 t= 429 R= 7e+04 -Depth= 8341 States= 3.3e+07 Transitions= 4.8e+08 Memory= 1151.154 t= 440 R= 8e+04 -Depth= 8341 States= 3.4e+07 Transitions= 4.92e+08 Memory= 1166.779 t= 451 R= 8e+04 -pan: resizing hashtable to -w26.. done -Depth= 8687 States= 3.5e+07 Transitions= 5.05e+08 Memory= 1679.658 t= 464 R= 8e+04 -Depth= 8687 States= 3.6e+07 Transitions= 5.18e+08 Memory= 1697.432 t= 477 R= 8e+04 -Depth= 8687 States= 3.7e+07 Transitions= 5.29e+08 Memory= 1714.326 t= 487 R= 8e+04 -Depth= 8687 States= 3.8e+07 Transitions= 5.44e+08 Memory= 1730.244 t= 500 R= 8e+04 -Depth= 8687 States= 3.9e+07 Transitions= 5.55e+08 Memory= 1747.920 t= 511 R= 8e+04 -Depth= 8687 States= 4e+07 Transitions= 5.69e+08 Memory= 1761.885 t= 523 R= 8e+04 -Depth= 8687 States= 4.1e+07 Transitions= 5.92e+08 Memory= 1775.850 t= 544 R= 8e+04 -Depth= 8687 States= 4.2e+07 Transitions= 6.12e+08 Memory= 1790.498 t= 562 R= 7e+04 -Depth= 8687 States= 4.3e+07 Transitions= 6.29e+08 Memory= 1807.783 t= 578 R= 7e+04 -Depth= 8687 States= 4.4e+07 Transitions= 6.48e+08 Memory= 1822.432 t= 595 R= 7e+04 -Depth= 8687 States= 4.5e+07 Transitions= 6.61e+08 Memory= 1838.838 t= 606 R= 7e+04 -Depth= 8687 States= 4.6e+07 Transitions= 6.81e+08 Memory= 1853.291 t= 625 R= 7e+04 -Depth= 8687 States= 4.7e+07 Transitions= 6.93e+08 Memory= 1870.772 t= 635 R= 7e+04 -Depth= 8687 States= 4.8e+07 Transitions= 7.02e+08 Memory= 1889.912 t= 644 R= 7e+04 -Depth= 8687 States= 4.9e+07 Transitions= 7.15e+08 Memory= 1902.998 t= 656 R= 7e+04 -Depth= 8687 States= 5e+07 Transitions= 7.27e+08 Memory= 1919.600 t= 667 R= 7e+04 -Depth= 9033 States= 5.1e+07 Transitions= 7.42e+08 Memory= 1935.518 t= 681 R= 7e+04 -Depth= 9033 States= 5.2e+07 Transitions= 7.53e+08 Memory= 1954.170 t= 691 R= 8e+04 -Depth= 9033 States= 5.3e+07 Transitions= 7.66e+08 Memory= 1969.990 t= 703 R= 8e+04 -Depth= 9033 States= 5.4e+07 Transitions= 7.77e+08 Memory= 1988.545 t= 713 R= 8e+04 -Depth= 9033 States= 5.5e+07 Transitions= 7.9e+08 Memory= 2004.756 t= 725 R= 8e+04 -Depth= 9033 States= 5.6e+07 Transitions= 8.1e+08 Memory= 2016.084 t= 743 R= 8e+04 -Depth= 9033 States= 5.7e+07 Transitions= 8.32e+08 Memory= 2030.440 t= 763 R= 7e+04 -Depth= 9033 States= 5.8e+07 Transitions= 8.51e+08 Memory= 2046.260 t= 781 R= 7e+04 -Depth= 9033 States= 5.9e+07 Transitions= 8.7e+08 Memory= 2061.592 t= 797 R= 7e+04 -Depth= 9033 States= 6e+07 Transitions= 8.83e+08 Memory= 2078.779 t= 809 R= 7e+04 -Depth= 9033 States= 6.1e+07 Transitions= 9.01e+08 Memory= 2094.014 t= 826 R= 7e+04 -Depth= 9033 States= 6.2e+07 Transitions= 9.16e+08 Memory= 2108.467 t= 840 R= 7e+04 -Depth= 9033 States= 6.3e+07 Transitions= 9.26e+08 Memory= 2126.924 t= 849 R= 7e+04 -Depth= 9033 States= 6.4e+07 Transitions= 9.38e+08 Memory= 2142.158 t= 860 R= 7e+04 -Depth= 9033 States= 6.5e+07 Transitions= 9.51e+08 Memory= 2157.295 t= 871 R= 7e+04 -Depth= 9379 States= 6.6e+07 Transitions= 9.63e+08 Memory= 2173.115 t= 883 R= 7e+04 -Depth= 9379 States= 6.7e+07 Transitions= 9.77e+08 Memory= 2190.401 t= 895 R= 7e+04 -Depth= 9379 States= 6.8e+07 Transitions= 9.88e+08 Memory= 2208.955 t= 905 R= 8e+04 -Depth= 9379 States= 6.9e+07 Transitions= 1e+09 Memory= 2223.311 t= 919 R= 8e+04 -Depth= 9379 States= 7e+07 Transitions= 1.01e+09 Memory= 2242.256 t= 928 R= 8e+04 -Depth= 9379 States= 7.1e+07 Transitions= 1.03e+09 Memory= 2257.295 t= 940 R= 8e+04 -Depth= 9379 States= 7.2e+07 Transitions= 1.05e+09 Memory= 2269.307 t= 960 R= 8e+04 -Depth= 9379 States= 7.3e+07 Transitions= 1.07e+09 Memory= 2283.760 t= 979 R= 7e+04 -Depth= 9379 States= 7.4e+07 Transitions= 1.09e+09 Memory= 2299.385 t= 996 R= 7e+04 -Depth= 9379 States= 7.5e+07 Transitions= 1.11e+09 Memory= 2314.619 t= 1.01e+03 R= 7e+04 -Depth= 9379 States= 7.6e+07 Transitions= 1.12e+09 Memory= 2333.369 t= 1.02e+03 R= 7e+04 -Depth= 9379 States= 7.7e+07 Transitions= 1.14e+09 Memory= 2347.139 t= 1.04e+03 R= 7e+04 -Depth= 9379 States= 7.8e+07 Transitions= 1.15e+09 Memory= 2385.029 t= 1.06e+03 R= 7e+04 -Depth= 9379 States= 7.9e+07 Transitions= 1.17e+09 Memory= 2453.682 t= 1.07e+03 R= 7e+04 -Depth= 9379 States= 8e+07 Transitions= 1.18e+09 Memory= 2522.236 t= 1.08e+03 R= 7e+04 -Depth= 9379 States= 8.1e+07 Transitions= 1.2e+09 Memory= 2590.889 t= 1.1e+03 R= 7e+04 -Depth= 9379 States= 8.2e+07 Transitions= 1.22e+09 Memory= 2624.287 t= 1.12e+03 R= 7e+04 -Depth= 9379 States= 8.3e+07 Transitions= 1.23e+09 Memory= 2640.303 t= 1.13e+03 R= 7e+04 -Depth= 9379 States= 8.4e+07 Transitions= 1.25e+09 Memory= 2654.170 t= 1.15e+03 R= 7e+04 -Depth= 9379 States= 8.5e+07 Transitions= 1.27e+09 Memory= 2669.111 t= 1.16e+03 R= 7e+04 -Depth= 9379 States= 8.6e+07 Transitions= 1.29e+09 Memory= 2684.053 t= 1.18e+03 R= 7e+04 -Depth= 9379 States= 8.7e+07 Transitions= 1.31e+09 Memory= 2698.604 t= 1.2e+03 R= 7e+04 -Depth= 9379 States= 8.8e+07 Transitions= 1.33e+09 Memory= 2719.697 t= 1.22e+03 R= 7e+04 -Depth= 9379 States= 8.9e+07 Transitions= 1.35e+09 Memory= 2788.350 t= 1.24e+03 R= 7e+04 -Depth= 9379 States= 9e+07 Transitions= 1.37e+09 Memory= 2819.990 t= 1.26e+03 R= 7e+04 -Depth= 9379 States= 9.1e+07 Transitions= 1.39e+09 Memory= 2846.553 t= 1.27e+03 R= 7e+04 -Depth= 9379 States= 9.2e+07 Transitions= 1.4e+09 Memory= 2864.912 t= 1.28e+03 R= 7e+04 -Depth= 9379 States= 9.3e+07 Transitions= 1.41e+09 Memory= 2877.901 t= 1.3e+03 R= 7e+04 -Depth= 9379 States= 9.4e+07 Transitions= 1.44e+09 Memory= 2892.842 t= 1.31e+03 R= 7e+04 -Depth= 9379 States= 9.5e+07 Transitions= 1.45e+09 Memory= 2908.076 t= 1.33e+03 R= 7e+04 -Depth= 9379 States= 9.6e+07 Transitions= 1.47e+09 Memory= 2922.627 t= 1.35e+03 R= 7e+04 -Depth= 9379 States= 9.7e+07 Transitions= 1.49e+09 Memory= 2940.693 t= 1.36e+03 R= 7e+04 -Depth= 9379 States= 9.8e+07 Transitions= 1.51e+09 Memory= 2953.291 t= 1.38e+03 R= 7e+04 -Depth= 9379 States= 9.9e+07 Transitions= 1.53e+09 Memory= 2968.526 t= 1.4e+03 R= 7e+04 -Depth= 9379 States= 1e+08 Transitions= 1.56e+09 Memory= 2981.709 t= 1.42e+03 R= 7e+04 -Depth= 9379 States= 1.01e+08 Transitions= 1.57e+09 Memory= 2997.236 t= 1.44e+03 R= 7e+04 -Depth= 9379 States= 1.02e+08 Transitions= 1.59e+09 Memory= 3011.592 t= 1.46e+03 R= 7e+04 -Depth= 9379 States= 1.03e+08 Transitions= 1.61e+09 Memory= 3037.861 t= 1.47e+03 R= 7e+04 -Depth= 9379 States= 1.04e+08 Transitions= 1.63e+09 Memory= 3106.514 t= 1.49e+03 R= 7e+04 -Depth= 9379 States= 1.05e+08 Transitions= 1.65e+09 Memory= 3175.166 t= 1.51e+03 R= 7e+04 -Depth= 9379 States= 1.06e+08 Transitions= 1.67e+09 Memory= 3223.897 t= 1.52e+03 R= 7e+04 -Depth= 9379 States= 1.07e+08 Transitions= 1.68e+09 Memory= 3246.846 t= 1.54e+03 R= 7e+04 -Depth= 9379 States= 1.08e+08 Transitions= 1.7e+09 Memory= 3283.467 t= 1.56e+03 R= 7e+04 -Depth= 9379 States= 1.09e+08 Transitions= 1.72e+09 Memory= 3316.670 t= 1.57e+03 R= 7e+04 -Depth= 9379 States= 1.1e+08 Transitions= 1.73e+09 Memory= 3344.209 t= 1.59e+03 R= 7e+04 -Depth= 9379 States= 1.11e+08 Transitions= 1.75e+09 Memory= 3376.338 t= 1.6e+03 R= 7e+04 -Depth= 9379 States= 1.12e+08 Transitions= 1.76e+09 Memory= 3396.943 t= 1.62e+03 R= 7e+04 -Depth= 9379 States= 1.13e+08 Transitions= 1.78e+09 Memory= 3426.143 t= 1.63e+03 R= 7e+04 -Depth= 9379 States= 1.14e+08 Transitions= 1.8e+09 Memory= 3452.705 t= 1.65e+03 R= 7e+04 -Depth= 9379 States= 1.15e+08 Transitions= 1.81e+09 Memory= 3493.818 t= 1.66e+03 R= 7e+04 -Depth= 9379 States= 1.16e+08 Transitions= 1.83e+09 Memory= 3533.369 t= 1.67e+03 R= 7e+04 -Depth= 9379 States= 1.17e+08 Transitions= 1.84e+09 Memory= 3566.182 t= 1.69e+03 R= 7e+04 -Depth= 9379 States= 1.18e+08 Transitions= 1.86e+09 Memory= 3582.881 t= 1.7e+03 R= 7e+04 -Depth= 9379 States= 1.19e+08 Transitions= 1.88e+09 Memory= 3630.830 t= 1.72e+03 R= 7e+04 -Depth= 9379 States= 1.2e+08 Transitions= 1.89e+09 Memory= 3692.744 t= 1.74e+03 R= 7e+04 -Depth= 9379 States= 1.21e+08 Transitions= 1.91e+09 Memory= 3750.361 t= 1.75e+03 R= 7e+04 -Depth= 9379 States= 1.22e+08 Transitions= 1.92e+09 Memory= 3767.354 t= 1.76e+03 R= 7e+04 -Depth= 9379 States= 1.23e+08 Transitions= 1.94e+09 Memory= 3781.904 t= 1.78e+03 R= 7e+04 -Depth= 9379 States= 1.24e+08 Transitions= 1.96e+09 Memory= 3797.529 t= 1.8e+03 R= 7e+04 -Depth= 9379 States= 1.25e+08 Transitions= 1.98e+09 Memory= 3810.908 t= 1.82e+03 R= 7e+04 -Depth= 9379 States= 1.26e+08 Transitions= 2e+09 Memory= 3826.143 t= 1.83e+03 R= 7e+04 -Depth= 9379 States= 1.27e+08 Transitions= 2.02e+09 Memory= 3839.717 t= 1.86e+03 R= 7e+04 -Depth= 9379 States= 1.28e+08 Transitions= 2.04e+09 Memory= 3881.709 t= 1.87e+03 R= 7e+04 -Depth= 9379 States= 1.29e+08 Transitions= 2.06e+09 Memory= 3946.553 t= 1.89e+03 R= 7e+04 -Depth= 9379 States= 1.3e+08 Transitions= 2.08e+09 Memory= 3970.479 t= 1.91e+03 R= 7e+04 -Depth= 9379 States= 1.31e+08 Transitions= 2.09e+09 Memory= 3991.768 t= 1.92e+03 R= 7e+04 -Depth= 9379 States= 1.32e+08 Transitions= 2.1e+09 Memory= 4007.490 t= 1.93e+03 R= 7e+04 -Depth= 9379 States= 1.33e+08 Transitions= 2.13e+09 Memory= 4020.772 t= 1.95e+03 R= 7e+04 -Depth= 9379 States= 1.34e+08 Transitions= 2.14e+09 Memory= 4036.201 t= 1.97e+03 R= 7e+04 -Depth= 9379 States= 1.35e+08 Transitions= 2.16e+09 Memory= 4051.924 t= 1.98e+03 R= 7e+04 -pan: resizing hashtable to -w28.. done -Depth= 9379 States= 1.36e+08 Transitions= 2.18e+09 Memory= 6099.924 t= 2.02e+03 R= 7e+04 -Depth= 9379 States= 1.37e+08 Transitions= 2.2e+09 Memory= 6099.924 t= 2.03e+03 R= 7e+04 -Depth= 9379 States= 1.38e+08 Transitions= 2.22e+09 Memory= 6099.924 t= 2.05e+03 R= 7e+04 -Depth= 9379 States= 1.39e+08 Transitions= 2.24e+09 Memory= 6099.924 t= 2.07e+03 R= 7e+04 -Depth= 9379 States= 1.4e+08 Transitions= 2.26e+09 Memory= 6108.518 t= 2.09e+03 R= 7e+04 -Depth= 9379 States= 1.41e+08 Transitions= 2.28e+09 Memory= 6124.729 t= 2.1e+03 R= 7e+04 -Depth= 9379 States= 1.42e+08 Transitions= 2.3e+09 Memory= 6138.889 t= 2.12e+03 R= 7e+04 -Depth= 9379 States= 1.43e+08 Transitions= 2.31e+09 Memory= 6178.928 t= 2.13e+03 R= 7e+04 -Depth= 9379 States= 1.44e+08 Transitions= 2.33e+09 Memory= 6247.483 t= 2.15e+03 R= 7e+04 -Depth= 9379 States= 1.45e+08 Transitions= 2.35e+09 Memory= 6316.135 t= 2.17e+03 R= 7e+04 -Depth= 9379 States= 1.46e+08 Transitions= 2.37e+09 Memory= 6353.440 t= 2.19e+03 R= 7e+04 -Depth= 9379 States= 1.47e+08 Transitions= 2.39e+09 Memory= 6381.662 t= 2.21e+03 R= 7e+04 -Depth= 9379 States= 1.48e+08 Transitions= 2.41e+09 Memory= 6422.190 t= 2.22e+03 R= 7e+04 -Depth= 9379 States= 1.49e+08 Transitions= 2.42e+09 Memory= 6449.143 t= 2.23e+03 R= 7e+04 -Depth= 9379 States= 1.5e+08 Transitions= 2.44e+09 Memory= 6472.580 t= 2.25e+03 R= 7e+04 -Depth= 9379 States= 1.51e+08 Transitions= 2.45e+09 Memory= 6503.733 t= 2.26e+03 R= 7e+04 -Depth= 9379 States= 1.52e+08 Transitions= 2.47e+09 Memory= 6531.369 t= 2.28e+03 R= 7e+04 -Depth= 9379 States= 1.53e+08 Transitions= 2.49e+09 Memory= 6554.123 t= 2.29e+03 R= 7e+04 -Depth= 9379 States= 1.54e+08 Transitions= 2.5e+09 Memory= 6585.373 t= 2.31e+03 R= 7e+04 -Depth= 9379 States= 1.55e+08 Transitions= 2.52e+09 Memory= 6622.776 t= 2.32e+03 R= 7e+04 -Depth= 9379 States= 1.56e+08 Transitions= 2.54e+09 Memory= 6671.213 t= 2.34e+03 R= 7e+04 -Depth= 9379 States= 1.57e+08 Transitions= 2.55e+09 Memory= 6696.115 t= 2.35e+03 R= 7e+04 -Depth= 9379 States= 1.58e+08 Transitions= 2.57e+09 Memory= 6722.776 t= 2.37e+03 R= 7e+04 -Depth= 9379 States= 1.59e+08 Transitions= 2.58e+09 Memory= 6764.572 t= 2.38e+03 R= 7e+04 -Depth= 9379 States= 1.6e+08 Transitions= 2.6e+09 Memory= 6830.490 t= 2.4e+03 R= 7e+04 -Depth= 9379 States= 1.61e+08 Transitions= 2.62e+09 Memory= 6879.026 t= 2.41e+03 R= 7e+04 -Depth= 9379 States= 1.62e+08 Transitions= 2.63e+09 Memory= 6895.432 t= 2.42e+03 R= 7e+04 -Depth= 9379 States= 1.63e+08 Transitions= 2.65e+09 Memory= 6909.787 t= 2.44e+03 R= 7e+04 -Depth= 9379 States= 1.64e+08 Transitions= 2.67e+09 Memory= 6925.217 t= 2.46e+03 R= 7e+04 -Depth= 9379 States= 1.65e+08 Transitions= 2.69e+09 Memory= 6938.986 t= 2.48e+03 R= 7e+04 -Depth= 9379 States= 1.66e+08 Transitions= 2.71e+09 Memory= 6953.537 t= 2.5e+03 R= 7e+04 -Depth= 9379 States= 1.67e+08 Transitions= 2.73e+09 Memory= 6967.893 t= 2.52e+03 R= 7e+04 -Depth= 9379 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7022.190 t= 2.53e+03 R= 7e+04 -Depth= 9379 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7076.779 t= 2.55e+03 R= 7e+04 -Depth= 9379 States= 1.7e+08 Transitions= 2.79e+09 Memory= 7102.365 t= 2.57e+03 R= 7e+04 -Depth= 9379 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7119.162 t= 2.58e+03 R= 7e+04 -Depth= 9379 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7135.178 t= 2.59e+03 R= 7e+04 -Depth= 9379 States= 1.73e+08 Transitions= 2.84e+09 Memory= 7150.022 t= 2.61e+03 R= 7e+04 -Depth= 9379 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7164.475 t= 2.63e+03 R= 7e+04 -Depth= 9379 States= 1.75e+08 Transitions= 2.87e+09 Memory= 7180.295 t= 2.64e+03 R= 7e+04 -Depth= 9379 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7198.264 t= 2.66e+03 R= 7e+04 -Depth= 9379 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7211.447 t= 2.67e+03 R= 7e+04 -Depth= 9379 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7224.338 t= 2.7e+03 R= 7e+04 -Depth= 9379 States= 1.79e+08 Transitions= 2.95e+09 Memory= 7239.084 t= 2.72e+03 R= 7e+04 -Depth= 9379 States= 1.8e+08 Transitions= 2.97e+09 Memory= 7253.342 t= 2.74e+03 R= 7e+04 -Depth= 9379 States= 1.81e+08 Transitions= 2.99e+09 Memory= 7268.283 t= 2.75e+03 R= 7e+04 -Depth= 9379 States= 1.82e+08 Transitions= 3.01e+09 Memory= 7283.615 t= 2.77e+03 R= 7e+04 -Depth= 9379 States= 1.83e+08 Transitions= 3.02e+09 Memory= 7335.276 t= 2.78e+03 R= 7e+04 -Depth= 9379 States= 1.84e+08 Transitions= 3.04e+09 Memory= 7403.928 t= 2.8e+03 R= 7e+04 -Depth= 9379 States= 1.85e+08 Transitions= 3.06e+09 Memory= 7472.580 t= 2.82e+03 R= 7e+04 -Depth= 9379 States= 1.86e+08 Transitions= 3.08e+09 Memory= 7501.877 t= 2.84e+03 R= 7e+04 -Depth= 9379 States= 1.87e+08 Transitions= 3.1e+09 Memory= 7528.147 t= 2.85e+03 R= 7e+04 -Depth= 9379 States= 1.88e+08 Transitions= 3.11e+09 Memory= 7566.135 t= 2.87e+03 R= 7e+04 -Depth= 9379 States= 1.89e+08 Transitions= 3.13e+09 Memory= 7593.479 t= 2.88e+03 R= 7e+04 -Depth= 9379 States= 1.9e+08 Transitions= 3.15e+09 Memory= 7625.119 t= 2.9e+03 R= 7e+04 -Depth= 9379 States= 1.91e+08 Transitions= 3.16e+09 Memory= 7647.483 t= 2.91e+03 R= 7e+04 -Depth= 9379 States= 1.92e+08 Transitions= 3.18e+09 Memory= 7677.951 t= 2.93e+03 R= 7e+04 -Depth= 9379 States= 1.93e+08 Transitions= 3.2e+09 Memory= 7698.947 t= 2.94e+03 R= 7e+04 -Depth= 9379 States= 1.94e+08 Transitions= 3.21e+09 Memory= 7732.443 t= 2.96e+03 R= 7e+04 -Depth= 9379 States= 1.95e+08 Transitions= 3.23e+09 Memory= 7772.092 t= 2.97e+03 R= 7e+04 -Depth= 9379 States= 1.96e+08 Transitions= 3.24e+09 Memory= 7815.451 t= 2.98e+03 R= 7e+04 -Depth= 9379 States= 1.97e+08 Transitions= 3.26e+09 Memory= 7839.865 t= 3e+03 R= 7e+04 -Depth= 9379 States= 1.98e+08 Transitions= 3.28e+09 Memory= 7869.651 t= 3.01e+03 R= 7e+04 -Depth= 9379 States= 1.99e+08 Transitions= 3.29e+09 Memory= 7921.018 t= 3.03e+03 R= 7e+04 -Depth= 9379 States= 2e+08 Transitions= 3.31e+09 Memory= 7986.740 t= 3.05e+03 R= 7e+04 -Depth= 9379 States= 2.01e+08 Transitions= 3.33e+09 Memory= 8023.752 t= 3.06e+03 R= 7e+04 -Depth= 9379 States= 2.02e+08 Transitions= 3.34e+09 Memory= 8039.768 t= 3.07e+03 R= 7e+04 -Depth= 9379 States= 2.03e+08 Transitions= 3.36e+09 Memory= 8053.830 t= 3.09e+03 R= 7e+04 -Depth= 9379 States= 2.04e+08 Transitions= 3.38e+09 Memory= 8068.772 t= 3.11e+03 R= 7e+04 -Depth= 9379 States= 2.05e+08 Transitions= 3.4e+09 Memory= 8083.127 t= 3.13e+03 R= 7e+04 -Depth= 9379 States= 2.06e+08 Transitions= 3.42e+09 Memory= 8098.068 t= 3.15e+03 R= 7e+04 -Depth= 9379 States= 2.07e+08 Transitions= 3.44e+09 Memory= 8115.744 t= 3.16e+03 R= 7e+04 -Depth= 9379 States= 2.08e+08 Transitions= 3.46e+09 Memory= 8178.537 t= 3.18e+03 R= 7e+04 -Depth= 9379 States= 2.09e+08 Transitions= 3.48e+09 Memory= 8220.627 t= 3.2e+03 R= 7e+04 -Depth= 9379 States= 2.1e+08 Transitions= 3.49e+09 Memory= 8246.799 t= 3.21e+03 R= 7e+04 -Depth= 9379 States= 2.11e+08 Transitions= 3.5e+09 Memory= 8263.791 t= 3.22e+03 R= 7e+04 -Depth= 9379 States= 2.12e+08 Transitions= 3.52e+09 Memory= 8279.514 t= 3.24e+03 R= 7e+04 -Depth= 9379 States= 2.13e+08 Transitions= 3.54e+09 Memory= 8293.772 t= 3.26e+03 R= 7e+04 -Depth= 9379 States= 2.14e+08 Transitions= 3.56e+09 Memory= 8309.201 t= 3.28e+03 R= 7e+04 -Depth= 9379 States= 2.15e+08 Transitions= 3.58e+09 Memory= 8323.752 t= 3.29e+03 R= 7e+04 -Depth= 9379 States= 2.16e+08 Transitions= 3.6e+09 Memory= 8342.990 t= 3.31e+03 R= 7e+04 -Depth= 9379 States= 2.17e+08 Transitions= 3.61e+09 Memory= 8355.197 t= 3.32e+03 R= 7e+04 -Depth= 9379 States= 2.18e+08 Transitions= 3.64e+09 Memory= 8368.674 t= 3.35e+03 R= 7e+04 -Depth= 9379 States= 2.19e+08 Transitions= 3.66e+09 Memory= 8382.932 t= 3.37e+03 R= 7e+04 -Depth= 9379 States= 2.2e+08 Transitions= 3.68e+09 Memory= 8398.459 t= 3.38e+03 R= 7e+04 -Depth= 9379 States= 2.21e+08 Transitions= 3.7e+09 Memory= 8412.912 t= 3.4e+03 R= 6e+04 -Depth= 9379 States= 2.22e+08 Transitions= 3.71e+09 Memory= 8428.244 t= 3.42e+03 R= 6e+04 -Depth= 9379 States= 2.23e+08 Transitions= 3.73e+09 Memory= 8491.721 t= 3.43e+03 R= 6e+04 -Depth= 9379 States= 2.24e+08 Transitions= 3.75e+09 Memory= 8560.373 t= 3.45e+03 R= 6e+04 -Depth= 9379 States= 2.25e+08 Transitions= 3.77e+09 Memory= 8621.604 t= 3.47e+03 R= 6e+04 -Depth= 9379 States= 2.26e+08 Transitions= 3.79e+09 Memory= 8648.850 t= 3.48e+03 R= 6e+04 -Depth= 9379 States= 2.27e+08 Transitions= 3.81e+09 Memory= 8671.994 t= 3.5e+03 R= 6e+04 -Depth= 9379 States= 2.28e+08 Transitions= 3.82e+09 Memory= 8710.861 t= 3.51e+03 R= 6e+04 -Depth= 9379 States= 2.29e+08 Transitions= 3.84e+09 Memory= 8742.893 t= 3.53e+03 R= 6e+04 -Depth= 9379 States= 2.3e+08 Transitions= 3.85e+09 Memory= 8771.799 t= 3.54e+03 R= 6e+04 -Depth= 9379 States= 2.31e+08 Transitions= 3.87e+09 Memory= 8792.600 t= 3.56e+03 R= 6e+04 -Depth= 9379 States= 2.32e+08 Transitions= 3.89e+09 Memory= 8828.733 t= 3.57e+03 R= 6e+04 -Depth= 9379 States= 2.33e+08 Transitions= 3.9e+09 Memory= 8843.869 t= 3.59e+03 R= 6e+04 -Depth= 9379 States= 2.34e+08 Transitions= 3.92e+09 Memory= 8884.787 t= 3.6e+03 R= 6e+04 -Depth= 9379 States= 2.35e+08 Transitions= 3.93e+09 Memory= 8924.240 t= 3.62e+03 R= 6e+04 -Depth= 9379 States= 2.36e+08 Transitions= 3.95e+09 Memory= 8960.276 t= 3.63e+03 R= 6e+04 -Depth= 9379 States= 2.37e+08 Transitions= 3.97e+09 Memory= 8984.494 t= 3.65e+03 R= 6e+04 -Depth= 9379 States= 2.38e+08 Transitions= 3.98e+09 Memory= 9016.428 t= 3.66e+03 R= 6e+04 -Depth= 9379 States= 2.39e+08 Transitions= 4e+09 Memory= 9077.365 t= 3.68e+03 R= 6e+04 -Depth= 9379 States= 2.4e+08 Transitions= 4.02e+09 Memory= 9143.088 t= 3.7e+03 R= 6e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 9379, errors: 0 - 88114592 states, stored (2.40192e+08 visited) -3.782223e+09 states, matched -4.0224152e+09 transitions (= visited+matched) -1.4282782e+10 atomic steps -hash conflicts: 5.384059e+08 (resolved) - -Stats on memory usage (in Megabytes): - 7731.001 equivalent memory usage for states (stored*(State-vector + overhead)) - 6648.180 actual memory usage for states (compression: 85.99%) - state-vector as stored = 51 byte + 28 byte overhead - 2048.000 memory used for hash table (-w28) - 457.764 memory used for DFS stack (-m10000000) - 1.188 memory lost to fragmentation - 9152.756 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 256, "(1)" - line 418, "pan.___", state 286, "(1)" - line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 395, "(1)" - line 418, "pan.___", state 425, "(1)" - line 540, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 70, "(1)" - line 418, "pan.___", state 100, "(1)" - line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 158, "(1)" - line 418, "pan.___", state 188, "(1)" - line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 247, "(1)" - line 418, "pan.___", state 277, "(1)" - line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 359, "(1)" - line 418, "pan.___", state 389, "(1)" - line 614, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 370, "(1)" - line 164, "pan.___", state 378, "(1)" - line 168, "pan.___", state 390, "(1)" - line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 449, "(1)" - line 413, "pan.___", state 462, "(1)" - line 418, "pan.___", state 479, "(1)" - line 399, "pan.___", state 498, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 647, "(1)" - line 418, "pan.___", state 664, "(1)" - line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 710, "(1)" - line 164, "pan.___", state 718, "(1)" - line 168, "pan.___", state 730, "(1)" - line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 840, "(1)" - line 164, "pan.___", state 848, "(1)" - line 168, "pan.___", state 860, "(1)" - line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 884, "(1)" - line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 885, "else" - line 399, "pan.___", state 888, "(1)" - line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 898, "(1)" - line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 899, "else" - line 403, "pan.___", state 902, "(1)" - line 403, "pan.___", state 903, "(1)" - line 403, "pan.___", state 903, "(1)" - line 401, "pan.___", state 908, "((i<1))" - line 401, "pan.___", state 908, "((i>=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1508, "(1)" - line 164, "pan.___", state 1516, "(1)" - line 168, "pan.___", state 1528, "(1)" - line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1552, "(1)" - line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 399, "pan.___", state 1553, "else" - line 399, "pan.___", state 1556, "(1)" - line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1566, "(1)" - line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 403, "pan.___", state 1567, "else" - line 403, "pan.___", state 1570, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 403, "pan.___", state 1571, "(1)" - line 401, "pan.___", state 1576, "((i<1))" - line 401, "pan.___", state 1576, "((i>=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 160, "pan.___", state 1811, "(1)" - line 164, "pan.___", state 1819, "(1)" - line 168, "pan.___", state 1831, "(1)" - line 702, "pan.___", state 1856, "-end-" - (158 of 1856 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 751, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 3.7e+03 seconds -pan: rate 64918.749 states/second -pan: avg transition delay 9.1982e-07 usec -cp .input.spin urcu_progress_writer.spin.input -cp .input.spin.trail urcu_progress_writer.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.spin.input deleted file mode 100644 index 43221e7..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define WRITER_PROGRESS - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.define b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.log b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.log deleted file mode 100644 index f870a6e..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.log +++ /dev/null @@ -1,535 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -depth 15: Claim reached state 9 (line 750) -depth 1194: Claim reached state 9 (line 749) -Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.57 R= 1e+05 -Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.5 R= 1e+05 -pan: acceptance cycle (at depth 1938) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 64 byte, depth reached 23684, errors: 1 - 682672 states, stored (2.81536e+06 visited) - 30226122 states, matched - 33041487 transitions (= visited+matched) -1.1631626e+08 atomic steps -hash conflicts: 6056013 (resolved) - -Stats on memory usage (in Megabytes): - 59.896 equivalent memory usage for states (stored*(State-vector + overhead)) - 47.456 actual memory usage for states (compression: 79.23%) - state-vector as stored = 45 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 513.127 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 256, "(1)" - line 419, "pan.___", state 286, "(1)" - line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 395, "(1)" - line 419, "pan.___", state 425, "(1)" - line 541, "pan.___", state 456, "-end-" - (17 of 456 states) -unreached in proctype urcu_reader_sig - line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 70, "(1)" - line 419, "pan.___", state 100, "(1)" - line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 158, "(1)" - line 419, "pan.___", state 188, "(1)" - line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 247, "(1)" - line 419, "pan.___", state 277, "(1)" - line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 359, "(1)" - line 419, "pan.___", state 389, "(1)" - line 615, "pan.___", state 411, "-end-" - (17 of 411 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 402, "pan.___", state 134, "((i<1))" - line 402, "pan.___", state 134, "((i>=1))" - line 410, "pan.___", state 153, "(1)" - line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 154, "else" - line 410, "pan.___", state 157, "(1)" - line 410, "pan.___", state 158, "(1)" - line 410, "pan.___", state 158, "(1)" - line 414, "pan.___", state 166, "(1)" - line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 167, "else" - line 414, "pan.___", state 170, "(1)" - line 414, "pan.___", state 171, "(1)" - line 414, "pan.___", state 171, "(1)" - line 412, "pan.___", state 176, "((i<1))" - line 412, "pan.___", state 176, "((i>=1))" - line 419, "pan.___", state 183, "(1)" - line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 184, "else" - line 419, "pan.___", state 187, "(1)" - line 419, "pan.___", state 188, "(1)" - line 419, "pan.___", state 188, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 370, "pan.___", state 193, "(1)" - line 653, "pan.___", state 199, "(1)" - line 647, "pan.___", state 202, "((write_lock==0))" - line 647, "pan.___", state 202, "else" - line 645, "pan.___", state 203, "(1)" - line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, "pan.___", state 225, "((j<1))" - line 178, "pan.___", state 225, "((j>=1))" - line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 240, "(1)" - line 165, "pan.___", state 248, "(1)" - line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 165, "pan.___", state 249, "else" - line 163, "pan.___", state 254, "((j<1))" - line 163, "pan.___", state 254, "((j>=1))" - line 169, "pan.___", state 260, "(1)" - line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 169, "pan.___", state 261, "else" - line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 171, "pan.___", state 264, "else" - line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 169, "pan.___", state 323, "(1)" - line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 178, "pan.___", state 355, "((j<1))" - line 178, "pan.___", state 355, "((j>=1))" - line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 370, "(1)" - line 165, "pan.___", state 378, "(1)" - line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 165, "pan.___", state 379, "else" - line 163, "pan.___", state 384, "((j<1))" - line 163, "pan.___", state 384, "((j>=1))" - line 169, "pan.___", state 390, "(1)" - line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 169, "pan.___", state 391, "else" - line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 171, "pan.___", state 394, "else" - line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 410, "(1)" - line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 424, "(1)" - line 404, "pan.___", state 425, "(1)" - line 404, "pan.___", state 425, "(1)" - line 402, "pan.___", state 430, "((i<1))" - line 402, "pan.___", state 430, "((i>=1))" - line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 449, "(1)" - line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 450, "else" - line 410, "pan.___", state 453, "(1)" - line 410, "pan.___", state 454, "(1)" - line 410, "pan.___", state 454, "(1)" - line 414, "pan.___", state 462, "(1)" - line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 463, "else" - line 414, "pan.___", state 466, "(1)" - line 414, "pan.___", state 467, "(1)" - line 414, "pan.___", state 467, "(1)" - line 412, "pan.___", state 472, "((i<1))" - line 412, "pan.___", state 472, "((i>=1))" - line 419, "pan.___", state 479, "(1)" - line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 480, "else" - line 419, "pan.___", state 483, "(1)" - line 419, "pan.___", state 484, "(1)" - line 419, "pan.___", state 484, "(1)" - line 421, "pan.___", state 487, "(1)" - line 421, "pan.___", state 487, "(1)" - line 370, "pan.___", state 489, "(1)" - line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )] = (tmp^(1<<7))" - line 400, "pan.___", state 498, "(1)" - line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 499, "else" - line 400, "pan.___", state 502, "(1)" - line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 516, "(1)" - line 404, "pan.___", state 517, "(1)" - line 404, "pan.___", state 517, "(1)" - line 402, "pan.___", state 522, "((i<1))" - line 402, "pan.___", state 522, "((i>=1))" - line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 541, "(1)" - line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 542, "else" - line 410, "pan.___", state 545, "(1)" - line 410, "pan.___", state 546, "(1)" - line 410, "pan.___", state 546, "(1)" - line 414, "pan.___", state 554, "(1)" - line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 555, "else" - line 414, "pan.___", state 558, "(1)" - line 414, "pan.___", state 559, "(1)" - line 414, "pan.___", state 559, "(1)" - line 412, "pan.___", state 564, "((i<1))" - line 412, "pan.___", state 564, "((i>=1))" - line 419, "pan.___", state 571, "(1)" - line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 572, "else" - line 419, "pan.___", state 575, "(1)" - line 419, "pan.___", state 576, "(1)" - line 419, "pan.___", state 576, "(1)" - line 421, "pan.___", state 579, "(1)" - line 421, "pan.___", state 579, "(1)" - line 370, "pan.___", state 581, "(1)" - line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 595, "(1)" - line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 609, "(1)" - line 404, "pan.___", state 610, "(1)" - line 404, "pan.___", state 610, "(1)" - line 402, "pan.___", state 615, "((i<1))" - line 402, "pan.___", state 615, "((i>=1))" - line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 634, "(1)" - line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 635, "else" - line 410, "pan.___", state 638, "(1)" - line 410, "pan.___", state 639, "(1)" - line 410, "pan.___", state 639, "(1)" - line 414, "pan.___", state 647, "(1)" - line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 648, "else" - line 414, "pan.___", state 651, "(1)" - line 414, "pan.___", state 652, "(1)" - line 414, "pan.___", state 652, "(1)" - line 412, "pan.___", state 657, "((i<1))" - line 412, "pan.___", state 657, "((i>=1))" - line 419, "pan.___", state 664, "(1)" - line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 665, "else" - line 419, "pan.___", state 668, "(1)" - line 419, "pan.___", state 669, "(1)" - line 419, "pan.___", state 669, "(1)" - line 421, "pan.___", state 672, "(1)" - line 421, "pan.___", state 672, "(1)" - line 370, "pan.___", state 674, "(1)" - line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 681, "(1)" - line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 682, "else" - line 400, "pan.___", state 685, "(1)" - line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 695, "(1)" - line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 696, "else" - line 404, "pan.___", state 699, "(1)" - line 404, "pan.___", state 700, "(1)" - line 404, "pan.___", state 700, "(1)" - line 402, "pan.___", state 705, "((i<1))" - line 402, "pan.___", state 705, "((i>=1))" - line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 724, "(1)" - line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 725, "else" - line 410, "pan.___", state 728, "(1)" - line 410, "pan.___", state 729, "(1)" - line 410, "pan.___", state 729, "(1)" - line 414, "pan.___", state 737, "(1)" - line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 738, "else" - line 414, "pan.___", state 741, "(1)" - line 414, "pan.___", state 742, "(1)" - line 414, "pan.___", state 742, "(1)" - line 412, "pan.___", state 747, "((i<1))" - line 412, "pan.___", state 747, "((i>=1))" - line 419, "pan.___", state 754, "(1)" - line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 755, "else" - line 419, "pan.___", state 758, "(1)" - line 419, "pan.___", state 759, "(1)" - line 419, "pan.___", state 759, "(1)" - line 421, "pan.___", state 762, "(1)" - line 421, "pan.___", state 762, "(1)" - line 370, "pan.___", state 764, "(1)" - line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )])&(1<<7))))" - line 430, "pan.___", state 767, "else" - line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 779, "(1)" - line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 780, "else" - line 400, "pan.___", state 783, "(1)" - line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 793, "(1)" - line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 794, "else" - line 404, "pan.___", state 797, "(1)" - line 404, "pan.___", state 798, "(1)" - line 404, "pan.___", state 798, "(1)" - line 402, "pan.___", state 803, "((i<1))" - line 402, "pan.___", state 803, "((i>=1))" - line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 822, "(1)" - line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 823, "else" - line 410, "pan.___", state 826, "(1)" - line 410, "pan.___", state 827, "(1)" - line 410, "pan.___", state 827, "(1)" - line 414, "pan.___", state 835, "(1)" - line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 836, "else" - line 414, "pan.___", state 839, "(1)" - line 414, "pan.___", state 840, "(1)" - line 414, "pan.___", state 840, "(1)" - line 412, "pan.___", state 845, "((i<1))" - line 412, "pan.___", state 845, "((i>=1))" - line 419, "pan.___", state 852, "(1)" - line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 853, "else" - line 419, "pan.___", state 856, "(1)" - line 419, "pan.___", state 857, "(1)" - line 419, "pan.___", state 857, "(1)" - line 421, "pan.___", state 860, "(1)" - line 421, "pan.___", state 860, "(1)" - line 370, "pan.___", state 862, "(1)" - line 449, "pan.___", state 870, "((tmp<1))" - line 449, "pan.___", state 870, "((tmp>=1))" - line 462, "pan.___", state 873, "tmp = 0" - line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 883, "(1)" - line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 897, "(1)" - line 404, "pan.___", state 898, "(1)" - line 404, "pan.___", state 898, "(1)" - line 402, "pan.___", state 903, "((i<1))" - line 402, "pan.___", state 903, "((i>=1))" - line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 922, "(1)" - line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 923, "else" - line 410, "pan.___", state 926, "(1)" - line 410, "pan.___", state 927, "(1)" - line 410, "pan.___", state 927, "(1)" - line 414, "pan.___", state 935, "(1)" - line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 936, "else" - line 414, "pan.___", state 939, "(1)" - line 414, "pan.___", state 940, "(1)" - line 414, "pan.___", state 940, "(1)" - line 412, "pan.___", state 945, "((i<1))" - line 412, "pan.___", state 945, "((i>=1))" - line 419, "pan.___", state 952, "(1)" - line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 953, "else" - line 419, "pan.___", state 956, "(1)" - line 419, "pan.___", state 957, "(1)" - line 419, "pan.___", state 957, "(1)" - line 421, "pan.___", state 960, "(1)" - line 421, "pan.___", state 960, "(1)" - line 370, "pan.___", state 962, "(1)" - line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )]" - line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 973, "(1)" - line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 987, "(1)" - line 404, "pan.___", state 988, "(1)" - line 404, "pan.___", state 988, "(1)" - line 402, "pan.___", state 993, "((i<1))" - line 402, "pan.___", state 993, "((i>=1))" - line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1012, "(1)" - line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1013, "else" - line 410, "pan.___", state 1016, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 414, "pan.___", state 1025, "(1)" - line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1026, "else" - line 414, "pan.___", state 1029, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 412, "pan.___", state 1035, "((i<1))" - line 412, "pan.___", state 1035, "((i>=1))" - line 419, "pan.___", state 1042, "(1)" - line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1043, "else" - line 419, "pan.___", state 1046, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 370, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1061, "(1)" - line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1117, "(1)" - line 419, "pan.___", state 1134, "(1)" - line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 414, "pan.___", state 1210, "(1)" - line 419, "pan.___", state 1227, "(1)" - line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1287, "(1)" - line 414, "pan.___", state 1300, "(1)" - line 419, "pan.___", state 1317, "(1)" - line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1342, "(1)" - line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 400, "pan.___", state 1343, "else" - line 400, "pan.___", state 1346, "(1)" - line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1356, "(1)" - line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" - line 404, "pan.___", state 1357, "else" - line 404, "pan.___", state 1360, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 402, "pan.___", state 1366, "((i<1))" - line 402, "pan.___", state 1366, "((i>=1))" - line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 410, "pan.___", state 1385, "(1)" - line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 410, "pan.___", state 1386, "else" - line 410, "pan.___", state 1389, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 414, "pan.___", state 1398, "(1)" - line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 414, "pan.___", state 1399, "else" - line 414, "pan.___", state 1402, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 412, "pan.___", state 1408, "((i<1))" - line 412, "pan.___", state 1408, "((i>=1))" - line 419, "pan.___", state 1415, "(1)" - line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" - line 419, "pan.___", state 1416, "else" - line 419, "pan.___", state 1419, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 1471, "(1)" - line 165, "pan.___", state 1479, "(1)" - line 169, "pan.___", state 1491, "(1)" - line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" - line 180, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 184, "pan.___", state 1591, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" - line 161, "pan.___", state 1601, "(1)" - line 165, "pan.___", state 1609, "(1)" - line 169, "pan.___", state 1621, "(1)" - line 370, "pan.___", state 1642, "(1)" - line 696, "pan.___", state 1643, "(1)" - line 703, "pan.___", state 1646, "-end-" - (308 of 1646 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 752, "pan.___", state 11, "-end-" - (1 of 11 states) - -pan: elapsed time 30.2 seconds -pan: rate 93347.646 states/second -pan: avg transition delay 9.1279e-07 usec -cp .input.spin urcu_progress_writer_error.spin.input -cp .input.spin.trail urcu_progress_writer_error.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input deleted file mode 100644 index eb1d4e6..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,724 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index c5a6fbf..0000000 --- a/formal-model/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,23572 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2561 -2:4:2513 -3:4:2516 -4:4:2516 -5:4:2519 -6:4:2527 -7:4:2527 -8:4:2530 -9:4:2536 -10:4:2540 -11:4:2540 -12:4:2543 -13:4:2551 -14:4:2555 -15:4:2556 -16:0:2561 -17:4:2558 -18:0:2561 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-23559:3:2174 -23560:3:2179 -23561:3:2180 -23562:0:2565 -23563:3:2192 -23564:0:2565 -23565:3:2013 -23566:0:2565 -23567:3:2014 -23568:0:2565 -23569:1:206 diff --git a/formal-model/urcu/result-signal-over-writer/DEFINES b/formal-model/urcu/result-signal-over-writer/DEFINES deleted file mode 100644 index ec600f0..0000000 --- a/formal-model/urcu/result-signal-over-writer/DEFINES +++ /dev/null @@ -1,16 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu/result-signal-over-writer/Makefile b/formal-model/urcu/result-signal-over-writer/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu/result-signal-over-writer/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu/result-signal-over-writer/asserts.log b/formal-model/urcu/result-signal-over-writer/asserts.log deleted file mode 100644 index c102ffb..0000000 --- a/formal-model/urcu/result-signal-over-writer/asserts.log +++ /dev/null @@ -1,334 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 40 byte, depth reached 7872, errors: 0 - 20128 states, stored - 191477 states, matched - 211605 transitions (= stored+matched) - 712166 atomic steps -hash conflicts: 942 (resolved) - -Stats on memory usage (in Megabytes): - 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.467 actual memory usage for states (unsuccessful compression: 112.36%) - state-vector as stored = 48 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.229 total actual memory usage - -unreached in proctype urcu_reader_sig - line 401, ".input.spin", state 330, "(1)" - line 612, ".input.spin", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 59, "(1)" - line 416, ".input.spin", state 89, "(1)" - line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 160, "(1)" - line 650, ".input.spin", state 213, "(1)" - line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 177, ".input.spin", state 233, "(1)" - line 158, ".input.spin", state 254, "(1)" - line 162, ".input.spin", state 262, "(1)" - line 166, ".input.spin", state 274, "(1)" - line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 752, "(1)" - line 162, ".input.spin", state 760, "(1)" - line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 761, "else" - line 160, ".input.spin", state 766, "((j<1))" - line 160, ".input.spin", state 766, "((j>=1))" - line 166, ".input.spin", state 772, "(1)" - line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 773, "else" - line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 776, "else" - line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 835, "(1)" - line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 852, "(1)" - line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 861, "(1)" - line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 862, "else" - line 175, ".input.spin", state 867, "((j<1))" - line 175, ".input.spin", state 867, "((j>=1))" - line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 882, "(1)" - line 162, ".input.spin", state 890, "(1)" - line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 891, "else" - line 160, ".input.spin", state 896, "((j<1))" - line 160, ".input.spin", state 896, "((j>=1))" - line 166, ".input.spin", state 902, "(1)" - line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 903, "else" - line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 906, "else" - line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 908, "else" - line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 909, "else" - line 354, ".input.spin", state 915, "((sighand_exec==1))" - line 354, ".input.spin", state 915, "else" - line 360, ".input.spin", state 918, "sighand_exec = 1" - line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 933, "(1)" - line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 934, "else" - line 397, ".input.spin", state 937, "(1)" - line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 947, "(1)" - line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 948, "else" - line 401, ".input.spin", state 951, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 399, ".input.spin", state 957, "((i<1))" - line 399, ".input.spin", state 957, "((i>=1))" - line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 976, "(1)" - line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 977, "else" - line 407, ".input.spin", state 980, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 411, ".input.spin", state 989, "(1)" - line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 990, "else" - line 411, ".input.spin", state 993, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 409, ".input.spin", state 999, "((i<1))" - line 409, ".input.spin", state 999, "((i>=1))" - line 416, ".input.spin", state 1006, "(1)" - line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1007, "else" - line 416, ".input.spin", state 1010, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 360, ".input.spin", state 1023, "sighand_exec = 1" - line 401, ".input.spin", state 1054, "(1)" - line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1113, "(1)" - line 401, ".input.spin", state 1151, "(1)" - line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1210, "(1)" - line 397, ".input.spin", state 1236, "(1)" - line 401, ".input.spin", state 1250, "(1)" - line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1309, "(1)" - line 401, ".input.spin", state 1350, "(1)" - line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1409, "(1)" - line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1432, "(1)" - line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1441, "(1)" - line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1442, "else" - line 175, ".input.spin", state 1447, "((j<1))" - line 175, ".input.spin", state 1447, "((j>=1))" - line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1462, "(1)" - line 162, ".input.spin", state 1470, "(1)" - line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1471, "else" - line 160, ".input.spin", state 1476, "((j<1))" - line 160, ".input.spin", state 1476, "((j>=1))" - line 166, ".input.spin", state 1482, "(1)" - line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1483, "else" - line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1486, "else" - line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 1545, "(1)" - line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1562, "(1)" - line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1571, "(1)" - line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1572, "else" - line 175, ".input.spin", state 1577, "((j<1))" - line 175, ".input.spin", state 1577, "((j>=1))" - line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1592, "(1)" - line 162, ".input.spin", state 1600, "(1)" - line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1601, "else" - line 160, ".input.spin", state 1606, "((j<1))" - line 160, ".input.spin", state 1606, "((j>=1))" - line 166, ".input.spin", state 1612, "(1)" - line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1613, "else" - line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1616, "else" - line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 1618, "else" - line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 1619, "else" - line 354, ".input.spin", state 1625, "((sighand_exec==1))" - line 354, ".input.spin", state 1625, "else" - line 360, ".input.spin", state 1628, "sighand_exec = 1" - line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 1643, "(1)" - line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 1644, "else" - line 397, ".input.spin", state 1647, "(1)" - line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 1657, "(1)" - line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 1658, "else" - line 401, ".input.spin", state 1661, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 399, ".input.spin", state 1667, "((i<1))" - line 399, ".input.spin", state 1667, "((i>=1))" - line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 1686, "(1)" - line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 1687, "else" - line 407, ".input.spin", state 1690, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 411, ".input.spin", state 1699, "(1)" - line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 1700, "else" - line 411, ".input.spin", state 1703, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 409, ".input.spin", state 1709, "((i<1))" - line 409, ".input.spin", state 1709, "((i>=1))" - line 416, ".input.spin", state 1716, "(1)" - line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1717, "else" - line 416, ".input.spin", state 1720, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 360, ".input.spin", state 1733, "sighand_exec = 1" - line 177, ".input.spin", state 1758, "(1)" - line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1779, "(1)" - line 162, ".input.spin", state 1787, "(1)" - line 166, ".input.spin", state 1799, "(1)" - line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/asserts.spin.input.trail b/formal-model/urcu/result-signal-over-writer/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu/result-signal-over-writer/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/DEFINES b/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/DEFINES deleted file mode 100644 index ec600f0..0000000 --- a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/DEFINES +++ /dev/null @@ -1,16 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/Makefile b/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/asserts.log b/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/asserts.log deleted file mode 100644 index c102ffb..0000000 --- a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/asserts.log +++ /dev/null @@ -1,334 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 40 byte, depth reached 7872, errors: 0 - 20128 states, stored - 191477 states, matched - 211605 transitions (= stored+matched) - 712166 atomic steps -hash conflicts: 942 (resolved) - -Stats on memory usage (in Megabytes): - 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.467 actual memory usage for states (unsuccessful compression: 112.36%) - state-vector as stored = 48 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.229 total actual memory usage - -unreached in proctype urcu_reader_sig - line 401, ".input.spin", state 330, "(1)" - line 612, ".input.spin", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 59, "(1)" - line 416, ".input.spin", state 89, "(1)" - line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 160, "(1)" - line 650, ".input.spin", state 213, "(1)" - line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 177, ".input.spin", state 233, "(1)" - line 158, ".input.spin", state 254, "(1)" - line 162, ".input.spin", state 262, "(1)" - line 166, ".input.spin", state 274, "(1)" - line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 752, "(1)" - line 162, ".input.spin", state 760, "(1)" - line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 761, "else" - line 160, ".input.spin", state 766, "((j<1))" - line 160, ".input.spin", state 766, "((j>=1))" - line 166, ".input.spin", state 772, "(1)" - line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 773, "else" - line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 776, "else" - line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 835, "(1)" - line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 852, "(1)" - line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 861, "(1)" - line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 862, "else" - line 175, ".input.spin", state 867, "((j<1))" - line 175, ".input.spin", state 867, "((j>=1))" - line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 882, "(1)" - line 162, ".input.spin", state 890, "(1)" - line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 891, "else" - line 160, ".input.spin", state 896, "((j<1))" - line 160, ".input.spin", state 896, "((j>=1))" - line 166, ".input.spin", state 902, "(1)" - line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 903, "else" - line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 906, "else" - line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 908, "else" - line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 909, "else" - line 354, ".input.spin", state 915, "((sighand_exec==1))" - line 354, ".input.spin", state 915, "else" - line 360, ".input.spin", state 918, "sighand_exec = 1" - line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 933, "(1)" - line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 934, "else" - line 397, ".input.spin", state 937, "(1)" - line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 947, "(1)" - line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 948, "else" - line 401, ".input.spin", state 951, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 401, ".input.spin", state 952, "(1)" - line 399, ".input.spin", state 957, "((i<1))" - line 399, ".input.spin", state 957, "((i>=1))" - line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 976, "(1)" - line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 977, "else" - line 407, ".input.spin", state 980, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 407, ".input.spin", state 981, "(1)" - line 411, ".input.spin", state 989, "(1)" - line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 990, "else" - line 411, ".input.spin", state 993, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 411, ".input.spin", state 994, "(1)" - line 409, ".input.spin", state 999, "((i<1))" - line 409, ".input.spin", state 999, "((i>=1))" - line 416, ".input.spin", state 1006, "(1)" - line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1007, "else" - line 416, ".input.spin", state 1010, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 416, ".input.spin", state 1011, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 418, ".input.spin", state 1014, "(1)" - line 360, ".input.spin", state 1023, "sighand_exec = 1" - line 401, ".input.spin", state 1054, "(1)" - line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1113, "(1)" - line 401, ".input.spin", state 1151, "(1)" - line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1210, "(1)" - line 397, ".input.spin", state 1236, "(1)" - line 401, ".input.spin", state 1250, "(1)" - line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1309, "(1)" - line 401, ".input.spin", state 1350, "(1)" - line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, ".input.spin", state 1409, "(1)" - line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1432, "(1)" - line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1441, "(1)" - line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1442, "else" - line 175, ".input.spin", state 1447, "((j<1))" - line 175, ".input.spin", state 1447, "((j>=1))" - line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1462, "(1)" - line 162, ".input.spin", state 1470, "(1)" - line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1471, "else" - line 160, ".input.spin", state 1476, "((j<1))" - line 160, ".input.spin", state 1476, "((j>=1))" - line 166, ".input.spin", state 1482, "(1)" - line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1483, "else" - line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1486, "else" - line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, ".input.spin", state 1545, "(1)" - line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, ".input.spin", state 1562, "(1)" - line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, ".input.spin", state 1571, "(1)" - line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, ".input.spin", state 1572, "else" - line 175, ".input.spin", state 1577, "((j<1))" - line 175, ".input.spin", state 1577, "((j>=1))" - line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1592, "(1)" - line 162, ".input.spin", state 1600, "(1)" - line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, ".input.spin", state 1601, "else" - line 160, ".input.spin", state 1606, "((j<1))" - line 160, ".input.spin", state 1606, "((j>=1))" - line 166, ".input.spin", state 1612, "(1)" - line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, ".input.spin", state 1613, "else" - line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, ".input.spin", state 1616, "else" - line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, ".input.spin", state 1618, "else" - line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, ".input.spin", state 1619, "else" - line 354, ".input.spin", state 1625, "((sighand_exec==1))" - line 354, ".input.spin", state 1625, "else" - line 360, ".input.spin", state 1628, "sighand_exec = 1" - line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, ".input.spin", state 1643, "(1)" - line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, ".input.spin", state 1644, "else" - line 397, ".input.spin", state 1647, "(1)" - line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, ".input.spin", state 1657, "(1)" - line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, ".input.spin", state 1658, "else" - line 401, ".input.spin", state 1661, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 401, ".input.spin", state 1662, "(1)" - line 399, ".input.spin", state 1667, "((i<1))" - line 399, ".input.spin", state 1667, "((i>=1))" - line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, ".input.spin", state 1686, "(1)" - line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, ".input.spin", state 1687, "else" - line 407, ".input.spin", state 1690, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 407, ".input.spin", state 1691, "(1)" - line 411, ".input.spin", state 1699, "(1)" - line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, ".input.spin", state 1700, "else" - line 411, ".input.spin", state 1703, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 411, ".input.spin", state 1704, "(1)" - line 409, ".input.spin", state 1709, "((i<1))" - line 409, ".input.spin", state 1709, "((i>=1))" - line 416, ".input.spin", state 1716, "(1)" - line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, ".input.spin", state 1717, "else" - line 416, ".input.spin", state 1720, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 416, ".input.spin", state 1721, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 418, ".input.spin", state 1724, "(1)" - line 360, ".input.spin", state 1733, "sighand_exec = 1" - line 177, ".input.spin", state 1758, "(1)" - line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, ".input.spin", state 1779, "(1)" - line 162, ".input.spin", state 1787, "(1)" - line 166, ".input.spin", state 1799, "(1)" - line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail b/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/references.txt b/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu/result-signal-over-writer/result-signal-over-writer/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/.input.define b/formal-model/urcu/result-signal-over-writer/testmerge/.input.define deleted file mode 100644 index e69de29..0000000 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/.input.spin b/formal-model/urcu/result-signal-over-writer/testmerge/.input.spin deleted file mode 100644 index f2737c4..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/.input.spin +++ /dev/null @@ -1,531 +0,0 @@ - -#define NR_READERS 2 -#define NR_WRITERS 1 - -#define NR_PROCS 3 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/DEFINES b/formal-model/urcu/result-signal-over-writer/testmerge/DEFINES deleted file mode 100644 index 12c751b..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/DEFINES +++ /dev/null @@ -1,31 +0,0 @@ - -#define NR_READERS 2 -#define NR_WRITERS 1 - -#define NR_PROCS 3 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/Makefile b/formal-model/urcu/result-signal-over-writer/testmerge/Makefile deleted file mode 100644 index ca932b7..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/Makefile +++ /dev/null @@ -1,165 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/asserts.log b/formal-model/urcu/result-signal-over-writer/testmerge/asserts.log deleted file mode 100644 index 75f2427..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/asserts.log +++ /dev/null @@ -1,10 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -spin: line 295 replacement value: tmp -spin: line 295 ".input.spin", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' -spin: 1 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/asserts.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/asserts.spin.input deleted file mode 100644 index b06898a..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/asserts.spin.input +++ /dev/null @@ -1,409 +0,0 @@ -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/asserts.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/references.txt b/formal-model/urcu/result-signal-over-writer/testmerge/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.sh b/formal-model/urcu/result-signal-over-writer/testmerge/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin b/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin deleted file mode 100644 index 61d9052..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin +++ /dev/null @@ -1,500 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp2 b/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp2 deleted file mode 100644 index b1c8311..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp2 +++ /dev/null @@ -1,395 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_WRITERS 1 -#define NR_READERS 3 - -/* Number of reader and writer processes */ -#define NR_PROCS 5 - -/* Includes reader, writer and init process */ -#define MAX_NR_PROCS 5 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif - skip; - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif - skip; - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_writerid() (get_pid()) -#define get_readerid() (get_writerrid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - skip; -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2, nest) -{ - nest_i = 0; - do - :: nest_i < nest -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - ooo_mem(i); - smp_mb(i); - nest_i++; - :: nest_i >= nest -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < nest -> - ooo_mem(i); - smp_mb(i); - ooo_mem(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= nest -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [2] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2, 2); - od; -} - -/* Model the RCU update process. */ - -active [1] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - ooo_mem(i); - smp_mb(i); - ooo_mem(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp5 b/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp5 deleted file mode 100644 index 324ee39..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp5 +++ /dev/null @@ -1,398 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.log deleted file mode 100644 index 6a04aba..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.log +++ /dev/null @@ -1,414 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 566) -Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.3 R= 3e+04 -Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.9 R= 3e+04 -Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 97 R= 3e+04 -pan: resizing hashtable to -w22.. done -Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4234, errors: 0 - 4027146 states, stored - 66145121 states, matched - 70172267 transitions (= stored+matched) -2.6437688e+08 atomic steps -hash conflicts: 47318190 (resolved) - -Stats on memory usage (in Megabytes): - 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) - 253.418 actual memory usage for states (compression: 78.55%) - state-vector as stored = 38 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 743.076 total actual memory usage - -unreached in proctype urcu_reader - line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 61, "(1)" - line 307, "pan.___", state 91, "(1)" - line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 149, "(1)" - line 307, "pan.___", state 179, "(1)" - line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 238, "(1)" - line 307, "pan.___", state 268, "(1)" - line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 291, "(1)" - line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 300, "(1)" - line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 301, "else" - line 160, "pan.___", state 306, "((j<1))" - line 160, "pan.___", state 306, "((j>=1))" - line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 321, "(1)" - line 147, "pan.___", state 329, "(1)" - line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 330, "else" - line 145, "pan.___", state 335, "((j<1))" - line 145, "pan.___", state 335, "((j>=1))" - line 151, "pan.___", state 341, "(1)" - line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 342, "else" - line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 345, "else" - line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 347, "else" - line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 404, "(1)" - line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 421, "(1)" - line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 430, "(1)" - line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 431, "else" - line 160, "pan.___", state 436, "((j<1))" - line 160, "pan.___", state 436, "((j>=1))" - line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 451, "(1)" - line 147, "pan.___", state 459, "(1)" - line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 460, "else" - line 145, "pan.___", state 465, "((j<1))" - line 145, "pan.___", state 465, "((j>=1))" - line 151, "pan.___", state 471, "(1)" - line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 472, "else" - line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 475, "else" - line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 477, "else" - line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 537, "(1)" - line 307, "pan.___", state 567, "(1)" - line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 625, "(1)" - line 307, "pan.___", state 655, "(1)" - line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 713, "(1)" - line 307, "pan.___", state 743, "(1)" - line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 760, "(1)" - line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 769, "(1)" - line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 770, "else" - line 160, "pan.___", state 775, "((j<1))" - line 160, "pan.___", state 775, "((j>=1))" - line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 790, "(1)" - line 147, "pan.___", state 798, "(1)" - line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 799, "else" - line 145, "pan.___", state 804, "((j<1))" - line 145, "pan.___", state 804, "((j>=1))" - line 151, "pan.___", state 810, "(1)" - line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 811, "else" - line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 814, "else" - line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 816, "else" - line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 873, "(1)" - line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 890, "(1)" - line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 899, "(1)" - line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 900, "else" - line 160, "pan.___", state 905, "((j<1))" - line 160, "pan.___", state 905, "((j>=1))" - line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 920, "(1)" - line 147, "pan.___", state 928, "(1)" - line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 929, "else" - line 145, "pan.___", state 934, "((j<1))" - line 145, "pan.___", state 934, "((j>=1))" - line 151, "pan.___", state 940, "(1)" - line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 941, "else" - line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 944, "else" - line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 946, "else" - line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1001, "(1)" - line 307, "pan.___", state 1031, "(1)" - line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1097, "(1)" - line 307, "pan.___", state 1127, "(1)" - line 433, "pan.___", state 1140, "-end-" - (125 of 1140 states) -unreached in proctype urcu_writer - line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 59, "(1)" - line 302, "pan.___", state 72, "(1)" - line 307, "pan.___", state 89, "(1)" - line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 151, "(1)" - line 302, "pan.___", state 164, "(1)" - line 467, "pan.___", state 195, "(1)" - line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 237, "(1)" - line 147, "pan.___", state 245, "(1)" - line 151, "pan.___", state 257, "(1)" - line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 923, "(1)" - line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 924, "else" - line 298, "pan.___", state 927, "(1)" - line 298, "pan.___", state 928, "(1)" - line 298, "pan.___", state 928, "(1)" - line 302, "pan.___", state 936, "(1)" - line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 937, "else" - line 302, "pan.___", state 940, "(1)" - line 302, "pan.___", state 941, "(1)" - line 302, "pan.___", state 941, "(1)" - line 300, "pan.___", state 946, "((i<1))" - line 300, "pan.___", state 946, "((i>=1))" - line 307, "pan.___", state 953, "(1)" - line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 954, "else" - line 307, "pan.___", state 957, "(1)" - line 307, "pan.___", state 958, "(1)" - line 307, "pan.___", state 958, "(1)" - line 309, "pan.___", state 961, "(1)" - line 309, "pan.___", state 961, "(1)" - line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1034, "(1)" - line 307, "pan.___", state 1051, "(1)" - line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1122, "(1)" - line 307, "pan.___", state 1139, "(1)" - line 288, "pan.___", state 1156, "(1)" - line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1212, "(1)" - line 307, "pan.___", state 1229, "(1)" - line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1303, "(1)" - line 307, "pan.___", state 1320, "(1)" - line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1365, "(1)" - line 147, "pan.___", state 1373, "(1)" - line 151, "pan.___", state 1385, "(1)" - line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1584, "(1)" - line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 1585, "else" - line 298, "pan.___", state 1588, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 302, "pan.___", state 1597, "(1)" - line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 1598, "else" - line 302, "pan.___", state 1601, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 300, "pan.___", state 1607, "((i<1))" - line 300, "pan.___", state 1607, "((i>=1))" - line 307, "pan.___", state 1614, "(1)" - line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 1615, "else" - line 307, "pan.___", state 1618, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1669, "(1)" - line 147, "pan.___", state 1677, "(1)" - line 151, "pan.___", state 1689, "(1)" - line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input deleted file mode 100644 index 18f99c4..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input +++ /dev/null @@ -1,531 +0,0 @@ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input.trail deleted file mode 100644 index 0d22946..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input.trail +++ /dev/null @@ -1,1902 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3013 -2:2:1132 -3:0:3013 -4:1:0 -5:0:3013 -6:1:1 -7:0:3013 -8:1:2 -9:0:3013 -10:1:3 -11:0:3013 -12:3:2969 -13:0:3013 -14:3:2970 -15:0:3013 -16:3:2971 -17:0:3013 -18:3:2972 -19:0:3013 -20:3:2973 -21:0:3013 -22:3:2974 -23:0:3013 -24:3:2971 -25:0:3013 -26:3:2972 -27:0:3013 -28:3:2973 -29:0:3013 -30:3:2974 -31:0:3013 -32:3:2975 -33:0:3013 -34:3:2980 -35:0:3013 -36:3:2981 -37:0:3013 -38:3:2982 -39:0:3013 -40:3:2983 -41:0:3013 -42:3:2984 -43:0:3013 -44:3:2985 -45:0:3013 -46:3:2982 -47:0:3013 -48:3:2983 -49:0:3013 -50:3:2984 -51:0:3013 -52:3:2985 -53:0:3013 -54:3:2986 -55:0:3013 -56:3:2992 -57:0:3013 -58:3:2993 -59:0:3013 -60:3:2994 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100644 index e69de29..0000000 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_nested.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_nested.log deleted file mode 100644 index 708dee2..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_nested.log +++ /dev/null @@ -1,415 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_nested.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 566) -Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.2 R= 3e+04 -Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.7 R= 3e+04 -Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 96.8 R= 3e+04 -pan: resizing hashtable to -w22.. done -Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4234, errors: 0 - 4027146 states, stored - 66145121 states, matched - 70172267 transitions (= stored+matched) -2.6437688e+08 atomic steps -hash conflicts: 47318190 (resolved) - -Stats on memory usage (in Megabytes): - 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) - 253.418 actual memory usage for states (compression: 78.55%) - state-vector as stored = 38 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 743.076 total actual memory usage - -unreached in proctype urcu_reader - line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 61, "(1)" - line 307, "pan.___", state 91, "(1)" - line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 149, "(1)" - line 307, "pan.___", state 179, "(1)" - line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 238, "(1)" - line 307, "pan.___", state 268, "(1)" - line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 291, "(1)" - line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 300, "(1)" - line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 301, "else" - line 160, "pan.___", state 306, "((j<1))" - line 160, "pan.___", state 306, "((j>=1))" - line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 321, "(1)" - line 147, "pan.___", state 329, "(1)" - line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 330, "else" - line 145, "pan.___", state 335, "((j<1))" - line 145, "pan.___", state 335, "((j>=1))" - line 151, "pan.___", state 341, "(1)" - line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 342, "else" - line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 345, "else" - line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 347, "else" - line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 404, "(1)" - line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 421, "(1)" - line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 430, "(1)" - line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 431, "else" - line 160, "pan.___", state 436, "((j<1))" - line 160, "pan.___", state 436, "((j>=1))" - line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 451, "(1)" - line 147, "pan.___", state 459, "(1)" - line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 460, "else" - line 145, "pan.___", state 465, "((j<1))" - line 145, "pan.___", state 465, "((j>=1))" - line 151, "pan.___", state 471, "(1)" - line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 472, "else" - line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 475, "else" - line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 477, "else" - line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 537, "(1)" - line 307, "pan.___", state 567, "(1)" - line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 625, "(1)" - line 307, "pan.___", state 655, "(1)" - line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 713, "(1)" - line 307, "pan.___", state 743, "(1)" - line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 760, "(1)" - line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 769, "(1)" - line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 770, "else" - line 160, "pan.___", state 775, "((j<1))" - line 160, "pan.___", state 775, "((j>=1))" - line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 790, "(1)" - line 147, "pan.___", state 798, "(1)" - line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 799, "else" - line 145, "pan.___", state 804, "((j<1))" - line 145, "pan.___", state 804, "((j>=1))" - line 151, "pan.___", state 810, "(1)" - line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 811, "else" - line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 814, "else" - line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 816, "else" - line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 151, "pan.___", state 873, "(1)" - line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 158, "pan.___", state 890, "(1)" - line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 899, "(1)" - line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 162, "pan.___", state 900, "else" - line 160, "pan.___", state 905, "((j<1))" - line 160, "pan.___", state 905, "((j>=1))" - line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 920, "(1)" - line 147, "pan.___", state 928, "(1)" - line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 147, "pan.___", state 929, "else" - line 145, "pan.___", state 934, "((j<1))" - line 145, "pan.___", state 934, "((j>=1))" - line 151, "pan.___", state 940, "(1)" - line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 151, "pan.___", state 941, "else" - line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 153, "pan.___", state 944, "else" - line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 185, "pan.___", state 946, "else" - line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1001, "(1)" - line 307, "pan.___", state 1031, "(1)" - line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1097, "(1)" - line 307, "pan.___", state 1127, "(1)" - line 433, "pan.___", state 1140, "-end-" - (125 of 1140 states) -unreached in proctype urcu_writer - line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 59, "(1)" - line 302, "pan.___", state 72, "(1)" - line 307, "pan.___", state 89, "(1)" - line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 151, "(1)" - line 302, "pan.___", state 164, "(1)" - line 467, "pan.___", state 195, "(1)" - line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 237, "(1)" - line 147, "pan.___", state 245, "(1)" - line 151, "pan.___", state 257, "(1)" - line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 923, "(1)" - line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 924, "else" - line 298, "pan.___", state 927, "(1)" - line 298, "pan.___", state 928, "(1)" - line 298, "pan.___", state 928, "(1)" - line 302, "pan.___", state 936, "(1)" - line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 937, "else" - line 302, "pan.___", state 940, "(1)" - line 302, "pan.___", state 941, "(1)" - line 302, "pan.___", state 941, "(1)" - line 300, "pan.___", state 946, "((i<1))" - line 300, "pan.___", state 946, "((i>=1))" - line 307, "pan.___", state 953, "(1)" - line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 954, "else" - line 307, "pan.___", state 957, "(1)" - line 307, "pan.___", state 958, "(1)" - line 307, "pan.___", state 958, "(1)" - line 309, "pan.___", state 961, "(1)" - line 309, "pan.___", state 961, "(1)" - line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1034, "(1)" - line 307, "pan.___", state 1051, "(1)" - line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1122, "(1)" - line 307, "pan.___", state 1139, "(1)" - line 288, "pan.___", state 1156, "(1)" - line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1212, "(1)" - line 307, "pan.___", state 1229, "(1)" - line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 302, "pan.___", state 1303, "(1)" - line 307, "pan.___", state 1320, "(1)" - line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1365, "(1)" - line 147, "pan.___", state 1373, "(1)" - line 151, "pan.___", state 1385, "(1)" - line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1584, "(1)" - line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 298, "pan.___", state 1585, "else" - line 298, "pan.___", state 1588, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 298, "pan.___", state 1589, "(1)" - line 302, "pan.___", state 1597, "(1)" - line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 302, "pan.___", state 1598, "else" - line 302, "pan.___", state 1601, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 302, "pan.___", state 1602, "(1)" - line 300, "pan.___", state 1607, "((i<1))" - line 300, "pan.___", state 1607, "((i>=1))" - line 307, "pan.___", state 1614, "(1)" - line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 307, "pan.___", state 1615, "else" - line 307, "pan.___", state 1618, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 307, "pan.___", state 1619, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 309, "pan.___", state 1622, "(1)" - line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 143, "pan.___", state 1669, "(1)" - line 147, "pan.___", state 1677, "(1)" - line 151, "pan.___", state 1689, "(1)" - line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail deleted file mode 100644 index 2cefe6b..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail +++ /dev/null @@ -1,7 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:0:2679 -5:3:1129 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.define b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.log deleted file mode 100644 index c722840..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.log +++ /dev/null @@ -1,16 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -spin: line 291 "pan.___", Error: syntax error saw 'operator: =' -spin: line 291 "pan.___", Error: syntax error saw 'operator: =' -spin: 2 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input deleted file mode 100644 index 1346c4e..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,533 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 3d2a95e..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2082 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:3537 -2:3:3489 -3:3:3492 -4:3:3492 -5:3:3495 -6:3:3503 -7:3:3503 -8:3:3506 -9:3:3512 -10:3:3516 -11:3:3516 -12:3:3519 -13:3:3527 -14:3:3531 -15:3:3532 -16:0:3537 -17:3:3534 -18:0:3537 -19:2:1310 -20:0:3537 -21:2:1316 -22:0:3537 -23:2:1317 -24:0:3537 -25:2:1318 -26:2:1322 -27:2:1323 -28:2:1331 -29:2:1332 -30:2:1336 -31:2:1337 -32:2:1345 -33:2:1350 -34:2:1354 -35:2:1355 -36:2:1362 -37:2:1363 -38:2:1374 -39:2:1375 -40:2:1376 -41:2:1387 -42:2:1392 -43:2:1393 -44:0:3537 -45:2:1405 -46:2:1406 -47:0:3537 -48:2:1410 -49:2:1414 -50:2:1415 -51:2:1423 -52:2:1424 -53:2:1428 -54:2:1429 -55:2:1437 -56:2:1442 -57:2:1443 -58:2:1454 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-1986:0:3537 -1987:1:100 -1988:1:104 -1989:1:105 -1990:1:113 -1991:1:114 -1992:1:118 -1993:1:119 -1994:1:127 -1995:1:132 -1996:1:136 -1997:1:137 -1998:1:144 -1999:1:145 -2000:1:156 -2001:1:157 -2002:1:158 -2003:1:169 -2004:1:174 -2005:1:175 -2006:0:3537 -2007:2:3483 -2008:0:3537 -2009:1:279 -2010:0:3537 -2011:2:3484 -2012:0:3537 -2013:1:280 -2014:0:3537 -2015:2:3483 -2016:0:3537 -2017:1:561 -2018:0:3537 -2019:2:3484 -2020:0:3537 -2021:1:562 -2022:0:3537 -2023:2:3483 -2024:0:3537 -2025:1:567 -2026:0:3537 -2027:2:3484 -2028:0:3537 -2029:1:572 -2030:1:576 -2031:1:577 -2032:1:585 -2033:1:586 -2034:1:587 -2035:1:599 -2036:1:604 -2037:1:608 -2038:1:609 -2039:1:616 -2040:1:617 -2041:1:628 -2042:1:629 -2043:1:630 -2044:1:641 -2045:1:646 -2046:1:647 -2047:0:3537 -2048:2:3483 -2049:0:3537 -2050:1:659 -2051:0:3537 -2052:2:3484 -2053:0:3537 -2054:1:660 -2055:1:664 -2056:1:665 -2057:1:673 -2058:1:674 -2059:1:678 -2060:1:679 -2061:1:687 -2062:1:692 -2063:1:696 -2064:1:697 -2065:1:704 -2066:1:705 -2067:1:716 -2068:1:717 -2069:1:718 -2070:1:729 -2071:1:734 -2072:1:735 -2073:0:3537 -2074:2:3483 -2075:0:3537 -2076:1:747 -2077:0:3535 -2078:2:3484 -2079:0:3541 -2080:1:1280 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.define b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.log deleted file mode 100644 index 6a46f80..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.log +++ /dev/null @@ -1,369 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 567) -Depth= 5645 States= 1e+06 Transitions= 1.47e+07 Memory= 527.287 t= 27.1 R= 4e+04 -pan: claim violated! (at depth 1736) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 5645, errors: 1 - 1039881 states, stored - 14441478 states, matched - 15481359 transitions (= stored+matched) - 57000435 atomic steps -hash conflicts: 2892596 (resolved) - -Stats on memory usage (in Megabytes): - 83.303 equivalent memory usage for states (stored*(State-vector + overhead)) - 64.050 actual memory usage for states (compression: 76.89%) - state-vector as stored = 37 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 529.729 total actual memory usage - -unreached in proctype urcu_reader - line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 61, "(1)" - line 308, "pan.___", state 91, "(1)" - line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 149, "(1)" - line 308, "pan.___", state 179, "(1)" - line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 238, "(1)" - line 308, "pan.___", state 268, "(1)" - line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 291, "(1)" - line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 300, "(1)" - line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 301, "else" - line 161, "pan.___", state 306, "((j<1))" - line 161, "pan.___", state 306, "((j>=1))" - line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 313, "(1)" - line 167, "pan.___", state 314, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 314, "else" - line 177, "pan.___", state 319, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 319, "else" - line 159, "pan.___", state 324, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 159, "pan.___", state 363, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 365, "(1)" - line 163, "pan.___", state 372, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 374, "(1)" - line 163, "pan.___", state 375, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 375, "else" - line 161, "pan.___", state 380, "((j<1))" - line 161, "pan.___", state 380, "((j>=1))" - line 167, "pan.___", state 385, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 387, "(1)" - line 167, "pan.___", state 388, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 388, "else" - line 177, "pan.___", state 393, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 393, "else" - line 289, "pan.___", state 408, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 440, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 453, "(1)" - line 308, "pan.___", state 483, "(1)" - line 289, "pan.___", state 496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 541, "(1)" - line 308, "pan.___", state 571, "(1)" - line 289, "pan.___", state 584, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 629, "(1)" - line 308, "pan.___", state 659, "(1)" - line 159, "pan.___", state 674, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 676, "(1)" - line 163, "pan.___", state 683, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 685, "(1)" - line 163, "pan.___", state 686, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 686, "else" - line 161, "pan.___", state 691, "((j<1))" - line 161, "pan.___", state 691, "((j>=1))" - line 167, "pan.___", state 696, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 698, "(1)" - line 167, "pan.___", state 699, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 699, "else" - line 177, "pan.___", state 704, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 704, "else" - line 159, "pan.___", state 709, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 731, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 159, "pan.___", state 748, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 750, "(1)" - line 163, "pan.___", state 757, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 759, "(1)" - line 163, "pan.___", state 760, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 760, "else" - line 161, "pan.___", state 765, "((j<1))" - line 161, "pan.___", state 765, "((j>=1))" - line 167, "pan.___", state 770, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" - line 167, "pan.___", state 773, "else" - line 177, "pan.___", state 778, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 177, "pan.___", state 778, "else" - line 289, "pan.___", state 788, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 820, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 833, "(1)" - line 308, "pan.___", state 863, "(1)" - line 289, "pan.___", state 884, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 916, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 929, "(1)" - line 308, "pan.___", state 959, "(1)" - line 434, "pan.___", state 972, "-end-" - (95 of 972 states) -unreached in proctype urcu_writer - line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 20, "(1)" - line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 34, "(1)" - line 293, "pan.___", state 35, "(1)" - line 293, "pan.___", state 35, "(1)" - line 291, "pan.___", state 40, "((i<1))" - line 291, "pan.___", state 40, "((i>=1))" - line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 59, "(1)" - line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 60, "else" - line 299, "pan.___", state 63, "(1)" - line 299, "pan.___", state 64, "(1)" - line 299, "pan.___", state 64, "(1)" - line 303, "pan.___", state 72, "(1)" - line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 73, "else" - line 303, "pan.___", state 76, "(1)" - line 303, "pan.___", state 77, "(1)" - line 303, "pan.___", state 77, "(1)" - line 301, "pan.___", state 82, "((i<1))" - line 301, "pan.___", state 82, "((i>=1))" - line 308, "pan.___", state 89, "(1)" - line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 90, "else" - line 308, "pan.___", state 93, "(1)" - line 308, "pan.___", state 94, "(1)" - line 308, "pan.___", state 94, "(1)" - line 310, "pan.___", state 97, "(1)" - line 310, "pan.___", state 97, "(1)" - line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" - line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 112, "(1)" - line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 126, "(1)" - line 293, "pan.___", state 127, "(1)" - line 293, "pan.___", state 127, "(1)" - line 299, "pan.___", state 151, "(1)" - line 303, "pan.___", state 164, "(1)" - line 310, "pan.___", state 189, "(1)" - line 310, "pan.___", state 189, "(1)" - line 468, "pan.___", state 195, "(1)" - line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 240, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 298, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 755, "(1)" - line 299, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 756, "else" - line 299, "pan.___", state 759, "(1)" - line 299, "pan.___", state 760, "(1)" - line 299, "pan.___", state 760, "(1)" - line 303, "pan.___", state 768, "(1)" - line 303, "pan.___", state 769, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 769, "else" - line 303, "pan.___", state 772, "(1)" - line 303, "pan.___", state 773, "(1)" - line 303, "pan.___", state 773, "(1)" - line 301, "pan.___", state 778, "((i<1))" - line 301, "pan.___", state 778, "((i>=1))" - line 308, "pan.___", state 785, "(1)" - line 308, "pan.___", state 786, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 786, "else" - line 308, "pan.___", state 789, "(1)" - line 308, "pan.___", state 790, "(1)" - line 308, "pan.___", state 790, "(1)" - line 310, "pan.___", state 793, "(1)" - line 310, "pan.___", state 793, "(1)" - line 293, "pan.___", state 822, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 840, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 866, "(1)" - line 308, "pan.___", state 883, "(1)" - line 293, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 954, "(1)" - line 308, "pan.___", state 971, "(1)" - line 289, "pan.___", state 988, "(1)" - line 293, "pan.___", state 1000, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1018, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1044, "(1)" - line 308, "pan.___", state 1061, "(1)" - line 293, "pan.___", state 1091, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1109, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1135, "(1)" - line 308, "pan.___", state 1152, "(1)" - line 163, "pan.___", state 1174, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 1187, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1200, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 298, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1332, "(1)" - line 299, "pan.___", state 1333, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 1333, "else" - line 299, "pan.___", state 1336, "(1)" - line 299, "pan.___", state 1337, "(1)" - line 299, "pan.___", state 1337, "(1)" - line 303, "pan.___", state 1345, "(1)" - line 303, "pan.___", state 1346, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 1346, "else" - line 303, "pan.___", state 1349, "(1)" - line 303, "pan.___", state 1350, "(1)" - line 303, "pan.___", state 1350, "(1)" - line 301, "pan.___", state 1355, "((i<1))" - line 301, "pan.___", state 1355, "((i>=1))" - line 308, "pan.___", state 1362, "(1)" - line 308, "pan.___", state 1363, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 1363, "else" - line 308, "pan.___", state 1366, "(1)" - line 308, "pan.___", state 1367, "(1)" - line 308, "pan.___", state 1367, "(1)" - line 310, "pan.___", state 1370, "(1)" - line 310, "pan.___", state 1370, "(1)" - line 163, "pan.___", state 1394, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 1407, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1420, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 519, "pan.___", state 20, "((j<2))" - line 519, "pan.___", state 20, "((j>=2))" - line 524, "pan.___", state 33, "((j<2))" - line 524, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 572, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 28.5 seconds -pan: rate 36487.053 states/second -pan: avg transition delay 1.8409e-06 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input deleted file mode 100644 index 899fdb4..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,532 +0,0 @@ -#define NO_RMB - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 0aacf1a..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1739 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2529 -2:3:2481 -3:3:2484 -4:3:2484 -5:3:2487 -6:3:2495 -7:3:2495 -8:3:2498 -9:3:2504 -10:3:2508 -11:3:2508 -12:3:2511 -13:3:2519 -14:3:2523 -15:3:2524 -16:0:2529 -17:3:2526 -18:0:2529 -19:2:974 -20:0:2529 -21:2:980 -22:0:2529 -23:2:981 -24:0:2529 -25:2:982 -26:2:986 -27:2:987 -28:2:995 -29:2:996 -30:2:1000 -31:2:1001 -32:2:1009 -33:2:1014 -34:2:1018 -35:2:1019 -36:2:1026 -37:2:1027 -38:2:1038 -39:2:1039 -40:2:1040 -41:2:1051 -42:2:1056 -43:2:1057 -44:0:2529 -45:2:1069 -46:2:1070 -47:0:2529 -48:2:1074 -49:2:1078 -50:2:1079 -51:2:1087 -52:2:1088 -53:2:1092 -54:2:1093 -55:2:1101 -56:2:1106 -57:2:1107 -58:2:1118 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-1680:2:2475 -1681:0:2529 -1682:1:399 -1683:0:2529 -1684:2:2476 -1685:0:2529 -1686:1:404 -1687:1:408 -1688:1:409 -1689:1:417 -1690:1:418 -1691:1:419 -1692:1:431 -1693:1:436 -1694:1:440 -1695:1:441 -1696:1:448 -1697:1:449 -1698:1:460 -1699:1:461 -1700:1:462 -1701:1:473 -1702:1:485 -1703:1:486 -1704:0:2529 -1705:2:2475 -1706:0:2529 -1707:1:491 -1708:0:2529 -1709:2:2476 -1710:0:2529 -1711:1:492 -1712:1:496 -1713:1:497 -1714:1:505 -1715:1:506 -1716:1:510 -1717:1:511 -1718:1:519 -1719:1:524 -1720:1:528 -1721:1:529 -1722:1:536 -1723:1:537 -1724:1:548 -1725:1:549 -1726:1:550 -1727:1:561 -1728:1:566 -1729:1:567 -1730:0:2529 -1731:2:2475 -1732:0:2529 -1733:1:579 -1734:0:2527 -1735:2:2476 -1736:0:2533 -1737:1:662 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.define b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.log deleted file mode 100644 index 477c85d..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.log +++ /dev/null @@ -1,381 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 567) -pan: claim violated! (at depth 1889) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 6646, errors: 1 - 377244 states, stored - 5291719 states, matched - 5668963 transitions (= stored+matched) - 20822372 atomic steps -hash conflicts: 405371 (resolved) - -Stats on memory usage (in Megabytes): - 30.221 equivalent memory usage for states (stored*(State-vector + overhead)) - 23.526 actual memory usage for states (compression: 77.85%) - state-vector as stored = 37 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 489.201 total actual memory usage - -unreached in proctype urcu_reader - line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 61, "(1)" - line 308, "pan.___", state 91, "(1)" - line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 149, "(1)" - line 308, "pan.___", state 179, "(1)" - line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 238, "(1)" - line 308, "pan.___", state 268, "(1)" - line 144, "pan.___", state 290, "(1)" - line 148, "pan.___", state 298, "(1)" - line 148, "pan.___", state 299, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 299, "else" - line 146, "pan.___", state 304, "((j<1))" - line 146, "pan.___", state 304, "((j>=1))" - line 152, "pan.___", state 310, "(1)" - line 152, "pan.___", state 311, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 311, "else" - line 186, "pan.___", state 316, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 316, "else" - line 144, "pan.___", state 322, "(1)" - line 148, "pan.___", state 330, "(1)" - line 148, "pan.___", state 331, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 152, "pan.___", state 342, "(1)" - line 152, "pan.___", state 343, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 144, "pan.___", state 358, "(1)" - line 148, "pan.___", state 366, "(1)" - line 148, "pan.___", state 367, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 367, "else" - line 146, "pan.___", state 372, "((j<1))" - line 146, "pan.___", state 372, "((j>=1))" - line 152, "pan.___", state 378, "(1)" - line 152, "pan.___", state 379, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 379, "else" - line 186, "pan.___", state 384, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 384, "else" - line 289, "pan.___", state 399, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 415, "(1)" - line 298, "pan.___", state 431, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 444, "(1)" - line 308, "pan.___", state 474, "(1)" - line 289, "pan.___", state 487, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 519, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 532, "(1)" - line 308, "pan.___", state 562, "(1)" - line 289, "pan.___", state 575, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 607, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 620, "(1)" - line 308, "pan.___", state 650, "(1)" - line 144, "pan.___", state 666, "(1)" - line 148, "pan.___", state 674, "(1)" - line 148, "pan.___", state 675, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 675, "else" - line 146, "pan.___", state 680, "((j<1))" - line 146, "pan.___", state 680, "((j>=1))" - line 152, "pan.___", state 686, "(1)" - line 152, "pan.___", state 687, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 687, "else" - line 186, "pan.___", state 692, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 692, "else" - line 144, "pan.___", state 698, "(1)" - line 148, "pan.___", state 706, "(1)" - line 148, "pan.___", state 707, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 152, "pan.___", state 718, "(1)" - line 152, "pan.___", state 719, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 144, "pan.___", state 734, "(1)" - line 148, "pan.___", state 742, "(1)" - line 148, "pan.___", state 743, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 743, "else" - line 146, "pan.___", state 748, "((j<1))" - line 146, "pan.___", state 748, "((j>=1))" - line 152, "pan.___", state 754, "(1)" - line 152, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 755, "else" - line 186, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 760, "else" - line 289, "pan.___", state 770, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 802, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 815, "(1)" - line 308, "pan.___", state 845, "(1)" - line 289, "pan.___", state 866, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 882, "(1)" - line 298, "pan.___", state 898, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 911, "(1)" - line 308, "pan.___", state 941, "(1)" - line 434, "pan.___", state 954, "-end-" - (79 of 954 states) -unreached in proctype urcu_writer - line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 20, "(1)" - line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 34, "(1)" - line 293, "pan.___", state 35, "(1)" - line 293, "pan.___", state 35, "(1)" - line 291, "pan.___", state 40, "((i<1))" - line 291, "pan.___", state 40, "((i>=1))" - line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 59, "(1)" - line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 60, "else" - line 299, "pan.___", state 63, "(1)" - line 299, "pan.___", state 64, "(1)" - line 299, "pan.___", state 64, "(1)" - line 303, "pan.___", state 72, "(1)" - line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 73, "else" - line 303, "pan.___", state 76, "(1)" - line 303, "pan.___", state 77, "(1)" - line 303, "pan.___", state 77, "(1)" - line 301, "pan.___", state 82, "((i<1))" - line 301, "pan.___", state 82, "((i>=1))" - line 308, "pan.___", state 89, "(1)" - line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 90, "else" - line 308, "pan.___", state 93, "(1)" - line 308, "pan.___", state 94, "(1)" - line 308, "pan.___", state 94, "(1)" - line 310, "pan.___", state 97, "(1)" - line 310, "pan.___", state 97, "(1)" - line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" - line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 112, "(1)" - line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 126, "(1)" - line 293, "pan.___", state 127, "(1)" - line 293, "pan.___", state 127, "(1)" - line 291, "pan.___", state 132, "((i<1))" - line 291, "pan.___", state 132, "((i>=1))" - line 299, "pan.___", state 151, "(1)" - line 299, "pan.___", state 152, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 152, "else" - line 299, "pan.___", state 155, "(1)" - line 299, "pan.___", state 156, "(1)" - line 299, "pan.___", state 156, "(1)" - line 303, "pan.___", state 164, "(1)" - line 303, "pan.___", state 165, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 165, "else" - line 303, "pan.___", state 168, "(1)" - line 303, "pan.___", state 169, "(1)" - line 303, "pan.___", state 169, "(1)" - line 301, "pan.___", state 174, "((i<1))" - line 301, "pan.___", state 174, "((i>=1))" - line 308, "pan.___", state 181, "(1)" - line 308, "pan.___", state 182, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 182, "else" - line 308, "pan.___", state 185, "(1)" - line 308, "pan.___", state 186, "(1)" - line 308, "pan.___", state 186, "(1)" - line 310, "pan.___", state 189, "(1)" - line 310, "pan.___", state 189, "(1)" - line 468, "pan.___", state 195, "(1)" - line 462, "pan.___", state 198, "((write_lock==0))" - line 462, "pan.___", state 198, "else" - line 460, "pan.___", state 199, "(1)" - line 144, "pan.___", state 206, "(1)" - line 148, "pan.___", state 214, "(1)" - line 148, "pan.___", state 215, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 215, "else" - line 146, "pan.___", state 220, "((j<1))" - line 146, "pan.___", state 220, "((j>=1))" - line 152, "pan.___", state 226, "(1)" - line 152, "pan.___", state 227, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 227, "else" - line 186, "pan.___", state 232, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 186, "pan.___", state 232, "else" - line 144, "pan.___", state 238, "(1)" - line 152, "pan.___", state 258, "(1)" - line 144, "pan.___", state 274, "(1)" - line 148, "pan.___", state 282, "(1)" - line 152, "pan.___", state 294, "(1)" - line 289, "pan.___", state 310, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 342, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 355, "(1)" - line 303, "pan.___", state 368, "(1)" - line 308, "pan.___", state 385, "(1)" - line 289, "pan.___", state 402, "(1)" - line 293, "pan.___", state 414, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 432, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 458, "(1)" - line 308, "pan.___", state 475, "(1)" - line 293, "pan.___", state 505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 523, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 549, "(1)" - line 308, "pan.___", state 566, "(1)" - line 148, "pan.___", state 588, "(1)" - line 152, "pan.___", state 600, "(1)" - line 144, "pan.___", state 612, "(1)" - line 152, "pan.___", state 632, "(1)" - line 148, "pan.___", state 656, "(1)" - line 152, "pan.___", state 668, "(1)" - line 289, "pan.___", state 692, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 694, "(1)" - line 289, "pan.___", state 695, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 289, "pan.___", state 695, "else" - line 289, "pan.___", state 698, "(1)" - line 293, "pan.___", state 706, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 708, "(1)" - line 293, "pan.___", state 709, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 293, "pan.___", state 709, "else" - line 293, "pan.___", state 712, "(1)" - line 293, "pan.___", state 713, "(1)" - line 293, "pan.___", state 713, "(1)" - line 291, "pan.___", state 718, "((i<1))" - line 291, "pan.___", state 718, "((i>=1))" - line 298, "pan.___", state 724, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 737, "(1)" - line 299, "pan.___", state 738, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 738, "else" - line 299, "pan.___", state 741, "(1)" - line 299, "pan.___", state 742, "(1)" - line 299, "pan.___", state 742, "(1)" - line 303, "pan.___", state 750, "(1)" - line 303, "pan.___", state 751, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 751, "else" - line 303, "pan.___", state 754, "(1)" - line 303, "pan.___", state 755, "(1)" - line 303, "pan.___", state 755, "(1)" - line 301, "pan.___", state 760, "((i<1))" - line 301, "pan.___", state 760, "((i>=1))" - line 308, "pan.___", state 767, "(1)" - line 308, "pan.___", state 768, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 768, "else" - line 308, "pan.___", state 771, "(1)" - line 308, "pan.___", state 772, "(1)" - line 308, "pan.___", state 772, "(1)" - line 310, "pan.___", state 775, "(1)" - line 310, "pan.___", state 775, "(1)" - line 293, "pan.___", state 804, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 822, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 848, "(1)" - line 308, "pan.___", state 865, "(1)" - line 293, "pan.___", state 892, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 936, "(1)" - line 308, "pan.___", state 953, "(1)" - line 289, "pan.___", state 970, "(1)" - line 293, "pan.___", state 982, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1000, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1026, "(1)" - line 308, "pan.___", state 1043, "(1)" - line 293, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 303, "pan.___", state 1117, "(1)" - line 308, "pan.___", state 1134, "(1)" - line 148, "pan.___", state 1156, "(1)" - line 152, "pan.___", state 1168, "(1)" - line 144, "pan.___", state 1180, "(1)" - line 152, "pan.___", state 1200, "(1)" - line 148, "pan.___", state 1224, "(1)" - line 152, "pan.___", state 1236, "(1)" - line 289, "pan.___", state 1260, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 289, "pan.___", state 1262, "(1)" - line 289, "pan.___", state 1263, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 289, "pan.___", state 1263, "else" - line 289, "pan.___", state 1266, "(1)" - line 293, "pan.___", state 1274, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 1276, "(1)" - line 293, "pan.___", state 1277, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 293, "pan.___", state 1277, "else" - line 293, "pan.___", state 1280, "(1)" - line 293, "pan.___", state 1281, "(1)" - line 293, "pan.___", state 1281, "(1)" - line 291, "pan.___", state 1286, "((i<1))" - line 291, "pan.___", state 1286, "((i>=1))" - line 298, "pan.___", state 1292, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1305, "(1)" - line 299, "pan.___", state 1306, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 1306, "else" - line 299, "pan.___", state 1309, "(1)" - line 299, "pan.___", state 1310, "(1)" - line 299, "pan.___", state 1310, "(1)" - line 303, "pan.___", state 1318, "(1)" - line 303, "pan.___", state 1319, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 1319, "else" - line 303, "pan.___", state 1322, "(1)" - line 303, "pan.___", state 1323, "(1)" - line 303, "pan.___", state 1323, "(1)" - line 301, "pan.___", state 1328, "((i<1))" - line 301, "pan.___", state 1328, "((i>=1))" - line 308, "pan.___", state 1335, "(1)" - line 308, "pan.___", state 1336, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 1336, "else" - line 308, "pan.___", state 1339, "(1)" - line 308, "pan.___", state 1340, "(1)" - line 308, "pan.___", state 1340, "(1)" - line 310, "pan.___", state 1343, "(1)" - line 310, "pan.___", state 1343, "(1)" - line 148, "pan.___", state 1367, "(1)" - line 152, "pan.___", state 1379, "(1)" - line 144, "pan.___", state 1391, "(1)" - line 152, "pan.___", state 1411, "(1)" - line 148, "pan.___", state 1435, "(1)" - line 152, "pan.___", state 1447, "(1)" - line 511, "pan.___", state 1473, "-end-" - (159 of 1473 states) -unreached in proctype :init: - line 518, "pan.___", state 9, "((j<2))" - line 518, "pan.___", state 9, "((j>=2))" - line 519, "pan.___", state 20, "((j<2))" - line 519, "pan.___", state 20, "((j>=2))" - line 524, "pan.___", state 33, "((j<2))" - line 524, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 572, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 10.4 seconds -pan: rate 36378.399 states/second -pan: avg transition delay 1.8293e-06 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input deleted file mode 100644 index 12cde50..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,532 +0,0 @@ -#define NO_WMB - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index ec82525..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1892 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2475 -2:3:2427 -3:3:2430 -4:3:2430 -5:3:2433 -6:3:2441 -7:3:2441 -8:3:2444 -9:3:2450 -10:3:2454 -11:3:2454 -12:3:2457 -13:3:2465 -14:3:2469 -15:3:2470 -16:0:2475 -17:3:2472 -18:0:2475 -19:2:956 -20:0:2475 -21:2:962 -22:0:2475 -23:2:963 -24:0:2475 -25:2:964 -26:2:968 -27:2:969 -28:2:977 -29:2:978 -30:2:982 -31:2:983 -32:2:991 -33:2:996 -34:2:1000 -35:2:1001 -36:2:1008 -37:2:1009 -38:2:1020 -39:2:1021 -40:2:1022 -41:2:1033 -42:2:1038 -43:2:1039 -44:0:2475 -45:2:1051 -46:2:1052 -47:0:2475 -48:2:1056 -49:2:1060 -50:2:1061 -51:2:1069 -52:2:1070 -53:2:1074 -54:2:1075 -55:2:1083 -56:2:1088 -57:2:1089 -58:2:1100 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-1860:0:2475 -1861:2:2416 -1862:0:2475 -1863:2:2421 -1864:0:2475 -1865:1:483 -1866:1:487 -1867:1:488 -1868:1:496 -1869:1:497 -1870:1:498 -1871:1:510 -1872:1:515 -1873:1:519 -1874:1:520 -1875:1:527 -1876:1:528 -1877:1:539 -1878:1:540 -1879:1:541 -1880:1:552 -1881:1:557 -1882:1:558 -1883:0:2475 -1884:2:2422 -1885:0:2475 -1886:1:570 -1887:0:2473 -1888:2:2421 -1889:0:2479 -1890:1:151 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.define b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.log deleted file mode 100644 index 6a9d040..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.log +++ /dev/null @@ -1,349 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 567) -pan: claim violated! (at depth 1353) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3705, errors: 1 - 216253 states, stored - 2924019 states, matched - 3140272 transitions (= stored+matched) - 11791015 atomic steps -hash conflicts: 155585 (resolved) - -Stats on memory usage (in Megabytes): - 17.324 equivalent memory usage for states (stored*(State-vector + overhead)) - 13.576 actual memory usage for states (compression: 78.37%) - state-vector as stored = 38 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 479.338 total actual memory usage - -unreached in proctype urcu_reader - line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 61, "(1)" - line 308, "pan.___", state 91, "(1)" - line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 149, "(1)" - line 308, "pan.___", state 179, "(1)" - line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 238, "(1)" - line 308, "pan.___", state 268, "(1)" - line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 291, "(1)" - line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 300, "(1)" - line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 301, "else" - line 161, "pan.___", state 306, "((j<1))" - line 161, "pan.___", state 306, "((j>=1))" - line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 321, "(1)" - line 148, "pan.___", state 329, "(1)" - line 148, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 330, "else" - line 146, "pan.___", state 335, "((j<1))" - line 146, "pan.___", state 335, "((j>=1))" - line 152, "pan.___", state 341, "(1)" - line 152, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 342, "else" - line 154, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 345, "else" - line 186, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 347, "else" - line 159, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 152, "pan.___", state 404, "(1)" - line 152, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 421, "(1)" - line 163, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 430, "(1)" - line 163, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 431, "else" - line 161, "pan.___", state 436, "((j<1))" - line 161, "pan.___", state 436, "((j>=1))" - line 167, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 451, "(1)" - line 148, "pan.___", state 459, "(1)" - line 148, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 460, "else" - line 146, "pan.___", state 465, "((j<1))" - line 146, "pan.___", state 465, "((j>=1))" - line 152, "pan.___", state 471, "(1)" - line 152, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 472, "else" - line 154, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 475, "else" - line 186, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 477, "else" - line 289, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 537, "(1)" - line 308, "pan.___", state 567, "(1)" - line 289, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 625, "(1)" - line 308, "pan.___", state 655, "(1)" - line 289, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 713, "(1)" - line 308, "pan.___", state 743, "(1)" - line 159, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 760, "(1)" - line 163, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 769, "(1)" - line 163, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 770, "else" - line 161, "pan.___", state 775, "((j<1))" - line 161, "pan.___", state 775, "((j>=1))" - line 167, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 790, "(1)" - line 148, "pan.___", state 798, "(1)" - line 148, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 799, "else" - line 146, "pan.___", state 804, "((j<1))" - line 146, "pan.___", state 804, "((j>=1))" - line 152, "pan.___", state 810, "(1)" - line 152, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 811, "else" - line 154, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 814, "else" - line 186, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 816, "else" - line 159, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 167, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 152, "pan.___", state 873, "(1)" - line 152, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 890, "(1)" - line 163, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 899, "(1)" - line 163, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 163, "pan.___", state 900, "else" - line 161, "pan.___", state 905, "((j<1))" - line 161, "pan.___", state 905, "((j>=1))" - line 167, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 920, "(1)" - line 148, "pan.___", state 928, "(1)" - line 148, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 148, "pan.___", state 929, "else" - line 146, "pan.___", state 934, "((j<1))" - line 146, "pan.___", state 934, "((j>=1))" - line 152, "pan.___", state 940, "(1)" - line 152, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 152, "pan.___", state 941, "else" - line 154, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 154, "pan.___", state 944, "else" - line 186, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 186, "pan.___", state 946, "else" - line 289, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1001, "(1)" - line 308, "pan.___", state 1031, "(1)" - line 289, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 1097, "(1)" - line 308, "pan.___", state 1127, "(1)" - line 434, "pan.___", state 1140, "-end-" - (125 of 1140 states) -unreached in proctype urcu_writer - line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 59, "(1)" - line 303, "pan.___", state 72, "(1)" - line 308, "pan.___", state 89, "(1)" - line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 151, "(1)" - line 303, "pan.___", state 164, "(1)" - line 468, "pan.___", state 195, "(1)" - line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 237, "(1)" - line 148, "pan.___", state 245, "(1)" - line 152, "pan.___", state 257, "(1)" - line 159, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 299, "pan.___", state 923, "(1)" - line 299, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 299, "pan.___", state 924, "else" - line 299, "pan.___", state 927, "(1)" - line 299, "pan.___", state 928, "(1)" - line 299, "pan.___", state 928, "(1)" - line 303, "pan.___", state 936, "(1)" - line 303, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 303, "pan.___", state 937, "else" - line 303, "pan.___", state 940, "(1)" - line 303, "pan.___", state 941, "(1)" - line 303, "pan.___", state 941, "(1)" - line 301, "pan.___", state 946, "((i<1))" - line 301, "pan.___", state 946, "((i>=1))" - line 308, "pan.___", state 953, "(1)" - line 308, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 308, "pan.___", state 954, "else" - line 308, "pan.___", state 957, "(1)" - line 308, "pan.___", state 958, "(1)" - line 308, "pan.___", state 958, "(1)" - line 310, "pan.___", state 961, "(1)" - line 310, "pan.___", state 961, "(1)" - line 163, "pan.___", state 985, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 167, "pan.___", state 998, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 144, "pan.___", state 1008, "(1)" - line 148, "pan.___", state 1016, "(1)" - line 152, "pan.___", state 1028, "(1)" - line 159, "pan.___", state 1039, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 519, "pan.___", state 20, "((j<2))" - line 519, "pan.___", state 20, "((j>=2))" - line 524, "pan.___", state 33, "((j<2))" - line 524, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 572, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 5.58 seconds -pan: rate 38755.018 states/second -pan: avg transition delay 1.7769e-06 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input deleted file mode 100644 index 244a7b2..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,532 +0,0 @@ -#define SINGLE_FLIP - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - - -#if (NR_READERS == 1) - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#elif (NR_READERS == 2) - -#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) -#define read_free (free_done && (data_access[0] || data_access[1])) - -#else - -#error "Too many readers" - -#endif - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - atomic { - if - :: get_readerid() == 0 -> -progress_reader: - skip; - :: else -> - skip; - fi; - } -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 363553e..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1356 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2372 -2:3:2324 -3:3:2327 -4:3:2327 -5:3:2330 -6:3:2338 -7:3:2338 -8:3:2341 -9:3:2347 -10:3:2351 -11:3:2351 -12:3:2354 -13:3:2362 -14:3:2366 -15:3:2367 -16:0:2372 -17:3:2369 -18:0:2372 -19:2:1142 -20:0:2372 -21:2:1148 -22:0:2372 -23:2:1149 -24:0:2372 -25:2:1150 -26:2:1154 -27:2:1155 -28:2:1163 -29:2:1164 -30:2:1168 -31:2:1169 -32:2:1177 -33:2:1182 -34:2:1186 -35:2:1187 -36:2:1194 -37:2:1195 -38:2:1206 -39:2:1207 -40:2:1208 -41:2:1219 -42:2:1224 -43:2:1225 -44:0:2372 -45:2:1237 -46:2:1238 -47:0:2372 -48:2:1242 -49:2:1246 -50:2:1247 -51:2:1255 -52:2:1256 -53:2:1260 -54:2:1261 -55:2:1269 -56:2:1274 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a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.define b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.log deleted file mode 100644 index ceb438f..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.log +++ /dev/null @@ -1,16 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -spin: line 296 replacement value: tmp -spin: line 296 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' -spin: 1 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input deleted file mode 100644 index cc55960..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input +++ /dev/null @@ -1,410 +0,0 @@ -#define READER_PROGRESS -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.define b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.log deleted file mode 100644 index 985f839..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.log +++ /dev/null @@ -1,14 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -w -DHASH64 -o pan pan.c diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input deleted file mode 100644 index 28f1299..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input +++ /dev/null @@ -1,410 +0,0 @@ -#define WRITER_PROGRESS -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.define b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.log b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.log deleted file mode 100644 index 26b6236..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.log +++ /dev/null @@ -1,16 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -spin: line 297 replacement value: tmp -spin: line 297 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' -spin: 1 error(s) - aborting -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input deleted file mode 100644 index 43e979c..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input +++ /dev/null @@ -1,411 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#define read_free_race (read_generation == last_free_gen) -#define read_free (free_done && data_access) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define get_pid() (_pid) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces - * both. - */ - -#define DECLARE_CACHED_VAR(type, x, v) \ - type mem_##x = v; \ - type cached_##x[NR_PROCS] = v; \ - bit cache_dirty_##x[NR_PROCS] = 0 - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) - -#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x[get_pid()] = v; \ - cache_dirty_##x[get_pid()] = 1; \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x[id]; \ - cache_dirty_##x[id] = 0; \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - CACHE_READ_FROM_MEM(urcu_active_readers_one, i); - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i); -#endif -#ifndef NO_RMB - smp_rmb_pid(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid()); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid()); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i); -#endif -#ifndef NO_RMB - smp_rmb(i); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); -/* Note ! currently only one reader */ -DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr, 0); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation = 1; -bit data_access = 0; - -bit write_lock = 0; - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, - get_pid()); - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, id, i) -{ - do - :: 1 -> - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (tmp & RCU_GP_CTR_NEST_MASK) - && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i); -#else - ooo_mem(i); -#endif - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, i, j) -{ - i = 0; - do - :: i < NR_READERS -> - wait_for_reader(tmp, i, j); - if - :: (NR_READERS > 1) && (i < NR_READERS - 1) - -> ooo_mem(j); - :: else - -> skip; - fi; - i++ - :: i >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers_one, - tmp + 1); - fi; - smp_mb(i); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access = 1; - ooo_mem(i); - data_access = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i); - tmp2 = READ_CACHED_VAR(urcu_active_readers_one); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active [NR_READERS] proctype urcu_reader() -{ - byte i, nest_i; - byte tmp, tmp2; - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, nest_i, tmp, tmp2); - od; -} - -/* Model the RCU update process. */ - -active [NR_WRITERS] proctype urcu_writer() -{ - byte i, j; - byte tmp; - byte old_gen; - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - //smp_mc(i); - wait_for_quiescent_state(tmp, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - wait_for_quiescent_state(tmp, i, j); -#endif - smp_mb(i); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - skip; - od; -} diff --git a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index ff6f1c5..0000000 --- a/formal-model/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail +++ 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-4570:2:1821 -4571:0:2227 -4572:2:1822 -4573:0:2227 -4574:1:4 -4575:1:8 -4576:1:9 -4577:1:16 -4578:1:17 -4579:1:28 -4580:1:32 -4581:1:33 -4582:1:40 -4583:1:41 -4584:1:51 -4585:1:52 -4586:1:62 -4587:1:63 diff --git a/formal-model/urcu/result-signal-over-writer/urcu.sh b/formal-model/urcu/result-signal-over-writer/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu/result-signal-over-writer/urcu.spin b/formal-model/urcu/result-signal-over-writer/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free.log b/formal-model/urcu/result-signal-over-writer/urcu_free.log deleted file mode 100644 index 9a22c47..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free.log +++ /dev/null @@ -1,345 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 741) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10669, errors: 0 - 20146 states, stored - 191615 states, matched - 211761 transitions (= stored+matched) - 712676 atomic steps -hash conflicts: 1523 (resolved) - -Stats on memory usage (in Megabytes): - 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.661 actual memory usage for states (unsuccessful compression: 102.92%) - state-vector as stored = 58 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.326 total actual memory usage - -unreached in proctype urcu_reader_sig - line 401, "pan.___", state 330, "(1)" - line 612, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 397, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 406, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, "pan.___", state 59, "(1)" - line 416, "pan.___", state 89, "(1)" - line 397, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 160, "(1)" - line 650, "pan.___", state 213, "(1)" - line 173, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 177, "pan.___", state 233, "(1)" - line 158, "pan.___", state 254, "(1)" - line 162, "pan.___", state 262, "(1)" - line 166, "pan.___", state 274, "(1)" - line 173, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 752, "(1)" - line 162, "pan.___", state 760, "(1)" - line 162, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 761, "else" - line 160, "pan.___", state 766, "((j<1))" - line 160, "pan.___", state 766, "((j>=1))" - line 166, "pan.___", state 772, "(1)" - line 166, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 773, "else" - line 168, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 776, "else" - line 173, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, "pan.___", state 835, "(1)" - line 166, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, "pan.___", state 852, "(1)" - line 177, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, "pan.___", state 861, "(1)" - line 177, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, "pan.___", state 862, "else" - line 175, "pan.___", state 867, "((j<1))" - line 175, "pan.___", state 867, "((j>=1))" - line 181, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 882, "(1)" - line 162, "pan.___", state 890, "(1)" - line 162, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 891, "else" - line 160, "pan.___", state 896, "((j<1))" - line 160, "pan.___", state 896, "((j>=1))" - line 166, "pan.___", state 902, "(1)" - line 166, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 903, "else" - line 168, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 906, "else" - line 200, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, "pan.___", state 908, "else" - line 219, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, "pan.___", state 909, "else" - line 354, "pan.___", state 915, "((sighand_exec==1))" - line 354, "pan.___", state 915, "else" - line 360, "pan.___", state 918, "sighand_exec = 1" - line 397, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, "pan.___", state 933, "(1)" - line 397, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, "pan.___", state 934, "else" - line 397, "pan.___", state 937, "(1)" - line 401, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, "pan.___", state 947, "(1)" - line 401, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, "pan.___", state 948, "else" - line 401, "pan.___", state 951, "(1)" - line 401, "pan.___", state 952, "(1)" - line 401, "pan.___", state 952, "(1)" - line 399, "pan.___", state 957, "((i<1))" - line 399, "pan.___", state 957, "((i>=1))" - line 406, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, "pan.___", state 976, "(1)" - line 407, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, "pan.___", state 977, "else" - line 407, "pan.___", state 980, "(1)" - line 407, "pan.___", state 981, "(1)" - line 407, "pan.___", state 981, "(1)" - line 411, "pan.___", state 989, "(1)" - line 411, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, "pan.___", state 990, "else" - line 411, "pan.___", state 993, "(1)" - line 411, "pan.___", state 994, "(1)" - line 411, "pan.___", state 994, "(1)" - line 409, "pan.___", state 999, "((i<1))" - line 409, "pan.___", state 999, "((i>=1))" - line 416, "pan.___", state 1006, "(1)" - line 416, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, "pan.___", state 1007, "else" - line 416, "pan.___", state 1010, "(1)" - line 416, "pan.___", state 1011, "(1)" - line 416, "pan.___", state 1011, "(1)" - line 418, "pan.___", state 1014, "(1)" - line 418, "pan.___", state 1014, "(1)" - line 360, "pan.___", state 1023, "sighand_exec = 1" - line 401, "pan.___", state 1054, "(1)" - line 406, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1113, "(1)" - line 401, "pan.___", state 1151, "(1)" - line 406, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1210, "(1)" - line 397, "pan.___", state 1236, "(1)" - line 401, "pan.___", state 1250, "(1)" - line 406, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1309, "(1)" - line 401, "pan.___", state 1350, "(1)" - line 406, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 416, "pan.___", state 1409, "(1)" - line 173, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, "pan.___", state 1432, "(1)" - line 177, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, "pan.___", state 1441, "(1)" - line 177, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, "pan.___", state 1442, "else" - line 175, "pan.___", state 1447, "((j<1))" - line 175, "pan.___", state 1447, "((j>=1))" - line 181, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 1462, "(1)" - line 162, "pan.___", state 1470, "(1)" - line 162, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 1471, "else" - line 160, "pan.___", state 1476, "((j<1))" - line 160, "pan.___", state 1476, "((j>=1))" - line 166, "pan.___", state 1482, "(1)" - line 166, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 1483, "else" - line 168, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 1486, "else" - line 173, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 181, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 166, "pan.___", state 1545, "(1)" - line 166, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 173, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 173, "pan.___", state 1562, "(1)" - line 177, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 177, "pan.___", state 1571, "(1)" - line 177, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 177, "pan.___", state 1572, "else" - line 175, "pan.___", state 1577, "((j<1))" - line 175, "pan.___", state 1577, "((j>=1))" - line 181, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 1592, "(1)" - line 162, "pan.___", state 1600, "(1)" - line 162, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 162, "pan.___", state 1601, "else" - line 160, "pan.___", state 1606, "((j<1))" - line 160, "pan.___", state 1606, "((j>=1))" - line 166, "pan.___", state 1612, "(1)" - line 166, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 166, "pan.___", state 1613, "else" - line 168, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 168, "pan.___", state 1616, "else" - line 200, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 200, "pan.___", state 1618, "else" - line 219, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 219, "pan.___", state 1619, "else" - line 354, "pan.___", state 1625, "((sighand_exec==1))" - line 354, "pan.___", state 1625, "else" - line 360, "pan.___", state 1628, "sighand_exec = 1" - line 397, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 397, "pan.___", state 1643, "(1)" - line 397, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 397, "pan.___", state 1644, "else" - line 397, "pan.___", state 1647, "(1)" - line 401, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 401, "pan.___", state 1657, "(1)" - line 401, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 401, "pan.___", state 1658, "else" - line 401, "pan.___", state 1661, "(1)" - line 401, "pan.___", state 1662, "(1)" - line 401, "pan.___", state 1662, "(1)" - line 399, "pan.___", state 1667, "((i<1))" - line 399, "pan.___", state 1667, "((i>=1))" - line 406, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 407, "pan.___", state 1686, "(1)" - line 407, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 407, "pan.___", state 1687, "else" - line 407, "pan.___", state 1690, "(1)" - line 407, "pan.___", state 1691, "(1)" - line 407, "pan.___", state 1691, "(1)" - line 411, "pan.___", state 1699, "(1)" - line 411, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 411, "pan.___", state 1700, "else" - line 411, "pan.___", state 1703, "(1)" - line 411, "pan.___", state 1704, "(1)" - line 411, "pan.___", state 1704, "(1)" - line 409, "pan.___", state 1709, "((i<1))" - line 409, "pan.___", state 1709, "((i>=1))" - line 416, "pan.___", state 1716, "(1)" - line 416, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 416, "pan.___", state 1717, "else" - line 416, "pan.___", state 1720, "(1)" - line 416, "pan.___", state 1721, "(1)" - line 416, "pan.___", state 1721, "(1)" - line 418, "pan.___", state 1724, "(1)" - line 418, "pan.___", state 1724, "(1)" - line 360, "pan.___", state 1733, "sighand_exec = 1" - line 177, "pan.___", state 1758, "(1)" - line 181, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 158, "pan.___", state 1779, "(1)" - line 162, "pan.___", state 1787, "(1)" - line 166, "pan.___", state 1799, "(1)" - line 173, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free.spin.input b/formal-model/urcu/result-signal-over-writer/urcu_free.spin.input deleted file mode 100644 index 953115f..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free.spin.input +++ /dev/null @@ -1,721 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_free.spin.input.trail deleted file mode 100644 index 837f3d9..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free.spin.input.trail +++ /dev/null @@ -1,15043 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 -21:4:4355 -22:4:4359 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a/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.log b/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.log deleted file mode 100644 index 4cee7dc..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.log +++ /dev/null @@ -1,382 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 72 byte, depth reached 10856, errors: 0 - 161519 states, stored - 1724866 states, matched - 1886385 transitions (= stored+matched) - 6692565 atomic steps -hash conflicts: 84009 (resolved) - -Stats on memory usage (in Megabytes): - 15.404 equivalent memory usage for states (stored*(State-vector + overhead)) - 10.421 actual memory usage for states (compression: 67.65%) - state-vector as stored = 40 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 476.115 total actual memory usage - -unreached in proctype urcu_reader_sig - line 403, "pan.___", state 330, "(1)" - line 614, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 652, "pan.___", state 213, "(1)" - line 403, "pan.___", state 239, "(1)" - line 403, "pan.___", state 525, "(1)" - line 399, "pan.___", state 610, "(1)" - line 403, "pan.___", state 624, "(1)" - line 403, "pan.___", state 724, "(1)" - line 399, "pan.___", state 805, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 807, "(1)" - line 399, "pan.___", state 808, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 808, "else" - line 399, "pan.___", state 811, "(1)" - line 403, "pan.___", state 819, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 821, "(1)" - line 403, "pan.___", state 822, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 822, "else" - line 403, "pan.___", state 825, "(1)" - line 403, "pan.___", state 826, "(1)" - line 403, "pan.___", state 826, "(1)" - line 401, "pan.___", state 831, "((j<1))" - line 401, "pan.___", state 831, "((j>=1))" - line 408, "pan.___", state 837, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 850, "(1)" - line 409, "pan.___", state 851, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 851, "else" - line 409, "pan.___", state 854, "(1)" - line 409, "pan.___", state 855, "(1)" - line 409, "pan.___", state 855, "(1)" - line 413, "pan.___", state 863, "(1)" - line 413, "pan.___", state 864, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 864, "else" - line 413, "pan.___", state 867, "(1)" - line 413, "pan.___", state 868, "(1)" - line 413, "pan.___", state 868, "(1)" - line 411, "pan.___", state 873, "((j<1))" - line 411, "pan.___", state 873, "((j>=1))" - line 418, "pan.___", state 880, "(1)" - line 418, "pan.___", state 881, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 881, "else" - line 418, "pan.___", state 884, "(1)" - line 418, "pan.___", state 885, "(1)" - line 418, "pan.___", state 885, "(1)" - line 399, "pan.___", state 896, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 898, "(1)" - line 399, "pan.___", state 899, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 899, "else" - line 399, "pan.___", state 902, "(1)" - line 403, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 912, "(1)" - line 403, "pan.___", state 913, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 913, "else" - line 403, "pan.___", state 916, "(1)" - line 403, "pan.___", state 917, "(1)" - line 403, "pan.___", state 917, "(1)" - line 401, "pan.___", state 922, "((j<1))" - line 401, "pan.___", state 922, "((j>=1))" - line 408, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 941, "(1)" - line 409, "pan.___", state 942, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 942, "else" - line 409, "pan.___", state 945, "(1)" - line 409, "pan.___", state 946, "(1)" - line 409, "pan.___", state 946, "(1)" - line 413, "pan.___", state 954, "(1)" - line 413, "pan.___", state 955, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 955, "else" - line 413, "pan.___", state 958, "(1)" - line 413, "pan.___", state 959, "(1)" - line 413, "pan.___", state 959, "(1)" - line 411, "pan.___", state 964, "((j<1))" - line 411, "pan.___", state 964, "((j>=1))" - line 418, "pan.___", state 971, "(1)" - line 418, "pan.___", state 972, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 972, "else" - line 418, "pan.___", state 975, "(1)" - line 418, "pan.___", state 976, "(1)" - line 418, "pan.___", state 976, "(1)" - line 194, "pan.___", state 981, "(1)" - line 194, "pan.___", state 981, "(1)" - line 214, "pan.___", state 985, "((i<1))" - line 214, "pan.___", state 985, "((i>=1))" - line 399, "pan.___", state 991, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 993, "(1)" - line 399, "pan.___", state 994, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 994, "else" - line 399, "pan.___", state 997, "(1)" - line 403, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1007, "(1)" - line 403, "pan.___", state 1008, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1008, "else" - line 403, "pan.___", state 1011, "(1)" - line 403, "pan.___", state 1012, "(1)" - line 403, "pan.___", state 1012, "(1)" - line 401, "pan.___", state 1017, "((j<1))" - line 401, "pan.___", state 1017, "((j>=1))" - line 408, "pan.___", state 1023, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1036, "(1)" - line 409, "pan.___", state 1037, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1037, "else" - line 409, "pan.___", state 1040, "(1)" - line 409, "pan.___", state 1041, "(1)" - line 409, "pan.___", state 1041, "(1)" - line 413, "pan.___", state 1049, "(1)" - line 413, "pan.___", state 1050, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1050, "else" - line 413, "pan.___", state 1053, "(1)" - line 413, "pan.___", state 1054, "(1)" - line 413, "pan.___", state 1054, "(1)" - line 411, "pan.___", state 1059, "((j<1))" - line 411, "pan.___", state 1059, "((j>=1))" - line 418, "pan.___", state 1066, "(1)" - line 418, "pan.___", state 1067, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1067, "else" - line 418, "pan.___", state 1070, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 194, "pan.___", state 1076, "(1)" - line 194, "pan.___", state 1076, "(1)" - line 221, "pan.___", state 1077, "(1)" - line 221, "pan.___", state 1077, "(1)" - line 356, "pan.___", state 1083, "((sighand_exec==1))" - line 356, "pan.___", state 1083, "else" - line 362, "pan.___", state 1086, "sighand_exec = 1" - line 399, "pan.___", state 1099, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1101, "(1)" - line 399, "pan.___", state 1102, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1102, "else" - line 399, "pan.___", state 1105, "(1)" - line 403, "pan.___", state 1113, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1115, "(1)" - line 403, "pan.___", state 1116, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1116, "else" - line 403, "pan.___", state 1119, "(1)" - line 403, "pan.___", state 1120, "(1)" - line 403, "pan.___", state 1120, "(1)" - line 401, "pan.___", state 1125, "((i<1))" - line 401, "pan.___", state 1125, "((i>=1))" - line 408, "pan.___", state 1131, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1144, "(1)" - line 409, "pan.___", state 1145, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1145, "else" - line 409, "pan.___", state 1148, "(1)" - line 409, "pan.___", state 1149, "(1)" - line 409, "pan.___", state 1149, "(1)" - line 413, "pan.___", state 1157, "(1)" - line 413, "pan.___", state 1158, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1158, "else" - line 413, "pan.___", state 1161, "(1)" - line 413, "pan.___", state 1162, "(1)" - line 413, "pan.___", state 1162, "(1)" - line 411, "pan.___", state 1167, "((i<1))" - line 411, "pan.___", state 1167, "((i>=1))" - line 418, "pan.___", state 1174, "(1)" - line 418, "pan.___", state 1175, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1175, "else" - line 418, "pan.___", state 1178, "(1)" - line 418, "pan.___", state 1179, "(1)" - line 418, "pan.___", state 1179, "(1)" - line 420, "pan.___", state 1182, "(1)" - line 420, "pan.___", state 1182, "(1)" - line 362, "pan.___", state 1191, "sighand_exec = 1" - line 403, "pan.___", state 1222, "(1)" - line 403, "pan.___", state 1319, "(1)" - line 399, "pan.___", state 1404, "(1)" - line 403, "pan.___", state 1418, "(1)" - line 403, "pan.___", state 1518, "(1)" - line 399, "pan.___", state 1599, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1601, "(1)" - line 399, "pan.___", state 1602, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1602, "else" - line 399, "pan.___", state 1605, "(1)" - line 403, "pan.___", state 1613, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1615, "(1)" - line 403, "pan.___", state 1616, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1616, "else" - line 403, "pan.___", state 1619, "(1)" - line 403, "pan.___", state 1620, "(1)" - line 403, "pan.___", state 1620, "(1)" - line 401, "pan.___", state 1625, "((j<1))" - line 401, "pan.___", state 1625, "((j>=1))" - line 408, "pan.___", state 1631, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1644, "(1)" - line 409, "pan.___", state 1645, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1645, "else" - line 409, "pan.___", state 1648, "(1)" - line 409, "pan.___", state 1649, "(1)" - line 409, "pan.___", state 1649, "(1)" - line 413, "pan.___", state 1657, "(1)" - line 413, "pan.___", state 1658, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1658, "else" - line 413, "pan.___", state 1661, "(1)" - line 413, "pan.___", state 1662, "(1)" - line 413, "pan.___", state 1662, "(1)" - line 411, "pan.___", state 1667, "((j<1))" - line 411, "pan.___", state 1667, "((j>=1))" - line 418, "pan.___", state 1674, "(1)" - line 418, "pan.___", state 1675, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1675, "else" - line 418, "pan.___", state 1678, "(1)" - line 418, "pan.___", state 1679, "(1)" - line 418, "pan.___", state 1679, "(1)" - line 399, "pan.___", state 1690, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1692, "(1)" - line 399, "pan.___", state 1693, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1693, "else" - line 399, "pan.___", state 1696, "(1)" - line 403, "pan.___", state 1704, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1706, "(1)" - line 403, "pan.___", state 1707, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1707, "else" - line 403, "pan.___", state 1710, "(1)" - line 403, "pan.___", state 1711, "(1)" - line 403, "pan.___", state 1711, "(1)" - line 401, "pan.___", state 1716, "((j<1))" - line 401, "pan.___", state 1716, "((j>=1))" - line 408, "pan.___", state 1722, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1735, "(1)" - line 409, "pan.___", state 1736, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1736, "else" - line 409, "pan.___", state 1739, "(1)" - line 409, "pan.___", state 1740, "(1)" - line 409, "pan.___", state 1740, "(1)" - line 413, "pan.___", state 1748, "(1)" - line 413, "pan.___", state 1749, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1749, "else" - line 413, "pan.___", state 1752, "(1)" - line 413, "pan.___", state 1753, "(1)" - line 413, "pan.___", state 1753, "(1)" - line 411, "pan.___", state 1758, "((j<1))" - line 411, "pan.___", state 1758, "((j>=1))" - line 418, "pan.___", state 1765, "(1)" - line 418, "pan.___", state 1766, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1766, "else" - line 418, "pan.___", state 1769, "(1)" - line 418, "pan.___", state 1770, "(1)" - line 418, "pan.___", state 1770, "(1)" - line 194, "pan.___", state 1775, "(1)" - line 194, "pan.___", state 1775, "(1)" - line 214, "pan.___", state 1779, "((i<1))" - line 214, "pan.___", state 1779, "((i>=1))" - line 399, "pan.___", state 1785, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1787, "(1)" - line 399, "pan.___", state 1788, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1788, "else" - line 399, "pan.___", state 1791, "(1)" - line 403, "pan.___", state 1799, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1801, "(1)" - line 403, "pan.___", state 1802, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1802, "else" - line 403, "pan.___", state 1805, "(1)" - line 403, "pan.___", state 1806, "(1)" - line 403, "pan.___", state 1806, "(1)" - line 401, "pan.___", state 1811, "((j<1))" - line 401, "pan.___", state 1811, "((j>=1))" - line 408, "pan.___", state 1817, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1830, "(1)" - line 409, "pan.___", state 1831, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1831, "else" - line 409, "pan.___", state 1834, "(1)" - line 409, "pan.___", state 1835, "(1)" - line 409, "pan.___", state 1835, "(1)" - line 413, "pan.___", state 1843, "(1)" - line 413, "pan.___", state 1844, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1844, "else" - line 413, "pan.___", state 1847, "(1)" - line 413, "pan.___", state 1848, "(1)" - line 413, "pan.___", state 1848, "(1)" - line 411, "pan.___", state 1853, "((j<1))" - line 411, "pan.___", state 1853, "((j>=1))" - line 418, "pan.___", state 1860, "(1)" - line 418, "pan.___", state 1861, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1861, "else" - line 418, "pan.___", state 1864, "(1)" - line 418, "pan.___", state 1865, "(1)" - line 418, "pan.___", state 1865, "(1)" - line 194, "pan.___", state 1870, "(1)" - line 194, "pan.___", state 1870, "(1)" - line 221, "pan.___", state 1871, "(1)" - line 221, "pan.___", state 1871, "(1)" - line 356, "pan.___", state 1877, "((sighand_exec==1))" - line 356, "pan.___", state 1877, "else" - line 362, "pan.___", state 1880, "sighand_exec = 1" - line 399, "pan.___", state 1893, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1895, "(1)" - line 399, "pan.___", state 1896, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1896, "else" - line 399, "pan.___", state 1899, "(1)" - line 403, "pan.___", state 1907, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1909, "(1)" - line 403, "pan.___", state 1910, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1910, "else" - line 403, "pan.___", state 1913, "(1)" - line 403, "pan.___", state 1914, "(1)" - line 403, "pan.___", state 1914, "(1)" - line 401, "pan.___", state 1919, "((i<1))" - line 401, "pan.___", state 1919, "((i>=1))" - line 408, "pan.___", state 1925, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1938, "(1)" - line 409, "pan.___", state 1939, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1939, "else" - line 409, "pan.___", state 1942, "(1)" - line 409, "pan.___", state 1943, "(1)" - line 409, "pan.___", state 1943, "(1)" - line 413, "pan.___", state 1951, "(1)" - line 413, "pan.___", state 1952, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1952, "else" - line 413, "pan.___", state 1955, "(1)" - line 413, "pan.___", state 1956, "(1)" - line 413, "pan.___", state 1956, "(1)" - line 411, "pan.___", state 1961, "((i<1))" - line 411, "pan.___", state 1961, "((i>=1))" - line 418, "pan.___", state 1968, "(1)" - line 418, "pan.___", state 1969, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1969, "else" - line 418, "pan.___", state 1972, "(1)" - line 418, "pan.___", state 1973, "(1)" - line 418, "pan.___", state 1973, "(1)" - line 420, "pan.___", state 1976, "(1)" - line 420, "pan.___", state 1976, "(1)" - line 362, "pan.___", state 1985, "sighand_exec = 1" - line 403, "pan.___", state 2016, "(1)" - line 702, "pan.___", state 2304, "-end-" - (221 of 2304 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 748, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.47 seconds -pan: rate 109876.87 states/second -pan: avg transition delay 7.7927e-07 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input b/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input deleted file mode 100644 index 48411ec..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 00fba51..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2172 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4249 -2:4:4201 -3:4:4204 -4:4:4204 -5:4:4207 -6:4:4215 -7:4:4215 -8:4:4218 -9:4:4224 -10:4:4228 -11:4:4228 -12:4:4231 -13:4:4239 -14:4:4243 -15:4:4244 -16:0:4249 -17:4:4246 -18:0:4249 -19:3:1991 -20:0:4249 -21:3:1997 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b/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.log b/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.log deleted file mode 100644 index 5eb694e..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.log +++ /dev/null @@ -1,280 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10519, errors: 0 - 20146 states, stored - 191615 states, matched - 211761 transitions (= stored+matched) - 711676 atomic steps -hash conflicts: 1222 (resolved) - -Stats on memory usage (in Megabytes): - 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.509 actual memory usage for states (compression: 93.51%) - state-vector as stored = 51 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.229 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 174, "pan.___", state 257, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 658, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 660, "(1)" - line 182, "pan.___", state 661, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 661, "else" - line 174, "pan.___", state 671, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 693, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 174, "pan.___", state 710, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 712, "(1)" - line 178, "pan.___", state 719, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 721, "(1)" - line 178, "pan.___", state 722, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 722, "else" - line 176, "pan.___", state 727, "((j<1))" - line 176, "pan.___", state 727, "((j>=1))" - line 182, "pan.___", state 732, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 734, "(1)" - line 182, "pan.___", state 735, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 735, "else" - line 192, "pan.___", state 740, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 192, "pan.___", state 740, "else" - line 220, "pan.___", state 741, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 741, "else" - line 355, "pan.___", state 747, "((sighand_exec==1))" - line 355, "pan.___", state 747, "else" - line 361, "pan.___", state 750, "sighand_exec = 1" - line 398, "pan.___", state 763, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 765, "(1)" - line 398, "pan.___", state 766, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 766, "else" - line 398, "pan.___", state 769, "(1)" - line 402, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 779, "(1)" - line 402, "pan.___", state 780, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 780, "else" - line 402, "pan.___", state 783, "(1)" - line 402, "pan.___", state 784, "(1)" - line 402, "pan.___", state 784, "(1)" - line 400, "pan.___", state 789, "((i<1))" - line 400, "pan.___", state 789, "((i>=1))" - line 407, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 808, "(1)" - line 408, "pan.___", state 809, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 809, "else" - line 408, "pan.___", state 812, "(1)" - line 408, "pan.___", state 813, "(1)" - line 408, "pan.___", state 813, "(1)" - line 412, "pan.___", state 821, "(1)" - line 412, "pan.___", state 822, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 822, "else" - line 412, "pan.___", state 825, "(1)" - line 412, "pan.___", state 826, "(1)" - line 412, "pan.___", state 826, "(1)" - line 410, "pan.___", state 831, "((i<1))" - line 410, "pan.___", state 831, "((i>=1))" - line 417, "pan.___", state 838, "(1)" - line 417, "pan.___", state 839, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 839, "else" - line 417, "pan.___", state 842, "(1)" - line 417, "pan.___", state 843, "(1)" - line 417, "pan.___", state 843, "(1)" - line 419, "pan.___", state 846, "(1)" - line 419, "pan.___", state 846, "(1)" - line 361, "pan.___", state 855, "sighand_exec = 1" - line 402, "pan.___", state 886, "(1)" - line 407, "pan.___", state 902, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 945, "(1)" - line 402, "pan.___", state 983, "(1)" - line 407, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1042, "(1)" - line 398, "pan.___", state 1068, "(1)" - line 402, "pan.___", state 1082, "(1)" - line 407, "pan.___", state 1098, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1141, "(1)" - line 402, "pan.___", state 1182, "(1)" - line 407, "pan.___", state 1198, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1241, "(1)" - line 174, "pan.___", state 1262, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1264, "(1)" - line 178, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1273, "(1)" - line 178, "pan.___", state 1274, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1274, "else" - line 176, "pan.___", state 1279, "((j<1))" - line 176, "pan.___", state 1279, "((j>=1))" - line 182, "pan.___", state 1284, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 1286, "(1)" - line 182, "pan.___", state 1287, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 1287, "else" - line 174, "pan.___", state 1297, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 174, "pan.___", state 1336, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1338, "(1)" - line 178, "pan.___", state 1345, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1347, "(1)" - line 178, "pan.___", state 1348, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1348, "else" - line 176, "pan.___", state 1353, "((j<1))" - line 176, "pan.___", state 1353, "((j>=1))" - line 182, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 182, "pan.___", state 1360, "(1)" - line 182, "pan.___", state 1361, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" - line 182, "pan.___", state 1361, "else" - line 192, "pan.___", state 1366, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 192, "pan.___", state 1366, "else" - line 220, "pan.___", state 1367, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 1367, "else" - line 355, "pan.___", state 1373, "((sighand_exec==1))" - line 355, "pan.___", state 1373, "else" - line 361, "pan.___", state 1376, "sighand_exec = 1" - line 398, "pan.___", state 1389, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1391, "(1)" - line 398, "pan.___", state 1392, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1392, "else" - line 398, "pan.___", state 1395, "(1)" - line 402, "pan.___", state 1403, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1405, "(1)" - line 402, "pan.___", state 1406, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1406, "else" - line 402, "pan.___", state 1409, "(1)" - line 402, "pan.___", state 1410, "(1)" - line 402, "pan.___", state 1410, "(1)" - line 400, "pan.___", state 1415, "((i<1))" - line 400, "pan.___", state 1415, "((i>=1))" - line 407, "pan.___", state 1421, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1434, "(1)" - line 408, "pan.___", state 1435, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1435, "else" - line 408, "pan.___", state 1438, "(1)" - line 408, "pan.___", state 1439, "(1)" - line 408, "pan.___", state 1439, "(1)" - line 412, "pan.___", state 1447, "(1)" - line 412, "pan.___", state 1448, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1448, "else" - line 412, "pan.___", state 1451, "(1)" - line 412, "pan.___", state 1452, "(1)" - line 412, "pan.___", state 1452, "(1)" - line 410, "pan.___", state 1457, "((i<1))" - line 410, "pan.___", state 1457, "((i>=1))" - line 417, "pan.___", state 1464, "(1)" - line 417, "pan.___", state 1465, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1465, "else" - line 417, "pan.___", state 1468, "(1)" - line 417, "pan.___", state 1469, "(1)" - line 417, "pan.___", state 1469, "(1)" - line 419, "pan.___", state 1472, "(1)" - line 419, "pan.___", state 1472, "(1)" - line 361, "pan.___", state 1481, "sighand_exec = 1" - line 178, "pan.___", state 1506, "(1)" - line 182, "pan.___", state 1517, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1530, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 8219815..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1805 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2905 -2:4:2857 -3:4:2860 -4:4:2860 -5:4:2863 -6:4:2871 -7:4:2871 -8:4:2874 -9:4:2880 -10:4:2884 -11:4:2884 -12:4:2887 -13:4:2895 -14:4:2899 -15:4:2900 -16:0:2905 -17:4:2902 -18:0:2905 -19:3:1319 -20:0:2905 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-1801:3:2851 -1802:0:2909 -1803:3:1630 diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.define b/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.log b/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.log deleted file mode 100644 index a346ed9..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.log +++ /dev/null @@ -1,224 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10499, errors: 0 - 159431 states, stored - 1505398 states, matched - 1664829 transitions (= stored+matched) - 5794809 atomic steps -hash conflicts: 62144 (resolved) - -Stats on memory usage (in Megabytes): - 12.772 equivalent memory usage for states (stored*(State-vector + overhead)) - 8.936 actual memory usage for states (compression: 69.96%) - state-vector as stored = 31 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 474.651 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 651, "pan.___", state 213, "(1)" - line 402, "pan.___", state 348, "(1)" - line 398, "pan.___", state 433, "(1)" - line 402, "pan.___", state 447, "(1)" - line 402, "pan.___", state 547, "(1)" - line 159, "pan.___", state 628, "(1)" - line 163, "pan.___", state 636, "(1)" - line 163, "pan.___", state 637, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 637, "else" - line 161, "pan.___", state 642, "((j<1))" - line 161, "pan.___", state 642, "((j>=1))" - line 167, "pan.___", state 648, "(1)" - line 167, "pan.___", state 649, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 649, "else" - line 159, "pan.___", state 660, "(1)" - line 163, "pan.___", state 668, "(1)" - line 163, "pan.___", state 669, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 167, "pan.___", state 680, "(1)" - line 167, "pan.___", state 681, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 696, "(1)" - line 163, "pan.___", state 704, "(1)" - line 163, "pan.___", state 705, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 705, "else" - line 161, "pan.___", state 710, "((j<1))" - line 161, "pan.___", state 710, "((j>=1))" - line 167, "pan.___", state 716, "(1)" - line 167, "pan.___", state 717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 717, "else" - line 201, "pan.___", state 722, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 201, "pan.___", state 722, "else" - line 220, "pan.___", state 723, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 220, "pan.___", state 723, "else" - line 355, "pan.___", state 729, "((sighand_exec==1))" - line 355, "pan.___", state 729, "else" - line 361, "pan.___", state 732, "sighand_exec = 1" - line 398, "pan.___", state 745, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 747, "(1)" - line 398, "pan.___", state 748, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 748, "else" - line 398, "pan.___", state 751, "(1)" - line 402, "pan.___", state 759, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 761, "(1)" - line 402, "pan.___", state 762, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 762, "else" - line 402, "pan.___", state 765, "(1)" - line 402, "pan.___", state 766, "(1)" - line 402, "pan.___", state 766, "(1)" - line 400, "pan.___", state 771, "((i<1))" - line 400, "pan.___", state 771, "((i>=1))" - line 407, "pan.___", state 777, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 790, "(1)" - line 408, "pan.___", state 791, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 791, "else" - line 408, "pan.___", state 794, "(1)" - line 408, "pan.___", state 795, "(1)" - line 408, "pan.___", state 795, "(1)" - line 412, "pan.___", state 803, "(1)" - line 412, "pan.___", state 804, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 804, "else" - line 412, "pan.___", state 807, "(1)" - line 412, "pan.___", state 808, "(1)" - line 412, "pan.___", state 808, "(1)" - line 410, "pan.___", state 813, "((i<1))" - line 410, "pan.___", state 813, "((i>=1))" - line 417, "pan.___", state 820, "(1)" - line 417, "pan.___", state 821, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 821, "else" - line 417, "pan.___", state 824, "(1)" - line 417, "pan.___", state 825, "(1)" - line 417, "pan.___", state 825, "(1)" - line 419, "pan.___", state 828, "(1)" - line 419, "pan.___", state 828, "(1)" - line 361, "pan.___", state 837, "sighand_exec = 1" - line 402, "pan.___", state 868, "(1)" - line 402, "pan.___", state 965, "(1)" - line 398, "pan.___", state 1050, "(1)" - line 402, "pan.___", state 1064, "(1)" - line 402, "pan.___", state 1164, "(1)" - line 159, "pan.___", state 1245, "(1)" - line 163, "pan.___", state 1253, "(1)" - line 163, "pan.___", state 1254, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1254, "else" - line 161, "pan.___", state 1259, "((j<1))" - line 161, "pan.___", state 1259, "((j>=1))" - line 167, "pan.___", state 1265, "(1)" - line 167, "pan.___", state 1266, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1266, "else" - line 159, "pan.___", state 1277, "(1)" - line 163, "pan.___", state 1285, "(1)" - line 163, "pan.___", state 1286, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" - line 167, "pan.___", state 1297, "(1)" - line 167, "pan.___", state 1298, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 159, "pan.___", state 1313, "(1)" - line 163, "pan.___", state 1321, "(1)" - line 163, "pan.___", state 1322, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1322, "else" - line 161, "pan.___", state 1327, "((j<1))" - line 161, "pan.___", state 1327, "((j>=1))" - line 167, "pan.___", state 1333, "(1)" - line 167, "pan.___", state 1334, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1334, "else" - line 201, "pan.___", state 1339, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 201, "pan.___", state 1339, "else" - line 220, "pan.___", state 1340, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 220, "pan.___", state 1340, "else" - line 355, "pan.___", state 1346, "((sighand_exec==1))" - line 355, "pan.___", state 1346, "else" - line 361, "pan.___", state 1349, "sighand_exec = 1" - line 398, "pan.___", state 1362, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1364, "(1)" - line 398, "pan.___", state 1365, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1365, "else" - line 398, "pan.___", state 1368, "(1)" - line 402, "pan.___", state 1376, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1378, "(1)" - line 402, "pan.___", state 1379, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1379, "else" - line 402, "pan.___", state 1382, "(1)" - line 402, "pan.___", state 1383, "(1)" - line 402, "pan.___", state 1383, "(1)" - line 400, "pan.___", state 1388, "((i<1))" - line 400, "pan.___", state 1388, "((i>=1))" - line 407, "pan.___", state 1394, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1407, "(1)" - line 408, "pan.___", state 1408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1408, "else" - line 408, "pan.___", state 1411, "(1)" - line 408, "pan.___", state 1412, "(1)" - line 408, "pan.___", state 1412, "(1)" - line 412, "pan.___", state 1420, "(1)" - line 412, "pan.___", state 1421, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1421, "else" - line 412, "pan.___", state 1424, "(1)" - line 412, "pan.___", state 1425, "(1)" - line 412, "pan.___", state 1425, "(1)" - line 410, "pan.___", state 1430, "((i<1))" - line 410, "pan.___", state 1430, "((i>=1))" - line 417, "pan.___", state 1437, "(1)" - line 417, "pan.___", state 1438, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1438, "else" - line 417, "pan.___", state 1441, "(1)" - line 417, "pan.___", state 1442, "(1)" - line 417, "pan.___", state 1442, "(1)" - line 419, "pan.___", state 1445, "(1)" - line 419, "pan.___", state 1445, "(1)" - line 361, "pan.___", state 1454, "sighand_exec = 1" - line 701, "pan.___", state 1596, "-end-" - (111 of 1596 states) -unreached in proctype :init: - (0 of 46 states) -unreached in proctype :never: - line 747, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.23 seconds -pan: rate 129618.7 states/second -pan: avg transition delay 7.3881e-07 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input b/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input deleted file mode 100644 index 808154e..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,722 +0,0 @@ -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index 522df0a..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1677 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2833 -2:4:2785 -3:4:2788 -4:4:2788 -5:4:2791 -6:4:2799 -7:4:2799 -8:4:2802 -9:4:2808 -10:4:2812 -11:4:2812 -12:4:2815 -13:4:2823 -14:4:2827 -15:4:2828 -16:0:2833 -17:4:2830 -18:0:2833 -19:3:1283 -20:0:2833 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-1646:3:2696 -1647:3:2703 -1648:3:2706 -1649:3:2707 -1650:3:2711 -1651:3:2716 -1652:0:2833 -1653:3:2727 -1654:0:2833 -1655:3:2732 -1656:3:2739 -1657:3:2740 -1658:3:2747 -1659:3:2752 -1660:0:2833 -1661:3:2767 -1662:0:2833 -1663:3:2769 -1664:0:2833 -1665:3:2770 -1666:0:2833 -1667:3:2773 -1668:0:2833 -1669:3:2778 -1670:0:2833 -1671:2:1071 -1672:0:2831 -1673:3:2779 -1674:0:2837 -1675:1:288 diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.define b/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.log b/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.log deleted file mode 100644 index f854175..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.log +++ /dev/null @@ -1,224 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 6934, errors: 0 - 7626 states, stored - 67235 states, matched - 74861 transitions (= stored+matched) - 248896 atomic steps -hash conflicts: 113 (resolved) - -Stats on memory usage (in Megabytes): - 0.611 equivalent memory usage for states (stored*(State-vector + overhead)) - 0.867 actual memory usage for states (unsuccessful compression: 141.88%) - state-vector as stored = 91 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 466.545 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 159, "pan.___", state 254, "(1)" - line 163, "pan.___", state 262, "(1)" - line 167, "pan.___", state 274, "(1)" - line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 752, "(1)" - line 163, "pan.___", state 760, "(1)" - line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 761, "else" - line 161, "pan.___", state 766, "((j<1))" - line 161, "pan.___", state 766, "((j>=1))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 773, "else" - line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 776, "else" - line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 835, "(1)" - line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 852, "(1)" - line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 861, "(1)" - line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 862, "else" - line 176, "pan.___", state 867, "((j<1))" - line 176, "pan.___", state 867, "((j>=1))" - line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 882, "(1)" - line 163, "pan.___", state 890, "(1)" - line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 891, "else" - line 161, "pan.___", state 896, "((j<1))" - line 161, "pan.___", state 896, "((j>=1))" - line 167, "pan.___", state 902, "(1)" - line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 903, "else" - line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 906, "else" - line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 908, "else" - line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 909, "else" - line 355, "pan.___", state 915, "((sighand_exec==1))" - line 355, "pan.___", state 915, "else" - line 361, "pan.___", state 918, "sighand_exec = 1" - line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 933, "(1)" - line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 934, "else" - line 398, "pan.___", state 937, "(1)" - line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 947, "(1)" - line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 948, "else" - line 402, "pan.___", state 951, "(1)" - line 402, "pan.___", state 952, "(1)" - line 402, "pan.___", state 952, "(1)" - line 400, "pan.___", state 957, "((i<1))" - line 400, "pan.___", state 957, "((i>=1))" - line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 976, "(1)" - line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 977, "else" - line 408, "pan.___", state 980, "(1)" - line 408, "pan.___", state 981, "(1)" - line 408, "pan.___", state 981, "(1)" - line 412, "pan.___", state 989, "(1)" - line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 990, "else" - line 412, "pan.___", state 993, "(1)" - line 412, "pan.___", state 994, "(1)" - line 412, "pan.___", state 994, "(1)" - line 410, "pan.___", state 999, "((i<1))" - line 410, "pan.___", state 999, "((i>=1))" - line 417, "pan.___", state 1006, "(1)" - line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1007, "else" - line 417, "pan.___", state 1010, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 361, "pan.___", state 1023, "sighand_exec = 1" - line 178, "pan.___", state 1048, "(1)" - line 182, "pan.___", state 1059, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1069, "(1)" - line 163, "pan.___", state 1077, "(1)" - line 167, "pan.___", state 1089, "(1)" - line 174, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 84cf653..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1379 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:2904 -2:4:2856 -3:4:2859 -4:4:2859 -5:4:2862 -6:4:2870 -7:4:2870 -8:4:2873 -9:4:2879 -10:4:2883 -11:4:2883 -12:4:2886 -13:4:2894 -14:4:2898 -15:4:2899 -16:0:2904 -17:4:2901 -18:0:2904 -19:3:1655 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deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_reader.log b/formal-model/urcu/result-signal-over-writer/urcu_progress_reader.log deleted file mode 100644 index a1a6122..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_reader.log +++ /dev/null @@ -1,348 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) -depth 12: Claim reached state 9 (line 747) -depth 86: Claim reached state 9 (line 746) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10679, errors: 0 - 38182 states, stored (88898 visited) - 997091 states, matched - 1085989 transitions (= visited+matched) - 3694897 atomic steps -hash conflicts: 9602 (resolved) - -Stats on memory usage (in Megabytes): - 3.059 equivalent memory usage for states (stored*(State-vector + overhead)) - 2.930 actual memory usage for states (compression: 95.79%) - state-vector as stored = 52 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 468.596 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 159, "pan.___", state 254, "(1)" - line 163, "pan.___", state 262, "(1)" - line 167, "pan.___", state 274, "(1)" - line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 752, "(1)" - line 163, "pan.___", state 760, "(1)" - line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 761, "else" - line 161, "pan.___", state 766, "((j<1))" - line 161, "pan.___", state 766, "((j>=1))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 773, "else" - line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 776, "else" - line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 835, "(1)" - line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 852, "(1)" - line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 861, "(1)" - line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 862, "else" - line 176, "pan.___", state 867, "((j<1))" - line 176, "pan.___", state 867, "((j>=1))" - line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 882, "(1)" - line 163, "pan.___", state 890, "(1)" - line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 891, "else" - line 161, "pan.___", state 896, "((j<1))" - line 161, "pan.___", state 896, "((j>=1))" - line 167, "pan.___", state 902, "(1)" - line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 903, "else" - line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 906, "else" - line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 908, "else" - line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 909, "else" - line 355, "pan.___", state 915, "((sighand_exec==1))" - line 355, "pan.___", state 915, "else" - line 361, "pan.___", state 918, "sighand_exec = 1" - line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 933, "(1)" - line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 934, "else" - line 398, "pan.___", state 937, "(1)" - line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 947, "(1)" - line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 948, "else" - line 402, "pan.___", state 951, "(1)" - line 402, "pan.___", state 952, "(1)" - line 402, "pan.___", state 952, "(1)" - line 400, "pan.___", state 957, "((i<1))" - line 400, "pan.___", state 957, "((i>=1))" - line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 976, "(1)" - line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 977, "else" - line 408, "pan.___", state 980, "(1)" - line 408, "pan.___", state 981, "(1)" - line 408, "pan.___", state 981, "(1)" - line 412, "pan.___", state 989, "(1)" - line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 990, "else" - line 412, "pan.___", state 993, "(1)" - line 412, "pan.___", state 994, "(1)" - line 412, "pan.___", state 994, "(1)" - line 410, "pan.___", state 999, "((i<1))" - line 410, "pan.___", state 999, "((i>=1))" - line 417, "pan.___", state 1006, "(1)" - line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1007, "else" - line 417, "pan.___", state 1010, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 361, "pan.___", state 1023, "sighand_exec = 1" - line 402, "pan.___", state 1054, "(1)" - line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1113, "(1)" - line 402, "pan.___", state 1151, "(1)" - line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1210, "(1)" - line 398, "pan.___", state 1236, "(1)" - line 402, "pan.___", state 1250, "(1)" - line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1309, "(1)" - line 402, "pan.___", state 1350, "(1)" - line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1409, "(1)" - line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1432, "(1)" - line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1441, "(1)" - line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1442, "else" - line 176, "pan.___", state 1447, "((j<1))" - line 176, "pan.___", state 1447, "((j>=1))" - line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1462, "(1)" - line 163, "pan.___", state 1470, "(1)" - line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1471, "else" - line 161, "pan.___", state 1476, "((j<1))" - line 161, "pan.___", state 1476, "((j>=1))" - line 167, "pan.___", state 1482, "(1)" - line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1483, "else" - line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1486, "else" - line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 1545, "(1)" - line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1562, "(1)" - line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1571, "(1)" - line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1572, "else" - line 176, "pan.___", state 1577, "((j<1))" - line 176, "pan.___", state 1577, "((j>=1))" - line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1592, "(1)" - line 163, "pan.___", state 1600, "(1)" - line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1601, "else" - line 161, "pan.___", state 1606, "((j<1))" - line 161, "pan.___", state 1606, "((j>=1))" - line 167, "pan.___", state 1612, "(1)" - line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1613, "else" - line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1616, "else" - line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 1618, "else" - line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 1619, "else" - line 355, "pan.___", state 1625, "((sighand_exec==1))" - line 355, "pan.___", state 1625, "else" - line 361, "pan.___", state 1628, "sighand_exec = 1" - line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1643, "(1)" - line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1644, "else" - line 398, "pan.___", state 1647, "(1)" - line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1657, "(1)" - line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1658, "else" - line 402, "pan.___", state 1661, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 400, "pan.___", state 1667, "((i<1))" - line 400, "pan.___", state 1667, "((i>=1))" - line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1686, "(1)" - line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1687, "else" - line 408, "pan.___", state 1690, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 412, "pan.___", state 1699, "(1)" - line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1700, "else" - line 412, "pan.___", state 1703, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 410, "pan.___", state 1709, "((i<1))" - line 410, "pan.___", state 1709, "((i>=1))" - line 417, "pan.___", state 1716, "(1)" - line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1717, "else" - line 417, "pan.___", state 1720, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 361, "pan.___", state 1733, "sighand_exec = 1" - line 178, "pan.___", state 1758, "(1)" - line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1779, "(1)" - line 163, "pan.___", state 1787, "(1)" - line 167, "pan.___", state 1799, "(1)" - line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_reader.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_progress_reader.spin.input.trail deleted file mode 100644 index 7c42af1..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4401 -2:4:4353 -3:4:4356 -4:4:4356 -5:4:4359 -6:4:4367 -7:4:4367 -8:4:4370 -9:4:4376 -10:4:4380 -11:4:4380 -12:4:4383 -13:4:4391 -14:4:4395 -15:4:4396 -16:0:4401 -17:4:4398 -18:0:4401 -19:3:2479 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-1255:3:4347 -1256:0:4405 -1257:3:4346 -1258:0:4405 -1259:2:1348 -1260:0:4405 -1261:3:4347 -1262:0:4405 -1263:2:1347 -1264:0:4405 -1265:3:4346 -1266:0:4405 -1267:1:104 diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.define b/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.log b/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.log deleted file mode 100644 index 02c53cf..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.log +++ /dev/null @@ -1,348 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) -depth 12: Claim reached state 9 (line 747) -depth 28: Claim reached state 9 (line 746) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10679, errors: 0 - 38555 states, stored (92500 visited) - 1044204 states, matched - 1136704 transitions (= visited+matched) - 3867169 atomic steps -hash conflicts: 8572 (resolved) - -Stats on memory usage (in Megabytes): - 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) - 2.930 actual memory usage for states (compression: 94.87%) - state-vector as stored = 52 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 468.596 total actual memory usage - -unreached in proctype urcu_reader_sig - line 402, "pan.___", state 330, "(1)" - line 613, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 59, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 160, "(1)" - line 651, "pan.___", state 213, "(1)" - line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 178, "pan.___", state 233, "(1)" - line 159, "pan.___", state 254, "(1)" - line 163, "pan.___", state 262, "(1)" - line 167, "pan.___", state 274, "(1)" - line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 752, "(1)" - line 163, "pan.___", state 760, "(1)" - line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 761, "else" - line 161, "pan.___", state 766, "((j<1))" - line 161, "pan.___", state 766, "((j>=1))" - line 167, "pan.___", state 772, "(1)" - line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 773, "else" - line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 776, "else" - line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 835, "(1)" - line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 852, "(1)" - line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 861, "(1)" - line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 862, "else" - line 176, "pan.___", state 867, "((j<1))" - line 176, "pan.___", state 867, "((j>=1))" - line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 882, "(1)" - line 163, "pan.___", state 890, "(1)" - line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 891, "else" - line 161, "pan.___", state 896, "((j<1))" - line 161, "pan.___", state 896, "((j>=1))" - line 167, "pan.___", state 902, "(1)" - line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 903, "else" - line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 906, "else" - line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 908, "else" - line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 909, "else" - line 355, "pan.___", state 915, "((sighand_exec==1))" - line 355, "pan.___", state 915, "else" - line 361, "pan.___", state 918, "sighand_exec = 1" - line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 933, "(1)" - line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 934, "else" - line 398, "pan.___", state 937, "(1)" - line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 947, "(1)" - line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 948, "else" - line 402, "pan.___", state 951, "(1)" - line 402, "pan.___", state 952, "(1)" - line 402, "pan.___", state 952, "(1)" - line 400, "pan.___", state 957, "((i<1))" - line 400, "pan.___", state 957, "((i>=1))" - line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 976, "(1)" - line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 977, "else" - line 408, "pan.___", state 980, "(1)" - line 408, "pan.___", state 981, "(1)" - line 408, "pan.___", state 981, "(1)" - line 412, "pan.___", state 989, "(1)" - line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 990, "else" - line 412, "pan.___", state 993, "(1)" - line 412, "pan.___", state 994, "(1)" - line 412, "pan.___", state 994, "(1)" - line 410, "pan.___", state 999, "((i<1))" - line 410, "pan.___", state 999, "((i>=1))" - line 417, "pan.___", state 1006, "(1)" - line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1007, "else" - line 417, "pan.___", state 1010, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 417, "pan.___", state 1011, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 419, "pan.___", state 1014, "(1)" - line 361, "pan.___", state 1023, "sighand_exec = 1" - line 402, "pan.___", state 1054, "(1)" - line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1113, "(1)" - line 402, "pan.___", state 1151, "(1)" - line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1210, "(1)" - line 398, "pan.___", state 1236, "(1)" - line 402, "pan.___", state 1250, "(1)" - line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1309, "(1)" - line 402, "pan.___", state 1350, "(1)" - line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 417, "pan.___", state 1409, "(1)" - line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1432, "(1)" - line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1441, "(1)" - line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1442, "else" - line 176, "pan.___", state 1447, "((j<1))" - line 176, "pan.___", state 1447, "((j>=1))" - line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1462, "(1)" - line 163, "pan.___", state 1470, "(1)" - line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1471, "else" - line 161, "pan.___", state 1476, "((j<1))" - line 161, "pan.___", state 1476, "((j>=1))" - line 167, "pan.___", state 1482, "(1)" - line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1483, "else" - line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1486, "else" - line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 167, "pan.___", state 1545, "(1)" - line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 174, "pan.___", state 1562, "(1)" - line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 178, "pan.___", state 1571, "(1)" - line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 178, "pan.___", state 1572, "else" - line 176, "pan.___", state 1577, "((j<1))" - line 176, "pan.___", state 1577, "((j>=1))" - line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1592, "(1)" - line 163, "pan.___", state 1600, "(1)" - line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 163, "pan.___", state 1601, "else" - line 161, "pan.___", state 1606, "((j<1))" - line 161, "pan.___", state 1606, "((j>=1))" - line 167, "pan.___", state 1612, "(1)" - line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 167, "pan.___", state 1613, "else" - line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 169, "pan.___", state 1616, "else" - line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 201, "pan.___", state 1618, "else" - line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 220, "pan.___", state 1619, "else" - line 355, "pan.___", state 1625, "((sighand_exec==1))" - line 355, "pan.___", state 1625, "else" - line 361, "pan.___", state 1628, "sighand_exec = 1" - line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 398, "pan.___", state 1643, "(1)" - line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 398, "pan.___", state 1644, "else" - line 398, "pan.___", state 1647, "(1)" - line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 402, "pan.___", state 1657, "(1)" - line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 402, "pan.___", state 1658, "else" - line 402, "pan.___", state 1661, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 402, "pan.___", state 1662, "(1)" - line 400, "pan.___", state 1667, "((i<1))" - line 400, "pan.___", state 1667, "((i>=1))" - line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 408, "pan.___", state 1686, "(1)" - line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 408, "pan.___", state 1687, "else" - line 408, "pan.___", state 1690, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 408, "pan.___", state 1691, "(1)" - line 412, "pan.___", state 1699, "(1)" - line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 412, "pan.___", state 1700, "else" - line 412, "pan.___", state 1703, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 412, "pan.___", state 1704, "(1)" - line 410, "pan.___", state 1709, "((i<1))" - line 410, "pan.___", state 1709, "((i>=1))" - line 417, "pan.___", state 1716, "(1)" - line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 417, "pan.___", state 1717, "else" - line 417, "pan.___", state 1720, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 417, "pan.___", state 1721, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 419, "pan.___", state 1724, "(1)" - line 361, "pan.___", state 1733, "sighand_exec = 1" - line 178, "pan.___", state 1758, "(1)" - line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 159, "pan.___", state 1779, "(1)" - line 163, "pan.___", state 1787, "(1)" - line 167, "pan.___", state 1799, "(1)" - line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.define b/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.log b/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.log deleted file mode 100644 index cd4e32b..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.log +++ /dev/null @@ -1,286 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) -depth 12: Claim reached state 9 (line 748) -depth 28: Claim reached state 9 (line 747) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 10679, errors: 0 - 38555 states, stored (92500 visited) - 1044204 states, matched - 1136704 transitions (= visited+matched) - 3867169 atomic steps -hash conflicts: 6390 (resolved) - -Stats on memory usage (in Megabytes): - 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) - 2.767 actual memory usage for states (compression: 89.58%) - state-vector as stored = 47 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 468.498 total actual memory usage - -unreached in proctype urcu_reader_sig - line 403, "pan.___", state 330, "(1)" - line 614, "pan.___", state 411, "-end-" - (2 of 411 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 59, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 409, "pan.___", state 160, "(1)" - line 652, "pan.___", state 213, "(1)" - line 175, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 179, "pan.___", state 233, "(1)" - line 160, "pan.___", state 254, "(1)" - line 164, "pan.___", state 262, "(1)" - line 168, "pan.___", state 274, "(1)" - line 175, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 753, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 766, "(1)" - line 409, "pan.___", state 767, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 767, "else" - line 409, "pan.___", state 770, "(1)" - line 409, "pan.___", state 771, "(1)" - line 409, "pan.___", state 771, "(1)" - line 413, "pan.___", state 779, "(1)" - line 413, "pan.___", state 780, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 780, "else" - line 413, "pan.___", state 783, "(1)" - line 413, "pan.___", state 784, "(1)" - line 413, "pan.___", state 784, "(1)" - line 411, "pan.___", state 789, "((i<1))" - line 411, "pan.___", state 789, "((i>=1))" - line 418, "pan.___", state 796, "(1)" - line 418, "pan.___", state 797, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 797, "else" - line 418, "pan.___", state 800, "(1)" - line 418, "pan.___", state 801, "(1)" - line 418, "pan.___", state 801, "(1)" - line 420, "pan.___", state 804, "(1)" - line 420, "pan.___", state 804, "(1)" - line 356, "pan.___", state 810, "((sighand_exec==1))" - line 356, "pan.___", state 810, "else" - line 362, "pan.___", state 813, "sighand_exec = 1" - line 399, "pan.___", state 826, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 828, "(1)" - line 399, "pan.___", state 829, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 829, "else" - line 399, "pan.___", state 832, "(1)" - line 403, "pan.___", state 840, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 842, "(1)" - line 403, "pan.___", state 843, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 843, "else" - line 403, "pan.___", state 846, "(1)" - line 403, "pan.___", state 847, "(1)" - line 403, "pan.___", state 847, "(1)" - line 401, "pan.___", state 852, "((i<1))" - line 401, "pan.___", state 852, "((i>=1))" - line 408, "pan.___", state 858, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 871, "(1)" - line 409, "pan.___", state 872, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 872, "else" - line 409, "pan.___", state 875, "(1)" - line 409, "pan.___", state 876, "(1)" - line 409, "pan.___", state 876, "(1)" - line 413, "pan.___", state 884, "(1)" - line 413, "pan.___", state 885, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 885, "else" - line 413, "pan.___", state 888, "(1)" - line 413, "pan.___", state 889, "(1)" - line 413, "pan.___", state 889, "(1)" - line 411, "pan.___", state 894, "((i<1))" - line 411, "pan.___", state 894, "((i>=1))" - line 418, "pan.___", state 901, "(1)" - line 418, "pan.___", state 902, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 902, "else" - line 418, "pan.___", state 905, "(1)" - line 418, "pan.___", state 906, "(1)" - line 418, "pan.___", state 906, "(1)" - line 420, "pan.___", state 909, "(1)" - line 420, "pan.___", state 909, "(1)" - line 362, "pan.___", state 918, "sighand_exec = 1" - line 403, "pan.___", state 949, "(1)" - line 408, "pan.___", state 965, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1008, "(1)" - line 403, "pan.___", state 1046, "(1)" - line 408, "pan.___", state 1062, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1105, "(1)" - line 399, "pan.___", state 1131, "(1)" - line 403, "pan.___", state 1145, "(1)" - line 408, "pan.___", state 1161, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1204, "(1)" - line 403, "pan.___", state 1245, "(1)" - line 408, "pan.___", state 1261, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 418, "pan.___", state 1304, "(1)" - line 399, "pan.___", state 1326, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1328, "(1)" - line 399, "pan.___", state 1329, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1329, "else" - line 399, "pan.___", state 1332, "(1)" - line 403, "pan.___", state 1340, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1342, "(1)" - line 403, "pan.___", state 1343, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1343, "else" - line 403, "pan.___", state 1346, "(1)" - line 403, "pan.___", state 1347, "(1)" - line 403, "pan.___", state 1347, "(1)" - line 401, "pan.___", state 1352, "((i<1))" - line 401, "pan.___", state 1352, "((i>=1))" - line 408, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1371, "(1)" - line 409, "pan.___", state 1372, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1372, "else" - line 409, "pan.___", state 1375, "(1)" - line 409, "pan.___", state 1376, "(1)" - line 409, "pan.___", state 1376, "(1)" - line 413, "pan.___", state 1384, "(1)" - line 413, "pan.___", state 1385, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1385, "else" - line 413, "pan.___", state 1388, "(1)" - line 413, "pan.___", state 1389, "(1)" - line 413, "pan.___", state 1389, "(1)" - line 411, "pan.___", state 1394, "((i<1))" - line 411, "pan.___", state 1394, "((i>=1))" - line 418, "pan.___", state 1401, "(1)" - line 418, "pan.___", state 1402, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1402, "else" - line 418, "pan.___", state 1405, "(1)" - line 418, "pan.___", state 1406, "(1)" - line 418, "pan.___", state 1406, "(1)" - line 420, "pan.___", state 1409, "(1)" - line 420, "pan.___", state 1409, "(1)" - line 356, "pan.___", state 1415, "((sighand_exec==1))" - line 356, "pan.___", state 1415, "else" - line 362, "pan.___", state 1418, "sighand_exec = 1" - line 399, "pan.___", state 1431, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" - line 399, "pan.___", state 1433, "(1)" - line 399, "pan.___", state 1434, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" - line 399, "pan.___", state 1434, "else" - line 399, "pan.___", state 1437, "(1)" - line 403, "pan.___", state 1445, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" - line 403, "pan.___", state 1447, "(1)" - line 403, "pan.___", state 1448, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" - line 403, "pan.___", state 1448, "else" - line 403, "pan.___", state 1451, "(1)" - line 403, "pan.___", state 1452, "(1)" - line 403, "pan.___", state 1452, "(1)" - line 401, "pan.___", state 1457, "((i<1))" - line 401, "pan.___", state 1457, "((i>=1))" - line 408, "pan.___", state 1463, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 409, "pan.___", state 1476, "(1)" - line 409, "pan.___", state 1477, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" - line 409, "pan.___", state 1477, "else" - line 409, "pan.___", state 1480, "(1)" - line 409, "pan.___", state 1481, "(1)" - line 409, "pan.___", state 1481, "(1)" - line 413, "pan.___", state 1489, "(1)" - line 413, "pan.___", state 1490, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" - line 413, "pan.___", state 1490, "else" - line 413, "pan.___", state 1493, "(1)" - line 413, "pan.___", state 1494, "(1)" - line 413, "pan.___", state 1494, "(1)" - line 411, "pan.___", state 1499, "((i<1))" - line 411, "pan.___", state 1499, "((i>=1))" - line 418, "pan.___", state 1506, "(1)" - line 418, "pan.___", state 1507, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" - line 418, "pan.___", state 1507, "else" - line 418, "pan.___", state 1510, "(1)" - line 418, "pan.___", state 1511, "(1)" - line 418, "pan.___", state 1511, "(1)" - line 420, "pan.___", state 1514, "(1)" - line 420, "pan.___", state 1514, "(1)" - line 362, "pan.___", state 1523, "sighand_exec = 1" - line 179, "pan.___", state 1548, "(1)" - line 183, "pan.___", state 1559, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" - line 160, "pan.___", state 1569, "(1)" - line 164, "pan.___", state 1577, "(1)" - line 168, "pan.___", state 1589, "(1)" - line 175, "pan.___", state 1600, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index 5b0eadd..0000000 --- a/formal-model/urcu/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,4231 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2965 -2:3:2917 -3:3:2920 -4:3:2920 -5:3:2920 -6:3:2923 -7:3:2931 -8:3:2931 -9:3:2931 -10:3:2934 -11:3:2940 -12:3:2944 -13:3:2944 -14:3:2944 -15:3:2947 -16:3:2955 -17:3:2959 -18:3:2960 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-#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu/result-standard-execution-nest/Makefile b/formal-model/urcu/result-standard-execution-nest/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu/result-standard-execution-nest/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu/result-standard-execution-nest/asserts.log b/formal-model/urcu/result-standard-execution-nest/asserts.log deleted file mode 100644 index 51f1ac0..0000000 --- a/formal-model/urcu/result-standard-execution-nest/asserts.log +++ /dev/null @@ -1,250 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 -Depth= 3212 States= 1e+06 Transitions= 1.17e+07 Memory= 519.572 t= 7.66 R= 1e+05 -Depth= 3212 States= 2e+06 Transitions= 2.38e+07 Memory= 572.990 t= 16 R= 1e+05 -Depth= 3212 States= 3e+06 Transitions= 3.62e+07 Memory= 626.408 t= 24.9 R= 1e+05 -pan: resizing hashtable to -w22.. done - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 48 byte, depth reached 3212, errors: 0 - 3539988 states, stored - 39085459 states, matched - 42625447 transitions (= stored+matched) -1.5602888e+08 atomic steps -hash conflicts: 28971442 (resolved) - -Stats on memory usage (in Megabytes): - 256.576 equivalent memory usage for states (stored*(State-vector + overhead)) - 196.718 actual memory usage for states (compression: 76.67%) - state-vector as stored = 30 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 686.338 total actual memory usage - -unreached in proctype urcu_reader - line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 61, "(1)" - line 417, ".input.spin", state 91, "(1)" - line 398, ".input.spin", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 151, "(1)" - line 417, ".input.spin", state 181, "(1)" - line 398, ".input.spin", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 242, "(1)" - line 417, ".input.spin", state 272, "(1)" - line 398, ".input.spin", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 360, "(1)" - line 417, ".input.spin", state 390, "(1)" - line 539, ".input.spin", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 59, "(1)" - line 412, ".input.spin", state 72, "(1)" - line 417, ".input.spin", state 89, "(1)" - line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 153, "(1)" - line 412, ".input.spin", state 166, "(1)" - line 651, ".input.spin", state 199, "(1)" - line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 240, "(1)" - line 163, ".input.spin", state 248, "(1)" - line 167, ".input.spin", state 260, "(1)" - line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 927, "(1)" - line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, ".input.spin", state 928, "else" - line 408, ".input.spin", state 931, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 412, ".input.spin", state 940, "(1)" - line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, ".input.spin", state 941, "else" - line 412, ".input.spin", state 944, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 410, ".input.spin", state 950, "((i<1))" - line 410, ".input.spin", state 950, "((i>=1))" - line 417, ".input.spin", state 957, "(1)" - line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, ".input.spin", state 958, "else" - line 417, ".input.spin", state 961, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1040, "(1)" - line 417, ".input.spin", state 1057, "(1)" - line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1130, "(1)" - line 417, ".input.spin", state 1147, "(1)" - line 398, ".input.spin", state 1166, "(1)" - line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1222, "(1)" - line 417, ".input.spin", state 1239, "(1)" - line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1315, "(1)" - line 417, ".input.spin", state 1332, "(1)" - line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 1378, "(1)" - line 163, ".input.spin", state 1386, "(1)" - line 167, ".input.spin", state 1398, "(1)" - line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 1595, "(1)" - line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, ".input.spin", state 1596, "else" - line 408, ".input.spin", state 1599, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 412, ".input.spin", state 1608, "(1)" - line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, ".input.spin", state 1609, "else" - line 412, ".input.spin", state 1612, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 410, ".input.spin", state 1618, "((i<1))" - line 410, ".input.spin", state 1618, "((i>=1))" - line 417, ".input.spin", state 1625, "(1)" - line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, ".input.spin", state 1626, "else" - line 417, ".input.spin", state 1629, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 1681, "(1)" - line 163, ".input.spin", state 1689, "(1)" - line 167, ".input.spin", state 1701, "(1)" - line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/asserts.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu/result-standard-execution-nest/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu/result-standard-execution-nest/urcu.sh b/formal-model/urcu/result-standard-execution-nest/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu/result-standard-execution-nest/urcu.spin b/formal-model/urcu/result-standard-execution-nest/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free.log b/formal-model/urcu/result-standard-execution-nest/urcu_free.log deleted file mode 100644 index 884b15e..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free.log +++ /dev/null @@ -1,262 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) -Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.53 R= 1e+05 -Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.8 R= 1e+05 -Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.5 R= 1e+05 -pan: resizing hashtable to -w22.. done -Depth= 3880 States= 4e+06 Transitions= 4.84e+07 Memory= 741.318 t= 41.1 R= 1e+05 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3880, errors: 0 - 4015564 states, stored - 44539121 states, matched - 48554685 transitions (= stored+matched) -1.7777933e+08 atomic steps -hash conflicts: 33629695 (resolved) - -Stats on memory usage (in Megabytes): - 321.681 equivalent memory usage for states (stored*(State-vector + overhead)) - 252.629 actual memory usage for states (compression: 78.53%) - state-vector as stored = 38 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 742.295 total actual memory usage - -unreached in proctype urcu_reader - line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 61, "(1)" - line 417, "pan.___", state 91, "(1)" - line 398, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 151, "(1)" - line 417, "pan.___", state 181, "(1)" - line 398, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 242, "(1)" - line 417, "pan.___", state 272, "(1)" - line 398, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 360, "(1)" - line 417, "pan.___", state 390, "(1)" - line 539, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 59, "(1)" - line 412, "pan.___", state 72, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 153, "(1)" - line 412, "pan.___", state 166, "(1)" - line 651, "pan.___", state 199, "(1)" - line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 240, "(1)" - line 163, "pan.___", state 248, "(1)" - line 167, "pan.___", state 260, "(1)" - line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 927, "(1)" - line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, "pan.___", state 928, "else" - line 408, "pan.___", state 931, "(1)" - line 408, "pan.___", state 932, "(1)" - line 408, "pan.___", state 932, "(1)" - line 412, "pan.___", state 940, "(1)" - line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, "pan.___", state 941, "else" - line 412, "pan.___", state 944, "(1)" - line 412, "pan.___", state 945, "(1)" - line 412, "pan.___", state 945, "(1)" - line 410, "pan.___", state 950, "((i<1))" - line 410, "pan.___", state 950, "((i>=1))" - line 417, "pan.___", state 957, "(1)" - line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, "pan.___", state 958, "else" - line 417, "pan.___", state 961, "(1)" - line 417, "pan.___", state 962, "(1)" - line 417, "pan.___", state 962, "(1)" - line 419, "pan.___", state 965, "(1)" - line 419, "pan.___", state 965, "(1)" - line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1040, "(1)" - line 417, "pan.___", state 1057, "(1)" - line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1130, "(1)" - line 417, "pan.___", state 1147, "(1)" - line 398, "pan.___", state 1166, "(1)" - line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1222, "(1)" - line 417, "pan.___", state 1239, "(1)" - line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1315, "(1)" - line 417, "pan.___", state 1332, "(1)" - line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1378, "(1)" - line 163, "pan.___", state 1386, "(1)" - line 167, "pan.___", state 1398, "(1)" - line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1595, "(1)" - line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, "pan.___", state 1596, "else" - line 408, "pan.___", state 1599, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 412, "pan.___", state 1608, "(1)" - line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, "pan.___", state 1609, "else" - line 412, "pan.___", state 1612, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 410, "pan.___", state 1618, "((i<1))" - line 410, "pan.___", state 1618, "((i>=1))" - line 417, "pan.___", state 1625, "(1)" - line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, "pan.___", state 1626, "else" - line 417, "pan.___", state 1629, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1681, "(1)" - line 163, "pan.___", state 1689, "(1)" - line 167, "pan.___", state 1701, "(1)" - line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free.spin.input b/formal-model/urcu/result-standard-execution-nest/urcu_free.spin.input deleted file mode 100644 index f2f00e4..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free.spin.input +++ /dev/null @@ -1,722 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_free.spin.input.trail deleted file mode 100644 index 837f3d9..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free.spin.input.trail +++ /dev/null @@ -1,15043 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 -21:4:4355 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-14998:0:4365 -14999:2:1752 -15000:0:4365 -15001:3:2427 -15002:0:4365 -15003:2:1754 -15004:0:4365 -15005:3:2428 -15006:0:4365 -15007:2:1755 -15008:2:1759 -15009:2:1760 -15010:2:1768 -15011:2:1769 -15012:2:1773 -15013:2:1774 -15014:2:1768 -15015:2:1769 -15016:2:1773 -15017:2:1774 -15018:2:1782 -15019:2:1787 -15020:2:1791 -15021:2:1792 -15022:2:1799 -15023:2:1800 -15024:2:1811 -15025:2:1812 -15026:2:1813 -15027:2:1811 -15028:2:1812 -15029:2:1813 -15030:2:1824 -15031:2:1829 -15032:2:1830 -15033:0:4365 -15034:2:1842 -15035:0:4365 -15036:3:2427 -15037:0:4365 -15038:2:1844 -15039:0:4363 -15040:3:2428 -15041:0:4369 diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.define b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.log b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.log deleted file mode 100644 index 27a963a..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.log +++ /dev/null @@ -1,267 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -Depth= 11386 States= 1e+06 Transitions= 1.56e+07 Memory= 527.287 t= 12.8 R= 8e+04 -pan: claim violated! (at depth 2146) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 72 byte, depth reached 11386, errors: 1 - 1223588 states, stored - 17987399 states, matched - 19210987 transitions (= stored+matched) - 70012127 atomic steps -hash conflicts: 4173157 (resolved) - -Stats on memory usage (in Megabytes): - 116.690 equivalent memory usage for states (stored*(State-vector + overhead)) - 75.177 actual memory usage for states (compression: 64.42%) - state-vector as stored = 36 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 540.861 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 151, "(1)" - line 419, "pan.___", state 181, "(1)" - line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 242, "(1)" - line 419, "pan.___", state 272, "(1)" - line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 331, "(1)" - line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 360, "(1)" - line 419, "pan.___", state 390, "(1)" - line 541, "pan.___", state 414, "-end-" - (18 of 414 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 421, "pan.___", state 97, "(1)" - line 421, "pan.___", state 97, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 410, "pan.___", state 153, "(1)" - line 414, "pan.___", state 166, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 653, "pan.___", state 199, "(1)" - line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 254, "(1)" - line 414, "pan.___", state 267, "(1)" - line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 345, "(1)" - line 414, "pan.___", state 358, "(1)" - line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 440, "(1)" - line 414, "pan.___", state 453, "(1)" - line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 533, "(1)" - line 414, "pan.___", state 546, "(1)" - line 400, "pan.___", state 582, "(1)" - line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 638, "(1)" - line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 731, "(1)" - line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 821, "(1)" - line 419, "pan.___", state 838, "(1)" - line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 912, "(1)" - line 419, "pan.___", state 929, "(1)" - line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1007, "(1)" - line 419, "pan.___", state 1024, "(1)" - line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1053, "else" - line 400, "pan.___", state 1056, "(1)" - line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1066, "(1)" - line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1067, "else" - line 404, "pan.___", state 1070, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 402, "pan.___", state 1076, "((i<1))" - line 402, "pan.___", state 1076, "((i>=1))" - line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1095, "(1)" - line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1096, "else" - line 410, "pan.___", state 1099, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 414, "pan.___", state 1108, "(1)" - line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1109, "else" - line 414, "pan.___", state 1112, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 412, "pan.___", state 1118, "((i<1))" - line 412, "pan.___", state 1118, "((i>=1))" - line 419, "pan.___", state 1125, "(1)" - line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1126, "else" - line 419, "pan.___", state 1129, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1208, "(1)" - line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1298, "(1)" - line 400, "pan.___", state 1334, "(1)" - line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1390, "(1)" - line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1483, "(1)" - line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1573, "(1)" - line 419, "pan.___", state 1590, "(1)" - line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1664, "(1)" - line 419, "pan.___", state 1681, "(1)" - line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1759, "(1)" - line 419, "pan.___", state 1776, "(1)" - line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1804, "(1)" - line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1805, "else" - line 400, "pan.___", state 1808, "(1)" - line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1818, "(1)" - line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1819, "else" - line 404, "pan.___", state 1822, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 402, "pan.___", state 1828, "((i<1))" - line 402, "pan.___", state 1828, "((i>=1))" - line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1847, "(1)" - line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1848, "else" - line 410, "pan.___", state 1851, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 414, "pan.___", state 1860, "(1)" - line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1861, "else" - line 414, "pan.___", state 1864, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 412, "pan.___", state 1870, "((i<1))" - line 412, "pan.___", state 1870, "((i>=1))" - line 419, "pan.___", state 1877, "(1)" - line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1878, "else" - line 419, "pan.___", state 1881, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1960, "(1)" - line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2051, "(1)" - line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2146, "(1)" - line 703, "pan.___", state 2192, "-end-" - (144 of 2192 states) -unreached in proctype :init: - line 710, "pan.___", state 9, "((j<2))" - line 710, "pan.___", state 9, "((j>=2))" - line 711, "pan.___", state 20, "((j<2))" - line 711, "pan.___", state 20, "((j>=2))" - line 716, "pan.___", state 33, "((j<2))" - line 716, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 750, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 15.9 seconds -pan: rate 77100.693 states/second -pan: avg transition delay 8.2609e-07 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input deleted file mode 100644 index 927df3f..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,724 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 04e7425..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2149 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2654 -2:3:2606 -3:3:2609 -4:3:2609 -5:3:2612 -6:3:2620 -7:3:2620 -8:3:2623 -9:3:2629 -10:3:2633 -11:3:2633 -12:3:2636 -13:3:2644 -14:3:2648 -15:3:2649 -16:0:2654 -17:3:2651 -18:0:2654 -19:2:416 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b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.log b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.log deleted file mode 100644 index b7f3b80..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.log +++ /dev/null @@ -1,266 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -Depth= 5439 States= 1e+06 Transitions= 1.03e+07 Memory= 527.190 t= 8.16 R= 1e+05 -pan: claim violated! (at depth 1801) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 5439, errors: 1 - 1006552 states, stored - 9396280 states, matched - 10402832 transitions (= stored+matched) - 36844262 atomic steps -hash conflicts: 1832712 (resolved) - -Stats on memory usage (in Megabytes): - 80.634 equivalent memory usage for states (stored*(State-vector + overhead)) - 61.871 actual memory usage for states (compression: 76.73%) - state-vector as stored = 36 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 527.580 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 759, "(1)" - line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 760, "else" - line 409, "pan.___", state 763, "(1)" - line 409, "pan.___", state 764, "(1)" - line 409, "pan.___", state 764, "(1)" - line 413, "pan.___", state 772, "(1)" - line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 773, "else" - line 413, "pan.___", state 776, "(1)" - line 413, "pan.___", state 777, "(1)" - line 413, "pan.___", state 777, "(1)" - line 411, "pan.___", state 782, "((i<1))" - line 411, "pan.___", state 782, "((i>=1))" - line 418, "pan.___", state 789, "(1)" - line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 790, "else" - line 418, "pan.___", state 793, "(1)" - line 418, "pan.___", state 794, "(1)" - line 418, "pan.___", state 794, "(1)" - line 420, "pan.___", state 797, "(1)" - line 420, "pan.___", state 797, "(1)" - line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 872, "(1)" - line 418, "pan.___", state 889, "(1)" - line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 962, "(1)" - line 418, "pan.___", state 979, "(1)" - line 399, "pan.___", state 998, "(1)" - line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1054, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1147, "(1)" - line 418, "pan.___", state 1164, "(1)" - line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1343, "(1)" - line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1344, "else" - line 409, "pan.___", state 1347, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 413, "pan.___", state 1356, "(1)" - line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1357, "else" - line 413, "pan.___", state 1360, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 411, "pan.___", state 1366, "((i<1))" - line 411, "pan.___", state 1366, "((i>=1))" - line 418, "pan.___", state 1373, "(1)" - line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1374, "else" - line 418, "pan.___", state 1377, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 8.24 seconds -pan: rate 122154.37 states/second -pan: avg transition delay 7.9209e-07 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input deleted file mode 100644 index 6dea6e1..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_RMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 071a19e..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1804 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1982 -2:3:1934 -3:3:1937 -4:3:1937 -5:3:1940 -6:3:1948 -7:3:1948 -8:3:1951 -9:3:1957 -10:3:1961 -11:3:1961 -12:3:1964 -13:3:1972 -14:3:1976 -15:3:1977 -16:0:1982 -17:3:1979 -18:0:1982 -19:2:416 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-make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -pan: claim violated! (at depth 1882) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4174, errors: 1 - 367189 states, stored - 3431533 states, matched - 3798722 transitions (= stored+matched) - 13407384 atomic steps -hash conflicts: 253700 (resolved) - -Stats on memory usage (in Megabytes): - 29.415 equivalent memory usage for states (stored*(State-vector + overhead)) - 22.811 actual memory usage for states (compression: 77.55%) - state-vector as stored = 37 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 488.518 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 331, "(1)" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (18 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 401, "pan.___", state 134, "((i<1))" - line 401, "pan.___", state 134, "((i>=1))" - line 409, "pan.___", state 153, "(1)" - line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 154, "else" - line 409, "pan.___", state 157, "(1)" - line 409, "pan.___", state 158, "(1)" - line 409, "pan.___", state 158, "(1)" - line 413, "pan.___", state 166, "(1)" - line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 167, "else" - line 413, "pan.___", state 170, "(1)" - line 413, "pan.___", state 171, "(1)" - line 413, "pan.___", state 171, "(1)" - line 411, "pan.___", state 176, "((i<1))" - line 411, "pan.___", state 176, "((i>=1))" - line 418, "pan.___", state 183, "(1)" - line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 184, "else" - line 418, "pan.___", state 187, "(1)" - line 418, "pan.___", state 188, "(1)" - line 418, "pan.___", state 188, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 369, "pan.___", state 193, "(1)" - line 652, "pan.___", state 199, "(1)" - line 646, "pan.___", state 202, "((write_lock==0))" - line 646, "pan.___", state 202, "else" - line 644, "pan.___", state 203, "(1)" - line 160, "pan.___", state 209, "(1)" - line 164, "pan.___", state 217, "(1)" - line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 164, "pan.___", state 218, "else" - line 162, "pan.___", state 223, "((j<1))" - line 162, "pan.___", state 223, "((j>=1))" - line 168, "pan.___", state 229, "(1)" - line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 168, "pan.___", state 230, "else" - line 160, "pan.___", state 241, "(1)" - line 168, "pan.___", state 261, "(1)" - line 160, "pan.___", state 277, "(1)" - line 164, "pan.___", state 285, "(1)" - line 168, "pan.___", state 297, "(1)" - line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 356, "(1)" - line 413, "pan.___", state 369, "(1)" - line 418, "pan.___", state 386, "(1)" - line 399, "pan.___", state 405, "(1)" - line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 461, "(1)" - line 418, "pan.___", state 478, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 164, "pan.___", state 594, "(1)" - line 168, "pan.___", state 606, "(1)" - line 160, "pan.___", state 618, "(1)" - line 168, "pan.___", state 638, "(1)" - line 164, "pan.___", state 662, "(1)" - line 168, "pan.___", state 674, "(1)" - line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 698, "(1)" - line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 399, "pan.___", state 699, "else" - line 399, "pan.___", state 702, "(1)" - line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 712, "(1)" - line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 403, "pan.___", state 713, "else" - line 403, "pan.___", state 716, "(1)" - line 403, "pan.___", state 717, "(1)" - line 403, "pan.___", state 717, "(1)" - line 401, "pan.___", state 722, "((i<1))" - line 401, "pan.___", state 722, "((i>=1))" - line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 741, "(1)" - line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 742, "else" - line 409, "pan.___", state 745, "(1)" - line 409, "pan.___", state 746, "(1)" - line 409, "pan.___", state 746, "(1)" - line 413, "pan.___", state 754, "(1)" - line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 755, "else" - line 413, "pan.___", state 758, "(1)" - line 413, "pan.___", state 759, "(1)" - line 413, "pan.___", state 759, "(1)" - line 411, "pan.___", state 764, "((i<1))" - line 411, "pan.___", state 764, "((i>=1))" - line 418, "pan.___", state 771, "(1)" - line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 772, "else" - line 418, "pan.___", state 775, "(1)" - line 418, "pan.___", state 776, "(1)" - line 418, "pan.___", state 776, "(1)" - line 420, "pan.___", state 779, "(1)" - line 420, "pan.___", state 779, "(1)" - line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 854, "(1)" - line 418, "pan.___", state 871, "(1)" - line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 944, "(1)" - line 418, "pan.___", state 961, "(1)" - line 399, "pan.___", state 980, "(1)" - line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1036, "(1)" - line 418, "pan.___", state 1053, "(1)" - line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1129, "(1)" - line 418, "pan.___", state 1146, "(1)" - line 164, "pan.___", state 1169, "(1)" - line 168, "pan.___", state 1181, "(1)" - line 160, "pan.___", state 1193, "(1)" - line 168, "pan.___", state 1213, "(1)" - line 164, "pan.___", state 1237, "(1)" - line 168, "pan.___", state 1249, "(1)" - line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 1273, "(1)" - line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 399, "pan.___", state 1274, "else" - line 399, "pan.___", state 1277, "(1)" - line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 1287, "(1)" - line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 403, "pan.___", state 1288, "else" - line 403, "pan.___", state 1291, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 401, "pan.___", state 1297, "((i<1))" - line 401, "pan.___", state 1297, "((i>=1))" - line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1316, "(1)" - line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1317, "else" - line 409, "pan.___", state 1320, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 413, "pan.___", state 1329, "(1)" - line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1330, "else" - line 413, "pan.___", state 1333, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 411, "pan.___", state 1339, "((i<1))" - line 411, "pan.___", state 1339, "((i>=1))" - line 418, "pan.___", state 1346, "(1)" - line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1347, "else" - line 418, "pan.___", state 1350, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 164, "pan.___", state 1379, "(1)" - line 168, "pan.___", state 1391, "(1)" - line 160, "pan.___", state 1403, "(1)" - line 168, "pan.___", state 1423, "(1)" - line 164, "pan.___", state 1447, "(1)" - line 168, "pan.___", state 1459, "(1)" - line 702, "pan.___", state 1484, "-end-" - (160 of 1484 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 2.96 seconds -pan: rate 124050.34 states/second -pan: avg transition delay 7.7921e-07 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input deleted file mode 100644 index f4d8acb..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index f73a838..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1885 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1946 -2:3:1898 -3:3:1901 -4:3:1901 -5:3:1904 -6:3:1912 -7:3:1912 -8:3:1915 -9:3:1921 -10:3:1925 -11:3:1925 -12:3:1928 -13:3:1936 -14:3:1940 -15:3:1941 -16:0:1946 -17:3:1943 -18:0:1946 -19:2:416 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-1866:2:1864 -1867:2:1869 -1868:0:1946 -1869:2:1880 -1870:0:1946 -1871:2:1882 -1872:0:1946 -1873:2:1883 -1874:0:1946 -1875:2:1886 -1876:0:1946 -1877:2:1891 -1878:0:1946 -1879:1:302 -1880:0:1944 -1881:2:1892 -1882:0:1950 -1883:1:143 diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.define b/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.log b/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.log deleted file mode 100644 index 2a80112..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.log +++ /dev/null @@ -1,197 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -pan: claim violated! (at depth 1371) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3387, errors: 1 - 206295 states, stored - 1902753 states, matched - 2109048 transitions (= stored+matched) - 7663223 atomic steps -hash conflicts: 101109 (resolved) - -Stats on memory usage (in Megabytes): - 16.526 equivalent memory usage for states (stored*(State-vector + overhead)) - 13.080 actual memory usage for states (compression: 79.15%) - state-vector as stored = 38 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 478.752 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1013, "(1)" - line 164, "pan.___", state 1021, "(1)" - line 168, "pan.___", state 1033, "(1)" - line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.66 seconds -pan: rate 124274.1 states/second -pan: avg transition delay 7.8708e-07 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input b/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input deleted file mode 100644 index 93aae44..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define SINGLE_FLIP - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -//#define READER_NEST_LEVEL 1 -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index 73c1400..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1374 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1650 -2:3:1602 -3:3:1605 -4:3:1605 -5:3:1608 -6:3:1616 -7:3:1616 -8:3:1619 -9:3:1625 -10:3:1629 -11:3:1629 -12:3:1632 -13:3:1640 -14:3:1644 -15:3:1645 -16:0:1650 -17:3:1647 -18:0:1650 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-1233:2:828 -1234:2:832 -1235:2:833 -1236:2:841 -1237:2:846 -1238:2:850 -1239:2:851 -1240:2:858 -1241:2:859 -1242:2:870 -1243:2:871 -1244:2:872 -1245:2:883 -1246:2:888 -1247:2:889 -1248:0:1650 -1249:2:901 -1250:0:1650 -1251:2:903 -1252:0:1650 -1253:2:906 -1254:2:907 -1255:2:919 -1256:2:920 -1257:2:924 -1258:2:925 -1259:2:933 -1260:2:938 -1261:2:942 -1262:2:943 -1263:2:950 -1264:2:951 -1265:2:962 -1266:2:963 -1267:2:964 -1268:2:975 -1269:2:980 -1270:2:981 -1271:0:1650 -1272:2:993 -1273:0:1650 -1274:2:995 -1275:0:1650 -1276:2:996 -1277:0:1650 -1278:2:997 -1279:0:1650 -1280:2:998 -1281:0:1650 -1282:2:999 -1283:2:1003 -1284:2:1004 -1285:2:1012 -1286:2:1013 -1287:2:1017 -1288:2:1018 -1289:2:1026 -1290:2:1031 -1291:2:1035 -1292:2:1036 -1293:2:1043 -1294:2:1044 -1295:2:1055 -1296:2:1056 -1297:2:1057 -1298:2:1068 -1299:2:1073 -1300:2:1074 -1301:0:1650 -1302:2:1086 -1303:0:1650 -1304:2:1283 -1305:0:1650 -1306:2:1381 -1307:0:1650 -1308:2:1382 -1309:0:1650 -1310:2:1386 -1311:0:1650 -1312:2:1395 -1313:2:1396 -1314:2:1400 -1315:2:1404 -1316:2:1405 -1317:2:1409 -1318:2:1417 -1319:2:1418 -1320:2:1423 -1321:2:1430 -1322:2:1431 -1323:2:1438 -1324:2:1443 -1325:0:1650 -1326:2:1454 -1327:0:1650 -1328:2:1458 -1329:2:1459 -1330:2:1463 -1331:2:1467 -1332:2:1468 -1333:2:1472 -1334:2:1480 -1335:2:1481 -1336:2:1486 -1337:2:1493 -1338:2:1494 -1339:2:1501 -1340:2:1506 -1341:0:1650 -1342:2:1517 -1343:0:1650 -1344:2:1525 -1345:2:1526 -1346:2:1530 -1347:2:1534 -1348:2:1535 -1349:2:1539 -1350:2:1547 -1351:2:1548 -1352:2:1553 -1353:2:1560 -1354:2:1561 -1355:2:1568 -1356:2:1573 -1357:0:1650 -1358:2:1584 -1359:0:1650 -1360:2:1586 -1361:0:1650 -1362:2:1587 -1363:0:1650 -1364:2:1590 -1365:0:1650 -1366:2:1595 -1367:0:1650 -1368:1:302 -1369:0:1648 -1370:2:1596 -1371:0:1654 -1372:0:1650 diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress.ltl b/formal-model/urcu/result-standard-execution-nest/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.define b/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.log b/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.log deleted file mode 100644 index 9e98b9f..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.log +++ /dev/null @@ -1,275 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 1767: Claim reached state 9 (line 748) -Depth= 3880 States= 1e+06 Transitions= 1.71e+07 Memory= 499.651 t= 14.5 R= 7e+04 -Depth= 3880 States= 2e+06 Transitions= 3.79e+07 Memory= 532.365 t= 32.3 R= 6e+04 -Depth= 3880 States= 3e+06 Transitions= 5.83e+07 Memory= 564.983 t= 50.2 R= 6e+04 -pan: resizing hashtable to -w22.. done -Depth= 3880 States= 4e+06 Transitions= 7.76e+07 Memory= 629.307 t= 67 R= 6e+04 -Depth= 3880 States= 5e+06 Transitions= 9.78e+07 Memory= 662.315 t= 84.2 R= 6e+04 -Depth= 3880 States= 6e+06 Transitions= 1.19e+08 Memory= 694.736 t= 102 R= 6e+04 -Depth= 3880 States= 7e+06 Transitions= 1.38e+08 Memory= 727.842 t= 119 R= 6e+04 -Depth= 3880 States= 8e+06 Transitions= 1.59e+08 Memory= 760.752 t= 137 R= 6e+04 -Depth= 3880 States= 9e+06 Transitions= 1.79e+08 Memory= 793.174 t= 155 R= 6e+04 -pan: resizing hashtable to -w24.. done -Depth= 3880 States= 1e+07 Transitions= 1.98e+08 Memory= 950.568 t= 172 R= 6e+04 -Depth= 3880 States= 1.1e+07 Transitions= 2.19e+08 Memory= 983.479 t= 189 R= 6e+04 -Depth= 3880 States= 1.2e+07 Transitions= 2.4e+08 Memory= 1015.901 t= 207 R= 6e+04 -Depth= 3880 States= 1.3e+07 Transitions= 2.58e+08 Memory= 1049.397 t= 223 R= 6e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3880, errors: 0 - 7197860 states, stored (1.33457e+07 visited) -2.5266654e+08 states, matched -2.6601223e+08 transitions (= visited+matched) -9.9067284e+08 atomic steps -hash conflicts: 87783920 (resolved) - -Stats on memory usage (in Megabytes): - 576.611 equivalent memory usage for states (stored*(State-vector + overhead)) - 474.839 actual memory usage for states (compression: 82.35%) - state-vector as stored = 41 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1060.529 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.spin.input.trail deleted file mode 100644 index 7c42af1..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4401 -2:4:4353 -3:4:4356 -4:4:4356 -5:4:4359 -6:4:4367 -7:4:4367 -8:4:4370 -9:4:4376 -10:4:4380 -11:4:4380 -12:4:4383 -13:4:4391 -14:4:4395 -15:4:4396 -16:0:4401 -17:4:4398 -18:0:4401 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-1254:0:4405 -1255:3:4347 -1256:0:4405 -1257:3:4346 -1258:0:4405 -1259:2:1348 -1260:0:4405 -1261:3:4347 -1262:0:4405 -1263:2:1347 -1264:0:4405 -1265:3:4346 -1266:0:4405 -1267:1:104 diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.define b/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.log b/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.log deleted file mode 100644 index 434151a..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.log +++ /dev/null @@ -1,275 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 291: Claim reached state 9 (line 748) -Depth= 2677 States= 1e+06 Transitions= 1.57e+07 Memory= 487.932 t= 13.4 R= 7e+04 -Depth= 3023 States= 2e+06 Transitions= 3.19e+07 Memory= 509.709 t= 27.3 R= 7e+04 -Depth= 3610 States= 3e+06 Transitions= 4.84e+07 Memory= 531.486 t= 41.6 R= 7e+04 -pan: resizing hashtable to -w22.. done -Depth= 3956 States= 4e+06 Transitions= 6.63e+07 Memory= 595.029 t= 57 R= 7e+04 -Depth= 3956 States= 5e+06 Transitions= 8.67e+07 Memory= 617.783 t= 74.5 R= 7e+04 -Depth= 3956 States= 6e+06 Transitions= 1.08e+08 Memory= 660.850 t= 93 R= 6e+04 -Depth= 3956 States= 7e+06 Transitions= 1.28e+08 Memory= 690.928 t= 110 R= 6e+04 -Depth= 3956 States= 8e+06 Transitions= 1.51e+08 Memory= 729.600 t= 129 R= 6e+04 -Depth= 3956 States= 9e+06 Transitions= 1.7e+08 Memory= 765.830 t= 146 R= 6e+04 -pan: resizing hashtable to -w24.. done -Depth= 3956 States= 1e+07 Transitions= 1.92e+08 Memory= 919.611 t= 166 R= 6e+04 -Depth= 3956 States= 1.1e+07 Transitions= 2.13e+08 Memory= 958.576 t= 183 R= 6e+04 -Depth= 3956 States= 1.2e+07 Transitions= 2.33e+08 Memory= 985.627 t= 201 R= 6e+04 -Depth= 3956 States= 1.3e+07 Transitions= 2.55e+08 Memory= 1027.033 t= 220 R= 6e+04 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3956, errors: 0 - 7045896 states, stored (1.35792e+07 visited) -2.5326206e+08 states, matched -2.668413e+08 transitions (= visited+matched) -9.9425626e+08 atomic steps -hash conflicts: 65494104 (resolved) - -Stats on memory usage (in Megabytes): - 564.437 equivalent memory usage for states (stored*(State-vector + overhead)) - 465.758 actual memory usage for states (compression: 82.52%) - state-vector as stored = 41 byte + 28 byte overhead - 128.000 memory used for hash table (-w24) - 457.764 memory used for DFS stack (-m10000000) - 1051.350 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.define b/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.log b/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.log deleted file mode 100644 index 7fafb9e..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.log +++ /dev/null @@ -1,514 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -depth 15: Claim reached state 9 (line 750) -depth 291: Claim reached state 9 (line 749) -pan: acceptance cycle (at depth 4308) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 4820, errors: 1 - 62091 states, stored (169917 visited) - 2179326 states, matched - 2349243 transitions (= visited+matched) - 8805349 atomic steps -hash conflicts: 50953 (resolved) - -Stats on memory usage (in Megabytes): - 4.974 equivalent memory usage for states (stored*(State-vector + overhead)) - 4.145 actual memory usage for states (compression: 83.33%) - state-vector as stored = 42 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 469.865 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 151, "(1)" - line 419, "pan.___", state 181, "(1)" - line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 242, "(1)" - line 419, "pan.___", state 272, "(1)" - line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 360, "(1)" - line 419, "pan.___", state 390, "(1)" - line 541, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 402, "pan.___", state 134, "((i<1))" - line 402, "pan.___", state 134, "((i>=1))" - line 410, "pan.___", state 153, "(1)" - line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 154, "else" - line 410, "pan.___", state 157, "(1)" - line 410, "pan.___", state 158, "(1)" - line 410, "pan.___", state 158, "(1)" - line 414, "pan.___", state 166, "(1)" - line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 167, "else" - line 414, "pan.___", state 170, "(1)" - line 414, "pan.___", state 171, "(1)" - line 414, "pan.___", state 171, "(1)" - line 412, "pan.___", state 176, "((i<1))" - line 412, "pan.___", state 176, "((i>=1))" - line 419, "pan.___", state 183, "(1)" - line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 184, "else" - line 419, "pan.___", state 187, "(1)" - line 419, "pan.___", state 188, "(1)" - line 419, "pan.___", state 188, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 370, "pan.___", state 193, "(1)" - line 653, "pan.___", state 199, "(1)" - line 647, "pan.___", state 202, "((write_lock==0))" - line 647, "pan.___", state 202, "else" - line 645, "pan.___", state 203, "(1)" - line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 225, "((j<1))" - line 178, "pan.___", state 225, "((j>=1))" - line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 240, "(1)" - line 165, "pan.___", state 248, "(1)" - line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 165, "pan.___", state 249, "else" - line 163, "pan.___", state 254, "((j<1))" - line 163, "pan.___", state 254, "((j>=1))" - line 169, "pan.___", state 260, "(1)" - line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 169, "pan.___", state 261, "else" - line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 171, "pan.___", state 264, "else" - line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 169, "pan.___", state 323, "(1)" - line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 355, "((j<1))" - line 178, "pan.___", state 355, "((j>=1))" - line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 370, "(1)" - line 165, "pan.___", state 378, "(1)" - line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 165, "pan.___", state 379, "else" - line 163, "pan.___", state 384, "((j<1))" - line 163, "pan.___", state 384, "((j>=1))" - line 169, "pan.___", state 390, "(1)" - line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 169, "pan.___", state 391, "else" - line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 171, "pan.___", state 394, "else" - line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 410, "(1)" - line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 424, "(1)" - line 404, "pan.___", state 425, "(1)" - line 404, "pan.___", state 425, "(1)" - line 402, "pan.___", state 430, "((i<1))" - line 402, "pan.___", state 430, "((i>=1))" - line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 449, "(1)" - line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 450, "else" - line 410, "pan.___", state 453, "(1)" - line 410, "pan.___", state 454, "(1)" - line 410, "pan.___", state 454, "(1)" - line 414, "pan.___", state 462, "(1)" - line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 463, "else" - line 414, "pan.___", state 466, "(1)" - line 414, "pan.___", state 467, "(1)" - line 414, "pan.___", state 467, "(1)" - line 412, "pan.___", state 472, "((i<1))" - line 412, "pan.___", state 472, "((i>=1))" - line 419, "pan.___", state 479, "(1)" - line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 480, "else" - line 419, "pan.___", state 483, "(1)" - line 419, "pan.___", state 484, "(1)" - line 419, "pan.___", state 484, "(1)" - line 421, "pan.___", state 487, "(1)" - line 421, "pan.___", state 487, "(1)" - line 370, "pan.___", state 489, "(1)" - line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[_pid] = (tmp^(1<<7))" - line 400, "pan.___", state 498, "(1)" - line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 499, "else" - line 400, "pan.___", state 502, "(1)" - line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 516, "(1)" - line 404, "pan.___", state 517, "(1)" - line 404, "pan.___", state 517, "(1)" - line 402, "pan.___", state 522, "((i<1))" - line 402, "pan.___", state 522, "((i>=1))" - line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 541, "(1)" - line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 542, "else" - line 410, "pan.___", state 545, "(1)" - line 410, "pan.___", state 546, "(1)" - line 410, "pan.___", state 546, "(1)" - line 414, "pan.___", state 554, "(1)" - line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 555, "else" - line 414, "pan.___", state 558, "(1)" - line 414, "pan.___", state 559, "(1)" - line 414, "pan.___", state 559, "(1)" - line 412, "pan.___", state 564, "((i<1))" - line 412, "pan.___", state 564, "((i>=1))" - line 419, "pan.___", state 571, "(1)" - line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 572, "else" - line 419, "pan.___", state 575, "(1)" - line 419, "pan.___", state 576, "(1)" - line 419, "pan.___", state 576, "(1)" - line 421, "pan.___", state 579, "(1)" - line 421, "pan.___", state 579, "(1)" - line 370, "pan.___", state 581, "(1)" - line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 595, "(1)" - line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 609, "(1)" - line 404, "pan.___", state 610, "(1)" - line 404, "pan.___", state 610, "(1)" - line 402, "pan.___", state 615, "((i<1))" - line 402, "pan.___", state 615, "((i>=1))" - line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 634, "(1)" - line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 635, "else" - line 410, "pan.___", state 638, "(1)" - line 410, "pan.___", state 639, "(1)" - line 410, "pan.___", state 639, "(1)" - line 414, "pan.___", state 647, "(1)" - line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 648, "else" - line 414, "pan.___", state 651, "(1)" - line 414, "pan.___", state 652, "(1)" - line 414, "pan.___", state 652, "(1)" - line 412, "pan.___", state 657, "((i<1))" - line 412, "pan.___", state 657, "((i>=1))" - line 419, "pan.___", state 664, "(1)" - line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 665, "else" - line 419, "pan.___", state 668, "(1)" - line 419, "pan.___", state 669, "(1)" - line 419, "pan.___", state 669, "(1)" - line 421, "pan.___", state 672, "(1)" - line 421, "pan.___", state 672, "(1)" - line 370, "pan.___", state 674, "(1)" - line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 681, "(1)" - line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 682, "else" - line 400, "pan.___", state 685, "(1)" - line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 695, "(1)" - line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 696, "else" - line 404, "pan.___", state 699, "(1)" - line 404, "pan.___", state 700, "(1)" - line 404, "pan.___", state 700, "(1)" - line 402, "pan.___", state 705, "((i<1))" - line 402, "pan.___", state 705, "((i>=1))" - line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 724, "(1)" - line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 725, "else" - line 410, "pan.___", state 728, "(1)" - line 410, "pan.___", state 729, "(1)" - line 410, "pan.___", state 729, "(1)" - line 414, "pan.___", state 737, "(1)" - line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 738, "else" - line 414, "pan.___", state 741, "(1)" - line 414, "pan.___", state 742, "(1)" - line 414, "pan.___", state 742, "(1)" - line 412, "pan.___", state 747, "((i<1))" - line 412, "pan.___", state 747, "((i>=1))" - line 419, "pan.___", state 754, "(1)" - line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 755, "else" - line 419, "pan.___", state 758, "(1)" - line 419, "pan.___", state 759, "(1)" - line 419, "pan.___", state 759, "(1)" - line 421, "pan.___", state 762, "(1)" - line 421, "pan.___", state 762, "(1)" - line 370, "pan.___", state 764, "(1)" - line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[_pid])&(1<<7))))" - line 430, "pan.___", state 767, "else" - line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 779, "(1)" - line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 780, "else" - line 400, "pan.___", state 783, "(1)" - line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 793, "(1)" - line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 794, "else" - line 404, "pan.___", state 797, "(1)" - line 404, "pan.___", state 798, "(1)" - line 404, "pan.___", state 798, "(1)" - line 402, "pan.___", state 803, "((i<1))" - line 402, "pan.___", state 803, "((i>=1))" - line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 822, "(1)" - line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 823, "else" - line 410, "pan.___", state 826, "(1)" - line 410, "pan.___", state 827, "(1)" - line 410, "pan.___", state 827, "(1)" - line 414, "pan.___", state 835, "(1)" - line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 836, "else" - line 414, "pan.___", state 839, "(1)" - line 414, "pan.___", state 840, "(1)" - line 414, "pan.___", state 840, "(1)" - line 412, "pan.___", state 845, "((i<1))" - line 412, "pan.___", state 845, "((i>=1))" - line 419, "pan.___", state 852, "(1)" - line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 853, "else" - line 419, "pan.___", state 856, "(1)" - line 419, "pan.___", state 857, "(1)" - line 419, "pan.___", state 857, "(1)" - line 421, "pan.___", state 860, "(1)" - line 421, "pan.___", state 860, "(1)" - line 370, "pan.___", state 862, "(1)" - line 449, "pan.___", state 870, "((tmp<1))" - line 449, "pan.___", state 870, "((tmp>=1))" - line 462, "pan.___", state 873, "tmp = 0" - line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 883, "(1)" - line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 897, "(1)" - line 404, "pan.___", state 898, "(1)" - line 404, "pan.___", state 898, "(1)" - line 402, "pan.___", state 903, "((i<1))" - line 402, "pan.___", state 903, "((i>=1))" - line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 922, "(1)" - line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 923, "else" - line 410, "pan.___", state 926, "(1)" - line 410, "pan.___", state 927, "(1)" - line 410, "pan.___", state 927, "(1)" - line 414, "pan.___", state 935, "(1)" - line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 936, "else" - line 414, "pan.___", state 939, "(1)" - line 414, "pan.___", state 940, "(1)" - line 414, "pan.___", state 940, "(1)" - line 412, "pan.___", state 945, "((i<1))" - line 412, "pan.___", state 945, "((i>=1))" - line 419, "pan.___", state 952, "(1)" - line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 953, "else" - line 419, "pan.___", state 956, "(1)" - line 419, "pan.___", state 957, "(1)" - line 419, "pan.___", state 957, "(1)" - line 421, "pan.___", state 960, "(1)" - line 421, "pan.___", state 960, "(1)" - line 370, "pan.___", state 962, "(1)" - line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[_pid]" - line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 973, "(1)" - line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 987, "(1)" - line 404, "pan.___", state 988, "(1)" - line 404, "pan.___", state 988, "(1)" - line 402, "pan.___", state 993, "((i<1))" - line 402, "pan.___", state 993, "((i>=1))" - line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1012, "(1)" - line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1013, "else" - line 410, "pan.___", state 1016, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 414, "pan.___", state 1025, "(1)" - line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1026, "else" - line 414, "pan.___", state 1029, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 412, "pan.___", state 1035, "((i<1))" - line 412, "pan.___", state 1035, "((i>=1))" - line 419, "pan.___", state 1042, "(1)" - line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1043, "else" - line 419, "pan.___", state 1046, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 370, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1061, "(1)" - line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1117, "(1)" - line 419, "pan.___", state 1134, "(1)" - line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1210, "(1)" - line 419, "pan.___", state 1227, "(1)" - line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1287, "(1)" - line 414, "pan.___", state 1300, "(1)" - line 419, "pan.___", state 1317, "(1)" - line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1342, "(1)" - line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1343, "else" - line 400, "pan.___", state 1346, "(1)" - line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1356, "(1)" - line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1357, "else" - line 404, "pan.___", state 1360, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 402, "pan.___", state 1366, "((i<1))" - line 402, "pan.___", state 1366, "((i>=1))" - line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1385, "(1)" - line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1386, "else" - line 410, "pan.___", state 1389, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 414, "pan.___", state 1398, "(1)" - line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1399, "else" - line 414, "pan.___", state 1402, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 412, "pan.___", state 1408, "((i<1))" - line 412, "pan.___", state 1408, "((i>=1))" - line 419, "pan.___", state 1415, "(1)" - line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1416, "else" - line 419, "pan.___", state 1419, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 1471, "(1)" - line 165, "pan.___", state 1479, "(1)" - line 169, "pan.___", state 1491, "(1)" - line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index 5bb8316..0000000 --- a/formal-model/urcu/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,4823 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2108 -2:3:2060 -3:3:2063 -4:3:2063 -5:3:2066 -6:3:2074 -7:3:2074 -8:3:2077 -9:3:2083 -10:3:2087 -11:3:2087 -12:3:2090 -13:3:2098 -14:3:2102 -15:3:2103 -16:0:2108 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-4811:1:48 -4812:1:49 -4813:1:56 -4814:1:57 -4815:1:68 -4816:1:69 -4817:1:70 -4818:1:81 -4819:1:86 -4820:1:87 diff --git a/formal-model/urcu/result-standard-execution-nonest/DEFINES b/formal-model/urcu/result-standard-execution-nonest/DEFINES deleted file mode 100644 index 5d5147e..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/DEFINES +++ /dev/null @@ -1,17 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS diff --git a/formal-model/urcu/result-standard-execution-nonest/Makefile b/formal-model/urcu/result-standard-execution-nonest/Makefile deleted file mode 100644 index 8af320d..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/Makefile +++ /dev/null @@ -1,172 +0,0 @@ -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) Mathieu Desnoyers, 2009 -# -# Authors: Mathieu Desnoyers - -#CFLAGS=-DSAFETY -#for multi-core verif, 15.5GB shared mem, use files if full -#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 - -#liveness -#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -CFLAGS=-DHASH64 - -SPINFILE=urcu.spin - -default: - make urcu_free | tee urcu_free.log - #nested useless with signal test. - #make urcu_free_nested | tee urcu_free_nested.log - make urcu_free_no_rmb | tee urcu_free_no_rmb.log - make urcu_free_no_wmb | tee urcu_free_no_wmb.log - make urcu_free_no_mb | tee urcu_free_no_mb.log - make urcu_free_single_flip | tee urcu_free_single_flip.log - make urcu_progress_writer | tee urcu_progress_writer.log - make urcu_progress_reader | tee urcu_progress_reader.log - make urcu_progress_writer_error | tee urcu_progress_writer_error.log - make asserts | tee asserts.log - make summary - -#show trail : spin -v -t -N pan.ltl input.spin -# after each individual make. - -summary: - @echo - @echo "Verification summary" - @grep errors: *.log - -asserts: clean - cat DEFINES > .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X .input.spin - gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c - ./pan -v -c1 -X -m10000000 -w20 - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free: clean urcu_free_ltl run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_nested_define: - cp urcu_free_nested.define .input.define - -urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_rmb_define: - cp urcu_free_no_rmb.define .input.define - -urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_wmb_define: - cp urcu_free_no_wmb.define .input.define - -urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_no_mb_define: - cp urcu_free_no_mb.define .input.define - -urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_free_single_flip_define: - cp urcu_free_single_flip.define .input.define - -urcu_free_ltl: - touch .input.define - cat .input.define >> pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl - -# Progress checks - -urcu_progress_writer: clean urcu_progress_writer_ltl \ - urcu_progress_writer_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_define: - cp urcu_progress_writer.define .input.define - -urcu_progress_writer_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_reader: clean urcu_progress_reader_ltl \ - urcu_progress_reader_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_reader_define: - cp urcu_progress_reader.define .input.define - -urcu_progress_reader_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - -urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ - urcu_progress_writer_error_define run_weak_fair - cp .input.spin $@.spin.input - -cp .input.spin.trail $@.spin.input.trail - -urcu_progress_writer_error_define: - cp urcu_progress_writer_error.define .input.define - -urcu_progress_writer_error_ltl: - touch .input.define - cat .input.define > pan.ltl - cat DEFINES >> pan.ltl - spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl - - -run_weak_fair: pan - ./pan -a -f -v -c1 -X -m10000000 -w20 - -run: pan - ./pan -a -v -c1 -X -m10000000 -w20 - -pan: pan.c - gcc -O2 -w ${CFLAGS} -o pan pan.c - -pan.c: pan.ltl ${SPINFILE} - cat .input.define > .input.spin - cat DEFINES >> .input.spin - cat ${SPINFILE} >> .input.spin - rm -f .input.spin.trail - spin -a -X -N pan.ltl .input.spin - -.PHONY: clean default distclean summary -clean: - rm -f pan* trail.out .input.spin* *.spin.trail .input.define -distclean: - rm -f *.trail *.input *.log diff --git a/formal-model/urcu/result-standard-execution-nonest/asserts.log b/formal-model/urcu/result-standard-execution-nonest/asserts.log deleted file mode 100644 index 1071a7a..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/asserts.log +++ /dev/null @@ -1,246 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -cat DEFINES > .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w20 - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim - (none specified) - assertion violations + - cycle checks - (disabled by -DSAFETY) - invalid end states + - -State-vector 48 byte, depth reached 2084, errors: 0 - 847558 states, stored - 9221089 states, matched - 10068647 transitions (= stored+matched) - 36786866 atomic steps -hash conflicts: 2126850 (resolved) - -Stats on memory usage (in Megabytes): - 61.430 equivalent memory usage for states (stored*(State-vector + overhead)) - 45.632 actual memory usage for states (compression: 74.28%) - state-vector as stored = 28 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 511.369 total actual memory usage - -unreached in proctype urcu_reader - line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 61, "(1)" - line 417, ".input.spin", state 91, "(1)" - line 398, ".input.spin", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 151, "(1)" - line 417, ".input.spin", state 181, "(1)" - line 398, ".input.spin", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 242, "(1)" - line 417, ".input.spin", state 272, "(1)" - line 398, ".input.spin", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 360, "(1)" - line 417, ".input.spin", state 390, "(1)" - line 539, ".input.spin", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 59, "(1)" - line 412, ".input.spin", state 72, "(1)" - line 417, ".input.spin", state 89, "(1)" - line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 153, "(1)" - line 412, ".input.spin", state 166, "(1)" - line 651, ".input.spin", state 199, "(1)" - line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 240, "(1)" - line 163, ".input.spin", state 248, "(1)" - line 167, ".input.spin", state 260, "(1)" - line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 927, "(1)" - line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, ".input.spin", state 928, "else" - line 408, ".input.spin", state 931, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 408, ".input.spin", state 932, "(1)" - line 412, ".input.spin", state 940, "(1)" - line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, ".input.spin", state 941, "else" - line 412, ".input.spin", state 944, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 412, ".input.spin", state 945, "(1)" - line 410, ".input.spin", state 950, "((i<1))" - line 410, ".input.spin", state 950, "((i>=1))" - line 417, ".input.spin", state 957, "(1)" - line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, ".input.spin", state 958, "else" - line 417, ".input.spin", state 961, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 417, ".input.spin", state 962, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 419, ".input.spin", state 965, "(1)" - line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1040, "(1)" - line 417, ".input.spin", state 1057, "(1)" - line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1130, "(1)" - line 417, ".input.spin", state 1147, "(1)" - line 398, ".input.spin", state 1166, "(1)" - line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1222, "(1)" - line 417, ".input.spin", state 1239, "(1)" - line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, ".input.spin", state 1315, "(1)" - line 417, ".input.spin", state 1332, "(1)" - line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 1378, "(1)" - line 163, ".input.spin", state 1386, "(1)" - line 167, ".input.spin", state 1398, "(1)" - line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, ".input.spin", state 1595, "(1)" - line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, ".input.spin", state 1596, "else" - line 408, ".input.spin", state 1599, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 408, ".input.spin", state 1600, "(1)" - line 412, ".input.spin", state 1608, "(1)" - line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, ".input.spin", state 1609, "else" - line 412, ".input.spin", state 1612, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 412, ".input.spin", state 1613, "(1)" - line 410, ".input.spin", state 1618, "((i<1))" - line 410, ".input.spin", state 1618, "((i>=1))" - line 417, ".input.spin", state 1625, "(1)" - line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, ".input.spin", state 1626, "else" - line 417, ".input.spin", state 1629, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 417, ".input.spin", state 1630, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 419, ".input.spin", state 1633, "(1)" - line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, ".input.spin", state 1681, "(1)" - line 163, ".input.spin", state 1689, "(1)" - line 167, ".input.spin", state 1701, "(1)" - line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/asserts.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/asserts.spin.input.trail deleted file mode 100644 index 287e52a..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/asserts.spin.input.trail +++ /dev/null @@ -1,6 +0,0 @@ --4:-4:-4 -1:0:2673 -2:0:2674 -3:0:2675 -4:0:2676 -5:4:1129 diff --git a/formal-model/urcu/result-standard-execution-nonest/references.txt b/formal-model/urcu/result-standard-execution-nonest/references.txt deleted file mode 100644 index 72c67a2..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/references.txt +++ /dev/null @@ -1,13 +0,0 @@ -http://spinroot.com/spin/Man/ltl.html -http://en.wikipedia.org/wiki/Linear_temporal_logic -http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt - -http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php -http://spinroot.com/spin/Man/index.html -http://spinroot.com/spin/Man/promela.html - -LTL vs CTL : - -http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 -http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf - (downloaded) diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu.sh b/formal-model/urcu/result-standard-execution-nonest/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu.spin b/formal-model/urcu/result-standard-execution-nonest/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free.log b/formal-model/urcu/result-standard-execution-nonest/urcu_free.log deleted file mode 100644 index 00b1f6c..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free.log +++ /dev/null @@ -1,257 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 743) - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 2560, errors: 0 - 954166 states, stored - 10460008 states, matched - 11414174 transitions (= stored+matched) - 41707752 atomic steps -hash conflicts: 2907736 (resolved) - -Stats on memory usage (in Megabytes): - 76.437 equivalent memory usage for states (stored*(State-vector + overhead)) - 58.605 actual memory usage for states (compression: 76.67%) - state-vector as stored = 36 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 524.358 total actual memory usage - -unreached in proctype urcu_reader - line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 61, "(1)" - line 417, "pan.___", state 91, "(1)" - line 398, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 151, "(1)" - line 417, "pan.___", state 181, "(1)" - line 398, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 242, "(1)" - line 417, "pan.___", state 272, "(1)" - line 398, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 360, "(1)" - line 417, "pan.___", state 390, "(1)" - line 539, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 59, "(1)" - line 412, "pan.___", state 72, "(1)" - line 417, "pan.___", state 89, "(1)" - line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 153, "(1)" - line 412, "pan.___", state 166, "(1)" - line 651, "pan.___", state 199, "(1)" - line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 240, "(1)" - line 163, "pan.___", state 248, "(1)" - line 167, "pan.___", state 260, "(1)" - line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 927, "(1)" - line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, "pan.___", state 928, "else" - line 408, "pan.___", state 931, "(1)" - line 408, "pan.___", state 932, "(1)" - line 408, "pan.___", state 932, "(1)" - line 412, "pan.___", state 940, "(1)" - line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, "pan.___", state 941, "else" - line 412, "pan.___", state 944, "(1)" - line 412, "pan.___", state 945, "(1)" - line 412, "pan.___", state 945, "(1)" - line 410, "pan.___", state 950, "((i<1))" - line 410, "pan.___", state 950, "((i>=1))" - line 417, "pan.___", state 957, "(1)" - line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, "pan.___", state 958, "else" - line 417, "pan.___", state 961, "(1)" - line 417, "pan.___", state 962, "(1)" - line 417, "pan.___", state 962, "(1)" - line 419, "pan.___", state 965, "(1)" - line 419, "pan.___", state 965, "(1)" - line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1040, "(1)" - line 417, "pan.___", state 1057, "(1)" - line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1130, "(1)" - line 417, "pan.___", state 1147, "(1)" - line 398, "pan.___", state 1166, "(1)" - line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1222, "(1)" - line 417, "pan.___", state 1239, "(1)" - line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 412, "pan.___", state 1315, "(1)" - line 417, "pan.___", state 1332, "(1)" - line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1378, "(1)" - line 163, "pan.___", state 1386, "(1)" - line 167, "pan.___", state 1398, "(1)" - line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1595, "(1)" - line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 408, "pan.___", state 1596, "else" - line 408, "pan.___", state 1599, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 408, "pan.___", state 1600, "(1)" - line 412, "pan.___", state 1608, "(1)" - line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 412, "pan.___", state 1609, "else" - line 412, "pan.___", state 1612, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 412, "pan.___", state 1613, "(1)" - line 410, "pan.___", state 1618, "((i<1))" - line 410, "pan.___", state 1618, "((i>=1))" - line 417, "pan.___", state 1625, "(1)" - line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 417, "pan.___", state 1626, "else" - line 417, "pan.___", state 1629, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 417, "pan.___", state 1630, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 419, "pan.___", state 1633, "(1)" - line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 159, "pan.___", state 1681, "(1)" - line 163, "pan.___", state 1689, "(1)" - line 167, "pan.___", state 1701, "(1)" - line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free.spin.input b/formal-model/urcu/result-standard-execution-nonest/urcu_free.spin.input deleted file mode 100644 index e17e80e..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free.spin.input +++ /dev/null @@ -1,722 +0,0 @@ - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_free.spin.input.trail deleted file mode 100644 index 837f3d9..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free.spin.input.trail +++ /dev/null @@ -1,15043 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 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a/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.log b/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.log deleted file mode 100644 index d503334..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.log +++ /dev/null @@ -1,20 +0,0 @@ -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_nested.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 742) -Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.48 R= 1e+05 -Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.6 R= 1e+05 -Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.3 R= 1e+05 diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input b/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input deleted file mode 100644 index c94928c..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input +++ /dev/null @@ -1,696 +0,0 @@ -#define READER_NEST_LEVEL 1 - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -#define TEST_SIGNAL -#define TEST_SIGNAL_ON_READ - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE -#define get_pid() ((_pid < 1) -> 0 : 1) -#elif defined(TEST_SIGNAL_ON_READ) -#define get_pid() ((_pid < 2) -> 0 : 1) -#else -#define get_pid() (_pid) -#endif - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb(i, j) -{ - if - :: get_pid() >= NR_READERS -> - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); - :: else -> skip; - fi; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -#define get_readerid() (get_pid()) -#define get_writerid() (get_readerid() + NR_READERS) - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - dispatch_sighand_read_exec(); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 1; - ooo_mem(i); - dispatch_sighand_read_exec(); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - ooo_mem(i); - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - ooo_mem(i); - data_access[get_readerid()] = 1; - ooo_mem(i); - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS - /* Only test progress of one random reader. They are all the - * same. */ - if - :: get_readerid() == 0 -> -progress_reader: - skip; - fi; -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input.trail deleted file mode 100644 index 6f29ad2..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input.trail +++ /dev/null @@ -1,11161 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4365 -2:4:4317 -3:4:4320 -4:4:4320 -5:4:4320 -6:4:4323 -7:4:4331 -8:4:4331 -9:4:4331 -10:4:4334 -11:4:4340 -12:4:4344 -13:4:4344 -14:4:4344 -15:4:4347 -16:4:4340 -17:4:4344 -18:4:4344 -19:4:4344 -20:4:4347 -21:4:4355 -22:4:4359 -23:4:4360 -24:0:4365 -25:4:4362 -26:0:4365 -27:3:2331 -28:0:4365 -29:3:2337 -30:0:4365 -31:3:2338 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index 136ef67..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.log b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.log deleted file mode 100644 index c420e43..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.log +++ /dev/null @@ -1,266 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_mb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -pan: claim violated! (at depth 2071) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 72 byte, depth reached 5140, errors: 1 - 264561 states, stored - 3902374 states, matched - 4166935 transitions (= stored+matched) - 15172302 atomic steps -hash conflicts: 196282 (resolved) - -Stats on memory usage (in Megabytes): - 25.231 equivalent memory usage for states (stored*(State-vector + overhead)) - 16.681 actual memory usage for states (compression: 66.12%) - state-vector as stored = 38 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 482.365 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 151, "(1)" - line 419, "pan.___", state 181, "(1)" - line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 242, "(1)" - line 419, "pan.___", state 272, "(1)" - line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 331, "(1)" - line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 360, "(1)" - line 419, "pan.___", state 390, "(1)" - line 541, "pan.___", state 414, "-end-" - (18 of 414 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 421, "pan.___", state 97, "(1)" - line 421, "pan.___", state 97, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 410, "pan.___", state 153, "(1)" - line 414, "pan.___", state 166, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 653, "pan.___", state 199, "(1)" - line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 254, "(1)" - line 414, "pan.___", state 267, "(1)" - line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 345, "(1)" - line 414, "pan.___", state 358, "(1)" - line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 440, "(1)" - line 414, "pan.___", state 453, "(1)" - line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 533, "(1)" - line 414, "pan.___", state 546, "(1)" - line 400, "pan.___", state 582, "(1)" - line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 638, "(1)" - line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 731, "(1)" - line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 821, "(1)" - line 419, "pan.___", state 838, "(1)" - line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 912, "(1)" - line 419, "pan.___", state 929, "(1)" - line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1007, "(1)" - line 419, "pan.___", state 1024, "(1)" - line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1053, "else" - line 400, "pan.___", state 1056, "(1)" - line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1066, "(1)" - line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1067, "else" - line 404, "pan.___", state 1070, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 404, "pan.___", state 1071, "(1)" - line 402, "pan.___", state 1076, "((i<1))" - line 402, "pan.___", state 1076, "((i>=1))" - line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1095, "(1)" - line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1096, "else" - line 410, "pan.___", state 1099, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 410, "pan.___", state 1100, "(1)" - line 414, "pan.___", state 1108, "(1)" - line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1109, "else" - line 414, "pan.___", state 1112, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 414, "pan.___", state 1113, "(1)" - line 412, "pan.___", state 1118, "((i<1))" - line 412, "pan.___", state 1118, "((i>=1))" - line 419, "pan.___", state 1125, "(1)" - line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1126, "else" - line 419, "pan.___", state 1129, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 419, "pan.___", state 1130, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 421, "pan.___", state 1133, "(1)" - line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1208, "(1)" - line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1298, "(1)" - line 400, "pan.___", state 1334, "(1)" - line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1390, "(1)" - line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1483, "(1)" - line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1573, "(1)" - line 419, "pan.___", state 1590, "(1)" - line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1664, "(1)" - line 419, "pan.___", state 1681, "(1)" - line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1759, "(1)" - line 419, "pan.___", state 1776, "(1)" - line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1804, "(1)" - line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1805, "else" - line 400, "pan.___", state 1808, "(1)" - line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1818, "(1)" - line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1819, "else" - line 404, "pan.___", state 1822, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 404, "pan.___", state 1823, "(1)" - line 402, "pan.___", state 1828, "((i<1))" - line 402, "pan.___", state 1828, "((i>=1))" - line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1847, "(1)" - line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1848, "else" - line 410, "pan.___", state 1851, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 410, "pan.___", state 1852, "(1)" - line 414, "pan.___", state 1860, "(1)" - line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1861, "else" - line 414, "pan.___", state 1864, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 414, "pan.___", state 1865, "(1)" - line 412, "pan.___", state 1870, "((i<1))" - line 412, "pan.___", state 1870, "((i>=1))" - line 419, "pan.___", state 1877, "(1)" - line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1878, "else" - line 419, "pan.___", state 1881, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 419, "pan.___", state 1882, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 421, "pan.___", state 1885, "(1)" - line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1960, "(1)" - line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2051, "(1)" - line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 2146, "(1)" - line 703, "pan.___", state 2192, "-end-" - (144 of 2192 states) -unreached in proctype :init: - line 710, "pan.___", state 9, "((j<2))" - line 710, "pan.___", state 9, "((j>=2))" - line 711, "pan.___", state 20, "((j<2))" - line 711, "pan.___", state 20, "((j>=2))" - line 716, "pan.___", state 33, "((j<2))" - line 716, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 750, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 3.37 seconds -pan: rate 78504.748 states/second -pan: avg transition delay 8.0875e-07 usec -cp .input.spin urcu_free_no_mb.spin.input -cp .input.spin.trail urcu_free_no_mb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input deleted file mode 100644 index 3831d86..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input +++ /dev/null @@ -1,724 +0,0 @@ -#define NO_RMB -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input.trail deleted file mode 100644 index 7b2040a..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input.trail +++ /dev/null @@ -1,2074 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2654 -2:3:2606 -3:3:2609 -4:3:2609 -5:3:2612 -6:3:2620 -7:3:2620 -8:3:2623 -9:3:2629 -10:3:2633 -11:3:2633 -12:3:2636 -13:3:2644 -14:3:2648 -15:3:2649 -16:0:2654 -17:3:2651 -18:0:2654 -19:2:416 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a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.define b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.log b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.log deleted file mode 100644 index 439c78e..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.log +++ /dev/null @@ -1,265 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_rmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -pan: claim violated! (at depth 1726) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3264, errors: 1 - 229629 states, stored - 2119227 states, matched - 2348856 transitions (= stored+matched) - 8294746 atomic steps -hash conflicts: 96242 (resolved) - -Stats on memory usage (in Megabytes): - 18.395 equivalent memory usage for states (stored*(State-vector + overhead)) - 14.410 actual memory usage for states (compression: 78.34%) - state-vector as stored = 38 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 480.119 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 759, "(1)" - line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 760, "else" - line 409, "pan.___", state 763, "(1)" - line 409, "pan.___", state 764, "(1)" - line 409, "pan.___", state 764, "(1)" - line 413, "pan.___", state 772, "(1)" - line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 773, "else" - line 413, "pan.___", state 776, "(1)" - line 413, "pan.___", state 777, "(1)" - line 413, "pan.___", state 777, "(1)" - line 411, "pan.___", state 782, "((i<1))" - line 411, "pan.___", state 782, "((i>=1))" - line 418, "pan.___", state 789, "(1)" - line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 790, "else" - line 418, "pan.___", state 793, "(1)" - line 418, "pan.___", state 794, "(1)" - line 418, "pan.___", state 794, "(1)" - line 420, "pan.___", state 797, "(1)" - line 420, "pan.___", state 797, "(1)" - line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 872, "(1)" - line 418, "pan.___", state 889, "(1)" - line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 962, "(1)" - line 418, "pan.___", state 979, "(1)" - line 399, "pan.___", state 998, "(1)" - line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1054, "(1)" - line 418, "pan.___", state 1071, "(1)" - line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1147, "(1)" - line 418, "pan.___", state 1164, "(1)" - line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1343, "(1)" - line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1344, "else" - line 409, "pan.___", state 1347, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 409, "pan.___", state 1348, "(1)" - line 413, "pan.___", state 1356, "(1)" - line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1357, "else" - line 413, "pan.___", state 1360, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 413, "pan.___", state 1361, "(1)" - line 411, "pan.___", state 1366, "((i<1))" - line 411, "pan.___", state 1366, "((i>=1))" - line 418, "pan.___", state 1373, "(1)" - line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1374, "else" - line 418, "pan.___", state 1377, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 418, "pan.___", state 1378, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 420, "pan.___", state 1381, "(1)" - line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 1.88 seconds -pan: rate 122143.09 states/second -pan: avg transition delay 8.0039e-07 usec -cp .input.spin urcu_free_no_rmb.spin.input -cp .input.spin.trail urcu_free_no_rmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input deleted file mode 100644 index 6ccb255..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_RMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input.trail deleted file mode 100644 index 90f91e2..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input.trail +++ /dev/null @@ -1,1729 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1982 -2:3:1934 -3:3:1937 -4:3:1937 -5:3:1940 -6:3:1948 -7:3:1948 -8:3:1951 -9:3:1957 -10:3:1961 -11:3:1961 -12:3:1964 -13:3:1972 -14:3:1976 -15:3:1977 -16:0:1982 -17:3:1979 -18:0:1982 -19:2:416 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-1613:2:1856 -1614:2:1860 -1615:2:1868 -1616:2:1869 -1617:0:1982 -1618:2:1877 -1619:0:1982 -1620:2:1885 -1621:2:1886 -1622:2:1890 -1623:2:1894 -1624:2:1895 -1625:2:1899 -1626:2:1907 -1627:2:1908 -1628:0:1982 -1629:2:1916 -1630:0:1982 -1631:2:1918 -1632:0:1982 -1633:2:1919 -1634:0:1982 -1635:2:1922 -1636:0:1982 -1637:2:1927 -1638:0:1982 -1639:1:101 -1640:0:1982 -1641:2:1928 -1642:0:1982 -1643:1:102 -1644:1:106 -1645:1:107 -1646:1:115 -1647:1:116 -1648:1:120 -1649:1:121 -1650:1:129 -1651:1:134 -1652:1:138 -1653:1:139 -1654:1:146 -1655:1:147 -1656:1:158 -1657:1:159 -1658:1:160 -1659:1:171 -1660:1:183 -1661:1:184 -1662:0:1982 -1663:2:1927 -1664:0:1982 -1665:1:189 -1666:0:1982 -1667:2:1928 -1668:0:1982 -1669:1:191 -1670:0:1982 -1671:2:1927 -1672:0:1982 -1673:1:192 -1674:0:1982 -1675:2:1928 -1676:0:1982 -1677:1:193 -1678:1:197 -1679:1:198 -1680:1:206 -1681:1:207 -1682:1:211 -1683:1:212 -1684:1:220 -1685:1:225 -1686:1:229 -1687:1:230 -1688:1:237 -1689:1:238 -1690:1:249 -1691:1:250 -1692:1:251 -1693:1:262 -1694:1:274 -1695:1:275 -1696:0:1982 -1697:2:1927 -1698:0:1982 -1699:1:280 -1700:0:1982 -1701:2:1928 -1702:0:1982 -1703:1:282 -1704:0:1982 -1705:2:1927 -1706:0:1982 -1707:1:291 -1708:0:1982 -1709:2:1928 -1710:0:1982 -1711:1:293 -1712:0:1982 -1713:2:1927 -1714:0:1982 -1715:1:296 -1716:0:1982 -1717:2:1928 -1718:0:1982 -1719:1:301 -1720:0:1982 -1721:2:1927 -1722:0:1982 -1723:1:302 -1724:0:1980 -1725:2:1928 -1726:0:1986 -1727:2:1429 diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.define b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.log b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.log deleted file mode 100644 index abf7b83..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.log +++ /dev/null @@ -1,294 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_no_wmb.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -pan: claim violated! (at depth 1614) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 2823, errors: 1 - 81228 states, stored - 752552 states, matched - 833780 transitions (= stored+matched) - 2934533 atomic steps -hash conflicts: 10835 (resolved) - -Stats on memory usage (in Megabytes): - 6.507 equivalent memory usage for states (stored*(State-vector + overhead)) - 5.330 actual memory usage for states (compression: 81.92%) - state-vector as stored = 41 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 471.037 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 331, "(1)" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (18 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 20, "(1)" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 34, "(1)" - line 403, "pan.___", state 35, "(1)" - line 403, "pan.___", state 35, "(1)" - line 401, "pan.___", state 40, "((i<1))" - line 401, "pan.___", state 40, "((i>=1))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 60, "else" - line 409, "pan.___", state 63, "(1)" - line 409, "pan.___", state 64, "(1)" - line 409, "pan.___", state 64, "(1)" - line 413, "pan.___", state 72, "(1)" - line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 73, "else" - line 413, "pan.___", state 76, "(1)" - line 413, "pan.___", state 77, "(1)" - line 413, "pan.___", state 77, "(1)" - line 411, "pan.___", state 82, "((i<1))" - line 411, "pan.___", state 82, "((i>=1))" - line 418, "pan.___", state 89, "(1)" - line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 90, "else" - line 418, "pan.___", state 93, "(1)" - line 418, "pan.___", state 94, "(1)" - line 418, "pan.___", state 94, "(1)" - line 420, "pan.___", state 97, "(1)" - line 420, "pan.___", state 97, "(1)" - line 369, "pan.___", state 99, "(1)" - line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 114, "(1)" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 128, "(1)" - line 403, "pan.___", state 129, "(1)" - line 403, "pan.___", state 129, "(1)" - line 401, "pan.___", state 134, "((i<1))" - line 401, "pan.___", state 134, "((i>=1))" - line 409, "pan.___", state 153, "(1)" - line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 154, "else" - line 409, "pan.___", state 157, "(1)" - line 409, "pan.___", state 158, "(1)" - line 409, "pan.___", state 158, "(1)" - line 413, "pan.___", state 166, "(1)" - line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 167, "else" - line 413, "pan.___", state 170, "(1)" - line 413, "pan.___", state 171, "(1)" - line 413, "pan.___", state 171, "(1)" - line 411, "pan.___", state 176, "((i<1))" - line 411, "pan.___", state 176, "((i>=1))" - line 418, "pan.___", state 183, "(1)" - line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 184, "else" - line 418, "pan.___", state 187, "(1)" - line 418, "pan.___", state 188, "(1)" - line 418, "pan.___", state 188, "(1)" - line 420, "pan.___", state 191, "(1)" - line 420, "pan.___", state 191, "(1)" - line 369, "pan.___", state 193, "(1)" - line 652, "pan.___", state 199, "(1)" - line 646, "pan.___", state 202, "((write_lock==0))" - line 646, "pan.___", state 202, "else" - line 644, "pan.___", state 203, "(1)" - line 160, "pan.___", state 209, "(1)" - line 164, "pan.___", state 217, "(1)" - line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 164, "pan.___", state 218, "else" - line 162, "pan.___", state 223, "((j<1))" - line 162, "pan.___", state 223, "((j>=1))" - line 168, "pan.___", state 229, "(1)" - line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 168, "pan.___", state 230, "else" - line 160, "pan.___", state 241, "(1)" - line 168, "pan.___", state 261, "(1)" - line 160, "pan.___", state 277, "(1)" - line 164, "pan.___", state 285, "(1)" - line 168, "pan.___", state 297, "(1)" - line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 356, "(1)" - line 413, "pan.___", state 369, "(1)" - line 418, "pan.___", state 386, "(1)" - line 399, "pan.___", state 405, "(1)" - line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 461, "(1)" - line 418, "pan.___", state 478, "(1)" - line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 554, "(1)" - line 418, "pan.___", state 571, "(1)" - line 164, "pan.___", state 594, "(1)" - line 168, "pan.___", state 606, "(1)" - line 160, "pan.___", state 618, "(1)" - line 168, "pan.___", state 638, "(1)" - line 164, "pan.___", state 662, "(1)" - line 168, "pan.___", state 674, "(1)" - line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 698, "(1)" - line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 399, "pan.___", state 699, "else" - line 399, "pan.___", state 702, "(1)" - line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 712, "(1)" - line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 403, "pan.___", state 713, "else" - line 403, "pan.___", state 716, "(1)" - line 403, "pan.___", state 717, "(1)" - line 403, "pan.___", state 717, "(1)" - line 401, "pan.___", state 722, "((i<1))" - line 401, "pan.___", state 722, "((i>=1))" - line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 741, "(1)" - line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 742, "else" - line 409, "pan.___", state 745, "(1)" - line 409, "pan.___", state 746, "(1)" - line 409, "pan.___", state 746, "(1)" - line 413, "pan.___", state 754, "(1)" - line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 755, "else" - line 413, "pan.___", state 758, "(1)" - line 413, "pan.___", state 759, "(1)" - line 413, "pan.___", state 759, "(1)" - line 411, "pan.___", state 764, "((i<1))" - line 411, "pan.___", state 764, "((i>=1))" - line 418, "pan.___", state 771, "(1)" - line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 772, "else" - line 418, "pan.___", state 775, "(1)" - line 418, "pan.___", state 776, "(1)" - line 418, "pan.___", state 776, "(1)" - line 420, "pan.___", state 779, "(1)" - line 420, "pan.___", state 779, "(1)" - line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 854, "(1)" - line 418, "pan.___", state 871, "(1)" - line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 944, "(1)" - line 418, "pan.___", state 961, "(1)" - line 399, "pan.___", state 980, "(1)" - line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1036, "(1)" - line 418, "pan.___", state 1053, "(1)" - line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1129, "(1)" - line 418, "pan.___", state 1146, "(1)" - line 164, "pan.___", state 1169, "(1)" - line 168, "pan.___", state 1181, "(1)" - line 160, "pan.___", state 1193, "(1)" - line 168, "pan.___", state 1213, "(1)" - line 164, "pan.___", state 1237, "(1)" - line 168, "pan.___", state 1249, "(1)" - line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 399, "pan.___", state 1273, "(1)" - line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 399, "pan.___", state 1274, "else" - line 399, "pan.___", state 1277, "(1)" - line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 1287, "(1)" - line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 403, "pan.___", state 1288, "else" - line 403, "pan.___", state 1291, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 403, "pan.___", state 1292, "(1)" - line 401, "pan.___", state 1297, "((i<1))" - line 401, "pan.___", state 1297, "((i>=1))" - line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1316, "(1)" - line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1317, "else" - line 409, "pan.___", state 1320, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 409, "pan.___", state 1321, "(1)" - line 413, "pan.___", state 1329, "(1)" - line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1330, "else" - line 413, "pan.___", state 1333, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 413, "pan.___", state 1334, "(1)" - line 411, "pan.___", state 1339, "((i<1))" - line 411, "pan.___", state 1339, "((i>=1))" - line 418, "pan.___", state 1346, "(1)" - line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1347, "else" - line 418, "pan.___", state 1350, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 418, "pan.___", state 1351, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 420, "pan.___", state 1354, "(1)" - line 164, "pan.___", state 1379, "(1)" - line 168, "pan.___", state 1391, "(1)" - line 160, "pan.___", state 1403, "(1)" - line 168, "pan.___", state 1423, "(1)" - line 164, "pan.___", state 1447, "(1)" - line 168, "pan.___", state 1459, "(1)" - line 702, "pan.___", state 1484, "-end-" - (160 of 1484 states) -unreached in proctype :init: - line 709, "pan.___", state 9, "((j<2))" - line 709, "pan.___", state 9, "((j>=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 0.66 seconds -pan: rate 123072.73 states/second -pan: avg transition delay 7.9158e-07 usec -cp .input.spin urcu_free_no_wmb.spin.input -cp .input.spin.trail urcu_free_no_wmb.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input deleted file mode 100644 index df3cc4b..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define NO_WMB - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input.trail deleted file mode 100644 index fe987f0..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input.trail +++ /dev/null @@ -1,1617 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1946 -2:3:1898 -3:3:1901 -4:3:1901 -5:3:1904 -6:3:1912 -7:3:1912 -8:3:1915 -9:3:1921 -10:3:1925 -11:3:1925 -12:3:1928 -13:3:1936 -14:3:1940 -15:3:1941 -16:0:1946 -17:3:1943 -18:0:1946 -19:2:416 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-1615:1:244 diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.define b/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.log b/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.log deleted file mode 100644 index 16843a5..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.log +++ /dev/null @@ -1,197 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define >> pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_free_single_flip.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -pan: claim violated! (at depth 1316) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness disabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 2045, errors: 1 - 52434 states, stored - 479392 states, matched - 531826 transitions (= stored+matched) - 1926196 atomic steps -hash conflicts: 6594 (resolved) - -Stats on memory usage (in Megabytes): - 4.200 equivalent memory usage for states (stored*(State-vector + overhead)) - 3.608 actual memory usage for states (compression: 85.89%) - state-vector as stored = 44 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 469.279 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1013, "(1)" - line 164, "pan.___", state 1021, "(1)" - line 168, "pan.___", state 1033, "(1)" - line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" - line 710, "pan.___", state 20, "((j<2))" - line 710, "pan.___", state 20, "((j>=2))" - line 715, "pan.___", state 33, "((j<2))" - line 715, "pan.___", state 33, "((j>=2))" - (3 of 46 states) -unreached in proctype :never: - line 749, "pan.___", state 8, "-end-" - (1 of 8 states) - -pan: elapsed time 0.43 seconds -pan: rate 121939.53 states/second -pan: avg transition delay 8.0854e-07 usec -cp .input.spin urcu_free_single_flip.spin.input -cp .input.spin.trail urcu_free_single_flip.spin.input.trail -make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input b/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input deleted file mode 100644 index bb95a2d..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input +++ /dev/null @@ -1,723 +0,0 @@ -#define SINGLE_FLIP - -#define read_free_race (read_generation[0] == last_free_gen) -#define read_free (free_done && data_access[0]) - -//#define TEST_SIGNAL -//#define TEST_SIGNAL_ON_READ -//#define TEST_SIGNAL_ON_WRITE - -#define RCU_GP_CTR_BIT (1 << 7) -#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) - -#ifndef READER_NEST_LEVEL -#define READER_NEST_LEVEL 1 -//#define READER_NEST_LEVEL 2 -#endif - -#define REMOTE_BARRIERS -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input.trail deleted file mode 100644 index a3f64a1..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input.trail +++ /dev/null @@ -1,1319 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:1650 -2:3:1602 -3:3:1605 -4:3:1605 -5:3:1608 -6:3:1616 -7:3:1616 -8:3:1619 -9:3:1625 -10:3:1629 -11:3:1629 -12:3:1632 -13:3:1640 -14:3:1644 -15:3:1645 -16:0:1650 -17:3:1647 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-1307:2:1587 -1308:0:1650 -1309:2:1590 -1310:0:1650 -1311:2:1595 -1312:0:1650 -1313:1:302 -1314:0:1648 -1315:2:1596 -1316:0:1654 -1317:1:34 diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress.ltl b/formal-model/urcu/result-standard-execution-nonest/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.define b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.log b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.log deleted file mode 100644 index 8835ef4..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.log +++ /dev/null @@ -1,264 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_reader.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 1767: Claim reached state 9 (line 748) -Depth= 2582 States= 1e+06 Transitions= 1.91e+07 Memory= 498.674 t= 16.1 R= 6e+04 -Depth= 2582 States= 2e+06 Transitions= 3.89e+07 Memory= 531.096 t= 33 R= 6e+04 -Depth= 2582 States= 3e+06 Transitions= 5.89e+07 Memory= 563.518 t= 50.5 R= 6e+04 -pan: resizing hashtable to -w22.. done - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 2582, errors: 0 - 1743405 states, stored (3.27749e+06 visited) - 60942540 states, matched - 64220033 transitions (= visited+matched) -2.3877948e+08 atomic steps -hash conflicts: 25318829 (resolved) - -Stats on memory usage (in Megabytes): - 139.662 equivalent memory usage for states (stored*(State-vector + overhead)) - 113.924 actual memory usage for states (compression: 81.57%) - state-vector as stored = 41 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 603.623 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.spin.input.trail deleted file mode 100644 index 7c42af1..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_reader.spin.input.trail +++ /dev/null @@ -1,1270 +0,0 @@ --2:4:-2 --4:-4:-4 -1:0:4401 -2:4:4353 -3:4:4356 -4:4:4356 -5:4:4359 -6:4:4367 -7:4:4367 -8:4:4370 -9:4:4376 -10:4:4380 -11:4:4380 -12:4:4383 -13:4:4391 -14:4:4395 -15:4:4396 -16:0:4401 -17:4:4398 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-1253:1:105 -1254:0:4405 -1255:3:4347 -1256:0:4405 -1257:3:4346 -1258:0:4405 -1259:2:1348 -1260:0:4405 -1261:3:4347 -1262:0:4405 -1263:2:1347 -1264:0:4405 -1265:3:4346 -1266:0:4405 -1267:1:104 diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.define b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.log b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.log deleted file mode 100644 index be944b5..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.log +++ /dev/null @@ -1,264 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 744) -depth 15: Claim reached state 9 (line 749) -depth 205: Claim reached state 9 (line 748) -Depth= 2535 States= 1e+06 Transitions= 1.7e+07 Memory= 489.885 t= 14.4 R= 7e+04 -Depth= 2535 States= 2e+06 Transitions= 3.76e+07 Memory= 523.186 t= 32 R= 6e+04 -Depth= 2535 States= 3e+06 Transitions= 5.78e+07 Memory= 555.901 t= 49.6 R= 6e+04 -pan: resizing hashtable to -w22.. done - -(Spin Version 5.1.7 -- 23 December 2008) - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 2535, errors: 0 - 1687360 states, stored (3.30264e+06 visited) - 60975458 states, matched - 64278093 transitions (= visited+matched) -2.3918285e+08 atomic steps -hash conflicts: 20728375 (resolved) - -Stats on memory usage (in Megabytes): - 135.172 equivalent memory usage for states (stored*(State-vector + overhead)) - 110.532 actual memory usage for states (compression: 81.77%) - state-vector as stored = 41 byte + 28 byte overhead - 32.000 memory used for hash table (-w22) - 457.764 memory used for DFS stack (-m10000000) - 600.205 total actual memory usage - -unreached in proctype urcu_reader - line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 61, "(1)" - line 418, "pan.___", state 91, "(1)" - line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 151, "(1)" - line 418, "pan.___", state 181, "(1)" - line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 242, "(1)" - line 418, "pan.___", state 272, "(1)" - line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 360, "(1)" - line 418, "pan.___", state 390, "(1)" - line 540, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 59, "(1)" - line 413, "pan.___", state 72, "(1)" - line 418, "pan.___", state 89, "(1)" - line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 153, "(1)" - line 413, "pan.___", state 166, "(1)" - line 652, "pan.___", state 199, "(1)" - line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 240, "(1)" - line 164, "pan.___", state 248, "(1)" - line 168, "pan.___", state 260, "(1)" - line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 927, "(1)" - line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 928, "else" - line 409, "pan.___", state 931, "(1)" - line 409, "pan.___", state 932, "(1)" - line 409, "pan.___", state 932, "(1)" - line 413, "pan.___", state 940, "(1)" - line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 941, "else" - line 413, "pan.___", state 944, "(1)" - line 413, "pan.___", state 945, "(1)" - line 413, "pan.___", state 945, "(1)" - line 411, "pan.___", state 950, "((i<1))" - line 411, "pan.___", state 950, "((i>=1))" - line 418, "pan.___", state 957, "(1)" - line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 958, "else" - line 418, "pan.___", state 961, "(1)" - line 418, "pan.___", state 962, "(1)" - line 418, "pan.___", state 962, "(1)" - line 420, "pan.___", state 965, "(1)" - line 420, "pan.___", state 965, "(1)" - line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1040, "(1)" - line 418, "pan.___", state 1057, "(1)" - line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1130, "(1)" - line 418, "pan.___", state 1147, "(1)" - line 399, "pan.___", state 1166, "(1)" - line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1222, "(1)" - line 418, "pan.___", state 1239, "(1)" - line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 413, "pan.___", state 1315, "(1)" - line 418, "pan.___", state 1332, "(1)" - line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1378, "(1)" - line 164, "pan.___", state 1386, "(1)" - line 168, "pan.___", state 1398, "(1)" - line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1595, "(1)" - line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 409, "pan.___", state 1596, "else" - line 409, "pan.___", state 1599, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 409, "pan.___", state 1600, "(1)" - line 413, "pan.___", state 1608, "(1)" - line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 413, "pan.___", state 1609, "else" - line 413, "pan.___", state 1612, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 413, "pan.___", state 1613, "(1)" - line 411, "pan.___", state 1618, "((i<1))" - line 411, "pan.___", state 1618, "((i>=1))" - line 418, "pan.___", state 1625, "(1)" - line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 418, "pan.___", state 1626, "else" - line 418, "pan.___", state 1629, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 418, "pan.___", state 1630, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 420, "pan.___", state 1633, "(1)" - line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 160, "pan.___", state 1681, "(1)" - line 164, "pan.___", state 1689, "(1)" - line 168, "pan.___", state 1701, "(1)" - line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.spin.input.trail deleted file mode 100644 index e65d663..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer.spin.input.trail +++ /dev/null @@ -1,9 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2679 -2:1:2673 -3:1:2674 -4:1:2675 -5:1:2676 -6:0:2685 -7:5:1129 diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.define b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.log b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.log deleted file mode 100644 index 80c9c6d..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.log +++ /dev/null @@ -1,514 +0,0 @@ -make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' -rm -f pan* trail.out .input.spin* *.spin.trail .input.define -touch .input.define -cat .input.define > pan.ltl -cat DEFINES >> pan.ltl -spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl -cp urcu_progress_writer_error.define .input.define -cat .input.define > .input.spin -cat DEFINES >> .input.spin -cat urcu.spin >> .input.spin -rm -f .input.spin.trail -spin -a -X -N pan.ltl .input.spin -Exit-Status 0 -gcc -O2 -w -DHASH64 -o pan pan.c -./pan -a -f -v -c1 -X -m10000000 -w20 -warning: for p.o. reduction to be valid the never claim must be stutter-invariant -(never claims generated from LTL formulae are stutter-invariant) -depth 0: Claim reached state 5 (line 745) -depth 15: Claim reached state 9 (line 750) -depth 205: Claim reached state 9 (line 749) -pan: acceptance cycle (at depth 1651) -pan: wrote .input.spin.trail - -(Spin Version 5.1.7 -- 23 December 2008) -Warning: Search not completed - + Partial Order Reduction - -Full statespace search for: - never claim + - assertion violations + (if within scope of claim) - acceptance cycles + (fairness enabled) - invalid end states - (disabled by never claim) - -State-vector 56 byte, depth reached 3006, errors: 1 - 19244 states, stored (53713 visited) - 704248 states, matched - 757961 transitions (= visited+matched) - 2831420 atomic steps -hash conflicts: 5063 (resolved) - -Stats on memory usage (in Megabytes): - 1.542 equivalent memory usage for states (stored*(State-vector + overhead)) - 1.605 actual memory usage for states (unsuccessful compression: 104.14%) - state-vector as stored = 59 byte + 28 byte overhead - 8.000 memory used for hash table (-w20) - 457.764 memory used for DFS stack (-m10000000) - 467.326 total actual memory usage - -unreached in proctype urcu_reader - line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 61, "(1)" - line 419, "pan.___", state 91, "(1)" - line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 151, "(1)" - line 419, "pan.___", state 181, "(1)" - line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 242, "(1)" - line 419, "pan.___", state 272, "(1)" - line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 360, "(1)" - line 419, "pan.___", state 390, "(1)" - line 541, "pan.___", state 414, "-end-" - (17 of 414 states) -unreached in proctype urcu_writer - line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 20, "(1)" - line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 34, "(1)" - line 404, "pan.___", state 35, "(1)" - line 404, "pan.___", state 35, "(1)" - line 402, "pan.___", state 40, "((i<1))" - line 402, "pan.___", state 40, "((i>=1))" - line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 59, "(1)" - line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 60, "else" - line 410, "pan.___", state 63, "(1)" - line 410, "pan.___", state 64, "(1)" - line 410, "pan.___", state 64, "(1)" - line 414, "pan.___", state 72, "(1)" - line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 73, "else" - line 414, "pan.___", state 76, "(1)" - line 414, "pan.___", state 77, "(1)" - line 414, "pan.___", state 77, "(1)" - line 412, "pan.___", state 82, "((i<1))" - line 412, "pan.___", state 82, "((i>=1))" - line 419, "pan.___", state 89, "(1)" - line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 90, "else" - line 419, "pan.___", state 93, "(1)" - line 419, "pan.___", state 94, "(1)" - line 419, "pan.___", state 94, "(1)" - line 370, "pan.___", state 99, "(1)" - line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" - line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" - line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 114, "(1)" - line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 128, "(1)" - line 404, "pan.___", state 129, "(1)" - line 404, "pan.___", state 129, "(1)" - line 402, "pan.___", state 134, "((i<1))" - line 402, "pan.___", state 134, "((i>=1))" - line 410, "pan.___", state 153, "(1)" - line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 154, "else" - line 410, "pan.___", state 157, "(1)" - line 410, "pan.___", state 158, "(1)" - line 410, "pan.___", state 158, "(1)" - line 414, "pan.___", state 166, "(1)" - line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 167, "else" - line 414, "pan.___", state 170, "(1)" - line 414, "pan.___", state 171, "(1)" - line 414, "pan.___", state 171, "(1)" - line 412, "pan.___", state 176, "((i<1))" - line 412, "pan.___", state 176, "((i>=1))" - line 419, "pan.___", state 183, "(1)" - line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 184, "else" - line 419, "pan.___", state 187, "(1)" - line 419, "pan.___", state 188, "(1)" - line 419, "pan.___", state 188, "(1)" - line 421, "pan.___", state 191, "(1)" - line 421, "pan.___", state 191, "(1)" - line 370, "pan.___", state 193, "(1)" - line 653, "pan.___", state 199, "(1)" - line 647, "pan.___", state 202, "((write_lock==0))" - line 647, "pan.___", state 202, "else" - line 645, "pan.___", state 203, "(1)" - line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 225, "((j<1))" - line 178, "pan.___", state 225, "((j>=1))" - line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 240, "(1)" - line 165, "pan.___", state 248, "(1)" - line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 165, "pan.___", state 249, "else" - line 163, "pan.___", state 254, "((j<1))" - line 163, "pan.___", state 254, "((j>=1))" - line 169, "pan.___", state 260, "(1)" - line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 169, "pan.___", state 261, "else" - line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 171, "pan.___", state 264, "else" - line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" - line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" - line 169, "pan.___", state 323, "(1)" - line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" - line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 178, "pan.___", state 355, "((j<1))" - line 178, "pan.___", state 355, "((j>=1))" - line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 370, "(1)" - line 165, "pan.___", state 378, "(1)" - line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 165, "pan.___", state 379, "else" - line 163, "pan.___", state 384, "((j<1))" - line 163, "pan.___", state 384, "((j>=1))" - line 169, "pan.___", state 390, "(1)" - line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 169, "pan.___", state 391, "else" - line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 171, "pan.___", state 394, "else" - line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 410, "(1)" - line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 424, "(1)" - line 404, "pan.___", state 425, "(1)" - line 404, "pan.___", state 425, "(1)" - line 402, "pan.___", state 430, "((i<1))" - line 402, "pan.___", state 430, "((i>=1))" - line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 449, "(1)" - line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 450, "else" - line 410, "pan.___", state 453, "(1)" - line 410, "pan.___", state 454, "(1)" - line 410, "pan.___", state 454, "(1)" - line 414, "pan.___", state 462, "(1)" - line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 463, "else" - line 414, "pan.___", state 466, "(1)" - line 414, "pan.___", state 467, "(1)" - line 414, "pan.___", state 467, "(1)" - line 412, "pan.___", state 472, "((i<1))" - line 412, "pan.___", state 472, "((i>=1))" - line 419, "pan.___", state 479, "(1)" - line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 480, "else" - line 419, "pan.___", state 483, "(1)" - line 419, "pan.___", state 484, "(1)" - line 419, "pan.___", state 484, "(1)" - line 421, "pan.___", state 487, "(1)" - line 421, "pan.___", state 487, "(1)" - line 370, "pan.___", state 489, "(1)" - line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[_pid] = (tmp^(1<<7))" - line 400, "pan.___", state 498, "(1)" - line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 499, "else" - line 400, "pan.___", state 502, "(1)" - line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 516, "(1)" - line 404, "pan.___", state 517, "(1)" - line 404, "pan.___", state 517, "(1)" - line 402, "pan.___", state 522, "((i<1))" - line 402, "pan.___", state 522, "((i>=1))" - line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 541, "(1)" - line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 542, "else" - line 410, "pan.___", state 545, "(1)" - line 410, "pan.___", state 546, "(1)" - line 410, "pan.___", state 546, "(1)" - line 414, "pan.___", state 554, "(1)" - line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 555, "else" - line 414, "pan.___", state 558, "(1)" - line 414, "pan.___", state 559, "(1)" - line 414, "pan.___", state 559, "(1)" - line 412, "pan.___", state 564, "((i<1))" - line 412, "pan.___", state 564, "((i>=1))" - line 419, "pan.___", state 571, "(1)" - line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 572, "else" - line 419, "pan.___", state 575, "(1)" - line 419, "pan.___", state 576, "(1)" - line 419, "pan.___", state 576, "(1)" - line 421, "pan.___", state 579, "(1)" - line 421, "pan.___", state 579, "(1)" - line 370, "pan.___", state 581, "(1)" - line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 595, "(1)" - line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 609, "(1)" - line 404, "pan.___", state 610, "(1)" - line 404, "pan.___", state 610, "(1)" - line 402, "pan.___", state 615, "((i<1))" - line 402, "pan.___", state 615, "((i>=1))" - line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 634, "(1)" - line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 635, "else" - line 410, "pan.___", state 638, "(1)" - line 410, "pan.___", state 639, "(1)" - line 410, "pan.___", state 639, "(1)" - line 414, "pan.___", state 647, "(1)" - line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 648, "else" - line 414, "pan.___", state 651, "(1)" - line 414, "pan.___", state 652, "(1)" - line 414, "pan.___", state 652, "(1)" - line 412, "pan.___", state 657, "((i<1))" - line 412, "pan.___", state 657, "((i>=1))" - line 419, "pan.___", state 664, "(1)" - line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 665, "else" - line 419, "pan.___", state 668, "(1)" - line 419, "pan.___", state 669, "(1)" - line 419, "pan.___", state 669, "(1)" - line 421, "pan.___", state 672, "(1)" - line 421, "pan.___", state 672, "(1)" - line 370, "pan.___", state 674, "(1)" - line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 681, "(1)" - line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 682, "else" - line 400, "pan.___", state 685, "(1)" - line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 695, "(1)" - line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 696, "else" - line 404, "pan.___", state 699, "(1)" - line 404, "pan.___", state 700, "(1)" - line 404, "pan.___", state 700, "(1)" - line 402, "pan.___", state 705, "((i<1))" - line 402, "pan.___", state 705, "((i>=1))" - line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 724, "(1)" - line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 725, "else" - line 410, "pan.___", state 728, "(1)" - line 410, "pan.___", state 729, "(1)" - line 410, "pan.___", state 729, "(1)" - line 414, "pan.___", state 737, "(1)" - line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 738, "else" - line 414, "pan.___", state 741, "(1)" - line 414, "pan.___", state 742, "(1)" - line 414, "pan.___", state 742, "(1)" - line 412, "pan.___", state 747, "((i<1))" - line 412, "pan.___", state 747, "((i>=1))" - line 419, "pan.___", state 754, "(1)" - line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 755, "else" - line 419, "pan.___", state 758, "(1)" - line 419, "pan.___", state 759, "(1)" - line 419, "pan.___", state 759, "(1)" - line 421, "pan.___", state 762, "(1)" - line 421, "pan.___", state 762, "(1)" - line 370, "pan.___", state 764, "(1)" - line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[_pid])&(1<<7))))" - line 430, "pan.___", state 767, "else" - line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 779, "(1)" - line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 780, "else" - line 400, "pan.___", state 783, "(1)" - line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 793, "(1)" - line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 794, "else" - line 404, "pan.___", state 797, "(1)" - line 404, "pan.___", state 798, "(1)" - line 404, "pan.___", state 798, "(1)" - line 402, "pan.___", state 803, "((i<1))" - line 402, "pan.___", state 803, "((i>=1))" - line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 822, "(1)" - line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 823, "else" - line 410, "pan.___", state 826, "(1)" - line 410, "pan.___", state 827, "(1)" - line 410, "pan.___", state 827, "(1)" - line 414, "pan.___", state 835, "(1)" - line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 836, "else" - line 414, "pan.___", state 839, "(1)" - line 414, "pan.___", state 840, "(1)" - line 414, "pan.___", state 840, "(1)" - line 412, "pan.___", state 845, "((i<1))" - line 412, "pan.___", state 845, "((i>=1))" - line 419, "pan.___", state 852, "(1)" - line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 853, "else" - line 419, "pan.___", state 856, "(1)" - line 419, "pan.___", state 857, "(1)" - line 419, "pan.___", state 857, "(1)" - line 421, "pan.___", state 860, "(1)" - line 421, "pan.___", state 860, "(1)" - line 370, "pan.___", state 862, "(1)" - line 449, "pan.___", state 870, "((tmp<1))" - line 449, "pan.___", state 870, "((tmp>=1))" - line 462, "pan.___", state 873, "tmp = 0" - line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 883, "(1)" - line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 897, "(1)" - line 404, "pan.___", state 898, "(1)" - line 404, "pan.___", state 898, "(1)" - line 402, "pan.___", state 903, "((i<1))" - line 402, "pan.___", state 903, "((i>=1))" - line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 922, "(1)" - line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 923, "else" - line 410, "pan.___", state 926, "(1)" - line 410, "pan.___", state 927, "(1)" - line 410, "pan.___", state 927, "(1)" - line 414, "pan.___", state 935, "(1)" - line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 936, "else" - line 414, "pan.___", state 939, "(1)" - line 414, "pan.___", state 940, "(1)" - line 414, "pan.___", state 940, "(1)" - line 412, "pan.___", state 945, "((i<1))" - line 412, "pan.___", state 945, "((i>=1))" - line 419, "pan.___", state 952, "(1)" - line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 953, "else" - line 419, "pan.___", state 956, "(1)" - line 419, "pan.___", state 957, "(1)" - line 419, "pan.___", state 957, "(1)" - line 421, "pan.___", state 960, "(1)" - line 421, "pan.___", state 960, "(1)" - line 370, "pan.___", state 962, "(1)" - line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[_pid]" - line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 973, "(1)" - line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 987, "(1)" - line 404, "pan.___", state 988, "(1)" - line 404, "pan.___", state 988, "(1)" - line 402, "pan.___", state 993, "((i<1))" - line 402, "pan.___", state 993, "((i>=1))" - line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1012, "(1)" - line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1013, "else" - line 410, "pan.___", state 1016, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 410, "pan.___", state 1017, "(1)" - line 414, "pan.___", state 1025, "(1)" - line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1026, "else" - line 414, "pan.___", state 1029, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 414, "pan.___", state 1030, "(1)" - line 412, "pan.___", state 1035, "((i<1))" - line 412, "pan.___", state 1035, "((i>=1))" - line 419, "pan.___", state 1042, "(1)" - line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1043, "else" - line 419, "pan.___", state 1046, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 419, "pan.___", state 1047, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 421, "pan.___", state 1050, "(1)" - line 370, "pan.___", state 1052, "(1)" - line 400, "pan.___", state 1061, "(1)" - line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1117, "(1)" - line 419, "pan.___", state 1134, "(1)" - line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 414, "pan.___", state 1210, "(1)" - line 419, "pan.___", state 1227, "(1)" - line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1287, "(1)" - line 414, "pan.___", state 1300, "(1)" - line 419, "pan.___", state 1317, "(1)" - line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" - line 400, "pan.___", state 1342, "(1)" - line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" - line 400, "pan.___", state 1343, "else" - line 400, "pan.___", state 1346, "(1)" - line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 404, "pan.___", state 1356, "(1)" - line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" - line 404, "pan.___", state 1357, "else" - line 404, "pan.___", state 1360, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 404, "pan.___", state 1361, "(1)" - line 402, "pan.___", state 1366, "((i<1))" - line 402, "pan.___", state 1366, "((i>=1))" - line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 410, "pan.___", state 1385, "(1)" - line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" - line 410, "pan.___", state 1386, "else" - line 410, "pan.___", state 1389, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 410, "pan.___", state 1390, "(1)" - line 414, "pan.___", state 1398, "(1)" - line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" - line 414, "pan.___", state 1399, "else" - line 414, "pan.___", state 1402, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 414, "pan.___", state 1403, "(1)" - line 412, "pan.___", state 1408, "((i<1))" - line 412, "pan.___", state 1408, "((i>=1))" - line 419, "pan.___", state 1415, "(1)" - line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" - line 419, "pan.___", state 1416, "else" - line 419, "pan.___", state 1419, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 419, "pan.___", state 1420, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 421, "pan.___", state 1423, "(1)" - line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" - line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" - line 161, "pan.___", state 1471, "(1)" - line 165, "pan.___", state 1479, "(1)" - line 169, "pan.___", state 1491, "(1)" - line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.spin.input.trail b/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.spin.input.trail deleted file mode 100644 index e1188eb..0000000 --- a/formal-model/urcu/result-standard-execution-nonest/urcu_progress_writer_error.spin.input.trail +++ /dev/null @@ -1,3010 +0,0 @@ --2:3:-2 --4:-4:-4 -1:0:2108 -2:3:2060 -3:3:2063 -4:3:2063 -5:3:2066 -6:3:2074 -7:3:2074 -8:3:2077 -9:3:2083 -10:3:2087 -11:3:2087 -12:3:2090 -13:3:2098 -14:3:2102 -15:3:2103 -16:0:2108 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-3006:0:2112 -3007:1:301 diff --git a/formal-model/urcu/urcu.sh b/formal-model/urcu/urcu.sh deleted file mode 100644 index 65ff517..0000000 --- a/formal-model/urcu/urcu.sh +++ /dev/null @@ -1,29 +0,0 @@ -#!/bin/sh -# -# Compiles and runs the urcu.spin Promela model. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -# -# Copyright (C) IBM Corporation, 2009 -# Mathieu Desnoyers, 2009 -# -# Authors: Paul E. McKenney -# Mathieu Desnoyers - -# Basic execution, without LTL clauses. See Makefile. - -spin -a urcu.spin -cc -DSAFETY -o pan pan.c -./pan -v -c1 -X -m10000000 -w21 diff --git a/formal-model/urcu/urcu.spin b/formal-model/urcu/urcu.spin deleted file mode 100644 index 2cfcb70..0000000 --- a/formal-model/urcu/urcu.spin +++ /dev/null @@ -1,705 +0,0 @@ -/* - * mem.spin: Promela code to validate memory barriers with OOO memory. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (c) 2009 Mathieu Desnoyers - */ - -/* Promela validation variables. */ - -/* specific defines "included" here */ -/* DEFINES file "included" here */ - -/* All signal readers have same PID and uses same reader variable */ -#ifdef TEST_SIGNAL_ON_WRITE - -#define NR_READERS 1 /* the writer is also a signal reader */ -#define NR_WRITERS 1 - -#define NR_PROCS 1 - -#define get_pid() (0) - -#elif defined(TEST_SIGNAL_ON_READ) - -#define get_pid() ((_pid < 2) -> 0 : 1) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#else - -#define get_pid() (_pid) - -#define NR_READERS 1 -#define NR_WRITERS 1 - -#define NR_PROCS 2 - -#endif - -#define get_readerid() (get_pid()) - -/* - * Each process have its own data in cache. Caches are randomly updated. - * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces - * both. - */ - -typedef per_proc_byte { - byte val[NR_PROCS]; -}; - -/* Bitfield has a maximum of 8 procs */ -typedef per_proc_bit { - byte bitfield; -}; - -#define DECLARE_CACHED_VAR(type, x) \ - type mem_##x; \ - per_proc_##type cached_##x; \ - per_proc_bit cache_dirty_##x; - -#define INIT_CACHED_VAR(x, v, j) \ - mem_##x = v; \ - cache_dirty_##x.bitfield = 0; \ - j = 0; \ - do \ - :: j < NR_PROCS -> \ - cached_##x.val[j] = v; \ - j++ \ - :: j >= NR_PROCS -> break \ - od; - -#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) - -#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) - -#define WRITE_CACHED_VAR(x, v) \ - atomic { \ - cached_##x.val[get_pid()] = v; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield | (1 << get_pid()); \ - } - -#define CACHE_WRITE_TO_MEM(x, id) \ - if \ - :: IS_CACHE_DIRTY(x, id) -> \ - mem_##x = cached_##x.val[id]; \ - cache_dirty_##x.bitfield = \ - cache_dirty_##x.bitfield & (~(1 << id)); \ - :: else -> \ - skip \ - fi; - -#define CACHE_READ_FROM_MEM(x, id) \ - if \ - :: !IS_CACHE_DIRTY(x, id) -> \ - cached_##x.val[id] = mem_##x;\ - :: else -> \ - skip \ - fi; - -/* - * May update other caches if cache is dirty, or not. - */ -#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ - if \ - :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ - :: 1 -> skip \ - fi; - -#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ - if \ - :: 1 -> CACHE_READ_FROM_MEM(x, id); \ - :: 1 -> skip \ - fi; - -/* - * Remote barriers tests the scheme where a signal (or IPI) is sent to all - * reader threads to promote their compiler barrier to a smp_mb(). - */ -#ifdef REMOTE_BARRIERS - -inline smp_rmb_pid(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, i); - } -} - -inline smp_wmb_pid(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); - j = 0; - do - :: j < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); - j++ - :: j >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, i); - } -} - -inline smp_mb_pid(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb_pid(i, j); -#endif -#ifndef NO_RMB - smp_rmb_pid(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(j); -#endif -#endif - } -} - -/* - * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a - * signal or IPI to have all readers execute a smp_mb. - * We are not modeling the whole rendez-vous between readers and writers here, - * we just let the writer update each reader's caches remotely. - */ -inline smp_mb_writer(i, j) -{ - smp_mb_pid(get_pid(), j); - i = 0; - do - :: i < NR_READERS -> - smp_mb_pid(i, j); - i++; - :: i >= NR_READERS -> break - od; - smp_mb_pid(get_pid(), j); -} - -inline smp_mb_reader(i, j) -{ - skip; -} - -#else - -inline smp_rmb(i, j) -{ - atomic { - CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline smp_wmb(i, j) -{ - atomic { - CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); - i++ - :: i >= NR_READERS -> break - od; - CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - } -} - -inline smp_mb(i, j) -{ - atomic { -#ifndef NO_WMB - smp_wmb(i, j); -#endif -#ifndef NO_RMB - smp_rmb(i, j); -#endif -#ifdef NO_WMB -#ifdef NO_RMB - ooo_mem(i); -#endif -#endif - } -} - -inline smp_mb_writer(i, j) -{ - smp_mb(i, j); -} - -inline smp_mb_reader(i, j) -{ - smp_mb(i, j); -} - -#endif - -/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ -DECLARE_CACHED_VAR(byte, urcu_gp_ctr); -/* Note ! currently only two readers */ -DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); -/* pointer generation */ -DECLARE_CACHED_VAR(byte, generation_ptr); - -byte last_free_gen = 0; -bit free_done = 0; -byte read_generation[NR_READERS]; -bit data_access[NR_READERS]; - -bit write_lock = 0; - -bit init_done = 0; - -bit sighand_exec = 0; - -inline wait_init_done() -{ - do - :: init_done == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TEST_SIGNAL - -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> break; - od; -} - -#ifdef TOO_BIG_STATE_SPACE -inline wait_for_sighand_exec() -{ - sighand_exec = 0; - do - :: sighand_exec == 0 -> skip; - :: else -> - if - :: 1 -> break; - :: 1 -> sighand_exec = 0; - skip; - fi; - od; -} -#endif - -#else - -inline wait_for_sighand_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_WRITE -/* Block on signal handler execution */ -inline dispatch_sighand_write_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_write_exec() -{ - skip; -} - -#endif - -#ifdef TEST_SIGNAL_ON_READ -/* Block on signal handler execution */ -inline dispatch_sighand_read_exec() -{ - sighand_exec = 1; - do - :: sighand_exec == 1 -> - skip; - :: else -> - break; - od; -} - -#else - -inline dispatch_sighand_read_exec() -{ - skip; -} - -#endif - - -inline ooo_mem(i) -{ - atomic { - RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); - RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); - i = 0; - do - :: i < NR_READERS -> - RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], - get_pid()); - i++ - :: i >= NR_READERS -> break - od; - RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); - } -} - -inline wait_for_reader(tmp, tmp2, i, j) -{ - do - :: 1 -> - tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); - ooo_mem(i); - dispatch_sighand_write_exec(); - if - :: (tmp2 & RCU_GP_CTR_NEST_MASK) - && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) - & RCU_GP_CTR_BIT) -> -#ifndef GEN_ERROR_WRITER_PROGRESS - smp_mb_writer(i, j); -#else - ooo_mem(i); -#endif - dispatch_sighand_write_exec(); - :: else -> - break; - fi; - od; -} - -inline wait_for_quiescent_state(tmp, tmp2, i, j) -{ - tmp = 0; - do - :: tmp < NR_READERS -> - wait_for_reader(tmp, tmp2, i, j); - if - :: (NR_READERS > 1) && (tmp < NR_READERS - 1) - -> ooo_mem(i); - dispatch_sighand_write_exec(); - :: else - -> skip; - fi; - tmp++ - :: tmp >= NR_READERS -> break - od; -} - -/* Model the RCU read-side critical section. */ - -#ifndef TEST_SIGNAL_ON_WRITE - -inline urcu_one_read(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - dispatch_sighand_read_exec(); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - dispatch_sighand_read_exec(); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - dispatch_sighand_read_exec(); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //dispatch_sighand_read_exec(); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read(i, j, nest_i, tmp, tmp2); - od; -} - -#endif //!TEST_SIGNAL_ON_WRITE - -#ifdef TEST_SIGNAL -/* signal handler reader */ - -inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) -{ - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - ooo_mem(i); - tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - if - :: (!(tmp & RCU_GP_CTR_NEST_MASK)) - -> - tmp2 = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp2); - :: else -> - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], - tmp + 1); - fi; - smp_mb_reader(i, j); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - - read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); - data_access[get_readerid()] = 1; - data_access[get_readerid()] = 0; - - nest_i = 0; - do - :: nest_i < READER_NEST_LEVEL -> - smp_mb_reader(i, j); - tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); - ooo_mem(i); - WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); - nest_i++; - :: nest_i >= READER_NEST_LEVEL -> break; - od; - //ooo_mem(i); - //smp_mc(i); /* added */ -} - -active proctype urcu_reader_sig() -{ - byte i, j, nest_i; - byte tmp, tmp2; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - -end_reader: - do - :: 1 -> - wait_for_sighand_exec(); - /* - * We do not test reader's progress here, because we are mainly - * interested in writer's progress. The reader never blocks - * anyway. We have to test for reader/writer's progress - * separately, otherwise we could think the writer is doing - * progress when it's blocked by an always progressing reader. - */ -#ifdef READER_PROGRESS -progress_reader: -#endif - urcu_one_read_sig(i, j, nest_i, tmp, tmp2); - od; -} - -#endif - -/* Model the RCU update process. */ - -active proctype urcu_writer() -{ - byte i, j; - byte tmp, tmp2; - byte old_gen; - - wait_init_done(); - - assert(get_pid() < NR_PROCS); - - do - :: (READ_CACHED_VAR(generation_ptr) < 5) -> -#ifdef WRITER_PROGRESS -progress_writer1: -#endif - ooo_mem(i); - dispatch_sighand_write_exec(); - atomic { - old_gen = READ_CACHED_VAR(generation_ptr); - WRITE_CACHED_VAR(generation_ptr, old_gen + 1); - } - ooo_mem(i); - dispatch_sighand_write_exec(); - - do - :: 1 -> - atomic { - if - :: write_lock == 0 -> - write_lock = 1; - break; - :: else -> - skip; - fi; - } - od; - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - ooo_mem(i); - dispatch_sighand_write_exec(); - //smp_mc(i); - wait_for_quiescent_state(tmp, tmp2, i, j); - //smp_mc(i); -#ifndef SINGLE_FLIP - ooo_mem(i); - dispatch_sighand_write_exec(); - tmp = READ_CACHED_VAR(urcu_gp_ctr); - ooo_mem(i); - dispatch_sighand_write_exec(); - WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); - //smp_mc(i); - ooo_mem(i); - dispatch_sighand_write_exec(); - wait_for_quiescent_state(tmp, tmp2, i, j); -#endif - smp_mb_writer(i, j); - dispatch_sighand_write_exec(); - write_lock = 0; - /* free-up step, e.g., kfree(). */ - atomic { - last_free_gen = old_gen; - free_done = 1; - } - :: else -> break; - od; - /* - * Given the reader loops infinitely, let the writer also busy-loop - * with progress here so, with weak fairness, we can test the - * writer's progress. - */ -end_writer: - do - :: 1 -> -#ifdef WRITER_PROGRESS -progress_writer2: -#endif - dispatch_sighand_write_exec(); - od; -} - -/* Leave after the readers and writers so the pid count is ok. */ -init { - byte i, j; - - atomic { - INIT_CACHED_VAR(urcu_gp_ctr, 1, j); - INIT_CACHED_VAR(generation_ptr, 0, j); - - i = 0; - do - :: i < NR_READERS -> - INIT_CACHED_VAR(urcu_active_readers[i], 0, j); - read_generation[i] = 1; - data_access[i] = 0; - i++; - :: i >= NR_READERS -> break - od; - init_done = 1; - } -} diff --git a/formal-model/urcu/urcu_free.ltl b/formal-model/urcu/urcu_free.ltl deleted file mode 100644 index 1954414..0000000 --- a/formal-model/urcu/urcu_free.ltl +++ /dev/null @@ -1 +0,0 @@ -[] (read_free -> !read_free_race) diff --git a/formal-model/urcu/urcu_free_no_mb.define b/formal-model/urcu/urcu_free_no_mb.define deleted file mode 100644 index 136ef67..0000000 --- a/formal-model/urcu/urcu_free_no_mb.define +++ /dev/null @@ -1,2 +0,0 @@ -#define NO_RMB -#define NO_WMB diff --git a/formal-model/urcu/urcu_free_no_rmb.define b/formal-model/urcu/urcu_free_no_rmb.define deleted file mode 100644 index 73e61a4..0000000 --- a/formal-model/urcu/urcu_free_no_rmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_RMB diff --git a/formal-model/urcu/urcu_free_no_wmb.define b/formal-model/urcu/urcu_free_no_wmb.define deleted file mode 100644 index 710f29d..0000000 --- a/formal-model/urcu/urcu_free_no_wmb.define +++ /dev/null @@ -1 +0,0 @@ -#define NO_WMB diff --git a/formal-model/urcu/urcu_free_single_flip.define b/formal-model/urcu/urcu_free_single_flip.define deleted file mode 100644 index 5e642ef..0000000 --- a/formal-model/urcu/urcu_free_single_flip.define +++ /dev/null @@ -1 +0,0 @@ -#define SINGLE_FLIP diff --git a/formal-model/urcu/urcu_progress.ltl b/formal-model/urcu/urcu_progress.ltl deleted file mode 100644 index 8718641..0000000 --- a/formal-model/urcu/urcu_progress.ltl +++ /dev/null @@ -1 +0,0 @@ -([] <> !np_) diff --git a/formal-model/urcu/urcu_progress_reader.define b/formal-model/urcu/urcu_progress_reader.define deleted file mode 100644 index ff3f783..0000000 --- a/formal-model/urcu/urcu_progress_reader.define +++ /dev/null @@ -1 +0,0 @@ -#define READER_PROGRESS diff --git a/formal-model/urcu/urcu_progress_writer.define b/formal-model/urcu/urcu_progress_writer.define deleted file mode 100644 index 1e4417f..0000000 --- a/formal-model/urcu/urcu_progress_writer.define +++ /dev/null @@ -1 +0,0 @@ -#define WRITER_PROGRESS diff --git a/formal-model/urcu/urcu_progress_writer_error.define b/formal-model/urcu/urcu_progress_writer_error.define deleted file mode 100644 index 8d304f5..0000000 --- a/formal-model/urcu/urcu_progress_writer_error.define +++ /dev/null @@ -1,2 +0,0 @@ -#define WRITER_PROGRESS -#define GEN_ERROR_WRITER_PROGRESS diff --git a/futex-wakeup/DEFINES b/futex-wakeup/DEFINES new file mode 100644 index 0000000..e328b55 --- /dev/null +++ b/futex-wakeup/DEFINES @@ -0,0 +1 @@ +#define queue_has_entry (queue[0] == 1 || queue[1] == 1) diff --git a/futex-wakeup/Makefile b/futex-wakeup/Makefile new file mode 100644 index 0000000..11d98e8 --- /dev/null +++ b/futex-wakeup/Makefile @@ -0,0 +1,108 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#CFLAGS=-DHASH64 -DREACH +CFLAGS=-DHASH64 + +#try pan -i to get the smallest trace. + +SPINFILE=futex.spin +SPINFILE_FAIR=futex.spin + +default: + make futex_progress | tee futex_progress.log + make futex_progress_no_wake | tee futex_progress_no_wake.log + make futex_progress_late_dec | tee futex_progress_late_dec.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep error *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w19 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +futex_progress: clean futex_ltl run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +futex_progress_no_wake: clean futex_ltl futex_progress_no_wake_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +futex_progress_no_wake_define: + cp futex_progress_no_wake.define .input.define + +futex_progress_late_dec: clean futex_ltl futex_progress_late_dec_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +futex_progress_late_dec_define: + cp futex_progress_late_dec.define .input.define + +futex_ltl: + touch .input.define + cat DEFINES > pan.ltl + cat .input.define >> pan.ltl + spin -f "!(`cat futex.ltl | grep -v ^//`)" >> pan.ltl + +run: pan + ./pan -a -v -c1 -X -m10000000 -w19 + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +run_weak_fair: pan_fair + ./pan_fair -a -f -v -c1 -X -m10000000 -w20 + +pan_fair: pan_fair.c + gcc -w ${CFLAGS} -o pan_fair pan_fair.c + +pan_fair.c: pan.ltl ${SPINFILE_FAIR} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE_FAIR} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + mv pan.c pan_fair.c + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/futex-wakeup/futex.ltl b/futex-wakeup/futex.ltl new file mode 100644 index 0000000..3d6842e --- /dev/null +++ b/futex-wakeup/futex.ltl @@ -0,0 +1 @@ +([] <> ((!np_) || (!queue_has_entry))) diff --git a/futex-wakeup/futex.spin b/futex-wakeup/futex.spin new file mode 100644 index 0000000..5459a53 --- /dev/null +++ b/futex-wakeup/futex.spin @@ -0,0 +1,124 @@ +/* + * futex.spin: Promela code to validate futex wakeup algorithm. + * + * Algorithm verified : + * + * queue = 0; + * fut = 0; + * runvar = 0; + * + * Waker + * queue = 1; + * if (fut == -1) { + * fut = 0; + * } + * + * Waiter + * while (1) { + * progress: + * fut = fut - 1; + * if (queue == 1) { + * fut = 0; + * } else { + * if (fut == -1) { + * while (fut == -1) { } + * } + * } + * queue = 0; + * } + * + * if queue = 1, then !_np + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +#define get_pid() (_pid) + +int queue[2] = 0; +int fut = 0; + +active [2] proctype waker() +{ + assert(get_pid() < 2); + + queue[get_pid()] = 1; + + if + :: (fut == -1) -> + fut = 0; + :: else -> + skip; + fi; + + queue[get_pid()] = 1; + + if + :: (fut == -1) -> + fut = 0; + :: else -> + skip; + fi; + +#ifdef INJ_QUEUE_NO_WAKE + queue[get_pid()] = 1; +#endif +} + + +active proctype waiter() +{ + do + :: 1 -> +#ifndef INJ_LATE_DEC + fut = fut - 1; +#endif + if + :: (queue[0] == 1 || queue[1] == 1) -> +#ifndef INJ_LATE_DEC + fut = 0; +#endif + skip; + :: else -> +#ifdef INJ_LATE_DEC + fut = fut - 1; +#endif + if + :: (fut == -1) -> + do + :: 1 -> + if + :: (fut == -1) -> + skip; + :: else -> + break; + fi; + od; + :: else -> + skip; + fi; + fi; +progress: + if + :: queue[0] == 1 -> + queue[0] = 0; + fi; + if + :: queue[1] == 1 -> + queue[1] = 0; + fi; + od; +} diff --git a/futex-wakeup/futex_progress_late_dec.define b/futex-wakeup/futex_progress_late_dec.define new file mode 100644 index 0000000..01361fb --- /dev/null +++ b/futex-wakeup/futex_progress_late_dec.define @@ -0,0 +1 @@ +#define INJ_LATE_DEC diff --git a/futex-wakeup/futex_progress_no_wake.define b/futex-wakeup/futex_progress_no_wake.define new file mode 100644 index 0000000..527bb77 --- /dev/null +++ b/futex-wakeup/futex_progress_no_wake.define @@ -0,0 +1 @@ +#define INJ_QUEUE_NO_WAKE diff --git a/ooomem-double-update/DEFINES b/ooomem-double-update/DEFINES new file mode 100644 index 0000000..7cf7b24 --- /dev/null +++ b/ooomem-double-update/DEFINES @@ -0,0 +1,3 @@ +#define read_one_is_one (read_one == 1) +#define read_two_is_one (read_two == 1) +#define read_two_done (read_two != 2) diff --git a/ooomem-double-update/Makefile b/ooomem-double-update/Makefile new file mode 100644 index 0000000..37422b5 --- /dev/null +++ b/ooomem-double-update/Makefile @@ -0,0 +1,93 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#CFLAGS=-DHASH64 -DREACH +CFLAGS=-DHASH64 + +#try pan -i to get the smallest trace. + +SPINFILE=mem.spin + +default: + make read_order | tee read_order.log + make read_order_no_wmb | tee read_order_no_wmb.log + make read_order_no_rmb | tee read_order_no_rmb.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep error *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000 -w19 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order: clean read_order_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_rmb: clean read_order_ltl read_order_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_rmb_define: + cp read_order_no_rmb.define .input.define + +read_order_no_wmb: clean read_order_ltl read_order_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_wmb_define: + cp read_order_no_wmb.define .input.define + +read_order_ltl: + touch .input.define + cat DEFINES > pan.ltl + cat .input.define >> pan.ltl + spin -f "!(`cat read_order.ltl | grep -v ^//`)" >> pan.ltl + +run: pan + ./pan -a -v -c1 -X -m10000 -w19 + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/ooomem-double-update/mem.sh b/ooomem-double-update/mem.sh new file mode 100644 index 0000000..56e8123 --- /dev/null +++ b/ooomem-double-update/mem.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a mem.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/ooomem-double-update/mem.spin b/ooomem-double-update/mem.spin new file mode 100644 index 0000000..e033f67 --- /dev/null +++ b/ooomem-double-update/mem.spin @@ -0,0 +1,262 @@ +/* + * mem.spin: Promela code to validate memory barriers with out-of-order memory + * and out-of-order instruction scheduling. + * + * Algorithm verified : + * + * alpha = 0; + * beta = 0; + * + * Process A Process B + * alpha = 1; x = beta; + * wmb(); rmb(); + * beta = 1; y = alpha; + * + * if x = 1, then y will = 1 when it is read. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) \ + (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +inline ooo_mem() +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(beta, get_pid()); + } +} + +/* must consume all prior read tokens */ +inline smp_rmb() +{ + atomic { + /* todo : consume all read tokens .. ? */ + CACHE_READ_FROM_MEM(alpha, get_pid()); + CACHE_READ_FROM_MEM(beta, get_pid()); + } +} + +/* must consume all prior write tokens */ +inline smp_wmb() +{ + atomic { + CACHE_WRITE_TO_MEM(alpha, get_pid()); + CACHE_WRITE_TO_MEM(beta, get_pid()); + } +} + +/* sync_core() must consume all prior read and write tokens, including rmb/wmb + * tokens */ + +/* must consume all prior read and write tokens */ +inline smp_mb() +{ + atomic { + smp_wmb(); + /* sync_core() */ + smp_rmb(); + } +} + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, alpha, 0); +DECLARE_CACHED_VAR(byte, beta, 0); + +/* value 2 is uninitialized */ +byte read_one = 2; +byte read_two = 2; + +/* + * Bit encoding, proc_one_produced : + */ + +#define P1_PROD_NONE (1 << 0) + +#define P1_READ_ONE (1 << 1) +#define P1_RMB (1 << 2) +#define P1_READ_TWO (1 << 3) + +/* Only need a single color. */ +byte proc_one_produced; + +active proctype test_proc_one() +{ + assert(get_pid() < NR_PROCS); + + PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE); +#ifdef NO_RMB + PRODUCE_TOKENS(proc_one_produced, P1_RMB); +#endif + + do + :: CONSUME_TOKENS(proc_one_produced, + P1_PROD_NONE, P1_READ_ONE) -> + ooo_mem(); + read_one = READ_CACHED_VAR(beta); + ooo_mem(); + PRODUCE_TOKENS(proc_one_produced, P1_READ_ONE); + :: CONSUME_TOKENS(proc_one_produced, + P1_READ_ONE, P1_RMB) -> + smp_rmb(); + PRODUCE_TOKENS(proc_one_produced, P1_RMB); + :: CONSUME_TOKENS(proc_one_produced, + P1_RMB, P1_READ_TWO) -> + ooo_mem(); + read_two = READ_CACHED_VAR(alpha); + ooo_mem(); + PRODUCE_TOKENS(proc_one_produced, P1_READ_TWO); + :: CONSUME_TOKENS(proc_one_produced, + P1_PROD_NONE | P1_READ_ONE | P1_RMB + | P1_READ_TWO, 0) -> + break; + od; + + //CLEAR_TOKENS(proc_one_produced, + // P1_PROD_NONE | P1_READ_ONE | P1_RMB | P1_READ_TWO); + + // test : [] (read_one == 1 -> read_two == 1) + assert(read_one != 1 || read_two == 1); +} + + +/* + * Bit encoding, proc_two_produced : + */ + +#define P2_PROD_NONE (1 << 0) + +#define P2_WRITE_ONE (1 << 1) +#define P2_WMB (1 << 2) +#define P2_WRITE_TWO (1 << 3) + +/* Only need a single color. */ +byte proc_two_produced; + +active proctype test_proc_two() +{ + assert(get_pid() < NR_PROCS); + + PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE); +#ifdef NO_WMB + PRODUCE_TOKENS(proc_two_produced, P2_WMB); +#endif + + do + :: CONSUME_TOKENS(proc_two_produced, + P2_PROD_NONE, P2_WRITE_ONE) -> + ooo_mem(); + WRITE_CACHED_VAR(alpha, 1); + ooo_mem(); + PRODUCE_TOKENS(proc_two_produced, P2_WRITE_ONE); + :: CONSUME_TOKENS(proc_two_produced, + P2_WRITE_ONE, P2_WMB) -> + smp_wmb(); + PRODUCE_TOKENS(proc_two_produced, P2_WMB); + :: CONSUME_TOKENS(proc_two_produced, + P2_WMB, P2_WRITE_TWO) -> + ooo_mem(); + WRITE_CACHED_VAR(beta, 1); + ooo_mem(); + PRODUCE_TOKENS(proc_two_produced, P2_WRITE_TWO); + :: CONSUME_TOKENS(proc_two_produced, + P2_PROD_NONE | P2_WRITE_ONE + | P2_WMB | P2_WRITE_TWO, 0) -> + break; + od; + + //CLEAR_TOKENS(proc_two_produced, + // P2_PROD_NONE | P2_WRITE_ONE | P2_WMB | P2_WRITE_TWO); +} diff --git a/ooomem-double-update/read_order.ltl b/ooomem-double-update/read_order.ltl new file mode 100644 index 0000000..b201ec4 --- /dev/null +++ b/ooomem-double-update/read_order.ltl @@ -0,0 +1 @@ +[] (read_one_is_one -> (<> read_two_is_one)) diff --git a/ooomem-double-update/read_order_no_rmb.define b/ooomem-double-update/read_order_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/ooomem-double-update/read_order_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/ooomem-double-update/read_order_no_wmb.define b/ooomem-double-update/read_order_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/ooomem-double-update/read_order_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/ooomem-double-update/references.txt b/ooomem-double-update/references.txt new file mode 100644 index 0000000..ca6798f --- /dev/null +++ b/ooomem-double-update/references.txt @@ -0,0 +1,7 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html diff --git a/ooomem-no-sched/DEFINES b/ooomem-no-sched/DEFINES new file mode 100644 index 0000000..04aa898 --- /dev/null +++ b/ooomem-no-sched/DEFINES @@ -0,0 +1,2 @@ +#define first_read_updated (first_read[0] == 6) +#define second_read_updated (second_read[0] == 4) diff --git a/ooomem-no-sched/Makefile b/ooomem-no-sched/Makefile new file mode 100644 index 0000000..e0aed43 --- /dev/null +++ b/ooomem-no-sched/Makefile @@ -0,0 +1,90 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +CFLAGS=-DHASH64 + +SPINFILE=mem.spin + +default: + make read_order | tee read_order.log + make read_order_no_wmb | tee read_order_no_wmb.log + make read_order_no_rmb | tee read_order_no_rmb.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep error *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000 -w19 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order: clean read_order_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_rmb: clean read_order_ltl read_order_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_rmb_define: + cp read_order_no_rmb.define .input.define + +read_order_no_wmb: clean read_order_ltl read_order_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_wmb_define: + cp read_order_no_wmb.define .input.define + +read_order_ltl: + touch .input.define + cat DEFINES > pan.ltl + cat .input.define >> pan.ltl + spin -f "!(`cat read_order.ltl | grep -v ^//`)" >> pan.ltl + +run: pan + ./pan -a -v -c1 -X -m10000 -w19 + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/ooomem-no-sched/mem.sh b/ooomem-no-sched/mem.sh new file mode 100644 index 0000000..56e8123 --- /dev/null +++ b/ooomem-no-sched/mem.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a mem.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/ooomem-no-sched/mem.spin b/ooomem-no-sched/mem.spin new file mode 100644 index 0000000..9359a5a --- /dev/null +++ b/ooomem-no-sched/mem.spin @@ -0,0 +1,165 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* + * Out-of-order memory model _without_ out-of-order instruction scheduling. + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +inline smp_rmb() +{ + atomic { + CACHE_READ_FROM_MEM(alpha, get_pid()); + CACHE_READ_FROM_MEM(beta, get_pid()); + } +} + +inline smp_wmb() +{ + atomic { + CACHE_WRITE_TO_MEM(alpha, get_pid()); + CACHE_WRITE_TO_MEM(beta, get_pid()); + } +} + +inline smp_mb() +{ + atomic { + smp_wmb(); + smp_rmb(); + } +} + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, alpha, 0); +DECLARE_CACHED_VAR(byte, beta, 0); + +inline ooo_mem() +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(beta, get_pid()); + } +} + +#define get_readerid() (get_pid()) + +byte first_read[NR_READERS]; +byte second_read[NR_READERS]; + +active [NR_READERS] proctype test_reader() +{ + assert(get_pid() < NR_PROCS); + + ooo_mem(); + first_read[get_readerid()] = READ_CACHED_VAR(beta); + ooo_mem(); +#ifndef NO_RMB + smp_rmb(); + ooo_mem(); +#endif + second_read[get_readerid()] = READ_CACHED_VAR(alpha); + ooo_mem(); + // test : [] (first_read == 6 -> <> second_read == 4) + assert(first_read[get_readerid()] != 6 + || second_read[get_readerid()] == 4); +} + +#define get_writerid() (get_readerid() + NR_READERS) + +active [NR_WRITERS] proctype test_writer() +{ + byte i; + + assert(get_pid() < NR_PROCS); + + ooo_mem(); + WRITE_CACHED_VAR(alpha, 4); + ooo_mem(); +#ifndef NO_WMB + smp_wmb(); + ooo_mem(); +#endif + WRITE_CACHED_VAR(beta, 6); + ooo_mem(); +} diff --git a/ooomem-no-sched/read_order.ltl b/ooomem-no-sched/read_order.ltl new file mode 100644 index 0000000..b1cdfb7 --- /dev/null +++ b/ooomem-no-sched/read_order.ltl @@ -0,0 +1 @@ +[] (first_read_updated -> <> second_read_updated) diff --git a/ooomem-no-sched/read_order_no_rmb.define b/ooomem-no-sched/read_order_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/ooomem-no-sched/read_order_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/ooomem-no-sched/read_order_no_wmb.define b/ooomem-no-sched/read_order_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/ooomem-no-sched/read_order_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/ooomem-no-sched/references.txt b/ooomem-no-sched/references.txt new file mode 100644 index 0000000..ca6798f --- /dev/null +++ b/ooomem-no-sched/references.txt @@ -0,0 +1,7 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html diff --git a/ooomem-two-writes/DEFINES b/ooomem-two-writes/DEFINES new file mode 100644 index 0000000..e7b6f10 --- /dev/null +++ b/ooomem-two-writes/DEFINES @@ -0,0 +1,4 @@ +#define read_one_is_zero (read_one == 0) +#define read_two_is_zero (read_two == 0) +#define read_one_is_one (read_one == 1) +#define read_two_is_one (read_two == 1) diff --git a/ooomem-two-writes/Makefile b/ooomem-two-writes/Makefile new file mode 100644 index 0000000..6e91788 --- /dev/null +++ b/ooomem-two-writes/Makefile @@ -0,0 +1,101 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#CFLAGS=-DHASH64 -DREACH +CFLAGS=-DHASH64 + +#try pan -i to get the smallest trace. + +SPINFILE=mem.spin + +default: + make read_order | tee read_order.log + make read_order_no_wmb | tee read_order_no_wmb.log + make read_order_no_rmb | tee read_order_no_rmb.log + make read_order_no_sync | tee read_order_no_sync.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep error *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000 -w19 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order: clean read_order_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_sync: clean read_order_ltl read_order_no_sync_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_sync_define: + cp read_order_no_sync.define .input.define + +read_order_no_rmb: clean read_order_ltl read_order_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_rmb_define: + cp read_order_no_rmb.define .input.define + +read_order_no_wmb: clean read_order_ltl read_order_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +read_order_no_wmb_define: + cp read_order_no_wmb.define .input.define + +read_order_ltl: + touch .input.define + cat DEFINES > pan.ltl + cat .input.define >> pan.ltl + spin -f "!(`cat read_order.ltl | grep -v ^//`)" >> pan.ltl + +run: pan + ./pan -a -v -c1 -X -m10000 -w19 + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/ooomem-two-writes/mem.sh b/ooomem-two-writes/mem.sh new file mode 100644 index 0000000..56e8123 --- /dev/null +++ b/ooomem-two-writes/mem.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a mem.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/ooomem-two-writes/mem.spin b/ooomem-two-writes/mem.spin new file mode 100644 index 0000000..304c3f8 --- /dev/null +++ b/ooomem-two-writes/mem.spin @@ -0,0 +1,291 @@ +/* + * mem.spin: Promela code to validate memory barriers with out-of-order memory + * and out-of-order instruction scheduling. + * + * Algorithm verified : + * + * alpha = 0; + * beta = 0; + * x = 1; + * y = 1; + * + * Process A Process B + * alpha = 1; beta = 1; + * mb(); mb(); + * x = beta; y = alpha; + * + * if x = 0, then y != 0 + * if y = 0, then x != 0 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) \ + (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +inline ooo_mem() +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(alpha, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(beta, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(alpha, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(beta, get_pid()); + } +} + +/* must consume all prior read tokens */ +inline smp_rmb() +{ + atomic { + /* todo : consume all read tokens .. ? */ + CACHE_READ_FROM_MEM(alpha, get_pid()); + CACHE_READ_FROM_MEM(beta, get_pid()); + } +} + +/* must consume all prior write tokens */ +inline smp_wmb() +{ + atomic { + CACHE_WRITE_TO_MEM(alpha, get_pid()); + CACHE_WRITE_TO_MEM(beta, get_pid()); + } +} + +/* sync_core() must consume all prior read and write tokens, including rmb/wmb + * tokens */ + +/* must consume all prior read and write tokens */ +inline smp_mb() +{ + atomic { + smp_wmb(); + /* sync_core() */ + smp_rmb(); + } +} + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, alpha, 0); +DECLARE_CACHED_VAR(byte, beta, 0); + +byte read_one = 1; +byte read_two = 1; + +/* + * Bit encoding, proc_one_produced : + */ + +#define P1_PROD_NONE (1 << 0) + +#define P1_WRITE (1 << 1) +#define P1_WMB (1 << 2) +#define P1_SYNC_CORE (1 << 3) +#define P1_RMB (1 << 4) +#define P1_READ (1 << 5) + +int proc_one_produced; + +active proctype test_proc_one() +{ + assert(get_pid() < NR_PROCS); + + PRODUCE_TOKENS(proc_one_produced, P1_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_one_produced, P1_WMB); +#endif +#ifdef NO_RMB + PRODUCE_TOKENS(proc_one_produced, P1_RMB); +#endif +#ifdef NO_SYNC + PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE); +#endif + + do + :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE, P1_WRITE) -> + ooo_mem(); + WRITE_CACHED_VAR(alpha, 1); + ooo_mem(); + PRODUCE_TOKENS(proc_one_produced, P1_WRITE); + :: CONSUME_TOKENS(proc_one_produced, P1_WRITE, P1_WMB) -> + smp_wmb(); + PRODUCE_TOKENS(proc_one_produced, P1_WMB); + :: CONSUME_TOKENS(proc_one_produced, P1_WRITE | P1_WMB, P1_SYNC_CORE) -> + /* sync_core(); */ + PRODUCE_TOKENS(proc_one_produced, P1_SYNC_CORE); + :: CONSUME_TOKENS(proc_one_produced, P1_SYNC_CORE, P1_RMB) -> + smp_rmb(); + PRODUCE_TOKENS(proc_one_produced, P1_RMB); + :: CONSUME_TOKENS(proc_one_produced, P1_RMB | P1_SYNC_CORE, P1_READ) -> + ooo_mem(); + read_one = READ_CACHED_VAR(beta); + ooo_mem(); + PRODUCE_TOKENS(proc_one_produced, P1_READ); + :: CONSUME_TOKENS(proc_one_produced, P1_PROD_NONE | P1_WRITE + | P1_WMB | P1_SYNC_CORE | P1_RMB | P1_READ, 0) -> + break; + od; + + //CLEAR_TOKENS(proc_one_produced, + // P1_PROD_NONE | P1_WRITE | P1_WMB | P1_SYNC_CORE | P1_RMB | + // P2_READ); + + // test : [] (read_one == 0 -> read_two != 0) + // test : [] (read_two == 0 -> read_one != 0) + assert(!(read_one == 0 && read_two == 0)); +} + + +/* + * Bit encoding, proc_two_produced : + */ + +#define P2_PROD_NONE (1 << 0) + +#define P2_WRITE (1 << 1) +#define P2_WMB (1 << 2) +#define P2_SYNC_CORE (1 << 3) +#define P2_RMB (1 << 4) +#define P2_READ (1 << 5) + +int proc_two_produced; + +active proctype test_proc_two() +{ + assert(get_pid() < NR_PROCS); + + PRODUCE_TOKENS(proc_two_produced, P2_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_two_produced, P2_WMB); +#endif +#ifdef NO_RMB + PRODUCE_TOKENS(proc_two_produced, P2_RMB); +#endif +#ifdef NO_SYNC + PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE); +#endif + + do + :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE, P2_WRITE) -> + ooo_mem(); + WRITE_CACHED_VAR(beta, 1); + ooo_mem(); + PRODUCE_TOKENS(proc_two_produced, P2_WRITE); + :: CONSUME_TOKENS(proc_two_produced, P2_WRITE, P2_WMB) -> + smp_wmb(); + PRODUCE_TOKENS(proc_two_produced, P2_WMB); + :: CONSUME_TOKENS(proc_two_produced, P2_WRITE | P2_WMB, P2_SYNC_CORE) -> + /* sync_core(); */ + PRODUCE_TOKENS(proc_two_produced, P2_SYNC_CORE); + :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE, P2_RMB) -> + smp_rmb(); + PRODUCE_TOKENS(proc_two_produced, P2_RMB); + :: CONSUME_TOKENS(proc_two_produced, P2_SYNC_CORE | P2_RMB, P2_READ) -> + ooo_mem(); + read_two = READ_CACHED_VAR(alpha); + ooo_mem(); + PRODUCE_TOKENS(proc_two_produced, P2_READ); + :: CONSUME_TOKENS(proc_two_produced, P2_PROD_NONE | P2_WRITE + | P2_WMB | P2_SYNC_CORE | P2_RMB | P2_READ, 0) -> + break; + od; + + //CLEAR_TOKENS(proc_two_produced, + // P2_PROD_NONE | P2_WRITE | P2_WMB | P2_SYNC_CORE | P2_RMB | + // P2_READ); + + // test : [] (read_one == 0 -> read_two != 0) + // test : [] (read_two == 0 -> read_one != 0) + assert(!(read_one == 0 && read_two == 0)); +} diff --git a/ooomem-two-writes/read_order.ltl b/ooomem-two-writes/read_order.ltl new file mode 100644 index 0000000..6ba2459 --- /dev/null +++ b/ooomem-two-writes/read_order.ltl @@ -0,0 +1 @@ +[] (read_one_is_one || read_two_is_one) diff --git a/ooomem-two-writes/read_order_no_rmb.define b/ooomem-two-writes/read_order_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/ooomem-two-writes/read_order_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/ooomem-two-writes/read_order_no_sync.define b/ooomem-two-writes/read_order_no_sync.define new file mode 100644 index 0000000..0d2f8cf --- /dev/null +++ b/ooomem-two-writes/read_order_no_sync.define @@ -0,0 +1 @@ +#define NO_SYNC diff --git a/ooomem-two-writes/read_order_no_wmb.define b/ooomem-two-writes/read_order_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/ooomem-two-writes/read_order_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/ooomem-two-writes/references.txt b/ooomem-two-writes/references.txt new file mode 100644 index 0000000..ca6798f --- /dev/null +++ b/ooomem-two-writes/references.txt @@ -0,0 +1,7 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html diff --git a/spinlock/DEFINES b/spinlock/DEFINES new file mode 100644 index 0000000..4eb5315 --- /dev/null +++ b/spinlock/DEFINES @@ -0,0 +1 @@ +#define refcount_gt_one (refcount > 1) diff --git a/spinlock/Makefile b/spinlock/Makefile new file mode 100644 index 0000000..a153e7a --- /dev/null +++ b/spinlock/Makefile @@ -0,0 +1,103 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#CFLAGS=-DHASH64 -DREACH +CFLAGS=-DHASH64 + +#try pan -i to get the smallest trace. + +SPINFILE=mem.spin +SPINFILE_FAIR=mem-progress.spin + +default: + make refcount | tee refcount.log + make lock_progress | tee lock_progress.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep error *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000 -w19 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +refcount: clean refcount_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +refcount_ltl: + touch .input.define + cat DEFINES > pan.ltl + cat .input.define >> pan.ltl + spin -f "!(`cat refcount.ltl | grep -v ^//`)" >> pan.ltl + +lock_progress: clean lock_progress_ltl run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +lock_progress_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat lock_progress.ltl | grep -v ^//`)" >> pan.ltl + +run: pan + ./pan -a -v -c1 -X -m10000 -w19 + +run_weak_fair: pan_fair + ./pan_fair -a -f -v -c1 -X -m10000000 -w20 + +pan_fair: pan_fair.c + gcc -w ${CFLAGS} -o pan_fair pan_fair.c + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan_fair.c: pan.ltl ${SPINFILE_FAIR} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE_FAIR} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + mv pan.c pan_fair.c + +pan.c: pan.ltl ${SPINFILE} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/spinlock/lock_progress.ltl b/spinlock/lock_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/spinlock/lock_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/spinlock/mem-progress.spin b/spinlock/mem-progress.spin new file mode 100644 index 0000000..7930d04 --- /dev/null +++ b/spinlock/mem-progress.spin @@ -0,0 +1,69 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +byte lock = 0; +byte refcount = 0; + +inline spin_lock(lock) +{ + do + :: 1 -> atomic { + if + :: (lock) -> + skip; + :: else -> + lock = 1; + break; + fi; + } + od; +} + +inline spin_unlock(lock) +{ + lock = 0; +} + +proctype proc_A() +{ + do + :: 1-> +progress_A: + spin_lock(lock); + refcount = refcount + 1; + refcount = refcount - 1; + spin_unlock(lock); + od; +} + +proctype proc_B() +{ + do + :: 1-> + spin_lock(lock); + refcount = refcount + 1; + refcount = refcount - 1; + spin_unlock(lock); + od; +} + +init +{ + run proc_A(); + run proc_B(); +} diff --git a/spinlock/mem.sh b/spinlock/mem.sh new file mode 100644 index 0000000..56e8123 --- /dev/null +++ b/spinlock/mem.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a mem.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/spinlock/mem.spin b/spinlock/mem.spin new file mode 100644 index 0000000..9e87809 --- /dev/null +++ b/spinlock/mem.spin @@ -0,0 +1,57 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +byte lock = 0; +byte refcount = 0; + +inline spin_lock(lock) +{ + do + :: 1 -> atomic { + if + :: (lock) -> + skip; + :: else -> + lock = 1; + break; + fi; + } + od; +} + +inline spin_unlock(lock) +{ + lock = 0; +} + +proctype proc_X() +{ + do + :: 1 -> + spin_lock(lock); + refcount = refcount + 1; + refcount = refcount - 1; + spin_unlock(lock); + od; +} + +init +{ + run proc_X(); + run proc_X(); +} diff --git a/spinlock/refcount.ltl b/spinlock/refcount.ltl new file mode 100644 index 0000000..48f971f --- /dev/null +++ b/spinlock/refcount.ltl @@ -0,0 +1 @@ +[] (!(refcount_gt_one)) diff --git a/spinlock/references.txt b/spinlock/references.txt new file mode 100644 index 0000000..ca6798f --- /dev/null +++ b/spinlock/references.txt @@ -0,0 +1,7 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html diff --git a/ticketlock/DEFINES b/ticketlock/DEFINES new file mode 100644 index 0000000..4eb5315 --- /dev/null +++ b/ticketlock/DEFINES @@ -0,0 +1 @@ +#define refcount_gt_one (refcount > 1) diff --git a/ticketlock/Makefile b/ticketlock/Makefile new file mode 100644 index 0000000..c41afd3 --- /dev/null +++ b/ticketlock/Makefile @@ -0,0 +1,112 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#CFLAGS=-DHASH64 -DREACH +CFLAGS=-DHASH64 + +#try pan -i to get the smallest trace. + +SPINFILE=mem.spin +SPINFILE_FAIR=mem-progress.spin + +default: + make refcount | tee refcount.log + make refcount_4_bits_per_byte | tee refcount_4_bits_per_byte.log + make lock_progress | tee lock_progress.log + make lock_progress_4_bits_per_byte | tee lock_progress_4_bits_per_byte.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep error *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w19 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +refcount: clean refcount_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +refcount_ltl: + touch .input.define + cat DEFINES > pan.ltl + cat .input.define >> pan.ltl + spin -f "!(`cat refcount.ltl | grep -v ^//`)" >> pan.ltl + +refcount_4_bits_per_byte: clean refcount_ltl config_4_bits_per_byte_define run + +lock_progress: clean lock_progress_ltl run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +lock_progress_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat lock_progress.ltl | grep -v ^//`)" >> pan.ltl + +lock_progress_4_bits_per_byte: clean lock_progress_ltl config_4_bits_per_byte_define run + +config_4_bits_per_byte_define: + cp config_4_bits_per_byte.define .input.define + +run: pan + ./pan -a -v -c1 -X -m1000000 -w19 + +run_weak_fair: pan_fair + ./pan_fair -a -f -v -c1 -X -m1000000 -w20 + +pan_fair: pan_fair.c + gcc -w ${CFLAGS} -DNFAIR=4 -o pan_fair pan_fair.c + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan_fair.c: pan.ltl ${SPINFILE_FAIR} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE_FAIR} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + mv pan.c pan_fair.c + +pan.c: pan.ltl ${SPINFILE} + cat DEFINES > .input.spin + cat .input.define >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/ticketlock/config_4_bits_per_byte.define b/ticketlock/config_4_bits_per_byte.define new file mode 100644 index 0000000..e1d13ca --- /dev/null +++ b/ticketlock/config_4_bits_per_byte.define @@ -0,0 +1 @@ +#define CONFIG_BITS_PER_BYTE 4 diff --git a/ticketlock/lock_progress.ltl b/ticketlock/lock_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/ticketlock/lock_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/ticketlock/mem-progress.spin b/ticketlock/mem-progress.spin new file mode 100644 index 0000000..dad43a4 --- /dev/null +++ b/ticketlock/mem-progress.spin @@ -0,0 +1,98 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* 16 CPUs max (byte has 8 bits, divided in two) */ + +#ifndef CONFIG_BITS_PER_BYTE +#define BITS_PER_BYTE 8 +#else +// test progress failure with shorter byte size. Will fail with 5 proc. +#define BITS_PER_BYTE CONFIG_BITS_PER_BYTE +#endif + +#define HBPB (BITS_PER_BYTE / 2) /* 4 */ +#define HMASK ((1 << HBPB) - 1) /* 0x0F */ + +/* for byte type */ +#define LOW_HALF(val) ((val) & HMASK) +#define LOW_HALF_INC 1 + +#define HIGH_HALF(val) ((val) & (HMASK << HBPB)) +#define HIGH_HALF_INC (1 << HBPB) + +byte lock = 0; +byte refcount = 0; + +inline spin_lock(lock, ticket) +{ + atomic { + ticket = HIGH_HALF(lock) >> HBPB; + lock = lock + HIGH_HALF_INC; /* overflow expected */ + } + + do + :: 1 -> + if + :: (LOW_HALF(lock) == ticket) -> + break; + :: else -> + skip; + fi; + od; +} + +inline spin_unlock(lock) +{ + lock = HIGH_HALF(lock) | LOW_HALF(lock + LOW_HALF_INC); +} + +proctype proc_A() +{ + byte ticket; + + do + :: 1 -> +progress_A: + spin_lock(lock, ticket); + refcount = refcount + 1; + refcount = refcount - 1; + spin_unlock(lock); + od; +} + +proctype proc_B() +{ + byte ticket; + + do + :: 1 -> + spin_lock(lock, ticket); + refcount = refcount + 1; + refcount = refcount - 1; + spin_unlock(lock); + od; +} + +init +{ + run proc_A(); + run proc_B(); + run proc_B(); + run proc_B(); + run proc_B(); +} diff --git a/ticketlock/mem.sh b/ticketlock/mem.sh new file mode 100644 index 0000000..56e8123 --- /dev/null +++ b/ticketlock/mem.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a mem.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/ticketlock/mem.spin b/ticketlock/mem.spin new file mode 100644 index 0000000..445ee9a --- /dev/null +++ b/ticketlock/mem.spin @@ -0,0 +1,83 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* 16 CPUs max (byte has 8 bits, divided in two) */ + +#ifndef CONFIG_BITS_PER_BYTE +#define BITS_PER_BYTE 8 +#else +#define BITS_PER_BYTE CONFIG_BITS_PER_BYTE +#endif + +#define HBPB (BITS_PER_BYTE / 2) /* 4 */ +#define HMASK ((1 << HBPB) - 1) /* 0x0F */ + +/* for byte type */ +#define LOW_HALF(val) ((val) & HMASK) +#define LOW_HALF_INC 1 + +#define HIGH_HALF(val) ((val) & (HMASK << HBPB)) +#define HIGH_HALF_INC (1 << HBPB) + +byte lock = 0; +byte refcount = 0; + +inline spin_lock(lock, ticket) +{ + atomic { + ticket = HIGH_HALF(lock) >> HBPB; + lock = lock + HIGH_HALF_INC; /* overflow expected */ + } + + do + :: 1 -> + if + :: (LOW_HALF(lock) == ticket) -> + break; + :: else -> + skip; + fi; + od; +} + +inline spin_unlock(lock) +{ + lock = HIGH_HALF(lock) | LOW_HALF(lock + LOW_HALF_INC); +} + +proctype proc_X() +{ + byte ticket; + + do + :: 1-> + spin_lock(lock, ticket); + refcount = refcount + 1; + refcount = refcount - 1; + spin_unlock(lock); + od; +} + +init +{ + run proc_X(); + run proc_X(); + run proc_X(); + run proc_X(); + run proc_X(); +} diff --git a/ticketlock/refcount.ltl b/ticketlock/refcount.ltl new file mode 100644 index 0000000..48f971f --- /dev/null +++ b/ticketlock/refcount.ltl @@ -0,0 +1 @@ +[] (!(refcount_gt_one)) diff --git a/ticketlock/references.txt b/ticketlock/references.txt new file mode 100644 index 0000000..ca6798f --- /dev/null +++ b/ticketlock/references.txt @@ -0,0 +1,7 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html diff --git a/urcu-controldataflow-alpha-ipi-compress/.input.define b/urcu-controldataflow-alpha-ipi-compress/.input.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/.input.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi-compress/.input.spin b/urcu-controldataflow-alpha-ipi-compress/.input.spin new file mode 100644 index 0000000..887b1ad --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/.input.spin @@ -0,0 +1,1340 @@ +#define READER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-compress/DEFINES b/urcu-controldataflow-alpha-ipi-compress/DEFINES new file mode 100644 index 0000000..2681f69 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/DEFINES @@ -0,0 +1,18 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow-alpha-ipi-compress/Makefile b/urcu-controldataflow-alpha-ipi-compress/Makefile new file mode 100644 index 0000000..f8bfd31 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/Makefile @@ -0,0 +1,171 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 -DCOLLAPSE +#CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + #make urcu_free | tee urcu_free.log + #make urcu_free_no_mb | tee urcu_free_no_mb.log + #make urcu_free_no_rmb | tee urcu_free_no_rmb.log + #make urcu_free_no_wmb | tee urcu_free_no_wmb.log + #make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + #make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow-alpha-ipi-compress/references.txt b/urcu-controldataflow-alpha-ipi-compress/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu.sh b/urcu-controldataflow-alpha-ipi-compress/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu.spin b/urcu-controldataflow-alpha-ipi-compress/urcu.spin new file mode 100644 index 0000000..8075506 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu.spin @@ -0,0 +1,1321 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_free.ltl b/urcu-controldataflow-alpha-ipi-compress/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_free_nested.define b/urcu-controldataflow-alpha-ipi-compress/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_mb.define b/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_rmb.define b/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_wmb.define b/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_free_single_flip.define b/urcu-controldataflow-alpha-ipi-compress/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_progress.ltl b/urcu-controldataflow-alpha-ipi-compress/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.define b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.log b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.log new file mode 100644 index 0000000..f11dc83 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_reader.log @@ -0,0 +1,303 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi-compress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +depth 7: Claim reached state 9 (line 1367) +depth 136: Claim reached state 9 (line 1366) +Depth= 115766 States= 1e+06 Transitions= 2.97e+08 Memory= 495.647 t= 461 R= 2e+03 +Depth= 115766 States= 2e+06 Transitions= 5.97e+08 Memory= 525.529 t= 939 R= 2e+03 +Depth= 115766 States= 3e+06 Transitions= 8.86e+08 Memory= 553.264 t= 1.41e+03 R= 2e+03 +pan: resizing hashtable to -w22.. done +Depth= 115766 States= 4e+06 Transitions= 1.18e+09 Memory= 614.463 t= 1.87e+03 R= 2e+03 +Depth= 115766 States= 5e+06 Transitions= 1.48e+09 Memory= 644.541 t= 2.34e+03 R= 2e+03 +Depth= 115766 States= 6e+06 Transitions= 1.77e+09 Memory= 674.424 t= 2.8e+03 R= 2e+03 +Depth= 115766 States= 7e+06 Transitions= 2.07e+09 Memory= 701.865 t= 3.27e+03 R= 2e+03 +Depth= 115766 States= 8e+06 Transitions= 2.36e+09 Memory= 729.404 t= 3.75e+03 R= 2e+03 +Depth= 115766 States= 9e+06 Transitions= 2.66e+09 Memory= 757.920 t= 4.23e+03 R= 2e+03 +pan: resizing hashtable to -w24.. done +Depth= 117893 States= 1e+07 Transitions= 2.95e+09 Memory= 909.846 t= 4.69e+03 R= 2e+03 +Depth= 117893 States= 1.1e+07 Transitions= 3.35e+09 Memory= 937.190 t= 5.31e+03 R= 2e+03 +Depth= 117893 States= 1.2e+07 Transitions= 3.69e+09 Memory= 964.826 t= 5.85e+03 R= 2e+03 +Depth= 117893 States= 1.3e+07 Transitions= 4.02e+09 Memory= 994.026 t= 6.37e+03 R= 2e+03 +Depth= 117893 States= 1.4e+07 Transitions= 4.32e+09 Memory= 1021.858 t= 6.84e+03 R= 2e+03 +Depth= 117893 States= 1.5e+07 Transitions= 4.63e+09 Memory= 1050.080 t= 7.33e+03 R= 2e+03 +Depth= 117893 States= 1.6e+07 Transitions= 4.95e+09 Memory= 1078.693 t= 7.83e+03 R= 2e+03 +Depth= 117893 States= 1.7e+07 Transitions= 5.24e+09 Memory= 1106.135 t= 8.28e+03 R= 2e+03 +Depth= 117893 States= 1.8e+07 Transitions= 5.54e+09 Memory= 1135.920 t= 8.74e+03 R= 2e+03 +Depth= 117893 States= 1.9e+07 Transitions= 5.82e+09 Memory= 1164.338 t= 9.19e+03 R= 2e+03 +Depth= 117893 States= 2e+07 Transitions= 6.12e+09 Memory= 1194.514 t= 9.66e+03 R= 2e+03 +Depth= 117893 States= 2.1e+07 Transitions= 6.42e+09 Memory= 1223.713 t= 1.01e+04 R= 2e+03 +Depth= 117893 States= 2.2e+07 Transitions= 6.72e+09 Memory= 1252.912 t= 1.06e+04 R= 2e+03 +Depth= 117893 States= 2.3e+07 Transitions= 7.01e+09 Memory= 1280.744 t= 1.11e+04 R= 2e+03 +Depth= 117893 States= 2.4e+07 Transitions= 7.3e+09 Memory= 1311.408 t= 1.15e+04 R= 2e+03 +Depth= 117893 States= 2.5e+07 Transitions= 7.61e+09 Memory= 1336.994 t= 1.2e+04 R= 2e+03 +Depth= 117893 States= 2.6e+07 Transitions= 7.89e+09 Memory= 1365.315 t= 1.24e+04 R= 2e+03 +Depth= 117893 States= 2.7e+07 Transitions= 8.35e+09 Memory= 1390.315 t= 1.32e+04 R= 2e+03 +Depth= 117893 States= 2.8e+07 Transitions= 8.84e+09 Memory= 1414.143 t= 1.4e+04 R= 2e+03 +Depth= 117893 States= 2.9e+07 Transitions= 9.64e+09 Memory= 1438.166 t= 1.53e+04 R= 2e+03 +Depth= 117893 States= 3e+07 Transitions= 1.02e+10 Memory= 1462.971 t= 1.62e+04 R= 2e+03 +Depth= 117893 States= 3.1e+07 Transitions= 1.06e+10 Memory= 1488.068 t= 1.69e+04 R= 2e+03 +Depth= 117893 States= 3.2e+07 Transitions= 1.14e+10 Memory= 1512.287 t= 1.82e+04 R= 2e+03 +Depth= 117893 States= 3.3e+07 Transitions= 1.24e+10 Memory= 1536.799 t= 1.99e+04 R= 2e+03 +Depth= 117893 States= 3.4e+07 Transitions= 1.27e+10 Memory= 1567.658 t= 2.04e+04 R= 2e+03 +pan: resizing hashtable to -w26.. done +Depth= 117893 States= 3.5e+07 Transitions= 1.32e+10 Memory= 2089.424 t= 2.13e+04 R= 2e+03 +Depth= 117893 States= 3.6e+07 Transitions= 1.38e+10 Memory= 2116.768 t= 2.22e+04 R= 2e+03 +Depth= 117893 States= 3.7e+07 Transitions= 1.45e+10 Memory= 2142.158 t= 2.33e+04 R= 2e+03 +Depth= 117893 States= 3.8e+07 Transitions= 1.49e+10 Memory= 2170.674 t= 2.41e+04 R= 2e+03 +Depth= 117893 States= 3.9e+07 Transitions= 1.55e+10 Memory= 2197.725 t= 2.49e+04 R= 2e+03 +Depth= 117893 States= 4e+07 Transitions= 1.63e+10 Memory= 2219.014 t= 2.63e+04 R= 2e+03 +Depth= 117893 States= 4.1e+07 Transitions= 1.69e+10 Memory= 2242.061 t= 2.75e+04 R= 1e+03 +Depth= 117893 States= 4.2e+07 Transitions= 1.73e+10 Memory= 2269.600 t= 2.81e+04 R= 1e+03 +Depth= 117893 States= 4.3e+07 Transitions= 1.8e+10 Memory= 2295.967 t= 2.92e+04 R= 1e+03 +Depth= 117893 States= 4.4e+07 Transitions= 1.85e+10 Memory= 2323.213 t= 3e+04 R= 1e+03 +Depth= 117893 States= 4.5e+07 Transitions= 1.91e+10 Memory= 2348.994 t= 3.09e+04 R= 1e+03 +Depth= 117893 States= 4.6e+07 Transitions= 1.97e+10 Memory= 2374.190 t= 3.2e+04 R= 1e+03 +Depth= 117893 States= 4.7e+07 Transitions= 2.03e+10 Memory= 2399.483 t= 3.3e+04 R= 1e+03 +Depth= 117893 States= 4.8e+07 Transitions= 2.07e+10 Memory= 2428.486 t= 3.36e+04 R= 1e+03 +Depth= 117893 States= 4.9e+07 Transitions= 2.13e+10 Memory= 2454.951 t= 3.45e+04 R= 1e+03 +Depth= 117893 States= 5e+07 Transitions= 2.18e+10 Memory= 2482.686 t= 3.54e+04 R= 1e+03 +Depth= 117893 States= 5.1e+07 Transitions= 2.24e+10 Memory= 2509.151 t= 3.62e+04 R= 1e+03 +Depth= 117893 States= 5.2e+07 Transitions= 2.3e+10 Memory= 2535.420 t= 3.72e+04 R= 1e+03 +Depth= 117893 States= 5.3e+07 Transitions= 2.38e+10 Memory= 2560.518 t= 3.86e+04 R= 1e+03 +Depth= 117893 States= 5.4e+07 Transitions= 2.42e+10 Memory= 2586.592 t= 3.94e+04 R= 1e+03 +Depth= 117893 States= 5.5e+07 Transitions= 2.46e+10 Memory= 2610.713 t= 4e+04 R= 1e+03 +Depth= 117893 States= 5.6e+07 Transitions= 2.49e+10 Memory= 2638.545 t= 4.06e+04 R= 1e+03 +Depth= 117893 States= 5.7e+07 Transitions= 2.53e+10 Memory= 2668.135 t= 4.11e+04 R= 1e+03 +Depth= 117893 States= 5.8e+07 Transitions= 2.56e+10 Memory= 2698.213 t= 4.16e+04 R= 1e+03 +Depth= 117893 States= 5.9e+07 Transitions= 2.59e+10 Memory= 2723.897 t= 4.22e+04 R= 1e+03 +Depth= 117893 States= 6e+07 Transitions= 2.66e+10 Memory= 2747.627 t= 4.33e+04 R= 1e+03 +Depth= 117893 States= 6.1e+07 Transitions= 2.7e+10 Memory= 2774.678 t= 4.39e+04 R= 1e+03 +Depth= 117893 States= 6.2e+07 Transitions= 2.73e+10 Memory= 2803.584 t= 4.45e+04 R= 1e+03 +Depth= 117893 States= 6.3e+07 Transitions= 2.77e+10 Memory= 2831.221 t= 4.51e+04 R= 1e+03 +Depth= 117893 States= 6.4e+07 Transitions= 2.8e+10 Memory= 2860.225 t= 4.56e+04 R= 1e+03 +Depth= 117893 States= 6.5e+07 Transitions= 2.84e+10 Memory= 2885.225 t= 4.62e+04 R= 1e+03 +Depth= 117893 States= 6.6e+07 Transitions= 2.89e+10 Memory= 2908.760 t= 4.71e+04 R= 1e+03 +Depth= 117893 States= 6.7e+07 Transitions= 2.96e+10 Memory= 2932.686 t= 4.82e+04 R= 1e+03 +Depth= 117893 States= 6.8e+07 Transitions= 3.03e+10 Memory= 2956.123 t= 4.96e+04 R= 1e+03 +Depth= 117893 States= 6.9e+07 Transitions= 3.14e+10 Memory= 2985.908 t= 5.13e+04 R= 1e+03 +Depth= 117893 States= 7e+07 Transitions= 3.24e+10 Memory= 3015.303 t= 5.31e+04 R= 1e+03 +Depth= 117893 States= 7.1e+07 Transitions= 3.36e+10 Memory= 3039.912 t= 5.5e+04 R= 1e+03 +Depth= 117893 States= 7.2e+07 Transitions= 3.47e+10 Memory= 3065.401 t= 5.69e+04 R= 1e+03 +Depth= 117893 States= 7.3e+07 Transitions= 3.58e+10 Memory= 3086.690 t= 5.87e+04 R= 1e+03 +Depth= 117893 States= 7.4e+07 Transitions= 3.67e+10 Memory= 3108.272 t= 6.02e+04 R= 1e+03 +Depth= 117893 States= 7.5e+07 Transitions= 3.78e+10 Memory= 3127.608 t= 6.21e+04 R= 1e+03 +Depth= 117893 States= 7.6e+07 Transitions= 3.89e+10 Memory= 3147.627 t= 6.39e+04 R= 1e+03 +Depth= 117893 States= 7.7e+07 Transitions= 3.97e+10 Memory= 3167.647 t= 6.53e+04 R= 1e+03 +Depth= 117893 States= 7.8e+07 Transitions= 4.01e+10 Memory= 3195.772 t= 6.6e+04 R= 1e+03 +Depth= 117893 States= 7.9e+07 Transitions= 4.07e+10 Memory= 3221.065 t= 6.69e+04 R= 1e+03 +Depth= 117893 States= 8e+07 Transitions= 4.14e+10 Memory= 3245.869 t= 6.8e+04 R= 1e+03 +Depth= 117893 States= 8.1e+07 Transitions= 4.26e+10 Memory= 3270.186 t= 7e+04 R= 1e+03 +Depth= 117893 States= 8.2e+07 Transitions= 4.33e+10 Memory= 3293.135 t= 7.12e+04 R= 1e+03 +Depth= 117893 States= 8.3e+07 Transitions= 4.38e+10 Memory= 3323.701 t= 7.21e+04 R= 1e+03 +Depth= 117893 States= 8.4e+07 Transitions= 4.41e+10 Memory= 3350.752 t= 7.26e+04 R= 1e+03 +Depth= 117893 States= 8.5e+07 Transitions= 4.45e+10 Memory= 3375.166 t= 7.31e+04 R= 1e+03 +Depth= 117893 States= 8.6e+07 Transitions= 4.49e+10 Memory= 3397.432 t= 7.37e+04 R= 1e+03 +Depth= 117893 States= 8.7e+07 Transitions= 4.53e+10 Memory= 3424.287 t= 7.44e+04 R= 1e+03 +Depth= 117893 States= 8.8e+07 Transitions= 4.61e+10 Memory= 3449.385 t= 7.58e+04 R= 1e+03 +Depth= 117893 States= 8.9e+07 Transitions= 4.71e+10 Memory= 3469.795 t= 7.74e+04 R= 1e+03 +Depth= 117893 States= 9e+07 Transitions= 4.75e+10 Memory= 3498.018 t= 7.81e+04 R= 1e+03 +Depth= 117893 States= 9.1e+07 Transitions= 4.8e+10 Memory= 3524.678 t= 7.88e+04 R= 1e+03 +Depth= 117893 States= 9.2e+07 Transitions= 4.88e+10 Memory= 3549.776 t= 8.02e+04 R= 1e+03 +Depth= 117893 States= 9.3e+07 Transitions= 4.97e+10 Memory= 3573.897 t= 8.16e+04 R= 1e+03 +Depth= 117893 States= 9.4e+07 Transitions= 5.03e+10 Memory= 3598.311 t= 8.26e+04 R= 1e+03 +Depth= 117893 States= 9.5e+07 Transitions= 5.12e+10 Memory= 3621.358 t= 8.41e+04 R= 1e+03 +Depth= 117893 States= 9.6e+07 Transitions= 5.19e+10 Memory= 3645.381 t= 8.52e+04 R= 1e+03 +Depth= 117893 States= 9.7e+07 Transitions= 5.26e+10 Memory= 3669.502 t= 8.64e+04 R= 1e+03 +Depth= 117893 States= 9.8e+07 Transitions= 5.32e+10 Memory= 3693.233 t= 8.75e+04 R= 1e+03 +Depth= 117893 States= 9.9e+07 Transitions= 5.36e+10 Memory= 3723.115 t= 8.8e+04 R= 1e+03 +Depth= 117893 States= 1e+08 Transitions= 5.41e+10 Memory= 3748.799 t= 8.89e+04 R= 1e+03 +Depth= 117893 States= 1.01e+08 Transitions= 5.51e+10 Memory= 3771.943 t= 9.05e+04 R= 1e+03 +Depth= 117893 States= 1.02e+08 Transitions= 5.59e+10 Memory= 3796.651 t= 9.18e+04 R= 1e+03 +Depth= 117893 States= 1.03e+08 Transitions= 5.64e+10 Memory= 3820.967 t= 9.28e+04 R= 1e+03 +Depth= 117893 States= 1.04e+08 Transitions= 5.71e+10 Memory= 3845.283 t= 9.39e+04 R= 1e+03 +Depth= 117893 States= 1.05e+08 Transitions= 5.76e+10 Memory= 3872.041 t= 9.46e+04 R= 1e+03 +Depth= 117893 States= 1.06e+08 Transitions= 5.8e+10 Memory= 3901.436 t= 9.54e+04 R= 1e+03 +Depth= 117893 States= 1.07e+08 Transitions= 5.85e+10 Memory= 3931.026 t= 9.61e+04 R= 1e+03 +Depth= 117893 States= 1.08e+08 Transitions= 5.89e+10 Memory= 3956.318 t= 9.68e+04 R= 1e+03 +Depth= 117893 States= 1.09e+08 Transitions= 5.96e+10 Memory= 3978.486 t= 9.79e+04 R= 1e+03 +Depth= 117893 States= 1.1e+08 Transitions= 6.02e+10 Memory= 4002.901 t= 9.89e+04 R= 1e+03 +Depth= 117893 States= 1.11e+08 Transitions= 6.06e+10 Memory= 4027.803 t= 9.96e+04 R= 1e+03 +Depth= 117893 States= 1.12e+08 Transitions= 6.12e+10 Memory= 4051.924 t= 1.01e+05 R= 1e+03 +Depth= 117893 States= 1.13e+08 Transitions= 6.16e+10 Memory= 4079.365 t= 1.01e+05 R= 1e+03 +Depth= 117893 States= 1.14e+08 Transitions= 6.22e+10 Memory= 4104.756 t= 1.02e+05 R= 1e+03 +Depth= 117893 States= 1.15e+08 Transitions= 6.28e+10 Memory= 4129.268 t= 1.03e+05 R= 1e+03 +Depth= 117893 States= 1.16e+08 Transitions= 6.38e+10 Memory= 4155.537 t= 1.05e+05 R= 1e+03 +Depth= 117893 States= 1.17e+08 Transitions= 6.44e+10 Memory= 4184.443 t= 1.06e+05 R= 1e+03 +Depth= 117893 States= 1.18e+08 Transitions= 6.48e+10 Memory= 4211.397 t= 1.07e+05 R= 1e+03 +Depth= 117893 States= 1.19e+08 Transitions= 6.51e+10 Memory= 4234.248 t= 1.07e+05 R= 1e+03 +Depth= 117893 States= 1.2e+08 Transitions= 6.58e+10 Memory= 4262.471 t= 1.08e+05 R= 1e+03 +Depth= 117893 States= 1.21e+08 Transitions= 6.65e+10 Memory= 4289.912 t= 1.17e+05 R= 1e+03 +Depth= 117893 States= 1.22e+08 Transitions= 6.69e+10 Memory= 4315.791 t= 1.17e+05 R= 1e+03 +Depth= 117893 States= 1.23e+08 Transitions= 6.74e+10 Memory= 4343.330 t= 1.18e+05 R= 1e+03 +Depth= 117893 States= 1.24e+08 Transitions= 6.83e+10 Memory= 4368.623 t= 1.19e+05 R= 1e+03 +Depth= 117893 States= 1.25e+08 Transitions= 6.86e+10 Memory= 4395.674 t= 1.2e+05 R= 1e+03 +Depth= 117893 States= 1.26e+08 Transitions= 6.9e+10 Memory= 4419.990 t= 1.21e+05 R= 1e+03 +Depth= 117893 States= 1.27e+08 Transitions= 6.94e+10 Memory= 4448.115 t= 1.21e+05 R= 1e+03 +Depth= 117893 States= 1.28e+08 Transitions= 7.02e+10 Memory= 4473.994 t= 1.23e+05 R= 1e+03 +Depth= 117893 States= 1.29e+08 Transitions= 7.05e+10 Memory= 4500.947 t= 1.23e+05 R= 1e+03 +Depth= 117893 States= 1.3e+08 Transitions= 7.09e+10 Memory= 4526.826 t= 1.24e+05 R= 1e+03 +Depth= 117893 States= 1.31e+08 Transitions= 7.18e+10 Memory= 4553.291 t= 1.25e+05 R= 1e+03 +Depth= 117893 States= 1.32e+08 Transitions= 7.21e+10 Memory= 4581.221 t= 1.26e+05 R= 1e+03 +Depth= 117893 States= 1.33e+08 Transitions= 7.25e+10 Memory= 4605.830 t= 1.26e+05 R= 1e+03 +Depth= 117893 States= 1.34e+08 Transitions= 7.3e+10 Memory= 4632.197 t= 1.27e+05 R= 1e+03 +Depth= 117893 States= 1.35e+08 Transitions= 7.35e+10 Memory= 4657.588 t= 1.33e+05 R= 1e+03 +pan: resizing hashtable to -w28.. done +Depth= 117893 States= 1.36e+08 Transitions= 7.38e+10 Memory= 6705.588 t= 1.33e+05 R= 1e+03 +Depth= 117893 States= 1.37e+08 Transitions= 7.46e+10 Memory= 6705.588 t= 1.35e+05 R= 1e+03 +Depth= 117893 States= 1.38e+08 Transitions= 7.54e+10 Memory= 6720.627 t= 1.36e+05 R= 1e+03 +Depth= 117893 States= 1.39e+08 Transitions= 7.57e+10 Memory= 6750.217 t= 1.37e+05 R= 1e+03 +Depth= 117893 States= 1.4e+08 Transitions= 7.61e+10 Memory= 6775.803 t= 1.37e+05 R= 1e+03 +Depth= 117893 States= 1.41e+08 Transitions= 7.65e+10 Memory= 6797.190 t= 1.38e+05 R= 1e+03 +Depth= 117893 States= 1.42e+08 Transitions= 7.71e+10 Memory= 6823.068 t= 1.39e+05 R= 1e+03 +Depth= 117893 States= 1.43e+08 Transitions= 7.76e+10 Memory= 6851.682 t= 1.4e+05 R= 1e+03 +Depth= 117893 States= 1.44e+08 Transitions= 7.83e+10 Memory= 6879.611 t= 1.41e+05 R= 1e+03 +Depth= 117893 States= 1.45e+08 Transitions= 7.87e+10 Memory= 6905.100 t= 1.41e+05 R= 1e+03 +Depth= 117893 States= 1.46e+08 Transitions= 7.91e+10 Memory= 6929.318 t= 1.42e+05 R= 1e+03 +Depth= 117893 States= 1.47e+08 Transitions= 7.96e+10 Memory= 6954.709 t= 1.43e+05 R= 1e+03 +Depth= 117893 States= 1.48e+08 Transitions= 8e+10 Memory= 6983.225 t= 1.44e+05 R= 1e+03 +Depth= 117893 States= 1.49e+08 Transitions= 8.05e+10 Memory= 7013.791 t= 1.44e+05 R= 1e+03 +Depth= 117893 States= 1.5e+08 Transitions= 8.15e+10 Memory= 7037.033 t= 1.46e+05 R= 1e+03 +Depth= 117893 States= 1.51e+08 Transitions= 8.19e+10 Memory= 7068.381 t= 1.47e+05 R= 1e+03 +Depth= 117893 States= 1.52e+08 Transitions= 8.22e+10 Memory= 7093.576 t= 1.47e+05 R= 1e+03 +Depth= 117893 States= 1.53e+08 Transitions= 8.26e+10 Memory= 7115.842 t= 1.48e+05 R= 1e+03 +Depth= 117893 States= 1.54e+08 Transitions= 8.3e+10 Memory= 7144.358 t= 1.48e+05 R= 1e+03 +Depth= 117893 States= 1.55e+08 Transitions= 8.39e+10 Memory= 7170.432 t= 1.5e+05 R= 1e+03 +Depth= 117893 States= 1.56e+08 Transitions= 8.42e+10 Memory= 7197.483 t= 1.5e+05 R= 1e+03 +Depth= 117893 States= 1.57e+08 Transitions= 8.46e+10 Memory= 7220.725 t= 1.51e+05 R= 1e+03 +Depth= 117893 States= 1.58e+08 Transitions= 8.51e+10 Memory= 7246.701 t= 1.52e+05 R= 1e+03 +Depth= 117893 States= 1.59e+08 Transitions= 8.55e+10 Memory= 7273.752 t= 1.52e+05 R= 1e+03 +Depth= 117893 States= 1.6e+08 Transitions= 8.58e+10 Memory= 7302.951 t= 1.53e+05 R= 1e+03 +Depth= 117893 States= 1.61e+08 Transitions= 8.64e+10 Memory= 7327.365 t= 1.54e+05 R= 1e+03 +Depth= 117893 States= 1.62e+08 Transitions= 8.69e+10 Memory= 7353.049 t= 1.55e+05 R= 1e+03 +Depth= 117893 States= 1.63e+08 Transitions= 8.73e+10 Memory= 7379.318 t= 1.55e+05 R= 1e+03 +Depth= 117893 States= 1.64e+08 Transitions= 8.77e+10 Memory= 7404.904 t= 1.56e+05 R= 1e+03 +Depth= 117893 States= 1.65e+08 Transitions= 8.82e+10 Memory= 7429.514 t= 1.57e+05 R= 1e+03 +Depth= 117893 States= 1.66e+08 Transitions= 8.87e+10 Memory= 7453.733 t= 1.58e+05 R= 1e+03 +Depth= 117893 States= 1.67e+08 Transitions= 8.95e+10 Memory= 7477.561 t= 1.59e+05 R= 1e+03 +Depth= 117893 States= 1.68e+08 Transitions= 9.02e+10 Memory= 7501.096 t= 1.6e+05 R= 1e+03 +Depth= 117893 States= 1.69e+08 Transitions= 9.07e+10 Memory= 7527.365 t= 1.61e+05 R= 1e+03 +Depth= 117893 States= 1.7e+08 Transitions= 9.11e+10 Memory= 7553.830 t= 1.61e+05 R= 1e+03 +Depth= 117893 States= 1.71e+08 Transitions= 9.16e+10 Memory= 7577.951 t= 1.62e+05 R= 1e+03 +Depth= 117893 States= 1.72e+08 Transitions= 9.24e+10 Memory= 7602.658 t= 1.63e+05 R= 1e+03 +Depth= 117893 States= 1.73e+08 Transitions= 9.35e+10 Memory= 7626.096 t= 1.65e+05 R= 1e+03 +Depth= 117893 States= 1.74e+08 Transitions= 9.39e+10 Memory= 7656.369 t= 1.66e+05 R= 1e+03 +Depth= 117893 States= 1.75e+08 Transitions= 9.43e+10 Memory= 7682.834 t= 1.67e+05 R= 1e+03 +Depth= 117893 States= 1.76e+08 Transitions= 9.49e+10 Memory= 7709.201 t= 1.67e+05 R= 1e+03 +Depth= 117893 States= 1.77e+08 Transitions= 9.55e+10 Memory= 7736.447 t= 1.68e+05 R= 1e+03 +Depth= 117893 States= 1.78e+08 Transitions= 9.61e+10 Memory= 7763.791 t= 1.69e+05 R= 1e+03 +Depth= 117893 States= 1.79e+08 Transitions= 9.66e+10 Memory= 7790.061 t= 1.7e+05 R= 1e+03 +Depth= 117893 States= 1.8e+08 Transitions= 9.72e+10 Memory= 7817.600 t= 1.71e+05 R= 1e+03 +Depth= 117893 States= 1.81e+08 Transitions= 9.8e+10 Memory= 7837.912 t= 1.73e+05 R= 1e+03 +Depth= 117893 States= 1.82e+08 Transitions= 9.88e+10 Memory= 7858.127 t= 1.74e+05 R= 1e+03 +Depth= 117893 States= 1.83e+08 Transitions= 9.95e+10 Memory= 7886.154 t= 1.75e+05 R= 1e+03 +Depth= 117893 States= 1.84e+08 Transitions= 1e+11 Memory= 7912.522 t= 1.76e+05 R= 1e+03 +Depth= 117893 States= 1.85e+08 Transitions= 1.01e+11 Memory= 7937.717 t= 1.77e+05 R= 1e+03 +Depth= 117893 States= 1.86e+08 Transitions= 1.02e+11 Memory= 7962.815 t= 1.78e+05 R= 1e+03 +Depth= 117893 States= 1.87e+08 Transitions= 1.02e+11 Memory= 7988.010 t= 1.79e+05 R= 1e+03 +Depth= 117893 States= 1.88e+08 Transitions= 1.03e+11 Memory= 8014.768 t= 1.8e+05 R= 1e+03 +Depth= 117893 States= 1.89e+08 Transitions= 1.03e+11 Memory= 8040.061 t= 1.81e+05 R= 1e+03 +Depth= 117893 States= 1.9e+08 Transitions= 1.04e+11 Memory= 8066.818 t= 1.82e+05 R= 1e+03 +Depth= 117893 States= 1.91e+08 Transitions= 1.05e+11 Memory= 8090.451 t= 1.83e+05 R= 1e+03 +Depth= 117893 States= 1.92e+08 Transitions= 1.05e+11 Memory= 8116.330 t= 1.84e+05 R= 1e+03 +Depth= 117893 States= 1.93e+08 Transitions= 1.06e+11 Memory= 8144.748 t= 1.85e+05 R= 1e+03 +Depth= 117893 States= 1.94e+08 Transitions= 1.07e+11 Memory= 8170.822 t= 1.86e+05 R= 1e+03 +Depth= 117893 States= 1.95e+08 Transitions= 1.07e+11 Memory= 8196.604 t= 1.87e+05 R= 1e+03 +Depth= 117893 States= 1.96e+08 Transitions= 1.07e+11 Memory= 8222.873 t= 1.87e+05 R= 1e+03 +Depth= 117893 States= 1.97e+08 Transitions= 1.08e+11 Memory= 8252.658 t= 1.88e+05 R= 1e+03 +Depth= 117893 States= 1.98e+08 Transitions= 1.08e+11 Memory= 8278.147 t= 1.89e+05 R= 1e+03 +Depth= 117893 States= 1.99e+08 Transitions= 1.08e+11 Memory= 8305.490 t= 1.89e+05 R= 1e+03 +Depth= 117893 States= 2e+08 Transitions= 1.09e+11 Memory= 8332.151 t= 1.9e+05 R= 1e+03 +Depth= 117893 States= 2.01e+08 Transitions= 1.09e+11 Memory= 8355.979 t= 1.91e+05 R= 1e+03 +Depth= 117893 States= 2.02e+08 Transitions= 1.1e+11 Memory= 8383.225 t= 1.91e+05 R= 1e+03 +Depth= 117893 States= 2.03e+08 Transitions= 1.1e+11 Memory= 8410.959 t= 1.92e+05 R= 1e+03 +Depth= 117893 States= 2.04e+08 Transitions= 1.11e+11 Memory= 8437.912 t= 1.93e+05 R= 1e+03 +Depth= 117893 States= 2.05e+08 Transitions= 1.11e+11 Memory= 8465.256 t= 1.94e+05 R= 1e+03 +Depth= 117893 States= 2.06e+08 Transitions= 1.12e+11 Memory= 8489.670 t= 1.94e+05 R= 1e+03 +Depth= 117893 States= 2.07e+08 Transitions= 1.12e+11 Memory= 8517.600 t= 1.95e+05 R= 1e+03 +Depth= 117893 States= 2.08e+08 Transitions= 1.12e+11 Memory= 8543.088 t= 1.96e+05 R= 1e+03 +Depth= 117893 States= 2.09e+08 Transitions= 1.13e+11 Memory= 8566.233 t= 1.97e+05 R= 1e+03 +Depth= 117893 States= 2.1e+08 Transitions= 1.14e+11 Memory= 8590.744 t= 1.98e+05 R= 1e+03 +Depth= 117893 States= 2.11e+08 Transitions= 1.14e+11 Memory= 8613.693 t= 1.99e+05 R= 1e+03 +Depth= 117893 States= 2.12e+08 Transitions= 1.15e+11 Memory= 8642.502 t= 2.01e+05 R= 1e+03 +Depth= 117893 States= 2.13e+08 Transitions= 1.16e+11 Memory= 8672.873 t= 2.02e+05 R= 1e+03 +Depth= 117893 States= 2.14e+08 Transitions= 1.18e+11 Memory= 8697.483 t= 2.04e+05 R= 1e+03 +Depth= 117893 States= 2.15e+08 Transitions= 1.19e+11 Memory= 8722.190 t= 2.06e+05 R= 1e+03 +Depth= 117893 States= 2.16e+08 Transitions= 1.2e+11 Memory= 8744.455 t= 2.08e+05 R= 1e+03 +Depth= 117893 States= 2.17e+08 Transitions= 1.21e+11 Memory= 8765.842 t= 2.09e+05 R= 1e+03 +Depth= 117893 States= 2.18e+08 Transitions= 1.22e+11 Memory= 8785.861 t= 2.11e+05 R= 1e+03 +Depth= 117893 States= 2.19e+08 Transitions= 1.23e+11 Memory= 8804.904 t= 2.13e+05 R= 1e+03 +Depth= 117893 States= 2.2e+08 Transitions= 1.24e+11 Memory= 8823.850 t= 2.15e+05 R= 1e+03 +Depth= 117893 States= 2.21e+08 Transitions= 1.24e+11 Memory= 8850.705 t= 2.15e+05 R= 1e+03 +Depth= 117893 States= 2.22e+08 Transitions= 1.25e+11 Memory= 8877.365 t= 2.16e+05 R= 1e+03 +Depth= 117893 States= 2.23e+08 Transitions= 1.25e+11 Memory= 8902.268 t= 2.17e+05 R= 1e+03 +Depth= 117893 States= 2.24e+08 Transitions= 1.26e+11 Memory= 8927.268 t= 2.19e+05 R= 1e+03 +Depth= 117893 States= 2.25e+08 Transitions= 1.27e+11 Memory= 8949.143 t= 2.2e+05 R= 1e+03 +Depth= 117893 States= 2.26e+08 Transitions= 1.28e+11 Memory= 8973.459 t= 2.22e+05 R= 1e+03 +Depth= 117893 States= 2.27e+08 Transitions= 1.29e+11 Memory= 9004.807 t= 2.22e+05 R= 1e+03 +Depth= 117893 States= 2.28e+08 Transitions= 1.29e+11 Memory= 9031.174 t= 2.23e+05 R= 1e+03 +Depth= 117893 States= 2.29e+08 Transitions= 1.29e+11 Memory= 9054.709 t= 2.23e+05 R= 1e+03 +Depth= 117893 States= 2.3e+08 Transitions= 1.3e+11 Memory= 9077.756 t= 2.24e+05 R= 1e+03 +Depth= 117893 States= 2.31e+08 Transitions= 1.3e+11 Memory= 9103.830 t= 2.25e+05 R= 1e+03 +Depth= 117893 States= 2.32e+08 Transitions= 1.31e+11 Memory= 9128.830 t= 2.26e+05 R= 1e+03 +Depth= 117893 States= 2.33e+08 Transitions= 1.32e+11 Memory= 9150.315 t= 2.28e+05 R= 1e+03 +Depth= 117893 States= 2.34e+08 Transitions= 1.32e+11 Memory= 9175.705 t= 2.29e+05 R= 1e+03 +Depth= 117893 States= 2.35e+08 Transitions= 1.33e+11 Memory= 9201.096 t= 2.3e+05 R= 1e+03 +Depth= 117893 States= 2.36e+08 Transitions= 1.34e+11 Memory= 9226.682 t= 2.31e+05 R= 1e+03 +Depth= 117893 States= 2.37e+08 Transitions= 1.34e+11 Memory= 9253.049 t= 2.31e+05 R= 1e+03 +Depth= 117893 States= 2.38e+08 Transitions= 1.35e+11 Memory= 9276.291 t= 2.33e+05 R= 1e+03 +Depth= 117893 States= 2.39e+08 Transitions= 1.36e+11 Memory= 9300.608 t= 2.34e+05 R= 1e+03 +Depth= 117893 States= 2.4e+08 Transitions= 1.37e+11 Memory= 9324.240 t= 2.35e+05 R= 1e+03 +Depth= 117893 States= 2.41e+08 Transitions= 1.37e+11 Memory= 9348.361 t= 2.37e+05 R= 1e+03 +Depth= 117893 States= 2.42e+08 Transitions= 1.38e+11 Memory= 9372.873 t= 2.38e+05 R= 1e+03 +Depth= 117893 States= 2.43e+08 Transitions= 1.39e+11 Memory= 9396.604 t= 2.39e+05 R= 1e+03 +Depth= 117893 States= 2.44e+08 Transitions= 1.39e+11 Memory= 9421.994 t= 2.4e+05 R= 1e+03 +Depth= 117893 States= 2.45e+08 Transitions= 1.4e+11 Memory= 9450.998 t= 2.41e+05 R= 1e+03 +Depth= 117893 States= 2.46e+08 Transitions= 1.41e+11 Memory= 9475.217 t= 2.42e+05 R= 1e+03 +Depth= 117893 States= 2.47e+08 Transitions= 1.41e+11 Memory= 9498.264 t= 2.43e+05 R= 1e+03 +Depth= 117893 States= 2.48e+08 Transitions= 1.42e+11 Memory= 9522.580 t= 2.44e+05 R= 1e+03 +Depth= 117893 States= 2.49e+08 Transitions= 1.42e+11 Memory= 9549.924 t= 2.45e+05 R= 1e+03 +Depth= 117893 States= 2.5e+08 Transitions= 1.43e+11 Memory= 9579.807 t= 2.45e+05 R= 1e+03 +Depth= 117893 States= 2.51e+08 Transitions= 1.43e+11 Memory= 9609.104 t= 2.46e+05 R= 1e+03 +Depth= 117893 States= 2.52e+08 Transitions= 1.44e+11 Memory= 9631.858 t= 2.47e+05 R= 1e+03 +Depth= 117893 States= 2.53e+08 Transitions= 1.45e+11 Memory= 9652.756 t= 2.48e+05 R= 1e+03 +Depth= 117893 States= 2.54e+08 Transitions= 1.45e+11 Memory= 9678.733 t= 2.49e+05 R= 1e+03 +Depth= 117893 States= 2.55e+08 Transitions= 1.45e+11 Memory= 9703.733 t= 2.5e+05 R= 1e+03 +Depth= 117893 States= 2.56e+08 Transitions= 1.46e+11 Memory= 9728.440 t= 2.5e+05 R= 1e+03 +Depth= 117893 States= 2.57e+08 Transitions= 1.46e+11 Memory= 9757.834 t= 2.51e+05 R= 1e+03 +Depth= 117893 States= 2.58e+08 Transitions= 1.47e+11 Memory= 9784.006 t= 2.52e+05 R= 1e+03 +Depth= 117893 States= 2.59e+08 Transitions= 1.48e+11 Memory= 9810.959 t= 2.54e+05 R= 1e+03 +Depth= 117893 States= 2.6e+08 Transitions= 1.48e+11 Memory= 9839.475 t= 2.54e+05 R= 1e+03 +Depth= 117893 States= 2.61e+08 Transitions= 1.49e+11 Memory= 9862.717 t= 2.55e+05 R= 1e+03 +Depth= 117893 States= 2.62e+08 Transitions= 1.49e+11 Memory= 9891.428 t= 2.56e+05 R= 1e+03 +Depth= 117893 States= 2.63e+08 Transitions= 1.5e+11 Memory= 9916.623 t= 2.57e+05 R= 1e+03 +Depth= 117893 States= 2.64e+08 Transitions= 1.5e+11 Memory= 9944.162 t= 2.58e+05 R= 1e+03 +Depth= 117893 States= 2.65e+08 Transitions= 1.51e+11 Memory= 9969.358 t= 2.58e+05 R= 1e+03 +Depth= 117893 States= 2.66e+08 Transitions= 1.52e+11 Memory= 9995.432 t= 2.6e+05 R= 1e+03 +Depth= 117893 States= 2.67e+08 Transitions= 1.52e+11 Memory= 10023.654 t= 2.6e+05 R= 1e+03 +Depth= 117893 States= 2.68e+08 Transitions= 1.52e+11 Memory= 10047.580 t= 2.61e+05 R= 1e+03 +Depth= 117893 States= 2.69e+08 Transitions= 1.53e+11 Memory= 10075.022 t= 2.62e+05 R= 1e+03 +Depth= 117893 States= 2.7e+08 Transitions= 1.54e+11 Memory= 10101.779 t= 2.63e+05 R= 1e+03 +Depth= 117893 States= 2.71e+08 Transitions= 1.54e+11 Memory= 10129.221 t= 2.64e+05 R= 1e+03 +Depth= 117893 States= 2.72e+08 Transitions= 1.54e+11 Memory= 10154.416 t= 2.64e+05 R= 1e+03 +Depth= 117893 States= 2.73e+08 Transitions= 1.55e+11 Memory= 10180.393 t= 2.66e+05 R= 1e+03 +Depth= 117893 States= 2.74e+08 Transitions= 1.56e+11 Memory= 10209.104 t= 2.66e+05 R= 1e+03 +Depth= 117893 States= 2.75e+08 Transitions= 1.56e+11 Memory= 10232.541 t= 2.67e+05 R= 1e+03 +Depth= 117893 States= 2.76e+08 Transitions= 1.57e+11 Memory= 10259.690 t= 2.68e+05 R= 1e+03 +Depth= 117893 States= 2.77e+08 Transitions= 1.57e+11 Memory= 10285.080 t= 2.68e+05 R= 1e+03 +Depth= 117893 States= 2.78e+08 Transitions= 1.57e+11 Memory= 10311.154 t= 2.69e+05 R= 1e+03 +Depth= 117893 States= 2.79e+08 Transitions= 1.58e+11 Memory= 10337.033 t= 2.71e+05 R= 1e+03 diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.define b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.log b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.log new file mode 100644 index 0000000..f9e72c0 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.log @@ -0,0 +1,810 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi-compress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +depth 7: Claim reached state 9 (line 1367) +depth 50: Claim reached state 9 (line 1366) +Depth= 7605 States= 1e+06 Transitions= 3.21e+08 Memory= 493.010 t= 500 R= 2e+03 +Depth= 7605 States= 2e+06 Transitions= 6.35e+08 Memory= 518.401 t= 996 R= 2e+03 +Depth= 7605 States= 3e+06 Transitions= 9.46e+08 Memory= 549.455 t= 1.5e+03 R= 2e+03 +pan: resizing hashtable to -w22.. done +Depth= 7605 States= 4e+06 Transitions= 1.25e+09 Memory= 609.776 t= 1.97e+03 R= 2e+03 +Depth= 9389 States= 5e+06 Transitions= 1.56e+09 Memory= 634.873 t= 2.46e+03 R= 2e+03 +Depth= 9389 States= 6e+06 Transitions= 1.88e+09 Memory= 662.315 t= 2.97e+03 R= 2e+03 +Depth= 9389 States= 7e+06 Transitions= 2.25e+09 Memory= 688.193 t= 3.58e+03 R= 2e+03 +Depth= 9389 States= 8e+06 Transitions= 2.61e+09 Memory= 716.611 t= 4.18e+03 R= 2e+03 +Depth= 9389 States= 9e+06 Transitions= 2.96e+09 Memory= 743.662 t= 4.75e+03 R= 2e+03 +pan: resizing hashtable to -w24.. done +Depth= 9389 States= 1e+07 Transitions= 3.29e+09 Memory= 894.611 t= 5.26e+03 R= 2e+03 +Depth= 9389 States= 1.1e+07 Transitions= 3.62e+09 Memory= 921.076 t= 5.77e+03 R= 2e+03 +Depth= 9389 States= 1.2e+07 Transitions= 3.93e+09 Memory= 947.053 t= 6.27e+03 R= 2e+03 +Depth= 9389 States= 1.3e+07 Transitions= 4.25e+09 Memory= 974.299 t= 6.76e+03 R= 2e+03 +Depth= 9389 States= 1.4e+07 Transitions= 4.55e+09 Memory= 1004.963 t= 7.23e+03 R= 2e+03 +Depth= 9389 States= 1.5e+07 Transitions= 4.87e+09 Memory= 1029.963 t= 7.73e+03 R= 2e+03 +Depth= 9389 States= 1.6e+07 Transitions= 5.18e+09 Memory= 1058.088 t= 8.23e+03 R= 2e+03 +Depth= 9389 States= 1.7e+07 Transitions= 5.48e+09 Memory= 1087.580 t= 8.71e+03 R= 2e+03 +Depth= 9389 States= 1.8e+07 Transitions= 5.79e+09 Memory= 1113.166 t= 9.19e+03 R= 2e+03 +Depth= 9389 States= 1.9e+07 Transitions= 6.1e+09 Memory= 1139.143 t= 9.68e+03 R= 2e+03 +Depth= 9389 States= 2e+07 Transitions= 6.59e+09 Memory= 1164.436 t= 1.05e+04 R= 2e+03 +Depth= 9389 States= 2.1e+07 Transitions= 7.19e+09 Memory= 1188.557 t= 1.15e+04 R= 2e+03 +Depth= 9389 States= 2.2e+07 Transitions= 8.02e+09 Memory= 1210.236 t= 1.28e+04 R= 2e+03 +Depth= 9389 States= 2.3e+07 Transitions= 8.41e+09 Memory= 1237.385 t= 1.35e+04 R= 2e+03 +Depth= 9389 States= 2.4e+07 Transitions= 8.96e+09 Memory= 1261.604 t= 1.44e+04 R= 2e+03 +Depth= 9389 States= 2.5e+07 Transitions= 9.91e+09 Memory= 1287.287 t= 1.6e+04 R= 2e+03 +Depth= 9389 States= 2.6e+07 Transitions= 1.06e+10 Memory= 1312.971 t= 1.71e+04 R= 2e+03 +Depth= 9600 States= 2.7e+07 Transitions= 1.1e+10 Memory= 1340.510 t= 1.78e+04 R= 2e+03 +Depth= 9600 States= 2.8e+07 Transitions= 1.15e+10 Memory= 1367.756 t= 1.86e+04 R= 2e+03 +Depth= 9600 States= 2.9e+07 Transitions= 1.21e+10 Memory= 1395.100 t= 1.96e+04 R= 1e+03 +Depth= 9600 States= 3e+07 Transitions= 1.27e+10 Memory= 1422.639 t= 2.05e+04 R= 1e+03 +Depth= 9600 States= 3.1e+07 Transitions= 1.32e+10 Memory= 1448.908 t= 2.15e+04 R= 1e+03 +Depth= 9600 States= 3.2e+07 Transitions= 1.39e+10 Memory= 1474.494 t= 2.25e+04 R= 1e+03 +Depth= 9600 States= 3.3e+07 Transitions= 1.46e+10 Memory= 1494.807 t= 2.38e+04 R= 1e+03 +Depth= 9600 States= 3.4e+07 Transitions= 1.52e+10 Memory= 1519.709 t= 2.47e+04 R= 1e+03 +pan: resizing hashtable to -w26.. done +Depth= 9600 States= 3.5e+07 Transitions= 1.58e+10 Memory= 2042.061 t= 2.57e+04 R= 1e+03 +Depth= 9600 States= 3.6e+07 Transitions= 1.63e+10 Memory= 2068.916 t= 2.66e+04 R= 1e+03 +Depth= 9600 States= 3.7e+07 Transitions= 1.7e+10 Memory= 2094.404 t= 2.75e+04 R= 1e+03 +Depth= 9600 States= 3.8e+07 Transitions= 1.76e+10 Memory= 2119.893 t= 2.86e+04 R= 1e+03 +Depth= 9600 States= 3.9e+07 Transitions= 1.82e+10 Memory= 2144.697 t= 2.96e+04 R= 1e+03 +Depth= 9600 States= 4e+07 Transitions= 1.87e+10 Memory= 2173.018 t= 3.03e+04 R= 1e+03 +Depth= 9600 States= 4.1e+07 Transitions= 1.93e+10 Memory= 2200.068 t= 3.13e+04 R= 1e+03 +Depth= 9600 States= 4.2e+07 Transitions= 1.98e+10 Memory= 2225.459 t= 3.22e+04 R= 1e+03 +Depth= 9600 States= 4.3e+07 Transitions= 2.05e+10 Memory= 2252.217 t= 3.32e+04 R= 1e+03 +Depth= 9600 States= 4.4e+07 Transitions= 2.13e+10 Memory= 2275.557 t= 3.45e+04 R= 1e+03 +Depth= 9600 States= 4.5e+07 Transitions= 2.18e+10 Memory= 2303.096 t= 3.53e+04 R= 1e+03 +Depth= 9600 States= 4.6e+07 Transitions= 2.22e+10 Memory= 2327.608 t= 3.59e+04 R= 1e+03 +Depth= 9600 States= 4.7e+07 Transitions= 2.25e+10 Memory= 2355.342 t= 3.65e+04 R= 1e+03 +Depth= 9600 States= 4.8e+07 Transitions= 2.28e+10 Memory= 2385.029 t= 3.7e+04 R= 1e+03 +Depth= 9600 States= 4.9e+07 Transitions= 2.32e+10 Memory= 2413.643 t= 3.75e+04 R= 1e+03 +Depth= 9600 States= 5e+07 Transitions= 2.35e+10 Memory= 2439.522 t= 3.81e+04 R= 1e+03 +Depth= 9600 States= 5.1e+07 Transitions= 2.42e+10 Memory= 2462.959 t= 3.91e+04 R= 1e+03 +Depth= 9600 States= 5.2e+07 Transitions= 2.46e+10 Memory= 2490.498 t= 3.97e+04 R= 1e+03 +Depth= 9600 States= 5.3e+07 Transitions= 2.49e+10 Memory= 2519.600 t= 4.03e+04 R= 1e+03 +Depth= 9600 States= 5.4e+07 Transitions= 2.53e+10 Memory= 2545.674 t= 4.09e+04 R= 1e+03 +Depth= 9600 States= 5.5e+07 Transitions= 2.56e+10 Memory= 2574.190 t= 4.13e+04 R= 1e+03 +Depth= 9600 States= 5.6e+07 Transitions= 2.6e+10 Memory= 2598.604 t= 4.2e+04 R= 1e+03 +Depth= 9600 States= 5.7e+07 Transitions= 2.66e+10 Memory= 2622.334 t= 4.3e+04 R= 1e+03 +Depth= 9600 States= 5.8e+07 Transitions= 2.73e+10 Memory= 2645.869 t= 4.41e+04 R= 1e+03 +Depth= 9600 States= 5.9e+07 Transitions= 2.81e+10 Memory= 2668.623 t= 4.54e+04 R= 1e+03 +Depth= 9600 States= 6e+07 Transitions= 2.91e+10 Memory= 2701.631 t= 4.72e+04 R= 1e+03 +Depth= 9600 States= 6.1e+07 Transitions= 3.02e+10 Memory= 2729.170 t= 4.9e+04 R= 1e+03 +Depth= 9600 States= 6.2e+07 Transitions= 3.14e+10 Memory= 2754.072 t= 5.09e+04 R= 1e+03 +Depth= 9600 States= 6.3e+07 Transitions= 3.25e+10 Memory= 2778.682 t= 5.29e+04 R= 1e+03 +Depth= 9600 States= 6.4e+07 Transitions= 3.35e+10 Memory= 2799.190 t= 5.46e+04 R= 1e+03 +Depth= 9600 States= 6.5e+07 Transitions= 3.45e+10 Memory= 2820.869 t= 5.61e+04 R= 1e+03 +Depth= 9600 States= 6.6e+07 Transitions= 3.56e+10 Memory= 2840.401 t= 5.81e+04 R= 1e+03 +Depth= 9600 States= 6.7e+07 Transitions= 3.66e+10 Memory= 2859.443 t= 5.98e+04 R= 1e+03 +Depth= 9600 States= 6.8e+07 Transitions= 3.74e+10 Memory= 2881.807 t= 6.1e+04 R= 1e+03 +Depth= 9600 States= 6.9e+07 Transitions= 3.78e+10 Memory= 2909.053 t= 6.17e+04 R= 1e+03 +Depth= 9600 States= 7e+07 Transitions= 3.84e+10 Memory= 2934.151 t= 6.27e+04 R= 1e+03 +Depth= 9600 States= 7.1e+07 Transitions= 3.94e+10 Memory= 2959.053 t= 6.43e+04 R= 1e+03 +Depth= 9600 States= 7.2e+07 Transitions= 4.05e+10 Memory= 2980.049 t= 6.62e+04 R= 1e+03 +Depth= 9600 States= 7.3e+07 Transitions= 4.11e+10 Memory= 3007.197 t= 6.72e+04 R= 1e+03 +Depth= 9600 States= 7.4e+07 Transitions= 4.14e+10 Memory= 3037.276 t= 6.78e+04 R= 1e+03 +Depth= 9600 States= 7.5e+07 Transitions= 4.18e+10 Memory= 3063.252 t= 6.83e+04 R= 1e+03 +Depth= 9600 States= 7.6e+07 Transitions= 4.21e+10 Memory= 3087.276 t= 6.89e+04 R= 1e+03 +Depth= 9600 States= 7.7e+07 Transitions= 4.26e+10 Memory= 3112.178 t= 6.95e+04 R= 1e+03 +Depth= 9600 States= 7.8e+07 Transitions= 4.3e+10 Memory= 3137.764 t= 7.03e+04 R= 1e+03 +Depth= 9600 States= 7.9e+07 Transitions= 4.4e+10 Memory= 3162.178 t= 7.2e+04 R= 1e+03 +Depth= 9600 States= 8e+07 Transitions= 4.48e+10 Memory= 3185.420 t= 7.32e+04 R= 1e+03 +Depth= 9600 States= 8.1e+07 Transitions= 4.53e+10 Memory= 3212.276 t= 7.4e+04 R= 1e+03 +Depth= 9600 States= 8.2e+07 Transitions= 4.6e+10 Memory= 3237.178 t= 7.52e+04 R= 1e+03 +Depth= 9600 States= 8.3e+07 Transitions= 4.7e+10 Memory= 3261.299 t= 7.69e+04 R= 1e+03 +Depth= 9600 States= 8.4e+07 Transitions= 4.75e+10 Memory= 3286.104 t= 7.76e+04 R= 1e+03 +Depth= 9600 States= 8.5e+07 Transitions= 4.84e+10 Memory= 3309.639 t= 7.91e+04 R= 1e+03 +Depth= 9600 States= 8.6e+07 Transitions= 4.91e+10 Memory= 3333.272 t= 8.04e+04 R= 1e+03 +Depth= 9600 States= 8.7e+07 Transitions= 4.98e+10 Memory= 3358.272 t= 8.15e+04 R= 1e+03 +Depth= 9600 States= 8.8e+07 Transitions= 5.04e+10 Memory= 3382.490 t= 8.25e+04 R= 1e+03 +Depth= 9600 States= 8.9e+07 Transitions= 5.09e+10 Memory= 3410.908 t= 8.32e+04 R= 1e+03 +Depth= 9600 States= 9e+07 Transitions= 5.14e+10 Memory= 3437.959 t= 8.41e+04 R= 1e+03 +Depth= 9600 States= 9.1e+07 Transitions= 5.23e+10 Memory= 3460.908 t= 8.56e+04 R= 1e+03 +Depth= 9600 States= 9.2e+07 Transitions= 5.32e+10 Memory= 3484.639 t= 8.71e+04 R= 1e+03 +Depth= 9600 States= 9.3e+07 Transitions= 5.37e+10 Memory= 3509.932 t= 8.79e+04 R= 1e+03 +Depth= 9600 States= 9.4e+07 Transitions= 5.44e+10 Memory= 3534.346 t= 8.91e+04 R= 1e+03 +Depth= 9600 States= 9.5e+07 Transitions= 5.49e+10 Memory= 3561.299 t= 8.98e+04 R= 1e+03 +Depth= 9600 States= 9.6e+07 Transitions= 5.53e+10 Memory= 3589.522 t= 9.06e+04 R= 1e+03 +Depth= 9600 States= 9.7e+07 Transitions= 5.58e+10 Memory= 3619.209 t= 9.14e+04 R= 1e+03 +Depth= 9600 States= 9.8e+07 Transitions= 5.62e+10 Memory= 3645.576 t= 9.2e+04 R= 1e+03 +Depth= 9600 States= 9.9e+07 Transitions= 5.68e+10 Memory= 3668.623 t= 9.31e+04 R= 1e+03 +Depth= 9600 States= 1e+08 Transitions= 5.75e+10 Memory= 3692.061 t= 9.41e+04 R= 1e+03 +Depth= 9600 States= 1.01e+08 Transitions= 5.79e+10 Memory= 3717.940 t= 9.48e+04 R= 1e+03 +Depth= 9600 States= 1.02e+08 Transitions= 5.85e+10 Memory= 3741.963 t= 9.57e+04 R= 1e+03 +Depth= 9600 States= 1.03e+08 Transitions= 5.89e+10 Memory= 3768.428 t= 9.64e+04 R= 1e+03 +Depth= 9600 States= 1.04e+08 Transitions= 5.95e+10 Memory= 3795.186 t= 9.75e+04 R= 1e+03 +Depth= 9600 States= 1.05e+08 Transitions= 6.01e+10 Memory= 3820.283 t= 9.84e+04 R= 1e+03 +Depth= 9600 States= 1.06e+08 Transitions= 6.09e+10 Memory= 3846.358 t= 9.98e+04 R= 1e+03 +Depth= 10157 States= 1.07e+08 Transitions= 6.17e+10 Memory= 3873.408 t= 1.01e+05 R= 1e+03 +Depth= 10157 States= 1.08e+08 Transitions= 6.21e+10 Memory= 3901.924 t= 1.02e+05 R= 1e+03 +Depth= 10157 States= 1.09e+08 Transitions= 6.24e+10 Memory= 3925.850 t= 1.02e+05 R= 1e+03 +Depth= 10157 States= 1.1e+08 Transitions= 6.29e+10 Memory= 3955.244 t= 1.03e+05 R= 1e+03 +Depth= 10193 States= 1.11e+08 Transitions= 6.38e+10 Memory= 3979.854 t= 1.05e+05 R= 1e+03 +Depth= 10193 States= 1.12e+08 Transitions= 6.42e+10 Memory= 4007.686 t= 1.05e+05 R= 1e+03 +Depth= 10193 States= 1.13e+08 Transitions= 6.45e+10 Memory= 4033.076 t= 1.06e+05 R= 1e+03 +Depth= 10193 States= 1.14e+08 Transitions= 6.55e+10 Memory= 4060.127 t= 1.07e+05 R= 1e+03 +Depth= 10193 States= 1.15e+08 Transitions= 6.59e+10 Memory= 4088.057 t= 1.08e+05 R= 1e+03 +Depth= 10193 States= 1.16e+08 Transitions= 6.63e+10 Memory= 4112.276 t= 1.09e+05 R= 1e+03 +Depth= 10193 States= 1.17e+08 Transitions= 6.66e+10 Memory= 4140.986 t= 1.09e+05 R= 1e+03 +Depth= 10193 States= 1.18e+08 Transitions= 6.73e+10 Memory= 4167.158 t= 1.1e+05 R= 1e+03 +Depth= 10193 States= 1.19e+08 Transitions= 6.78e+10 Memory= 4195.088 t= 1.11e+05 R= 1e+03 +Depth= 10193 States= 1.2e+08 Transitions= 6.82e+10 Memory= 4220.674 t= 1.12e+05 R= 1e+03 +Depth= 10193 States= 1.21e+08 Transitions= 6.9e+10 Memory= 4247.041 t= 1.13e+05 R= 1e+03 +Depth= 10193 States= 1.22e+08 Transitions= 6.94e+10 Memory= 4275.166 t= 1.14e+05 R= 1e+03 +Depth= 10193 States= 1.23e+08 Transitions= 6.98e+10 Memory= 4299.287 t= 1.14e+05 R= 1e+03 +Depth= 10193 States= 1.24e+08 Transitions= 7.03e+10 Memory= 4326.143 t= 1.15e+05 R= 1e+03 +Depth= 10193 States= 1.25e+08 Transitions= 7.08e+10 Memory= 4352.901 t= 1.16e+05 R= 1e+03 +Depth= 10193 States= 1.26e+08 Transitions= 7.11e+10 Memory= 4380.440 t= 1.17e+05 R= 1e+03 +Depth= 10193 States= 1.27e+08 Transitions= 7.17e+10 Memory= 4407.490 t= 1.18e+05 R= 1e+03 +Depth= 10193 States= 1.28e+08 Transitions= 7.26e+10 Memory= 4431.026 t= 1.19e+05 R= 1e+03 +Depth= 10193 States= 1.29e+08 Transitions= 7.3e+10 Memory= 4461.787 t= 1.2e+05 R= 1e+03 +Depth= 10193 States= 1.3e+08 Transitions= 7.34e+10 Memory= 4487.373 t= 1.2e+05 R= 1e+03 +Depth= 10193 States= 1.31e+08 Transitions= 7.37e+10 Memory= 4511.006 t= 1.21e+05 R= 1e+03 +Depth= 10193 States= 1.32e+08 Transitions= 7.43e+10 Memory= 4536.494 t= 1.22e+05 R= 1e+03 +Depth= 10193 States= 1.33e+08 Transitions= 7.47e+10 Memory= 4564.815 t= 1.23e+05 R= 1e+03 +Depth= 10193 States= 1.34e+08 Transitions= 7.56e+10 Memory= 4590.498 t= 1.24e+05 R= 1e+03 +Depth= 10193 States= 1.35e+08 Transitions= 7.6e+10 Memory= 4619.209 t= 1.25e+05 R= 1e+03 +pan: resizing hashtable to -w28.. done +Depth= 10193 States= 1.36e+08 Transitions= 7.63e+10 Memory= 6667.209 t= 1.25e+05 R= 1e+03 +Depth= 10193 States= 1.37e+08 Transitions= 7.68e+10 Memory= 6667.209 t= 1.26e+05 R= 1e+03 +Depth= 10193 States= 1.38e+08 Transitions= 7.73e+10 Memory= 6680.490 t= 1.27e+05 R= 1e+03 +Depth= 10193 States= 1.39e+08 Transitions= 7.76e+10 Memory= 6710.178 t= 1.27e+05 R= 1e+03 +Depth= 10193 States= 1.4e+08 Transitions= 7.86e+10 Memory= 6736.252 t= 1.29e+05 R= 1e+03 +Depth= 10193 States= 1.41e+08 Transitions= 7.91e+10 Memory= 6765.647 t= 1.3e+05 R= 1e+03 +Depth= 10193 States= 1.42e+08 Transitions= 7.95e+10 Memory= 6792.697 t= 1.3e+05 R= 1e+03 +Depth= 10193 States= 1.43e+08 Transitions= 7.98e+10 Memory= 6816.818 t= 1.31e+05 R= 1e+03 +Depth= 10193 States= 1.44e+08 Transitions= 8.02e+10 Memory= 6842.893 t= 1.32e+05 R= 1e+03 +Depth= 10193 States= 1.45e+08 Transitions= 8.1e+10 Memory= 6870.236 t= 1.33e+05 R= 1e+03 +Depth= 10193 States= 1.46e+08 Transitions= 8.15e+10 Memory= 6898.361 t= 1.34e+05 R= 1e+03 +Depth= 10193 States= 1.47e+08 Transitions= 8.18e+10 Memory= 6922.092 t= 1.34e+05 R= 1e+03 +Depth= 10193 States= 1.48e+08 Transitions= 8.23e+10 Memory= 6948.557 t= 1.35e+05 R= 1e+03 +Depth= 10193 States= 1.49e+08 Transitions= 8.28e+10 Memory= 6974.533 t= 1.36e+05 R= 1e+03 +Depth= 10193 States= 1.5e+08 Transitions= 8.31e+10 Memory= 7004.221 t= 1.36e+05 R= 1e+03 +Depth= 10193 States= 1.51e+08 Transitions= 8.36e+10 Memory= 7029.416 t= 1.37e+05 R= 1e+03 +Depth= 10193 States= 1.52e+08 Transitions= 8.41e+10 Memory= 7055.588 t= 1.38e+05 R= 1e+03 +Depth= 10193 States= 1.53e+08 Transitions= 8.45e+10 Memory= 7081.760 t= 1.39e+05 R= 1e+03 +Depth= 10193 States= 1.54e+08 Transitions= 8.5e+10 Memory= 7107.834 t= 1.39e+05 R= 1e+03 +Depth= 10193 States= 1.55e+08 Transitions= 8.54e+10 Memory= 7134.201 t= 1.4e+05 R= 1e+03 +Depth= 10193 States= 1.56e+08 Transitions= 8.59e+10 Memory= 7158.713 t= 1.41e+05 R= 1e+03 +Depth= 10193 States= 1.57e+08 Transitions= 8.66e+10 Memory= 7181.662 t= 1.42e+05 R= 1e+03 +Depth= 10193 States= 1.58e+08 Transitions= 8.74e+10 Memory= 7204.221 t= 1.43e+05 R= 1e+03 +Depth= 10193 States= 1.59e+08 Transitions= 8.78e+10 Memory= 7230.295 t= 1.44e+05 R= 1e+03 +Depth= 10193 States= 1.6e+08 Transitions= 8.83e+10 Memory= 7256.662 t= 1.45e+05 R= 1e+03 +Depth= 10193 States= 1.61e+08 Transitions= 8.87e+10 Memory= 7283.127 t= 1.45e+05 R= 1e+03 +Depth= 10193 States= 1.62e+08 Transitions= 8.94e+10 Memory= 7306.760 t= 1.47e+05 R= 1e+03 +Depth= 10193 States= 1.63e+08 Transitions= 9.03e+10 Memory= 7331.565 t= 1.48e+05 R= 1e+03 +Depth= 10193 States= 1.64e+08 Transitions= 9.12e+10 Memory= 7356.955 t= 1.49e+05 R= 1e+03 +Depth= 10193 States= 1.65e+08 Transitions= 9.15e+10 Memory= 7384.983 t= 1.5e+05 R= 1e+03 +Depth= 10193 States= 1.66e+08 Transitions= 9.2e+10 Memory= 7412.033 t= 1.51e+05 R= 1e+03 +Depth= 10193 States= 1.67e+08 Transitions= 9.26e+10 Memory= 7439.377 t= 1.52e+05 R= 1e+03 +Depth= 10193 States= 1.68e+08 Transitions= 9.32e+10 Memory= 7465.256 t= 1.53e+05 R= 1e+03 +Depth= 10193 States= 1.69e+08 Transitions= 9.37e+10 Memory= 7493.479 t= 1.54e+05 R= 1e+03 +Depth= 10193 States= 1.7e+08 Transitions= 9.44e+10 Memory= 7520.041 t= 1.55e+05 R= 1e+03 +Depth= 10193 States= 1.71e+08 Transitions= 9.5e+10 Memory= 7544.065 t= 1.56e+05 R= 1e+03 +Depth= 10193 States= 1.72e+08 Transitions= 9.59e+10 Memory= 7564.377 t= 1.57e+05 R= 1e+03 +Depth= 10193 States= 1.73e+08 Transitions= 9.66e+10 Memory= 7588.693 t= 1.58e+05 R= 1e+03 +Depth= 10193 States= 1.74e+08 Transitions= 9.73e+10 Memory= 7614.865 t= 1.59e+05 R= 1e+03 +Depth= 10193 States= 1.75e+08 Transitions= 9.81e+10 Memory= 7640.354 t= 1.61e+05 R= 1e+03 +Depth= 10193 States= 1.76e+08 Transitions= 9.87e+10 Memory= 7665.744 t= 1.62e+05 R= 1e+03 +Depth= 10193 States= 1.77e+08 Transitions= 9.93e+10 Memory= 7691.135 t= 1.63e+05 R= 1e+03 +Depth= 10193 States= 1.78e+08 Transitions= 9.99e+10 Memory= 7718.479 t= 1.64e+05 R= 1e+03 +Depth= 10193 States= 1.79e+08 Transitions= 1.01e+11 Memory= 7743.772 t= 1.65e+05 R= 1e+03 +Depth= 10193 States= 1.8e+08 Transitions= 1.01e+11 Memory= 7769.651 t= 1.66e+05 R= 1e+03 +Depth= 10193 States= 1.81e+08 Transitions= 1.02e+11 Memory= 7795.920 t= 1.67e+05 R= 1e+03 +Depth= 10193 States= 1.82e+08 Transitions= 1.03e+11 Memory= 7819.651 t= 1.68e+05 R= 1e+03 +Depth= 10193 States= 1.83e+08 Transitions= 1.03e+11 Memory= 7846.897 t= 1.69e+05 R= 1e+03 +Depth= 10193 States= 1.84e+08 Transitions= 1.04e+11 Memory= 7874.631 t= 1.7e+05 R= 1e+03 +Depth= 10193 States= 1.85e+08 Transitions= 1.04e+11 Memory= 7900.510 t= 1.7e+05 R= 1e+03 +Depth= 10193 States= 1.86e+08 Transitions= 1.05e+11 Memory= 7925.803 t= 1.71e+05 R= 1e+03 +Depth= 10193 States= 1.87e+08 Transitions= 1.05e+11 Memory= 7955.295 t= 1.72e+05 R= 1e+03 +Depth= 10193 States= 1.88e+08 Transitions= 1.05e+11 Memory= 7983.420 t= 1.72e+05 R= 1e+03 +Depth= 10193 States= 1.89e+08 Transitions= 1.06e+11 Memory= 8010.373 t= 1.73e+05 R= 1e+03 +Depth= 10193 States= 1.9e+08 Transitions= 1.06e+11 Memory= 8037.424 t= 1.73e+05 R= 1e+03 +Depth= 10193 States= 1.91e+08 Transitions= 1.07e+11 Memory= 8061.838 t= 1.74e+05 R= 1e+03 +Depth= 10193 States= 1.92e+08 Transitions= 1.07e+11 Memory= 8087.326 t= 1.75e+05 R= 1e+03 +Depth= 10193 States= 1.93e+08 Transitions= 1.08e+11 Memory= 8115.256 t= 1.76e+05 R= 1e+03 +Depth= 10193 States= 1.94e+08 Transitions= 1.08e+11 Memory= 8142.307 t= 1.76e+05 R= 1e+03 +Depth= 10193 States= 1.95e+08 Transitions= 1.08e+11 Memory= 8168.479 t= 1.77e+05 R= 1e+03 +Depth= 10193 States= 1.96e+08 Transitions= 1.09e+11 Memory= 8194.846 t= 1.78e+05 R= 1e+03 +Depth= 10193 States= 1.97e+08 Transitions= 1.09e+11 Memory= 8221.311 t= 1.79e+05 R= 1e+03 +Depth= 10193 States= 1.98e+08 Transitions= 1.1e+11 Memory= 8249.240 t= 1.79e+05 R= 1e+03 +Depth= 10193 States= 1.99e+08 Transitions= 1.1e+11 Memory= 8273.264 t= 1.8e+05 R= 1e+03 +Depth= 10193 States= 2e+08 Transitions= 1.11e+11 Memory= 8295.920 t= 1.81e+05 R= 1e+03 +Depth= 10193 States= 2.01e+08 Transitions= 1.11e+11 Memory= 8320.529 t= 1.82e+05 R= 1e+03 +Depth= 10193 States= 2.02e+08 Transitions= 1.12e+11 Memory= 8345.236 t= 1.84e+05 R= 1e+03 +Depth= 10193 States= 2.03e+08 Transitions= 1.13e+11 Memory= 8379.026 t= 1.86e+05 R= 1e+03 +Depth= 10193 States= 2.04e+08 Transitions= 1.15e+11 Memory= 8403.635 t= 1.87e+05 R= 1e+03 +Depth= 10193 States= 2.05e+08 Transitions= 1.16e+11 Memory= 8427.951 t= 1.89e+05 R= 1e+03 +Depth= 10193 States= 2.06e+08 Transitions= 1.17e+11 Memory= 8452.463 t= 1.91e+05 R= 1e+03 +Depth= 10193 States= 2.07e+08 Transitions= 1.18e+11 Memory= 8472.483 t= 1.93e+05 R= 1e+03 +Depth= 10193 States= 2.08e+08 Transitions= 1.19e+11 Memory= 8493.283 t= 1.94e+05 R= 1e+03 +Depth= 10193 States= 2.09e+08 Transitions= 1.2e+11 Memory= 8513.205 t= 1.96e+05 R= 1e+03 +Depth= 10193 States= 2.1e+08 Transitions= 1.21e+11 Memory= 8532.053 t= 1.98e+05 R= 1e+03 +Depth= 10193 States= 2.11e+08 Transitions= 1.22e+11 Memory= 8555.588 t= 1.99e+05 R= 1e+03 +Depth= 10193 States= 2.12e+08 Transitions= 1.22e+11 Memory= 8582.932 t= 2e+05 R= 1e+03 +Depth= 10193 States= 2.13e+08 Transitions= 1.23e+11 Memory= 8607.834 t= 2.01e+05 R= 1e+03 +Depth= 10193 States= 2.14e+08 Transitions= 1.23e+11 Memory= 8633.029 t= 2.02e+05 R= 1e+03 +Depth= 10193 States= 2.15e+08 Transitions= 1.24e+11 Memory= 8656.858 t= 2.04e+05 R= 1e+03 +Depth= 10193 States= 2.16e+08 Transitions= 1.25e+11 Memory= 8679.904 t= 2.05e+05 R= 1e+03 +Depth= 10193 States= 2.17e+08 Transitions= 1.26e+11 Memory= 8707.932 t= 2.06e+05 R= 1e+03 +Depth= 10193 States= 2.18e+08 Transitions= 1.26e+11 Memory= 8736.740 t= 2.07e+05 R= 1e+03 +Depth= 10193 States= 2.19e+08 Transitions= 1.26e+11 Memory= 8762.229 t= 2.07e+05 R= 1e+03 +Depth= 10193 States= 2.2e+08 Transitions= 1.27e+11 Memory= 8785.764 t= 2.08e+05 R= 1e+03 +Depth= 10193 States= 2.21e+08 Transitions= 1.27e+11 Memory= 8812.619 t= 2.08e+05 R= 1e+03 +Depth= 10193 States= 2.22e+08 Transitions= 1.28e+11 Memory= 8837.326 t= 2.09e+05 R= 1e+03 +Depth= 10193 States= 2.23e+08 Transitions= 1.29e+11 Memory= 8859.006 t= 2.11e+05 R= 1e+03 +Depth= 10193 States= 2.24e+08 Transitions= 1.3e+11 Memory= 8884.104 t= 2.12e+05 R= 1e+03 +Depth= 10193 States= 2.25e+08 Transitions= 1.3e+11 Memory= 8909.006 t= 2.13e+05 R= 1e+03 +Depth= 10193 States= 2.26e+08 Transitions= 1.31e+11 Memory= 8934.787 t= 2.14e+05 R= 1e+03 +Depth= 10193 States= 2.27e+08 Transitions= 1.31e+11 Memory= 8961.057 t= 2.15e+05 R= 1e+03 +Depth= 10193 States= 2.28e+08 Transitions= 1.32e+11 Memory= 8985.666 t= 2.16e+05 R= 1e+03 +Depth= 10193 States= 2.29e+08 Transitions= 1.33e+11 Memory= 9010.080 t= 2.18e+05 R= 1e+03 +Depth= 10193 States= 2.3e+08 Transitions= 1.34e+11 Memory= 9034.885 t= 2.19e+05 R= 1e+03 +Depth= 10193 States= 2.31e+08 Transitions= 1.35e+11 Memory= 9058.127 t= 2.2e+05 R= 1e+03 +Depth= 10193 States= 2.32e+08 Transitions= 1.35e+11 Memory= 9081.760 t= 2.22e+05 R= 1e+03 +Depth= 10193 States= 2.33e+08 Transitions= 1.36e+11 Memory= 9106.467 t= 2.23e+05 R= 1e+03 +Depth= 10193 States= 2.34e+08 Transitions= 1.37e+11 Memory= 9130.295 t= 2.24e+05 R= 1e+03 +Depth= 10193 States= 2.35e+08 Transitions= 1.37e+11 Memory= 9159.690 t= 2.24e+05 R= 1e+03 +Depth= 10193 States= 2.36e+08 Transitions= 1.38e+11 Memory= 9185.471 t= 2.25e+05 R= 1e+03 +Depth= 10193 States= 2.37e+08 Transitions= 1.38e+11 Memory= 9207.639 t= 2.27e+05 R= 1e+03 +Depth= 10193 States= 2.38e+08 Transitions= 1.39e+11 Memory= 9232.443 t= 2.28e+05 R= 1e+03 +Depth= 10193 States= 2.39e+08 Transitions= 1.4e+11 Memory= 9258.811 t= 2.29e+05 R= 1e+03 +Depth= 10193 States= 2.4e+08 Transitions= 1.4e+11 Memory= 9287.619 t= 2.29e+05 R= 1e+03 +Depth= 10193 States= 2.41e+08 Transitions= 1.4e+11 Memory= 9317.209 t= 2.3e+05 R= 1e+03 +Depth= 10193 States= 2.42e+08 Transitions= 1.41e+11 Memory= 9343.088 t= 2.31e+05 R= 1e+03 +Depth= 10193 States= 2.43e+08 Transitions= 1.42e+11 Memory= 9365.354 t= 2.32e+05 R= 1e+03 +Depth= 10193 States= 2.44e+08 Transitions= 1.42e+11 Memory= 9389.182 t= 2.33e+05 R= 1e+03 +Depth= 10193 States= 2.45e+08 Transitions= 1.43e+11 Memory= 9415.256 t= 2.33e+05 R= 1e+03 +Depth= 10193 States= 2.46e+08 Transitions= 1.43e+11 Memory= 9438.596 t= 2.34e+05 R= 1e+03 +Depth= 10193 States= 2.47e+08 Transitions= 1.44e+11 Memory= 9466.623 t= 2.35e+05 R= 1e+03 +Depth= 10193 States= 2.48e+08 Transitions= 1.44e+11 Memory= 9495.041 t= 2.36e+05 R= 1e+03 +Depth= 10193 States= 2.49e+08 Transitions= 1.45e+11 Memory= 9519.651 t= 2.37e+05 R= 1e+03 +Depth= 10193 States= 2.5e+08 Transitions= 1.46e+11 Memory= 9549.436 t= 2.38e+05 R= 1e+03 +Depth= 10193 States= 2.51e+08 Transitions= 1.46e+11 Memory= 9575.022 t= 2.39e+05 R= 1e+03 +Depth= 10193 States= 2.52e+08 Transitions= 1.46e+11 Memory= 9598.752 t= 2.39e+05 R= 1e+03 +Depth= 10193 States= 2.53e+08 Transitions= 1.47e+11 Memory= 9626.584 t= 2.41e+05 R= 1e+03 +Depth= 10193 States= 2.54e+08 Transitions= 1.48e+11 Memory= 9655.588 t= 2.42e+05 R= 1e+03 +Depth= 10193 States= 2.55e+08 Transitions= 1.48e+11 Memory= 9679.904 t= 2.42e+05 R= 1e+03 +Depth= 10193 States= 2.56e+08 Transitions= 1.49e+11 Memory= 9707.834 t= 2.43e+05 R= 1e+03 +Depth= 10193 States= 2.57e+08 Transitions= 1.49e+11 Memory= 9735.568 t= 2.45e+05 R= 1e+03 +Depth= 10193 States= 2.58e+08 Transitions= 1.5e+11 Memory= 9760.861 t= 2.45e+05 R= 1e+03 +Depth= 10193 States= 2.59e+08 Transitions= 1.5e+11 Memory= 9785.959 t= 2.46e+05 R= 1e+03 +Depth= 10193 States= 2.6e+08 Transitions= 1.5e+11 Memory= 9814.182 t= 2.46e+05 R= 1e+03 +Depth= 10193 States= 2.61e+08 Transitions= 1.51e+11 Memory= 9841.428 t= 2.48e+05 R= 1e+03 +Depth= 10193 States= 2.62e+08 Transitions= 1.52e+11 Memory= 9867.014 t= 2.48e+05 R= 1e+03 +Depth= 10193 States= 2.63e+08 Transitions= 1.52e+11 Memory= 9894.846 t= 2.49e+05 R= 1e+03 +Depth= 10193 States= 2.64e+08 Transitions= 1.53e+11 Memory= 9921.604 t= 2.5e+05 R= 1e+03 +Depth= 10193 States= 2.65e+08 Transitions= 1.53e+11 Memory= 9947.287 t= 2.51e+05 R= 1e+03 +Depth= 10193 States= 2.66e+08 Transitions= 1.54e+11 Memory= 9973.361 t= 2.51e+05 R= 1e+03 +Depth= 10193 States= 2.67e+08 Transitions= 1.54e+11 Memory= 9999.240 t= 2.52e+05 R= 1e+03 +Depth= 10193 States= 2.68e+08 Transitions= 1.55e+11 Memory= 10026.584 t= 2.53e+05 R= 1e+03 +Depth= 10193 States= 2.69e+08 Transitions= 1.55e+11 Memory= 10054.416 t= 2.54e+05 R= 1e+03 +Depth= 10193 States= 2.7e+08 Transitions= 1.56e+11 Memory= 10077.658 t= 2.56e+05 R= 1e+03 +Depth= 10193 States= 2.71e+08 Transitions= 1.56e+11 Memory= 10108.615 t= 2.56e+05 R= 1e+03 +Depth= 10193 States= 2.72e+08 Transitions= 1.57e+11 Memory= 10134.494 t= 2.57e+05 R= 1e+03 +Depth= 10193 States= 2.73e+08 Transitions= 1.57e+11 Memory= 10157.639 t= 2.57e+05 R= 1e+03 +Depth= 10193 States= 2.74e+08 Transitions= 1.58e+11 Memory= 10183.127 t= 2.58e+05 R= 1e+03 +Depth= 10193 States= 2.75e+08 Transitions= 1.58e+11 Memory= 10212.522 t= 2.59e+05 R= 1e+03 +Depth= 10193 States= 2.76e+08 Transitions= 1.59e+11 Memory= 10238.596 t= 2.6e+05 R= 1e+03 +Depth= 10193 States= 2.77e+08 Transitions= 1.59e+11 Memory= 10265.647 t= 2.61e+05 R= 1e+03 +Depth= 10193 States= 2.78e+08 Transitions= 1.6e+11 Memory= 10289.963 t= 2.62e+05 R= 1e+03 +Depth= 10193 States= 2.79e+08 Transitions= 1.6e+11 Memory= 10316.233 t= 2.62e+05 R= 1e+03 +Depth= 10193 States= 2.8e+08 Transitions= 1.61e+11 Memory= 10344.651 t= 2.63e+05 R= 1e+03 +Depth= 10193 States= 2.81e+08 Transitions= 1.61e+11 Memory= 10375.315 t= 2.64e+05 R= 1e+03 +Depth= 10193 States= 2.82e+08 Transitions= 1.62e+11 Memory= 10398.654 t= 2.65e+05 R= 1e+03 +Depth= 10193 States= 2.83e+08 Transitions= 1.62e+11 Memory= 10429.611 t= 2.66e+05 R= 1e+03 +Depth= 10193 States= 2.84e+08 Transitions= 1.63e+11 Memory= 10455.588 t= 2.67e+05 R= 1e+03 +Depth= 10193 States= 2.85e+08 Transitions= 1.63e+11 Memory= 10478.830 t= 2.67e+05 R= 1e+03 +Depth= 10193 States= 2.86e+08 Transitions= 1.64e+11 Memory= 10506.760 t= 2.68e+05 R= 1e+03 +Depth= 10193 States= 2.87e+08 Transitions= 1.64e+11 Memory= 10532.443 t= 2.69e+05 R= 1e+03 +Depth= 10193 States= 2.88e+08 Transitions= 1.65e+11 Memory= 10561.252 t= 2.7e+05 R= 1e+03 +Depth= 10193 States= 2.89e+08 Transitions= 1.65e+11 Memory= 10584.983 t= 2.71e+05 R= 1e+03 +Depth= 10193 States= 2.9e+08 Transitions= 1.66e+11 Memory= 10611.252 t= 2.71e+05 R= 1e+03 +Depth= 10193 States= 2.91e+08 Transitions= 1.66e+11 Memory= 10637.033 t= 2.72e+05 R= 1e+03 +Depth= 10193 States= 2.92e+08 Transitions= 1.66e+11 Memory= 10668.674 t= 2.73e+05 R= 1e+03 +Depth= 10193 States= 2.93e+08 Transitions= 1.67e+11 Memory= 10692.111 t= 2.73e+05 R= 1e+03 +Depth= 10193 States= 2.94e+08 Transitions= 1.67e+11 Memory= 10718.283 t= 2.74e+05 R= 1e+03 +Depth= 10193 States= 2.95e+08 Transitions= 1.68e+11 Memory= 10744.748 t= 2.75e+05 R= 1e+03 +Depth= 10193 States= 2.96e+08 Transitions= 1.68e+11 Memory= 10770.920 t= 2.76e+05 R= 1e+03 +Depth= 10193 States= 2.97e+08 Transitions= 1.69e+11 Memory= 10795.139 t= 2.76e+05 R= 1e+03 +Depth= 10193 States= 2.98e+08 Transitions= 1.69e+11 Memory= 10819.358 t= 2.77e+05 R= 1e+03 +Depth= 10193 States= 2.99e+08 Transitions= 1.7e+11 Memory= 10841.721 t= 2.79e+05 R= 1e+03 +Depth= 10193 States= 3e+08 Transitions= 1.71e+11 Memory= 10867.209 t= 2.79e+05 R= 1e+03 +Depth= 10193 States= 3.01e+08 Transitions= 1.71e+11 Memory= 10893.283 t= 2.8e+05 R= 1e+03 +Depth= 10193 States= 3.02e+08 Transitions= 1.72e+11 Memory= 10916.233 t= 2.81e+05 R= 1e+03 +Depth= 10193 States= 3.03e+08 Transitions= 1.73e+11 Memory= 10940.549 t= 2.83e+05 R= 1e+03 +Depth= 10193 States= 3.04e+08 Transitions= 1.73e+11 Memory= 10971.408 t= 2.84e+05 R= 1e+03 +Depth= 10193 States= 3.05e+08 Transitions= 1.74e+11 Memory= 10996.897 t= 2.84e+05 R= 1e+03 +Depth= 10193 States= 3.06e+08 Transitions= 1.74e+11 Memory= 11023.850 t= 2.85e+05 R= 1e+03 +Depth= 10193 States= 3.07e+08 Transitions= 1.75e+11 Memory= 11049.436 t= 2.86e+05 R= 1e+03 +Depth= 10193 States= 3.08e+08 Transitions= 1.75e+11 Memory= 11077.854 t= 2.87e+05 R= 1e+03 +Depth= 10193 States= 3.09e+08 Transitions= 1.76e+11 Memory= 11104.514 t= 2.88e+05 R= 1e+03 +Depth= 10193 States= 3.1e+08 Transitions= 1.77e+11 Memory= 11125.119 t= 2.89e+05 R= 1e+03 +Depth= 10193 States= 3.11e+08 Transitions= 1.77e+11 Memory= 11146.897 t= 2.91e+05 R= 1e+03 +Depth= 10193 States= 3.12e+08 Transitions= 1.78e+11 Memory= 11173.264 t= 2.92e+05 R= 1e+03 +Depth= 10193 States= 3.13e+08 Transitions= 1.79e+11 Memory= 11198.654 t= 2.93e+05 R= 1e+03 +Depth= 10193 States= 3.14e+08 Transitions= 1.8e+11 Memory= 11224.045 t= 2.94e+05 R= 1e+03 +Depth= 10193 States= 3.15e+08 Transitions= 1.8e+11 Memory= 11248.850 t= 2.95e+05 R= 1e+03 +Depth= 10193 States= 3.16e+08 Transitions= 1.81e+11 Memory= 11274.729 t= 2.96e+05 R= 1e+03 +Depth= 10193 States= 3.17e+08 Transitions= 1.82e+11 Memory= 11300.315 t= 2.97e+05 R= 1e+03 +Depth= 10193 States= 3.18e+08 Transitions= 1.82e+11 Memory= 11326.193 t= 2.98e+05 R= 1e+03 +Depth= 10193 States= 3.19e+08 Transitions= 1.83e+11 Memory= 11351.584 t= 2.99e+05 R= 1e+03 +Depth= 10193 States= 3.2e+08 Transitions= 1.83e+11 Memory= 11377.561 t= 3e+05 R= 1e+03 +Depth= 10193 States= 3.21e+08 Transitions= 1.84e+11 Memory= 11400.510 t= 3.01e+05 R= 1e+03 +Depth= 10193 States= 3.22e+08 Transitions= 1.85e+11 Memory= 11425.803 t= 3.02e+05 R= 1e+03 +Depth= 10193 States= 3.23e+08 Transitions= 1.85e+11 Memory= 11453.928 t= 3.03e+05 R= 1e+03 +Depth= 10193 States= 3.24e+08 Transitions= 1.86e+11 Memory= 11478.635 t= 3.04e+05 R= 1e+03 +Depth= 10193 States= 3.25e+08 Transitions= 1.87e+11 Memory= 11503.830 t= 3.05e+05 R= 1e+03 +Depth= 10193 States= 3.26e+08 Transitions= 1.87e+11 Memory= 11528.830 t= 3.06e+05 R= 1e+03 +Depth= 10193 States= 3.27e+08 Transitions= 1.88e+11 Memory= 11554.416 t= 3.07e+05 R= 1e+03 +Depth= 10193 States= 3.28e+08 Transitions= 1.89e+11 Memory= 11580.686 t= 3.08e+05 R= 1e+03 +Depth= 10193 States= 3.29e+08 Transitions= 1.89e+11 Memory= 11606.467 t= 3.09e+05 R= 1e+03 +Depth= 10193 States= 3.3e+08 Transitions= 1.9e+11 Memory= 11632.346 t= 3.1e+05 R= 1e+03 +Depth= 10193 States= 3.31e+08 Transitions= 1.9e+11 Memory= 11658.420 t= 3.11e+05 R= 1e+03 +Depth= 10193 States= 3.32e+08 Transitions= 1.91e+11 Memory= 11681.662 t= 3.13e+05 R= 1e+03 +Depth= 10193 States= 3.33e+08 Transitions= 1.92e+11 Memory= 11708.713 t= 3.13e+05 R= 1e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 10193, errors: 0 +1.8778602e+08 states, stored (3.33973e+08 visited) +1.9159243e+11 states, matched +1.919264e+11 transitions (= visited+matched) +1.0808296e+12 atomic steps +hash conflicts: 3.7119584e+10 (resolved) + +Stats on memory usage (in Megabytes): +20774.057 equivalent memory usage for states (stored*(State-vector + overhead)) + 9228.353 actual memory usage for states (compression: 44.42%) + state-vector as stored = 16 byte + 36 byte overhead + 2048.000 memory used for hash table (-w28) + 457.764 memory used for DFS stack (-m10000000) + 1.576 memory lost to fragmentation +11732.541 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 618104 5194 3828 2 2 ] +unreached in proctype urcu_reader + line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 104, "(1)" + line 249, "pan.___", state 112, "(1)" + line 253, "pan.___", state 124, "(1)" + line 257, "pan.___", state 132, "(1)" + line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 223, "(1)" + line 434, "pan.___", state 253, "(1)" + line 438, "pan.___", state 266, "(1)" + line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 359, "(1)" + line 434, "pan.___", state 389, "(1)" + line 438, "pan.___", state 402, "(1)" + line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 488, "(1)" + line 434, "pan.___", state 518, "(1)" + line 438, "pan.___", state 531, "(1)" + line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 556, "(1)" + line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 557, "else" + line 407, "pan.___", state 560, "(1)" + line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 570, "(1)" + line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 571, "else" + line 411, "pan.___", state 574, "(1)" + line 411, "pan.___", state 575, "(1)" + line 411, "pan.___", state 575, "(1)" + line 409, "pan.___", state 580, "((i<1))" + line 409, "pan.___", state 580, "((i>=1))" + line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 588, "(1)" + line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 589, "else" + line 416, "pan.___", state 592, "(1)" + line 416, "pan.___", state 593, "(1)" + line 416, "pan.___", state 593, "(1)" + line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 602, "(1)" + line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 603, "else" + line 420, "pan.___", state 606, "(1)" + line 420, "pan.___", state 607, "(1)" + line 420, "pan.___", state 607, "(1)" + line 418, "pan.___", state 612, "((i<2))" + line 418, "pan.___", state 612, "((i>=2))" + line 425, "pan.___", state 619, "(1)" + line 425, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 620, "else" + line 425, "pan.___", state 623, "(1)" + line 425, "pan.___", state 624, "(1)" + line 425, "pan.___", state 624, "(1)" + line 429, "pan.___", state 632, "(1)" + line 429, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 633, "else" + line 429, "pan.___", state 636, "(1)" + line 429, "pan.___", state 637, "(1)" + line 429, "pan.___", state 637, "(1)" + line 427, "pan.___", state 642, "((i<1))" + line 427, "pan.___", state 642, "((i>=1))" + line 434, "pan.___", state 649, "(1)" + line 434, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 650, "else" + line 434, "pan.___", state 653, "(1)" + line 434, "pan.___", state 654, "(1)" + line 434, "pan.___", state 654, "(1)" + line 438, "pan.___", state 662, "(1)" + line 438, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 663, "else" + line 438, "pan.___", state 666, "(1)" + line 438, "pan.___", state 667, "(1)" + line 438, "pan.___", state 667, "(1)" + line 436, "pan.___", state 672, "((i<2))" + line 436, "pan.___", state 672, "((i>=2))" + line 446, "pan.___", state 676, "(1)" + line 446, "pan.___", state 676, "(1)" + line 687, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" + line 687, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 687, "pan.___", state 681, "(1)" + line 407, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 753, "(1)" + line 434, "pan.___", state 783, "(1)" + line 438, "pan.___", state 796, "(1)" + line 407, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 889, "(1)" + line 434, "pan.___", state 919, "(1)" + line 438, "pan.___", state 932, "(1)" + line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 955, "(1)" + line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 956, "else" + line 407, "pan.___", state 959, "(1)" + line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 969, "(1)" + line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 970, "else" + line 411, "pan.___", state 973, "(1)" + line 411, "pan.___", state 974, "(1)" + line 411, "pan.___", state 974, "(1)" + line 409, "pan.___", state 979, "((i<1))" + line 409, "pan.___", state 979, "((i>=1))" + line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 987, "(1)" + line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 988, "else" + line 416, "pan.___", state 991, "(1)" + line 416, "pan.___", state 992, "(1)" + line 416, "pan.___", state 992, "(1)" + line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 1001, "(1)" + line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 1002, "else" + line 420, "pan.___", state 1005, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 418, "pan.___", state 1011, "((i<2))" + line 418, "pan.___", state 1011, "((i>=2))" + line 425, "pan.___", state 1018, "(1)" + line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 1019, "else" + line 425, "pan.___", state 1022, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 429, "pan.___", state 1031, "(1)" + line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 1032, "else" + line 429, "pan.___", state 1035, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 427, "pan.___", state 1041, "((i<1))" + line 427, "pan.___", state 1041, "((i>=1))" + line 434, "pan.___", state 1048, "(1)" + line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 1049, "else" + line 434, "pan.___", state 1052, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 438, "pan.___", state 1061, "(1)" + line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 1062, "else" + line 438, "pan.___", state 1065, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 436, "pan.___", state 1071, "((i<2))" + line 436, "pan.___", state 1071, "((i>=2))" + line 446, "pan.___", state 1075, "(1)" + line 446, "pan.___", state 1075, "(1)" + line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1149, "(1)" + line 434, "pan.___", state 1179, "(1)" + line 438, "pan.___", state 1192, "(1)" + line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1281, "(1)" + line 434, "pan.___", state 1311, "(1)" + line 438, "pan.___", state 1324, "(1)" + line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1414, "(1)" + line 434, "pan.___", state 1444, "(1)" + line 438, "pan.___", state 1457, "(1)" + line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1543, "(1)" + line 434, "pan.___", state 1573, "(1)" + line 438, "pan.___", state 1586, "(1)" + line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1677, "(1)" + line 434, "pan.___", state 1707, "(1)" + line 438, "pan.___", state 1720, "(1)" + line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1806, "(1)" + line 434, "pan.___", state 1836, "(1)" + line 438, "pan.___", state 1849, "(1)" + line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1938, "(1)" + line 434, "pan.___", state 1968, "(1)" + line 438, "pan.___", state 1981, "(1)" + line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2074, "(1)" + line 434, "pan.___", state 2104, "(1)" + line 438, "pan.___", state 2117, "(1)" + line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2203, "(1)" + line 434, "pan.___", state 2233, "(1)" + line 438, "pan.___", state 2246, "(1)" + line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 2271, "(1)" + line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 2272, "else" + line 407, "pan.___", state 2275, "(1)" + line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 2286, "else" + line 411, "pan.___", state 2289, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 409, "pan.___", state 2295, "((i<1))" + line 409, "pan.___", state 2295, "((i>=1))" + line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 2303, "(1)" + line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 2304, "else" + line 416, "pan.___", state 2307, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 2317, "(1)" + line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 2318, "else" + line 420, "pan.___", state 2321, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 418, "pan.___", state 2327, "((i<2))" + line 418, "pan.___", state 2327, "((i>=2))" + line 425, "pan.___", state 2334, "(1)" + line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 2335, "else" + line 425, "pan.___", state 2338, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 429, "pan.___", state 2347, "(1)" + line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 2348, "else" + line 429, "pan.___", state 2351, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 427, "pan.___", state 2357, "((i<1))" + line 427, "pan.___", state 2357, "((i>=1))" + line 434, "pan.___", state 2364, "(1)" + line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 2365, "else" + line 434, "pan.___", state 2368, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 438, "pan.___", state 2377, "(1)" + line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 2378, "else" + line 438, "pan.___", state 2381, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 436, "pan.___", state 2387, "((i<2))" + line 436, "pan.___", state 2387, "((i>=2))" + line 446, "pan.___", state 2391, "(1)" + line 446, "pan.___", state 2391, "(1)" + line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" + line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 734, "pan.___", state 2396, "(1)" + line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2468, "(1)" + line 434, "pan.___", state 2498, "(1)" + line 438, "pan.___", state 2511, "(1)" + line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2603, "(1)" + line 434, "pan.___", state 2633, "(1)" + line 438, "pan.___", state 2646, "(1)" + line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2732, "(1)" + line 434, "pan.___", state 2762, "(1)" + line 438, "pan.___", state 2775, "(1)" + line 245, "pan.___", state 2808, "(1)" + line 253, "pan.___", state 2828, "(1)" + line 257, "pan.___", state 2836, "(1)" + line 245, "pan.___", state 2851, "(1)" + line 253, "pan.___", state 2871, "(1)" + line 257, "pan.___", state 2879, "(1)" + line 929, "pan.___", state 2896, "-end-" + (245 of 2896 states) +unreached in proctype urcu_writer + line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 425, "pan.___", state 110, "(1)" + line 429, "pan.___", state 123, "(1)" + line 434, "pan.___", state 140, "(1)" + line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 407, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 303, "(1)" + line 429, "pan.___", state 316, "(1)" + line 434, "pan.___", state 333, "(1)" + line 438, "pan.___", state 346, "(1)" + line 411, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 447, "(1)" + line 434, "pan.___", state 464, "(1)" + line 438, "pan.___", state 477, "(1)" + line 411, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 586, "(1)" + line 434, "pan.___", state 603, "(1)" + line 438, "pan.___", state 616, "(1)" + line 411, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 715, "(1)" + line 434, "pan.___", state 732, "(1)" + line 438, "pan.___", state 745, "(1)" + line 411, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 846, "(1)" + line 434, "pan.___", state 863, "(1)" + line 438, "pan.___", state 876, "(1)" + line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 955, "(1)" + line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 978, "(1)" + line 249, "pan.___", state 986, "(1)" + line 253, "pan.___", state 998, "(1)" + line 257, "pan.___", state 1006, "(1)" + line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1084, "(1)" + line 249, "pan.___", state 1092, "(1)" + line 253, "pan.___", state 1104, "(1)" + line 257, "pan.___", state 1112, "(1)" + line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1176, "(1)" + line 249, "pan.___", state 1184, "(1)" + line 253, "pan.___", state 1196, "(1)" + line 257, "pan.___", state 1204, "(1)" + line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1282, "(1)" + line 249, "pan.___", state 1290, "(1)" + line 253, "pan.___", state 1302, "(1)" + line 257, "pan.___", state 1310, "(1)" + line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1374, "(1)" + line 249, "pan.___", state 1382, "(1)" + line 253, "pan.___", state 1394, "(1)" + line 257, "pan.___", state 1402, "(1)" + line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1480, "(1)" + line 249, "pan.___", state 1488, "(1)" + line 253, "pan.___", state 1500, "(1)" + line 257, "pan.___", state 1508, "(1)" + line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1572, "(1)" + line 249, "pan.___", state 1580, "(1)" + line 253, "pan.___", state 1592, "(1)" + line 257, "pan.___", state 1600, "(1)" + line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1678, "(1)" + line 249, "pan.___", state 1686, "(1)" + line 253, "pan.___", state 1698, "(1)" + line 257, "pan.___", state 1706, "(1)" + line 1304, "pan.___", state 1722, "-end-" + (103 of 1722 states) +unreached in proctype :init: + (0 of 28 states) +unreached in proctype :never: + line 1369, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 3.14e+05 seconds +pan: rate 1063.7031 states/second +pan: avg transition delay 1.6359e-06 usec +cp .input.spin urcu_progress_writer.spin.input +cp .input.spin.trail urcu_progress_writer.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi-compress' diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.spin.input b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.spin.input new file mode 100644 index 0000000..e7f1d2d --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer.spin.input @@ -0,0 +1,1340 @@ +#define WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer_error.define b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-compress/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/.input.spin b/urcu-controldataflow-alpha-ipi-progress-minimal/.input.spin new file mode 100644 index 0000000..21196d4 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/.input.spin @@ -0,0 +1,1156 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/DEFINES b/urcu-controldataflow-alpha-ipi-progress-minimal/DEFINES new file mode 100644 index 0000000..32299c1 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/DEFINES @@ -0,0 +1,18 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/Makefile b/urcu-controldataflow-alpha-ipi-progress-minimal/Makefile new file mode 100644 index 0000000..abf201c --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/Makefile @@ -0,0 +1,171 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 -DCOLLAPSE +#CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.log b/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.log new file mode 100644 index 0000000..f1445e4 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.log @@ -0,0 +1,266 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 3250 States= 1e+06 Transitions= 2.74e+08 Memory= 500.529 t= 357 R= 3e+03 +Depth= 3250 States= 2e+06 Transitions= 5.69e+08 Memory= 537.248 t= 774 R= 3e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 72 byte, depth reached 3250, errors: 0 + 2668047 states, stored +7.3166567e+08 states, matched +7.3433372e+08 transitions (= stored+matched) +4.2954757e+09 atomic steps +hash conflicts: 4.8630608e+08 (resolved) + +Stats on memory usage (in Megabytes): + 254.445 equivalent memory usage for states (stored*(State-vector + overhead)) + 94.790 actual memory usage for states (compression: 37.25%) + state-vector as stored = 9 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 560.490 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 25912 2128 1970 2 ] +unreached in proctype urcu_reader + line 267, ".input.spin", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 275, ".input.spin", state 77, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 86, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 102, "(1)" + line 248, ".input.spin", state 110, "(1)" + line 252, ".input.spin", state 122, "(1)" + line 256, ".input.spin", state 130, "(1)" + line 403, ".input.spin", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 412, ".input.spin", state 188, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 202, "cache_dirty_rcu_data[i] = 0" + line 421, ".input.spin", state 221, "(1)" + line 430, ".input.spin", state 251, "(1)" + line 434, ".input.spin", state 264, "(1)" + line 613, ".input.spin", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 403, ".input.spin", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 412, ".input.spin", state 324, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 338, "cache_dirty_rcu_data[i] = 0" + line 421, ".input.spin", state 357, "(1)" + line 430, ".input.spin", state 387, "(1)" + line 434, ".input.spin", state 400, "(1)" + line 403, ".input.spin", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 412, ".input.spin", state 453, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 467, "cache_dirty_rcu_data[i] = 0" + line 421, ".input.spin", state 486, "(1)" + line 430, ".input.spin", state 516, "(1)" + line 434, ".input.spin", state 529, "(1)" + line 403, ".input.spin", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 403, ".input.spin", state 554, "(1)" + line 403, ".input.spin", state 555, "(cache_dirty_urcu_gp_ctr)" + line 403, ".input.spin", state 555, "else" + line 403, ".input.spin", state 558, "(1)" + line 407, ".input.spin", state 566, "cache_dirty_urcu_active_readers = 0" + line 407, ".input.spin", state 568, "(1)" + line 407, ".input.spin", state 569, "(cache_dirty_urcu_active_readers)" + line 407, ".input.spin", state 569, "else" + line 407, ".input.spin", state 572, "(1)" + line 407, ".input.spin", state 573, "(1)" + line 407, ".input.spin", state 573, "(1)" + line 405, ".input.spin", state 578, "((i<1))" + line 405, ".input.spin", state 578, "((i>=1))" + line 412, ".input.spin", state 584, "cache_dirty_rcu_ptr = 0" + line 412, ".input.spin", state 586, "(1)" + line 412, ".input.spin", state 587, "(cache_dirty_rcu_ptr)" + line 412, ".input.spin", state 587, "else" + line 412, ".input.spin", state 590, "(1)" + line 412, ".input.spin", state 591, "(1)" + line 412, ".input.spin", state 591, "(1)" + line 416, ".input.spin", state 598, "cache_dirty_rcu_data[i] = 0" + line 416, ".input.spin", state 600, "(1)" + line 416, ".input.spin", state 601, "(cache_dirty_rcu_data[i])" + line 416, ".input.spin", state 601, "else" + line 416, ".input.spin", state 604, "(1)" + line 416, ".input.spin", state 605, "(1)" + line 416, ".input.spin", state 605, "(1)" + line 414, ".input.spin", state 610, "((i<2))" + line 414, ".input.spin", state 610, "((i>=2))" + line 421, ".input.spin", state 617, "(1)" + line 421, ".input.spin", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 421, ".input.spin", state 618, "else" + line 421, ".input.spin", state 621, "(1)" + line 421, ".input.spin", state 622, "(1)" + line 421, ".input.spin", state 622, "(1)" + line 425, ".input.spin", state 630, "(1)" + line 425, ".input.spin", state 631, "(!(cache_dirty_urcu_active_readers))" + line 425, ".input.spin", state 631, "else" + line 425, ".input.spin", state 634, "(1)" + line 425, ".input.spin", state 635, "(1)" + line 425, ".input.spin", state 635, "(1)" + line 423, ".input.spin", state 640, "((i<1))" + line 423, ".input.spin", state 640, "((i>=1))" + line 430, ".input.spin", state 647, "(1)" + line 430, ".input.spin", state 648, "(!(cache_dirty_rcu_ptr))" + line 430, ".input.spin", state 648, "else" + line 430, ".input.spin", state 651, "(1)" + line 430, ".input.spin", state 652, "(1)" + line 430, ".input.spin", state 652, "(1)" + line 434, ".input.spin", state 660, "(1)" + line 434, ".input.spin", state 661, "(!(cache_dirty_rcu_data[i]))" + line 434, ".input.spin", state 661, "else" + line 434, ".input.spin", state 664, "(1)" + line 434, ".input.spin", state 665, "(1)" + line 434, ".input.spin", state 665, "(1)" + line 432, ".input.spin", state 670, "((i<2))" + line 432, ".input.spin", state 670, "((i>=2))" + line 442, ".input.spin", state 674, "(1)" + line 442, ".input.spin", state 674, "(1)" + line 613, ".input.spin", state 677, "cached_urcu_active_readers = (tmp+1)" + line 613, ".input.spin", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 613, ".input.spin", state 679, "(1)" + line 403, ".input.spin", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 412, ".input.spin", state 718, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 732, "cache_dirty_rcu_data[i] = 0" + line 421, ".input.spin", state 751, "(1)" + line 430, ".input.spin", state 781, "(1)" + line 434, ".input.spin", state 794, "(1)" + line 403, ".input.spin", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 412, ".input.spin", state 853, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 867, "cache_dirty_rcu_data[i] = 0" + line 421, ".input.spin", state 886, "(1)" + line 430, ".input.spin", state 916, "(1)" + line 434, ".input.spin", state 929, "(1)" + line 403, ".input.spin", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 412, ".input.spin", state 982, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 996, "cache_dirty_rcu_data[i] = 0" + line 421, ".input.spin", state 1015, "(1)" + line 430, ".input.spin", state 1045, "(1)" + line 434, ".input.spin", state 1058, "(1)" + line 244, ".input.spin", state 1091, "(1)" + line 252, ".input.spin", state 1111, "(1)" + line 256, ".input.spin", state 1119, "(1)" + line 747, ".input.spin", state 1136, "-end-" + (91 of 1136 states) +unreached in proctype urcu_writer + line 403, ".input.spin", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 407, ".input.spin", state 59, "cache_dirty_urcu_active_readers = 0" + line 412, ".input.spin", state 77, "cache_dirty_rcu_ptr = 0" + line 421, ".input.spin", state 110, "(1)" + line 425, ".input.spin", state 123, "(1)" + line 430, ".input.spin", state 140, "(1)" + line 267, ".input.spin", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 185, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 198, "cache_dirty_rcu_ptr = 0" + line 403, ".input.spin", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 407, ".input.spin", state 252, "cache_dirty_urcu_active_readers = 0" + line 412, ".input.spin", state 270, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 284, "cache_dirty_rcu_data[i] = 0" + line 421, ".input.spin", state 303, "(1)" + line 425, ".input.spin", state 316, "(1)" + line 430, ".input.spin", state 333, "(1)" + line 434, ".input.spin", state 346, "(1)" + line 407, ".input.spin", state 383, "cache_dirty_urcu_active_readers = 0" + line 412, ".input.spin", state 401, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 415, "cache_dirty_rcu_data[i] = 0" + line 425, ".input.spin", state 447, "(1)" + line 430, ".input.spin", state 464, "(1)" + line 434, ".input.spin", state 477, "(1)" + line 407, ".input.spin", state 522, "cache_dirty_urcu_active_readers = 0" + line 412, ".input.spin", state 540, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 554, "cache_dirty_rcu_data[i] = 0" + line 425, ".input.spin", state 586, "(1)" + line 430, ".input.spin", state 603, "(1)" + line 434, ".input.spin", state 616, "(1)" + line 407, ".input.spin", state 651, "cache_dirty_urcu_active_readers = 0" + line 412, ".input.spin", state 669, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 683, "cache_dirty_rcu_data[i] = 0" + line 425, ".input.spin", state 715, "(1)" + line 430, ".input.spin", state 732, "(1)" + line 434, ".input.spin", state 745, "(1)" + line 407, ".input.spin", state 782, "cache_dirty_urcu_active_readers = 0" + line 412, ".input.spin", state 800, "cache_dirty_rcu_ptr = 0" + line 416, ".input.spin", state 814, "cache_dirty_rcu_data[i] = 0" + line 425, ".input.spin", state 846, "(1)" + line 430, ".input.spin", state 863, "(1)" + line 434, ".input.spin", state 876, "(1)" + line 267, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 940, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 955, "(1)" + line 279, ".input.spin", state 962, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 978, "(1)" + line 248, ".input.spin", state 986, "(1)" + line 252, ".input.spin", state 998, "(1)" + line 256, ".input.spin", state 1006, "(1)" + line 267, ".input.spin", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1046, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1059, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1068, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1084, "(1)" + line 248, ".input.spin", state 1092, "(1)" + line 252, ".input.spin", state 1104, "(1)" + line 256, ".input.spin", state 1112, "(1)" + line 271, ".input.spin", state 1138, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1151, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1160, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1176, "(1)" + line 248, ".input.spin", state 1184, "(1)" + line 252, ".input.spin", state 1196, "(1)" + line 256, ".input.spin", state 1204, "(1)" + line 267, ".input.spin", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1244, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1257, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1266, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1282, "(1)" + line 248, ".input.spin", state 1290, "(1)" + line 252, ".input.spin", state 1302, "(1)" + line 256, ".input.spin", state 1310, "(1)" + line 271, ".input.spin", state 1336, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1349, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1358, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1374, "(1)" + line 248, ".input.spin", state 1382, "(1)" + line 252, ".input.spin", state 1394, "(1)" + line 256, ".input.spin", state 1402, "(1)" + line 267, ".input.spin", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1442, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1455, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1464, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1480, "(1)" + line 248, ".input.spin", state 1488, "(1)" + line 252, ".input.spin", state 1500, "(1)" + line 256, ".input.spin", state 1508, "(1)" + line 271, ".input.spin", state 1534, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1547, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1556, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1572, "(1)" + line 248, ".input.spin", state 1580, "(1)" + line 252, ".input.spin", state 1592, "(1)" + line 256, ".input.spin", state 1600, "(1)" + line 267, ".input.spin", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1640, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1653, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1662, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1678, "(1)" + line 248, ".input.spin", state 1686, "(1)" + line 252, ".input.spin", state 1698, "(1)" + line 256, ".input.spin", state 1706, "(1)" + line 1122, ".input.spin", state 1722, "-end-" + (103 of 1722 states) +unreached in proctype :init: + (0 of 26 states) + +pan: elapsed time 1.01e+03 seconds +pan: rate 2639.775 states/second +pan: avg transition delay 1.3764e-06 usec +cp .input.spin asserts.spin.input +cp .input.spin.trail asserts.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.spin.input new file mode 100644 index 0000000..21196d4 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/asserts.spin.input @@ -0,0 +1,1156 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/references.txt b/urcu-controldataflow-alpha-ipi-progress-minimal/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.sh b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.spin b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.spin new file mode 100644 index 0000000..db5ab0e --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu.spin @@ -0,0 +1,1138 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.log new file mode 100644 index 0000000..dd99ae5 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.log @@ -0,0 +1,277 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1178) +Depth= 3880 States= 1e+06 Transitions= 2.74e+08 Memory= 512.932 t= 435 R= 2e+03 +Depth= 3880 States= 2e+06 Transitions= 5.69e+08 Memory= 559.318 t= 929 R= 2e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 3880, errors: 0 + 2668047 states, stored +7.3167024e+08 states, matched +7.3433829e+08 transitions (= stored+matched) +4.2954757e+09 atomic steps +hash conflicts: 4.8818996e+08 (resolved) + +Stats on memory usage (in Megabytes): + 295.156 equivalent memory usage for states (stored*(State-vector + overhead)) + 124.292 actual memory usage for states (compression: 42.11%) + state-vector as stored = 13 byte + 36 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 589.983 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 25912 2128 1970 2 1 ] +unreached in proctype urcu_reader + line 267, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 275, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 102, "(1)" + line 248, "pan.___", state 110, "(1)" + line 252, "pan.___", state 122, "(1)" + line 256, "pan.___", state 130, "(1)" + line 403, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 221, "(1)" + line 430, "pan.___", state 251, "(1)" + line 434, "pan.___", state 264, "(1)" + line 613, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 403, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 357, "(1)" + line 430, "pan.___", state 387, "(1)" + line 434, "pan.___", state 400, "(1)" + line 403, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 486, "(1)" + line 430, "pan.___", state 516, "(1)" + line 434, "pan.___", state 529, "(1)" + line 403, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 403, "pan.___", state 554, "(1)" + line 403, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" + line 403, "pan.___", state 555, "else" + line 403, "pan.___", state 558, "(1)" + line 407, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" + line 407, "pan.___", state 568, "(1)" + line 407, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" + line 407, "pan.___", state 569, "else" + line 407, "pan.___", state 572, "(1)" + line 407, "pan.___", state 573, "(1)" + line 407, "pan.___", state 573, "(1)" + line 405, "pan.___", state 578, "((i<1))" + line 405, "pan.___", state 578, "((i>=1))" + line 412, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" + line 412, "pan.___", state 586, "(1)" + line 412, "pan.___", state 587, "(cache_dirty_rcu_ptr)" + line 412, "pan.___", state 587, "else" + line 412, "pan.___", state 590, "(1)" + line 412, "pan.___", state 591, "(1)" + line 412, "pan.___", state 591, "(1)" + line 416, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" + line 416, "pan.___", state 600, "(1)" + line 416, "pan.___", state 601, "(cache_dirty_rcu_data[i])" + line 416, "pan.___", state 601, "else" + line 416, "pan.___", state 604, "(1)" + line 416, "pan.___", state 605, "(1)" + line 416, "pan.___", state 605, "(1)" + line 414, "pan.___", state 610, "((i<2))" + line 414, "pan.___", state 610, "((i>=2))" + line 421, "pan.___", state 617, "(1)" + line 421, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 421, "pan.___", state 618, "else" + line 421, "pan.___", state 621, "(1)" + line 421, "pan.___", state 622, "(1)" + line 421, "pan.___", state 622, "(1)" + line 425, "pan.___", state 630, "(1)" + line 425, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" + line 425, "pan.___", state 631, "else" + line 425, "pan.___", state 634, "(1)" + line 425, "pan.___", state 635, "(1)" + line 425, "pan.___", state 635, "(1)" + line 423, "pan.___", state 640, "((i<1))" + line 423, "pan.___", state 640, "((i>=1))" + line 430, "pan.___", state 647, "(1)" + line 430, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" + line 430, "pan.___", state 648, "else" + line 430, "pan.___", state 651, "(1)" + line 430, "pan.___", state 652, "(1)" + line 430, "pan.___", state 652, "(1)" + line 434, "pan.___", state 660, "(1)" + line 434, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" + line 434, "pan.___", state 661, "else" + line 434, "pan.___", state 664, "(1)" + line 434, "pan.___", state 665, "(1)" + line 434, "pan.___", state 665, "(1)" + line 432, "pan.___", state 670, "((i<2))" + line 432, "pan.___", state 670, "((i>=2))" + line 442, "pan.___", state 674, "(1)" + line 442, "pan.___", state 674, "(1)" + line 613, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" + line 613, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 613, "pan.___", state 679, "(1)" + line 403, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 751, "(1)" + line 430, "pan.___", state 781, "(1)" + line 434, "pan.___", state 794, "(1)" + line 403, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 886, "(1)" + line 430, "pan.___", state 916, "(1)" + line 434, "pan.___", state 929, "(1)" + line 403, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 1015, "(1)" + line 430, "pan.___", state 1045, "(1)" + line 434, "pan.___", state 1058, "(1)" + line 244, "pan.___", state 1091, "(1)" + line 252, "pan.___", state 1111, "(1)" + line 256, "pan.___", state 1119, "(1)" + line 747, "pan.___", state 1136, "-end-" + (91 of 1136 states) +unreached in proctype urcu_writer + line 403, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 110, "(1)" + line 425, "pan.___", state 123, "(1)" + line 430, "pan.___", state 140, "(1)" + line 267, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 403, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 303, "(1)" + line 425, "pan.___", state 316, "(1)" + line 430, "pan.___", state 333, "(1)" + line 434, "pan.___", state 346, "(1)" + line 407, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 447, "(1)" + line 430, "pan.___", state 464, "(1)" + line 434, "pan.___", state 477, "(1)" + line 407, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 586, "(1)" + line 430, "pan.___", state 603, "(1)" + line 434, "pan.___", state 616, "(1)" + line 407, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 715, "(1)" + line 430, "pan.___", state 732, "(1)" + line 434, "pan.___", state 745, "(1)" + line 407, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 846, "(1)" + line 430, "pan.___", state 863, "(1)" + line 434, "pan.___", state 876, "(1)" + line 267, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 955, "(1)" + line 279, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 978, "(1)" + line 248, "pan.___", state 986, "(1)" + line 252, "pan.___", state 998, "(1)" + line 256, "pan.___", state 1006, "(1)" + line 267, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1084, "(1)" + line 248, "pan.___", state 1092, "(1)" + line 252, "pan.___", state 1104, "(1)" + line 256, "pan.___", state 1112, "(1)" + line 271, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1176, "(1)" + line 248, "pan.___", state 1184, "(1)" + line 252, "pan.___", state 1196, "(1)" + line 256, "pan.___", state 1204, "(1)" + line 267, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1282, "(1)" + line 248, "pan.___", state 1290, "(1)" + line 252, "pan.___", state 1302, "(1)" + line 256, "pan.___", state 1310, "(1)" + line 271, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1374, "(1)" + line 248, "pan.___", state 1382, "(1)" + line 252, "pan.___", state 1394, "(1)" + line 256, "pan.___", state 1402, "(1)" + line 267, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1480, "(1)" + line 248, "pan.___", state 1488, "(1)" + line 252, "pan.___", state 1500, "(1)" + line 256, "pan.___", state 1508, "(1)" + line 271, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1572, "(1)" + line 248, "pan.___", state 1580, "(1)" + line 252, "pan.___", state 1592, "(1)" + line 256, "pan.___", state 1600, "(1)" + line 267, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1678, "(1)" + line 248, "pan.___", state 1686, "(1)" + line 252, "pan.___", state 1698, "(1)" + line 256, "pan.___", state 1706, "(1)" + line 1122, "pan.___", state 1722, "-end-" + (103 of 1722 states) +unreached in proctype :init: + (0 of 26 states) +unreached in proctype :never: + line 1183, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.21e+03 seconds +pan: rate 2200.5963 states/second +pan: avg transition delay 1.651e-06 usec +cp .input.spin urcu_free.spin.input +cp .input.spin.trail urcu_free.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.ltl b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.spin.input new file mode 100644 index 0000000..21196d4 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free.spin.input @@ -0,0 +1,1156 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_nested.define b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.define b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.log new file mode 100644 index 0000000..7fe9c9a --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.log @@ -0,0 +1,628 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1179) +pan: claim violated! (at depth 1246) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 3190, errors: 1 + 124498 states, stored + 15198533 states, matched + 15323031 transitions (= stored+matched) + 86866126 atomic steps +hash conflicts: 473423 (resolved) + +Stats on memory usage (in Megabytes): + 13.773 equivalent memory usage for states (stored*(State-vector + overhead)) + 6.400 actual memory usage for states (compression: 46.47%) + state-vector as stored = 18 byte + 36 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 472.111 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 2572 1245 179 2 2 ] +unreached in proctype urcu_reader + line 713, "pan.___", state 12, "((i<1))" + line 713, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 104, "(1)" + line 249, "pan.___", state 112, "(1)" + line 253, "pan.___", state 124, "(1)" + line 257, "pan.___", state 132, "(1)" + line 404, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 223, "(1)" + line 431, "pan.___", state 253, "(1)" + line 435, "pan.___", state 266, "(1)" + line 614, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 404, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 359, "(1)" + line 431, "pan.___", state 389, "(1)" + line 435, "pan.___", state 402, "(1)" + line 404, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 488, "(1)" + line 431, "pan.___", state 518, "(1)" + line 435, "pan.___", state 531, "(1)" + line 404, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 556, "(1)" + line 404, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 557, "else" + line 404, "pan.___", state 560, "(1)" + line 408, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 570, "(1)" + line 408, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 571, "else" + line 408, "pan.___", state 574, "(1)" + line 408, "pan.___", state 575, "(1)" + line 408, "pan.___", state 575, "(1)" + line 406, "pan.___", state 580, "((i<1))" + line 406, "pan.___", state 580, "((i>=1))" + line 413, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 588, "(1)" + line 413, "pan.___", state 589, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 589, "else" + line 413, "pan.___", state 592, "(1)" + line 413, "pan.___", state 593, "(1)" + line 413, "pan.___", state 593, "(1)" + line 417, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 602, "(1)" + line 417, "pan.___", state 603, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 603, "else" + line 417, "pan.___", state 606, "(1)" + line 417, "pan.___", state 607, "(1)" + line 417, "pan.___", state 607, "(1)" + line 415, "pan.___", state 612, "((i<2))" + line 415, "pan.___", state 612, "((i>=2))" + line 422, "pan.___", state 619, "(1)" + line 422, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 620, "else" + line 422, "pan.___", state 623, "(1)" + line 422, "pan.___", state 624, "(1)" + line 422, "pan.___", state 624, "(1)" + line 426, "pan.___", state 632, "(1)" + line 426, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 633, "else" + line 426, "pan.___", state 636, "(1)" + line 426, "pan.___", state 637, "(1)" + line 426, "pan.___", state 637, "(1)" + line 424, "pan.___", state 642, "((i<1))" + line 424, "pan.___", state 642, "((i>=1))" + line 431, "pan.___", state 649, "(1)" + line 431, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 650, "else" + line 431, "pan.___", state 653, "(1)" + line 431, "pan.___", state 654, "(1)" + line 431, "pan.___", state 654, "(1)" + line 435, "pan.___", state 662, "(1)" + line 435, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 663, "else" + line 435, "pan.___", state 666, "(1)" + line 435, "pan.___", state 667, "(1)" + line 435, "pan.___", state 667, "(1)" + line 433, "pan.___", state 672, "((i<2))" + line 433, "pan.___", state 672, "((i>=2))" + line 443, "pan.___", state 676, "(1)" + line 443, "pan.___", state 676, "(1)" + line 614, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" + line 614, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 614, "pan.___", state 681, "(1)" + line 404, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 753, "(1)" + line 431, "pan.___", state 783, "(1)" + line 435, "pan.___", state 796, "(1)" + line 404, "pan.___", state 823, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 855, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 869, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 888, "(1)" + line 431, "pan.___", state 918, "(1)" + line 435, "pan.___", state 931, "(1)" + line 404, "pan.___", state 952, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 984, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 998, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 1017, "(1)" + line 431, "pan.___", state 1047, "(1)" + line 435, "pan.___", state 1060, "(1)" + line 245, "pan.___", state 1093, "(1)" + line 253, "pan.___", state 1113, "(1)" + line 257, "pan.___", state 1121, "(1)" + line 748, "pan.___", state 1138, "-end-" + (92 of 1138 states) +unreached in proctype urcu_writer + line 837, "pan.___", state 12, "((i<1))" + line 837, "pan.___", state 12, "((i>=1))" + line 404, "pan.___", state 47, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 53, "(1)" + line 408, "pan.___", state 61, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 67, "(1)" + line 408, "pan.___", state 68, "(1)" + line 408, "pan.___", state 68, "(1)" + line 406, "pan.___", state 73, "((i<1))" + line 406, "pan.___", state 73, "((i>=1))" + line 413, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 85, "(1)" + line 413, "pan.___", state 86, "(1)" + line 413, "pan.___", state 86, "(1)" + line 417, "pan.___", state 99, "(1)" + line 417, "pan.___", state 100, "(1)" + line 417, "pan.___", state 100, "(1)" + line 415, "pan.___", state 105, "((i<2))" + line 415, "pan.___", state 105, "((i>=2))" + line 422, "pan.___", state 112, "(1)" + line 422, "pan.___", state 113, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 113, "else" + line 422, "pan.___", state 116, "(1)" + line 422, "pan.___", state 117, "(1)" + line 422, "pan.___", state 117, "(1)" + line 426, "pan.___", state 125, "(1)" + line 426, "pan.___", state 126, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 126, "else" + line 426, "pan.___", state 129, "(1)" + line 426, "pan.___", state 130, "(1)" + line 426, "pan.___", state 130, "(1)" + line 424, "pan.___", state 135, "((i<1))" + line 424, "pan.___", state 135, "((i>=1))" + line 431, "pan.___", state 142, "(1)" + line 431, "pan.___", state 143, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 143, "else" + line 431, "pan.___", state 146, "(1)" + line 431, "pan.___", state 147, "(1)" + line 431, "pan.___", state 147, "(1)" + line 435, "pan.___", state 155, "(1)" + line 435, "pan.___", state 156, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 156, "else" + line 435, "pan.___", state 159, "(1)" + line 435, "pan.___", state 160, "(1)" + line 435, "pan.___", state 160, "(1)" + line 433, "pan.___", state 165, "((i<2))" + line 433, "pan.___", state 165, "((i>=2))" + line 443, "pan.___", state 169, "(1)" + line 443, "pan.___", state 169, "(1)" + line 268, "pan.___", state 178, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 187, "cache_dirty_urcu_active_readers = 0" + line 270, "pan.___", state 195, "((i<1))" + line 270, "pan.___", state 195, "((i>=1))" + line 276, "pan.___", state 200, "cache_dirty_rcu_ptr = 0" + line 907, "pan.___", state 228, "old_data = cached_rcu_ptr" + line 918, "pan.___", state 232, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" + line 404, "pan.___", state 240, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 246, "(1)" + line 408, "pan.___", state 254, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 260, "(1)" + line 408, "pan.___", state 261, "(1)" + line 408, "pan.___", state 261, "(1)" + line 406, "pan.___", state 266, "((i<1))" + line 406, "pan.___", state 266, "((i>=1))" + line 413, "pan.___", state 274, "(1)" + line 413, "pan.___", state 275, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 275, "else" + line 413, "pan.___", state 278, "(1)" + line 413, "pan.___", state 279, "(1)" + line 413, "pan.___", state 279, "(1)" + line 417, "pan.___", state 286, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 292, "(1)" + line 417, "pan.___", state 293, "(1)" + line 417, "pan.___", state 293, "(1)" + line 415, "pan.___", state 298, "((i<2))" + line 415, "pan.___", state 298, "((i>=2))" + line 422, "pan.___", state 305, "(1)" + line 422, "pan.___", state 306, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 306, "else" + line 422, "pan.___", state 309, "(1)" + line 422, "pan.___", state 310, "(1)" + line 422, "pan.___", state 310, "(1)" + line 426, "pan.___", state 318, "(1)" + line 426, "pan.___", state 319, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 319, "else" + line 426, "pan.___", state 322, "(1)" + line 426, "pan.___", state 323, "(1)" + line 426, "pan.___", state 323, "(1)" + line 424, "pan.___", state 328, "((i<1))" + line 424, "pan.___", state 328, "((i>=1))" + line 431, "pan.___", state 335, "(1)" + line 431, "pan.___", state 336, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 336, "else" + line 431, "pan.___", state 339, "(1)" + line 431, "pan.___", state 340, "(1)" + line 431, "pan.___", state 340, "(1)" + line 435, "pan.___", state 348, "(1)" + line 435, "pan.___", state 349, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 349, "else" + line 435, "pan.___", state 352, "(1)" + line 435, "pan.___", state 353, "(1)" + line 435, "pan.___", state 353, "(1)" + line 433, "pan.___", state 358, "((i<2))" + line 433, "pan.___", state 358, "((i>=2))" + line 443, "pan.___", state 362, "(1)" + line 443, "pan.___", state 362, "(1)" + line 404, "pan.___", state 373, "(1)" + line 404, "pan.___", state 374, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 374, "else" + line 404, "pan.___", state 377, "(1)" + line 408, "pan.___", state 385, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 391, "(1)" + line 408, "pan.___", state 392, "(1)" + line 408, "pan.___", state 392, "(1)" + line 406, "pan.___", state 397, "((i<1))" + line 406, "pan.___", state 397, "((i>=1))" + line 413, "pan.___", state 403, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 409, "(1)" + line 413, "pan.___", state 410, "(1)" + line 413, "pan.___", state 410, "(1)" + line 417, "pan.___", state 417, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 423, "(1)" + line 417, "pan.___", state 424, "(1)" + line 417, "pan.___", state 424, "(1)" + line 415, "pan.___", state 429, "((i<2))" + line 415, "pan.___", state 429, "((i>=2))" + line 422, "pan.___", state 436, "(1)" + line 422, "pan.___", state 437, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 437, "else" + line 422, "pan.___", state 440, "(1)" + line 422, "pan.___", state 441, "(1)" + line 422, "pan.___", state 441, "(1)" + line 426, "pan.___", state 449, "(1)" + line 426, "pan.___", state 450, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 450, "else" + line 426, "pan.___", state 453, "(1)" + line 426, "pan.___", state 454, "(1)" + line 426, "pan.___", state 454, "(1)" + line 424, "pan.___", state 459, "((i<1))" + line 424, "pan.___", state 459, "((i>=1))" + line 431, "pan.___", state 466, "(1)" + line 431, "pan.___", state 467, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 467, "else" + line 431, "pan.___", state 470, "(1)" + line 431, "pan.___", state 471, "(1)" + line 431, "pan.___", state 471, "(1)" + line 435, "pan.___", state 479, "(1)" + line 435, "pan.___", state 480, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 480, "else" + line 435, "pan.___", state 483, "(1)" + line 435, "pan.___", state 484, "(1)" + line 435, "pan.___", state 484, "(1)" + line 433, "pan.___", state 489, "((i<2))" + line 433, "pan.___", state 489, "((i>=2))" + line 443, "pan.___", state 493, "(1)" + line 443, "pan.___", state 493, "(1)" + line 972, "pan.___", state 504, "_proc_urcu_writer = (_proc_urcu_writer&~((1<<9)))" + line 977, "pan.___", state 505, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<8)|(1<<7))))" + line 404, "pan.___", state 510, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 516, "(1)" + line 408, "pan.___", state 524, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 530, "(1)" + line 408, "pan.___", state 531, "(1)" + line 408, "pan.___", state 531, "(1)" + line 406, "pan.___", state 536, "((i<1))" + line 406, "pan.___", state 536, "((i>=1))" + line 413, "pan.___", state 542, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 548, "(1)" + line 413, "pan.___", state 549, "(1)" + line 413, "pan.___", state 549, "(1)" + line 417, "pan.___", state 556, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 562, "(1)" + line 417, "pan.___", state 563, "(1)" + line 417, "pan.___", state 563, "(1)" + line 415, "pan.___", state 568, "((i<2))" + line 415, "pan.___", state 568, "((i>=2))" + line 422, "pan.___", state 575, "(1)" + line 422, "pan.___", state 576, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 576, "else" + line 422, "pan.___", state 579, "(1)" + line 422, "pan.___", state 580, "(1)" + line 422, "pan.___", state 580, "(1)" + line 426, "pan.___", state 588, "(1)" + line 426, "pan.___", state 589, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 589, "else" + line 426, "pan.___", state 592, "(1)" + line 426, "pan.___", state 593, "(1)" + line 426, "pan.___", state 593, "(1)" + line 424, "pan.___", state 598, "((i<1))" + line 424, "pan.___", state 598, "((i>=1))" + line 431, "pan.___", state 605, "(1)" + line 431, "pan.___", state 606, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 606, "else" + line 431, "pan.___", state 609, "(1)" + line 431, "pan.___", state 610, "(1)" + line 431, "pan.___", state 610, "(1)" + line 435, "pan.___", state 618, "(1)" + line 435, "pan.___", state 619, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 619, "else" + line 435, "pan.___", state 622, "(1)" + line 435, "pan.___", state 623, "(1)" + line 435, "pan.___", state 623, "(1)" + line 443, "pan.___", state 632, "(1)" + line 443, "pan.___", state 632, "(1)" + line 404, "pan.___", state 639, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 653, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 671, "cache_dirty_rcu_ptr = 0" + line 422, "pan.___", state 704, "(1)" + line 426, "pan.___", state 717, "(1)" + line 431, "pan.___", state 734, "(1)" + line 435, "pan.___", state 747, "(1)" + line 408, "pan.___", state 784, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 802, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 816, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 848, "(1)" + line 431, "pan.___", state 865, "(1)" + line 435, "pan.___", state 878, "(1)" + line 1054, "pan.___", state 905, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" + line 268, "pan.___", state 933, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 935, "(1)" + line 272, "pan.___", state 942, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 944, "(1)" + line 272, "pan.___", state 945, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 945, "else" + line 270, "pan.___", state 950, "((i<1))" + line 270, "pan.___", state 950, "((i>=1))" + line 276, "pan.___", state 955, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 957, "(1)" + line 276, "pan.___", state 958, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 958, "else" + line 280, "pan.___", state 964, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 966, "(1)" + line 280, "pan.___", state 967, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 967, "else" + line 278, "pan.___", state 972, "((i<2))" + line 278, "pan.___", state 972, "((i>=2))" + line 245, "pan.___", state 980, "(1)" + line 249, "pan.___", state 988, "(1)" + line 249, "pan.___", state 989, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 989, "else" + line 247, "pan.___", state 994, "((i<1))" + line 247, "pan.___", state 994, "((i>=1))" + line 253, "pan.___", state 1000, "(1)" + line 253, "pan.___", state 1001, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1001, "else" + line 257, "pan.___", state 1008, "(1)" + line 257, "pan.___", state 1009, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1009, "else" + line 262, "pan.___", state 1018, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1018, "else" + line 1108, "pan.___", state 1034, "((i<1))" + line 1108, "pan.___", state 1034, "((i>=1))" + line 268, "pan.___", state 1039, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1041, "(1)" + line 272, "pan.___", state 1048, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1050, "(1)" + line 272, "pan.___", state 1051, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1051, "else" + line 270, "pan.___", state 1056, "((i<1))" + line 270, "pan.___", state 1056, "((i>=1))" + line 276, "pan.___", state 1061, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1063, "(1)" + line 276, "pan.___", state 1064, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1064, "else" + line 280, "pan.___", state 1070, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1072, "(1)" + line 280, "pan.___", state 1073, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1073, "else" + line 278, "pan.___", state 1078, "((i<2))" + line 278, "pan.___", state 1078, "((i>=2))" + line 245, "pan.___", state 1086, "(1)" + line 249, "pan.___", state 1094, "(1)" + line 249, "pan.___", state 1095, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1095, "else" + line 247, "pan.___", state 1100, "((i<1))" + line 247, "pan.___", state 1100, "((i>=1))" + line 253, "pan.___", state 1106, "(1)" + line 253, "pan.___", state 1107, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1107, "else" + line 257, "pan.___", state 1114, "(1)" + line 257, "pan.___", state 1115, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1115, "else" + line 262, "pan.___", state 1124, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1124, "else" + line 295, "pan.___", state 1126, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1126, "else" + line 1108, "pan.___", state 1127, "(cache_dirty_urcu_gp_ctr)" + line 1108, "pan.___", state 1127, "else" + line 268, "pan.___", state 1131, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1133, "(1)" + line 272, "pan.___", state 1140, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1142, "(1)" + line 272, "pan.___", state 1143, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1143, "else" + line 270, "pan.___", state 1148, "((i<1))" + line 270, "pan.___", state 1148, "((i>=1))" + line 276, "pan.___", state 1153, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1155, "(1)" + line 276, "pan.___", state 1156, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1156, "else" + line 280, "pan.___", state 1162, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1164, "(1)" + line 280, "pan.___", state 1165, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1165, "else" + line 278, "pan.___", state 1170, "((i<2))" + line 278, "pan.___", state 1170, "((i>=2))" + line 245, "pan.___", state 1178, "(1)" + line 249, "pan.___", state 1186, "(1)" + line 249, "pan.___", state 1187, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1187, "else" + line 247, "pan.___", state 1192, "((i<1))" + line 247, "pan.___", state 1192, "((i>=1))" + line 253, "pan.___", state 1198, "(1)" + line 253, "pan.___", state 1199, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1199, "else" + line 257, "pan.___", state 1206, "(1)" + line 257, "pan.___", state 1207, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1207, "else" + line 262, "pan.___", state 1216, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1216, "else" + line 1112, "pan.___", state 1219, "i = 0" + line 1112, "pan.___", state 1221, "reader_barrier = 1" + line 1112, "pan.___", state 1232, "((i<1))" + line 1112, "pan.___", state 1232, "((i>=1))" + line 268, "pan.___", state 1237, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1239, "(1)" + line 272, "pan.___", state 1246, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1248, "(1)" + line 272, "pan.___", state 1249, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1249, "else" + line 270, "pan.___", state 1254, "((i<1))" + line 270, "pan.___", state 1254, "((i>=1))" + line 276, "pan.___", state 1259, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1261, "(1)" + line 276, "pan.___", state 1262, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1262, "else" + line 280, "pan.___", state 1268, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1270, "(1)" + line 280, "pan.___", state 1271, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1271, "else" + line 278, "pan.___", state 1276, "((i<2))" + line 278, "pan.___", state 1276, "((i>=2))" + line 245, "pan.___", state 1284, "(1)" + line 249, "pan.___", state 1292, "(1)" + line 249, "pan.___", state 1293, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1293, "else" + line 247, "pan.___", state 1298, "((i<1))" + line 247, "pan.___", state 1298, "((i>=1))" + line 253, "pan.___", state 1304, "(1)" + line 253, "pan.___", state 1305, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1305, "else" + line 257, "pan.___", state 1312, "(1)" + line 257, "pan.___", state 1313, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1313, "else" + line 262, "pan.___", state 1322, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1322, "else" + line 295, "pan.___", state 1324, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1324, "else" + line 1112, "pan.___", state 1325, "(cache_dirty_urcu_gp_ctr)" + line 1112, "pan.___", state 1325, "else" + line 272, "pan.___", state 1338, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1351, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1360, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1376, "(1)" + line 249, "pan.___", state 1384, "(1)" + line 253, "pan.___", state 1396, "(1)" + line 257, "pan.___", state 1404, "(1)" + line 268, "pan.___", state 1435, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1444, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1457, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1466, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1482, "(1)" + line 249, "pan.___", state 1490, "(1)" + line 253, "pan.___", state 1502, "(1)" + line 257, "pan.___", state 1510, "(1)" + line 268, "pan.___", state 1527, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1529, "(1)" + line 272, "pan.___", state 1536, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1538, "(1)" + line 272, "pan.___", state 1539, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1539, "else" + line 270, "pan.___", state 1544, "((i<1))" + line 270, "pan.___", state 1544, "((i>=1))" + line 276, "pan.___", state 1549, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1551, "(1)" + line 276, "pan.___", state 1552, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1552, "else" + line 280, "pan.___", state 1558, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1560, "(1)" + line 280, "pan.___", state 1561, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1561, "else" + line 278, "pan.___", state 1566, "((i<2))" + line 278, "pan.___", state 1566, "((i>=2))" + line 245, "pan.___", state 1574, "(1)" + line 249, "pan.___", state 1582, "(1)" + line 249, "pan.___", state 1583, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1583, "else" + line 247, "pan.___", state 1588, "((i<1))" + line 247, "pan.___", state 1588, "((i>=1))" + line 253, "pan.___", state 1594, "(1)" + line 253, "pan.___", state 1595, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1595, "else" + line 257, "pan.___", state 1602, "(1)" + line 257, "pan.___", state 1603, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1603, "else" + line 262, "pan.___", state 1612, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1612, "else" + line 1119, "pan.___", state 1615, "i = 0" + line 1119, "pan.___", state 1617, "reader_barrier = 1" + line 1119, "pan.___", state 1628, "((i<1))" + line 1119, "pan.___", state 1628, "((i>=1))" + line 268, "pan.___", state 1633, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1635, "(1)" + line 272, "pan.___", state 1642, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1644, "(1)" + line 272, "pan.___", state 1645, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1645, "else" + line 270, "pan.___", state 1650, "((i<1))" + line 270, "pan.___", state 1650, "((i>=1))" + line 276, "pan.___", state 1655, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1657, "(1)" + line 276, "pan.___", state 1658, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1658, "else" + line 280, "pan.___", state 1664, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1666, "(1)" + line 280, "pan.___", state 1667, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1667, "else" + line 278, "pan.___", state 1672, "((i<2))" + line 278, "pan.___", state 1672, "((i>=2))" + line 245, "pan.___", state 1680, "(1)" + line 249, "pan.___", state 1688, "(1)" + line 249, "pan.___", state 1689, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1689, "else" + line 247, "pan.___", state 1694, "((i<1))" + line 247, "pan.___", state 1694, "((i>=1))" + line 253, "pan.___", state 1700, "(1)" + line 253, "pan.___", state 1701, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1701, "else" + line 257, "pan.___", state 1708, "(1)" + line 257, "pan.___", state 1709, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1709, "else" + line 262, "pan.___", state 1718, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1718, "else" + line 295, "pan.___", state 1720, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1720, "else" + line 1119, "pan.___", state 1721, "(cache_dirty_urcu_gp_ctr)" + line 1119, "pan.___", state 1721, "else" + line 1123, "pan.___", state 1724, "-end-" + (312 of 1724 states) +unreached in proctype :init: + line 1138, "pan.___", state 11, "((i<1))" + line 1138, "pan.___", state 11, "((i>=1))" + (1 of 26 states) +unreached in proctype :never: + line 1184, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 23.7 seconds +pan: rate 5259.7381 states/second +pan: avg transition delay 1.5447e-06 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..af4dcf5 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input @@ -0,0 +1,1157 @@ +#define NO_MB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input.trail b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..37c6ecd --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,1249 @@ +-2:3:-2 +-4:-4:-4 +1:0:2890 +2:2:1138 +3:2:1143 +4:2:1147 +5:2:1155 +6:2:1159 +7:2:1163 +8:0:2890 +9:1:0 +10:1:5 +11:1:9 +12:1:17 +13:1:21 +14:1:25 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+++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.log new file mode 100644 index 0000000..93939dd --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.log @@ -0,0 +1,329 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1179) +pan: claim violated! (at depth 1476) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 3979, errors: 1 + 430584 states, stored + 99483765 states, matched + 99914349 transitions (= stored+matched) +5.7035561e+08 atomic steps +hash conflicts: 13587432 (resolved) + +Stats on memory usage (in Megabytes): + 47.634 equivalent memory usage for states (stored*(State-vector + overhead)) + 20.652 actual memory usage for states (compression: 43.36%) + state-vector as stored = 14 byte + 36 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 486.369 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 7914 682 569 2 2 ] +unreached in proctype urcu_reader + line 713, "pan.___", state 12, "((i<1))" + line 713, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 102, "(1)" + line 249, "pan.___", state 110, "(1)" + line 253, "pan.___", state 122, "(1)" + line 257, "pan.___", state 130, "(1)" + line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 221, "(1)" + line 431, "pan.___", state 251, "(1)" + line 435, "pan.___", state 264, "(1)" + line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 357, "(1)" + line 431, "pan.___", state 387, "(1)" + line 435, "pan.___", state 400, "(1)" + line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 486, "(1)" + line 431, "pan.___", state 516, "(1)" + line 435, "pan.___", state 529, "(1)" + line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 554, "(1)" + line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 555, "else" + line 404, "pan.___", state 558, "(1)" + line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 568, "(1)" + line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 569, "else" + line 408, "pan.___", state 572, "(1)" + line 408, "pan.___", state 573, "(1)" + line 408, "pan.___", state 573, "(1)" + line 406, "pan.___", state 578, "((i<1))" + line 406, "pan.___", state 578, "((i>=1))" + line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 586, "(1)" + line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 587, "else" + line 413, "pan.___", state 590, "(1)" + line 413, "pan.___", state 591, "(1)" + line 413, "pan.___", state 591, "(1)" + line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 600, "(1)" + line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 601, "else" + line 417, "pan.___", state 604, "(1)" + line 417, "pan.___", state 605, "(1)" + line 417, "pan.___", state 605, "(1)" + line 415, "pan.___", state 610, "((i<2))" + line 415, "pan.___", state 610, "((i>=2))" + line 422, "pan.___", state 617, "(1)" + line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 618, "else" + line 422, "pan.___", state 621, "(1)" + line 422, "pan.___", state 622, "(1)" + line 422, "pan.___", state 622, "(1)" + line 426, "pan.___", state 630, "(1)" + line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 631, "else" + line 426, "pan.___", state 634, "(1)" + line 426, "pan.___", state 635, "(1)" + line 426, "pan.___", state 635, "(1)" + line 424, "pan.___", state 640, "((i<1))" + line 424, "pan.___", state 640, "((i>=1))" + line 431, "pan.___", state 647, "(1)" + line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 648, "else" + line 431, "pan.___", state 651, "(1)" + line 431, "pan.___", state 652, "(1)" + line 431, "pan.___", state 652, "(1)" + line 435, "pan.___", state 660, "(1)" + line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 661, "else" + line 435, "pan.___", state 664, "(1)" + line 435, "pan.___", state 665, "(1)" + line 435, "pan.___", state 665, "(1)" + line 433, "pan.___", state 670, "((i<2))" + line 433, "pan.___", state 670, "((i>=2))" + line 443, "pan.___", state 674, "(1)" + line 443, "pan.___", state 674, "(1)" + line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" + line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 614, "pan.___", state 679, "(1)" + line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 751, "(1)" + line 431, "pan.___", state 781, "(1)" + line 435, "pan.___", state 794, "(1)" + line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 886, "(1)" + line 431, "pan.___", state 916, "(1)" + line 435, "pan.___", state 929, "(1)" + line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 1015, "(1)" + line 431, "pan.___", state 1045, "(1)" + line 435, "pan.___", state 1058, "(1)" + line 404, "pan.___", state 1091, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 1123, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 1137, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 1156, "(1)" + line 431, "pan.___", state 1186, "(1)" + line 435, "pan.___", state 1199, "(1)" + line 748, "pan.___", state 1220, "-end-" + (95 of 1220 states) +unreached in proctype urcu_writer + line 837, "pan.___", state 12, "((i<1))" + line 837, "pan.___", state 12, "((i>=1))" + line 404, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 51, "(1)" + line 408, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 65, "(1)" + line 408, "pan.___", state 66, "(1)" + line 408, "pan.___", state 66, "(1)" + line 406, "pan.___", state 71, "((i<1))" + line 406, "pan.___", state 71, "((i>=1))" + line 413, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 83, "(1)" + line 413, "pan.___", state 84, "(1)" + line 413, "pan.___", state 84, "(1)" + line 417, "pan.___", state 97, "(1)" + line 417, "pan.___", state 98, "(1)" + line 417, "pan.___", state 98, "(1)" + line 415, "pan.___", state 103, "((i<2))" + line 415, "pan.___", state 103, "((i>=2))" + line 422, "pan.___", state 110, "(1)" + line 422, "pan.___", state 111, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 111, "else" + line 422, "pan.___", state 114, "(1)" + line 422, "pan.___", state 115, "(1)" + line 422, "pan.___", state 115, "(1)" + line 426, "pan.___", state 123, "(1)" + line 426, "pan.___", state 124, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 124, "else" + line 426, "pan.___", state 127, "(1)" + line 426, "pan.___", state 128, "(1)" + line 426, "pan.___", state 128, "(1)" + line 424, "pan.___", state 133, "((i<1))" + line 424, "pan.___", state 133, "((i>=1))" + line 431, "pan.___", state 140, "(1)" + line 431, "pan.___", state 141, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 141, "else" + line 431, "pan.___", state 144, "(1)" + line 431, "pan.___", state 145, "(1)" + line 431, "pan.___", state 145, "(1)" + line 435, "pan.___", state 153, "(1)" + line 435, "pan.___", state 154, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 154, "else" + line 435, "pan.___", state 157, "(1)" + line 435, "pan.___", state 158, "(1)" + line 435, "pan.___", state 158, "(1)" + line 433, "pan.___", state 163, "((i<2))" + line 433, "pan.___", state 163, "((i>=2))" + line 443, "pan.___", state 167, "(1)" + line 443, "pan.___", state 167, "(1)" + line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 404, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 303, "(1)" + line 426, "pan.___", state 316, "(1)" + line 431, "pan.___", state 333, "(1)" + line 435, "pan.___", state 346, "(1)" + line 408, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 447, "(1)" + line 431, "pan.___", state 464, "(1)" + line 435, "pan.___", state 477, "(1)" + line 408, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 586, "(1)" + line 431, "pan.___", state 603, "(1)" + line 435, "pan.___", state 616, "(1)" + line 408, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 715, "(1)" + line 431, "pan.___", state 732, "(1)" + line 435, "pan.___", state 745, "(1)" + line 408, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 846, "(1)" + line 431, "pan.___", state 863, "(1)" + line 435, "pan.___", state 876, "(1)" + line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 955, "(1)" + line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 978, "(1)" + line 249, "pan.___", state 986, "(1)" + line 253, "pan.___", state 998, "(1)" + line 257, "pan.___", state 1006, "(1)" + line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1084, "(1)" + line 249, "pan.___", state 1092, "(1)" + line 253, "pan.___", state 1104, "(1)" + line 257, "pan.___", state 1112, "(1)" + line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1176, "(1)" + line 249, "pan.___", state 1184, "(1)" + line 253, "pan.___", state 1196, "(1)" + line 257, "pan.___", state 1204, "(1)" + line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1282, "(1)" + line 249, "pan.___", state 1290, "(1)" + line 253, "pan.___", state 1302, "(1)" + line 257, "pan.___", state 1310, "(1)" + line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1374, "(1)" + line 249, "pan.___", state 1382, "(1)" + line 253, "pan.___", state 1394, "(1)" + line 257, "pan.___", state 1402, "(1)" + line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1480, "(1)" + line 249, "pan.___", state 1488, "(1)" + line 253, "pan.___", state 1500, "(1)" + line 257, "pan.___", state 1508, "(1)" + line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1572, "(1)" + line 249, "pan.___", state 1580, "(1)" + line 253, "pan.___", state 1592, "(1)" + line 257, "pan.___", state 1600, "(1)" + line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1678, "(1)" + line 249, "pan.___", state 1686, "(1)" + line 253, "pan.___", state 1698, "(1)" + line 257, "pan.___", state 1706, "(1)" + line 1123, "pan.___", state 1722, "-end-" + (129 of 1722 states) +unreached in proctype :init: + line 1138, "pan.___", state 11, "((i<1))" + line 1138, "pan.___", state 11, "((i>=1))" + (1 of 26 states) +unreached in proctype :never: + line 1184, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 155 seconds +pan: rate 2784.0683 states/second +pan: avg transition delay 1.5479e-06 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..44977a8 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input @@ -0,0 +1,1157 @@ +#define NO_RMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input.trail b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..931028a --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1479 @@ +-2:3:-2 +-4:-4:-4 +1:0:2970 +2:2:1220 +3:2:1225 +4:2:1229 +5:2:1237 +6:2:1241 +7:2:1245 +8:0:2970 +9:1:0 +10:1:5 +11:1:9 +12:1:17 +13:1:21 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a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.log new file mode 100644 index 0000000..deef6fa --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.log @@ -0,0 +1,298 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1179) +Depth= 3829 States= 1e+06 Transitions= 2.15e+08 Memory= 512.834 t= 341 R= 3e+03 +Depth= 3829 States= 2e+06 Transitions= 5.61e+08 Memory= 559.026 t= 920 R= 2e+03 +pan: claim violated! (at depth 1358) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 3829, errors: 1 + 2932262 states, stored +7.8211443e+08 states, matched +7.850467e+08 transitions (= stored+matched) +4.5802467e+09 atomic steps +hash conflicts: 5.9075827e+08 (resolved) + +Stats on memory usage (in Megabytes): + 324.385 equivalent memory usage for states (stored*(State-vector + overhead)) + 136.208 actual memory usage for states (compression: 41.99%) + state-vector as stored = 13 byte + 36 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 601.897 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 22861 1831 2500 2 2 ] +unreached in proctype urcu_reader + line 713, "pan.___", state 12, "((i<1))" + line 713, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 102, "(1)" + line 249, "pan.___", state 110, "(1)" + line 253, "pan.___", state 122, "(1)" + line 257, "pan.___", state 130, "(1)" + line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 221, "(1)" + line 431, "pan.___", state 251, "(1)" + line 435, "pan.___", state 264, "(1)" + line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 357, "(1)" + line 431, "pan.___", state 387, "(1)" + line 435, "pan.___", state 400, "(1)" + line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 486, "(1)" + line 431, "pan.___", state 516, "(1)" + line 435, "pan.___", state 529, "(1)" + line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 554, "(1)" + line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 555, "else" + line 404, "pan.___", state 558, "(1)" + line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 568, "(1)" + line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 569, "else" + line 408, "pan.___", state 572, "(1)" + line 408, "pan.___", state 573, "(1)" + line 408, "pan.___", state 573, "(1)" + line 406, "pan.___", state 578, "((i<1))" + line 406, "pan.___", state 578, "((i>=1))" + line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 586, "(1)" + line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 587, "else" + line 413, "pan.___", state 590, "(1)" + line 413, "pan.___", state 591, "(1)" + line 413, "pan.___", state 591, "(1)" + line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 600, "(1)" + line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 601, "else" + line 417, "pan.___", state 604, "(1)" + line 417, "pan.___", state 605, "(1)" + line 417, "pan.___", state 605, "(1)" + line 415, "pan.___", state 610, "((i<2))" + line 415, "pan.___", state 610, "((i>=2))" + line 422, "pan.___", state 617, "(1)" + line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 618, "else" + line 422, "pan.___", state 621, "(1)" + line 422, "pan.___", state 622, "(1)" + line 422, "pan.___", state 622, "(1)" + line 426, "pan.___", state 630, "(1)" + line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 631, "else" + line 426, "pan.___", state 634, "(1)" + line 426, "pan.___", state 635, "(1)" + line 426, "pan.___", state 635, "(1)" + line 424, "pan.___", state 640, "((i<1))" + line 424, "pan.___", state 640, "((i>=1))" + line 431, "pan.___", state 647, "(1)" + line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 648, "else" + line 431, "pan.___", state 651, "(1)" + line 431, "pan.___", state 652, "(1)" + line 431, "pan.___", state 652, "(1)" + line 435, "pan.___", state 660, "(1)" + line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 661, "else" + line 435, "pan.___", state 664, "(1)" + line 435, "pan.___", state 665, "(1)" + line 435, "pan.___", state 665, "(1)" + line 433, "pan.___", state 670, "((i<2))" + line 433, "pan.___", state 670, "((i>=2))" + line 443, "pan.___", state 674, "(1)" + line 443, "pan.___", state 674, "(1)" + line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" + line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 614, "pan.___", state 679, "(1)" + line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 751, "(1)" + line 431, "pan.___", state 781, "(1)" + line 435, "pan.___", state 794, "(1)" + line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 886, "(1)" + line 431, "pan.___", state 916, "(1)" + line 435, "pan.___", state 929, "(1)" + line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 1015, "(1)" + line 431, "pan.___", state 1045, "(1)" + line 435, "pan.___", state 1058, "(1)" + line 245, "pan.___", state 1091, "(1)" + line 253, "pan.___", state 1111, "(1)" + line 257, "pan.___", state 1119, "(1)" + line 748, "pan.___", state 1136, "-end-" + (92 of 1136 states) +unreached in proctype urcu_writer + line 837, "pan.___", state 12, "((i<1))" + line 837, "pan.___", state 12, "((i>=1))" + line 404, "pan.___", state 46, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 60, "cache_dirty_urcu_active_readers = 0" + line 422, "pan.___", state 111, "(1)" + line 426, "pan.___", state 124, "(1)" + line 268, "pan.___", state 177, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 179, "(1)" + line 272, "pan.___", state 186, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 188, "(1)" + line 272, "pan.___", state 189, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 189, "else" + line 270, "pan.___", state 194, "((i<1))" + line 270, "pan.___", state 194, "((i>=1))" + line 276, "pan.___", state 199, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 201, "(1)" + line 276, "pan.___", state 202, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 202, "else" + line 280, "pan.___", state 208, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 210, "(1)" + line 280, "pan.___", state 211, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 211, "else" + line 285, "pan.___", state 220, "(cache_dirty_urcu_gp_ctr)" + line 285, "pan.___", state 220, "else" + line 404, "pan.___", state 239, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 253, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 271, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 285, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 304, "(1)" + line 426, "pan.___", state 317, "(1)" + line 431, "pan.___", state 334, "(1)" + line 435, "pan.___", state 347, "(1)" + line 408, "pan.___", state 384, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 402, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 416, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 448, "(1)" + line 431, "pan.___", state 465, "(1)" + line 435, "pan.___", state 478, "(1)" + line 408, "pan.___", state 523, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 541, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 555, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 587, "(1)" + line 431, "pan.___", state 604, "(1)" + line 435, "pan.___", state 617, "(1)" + line 408, "pan.___", state 652, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 670, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 684, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 716, "(1)" + line 431, "pan.___", state 733, "(1)" + line 435, "pan.___", state 746, "(1)" + line 408, "pan.___", state 783, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 801, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 815, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 847, "(1)" + line 431, "pan.___", state 864, "(1)" + line 435, "pan.___", state 877, "(1)" + line 268, "pan.___", state 932, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 941, "cache_dirty_urcu_active_readers = 0" + line 245, "pan.___", state 979, "(1)" + line 249, "pan.___", state 987, "(1)" + line 253, "pan.___", state 999, "(1)" + line 257, "pan.___", state 1007, "(1)" + line 268, "pan.___", state 1038, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1047, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1060, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1069, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1085, "(1)" + line 249, "pan.___", state 1093, "(1)" + line 253, "pan.___", state 1105, "(1)" + line 257, "pan.___", state 1113, "(1)" + line 272, "pan.___", state 1139, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1152, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1161, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1177, "(1)" + line 249, "pan.___", state 1185, "(1)" + line 253, "pan.___", state 1197, "(1)" + line 257, "pan.___", state 1205, "(1)" + line 268, "pan.___", state 1236, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1245, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1258, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1267, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1283, "(1)" + line 249, "pan.___", state 1291, "(1)" + line 253, "pan.___", state 1303, "(1)" + line 257, "pan.___", state 1311, "(1)" + line 272, "pan.___", state 1337, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1350, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1359, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1375, "(1)" + line 249, "pan.___", state 1383, "(1)" + line 253, "pan.___", state 1395, "(1)" + line 257, "pan.___", state 1403, "(1)" + line 268, "pan.___", state 1434, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1443, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1456, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1465, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1481, "(1)" + line 249, "pan.___", state 1489, "(1)" + line 253, "pan.___", state 1501, "(1)" + line 257, "pan.___", state 1509, "(1)" + line 272, "pan.___", state 1535, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1548, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1557, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1573, "(1)" + line 249, "pan.___", state 1581, "(1)" + line 253, "pan.___", state 1593, "(1)" + line 257, "pan.___", state 1601, "(1)" + line 268, "pan.___", state 1632, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1641, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1654, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1663, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1679, "(1)" + line 249, "pan.___", state 1687, "(1)" + line 253, "pan.___", state 1699, "(1)" + line 257, "pan.___", state 1707, "(1)" + line 1123, "pan.___", state 1723, "-end-" + (110 of 1723 states) +unreached in proctype :init: + line 1138, "pan.___", state 11, "((i<1))" + line 1138, "pan.___", state 11, "((i>=1))" + (1 of 26 states) +unreached in proctype :never: + line 1184, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.31e+03 seconds +pan: rate 2245.8255 states/second +pan: avg transition delay 1.6631e-06 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..b79ec79 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input @@ -0,0 +1,1157 @@ +#define NO_WMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input.trail b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..4b13aef --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1361 @@ +-2:3:-2 +-4:-4:-4 +1:0:2887 +2:2:1136 +3:2:1141 +4:2:1145 +5:2:1153 +6:2:1157 +7:2:1161 +8:0:2887 +9:1:0 +10:1:5 +11:1:9 +12:1:17 +13:1:21 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+1352:2:2158 +1353:0:2887 +1354:1:812 +1355:1:813 +1356:0:2885 +1357:2:2159 +1358:0:2891 +1359:1:919 diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.define b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.log new file mode 100644 index 0000000..b0c3662 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.log @@ -0,0 +1,458 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1179) +Depth= 4014 States= 1e+06 Transitions= 1.62e+08 Memory= 512.736 t= 256 R= 4e+03 +pan: claim violated! (at depth 1235) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 4014, errors: 1 + 1411681 states, stored +2.3165948e+08 states, matched +2.3307116e+08 transitions (= stored+matched) +1.3076596e+09 atomic steps +hash conflicts: 78416855 (resolved) + +Stats on memory usage (in Megabytes): + 156.169 equivalent memory usage for states (stored*(State-vector + overhead)) + 66.078 actual memory usage for states (compression: 42.31%) + state-vector as stored = 13 byte + 36 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 531.779 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 14645 1835 1567 2 2 ] +unreached in proctype urcu_reader + line 713, "pan.___", state 12, "((i<1))" + line 713, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 102, "(1)" + line 249, "pan.___", state 110, "(1)" + line 253, "pan.___", state 122, "(1)" + line 257, "pan.___", state 130, "(1)" + line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 221, "(1)" + line 431, "pan.___", state 251, "(1)" + line 435, "pan.___", state 264, "(1)" + line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 357, "(1)" + line 431, "pan.___", state 387, "(1)" + line 435, "pan.___", state 400, "(1)" + line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 486, "(1)" + line 431, "pan.___", state 516, "(1)" + line 435, "pan.___", state 529, "(1)" + line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 554, "(1)" + line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 555, "else" + line 404, "pan.___", state 558, "(1)" + line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 568, "(1)" + line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 569, "else" + line 408, "pan.___", state 572, "(1)" + line 408, "pan.___", state 573, "(1)" + line 408, "pan.___", state 573, "(1)" + line 406, "pan.___", state 578, "((i<1))" + line 406, "pan.___", state 578, "((i>=1))" + line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 586, "(1)" + line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 587, "else" + line 413, "pan.___", state 590, "(1)" + line 413, "pan.___", state 591, "(1)" + line 413, "pan.___", state 591, "(1)" + line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 600, "(1)" + line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 601, "else" + line 417, "pan.___", state 604, "(1)" + line 417, "pan.___", state 605, "(1)" + line 417, "pan.___", state 605, "(1)" + line 415, "pan.___", state 610, "((i<2))" + line 415, "pan.___", state 610, "((i>=2))" + line 422, "pan.___", state 617, "(1)" + line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 618, "else" + line 422, "pan.___", state 621, "(1)" + line 422, "pan.___", state 622, "(1)" + line 422, "pan.___", state 622, "(1)" + line 426, "pan.___", state 630, "(1)" + line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 631, "else" + line 426, "pan.___", state 634, "(1)" + line 426, "pan.___", state 635, "(1)" + line 426, "pan.___", state 635, "(1)" + line 424, "pan.___", state 640, "((i<1))" + line 424, "pan.___", state 640, "((i>=1))" + line 431, "pan.___", state 647, "(1)" + line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 648, "else" + line 431, "pan.___", state 651, "(1)" + line 431, "pan.___", state 652, "(1)" + line 431, "pan.___", state 652, "(1)" + line 435, "pan.___", state 660, "(1)" + line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 661, "else" + line 435, "pan.___", state 664, "(1)" + line 435, "pan.___", state 665, "(1)" + line 435, "pan.___", state 665, "(1)" + line 433, "pan.___", state 670, "((i<2))" + line 433, "pan.___", state 670, "((i>=2))" + line 443, "pan.___", state 674, "(1)" + line 443, "pan.___", state 674, "(1)" + line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" + line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 614, "pan.___", state 679, "(1)" + line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 751, "(1)" + line 431, "pan.___", state 781, "(1)" + line 435, "pan.___", state 794, "(1)" + line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 886, "(1)" + line 431, "pan.___", state 916, "(1)" + line 435, "pan.___", state 929, "(1)" + line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 1015, "(1)" + line 431, "pan.___", state 1045, "(1)" + line 435, "pan.___", state 1058, "(1)" + line 245, "pan.___", state 1091, "(1)" + line 253, "pan.___", state 1111, "(1)" + line 257, "pan.___", state 1119, "(1)" + line 748, "pan.___", state 1136, "-end-" + (92 of 1136 states) +unreached in proctype urcu_writer + line 837, "pan.___", state 12, "((i<1))" + line 837, "pan.___", state 12, "((i>=1))" + line 404, "pan.___", state 49, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 63, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 81, "cache_dirty_rcu_ptr = 0" + line 422, "pan.___", state 114, "(1)" + line 426, "pan.___", state 127, "(1)" + line 431, "pan.___", state 144, "(1)" + line 268, "pan.___", state 180, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 189, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 202, "cache_dirty_rcu_ptr = 0" + line 404, "pan.___", state 242, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 256, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 274, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 288, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 307, "(1)" + line 426, "pan.___", state 320, "(1)" + line 431, "pan.___", state 337, "(1)" + line 435, "pan.___", state 350, "(1)" + line 408, "pan.___", state 387, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 405, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 419, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 451, "(1)" + line 431, "pan.___", state 468, "(1)" + line 435, "pan.___", state 481, "(1)" + line 404, "pan.___", state 511, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 525, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 543, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 557, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 576, "(1)" + line 426, "pan.___", state 589, "(1)" + line 431, "pan.___", state 606, "(1)" + line 435, "pan.___", state 619, "(1)" + line 404, "pan.___", state 640, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 642, "(1)" + line 404, "pan.___", state 643, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 643, "else" + line 404, "pan.___", state 646, "(1)" + line 408, "pan.___", state 654, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 656, "(1)" + line 408, "pan.___", state 657, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 657, "else" + line 408, "pan.___", state 660, "(1)" + line 408, "pan.___", state 661, "(1)" + line 408, "pan.___", state 661, "(1)" + line 406, "pan.___", state 666, "((i<1))" + line 406, "pan.___", state 666, "((i>=1))" + line 413, "pan.___", state 672, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 674, "(1)" + line 413, "pan.___", state 675, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 675, "else" + line 413, "pan.___", state 678, "(1)" + line 413, "pan.___", state 679, "(1)" + line 413, "pan.___", state 679, "(1)" + line 417, "pan.___", state 686, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 688, "(1)" + line 417, "pan.___", state 689, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 689, "else" + line 417, "pan.___", state 692, "(1)" + line 417, "pan.___", state 693, "(1)" + line 417, "pan.___", state 693, "(1)" + line 415, "pan.___", state 698, "((i<2))" + line 415, "pan.___", state 698, "((i>=2))" + line 422, "pan.___", state 705, "(1)" + line 422, "pan.___", state 706, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 706, "else" + line 422, "pan.___", state 709, "(1)" + line 422, "pan.___", state 710, "(1)" + line 422, "pan.___", state 710, "(1)" + line 426, "pan.___", state 718, "(1)" + line 426, "pan.___", state 719, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 719, "else" + line 426, "pan.___", state 722, "(1)" + line 426, "pan.___", state 723, "(1)" + line 426, "pan.___", state 723, "(1)" + line 424, "pan.___", state 728, "((i<1))" + line 424, "pan.___", state 728, "((i>=1))" + line 431, "pan.___", state 735, "(1)" + line 431, "pan.___", state 736, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 736, "else" + line 431, "pan.___", state 739, "(1)" + line 431, "pan.___", state 740, "(1)" + line 431, "pan.___", state 740, "(1)" + line 435, "pan.___", state 748, "(1)" + line 435, "pan.___", state 749, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 749, "else" + line 435, "pan.___", state 752, "(1)" + line 435, "pan.___", state 753, "(1)" + line 435, "pan.___", state 753, "(1)" + line 433, "pan.___", state 758, "((i<2))" + line 433, "pan.___", state 758, "((i>=2))" + line 443, "pan.___", state 762, "(1)" + line 443, "pan.___", state 762, "(1)" + line 1003, "pan.___", state 766, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" + line 404, "pan.___", state 771, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 773, "(1)" + line 404, "pan.___", state 774, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 774, "else" + line 404, "pan.___", state 777, "(1)" + line 408, "pan.___", state 785, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 787, "(1)" + line 408, "pan.___", state 788, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 788, "else" + line 408, "pan.___", state 791, "(1)" + line 408, "pan.___", state 792, "(1)" + line 408, "pan.___", state 792, "(1)" + line 406, "pan.___", state 797, "((i<1))" + line 406, "pan.___", state 797, "((i>=1))" + line 413, "pan.___", state 803, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 805, "(1)" + line 413, "pan.___", state 806, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 806, "else" + line 413, "pan.___", state 809, "(1)" + line 413, "pan.___", state 810, "(1)" + line 413, "pan.___", state 810, "(1)" + line 417, "pan.___", state 817, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 819, "(1)" + line 417, "pan.___", state 820, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 820, "else" + line 417, "pan.___", state 823, "(1)" + line 417, "pan.___", state 824, "(1)" + line 417, "pan.___", state 824, "(1)" + line 415, "pan.___", state 829, "((i<2))" + line 415, "pan.___", state 829, "((i>=2))" + line 422, "pan.___", state 836, "(1)" + line 422, "pan.___", state 837, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 837, "else" + line 422, "pan.___", state 840, "(1)" + line 422, "pan.___", state 841, "(1)" + line 422, "pan.___", state 841, "(1)" + line 426, "pan.___", state 849, "(1)" + line 426, "pan.___", state 850, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 850, "else" + line 426, "pan.___", state 853, "(1)" + line 426, "pan.___", state 854, "(1)" + line 426, "pan.___", state 854, "(1)" + line 424, "pan.___", state 859, "((i<1))" + line 424, "pan.___", state 859, "((i>=1))" + line 431, "pan.___", state 866, "(1)" + line 431, "pan.___", state 867, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 867, "else" + line 431, "pan.___", state 870, "(1)" + line 431, "pan.___", state 871, "(1)" + line 431, "pan.___", state 871, "(1)" + line 435, "pan.___", state 879, "(1)" + line 435, "pan.___", state 880, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 880, "else" + line 435, "pan.___", state 883, "(1)" + line 435, "pan.___", state 884, "(1)" + line 435, "pan.___", state 884, "(1)" + line 433, "pan.___", state 889, "((i<2))" + line 433, "pan.___", state 889, "((i>=2))" + line 443, "pan.___", state 893, "(1)" + line 443, "pan.___", state 893, "(1)" + line 1019, "pan.___", state 898, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" + line 1014, "pan.___", state 899, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" + line 1014, "pan.___", state 899, "else" + line 1039, "pan.___", state 903, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" + line 268, "pan.___", state 934, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 943, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 958, "(1)" + line 280, "pan.___", state 965, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 981, "(1)" + line 249, "pan.___", state 989, "(1)" + line 253, "pan.___", state 1001, "(1)" + line 257, "pan.___", state 1009, "(1)" + line 268, "pan.___", state 1040, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1049, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1062, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1071, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1087, "(1)" + line 249, "pan.___", state 1095, "(1)" + line 253, "pan.___", state 1107, "(1)" + line 257, "pan.___", state 1115, "(1)" + line 272, "pan.___", state 1141, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1154, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1163, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1179, "(1)" + line 249, "pan.___", state 1187, "(1)" + line 253, "pan.___", state 1199, "(1)" + line 257, "pan.___", state 1207, "(1)" + line 268, "pan.___", state 1238, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1247, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1260, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1269, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1285, "(1)" + line 249, "pan.___", state 1293, "(1)" + line 253, "pan.___", state 1305, "(1)" + line 257, "pan.___", state 1313, "(1)" + line 268, "pan.___", state 1330, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1332, "(1)" + line 272, "pan.___", state 1339, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1341, "(1)" + line 272, "pan.___", state 1342, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1342, "else" + line 270, "pan.___", state 1347, "((i<1))" + line 270, "pan.___", state 1347, "((i>=1))" + line 276, "pan.___", state 1352, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1354, "(1)" + line 276, "pan.___", state 1355, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1355, "else" + line 280, "pan.___", state 1361, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1363, "(1)" + line 280, "pan.___", state 1364, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1364, "else" + line 278, "pan.___", state 1369, "((i<2))" + line 278, "pan.___", state 1369, "((i>=2))" + line 245, "pan.___", state 1377, "(1)" + line 249, "pan.___", state 1385, "(1)" + line 249, "pan.___", state 1386, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1386, "else" + line 247, "pan.___", state 1391, "((i<1))" + line 247, "pan.___", state 1391, "((i>=1))" + line 253, "pan.___", state 1397, "(1)" + line 253, "pan.___", state 1398, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1398, "else" + line 257, "pan.___", state 1405, "(1)" + line 257, "pan.___", state 1406, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1406, "else" + line 262, "pan.___", state 1415, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1415, "else" + line 1115, "pan.___", state 1418, "i = 0" + line 1115, "pan.___", state 1420, "reader_barrier = 1" + line 1115, "pan.___", state 1431, "((i<1))" + line 1115, "pan.___", state 1431, "((i>=1))" + line 268, "pan.___", state 1436, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1438, "(1)" + line 272, "pan.___", state 1445, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1447, "(1)" + line 272, "pan.___", state 1448, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1448, "else" + line 270, "pan.___", state 1453, "((i<1))" + line 270, "pan.___", state 1453, "((i>=1))" + line 276, "pan.___", state 1458, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1460, "(1)" + line 276, "pan.___", state 1461, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1461, "else" + line 280, "pan.___", state 1467, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1469, "(1)" + line 280, "pan.___", state 1470, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1470, "else" + line 278, "pan.___", state 1475, "((i<2))" + line 278, "pan.___", state 1475, "((i>=2))" + line 245, "pan.___", state 1483, "(1)" + line 249, "pan.___", state 1491, "(1)" + line 249, "pan.___", state 1492, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1492, "else" + line 247, "pan.___", state 1497, "((i<1))" + line 247, "pan.___", state 1497, "((i>=1))" + line 253, "pan.___", state 1503, "(1)" + line 253, "pan.___", state 1504, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1504, "else" + line 257, "pan.___", state 1511, "(1)" + line 257, "pan.___", state 1512, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1512, "else" + line 262, "pan.___", state 1521, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1521, "else" + line 295, "pan.___", state 1523, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1523, "else" + line 1115, "pan.___", state 1524, "(cache_dirty_urcu_gp_ctr)" + line 1115, "pan.___", state 1524, "else" + line 272, "pan.___", state 1537, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1550, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1559, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1575, "(1)" + line 249, "pan.___", state 1583, "(1)" + line 253, "pan.___", state 1595, "(1)" + line 257, "pan.___", state 1603, "(1)" + line 268, "pan.___", state 1634, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1643, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1656, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1665, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1681, "(1)" + line 249, "pan.___", state 1689, "(1)" + line 253, "pan.___", state 1701, "(1)" + line 257, "pan.___", state 1709, "(1)" + line 1123, "pan.___", state 1725, "-end-" + (212 of 1725 states) +unreached in proctype :init: + line 1138, "pan.___", state 11, "((i<1))" + line 1138, "pan.___", state 11, "((i>=1))" + (1 of 26 states) +unreached in proctype :never: + line 1184, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 372 seconds +pan: rate 3796.6785 states/second +pan: avg transition delay 1.5953e-06 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..3af0fbc --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input @@ -0,0 +1,1157 @@ +#define SINGLE_FLIP + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input.trail b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..53de47d --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1238 @@ +-2:3:-2 +-4:-4:-4 +1:0:2889 +2:2:1136 +3:2:1141 +4:2:1145 +5:2:1153 +6:2:1157 +7:2:1161 +8:0:2889 +9:1:0 +10:1:5 +11:1:9 +12:1:17 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/dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.log new file mode 100644 index 0000000..0fc4f7a --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.log @@ -0,0 +1,305 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1179) +depth 7: Claim reached state 9 (line 1184) +depth 136: Claim reached state 9 (line 1183) +Depth= 12986 States= 1e+06 Transitions= 1.85e+08 Memory= 494.963 t= 294 R= 3e+03 +Depth= 12986 States= 2e+06 Transitions= 6.44e+08 Memory= 520.744 t= 1.06e+03 R= 2e+03 +Depth= 12986 States= 3e+06 Transitions= 1.24e+09 Memory= 545.842 t= 2.08e+03 R= 1e+03 +pan: resizing hashtable to -w22.. done +Depth= 12986 States= 4e+06 Transitions= 1.65e+09 Memory= 602.940 t= 2.76e+03 R= 1e+03 +Depth= 12986 States= 5e+06 Transitions= 2e+09 Memory= 629.111 t= 3.34e+03 R= 1e+03 +Depth= 12986 States= 6e+06 Transitions= 2.47e+09 Memory= 655.283 t= 4.12e+03 R= 1e+03 +Depth= 12986 States= 7e+06 Transitions= 2.94e+09 Memory= 681.260 t= 4.93e+03 R= 1e+03 +Depth= 12986 States= 8e+06 Transitions= 3.45e+09 Memory= 705.967 t= 5.79e+03 R= 1e+03 +Depth= 12986 States= 9e+06 Transitions= 3.84e+09 Memory= 732.529 t= 6.46e+03 R= 1e+03 +pan: resizing hashtable to -w24.. done +Depth= 12986 States= 1e+07 Transitions= 4.23e+09 Memory= 882.404 t= 7.1e+03 R= 1e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 12986, errors: 0 + 5822478 states, stored (1.02932e+07 visited) +4.3658924e+09 states, matched +4.3761856e+09 transitions (= visited+matched) +2.5547511e+10 atomic steps +hash conflicts: 1.1937107e+09 (resolved) + +Stats on memory usage (in Megabytes): + 644.119 equivalent memory usage for states (stored*(State-vector + overhead)) + 303.976 actual memory usage for states (compression: 47.19%) + state-vector as stored = 19 byte + 36 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 889.631 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 28603 2179 2102 2 2 ] +unreached in proctype urcu_reader + line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 102, "(1)" + line 249, "pan.___", state 110, "(1)" + line 253, "pan.___", state 122, "(1)" + line 257, "pan.___", state 130, "(1)" + line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 221, "(1)" + line 431, "pan.___", state 251, "(1)" + line 435, "pan.___", state 264, "(1)" + line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 357, "(1)" + line 431, "pan.___", state 387, "(1)" + line 435, "pan.___", state 400, "(1)" + line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 486, "(1)" + line 431, "pan.___", state 516, "(1)" + line 435, "pan.___", state 529, "(1)" + line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 554, "(1)" + line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 555, "else" + line 404, "pan.___", state 558, "(1)" + line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 568, "(1)" + line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 569, "else" + line 408, "pan.___", state 572, "(1)" + line 408, "pan.___", state 573, "(1)" + line 408, "pan.___", state 573, "(1)" + line 406, "pan.___", state 578, "((i<1))" + line 406, "pan.___", state 578, "((i>=1))" + line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 586, "(1)" + line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 587, "else" + line 413, "pan.___", state 590, "(1)" + line 413, "pan.___", state 591, "(1)" + line 413, "pan.___", state 591, "(1)" + line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 600, "(1)" + line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 601, "else" + line 417, "pan.___", state 604, "(1)" + line 417, "pan.___", state 605, "(1)" + line 417, "pan.___", state 605, "(1)" + line 415, "pan.___", state 610, "((i<2))" + line 415, "pan.___", state 610, "((i>=2))" + line 422, "pan.___", state 617, "(1)" + line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 618, "else" + line 422, "pan.___", state 621, "(1)" + line 422, "pan.___", state 622, "(1)" + line 422, "pan.___", state 622, "(1)" + line 426, "pan.___", state 630, "(1)" + line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 631, "else" + line 426, "pan.___", state 634, "(1)" + line 426, "pan.___", state 635, "(1)" + line 426, "pan.___", state 635, "(1)" + line 424, "pan.___", state 640, "((i<1))" + line 424, "pan.___", state 640, "((i>=1))" + line 431, "pan.___", state 647, "(1)" + line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 648, "else" + line 431, "pan.___", state 651, "(1)" + line 431, "pan.___", state 652, "(1)" + line 431, "pan.___", state 652, "(1)" + line 435, "pan.___", state 660, "(1)" + line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 661, "else" + line 435, "pan.___", state 664, "(1)" + line 435, "pan.___", state 665, "(1)" + line 435, "pan.___", state 665, "(1)" + line 433, "pan.___", state 670, "((i<2))" + line 433, "pan.___", state 670, "((i>=2))" + line 443, "pan.___", state 674, "(1)" + line 443, "pan.___", state 674, "(1)" + line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" + line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 614, "pan.___", state 679, "(1)" + line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 751, "(1)" + line 431, "pan.___", state 781, "(1)" + line 435, "pan.___", state 794, "(1)" + line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 886, "(1)" + line 431, "pan.___", state 916, "(1)" + line 435, "pan.___", state 929, "(1)" + line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 1015, "(1)" + line 431, "pan.___", state 1045, "(1)" + line 435, "pan.___", state 1058, "(1)" + line 245, "pan.___", state 1091, "(1)" + line 253, "pan.___", state 1111, "(1)" + line 257, "pan.___", state 1119, "(1)" + line 748, "pan.___", state 1136, "-end-" + (91 of 1136 states) +unreached in proctype urcu_writer + line 404, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 422, "pan.___", state 110, "(1)" + line 426, "pan.___", state 123, "(1)" + line 431, "pan.___", state 140, "(1)" + line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 404, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 303, "(1)" + line 426, "pan.___", state 316, "(1)" + line 431, "pan.___", state 333, "(1)" + line 435, "pan.___", state 346, "(1)" + line 408, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 447, "(1)" + line 431, "pan.___", state 464, "(1)" + line 435, "pan.___", state 477, "(1)" + line 408, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 586, "(1)" + line 431, "pan.___", state 603, "(1)" + line 435, "pan.___", state 616, "(1)" + line 408, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 715, "(1)" + line 431, "pan.___", state 732, "(1)" + line 435, "pan.___", state 745, "(1)" + line 408, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 846, "(1)" + line 431, "pan.___", state 863, "(1)" + line 435, "pan.___", state 876, "(1)" + line 268, "pan.___", state 926, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 935, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 948, "cache_dirty_rcu_ptr = 0" + line 245, "pan.___", state 973, "(1)" + line 249, "pan.___", state 981, "(1)" + line 253, "pan.___", state 993, "(1)" + line 257, "pan.___", state 1001, "(1)" + line 268, "pan.___", state 1032, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1041, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1054, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1063, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1079, "(1)" + line 249, "pan.___", state 1087, "(1)" + line 253, "pan.___", state 1099, "(1)" + line 257, "pan.___", state 1107, "(1)" + line 268, "pan.___", state 1128, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1137, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1152, "(1)" + line 280, "pan.___", state 1159, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1175, "(1)" + line 249, "pan.___", state 1183, "(1)" + line 253, "pan.___", state 1195, "(1)" + line 257, "pan.___", state 1203, "(1)" + line 268, "pan.___", state 1234, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1243, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1256, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1265, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1281, "(1)" + line 249, "pan.___", state 1289, "(1)" + line 253, "pan.___", state 1301, "(1)" + line 257, "pan.___", state 1309, "(1)" + line 272, "pan.___", state 1335, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1348, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1357, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1373, "(1)" + line 249, "pan.___", state 1381, "(1)" + line 253, "pan.___", state 1393, "(1)" + line 257, "pan.___", state 1401, "(1)" + line 268, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1441, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1454, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1463, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1479, "(1)" + line 249, "pan.___", state 1487, "(1)" + line 253, "pan.___", state 1499, "(1)" + line 257, "pan.___", state 1507, "(1)" + line 272, "pan.___", state 1533, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1546, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1555, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1571, "(1)" + line 249, "pan.___", state 1579, "(1)" + line 253, "pan.___", state 1591, "(1)" + line 257, "pan.___", state 1599, "(1)" + line 268, "pan.___", state 1630, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1639, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1652, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1661, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1677, "(1)" + line 249, "pan.___", state 1685, "(1)" + line 253, "pan.___", state 1697, "(1)" + line 257, "pan.___", state 1705, "(1)" + line 272, "pan.___", state 1731, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1744, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1753, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1769, "(1)" + line 249, "pan.___", state 1777, "(1)" + line 253, "pan.___", state 1789, "(1)" + line 257, "pan.___", state 1797, "(1)" + line 268, "pan.___", state 1828, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1837, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1850, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1859, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1875, "(1)" + line 249, "pan.___", state 1883, "(1)" + line 253, "pan.___", state 1895, "(1)" + line 257, "pan.___", state 1903, "(1)" + line 1123, "pan.___", state 1919, "-end-" + (118 of 1919 states) +unreached in proctype :init: + (0 of 26 states) +unreached in proctype :never: + line 1186, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 7.33e+03 seconds +pan: rate 1403.7352 states/second +pan: avg transition delay 1.6756e-06 usec +cp .input.spin urcu_progress_reader.spin.input +cp .input.spin.trail urcu_progress_reader.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.spin.input new file mode 100644 index 0000000..1e7da85 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_reader.spin.input @@ -0,0 +1,1157 @@ +#define READER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.define b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.log new file mode 100644 index 0000000..ed8fbc3 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.log @@ -0,0 +1,290 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1179) +depth 7: Claim reached state 9 (line 1184) +depth 46: Claim reached state 9 (line 1183) +Depth= 3817 States= 1e+06 Transitions= 2.94e+08 Memory= 492.912 t= 480 R= 2e+03 +Depth= 3900 States= 2e+06 Transitions= 6.63e+08 Memory= 519.572 t= 1.09e+03 R= 2e+03 +Depth= 3900 States= 3e+06 Transitions= 1.33e+09 Memory= 543.986 t= 2.23e+03 R= 1e+03 +pan: resizing hashtable to -w22.. done +Depth= 3900 States= 4e+06 Transitions= 1.71e+09 Memory= 601.279 t= 2.86e+03 R= 1e+03 +Depth= 3900 States= 5e+06 Transitions= 2.06e+09 Memory= 627.647 t= 3.45e+03 R= 1e+03 +Depth= 3900 States= 6e+06 Transitions= 2.49e+09 Memory= 653.818 t= 4.18e+03 R= 1e+03 +Depth= 3900 States= 7e+06 Transitions= 3.14e+09 Memory= 678.135 t= 5.28e+03 R= 1e+03 +Depth= 3900 States= 8e+06 Transitions= 3.52e+09 Memory= 704.404 t= 5.93e+03 R= 1e+03 +Depth= 3900 States= 9e+06 Transitions= 3.88e+09 Memory= 730.869 t= 6.53e+03 R= 1e+03 +pan: resizing hashtable to -w24.. done +Depth= 3900 States= 1e+07 Transitions= 4.34e+09 Memory= 880.451 t= 7.29e+03 R= 1e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 3900, errors: 0 + 5638524 states, stored (1.00251e+07 visited) +4.3347674e+09 states, matched +4.3447924e+09 transitions (= visited+matched) +2.5387604e+10 atomic steps +hash conflicts: 1.1627355e+09 (resolved) + +Stats on memory usage (in Megabytes): + 623.769 equivalent memory usage for states (stored*(State-vector + overhead)) + 295.411 actual memory usage for states (compression: 47.36%) + state-vector as stored = 19 byte + 36 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 881.037 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 26786 2128 1995 2 2 ] +unreached in proctype urcu_reader + line 268, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 102, "(1)" + line 249, "pan.___", state 110, "(1)" + line 253, "pan.___", state 122, "(1)" + line 257, "pan.___", state 130, "(1)" + line 404, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 221, "(1)" + line 431, "pan.___", state 251, "(1)" + line 435, "pan.___", state 264, "(1)" + line 614, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 404, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 357, "(1)" + line 431, "pan.___", state 387, "(1)" + line 435, "pan.___", state 400, "(1)" + line 404, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 486, "(1)" + line 431, "pan.___", state 516, "(1)" + line 435, "pan.___", state 529, "(1)" + line 404, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 404, "pan.___", state 554, "(1)" + line 404, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" + line 404, "pan.___", state 555, "else" + line 404, "pan.___", state 558, "(1)" + line 408, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" + line 408, "pan.___", state 568, "(1)" + line 408, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" + line 408, "pan.___", state 569, "else" + line 408, "pan.___", state 572, "(1)" + line 408, "pan.___", state 573, "(1)" + line 408, "pan.___", state 573, "(1)" + line 406, "pan.___", state 578, "((i<1))" + line 406, "pan.___", state 578, "((i>=1))" + line 413, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" + line 413, "pan.___", state 586, "(1)" + line 413, "pan.___", state 587, "(cache_dirty_rcu_ptr)" + line 413, "pan.___", state 587, "else" + line 413, "pan.___", state 590, "(1)" + line 413, "pan.___", state 591, "(1)" + line 413, "pan.___", state 591, "(1)" + line 417, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" + line 417, "pan.___", state 600, "(1)" + line 417, "pan.___", state 601, "(cache_dirty_rcu_data[i])" + line 417, "pan.___", state 601, "else" + line 417, "pan.___", state 604, "(1)" + line 417, "pan.___", state 605, "(1)" + line 417, "pan.___", state 605, "(1)" + line 415, "pan.___", state 610, "((i<2))" + line 415, "pan.___", state 610, "((i>=2))" + line 422, "pan.___", state 617, "(1)" + line 422, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 422, "pan.___", state 618, "else" + line 422, "pan.___", state 621, "(1)" + line 422, "pan.___", state 622, "(1)" + line 422, "pan.___", state 622, "(1)" + line 426, "pan.___", state 630, "(1)" + line 426, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" + line 426, "pan.___", state 631, "else" + line 426, "pan.___", state 634, "(1)" + line 426, "pan.___", state 635, "(1)" + line 426, "pan.___", state 635, "(1)" + line 424, "pan.___", state 640, "((i<1))" + line 424, "pan.___", state 640, "((i>=1))" + line 431, "pan.___", state 647, "(1)" + line 431, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" + line 431, "pan.___", state 648, "else" + line 431, "pan.___", state 651, "(1)" + line 431, "pan.___", state 652, "(1)" + line 431, "pan.___", state 652, "(1)" + line 435, "pan.___", state 660, "(1)" + line 435, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" + line 435, "pan.___", state 661, "else" + line 435, "pan.___", state 664, "(1)" + line 435, "pan.___", state 665, "(1)" + line 435, "pan.___", state 665, "(1)" + line 433, "pan.___", state 670, "((i<2))" + line 433, "pan.___", state 670, "((i>=2))" + line 443, "pan.___", state 674, "(1)" + line 443, "pan.___", state 674, "(1)" + line 614, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" + line 614, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 614, "pan.___", state 679, "(1)" + line 404, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 751, "(1)" + line 431, "pan.___", state 781, "(1)" + line 435, "pan.___", state 794, "(1)" + line 404, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 886, "(1)" + line 431, "pan.___", state 916, "(1)" + line 435, "pan.___", state 929, "(1)" + line 404, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 413, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 1015, "(1)" + line 431, "pan.___", state 1045, "(1)" + line 435, "pan.___", state 1058, "(1)" + line 245, "pan.___", state 1091, "(1)" + line 253, "pan.___", state 1111, "(1)" + line 257, "pan.___", state 1119, "(1)" + line 748, "pan.___", state 1136, "-end-" + (91 of 1136 states) +unreached in proctype urcu_writer + line 404, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 422, "pan.___", state 110, "(1)" + line 426, "pan.___", state 123, "(1)" + line 431, "pan.___", state 140, "(1)" + line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 404, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 422, "pan.___", state 303, "(1)" + line 426, "pan.___", state 316, "(1)" + line 431, "pan.___", state 333, "(1)" + line 435, "pan.___", state 346, "(1)" + line 408, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 447, "(1)" + line 431, "pan.___", state 464, "(1)" + line 435, "pan.___", state 477, "(1)" + line 408, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 586, "(1)" + line 431, "pan.___", state 603, "(1)" + line 435, "pan.___", state 616, "(1)" + line 408, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 715, "(1)" + line 431, "pan.___", state 732, "(1)" + line 435, "pan.___", state 745, "(1)" + line 408, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" + line 413, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" + line 426, "pan.___", state 846, "(1)" + line 431, "pan.___", state 863, "(1)" + line 435, "pan.___", state 876, "(1)" + line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 955, "(1)" + line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 978, "(1)" + line 249, "pan.___", state 986, "(1)" + line 253, "pan.___", state 998, "(1)" + line 257, "pan.___", state 1006, "(1)" + line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1084, "(1)" + line 249, "pan.___", state 1092, "(1)" + line 253, "pan.___", state 1104, "(1)" + line 257, "pan.___", state 1112, "(1)" + line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1176, "(1)" + line 249, "pan.___", state 1184, "(1)" + line 253, "pan.___", state 1196, "(1)" + line 257, "pan.___", state 1204, "(1)" + line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1282, "(1)" + line 249, "pan.___", state 1290, "(1)" + line 253, "pan.___", state 1302, "(1)" + line 257, "pan.___", state 1310, "(1)" + line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1374, "(1)" + line 249, "pan.___", state 1382, "(1)" + line 253, "pan.___", state 1394, "(1)" + line 257, "pan.___", state 1402, "(1)" + line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1480, "(1)" + line 249, "pan.___", state 1488, "(1)" + line 253, "pan.___", state 1500, "(1)" + line 257, "pan.___", state 1508, "(1)" + line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1572, "(1)" + line 249, "pan.___", state 1580, "(1)" + line 253, "pan.___", state 1592, "(1)" + line 257, "pan.___", state 1600, "(1)" + line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1678, "(1)" + line 249, "pan.___", state 1686, "(1)" + line 253, "pan.___", state 1698, "(1)" + line 257, "pan.___", state 1706, "(1)" + line 1123, "pan.___", state 1722, "-end-" + (103 of 1722 states) +unreached in proctype :init: + (0 of 26 states) +unreached in proctype :never: + line 1186, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 7.3e+03 seconds +pan: rate 1373.8126 states/second +pan: avg transition delay 1.6795e-06 usec +cp .input.spin urcu_progress_writer.spin.input +cp .input.spin.trail urcu_progress_writer.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.spin.input new file mode 100644 index 0000000..4f98f45 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer.spin.input @@ -0,0 +1,1157 @@ +#define WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.define b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.log b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.log new file mode 100644 index 0000000..b95b25e --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.log @@ -0,0 +1,315 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1180) +depth 7: Claim reached state 9 (line 1185) +depth 46: Claim reached state 9 (line 1184) +pan: acceptance cycle (at depth 3798) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 3956, errors: 1 + 139740 states, stored (233412 visited) + 43234612 states, matched + 43468024 transitions (= visited+matched) +2.3201732e+08 atomic steps +hash conflicts: 937081 (resolved) + +Stats on memory usage (in Megabytes): + 15.459 equivalent memory usage for states (stored*(State-vector + overhead)) + 7.007 actual memory usage for states (compression: 45.33%) + state-vector as stored = 17 byte + 36 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 472.697 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 1001 532 228 2 2 ] +unreached in proctype urcu_reader + line 269, "pan.___", state 55, "cache_dirty_urcu_gp_ctr = 0" + line 277, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 86, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 102, "(1)" + line 250, "pan.___", state 110, "(1)" + line 254, "pan.___", state 122, "(1)" + line 258, "pan.___", state 130, "(1)" + line 405, "pan.___", state 156, "cache_dirty_urcu_gp_ctr = 0" + line 414, "pan.___", state 188, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 202, "cache_dirty_rcu_data[i] = 0" + line 423, "pan.___", state 221, "(1)" + line 432, "pan.___", state 251, "(1)" + line 436, "pan.___", state 264, "(1)" + line 615, "pan.___", state 285, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 405, "pan.___", state 292, "cache_dirty_urcu_gp_ctr = 0" + line 414, "pan.___", state 324, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 338, "cache_dirty_rcu_data[i] = 0" + line 423, "pan.___", state 357, "(1)" + line 432, "pan.___", state 387, "(1)" + line 436, "pan.___", state 400, "(1)" + line 405, "pan.___", state 421, "cache_dirty_urcu_gp_ctr = 0" + line 414, "pan.___", state 453, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 467, "cache_dirty_rcu_data[i] = 0" + line 423, "pan.___", state 486, "(1)" + line 432, "pan.___", state 516, "(1)" + line 436, "pan.___", state 529, "(1)" + line 405, "pan.___", state 552, "cache_dirty_urcu_gp_ctr = 0" + line 405, "pan.___", state 554, "(1)" + line 405, "pan.___", state 555, "(cache_dirty_urcu_gp_ctr)" + line 405, "pan.___", state 555, "else" + line 405, "pan.___", state 558, "(1)" + line 409, "pan.___", state 566, "cache_dirty_urcu_active_readers = 0" + line 409, "pan.___", state 568, "(1)" + line 409, "pan.___", state 569, "(cache_dirty_urcu_active_readers)" + line 409, "pan.___", state 569, "else" + line 409, "pan.___", state 572, "(1)" + line 409, "pan.___", state 573, "(1)" + line 409, "pan.___", state 573, "(1)" + line 407, "pan.___", state 578, "((i<1))" + line 407, "pan.___", state 578, "((i>=1))" + line 414, "pan.___", state 584, "cache_dirty_rcu_ptr = 0" + line 414, "pan.___", state 586, "(1)" + line 414, "pan.___", state 587, "(cache_dirty_rcu_ptr)" + line 414, "pan.___", state 587, "else" + line 414, "pan.___", state 590, "(1)" + line 414, "pan.___", state 591, "(1)" + line 414, "pan.___", state 591, "(1)" + line 418, "pan.___", state 598, "cache_dirty_rcu_data[i] = 0" + line 418, "pan.___", state 600, "(1)" + line 418, "pan.___", state 601, "(cache_dirty_rcu_data[i])" + line 418, "pan.___", state 601, "else" + line 418, "pan.___", state 604, "(1)" + line 418, "pan.___", state 605, "(1)" + line 418, "pan.___", state 605, "(1)" + line 416, "pan.___", state 610, "((i<2))" + line 416, "pan.___", state 610, "((i>=2))" + line 423, "pan.___", state 617, "(1)" + line 423, "pan.___", state 618, "(!(cache_dirty_urcu_gp_ctr))" + line 423, "pan.___", state 618, "else" + line 423, "pan.___", state 621, "(1)" + line 423, "pan.___", state 622, "(1)" + line 423, "pan.___", state 622, "(1)" + line 427, "pan.___", state 630, "(1)" + line 427, "pan.___", state 631, "(!(cache_dirty_urcu_active_readers))" + line 427, "pan.___", state 631, "else" + line 427, "pan.___", state 634, "(1)" + line 427, "pan.___", state 635, "(1)" + line 427, "pan.___", state 635, "(1)" + line 425, "pan.___", state 640, "((i<1))" + line 425, "pan.___", state 640, "((i>=1))" + line 432, "pan.___", state 647, "(1)" + line 432, "pan.___", state 648, "(!(cache_dirty_rcu_ptr))" + line 432, "pan.___", state 648, "else" + line 432, "pan.___", state 651, "(1)" + line 432, "pan.___", state 652, "(1)" + line 432, "pan.___", state 652, "(1)" + line 436, "pan.___", state 660, "(1)" + line 436, "pan.___", state 661, "(!(cache_dirty_rcu_data[i]))" + line 436, "pan.___", state 661, "else" + line 436, "pan.___", state 664, "(1)" + line 436, "pan.___", state 665, "(1)" + line 436, "pan.___", state 665, "(1)" + line 434, "pan.___", state 670, "((i<2))" + line 434, "pan.___", state 670, "((i>=2))" + line 444, "pan.___", state 674, "(1)" + line 444, "pan.___", state 674, "(1)" + line 615, "pan.___", state 677, "cached_urcu_active_readers = (tmp+1)" + line 615, "pan.___", state 678, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 615, "pan.___", state 679, "(1)" + line 405, "pan.___", state 686, "cache_dirty_urcu_gp_ctr = 0" + line 414, "pan.___", state 718, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 732, "cache_dirty_rcu_data[i] = 0" + line 423, "pan.___", state 751, "(1)" + line 432, "pan.___", state 781, "(1)" + line 436, "pan.___", state 794, "(1)" + line 405, "pan.___", state 821, "cache_dirty_urcu_gp_ctr = 0" + line 414, "pan.___", state 853, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 867, "cache_dirty_rcu_data[i] = 0" + line 423, "pan.___", state 886, "(1)" + line 432, "pan.___", state 916, "(1)" + line 436, "pan.___", state 929, "(1)" + line 405, "pan.___", state 950, "cache_dirty_urcu_gp_ctr = 0" + line 414, "pan.___", state 982, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 996, "cache_dirty_rcu_data[i] = 0" + line 423, "pan.___", state 1015, "(1)" + line 432, "pan.___", state 1045, "(1)" + line 436, "pan.___", state 1058, "(1)" + line 246, "pan.___", state 1091, "(1)" + line 254, "pan.___", state 1111, "(1)" + line 258, "pan.___", state 1119, "(1)" + line 749, "pan.___", state 1136, "-end-" + (91 of 1136 states) +unreached in proctype urcu_writer + line 405, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 409, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 414, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 423, "pan.___", state 110, "(1)" + line 427, "pan.___", state 123, "(1)" + line 432, "pan.___", state 140, "(1)" + line 269, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 405, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 409, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 414, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 423, "pan.___", state 303, "(1)" + line 427, "pan.___", state 316, "(1)" + line 432, "pan.___", state 333, "(1)" + line 436, "pan.___", state 346, "(1)" + line 409, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 414, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 427, "pan.___", state 447, "(1)" + line 432, "pan.___", state 464, "(1)" + line 436, "pan.___", state 477, "(1)" + line 405, "pan.___", state 504, "cache_dirty_urcu_gp_ctr = 0" + line 405, "pan.___", state 506, "(1)" + line 405, "pan.___", state 507, "(cache_dirty_urcu_gp_ctr)" + line 405, "pan.___", state 507, "else" + line 405, "pan.___", state 510, "(1)" + line 409, "pan.___", state 518, "cache_dirty_urcu_active_readers = 0" + line 409, "pan.___", state 520, "(1)" + line 409, "pan.___", state 521, "(cache_dirty_urcu_active_readers)" + line 409, "pan.___", state 521, "else" + line 409, "pan.___", state 524, "(1)" + line 409, "pan.___", state 525, "(1)" + line 409, "pan.___", state 525, "(1)" + line 407, "pan.___", state 530, "((i<1))" + line 407, "pan.___", state 530, "((i>=1))" + line 414, "pan.___", state 536, "cache_dirty_rcu_ptr = 0" + line 414, "pan.___", state 538, "(1)" + line 414, "pan.___", state 539, "(cache_dirty_rcu_ptr)" + line 414, "pan.___", state 539, "else" + line 414, "pan.___", state 542, "(1)" + line 414, "pan.___", state 543, "(1)" + line 414, "pan.___", state 543, "(1)" + line 418, "pan.___", state 550, "cache_dirty_rcu_data[i] = 0" + line 418, "pan.___", state 552, "(1)" + line 418, "pan.___", state 553, "(cache_dirty_rcu_data[i])" + line 418, "pan.___", state 553, "else" + line 418, "pan.___", state 556, "(1)" + line 418, "pan.___", state 557, "(1)" + line 418, "pan.___", state 557, "(1)" + line 416, "pan.___", state 562, "((i<2))" + line 416, "pan.___", state 562, "((i>=2))" + line 423, "pan.___", state 569, "(1)" + line 423, "pan.___", state 570, "(!(cache_dirty_urcu_gp_ctr))" + line 423, "pan.___", state 570, "else" + line 423, "pan.___", state 573, "(1)" + line 423, "pan.___", state 574, "(1)" + line 423, "pan.___", state 574, "(1)" + line 427, "pan.___", state 582, "(1)" + line 427, "pan.___", state 583, "(!(cache_dirty_urcu_active_readers))" + line 427, "pan.___", state 583, "else" + line 427, "pan.___", state 586, "(1)" + line 427, "pan.___", state 587, "(1)" + line 427, "pan.___", state 587, "(1)" + line 425, "pan.___", state 592, "((i<1))" + line 425, "pan.___", state 592, "((i>=1))" + line 432, "pan.___", state 599, "(1)" + line 432, "pan.___", state 600, "(!(cache_dirty_rcu_ptr))" + line 432, "pan.___", state 600, "else" + line 432, "pan.___", state 603, "(1)" + line 432, "pan.___", state 604, "(1)" + line 432, "pan.___", state 604, "(1)" + line 436, "pan.___", state 612, "(1)" + line 436, "pan.___", state 613, "(!(cache_dirty_rcu_data[i]))" + line 436, "pan.___", state 613, "else" + line 436, "pan.___", state 616, "(1)" + line 436, "pan.___", state 617, "(1)" + line 436, "pan.___", state 617, "(1)" + line 444, "pan.___", state 626, "(1)" + line 444, "pan.___", state 626, "(1)" + line 409, "pan.___", state 646, "cache_dirty_urcu_active_readers = 0" + line 414, "pan.___", state 664, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 678, "cache_dirty_rcu_data[i] = 0" + line 427, "pan.___", state 710, "(1)" + line 432, "pan.___", state 727, "(1)" + line 436, "pan.___", state 740, "(1)" + line 409, "pan.___", state 775, "cache_dirty_urcu_active_readers = 0" + line 414, "pan.___", state 793, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 807, "cache_dirty_rcu_data[i] = 0" + line 427, "pan.___", state 839, "(1)" + line 432, "pan.___", state 856, "(1)" + line 436, "pan.___", state 869, "(1)" + line 409, "pan.___", state 906, "cache_dirty_urcu_active_readers = 0" + line 414, "pan.___", state 924, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 938, "cache_dirty_rcu_data[i] = 0" + line 427, "pan.___", state 970, "(1)" + line 432, "pan.___", state 987, "(1)" + line 436, "pan.___", state 1000, "(1)" + line 409, "pan.___", state 1040, "cache_dirty_urcu_active_readers = 0" + line 414, "pan.___", state 1058, "cache_dirty_rcu_ptr = 0" + line 418, "pan.___", state 1072, "cache_dirty_rcu_data[i] = 0" + line 427, "pan.___", state 1104, "(1)" + line 432, "pan.___", state 1121, "(1)" + line 436, "pan.___", state 1134, "(1)" + line 269, "pan.___", state 1180, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 1189, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1204, "(1)" + line 281, "pan.___", state 1211, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1227, "(1)" + line 250, "pan.___", state 1235, "(1)" + line 254, "pan.___", state 1247, "(1)" + line 258, "pan.___", state 1255, "(1)" + line 269, "pan.___", state 1286, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 1295, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1308, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 1317, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1333, "(1)" + line 250, "pan.___", state 1341, "(1)" + line 254, "pan.___", state 1353, "(1)" + line 258, "pan.___", state 1361, "(1)" + line 273, "pan.___", state 1387, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1400, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 1409, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1425, "(1)" + line 250, "pan.___", state 1433, "(1)" + line 254, "pan.___", state 1445, "(1)" + line 258, "pan.___", state 1453, "(1)" + line 269, "pan.___", state 1484, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 1493, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1506, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 1515, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1531, "(1)" + line 250, "pan.___", state 1539, "(1)" + line 254, "pan.___", state 1551, "(1)" + line 258, "pan.___", state 1559, "(1)" + line 1124, "pan.___", state 1575, "-end-" + (118 of 1575 states) +unreached in proctype :init: + (0 of 26 states) +unreached in proctype :never: + line 1187, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 67.7 seconds +pan: rate 3447.2308 states/second +pan: avg transition delay 1.5577e-06 usec +cp .input.spin urcu_progress_writer_error.spin.input +cp .input.spin.trail urcu_progress_writer_error.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-min-progress' diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..035bdf7 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input @@ -0,0 +1,1158 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN, READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_OUT) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE + | READ_LOCK_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN + | READ_UNLOCK_OUT, 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT, /* post-dominant */ + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_OUT, /* RAW */ + READ_UNLOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + data_read_first[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input.trail b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..a8b0188 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi-progress-minimal/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,3959 @@ +-2:3:-2 +-4:-4:-4 +1:0:2739 +2:2:1136 +3:2:1141 +4:2:1145 +5:2:1153 +6:2:1157 +7:2:1161 +8:0:2739 +9:1:0 +10:1:5 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+1,1339 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/DEFINES b/urcu-controldataflow-alpha-ipi/DEFINES new file mode 100644 index 0000000..2681f69 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/DEFINES @@ -0,0 +1,18 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow-alpha-ipi/Makefile b/urcu-controldataflow-alpha-ipi/Makefile new file mode 100644 index 0000000..cadd0aa --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 -DCOLLAPSE +#CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + #state-space over 14gb.. + #make urcu_progress_writer | tee urcu_progress_writer.log + #make urcu_progress_reader | tee urcu_progress_reader.log + #make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow-alpha-ipi/asserts.log b/urcu-controldataflow-alpha-ipi/asserts.log new file mode 100644 index 0000000..6efa47c --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/asserts.log @@ -0,0 +1,549 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 6176 States= 1e+06 Transitions= 1.77e+08 Memory= 497.600 t= 218 R= 5e+03 +Depth= 7720 States= 2e+06 Transitions= 3.71e+08 Memory= 528.654 t= 474 R= 4e+03 +Depth= 7720 States= 3e+06 Transitions= 5.8e+08 Memory= 561.955 t= 768 R= 4e+03 +pan: resizing hashtable to -w22.. done +Depth= 7720 States= 4e+06 Transitions= 7.6e+08 Memory= 627.549 t= 999 R= 4e+03 +Depth= 7720 States= 5e+06 Transitions= 9.44e+08 Memory= 662.217 t= 1.24e+03 R= 4e+03 +Depth= 7720 States= 6e+06 Transitions= 1.35e+09 Memory= 699.619 t= 1.79e+03 R= 3e+03 +Depth= 7720 States= 7e+06 Transitions= 1.79e+09 Memory= 735.361 t= 2.39e+03 R= 3e+03 +Depth= 7720 States= 8e+06 Transitions= 2.11e+09 Memory= 773.545 t= 2.83e+03 R= 3e+03 +Depth= 7720 States= 9e+06 Transitions= 2.49e+09 Memory= 811.143 t= 3.37e+03 R= 3e+03 +pan: resizing hashtable to -w24.. done +Depth= 7720 States= 1e+07 Transitions= 2.83e+09 Memory= 973.518 t= 3.8e+03 R= 3e+03 +Depth= 7720 States= 1.1e+07 Transitions= 3.2e+09 Memory= 1011.506 t= 4.27e+03 R= 3e+03 +Depth= 7720 States= 1.2e+07 Transitions= 3.59e+09 Memory= 1049.885 t= 4.78e+03 R= 3e+03 +Depth= 7720 States= 1.3e+07 Transitions= 3.81e+09 Memory= 1087.678 t= 5.06e+03 R= 3e+03 +Depth= 7720 States= 1.4e+07 Transitions= 4.12e+09 Memory= 1122.834 t= 5.46e+03 R= 3e+03 +Depth= 7720 States= 1.5e+07 Transitions= 4.35e+09 Memory= 1159.358 t= 5.75e+03 R= 3e+03 +Depth= 7720 States= 1.6e+07 Transitions= 4.88e+09 Memory= 1195.783 t= 6.46e+03 R= 2e+03 +Depth= 7720 States= 1.7e+07 Transitions= 5.67e+09 Memory= 1231.721 t= 7.51e+03 R= 2e+03 +Depth= 7720 States= 1.8e+07 Transitions= 6.31e+09 Memory= 1268.537 t= 8.37e+03 R= 2e+03 +Depth= 7720 States= 1.9e+07 Transitions= 6.77e+09 Memory= 1306.526 t= 8.98e+03 R= 2e+03 +Depth= 7720 States= 2e+07 Transitions= 7.09e+09 Memory= 1345.393 t= 9.41e+03 R= 2e+03 +Depth= 7720 States= 2.1e+07 Transitions= 7.48e+09 Memory= 1383.576 t= 9.93e+03 R= 2e+03 +Depth= 7720 States= 2.2e+07 Transitions= 7.94e+09 Memory= 1421.955 t= 1.06e+04 R= 2e+03 +Depth= 7720 States= 2.3e+07 Transitions= 8.37e+09 Memory= 1459.846 t= 1.11e+04 R= 2e+03 +Depth= 7720 States= 2.4e+07 Transitions= 8.77e+09 Memory= 1497.346 t= 1.17e+04 R= 2e+03 +Depth= 7720 States= 2.5e+07 Transitions= 9.22e+09 Memory= 1535.529 t= 1.23e+04 R= 2e+03 +Depth= 7720 States= 2.6e+07 Transitions= 9.48e+09 Memory= 1574.006 t= 1.26e+04 R= 2e+03 +Depth= 7720 States= 2.7e+07 Transitions= 9.85e+09 Memory= 1612.385 t= 1.31e+04 R= 2e+03 +Depth= 7720 States= 2.8e+07 Transitions= 1.02e+10 Memory= 1650.666 t= 1.37e+04 R= 2e+03 +Depth= 7940 States= 2.9e+07 Transitions= 1.06e+10 Memory= 1688.752 t= 1.41e+04 R= 2e+03 +Depth= 7998 States= 3e+07 Transitions= 1.09e+10 Memory= 1726.936 t= 1.46e+04 R= 2e+03 +Depth= 7998 States= 3.1e+07 Transitions= 1.13e+10 Memory= 1765.315 t= 1.51e+04 R= 2e+03 +Depth= 7998 States= 3.2e+07 Transitions= 1.16e+10 Memory= 1803.498 t= 1.55e+04 R= 2e+03 +Depth= 7998 States= 3.3e+07 Transitions= 1.19e+10 Memory= 1841.682 t= 1.6e+04 R= 2e+03 +Depth= 7998 States= 3.4e+07 Transitions= 1.23e+10 Memory= 1879.963 t= 1.65e+04 R= 2e+03 +pan: resizing hashtable to -w26.. done +Depth= 7998 States= 3.5e+07 Transitions= 1.26e+10 Memory= 2414.131 t= 1.69e+04 R= 2e+03 +Depth= 7998 States= 3.6e+07 Transitions= 1.29e+10 Memory= 2452.315 t= 1.73e+04 R= 2e+03 +Depth= 7998 States= 3.7e+07 Transitions= 1.32e+10 Memory= 2490.498 t= 1.77e+04 R= 2e+03 +Depth= 7998 States= 3.8e+07 Transitions= 1.35e+10 Memory= 2528.584 t= 1.82e+04 R= 2e+03 +Depth= 7998 States= 3.9e+07 Transitions= 1.39e+10 Memory= 2566.768 t= 1.86e+04 R= 2e+03 +Depth= 7998 States= 4e+07 Transitions= 1.41e+10 Memory= 2604.951 t= 1.89e+04 R= 2e+03 +Depth= 7998 States= 4.1e+07 Transitions= 1.44e+10 Memory= 2643.135 t= 1.93e+04 R= 2e+03 +Depth= 7998 States= 4.2e+07 Transitions= 1.48e+10 Memory= 2682.002 t= 1.98e+04 R= 2e+03 +Depth= 7998 States= 4.3e+07 Transitions= 1.51e+10 Memory= 2720.283 t= 2.03e+04 R= 2e+03 +Depth= 7998 States= 4.4e+07 Transitions= 1.56e+10 Memory= 2759.053 t= 2.09e+04 R= 2e+03 +Depth= 7998 States= 4.5e+07 Transitions= 1.59e+10 Memory= 2797.432 t= 2.13e+04 R= 2e+03 +Depth= 7998 States= 4.6e+07 Transitions= 1.64e+10 Memory= 2836.201 t= 2.19e+04 R= 2e+03 +Depth= 7998 States= 4.7e+07 Transitions= 1.68e+10 Memory= 2875.068 t= 2.24e+04 R= 2e+03 +Depth= 7998 States= 4.8e+07 Transitions= 1.72e+10 Memory= 2913.643 t= 2.29e+04 R= 2e+03 +Depth= 7998 States= 4.9e+07 Transitions= 1.76e+10 Memory= 2952.412 t= 2.34e+04 R= 2e+03 +Depth= 7998 States= 5e+07 Transitions= 1.78e+10 Memory= 2989.619 t= 2.38e+04 R= 2e+03 +Depth= 7998 States= 5.1e+07 Transitions= 1.81e+10 Memory= 3027.901 t= 2.42e+04 R= 2e+03 +Depth= 7998 States= 5.2e+07 Transitions= 1.84e+10 Memory= 3066.279 t= 2.46e+04 R= 2e+03 +Depth= 7998 States= 5.3e+07 Transitions= 1.87e+10 Memory= 3104.463 t= 2.49e+04 R= 2e+03 +Depth= 7998 States= 5.4e+07 Transitions= 1.93e+10 Memory= 3142.842 t= 2.57e+04 R= 2e+03 +Depth= 7998 States= 5.5e+07 Transitions= 2.01e+10 Memory= 3181.026 t= 2.68e+04 R= 2e+03 +Depth= 7998 States= 5.6e+07 Transitions= 2.07e+10 Memory= 3219.990 t= 2.76e+04 R= 2e+03 +Depth= 7998 States= 5.7e+07 Transitions= 2.11e+10 Memory= 3258.467 t= 2.82e+04 R= 2e+03 +Depth= 7998 States= 5.8e+07 Transitions= 2.15e+10 Memory= 3297.236 t= 2.87e+04 R= 2e+03 +Depth= 7998 States= 5.9e+07 Transitions= 2.18e+10 Memory= 3334.151 t= 2.91e+04 R= 2e+03 +Depth= 7998 States= 6e+07 Transitions= 2.22e+10 Memory= 3372.432 t= 2.97e+04 R= 2e+03 +Depth= 7998 States= 6.1e+07 Transitions= 2.27e+10 Memory= 3410.713 t= 3.03e+04 R= 2e+03 +Depth= 7998 States= 6.2e+07 Transitions= 2.32e+10 Memory= 3448.701 t= 3.09e+04 R= 2e+03 +Depth= 7998 States= 6.3e+07 Transitions= 2.35e+10 Memory= 3485.615 t= 3.15e+04 R= 2e+03 +Depth= 7998 States= 6.4e+07 Transitions= 2.38e+10 Memory= 3523.604 t= 3.19e+04 R= 2e+03 +Depth= 7998 States= 6.5e+07 Transitions= 2.42e+10 Memory= 3561.690 t= 3.23e+04 R= 2e+03 +Depth= 7998 States= 6.6e+07 Transitions= 2.46e+10 Memory= 3598.799 t= 3.28e+04 R= 2e+03 +Depth= 7998 States= 6.7e+07 Transitions= 2.49e+10 Memory= 3635.225 t= 3.33e+04 R= 2e+03 +Depth= 7998 States= 6.8e+07 Transitions= 2.53e+10 Memory= 3672.139 t= 3.38e+04 R= 2e+03 +Depth= 7998 States= 6.9e+07 Transitions= 2.56e+10 Memory= 3706.807 t= 3.42e+04 R= 2e+03 +Depth= 7998 States= 7e+07 Transitions= 2.59e+10 Memory= 3743.916 t= 3.47e+04 R= 2e+03 +Depth= 7998 States= 7.1e+07 Transitions= 2.62e+10 Memory= 3781.026 t= 3.51e+04 R= 2e+03 +Depth= 7998 States= 7.2e+07 Transitions= 2.66e+10 Memory= 3818.721 t= 3.56e+04 R= 2e+03 +Depth= 7998 States= 7.3e+07 Transitions= 2.68e+10 Memory= 3855.244 t= 3.59e+04 R= 2e+03 +Depth= 7998 States= 7.4e+07 Transitions= 2.72e+10 Memory= 3892.647 t= 3.64e+04 R= 2e+03 +Depth= 7998 States= 7.5e+07 Transitions= 2.76e+10 Memory= 3930.049 t= 3.69e+04 R= 2e+03 +Depth= 7998 States= 7.6e+07 Transitions= 2.78e+10 Memory= 3966.963 t= 3.72e+04 R= 2e+03 +Depth= 7998 States= 7.7e+07 Transitions= 2.81e+10 Memory= 4003.975 t= 3.77e+04 R= 2e+03 +Depth= 7998 States= 7.8e+07 Transitions= 2.84e+10 Memory= 4041.084 t= 3.8e+04 R= 2e+03 +Depth= 7998 States= 7.9e+07 Transitions= 2.87e+10 Memory= 4078.584 t= 3.84e+04 R= 2e+03 +Depth= 7998 States= 8e+07 Transitions= 2.91e+10 Memory= 4114.815 t= 3.9e+04 R= 2e+03 +Depth= 7998 States= 8.1e+07 Transitions= 2.95e+10 Memory= 4151.240 t= 3.95e+04 R= 2e+03 +Depth= 7998 States= 8.2e+07 Transitions= 2.99e+10 Memory= 4189.131 t= 4e+04 R= 2e+03 +Depth= 7998 States= 8.3e+07 Transitions= 3.03e+10 Memory= 4226.533 t= 4.06e+04 R= 2e+03 +Depth= 7998 States= 8.4e+07 Transitions= 3.07e+10 Memory= 4264.912 t= 4.11e+04 R= 2e+03 +Depth= 7998 States= 8.5e+07 Transitions= 3.11e+10 Memory= 4302.998 t= 4.16e+04 R= 2e+03 +Depth= 7998 States= 8.6e+07 Transitions= 3.15e+10 Memory= 4340.693 t= 4.21e+04 R= 2e+03 +Depth= 7998 States= 8.7e+07 Transitions= 3.19e+10 Memory= 4378.877 t= 4.27e+04 R= 2e+03 +Depth= 7998 States= 8.8e+07 Transitions= 3.23e+10 Memory= 4417.061 t= 4.32e+04 R= 2e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 72 byte, depth reached 7998, errors: 0 + 88716525 states, stored +3.2432758e+10 states, matched +3.2521475e+10 transitions (= stored+matched) +1.8325967e+11 atomic steps +hash conflicts: 1.7127982e+10 (resolved) + +Stats on memory usage (in Megabytes): + 8460.667 equivalent memory usage for states (stored*(State-vector + overhead)) + 3474.757 actual memory usage for states (compression: 41.07%) + state-vector as stored = 13 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 4444.111 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 606546 5194 3779 2 ] +unreached in proctype urcu_reader + line 267, ".input.spin", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 275, ".input.spin", state 79, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 88, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 104, "(1)" + line 248, ".input.spin", state 112, "(1)" + line 252, ".input.spin", state 124, "(1)" + line 256, ".input.spin", state 132, "(1)" + line 406, ".input.spin", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 190, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 204, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 223, "(1)" + line 433, ".input.spin", state 253, "(1)" + line 437, ".input.spin", state 266, "(1)" + line 686, ".input.spin", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 406, ".input.spin", state 294, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 326, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 340, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 359, "(1)" + line 433, ".input.spin", state 389, "(1)" + line 437, ".input.spin", state 402, "(1)" + line 406, ".input.spin", state 423, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 455, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 469, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 488, "(1)" + line 433, ".input.spin", state 518, "(1)" + line 437, ".input.spin", state 531, "(1)" + line 406, ".input.spin", state 554, "cache_dirty_urcu_gp_ctr = 0" + line 406, ".input.spin", state 556, "(1)" + line 406, ".input.spin", state 557, "(cache_dirty_urcu_gp_ctr)" + line 406, ".input.spin", state 557, "else" + line 406, ".input.spin", state 560, "(1)" + line 410, ".input.spin", state 568, "cache_dirty_urcu_active_readers = 0" + line 410, ".input.spin", state 570, "(1)" + line 410, ".input.spin", state 571, "(cache_dirty_urcu_active_readers)" + line 410, ".input.spin", state 571, "else" + line 410, ".input.spin", state 574, "(1)" + line 410, ".input.spin", state 575, "(1)" + line 410, ".input.spin", state 575, "(1)" + line 408, ".input.spin", state 580, "((i<1))" + line 408, ".input.spin", state 580, "((i>=1))" + line 415, ".input.spin", state 586, "cache_dirty_rcu_ptr = 0" + line 415, ".input.spin", state 588, "(1)" + line 415, ".input.spin", state 589, "(cache_dirty_rcu_ptr)" + line 415, ".input.spin", state 589, "else" + line 415, ".input.spin", state 592, "(1)" + line 415, ".input.spin", state 593, "(1)" + line 415, ".input.spin", state 593, "(1)" + line 419, ".input.spin", state 600, "cache_dirty_rcu_data[i] = 0" + line 419, ".input.spin", state 602, "(1)" + line 419, ".input.spin", state 603, "(cache_dirty_rcu_data[i])" + line 419, ".input.spin", state 603, "else" + line 419, ".input.spin", state 606, "(1)" + line 419, ".input.spin", state 607, "(1)" + line 419, ".input.spin", state 607, "(1)" + line 417, ".input.spin", state 612, "((i<2))" + line 417, ".input.spin", state 612, "((i>=2))" + line 424, ".input.spin", state 619, "(1)" + line 424, ".input.spin", state 620, "(!(cache_dirty_urcu_gp_ctr))" + line 424, ".input.spin", state 620, "else" + line 424, ".input.spin", state 623, "(1)" + line 424, ".input.spin", state 624, "(1)" + line 424, ".input.spin", state 624, "(1)" + line 428, ".input.spin", state 632, "(1)" + line 428, ".input.spin", state 633, "(!(cache_dirty_urcu_active_readers))" + line 428, ".input.spin", state 633, "else" + line 428, ".input.spin", state 636, "(1)" + line 428, ".input.spin", state 637, "(1)" + line 428, ".input.spin", state 637, "(1)" + line 426, ".input.spin", state 642, "((i<1))" + line 426, ".input.spin", state 642, "((i>=1))" + line 433, ".input.spin", state 649, "(1)" + line 433, ".input.spin", state 650, "(!(cache_dirty_rcu_ptr))" + line 433, ".input.spin", state 650, "else" + line 433, ".input.spin", state 653, "(1)" + line 433, ".input.spin", state 654, "(1)" + line 433, ".input.spin", state 654, "(1)" + line 437, ".input.spin", state 662, "(1)" + line 437, ".input.spin", state 663, "(!(cache_dirty_rcu_data[i]))" + line 437, ".input.spin", state 663, "else" + line 437, ".input.spin", state 666, "(1)" + line 437, ".input.spin", state 667, "(1)" + line 437, ".input.spin", state 667, "(1)" + line 435, ".input.spin", state 672, "((i<2))" + line 435, ".input.spin", state 672, "((i>=2))" + line 445, ".input.spin", state 676, "(1)" + line 445, ".input.spin", state 676, "(1)" + line 686, ".input.spin", state 679, "cached_urcu_active_readers = (tmp+1)" + line 686, ".input.spin", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 686, ".input.spin", state 681, "(1)" + line 406, ".input.spin", state 688, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 720, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 734, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 753, "(1)" + line 433, ".input.spin", state 783, "(1)" + line 437, ".input.spin", state 796, "(1)" + line 406, ".input.spin", state 824, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 856, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 870, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 889, "(1)" + line 433, ".input.spin", state 919, "(1)" + line 437, ".input.spin", state 932, "(1)" + line 406, ".input.spin", state 953, "cache_dirty_urcu_gp_ctr = 0" + line 406, ".input.spin", state 955, "(1)" + line 406, ".input.spin", state 956, "(cache_dirty_urcu_gp_ctr)" + line 406, ".input.spin", state 956, "else" + line 406, ".input.spin", state 959, "(1)" + line 410, ".input.spin", state 967, "cache_dirty_urcu_active_readers = 0" + line 410, ".input.spin", state 969, "(1)" + line 410, ".input.spin", state 970, "(cache_dirty_urcu_active_readers)" + line 410, ".input.spin", state 970, "else" + line 410, ".input.spin", state 973, "(1)" + line 410, ".input.spin", state 974, "(1)" + line 410, ".input.spin", state 974, "(1)" + line 408, ".input.spin", state 979, "((i<1))" + line 408, ".input.spin", state 979, "((i>=1))" + line 415, ".input.spin", state 985, "cache_dirty_rcu_ptr = 0" + line 415, ".input.spin", state 987, "(1)" + line 415, ".input.spin", state 988, "(cache_dirty_rcu_ptr)" + line 415, ".input.spin", state 988, "else" + line 415, ".input.spin", state 991, "(1)" + line 415, ".input.spin", state 992, "(1)" + line 415, ".input.spin", state 992, "(1)" + line 419, ".input.spin", state 999, "cache_dirty_rcu_data[i] = 0" + line 419, ".input.spin", state 1001, "(1)" + line 419, ".input.spin", state 1002, "(cache_dirty_rcu_data[i])" + line 419, ".input.spin", state 1002, "else" + line 419, ".input.spin", state 1005, "(1)" + line 419, ".input.spin", state 1006, "(1)" + line 419, ".input.spin", state 1006, "(1)" + line 417, ".input.spin", state 1011, "((i<2))" + line 417, ".input.spin", state 1011, "((i>=2))" + line 424, ".input.spin", state 1018, "(1)" + line 424, ".input.spin", state 1019, "(!(cache_dirty_urcu_gp_ctr))" + line 424, ".input.spin", state 1019, "else" + line 424, ".input.spin", state 1022, "(1)" + line 424, ".input.spin", state 1023, "(1)" + line 424, ".input.spin", state 1023, "(1)" + line 428, ".input.spin", state 1031, "(1)" + line 428, ".input.spin", state 1032, "(!(cache_dirty_urcu_active_readers))" + line 428, ".input.spin", state 1032, "else" + line 428, ".input.spin", state 1035, "(1)" + line 428, ".input.spin", state 1036, "(1)" + line 428, ".input.spin", state 1036, "(1)" + line 426, ".input.spin", state 1041, "((i<1))" + line 426, ".input.spin", state 1041, "((i>=1))" + line 433, ".input.spin", state 1048, "(1)" + line 433, ".input.spin", state 1049, "(!(cache_dirty_rcu_ptr))" + line 433, ".input.spin", state 1049, "else" + line 433, ".input.spin", state 1052, "(1)" + line 433, ".input.spin", state 1053, "(1)" + line 433, ".input.spin", state 1053, "(1)" + line 437, ".input.spin", state 1061, "(1)" + line 437, ".input.spin", state 1062, "(!(cache_dirty_rcu_data[i]))" + line 437, ".input.spin", state 1062, "else" + line 437, ".input.spin", state 1065, "(1)" + line 437, ".input.spin", state 1066, "(1)" + line 437, ".input.spin", state 1066, "(1)" + line 435, ".input.spin", state 1071, "((i<2))" + line 435, ".input.spin", state 1071, "((i>=2))" + line 445, ".input.spin", state 1075, "(1)" + line 445, ".input.spin", state 1075, "(1)" + line 694, ".input.spin", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 406, ".input.spin", state 1084, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 1116, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 1130, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 1149, "(1)" + line 433, ".input.spin", state 1179, "(1)" + line 437, ".input.spin", state 1192, "(1)" + line 406, ".input.spin", state 1216, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 1248, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 1262, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 1281, "(1)" + line 433, ".input.spin", state 1311, "(1)" + line 437, ".input.spin", state 1324, "(1)" + line 406, ".input.spin", state 1349, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 1381, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 1395, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 1414, "(1)" + line 433, ".input.spin", state 1444, "(1)" + line 437, ".input.spin", state 1457, "(1)" + line 406, ".input.spin", state 1478, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 1510, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 1524, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 1543, "(1)" + line 433, ".input.spin", state 1573, "(1)" + line 437, ".input.spin", state 1586, "(1)" + line 406, ".input.spin", state 1612, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 1644, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 1658, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 1677, "(1)" + line 433, ".input.spin", state 1707, "(1)" + line 437, ".input.spin", state 1720, "(1)" + line 406, ".input.spin", state 1741, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 1773, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 1787, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 1806, "(1)" + line 433, ".input.spin", state 1836, "(1)" + line 437, ".input.spin", state 1849, "(1)" + line 406, ".input.spin", state 1873, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 1905, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 1919, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 1938, "(1)" + line 433, ".input.spin", state 1968, "(1)" + line 437, ".input.spin", state 1981, "(1)" + line 733, ".input.spin", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 406, ".input.spin", state 2009, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 2041, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 2055, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 2074, "(1)" + line 433, ".input.spin", state 2104, "(1)" + line 437, ".input.spin", state 2117, "(1)" + line 406, ".input.spin", state 2138, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 2170, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 2184, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 2203, "(1)" + line 433, ".input.spin", state 2233, "(1)" + line 437, ".input.spin", state 2246, "(1)" + line 406, ".input.spin", state 2269, "cache_dirty_urcu_gp_ctr = 0" + line 406, ".input.spin", state 2271, "(1)" + line 406, ".input.spin", state 2272, "(cache_dirty_urcu_gp_ctr)" + line 406, ".input.spin", state 2272, "else" + line 406, ".input.spin", state 2275, "(1)" + line 410, ".input.spin", state 2283, "cache_dirty_urcu_active_readers = 0" + line 410, ".input.spin", state 2285, "(1)" + line 410, ".input.spin", state 2286, "(cache_dirty_urcu_active_readers)" + line 410, ".input.spin", state 2286, "else" + line 410, ".input.spin", state 2289, "(1)" + line 410, ".input.spin", state 2290, "(1)" + line 410, ".input.spin", state 2290, "(1)" + line 408, ".input.spin", state 2295, "((i<1))" + line 408, ".input.spin", state 2295, "((i>=1))" + line 415, ".input.spin", state 2301, "cache_dirty_rcu_ptr = 0" + line 415, ".input.spin", state 2303, "(1)" + line 415, ".input.spin", state 2304, "(cache_dirty_rcu_ptr)" + line 415, ".input.spin", state 2304, "else" + line 415, ".input.spin", state 2307, "(1)" + line 415, ".input.spin", state 2308, "(1)" + line 415, ".input.spin", state 2308, "(1)" + line 419, ".input.spin", state 2315, "cache_dirty_rcu_data[i] = 0" + line 419, ".input.spin", state 2317, "(1)" + line 419, ".input.spin", state 2318, "(cache_dirty_rcu_data[i])" + line 419, ".input.spin", state 2318, "else" + line 419, ".input.spin", state 2321, "(1)" + line 419, ".input.spin", state 2322, "(1)" + line 419, ".input.spin", state 2322, "(1)" + line 417, ".input.spin", state 2327, "((i<2))" + line 417, ".input.spin", state 2327, "((i>=2))" + line 424, ".input.spin", state 2334, "(1)" + line 424, ".input.spin", state 2335, "(!(cache_dirty_urcu_gp_ctr))" + line 424, ".input.spin", state 2335, "else" + line 424, ".input.spin", state 2338, "(1)" + line 424, ".input.spin", state 2339, "(1)" + line 424, ".input.spin", state 2339, "(1)" + line 428, ".input.spin", state 2347, "(1)" + line 428, ".input.spin", state 2348, "(!(cache_dirty_urcu_active_readers))" + line 428, ".input.spin", state 2348, "else" + line 428, ".input.spin", state 2351, "(1)" + line 428, ".input.spin", state 2352, "(1)" + line 428, ".input.spin", state 2352, "(1)" + line 426, ".input.spin", state 2357, "((i<1))" + line 426, ".input.spin", state 2357, "((i>=1))" + line 433, ".input.spin", state 2364, "(1)" + line 433, ".input.spin", state 2365, "(!(cache_dirty_rcu_ptr))" + line 433, ".input.spin", state 2365, "else" + line 433, ".input.spin", state 2368, "(1)" + line 433, ".input.spin", state 2369, "(1)" + line 433, ".input.spin", state 2369, "(1)" + line 437, ".input.spin", state 2377, "(1)" + line 437, ".input.spin", state 2378, "(!(cache_dirty_rcu_data[i]))" + line 437, ".input.spin", state 2378, "else" + line 437, ".input.spin", state 2381, "(1)" + line 437, ".input.spin", state 2382, "(1)" + line 437, ".input.spin", state 2382, "(1)" + line 435, ".input.spin", state 2387, "((i<2))" + line 435, ".input.spin", state 2387, "((i>=2))" + line 445, ".input.spin", state 2391, "(1)" + line 445, ".input.spin", state 2391, "(1)" + line 733, ".input.spin", state 2394, "cached_urcu_active_readers = (tmp+1)" + line 733, ".input.spin", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 733, ".input.spin", state 2396, "(1)" + line 406, ".input.spin", state 2403, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 2435, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 2449, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 2468, "(1)" + line 433, ".input.spin", state 2498, "(1)" + line 437, ".input.spin", state 2511, "(1)" + line 406, ".input.spin", state 2538, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 2570, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 2584, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 2603, "(1)" + line 433, ".input.spin", state 2633, "(1)" + line 437, ".input.spin", state 2646, "(1)" + line 406, ".input.spin", state 2667, "cache_dirty_urcu_gp_ctr = 0" + line 415, ".input.spin", state 2699, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 2713, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 2732, "(1)" + line 433, ".input.spin", state 2762, "(1)" + line 437, ".input.spin", state 2775, "(1)" + line 244, ".input.spin", state 2808, "(1)" + line 252, ".input.spin", state 2828, "(1)" + line 256, ".input.spin", state 2836, "(1)" + line 244, ".input.spin", state 2851, "(1)" + line 252, ".input.spin", state 2871, "(1)" + line 256, ".input.spin", state 2879, "(1)" + line 928, ".input.spin", state 2896, "-end-" + (245 of 2896 states) +unreached in proctype urcu_writer + line 406, ".input.spin", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 410, ".input.spin", state 59, "cache_dirty_urcu_active_readers = 0" + line 415, ".input.spin", state 77, "cache_dirty_rcu_ptr = 0" + line 424, ".input.spin", state 110, "(1)" + line 428, ".input.spin", state 123, "(1)" + line 433, ".input.spin", state 140, "(1)" + line 267, ".input.spin", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 185, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 198, "cache_dirty_rcu_ptr = 0" + line 406, ".input.spin", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 410, ".input.spin", state 252, "cache_dirty_urcu_active_readers = 0" + line 415, ".input.spin", state 270, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 284, "cache_dirty_rcu_data[i] = 0" + line 424, ".input.spin", state 303, "(1)" + line 428, ".input.spin", state 316, "(1)" + line 433, ".input.spin", state 333, "(1)" + line 437, ".input.spin", state 346, "(1)" + line 410, ".input.spin", state 383, "cache_dirty_urcu_active_readers = 0" + line 415, ".input.spin", state 401, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 415, "cache_dirty_rcu_data[i] = 0" + line 428, ".input.spin", state 447, "(1)" + line 433, ".input.spin", state 464, "(1)" + line 437, ".input.spin", state 477, "(1)" + line 410, ".input.spin", state 522, "cache_dirty_urcu_active_readers = 0" + line 415, ".input.spin", state 540, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 554, "cache_dirty_rcu_data[i] = 0" + line 428, ".input.spin", state 586, "(1)" + line 433, ".input.spin", state 603, "(1)" + line 437, ".input.spin", state 616, "(1)" + line 410, ".input.spin", state 651, "cache_dirty_urcu_active_readers = 0" + line 415, ".input.spin", state 669, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 683, "cache_dirty_rcu_data[i] = 0" + line 428, ".input.spin", state 715, "(1)" + line 433, ".input.spin", state 732, "(1)" + line 437, ".input.spin", state 745, "(1)" + line 410, ".input.spin", state 782, "cache_dirty_urcu_active_readers = 0" + line 415, ".input.spin", state 800, "cache_dirty_rcu_ptr = 0" + line 419, ".input.spin", state 814, "cache_dirty_rcu_data[i] = 0" + line 428, ".input.spin", state 846, "(1)" + line 433, ".input.spin", state 863, "(1)" + line 437, ".input.spin", state 876, "(1)" + line 267, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 940, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 955, "(1)" + line 279, ".input.spin", state 962, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 978, "(1)" + line 248, ".input.spin", state 986, "(1)" + line 252, ".input.spin", state 998, "(1)" + line 256, ".input.spin", state 1006, "(1)" + line 267, ".input.spin", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1046, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1059, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1068, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1084, "(1)" + line 248, ".input.spin", state 1092, "(1)" + line 252, ".input.spin", state 1104, "(1)" + line 256, ".input.spin", state 1112, "(1)" + line 271, ".input.spin", state 1138, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1151, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1160, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1176, "(1)" + line 248, ".input.spin", state 1184, "(1)" + line 252, ".input.spin", state 1196, "(1)" + line 256, ".input.spin", state 1204, "(1)" + line 267, ".input.spin", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1244, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1257, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1266, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1282, "(1)" + line 248, ".input.spin", state 1290, "(1)" + line 252, ".input.spin", state 1302, "(1)" + line 256, ".input.spin", state 1310, "(1)" + line 271, ".input.spin", state 1336, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1349, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1358, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1374, "(1)" + line 248, ".input.spin", state 1382, "(1)" + line 252, ".input.spin", state 1394, "(1)" + line 256, ".input.spin", state 1402, "(1)" + line 267, ".input.spin", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1442, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1455, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1464, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1480, "(1)" + line 248, ".input.spin", state 1488, "(1)" + line 252, ".input.spin", state 1500, "(1)" + line 256, ".input.spin", state 1508, "(1)" + line 271, ".input.spin", state 1534, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1547, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1556, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1572, "(1)" + line 248, ".input.spin", state 1580, "(1)" + line 252, ".input.spin", state 1592, "(1)" + line 256, ".input.spin", state 1600, "(1)" + line 267, ".input.spin", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 271, ".input.spin", state 1640, "cache_dirty_urcu_active_readers = 0" + line 275, ".input.spin", state 1653, "cache_dirty_rcu_ptr = 0" + line 279, ".input.spin", state 1662, "cache_dirty_rcu_data[i] = 0" + line 244, ".input.spin", state 1678, "(1)" + line 248, ".input.spin", state 1686, "(1)" + line 252, ".input.spin", state 1698, "(1)" + line 256, ".input.spin", state 1706, "(1)" + line 1303, ".input.spin", state 1722, "-end-" + (103 of 1722 states) +unreached in proctype :init: + (0 of 28 states) + +pan: elapsed time 4.35e+04 seconds +pan: rate 2039.1355 states/second +pan: avg transition delay 1.3378e-06 usec +cp .input.spin asserts.spin.input +cp .input.spin.trail asserts.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/urcu-controldataflow-alpha-ipi/asserts.spin.input b/urcu-controldataflow-alpha-ipi/asserts.spin.input new file mode 100644 index 0000000..ca70e6c --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/asserts.spin.input @@ -0,0 +1,1339 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/references.txt b/urcu-controldataflow-alpha-ipi/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow-alpha-ipi/urcu.sh b/urcu-controldataflow-alpha-ipi/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow-alpha-ipi/urcu.spin b/urcu-controldataflow-alpha-ipi/urcu.spin new file mode 100644 index 0000000..8075506 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu.spin @@ -0,0 +1,1321 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/urcu_free.log b/urcu-controldataflow-alpha-ipi/urcu_free.log new file mode 100644 index 0000000..6b6e98b --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free.log @@ -0,0 +1,560 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1361) +Depth= 8053 States= 1e+06 Transitions= 1.77e+08 Memory= 513.029 t= 265 R= 4e+03 +Depth= 9797 States= 2e+06 Transitions= 3.71e+08 Memory= 559.416 t= 575 R= 3e+03 +Depth= 9797 States= 3e+06 Transitions= 5.8e+08 Memory= 605.901 t= 922 R= 3e+03 +pan: resizing hashtable to -w22.. done +Depth= 9797 States= 4e+06 Transitions= 7.6e+08 Memory= 682.920 t= 1.2e+03 R= 3e+03 +Depth= 9797 States= 5e+06 Transitions= 9.44e+08 Memory= 728.721 t= 1.48e+03 R= 3e+03 +Depth= 9797 States= 6e+06 Transitions= 1.35e+09 Memory= 775.303 t= 2.13e+03 R= 3e+03 +Depth= 9797 States= 7e+06 Transitions= 1.79e+09 Memory= 821.885 t= 2.85e+03 R= 2e+03 +Depth= 9797 States= 8e+06 Transitions= 2.11e+09 Memory= 868.076 t= 3.36e+03 R= 2e+03 +Depth= 9797 States= 9e+06 Transitions= 2.49e+09 Memory= 914.658 t= 4.01e+03 R= 2e+03 +pan: resizing hashtable to -w24.. done +Depth= 9797 States= 1e+07 Transitions= 2.83e+09 Memory= 1085.529 t= 4.52e+03 R= 2e+03 +Depth= 9797 States= 1.1e+07 Transitions= 3.2e+09 Memory= 1132.697 t= 5.08e+03 R= 2e+03 +Depth= 9797 States= 1.2e+07 Transitions= 3.59e+09 Memory= 1179.670 t= 5.69e+03 R= 2e+03 +Depth= 9797 States= 1.3e+07 Transitions= 3.81e+09 Memory= 1226.838 t= 6.03e+03 R= 2e+03 +Depth= 9797 States= 1.4e+07 Transitions= 4.12e+09 Memory= 1273.029 t= 6.5e+03 R= 2e+03 +Depth= 9797 States= 1.5e+07 Transitions= 4.35e+09 Memory= 1319.123 t= 6.85e+03 R= 2e+03 +Depth= 9797 States= 1.6e+07 Transitions= 4.88e+09 Memory= 1365.608 t= 7.7e+03 R= 2e+03 +Depth= 9797 States= 1.7e+07 Transitions= 5.67e+09 Memory= 1411.506 t= 8.95e+03 R= 2e+03 +Depth= 9797 States= 1.8e+07 Transitions= 6.31e+09 Memory= 1458.479 t= 9.98e+03 R= 2e+03 +Depth= 9797 States= 1.9e+07 Transitions= 6.77e+09 Memory= 1504.963 t= 1.07e+04 R= 2e+03 +Depth= 9797 States= 2e+07 Transitions= 7.09e+09 Memory= 1552.131 t= 1.12e+04 R= 2e+03 +Depth= 9797 States= 2.1e+07 Transitions= 7.48e+09 Memory= 1598.615 t= 1.18e+04 R= 2e+03 +Depth= 9797 States= 2.2e+07 Transitions= 7.94e+09 Memory= 1645.295 t= 1.26e+04 R= 2e+03 +Depth= 9797 States= 2.3e+07 Transitions= 8.37e+09 Memory= 1691.486 t= 1.33e+04 R= 2e+03 +Depth= 9797 States= 2.4e+07 Transitions= 8.77e+09 Memory= 1737.678 t= 1.39e+04 R= 2e+03 +Depth= 9797 States= 2.5e+07 Transitions= 9.22e+09 Memory= 1783.967 t= 1.46e+04 R= 2e+03 +Depth= 9797 States= 2.6e+07 Transitions= 9.48e+09 Memory= 1830.061 t= 1.5e+04 R= 2e+03 +Depth= 9797 States= 2.7e+07 Transitions= 9.85e+09 Memory= 1876.350 t= 1.56e+04 R= 2e+03 +Depth= 9797 States= 2.8e+07 Transitions= 1.02e+10 Memory= 1922.639 t= 1.62e+04 R= 2e+03 +Depth= 9919 States= 2.9e+07 Transitions= 1.06e+10 Memory= 1968.537 t= 1.68e+04 R= 2e+03 +Depth= 9963 States= 3e+07 Transitions= 1.09e+10 Memory= 2014.338 t= 1.74e+04 R= 2e+03 +Depth= 9963 States= 3.1e+07 Transitions= 1.13e+10 Memory= 2060.334 t= 1.79e+04 R= 2e+03 +Depth= 9963 States= 3.2e+07 Transitions= 1.16e+10 Memory= 2106.233 t= 1.85e+04 R= 2e+03 +Depth= 9963 States= 3.3e+07 Transitions= 1.19e+10 Memory= 2152.033 t= 1.9e+04 R= 2e+03 +Depth= 9963 States= 3.4e+07 Transitions= 1.23e+10 Memory= 2198.029 t= 1.96e+04 R= 2e+03 +pan: resizing hashtable to -w26.. done +Depth= 9963 States= 3.5e+07 Transitions= 1.26e+10 Memory= 2739.912 t= 2e+04 R= 2e+03 +Depth= 9963 States= 3.6e+07 Transitions= 1.29e+10 Memory= 2785.713 t= 2.06e+04 R= 2e+03 +Depth= 9963 States= 3.7e+07 Transitions= 1.32e+10 Memory= 2831.416 t= 2.1e+04 R= 2e+03 +Depth= 9963 States= 3.8e+07 Transitions= 1.35e+10 Memory= 2877.217 t= 2.15e+04 R= 2e+03 +Depth= 9963 States= 3.9e+07 Transitions= 1.39e+10 Memory= 2923.018 t= 2.2e+04 R= 2e+03 +Depth= 9963 States= 4e+07 Transitions= 1.41e+10 Memory= 2968.818 t= 2.24e+04 R= 2e+03 +Depth= 9963 States= 4.1e+07 Transitions= 1.44e+10 Memory= 3014.717 t= 2.29e+04 R= 2e+03 +Depth= 9963 States= 4.2e+07 Transitions= 1.48e+10 Memory= 3061.299 t= 2.35e+04 R= 2e+03 +Depth= 9963 States= 4.3e+07 Transitions= 1.51e+10 Memory= 3107.295 t= 2.4e+04 R= 2e+03 +Depth= 9963 States= 4.4e+07 Transitions= 1.56e+10 Memory= 3153.779 t= 2.48e+04 R= 2e+03 +Depth= 9963 States= 4.5e+07 Transitions= 1.59e+10 Memory= 3199.873 t= 2.53e+04 R= 2e+03 +Depth= 9963 States= 4.6e+07 Transitions= 1.64e+10 Memory= 3246.553 t= 2.59e+04 R= 2e+03 +Depth= 9963 States= 4.7e+07 Transitions= 1.68e+10 Memory= 3293.623 t= 2.66e+04 R= 2e+03 +Depth= 9963 States= 4.8e+07 Transitions= 1.72e+10 Memory= 3339.912 t= 2.72e+04 R= 2e+03 +Depth= 9963 States= 4.9e+07 Transitions= 1.76e+10 Memory= 3386.494 t= 2.78e+04 R= 2e+03 +Depth= 9963 States= 5e+07 Transitions= 1.78e+10 Memory= 3433.076 t= 2.82e+04 R= 2e+03 +Depth= 9963 States= 5.1e+07 Transitions= 1.81e+10 Memory= 3479.072 t= 2.87e+04 R= 2e+03 +Depth= 9963 States= 5.2e+07 Transitions= 1.84e+10 Memory= 3525.068 t= 2.91e+04 R= 2e+03 +Depth= 9963 States= 5.3e+07 Transitions= 1.87e+10 Memory= 3570.869 t= 2.95e+04 R= 2e+03 +Depth= 9963 States= 5.4e+07 Transitions= 1.93e+10 Memory= 3616.865 t= 3.05e+04 R= 2e+03 +Depth= 9963 States= 5.5e+07 Transitions= 2.01e+10 Memory= 3662.764 t= 3.17e+04 R= 2e+03 +Depth= 9963 States= 5.6e+07 Transitions= 2.07e+10 Memory= 3709.541 t= 3.27e+04 R= 2e+03 +Depth= 9963 States= 5.7e+07 Transitions= 2.11e+10 Memory= 3755.635 t= 3.34e+04 R= 2e+03 +Depth= 9963 States= 5.8e+07 Transitions= 2.15e+10 Memory= 3802.315 t= 3.4e+04 R= 2e+03 +Depth= 9963 States= 5.9e+07 Transitions= 2.18e+10 Memory= 3848.408 t= 3.45e+04 R= 2e+03 +Depth= 9963 States= 6e+07 Transitions= 2.22e+10 Memory= 3894.404 t= 3.52e+04 R= 2e+03 +Depth= 9963 States= 6.1e+07 Transitions= 2.27e+10 Memory= 3940.596 t= 3.59e+04 R= 2e+03 +Depth= 9963 States= 6.2e+07 Transitions= 2.32e+10 Memory= 3986.494 t= 3.66e+04 R= 2e+03 +Depth= 9963 States= 6.3e+07 Transitions= 2.35e+10 Memory= 4032.295 t= 3.73e+04 R= 2e+03 +Depth= 9963 States= 6.4e+07 Transitions= 2.38e+10 Memory= 4078.193 t= 3.77e+04 R= 2e+03 +Depth= 9963 States= 6.5e+07 Transitions= 2.42e+10 Memory= 4124.092 t= 3.83e+04 R= 2e+03 +Depth= 9963 States= 6.6e+07 Transitions= 2.46e+10 Memory= 4169.990 t= 3.89e+04 R= 2e+03 +Depth= 9963 States= 6.7e+07 Transitions= 2.49e+10 Memory= 4215.791 t= 3.94e+04 R= 2e+03 +Depth= 9963 States= 6.8e+07 Transitions= 2.53e+10 Memory= 4261.494 t= 4e+04 R= 2e+03 +Depth= 9963 States= 6.9e+07 Transitions= 2.56e+10 Memory= 4307.295 t= 4.04e+04 R= 2e+03 +Depth= 9963 States= 7e+07 Transitions= 2.59e+10 Memory= 4353.096 t= 4.11e+04 R= 2e+03 +Depth= 9963 States= 7.1e+07 Transitions= 2.62e+10 Memory= 4398.897 t= 4.15e+04 R= 2e+03 +Depth= 9963 States= 7.2e+07 Transitions= 2.66e+10 Memory= 4444.697 t= 4.21e+04 R= 2e+03 +Depth= 9963 States= 7.3e+07 Transitions= 2.68e+10 Memory= 4490.498 t= 4.25e+04 R= 2e+03 +Depth= 9963 States= 7.4e+07 Transitions= 2.72e+10 Memory= 4536.299 t= 4.31e+04 R= 2e+03 +Depth= 9963 States= 7.5e+07 Transitions= 2.76e+10 Memory= 4582.002 t= 4.37e+04 R= 2e+03 +Depth= 9963 States= 7.6e+07 Transitions= 2.78e+10 Memory= 4627.803 t= 4.41e+04 R= 2e+03 +Depth= 9963 States= 7.7e+07 Transitions= 2.81e+10 Memory= 4673.604 t= 4.46e+04 R= 2e+03 +Depth= 9963 States= 7.8e+07 Transitions= 2.84e+10 Memory= 4719.404 t= 4.5e+04 R= 2e+03 +Depth= 9963 States= 7.9e+07 Transitions= 2.87e+10 Memory= 4765.205 t= 4.55e+04 R= 2e+03 +Depth= 9963 States= 8e+07 Transitions= 2.91e+10 Memory= 4811.006 t= 4.61e+04 R= 2e+03 +Depth= 9963 States= 8.1e+07 Transitions= 2.95e+10 Memory= 4856.807 t= 4.68e+04 R= 2e+03 +Depth= 9963 States= 8.2e+07 Transitions= 2.99e+10 Memory= 4902.608 t= 4.74e+04 R= 2e+03 +Depth= 9963 States= 8.3e+07 Transitions= 3.03e+10 Memory= 4948.701 t= 4.8e+04 R= 2e+03 +Depth= 9963 States= 8.4e+07 Transitions= 3.07e+10 Memory= 4995.283 t= 4.87e+04 R= 2e+03 +Depth= 9963 States= 8.5e+07 Transitions= 3.11e+10 Memory= 5041.084 t= 4.93e+04 R= 2e+03 +Depth= 9963 States= 8.6e+07 Transitions= 3.15e+10 Memory= 5087.276 t= 4.98e+04 R= 2e+03 +Depth= 9963 States= 8.7e+07 Transitions= 3.19e+10 Memory= 5133.369 t= 5.06e+04 R= 2e+03 +Depth= 9963 States= 8.8e+07 Transitions= 3.23e+10 Memory= 5179.170 t= 5.11e+04 R= 2e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 9963, errors: 0 + 88716525 states, stored +3.243293e+10 states, matched +3.2521646e+10 transitions (= stored+matched) +1.8325967e+11 atomic steps +hash conflicts: 1.7134961e+10 (resolved) + +Stats on memory usage (in Megabytes): + 9814.374 equivalent memory usage for states (stored*(State-vector + overhead)) + 4243.430 actual memory usage for states (compression: 43.24%) + state-vector as stored = 14 byte + 36 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 5212.276 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 606546 5194 3779 2 1 ] +unreached in proctype urcu_reader + line 267, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 275, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 104, "(1)" + line 248, "pan.___", state 112, "(1)" + line 252, "pan.___", state 124, "(1)" + line 256, "pan.___", state 132, "(1)" + line 406, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 223, "(1)" + line 433, "pan.___", state 253, "(1)" + line 437, "pan.___", state 266, "(1)" + line 686, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 406, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 359, "(1)" + line 433, "pan.___", state 389, "(1)" + line 437, "pan.___", state 402, "(1)" + line 406, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 488, "(1)" + line 433, "pan.___", state 518, "(1)" + line 437, "pan.___", state 531, "(1)" + line 406, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" + line 406, "pan.___", state 556, "(1)" + line 406, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" + line 406, "pan.___", state 557, "else" + line 406, "pan.___", state 560, "(1)" + line 410, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" + line 410, "pan.___", state 570, "(1)" + line 410, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" + line 410, "pan.___", state 571, "else" + line 410, "pan.___", state 574, "(1)" + line 410, "pan.___", state 575, "(1)" + line 410, "pan.___", state 575, "(1)" + line 408, "pan.___", state 580, "((i<1))" + line 408, "pan.___", state 580, "((i>=1))" + line 415, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" + line 415, "pan.___", state 588, "(1)" + line 415, "pan.___", state 589, "(cache_dirty_rcu_ptr)" + line 415, "pan.___", state 589, "else" + line 415, "pan.___", state 592, "(1)" + line 415, "pan.___", state 593, "(1)" + line 415, "pan.___", state 593, "(1)" + line 419, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" + line 419, "pan.___", state 602, "(1)" + line 419, "pan.___", state 603, "(cache_dirty_rcu_data[i])" + line 419, "pan.___", state 603, "else" + line 419, "pan.___", state 606, "(1)" + line 419, "pan.___", state 607, "(1)" + line 419, "pan.___", state 607, "(1)" + line 417, "pan.___", state 612, "((i<2))" + line 417, "pan.___", state 612, "((i>=2))" + line 424, "pan.___", state 619, "(1)" + line 424, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" + line 424, "pan.___", state 620, "else" + line 424, "pan.___", state 623, "(1)" + line 424, "pan.___", state 624, "(1)" + line 424, "pan.___", state 624, "(1)" + line 428, "pan.___", state 632, "(1)" + line 428, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" + line 428, "pan.___", state 633, "else" + line 428, "pan.___", state 636, "(1)" + line 428, "pan.___", state 637, "(1)" + line 428, "pan.___", state 637, "(1)" + line 426, "pan.___", state 642, "((i<1))" + line 426, "pan.___", state 642, "((i>=1))" + line 433, "pan.___", state 649, "(1)" + line 433, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" + line 433, "pan.___", state 650, "else" + line 433, "pan.___", state 653, "(1)" + line 433, "pan.___", state 654, "(1)" + line 433, "pan.___", state 654, "(1)" + line 437, "pan.___", state 662, "(1)" + line 437, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" + line 437, "pan.___", state 663, "else" + line 437, "pan.___", state 666, "(1)" + line 437, "pan.___", state 667, "(1)" + line 437, "pan.___", state 667, "(1)" + line 435, "pan.___", state 672, "((i<2))" + line 435, "pan.___", state 672, "((i>=2))" + line 445, "pan.___", state 676, "(1)" + line 445, "pan.___", state 676, "(1)" + line 686, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" + line 686, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 686, "pan.___", state 681, "(1)" + line 406, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 753, "(1)" + line 433, "pan.___", state 783, "(1)" + line 437, "pan.___", state 796, "(1)" + line 406, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 889, "(1)" + line 433, "pan.___", state 919, "(1)" + line 437, "pan.___", state 932, "(1)" + line 406, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" + line 406, "pan.___", state 955, "(1)" + line 406, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" + line 406, "pan.___", state 956, "else" + line 406, "pan.___", state 959, "(1)" + line 410, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" + line 410, "pan.___", state 969, "(1)" + line 410, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" + line 410, "pan.___", state 970, "else" + line 410, "pan.___", state 973, "(1)" + line 410, "pan.___", state 974, "(1)" + line 410, "pan.___", state 974, "(1)" + line 408, "pan.___", state 979, "((i<1))" + line 408, "pan.___", state 979, "((i>=1))" + line 415, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" + line 415, "pan.___", state 987, "(1)" + line 415, "pan.___", state 988, "(cache_dirty_rcu_ptr)" + line 415, "pan.___", state 988, "else" + line 415, "pan.___", state 991, "(1)" + line 415, "pan.___", state 992, "(1)" + line 415, "pan.___", state 992, "(1)" + line 419, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" + line 419, "pan.___", state 1001, "(1)" + line 419, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" + line 419, "pan.___", state 1002, "else" + line 419, "pan.___", state 1005, "(1)" + line 419, "pan.___", state 1006, "(1)" + line 419, "pan.___", state 1006, "(1)" + line 417, "pan.___", state 1011, "((i<2))" + line 417, "pan.___", state 1011, "((i>=2))" + line 424, "pan.___", state 1018, "(1)" + line 424, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" + line 424, "pan.___", state 1019, "else" + line 424, "pan.___", state 1022, "(1)" + line 424, "pan.___", state 1023, "(1)" + line 424, "pan.___", state 1023, "(1)" + line 428, "pan.___", state 1031, "(1)" + line 428, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" + line 428, "pan.___", state 1032, "else" + line 428, "pan.___", state 1035, "(1)" + line 428, "pan.___", state 1036, "(1)" + line 428, "pan.___", state 1036, "(1)" + line 426, "pan.___", state 1041, "((i<1))" + line 426, "pan.___", state 1041, "((i>=1))" + line 433, "pan.___", state 1048, "(1)" + line 433, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" + line 433, "pan.___", state 1049, "else" + line 433, "pan.___", state 1052, "(1)" + line 433, "pan.___", state 1053, "(1)" + line 433, "pan.___", state 1053, "(1)" + line 437, "pan.___", state 1061, "(1)" + line 437, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" + line 437, "pan.___", state 1062, "else" + line 437, "pan.___", state 1065, "(1)" + line 437, "pan.___", state 1066, "(1)" + line 437, "pan.___", state 1066, "(1)" + line 435, "pan.___", state 1071, "((i<2))" + line 435, "pan.___", state 1071, "((i>=2))" + line 445, "pan.___", state 1075, "(1)" + line 445, "pan.___", state 1075, "(1)" + line 694, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 406, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 1149, "(1)" + line 433, "pan.___", state 1179, "(1)" + line 437, "pan.___", state 1192, "(1)" + line 406, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 1281, "(1)" + line 433, "pan.___", state 1311, "(1)" + line 437, "pan.___", state 1324, "(1)" + line 406, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 1414, "(1)" + line 433, "pan.___", state 1444, "(1)" + line 437, "pan.___", state 1457, "(1)" + line 406, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 1543, "(1)" + line 433, "pan.___", state 1573, "(1)" + line 437, "pan.___", state 1586, "(1)" + line 406, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 1677, "(1)" + line 433, "pan.___", state 1707, "(1)" + line 437, "pan.___", state 1720, "(1)" + line 406, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 1806, "(1)" + line 433, "pan.___", state 1836, "(1)" + line 437, "pan.___", state 1849, "(1)" + line 406, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 1938, "(1)" + line 433, "pan.___", state 1968, "(1)" + line 437, "pan.___", state 1981, "(1)" + line 733, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 406, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 2074, "(1)" + line 433, "pan.___", state 2104, "(1)" + line 437, "pan.___", state 2117, "(1)" + line 406, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 2203, "(1)" + line 433, "pan.___", state 2233, "(1)" + line 437, "pan.___", state 2246, "(1)" + line 406, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" + line 406, "pan.___", state 2271, "(1)" + line 406, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" + line 406, "pan.___", state 2272, "else" + line 406, "pan.___", state 2275, "(1)" + line 410, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" + line 410, "pan.___", state 2285, "(1)" + line 410, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" + line 410, "pan.___", state 2286, "else" + line 410, "pan.___", state 2289, "(1)" + line 410, "pan.___", state 2290, "(1)" + line 410, "pan.___", state 2290, "(1)" + line 408, "pan.___", state 2295, "((i<1))" + line 408, "pan.___", state 2295, "((i>=1))" + line 415, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" + line 415, "pan.___", state 2303, "(1)" + line 415, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" + line 415, "pan.___", state 2304, "else" + line 415, "pan.___", state 2307, "(1)" + line 415, "pan.___", state 2308, "(1)" + line 415, "pan.___", state 2308, "(1)" + line 419, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" + line 419, "pan.___", state 2317, "(1)" + line 419, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" + line 419, "pan.___", state 2318, "else" + line 419, "pan.___", state 2321, "(1)" + line 419, "pan.___", state 2322, "(1)" + line 419, "pan.___", state 2322, "(1)" + line 417, "pan.___", state 2327, "((i<2))" + line 417, "pan.___", state 2327, "((i>=2))" + line 424, "pan.___", state 2334, "(1)" + line 424, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" + line 424, "pan.___", state 2335, "else" + line 424, "pan.___", state 2338, "(1)" + line 424, "pan.___", state 2339, "(1)" + line 424, "pan.___", state 2339, "(1)" + line 428, "pan.___", state 2347, "(1)" + line 428, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" + line 428, "pan.___", state 2348, "else" + line 428, "pan.___", state 2351, "(1)" + line 428, "pan.___", state 2352, "(1)" + line 428, "pan.___", state 2352, "(1)" + line 426, "pan.___", state 2357, "((i<1))" + line 426, "pan.___", state 2357, "((i>=1))" + line 433, "pan.___", state 2364, "(1)" + line 433, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" + line 433, "pan.___", state 2365, "else" + line 433, "pan.___", state 2368, "(1)" + line 433, "pan.___", state 2369, "(1)" + line 433, "pan.___", state 2369, "(1)" + line 437, "pan.___", state 2377, "(1)" + line 437, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" + line 437, "pan.___", state 2378, "else" + line 437, "pan.___", state 2381, "(1)" + line 437, "pan.___", state 2382, "(1)" + line 437, "pan.___", state 2382, "(1)" + line 435, "pan.___", state 2387, "((i<2))" + line 435, "pan.___", state 2387, "((i>=2))" + line 445, "pan.___", state 2391, "(1)" + line 445, "pan.___", state 2391, "(1)" + line 733, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" + line 733, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 733, "pan.___", state 2396, "(1)" + line 406, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 2468, "(1)" + line 433, "pan.___", state 2498, "(1)" + line 437, "pan.___", state 2511, "(1)" + line 406, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 2603, "(1)" + line 433, "pan.___", state 2633, "(1)" + line 437, "pan.___", state 2646, "(1)" + line 406, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" + line 415, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 2732, "(1)" + line 433, "pan.___", state 2762, "(1)" + line 437, "pan.___", state 2775, "(1)" + line 244, "pan.___", state 2808, "(1)" + line 252, "pan.___", state 2828, "(1)" + line 256, "pan.___", state 2836, "(1)" + line 244, "pan.___", state 2851, "(1)" + line 252, "pan.___", state 2871, "(1)" + line 256, "pan.___", state 2879, "(1)" + line 928, "pan.___", state 2896, "-end-" + (245 of 2896 states) +unreached in proctype urcu_writer + line 406, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 410, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 415, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 424, "pan.___", state 110, "(1)" + line 428, "pan.___", state 123, "(1)" + line 433, "pan.___", state 140, "(1)" + line 267, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 406, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 410, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 415, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 424, "pan.___", state 303, "(1)" + line 428, "pan.___", state 316, "(1)" + line 433, "pan.___", state 333, "(1)" + line 437, "pan.___", state 346, "(1)" + line 410, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 415, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 428, "pan.___", state 447, "(1)" + line 433, "pan.___", state 464, "(1)" + line 437, "pan.___", state 477, "(1)" + line 410, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" + line 415, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" + line 428, "pan.___", state 586, "(1)" + line 433, "pan.___", state 603, "(1)" + line 437, "pan.___", state 616, "(1)" + line 410, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" + line 415, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" + line 428, "pan.___", state 715, "(1)" + line 433, "pan.___", state 732, "(1)" + line 437, "pan.___", state 745, "(1)" + line 410, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" + line 415, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" + line 419, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" + line 428, "pan.___", state 846, "(1)" + line 433, "pan.___", state 863, "(1)" + line 437, "pan.___", state 876, "(1)" + line 267, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 955, "(1)" + line 279, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 978, "(1)" + line 248, "pan.___", state 986, "(1)" + line 252, "pan.___", state 998, "(1)" + line 256, "pan.___", state 1006, "(1)" + line 267, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1084, "(1)" + line 248, "pan.___", state 1092, "(1)" + line 252, "pan.___", state 1104, "(1)" + line 256, "pan.___", state 1112, "(1)" + line 271, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1176, "(1)" + line 248, "pan.___", state 1184, "(1)" + line 252, "pan.___", state 1196, "(1)" + line 256, "pan.___", state 1204, "(1)" + line 267, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1282, "(1)" + line 248, "pan.___", state 1290, "(1)" + line 252, "pan.___", state 1302, "(1)" + line 256, "pan.___", state 1310, "(1)" + line 271, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1374, "(1)" + line 248, "pan.___", state 1382, "(1)" + line 252, "pan.___", state 1394, "(1)" + line 256, "pan.___", state 1402, "(1)" + line 267, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1480, "(1)" + line 248, "pan.___", state 1488, "(1)" + line 252, "pan.___", state 1500, "(1)" + line 256, "pan.___", state 1508, "(1)" + line 271, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1572, "(1)" + line 248, "pan.___", state 1580, "(1)" + line 252, "pan.___", state 1592, "(1)" + line 256, "pan.___", state 1600, "(1)" + line 267, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 271, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" + line 275, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" + line 279, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" + line 244, "pan.___", state 1678, "(1)" + line 248, "pan.___", state 1686, "(1)" + line 252, "pan.___", state 1698, "(1)" + line 256, "pan.___", state 1706, "(1)" + line 1303, "pan.___", state 1722, "-end-" + (103 of 1722 states) +unreached in proctype :init: + (0 of 28 states) +unreached in proctype :never: + line 1366, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 5.15e+04 seconds +pan: rate 1721.7944 states/second +pan: avg transition delay 1.5843e-06 usec +cp .input.spin urcu_free.spin.input +cp .input.spin.trail urcu_free.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/urcu-controldataflow-alpha-ipi/urcu_free.ltl b/urcu-controldataflow-alpha-ipi/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow-alpha-ipi/urcu_free.spin.input b/urcu-controldataflow-alpha-ipi/urcu_free.spin.input new file mode 100644 index 0000000..ca70e6c --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free.spin.input @@ -0,0 +1,1339 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_nested.define b/urcu-controldataflow-alpha-ipi/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.define b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.log b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.log new file mode 100644 index 0000000..fbb91fe --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.log @@ -0,0 +1,824 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +Depth= 9193 States= 1e+06 Transitions= 2.02e+08 Memory= 513.615 t= 308 R= 3e+03 +Depth= 9193 States= 2e+06 Transitions= 4.02e+08 Memory= 560.100 t= 617 R= 3e+03 +pan: claim violated! (at depth 1482) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 9193, errors: 1 + 2638623 states, stored +5.0906949e+08 states, matched +5.1170812e+08 transitions (= stored+matched) +2.7495835e+09 atomic steps +hash conflicts: 3.3187407e+08 (resolved) + +Stats on memory usage (in Megabytes): + 291.901 equivalent memory usage for states (stored*(State-vector + overhead)) + 123.793 actual memory usage for states (compression: 42.41%) + state-vector as stored = 13 byte + 36 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 589.494 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 39337 2870 221 2 2 ] +unreached in proctype urcu_reader + line 894, "pan.___", state 12, "((i<1))" + line 894, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 61, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 83, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 92, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 108, "(1)" + line 249, "pan.___", state 116, "(1)" + line 253, "pan.___", state 128, "(1)" + line 257, "pan.___", state 136, "(1)" + line 407, "pan.___", state 162, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 194, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 208, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 227, "(1)" + line 434, "pan.___", state 257, "(1)" + line 438, "pan.___", state 270, "(1)" + line 696, "pan.___", state 291, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 407, "pan.___", state 298, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 330, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 344, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 363, "(1)" + line 434, "pan.___", state 393, "(1)" + line 438, "pan.___", state 406, "(1)" + line 407, "pan.___", state 427, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 459, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 473, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 492, "(1)" + line 434, "pan.___", state 522, "(1)" + line 438, "pan.___", state 535, "(1)" + line 407, "pan.___", state 558, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 560, "(1)" + line 407, "pan.___", state 561, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 561, "else" + line 407, "pan.___", state 564, "(1)" + line 411, "pan.___", state 572, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 574, "(1)" + line 411, "pan.___", state 575, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 575, "else" + line 411, "pan.___", state 578, "(1)" + line 411, "pan.___", state 579, "(1)" + line 411, "pan.___", state 579, "(1)" + line 409, "pan.___", state 584, "((i<1))" + line 409, "pan.___", state 584, "((i>=1))" + line 416, "pan.___", state 590, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 592, "(1)" + line 416, "pan.___", state 593, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 593, "else" + line 416, "pan.___", state 596, "(1)" + line 416, "pan.___", state 597, "(1)" + line 416, "pan.___", state 597, "(1)" + line 420, "pan.___", state 604, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 606, "(1)" + line 420, "pan.___", state 607, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 607, "else" + line 420, "pan.___", state 610, "(1)" + line 420, "pan.___", state 611, "(1)" + line 420, "pan.___", state 611, "(1)" + line 418, "pan.___", state 616, "((i<2))" + line 418, "pan.___", state 616, "((i>=2))" + line 425, "pan.___", state 623, "(1)" + line 425, "pan.___", state 624, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 624, "else" + line 425, "pan.___", state 627, "(1)" + line 425, "pan.___", state 628, "(1)" + line 425, "pan.___", state 628, "(1)" + line 429, "pan.___", state 636, "(1)" + line 429, "pan.___", state 637, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 637, "else" + line 429, "pan.___", state 640, "(1)" + line 429, "pan.___", state 641, "(1)" + line 429, "pan.___", state 641, "(1)" + line 427, "pan.___", state 646, "((i<1))" + line 427, "pan.___", state 646, "((i>=1))" + line 434, "pan.___", state 653, "(1)" + line 434, "pan.___", state 654, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 654, "else" + line 434, "pan.___", state 657, "(1)" + line 434, "pan.___", state 658, "(1)" + line 434, "pan.___", state 658, "(1)" + line 438, "pan.___", state 666, "(1)" + line 438, "pan.___", state 667, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 667, "else" + line 438, "pan.___", state 670, "(1)" + line 438, "pan.___", state 671, "(1)" + line 438, "pan.___", state 671, "(1)" + line 436, "pan.___", state 676, "((i<2))" + line 436, "pan.___", state 676, "((i>=2))" + line 446, "pan.___", state 680, "(1)" + line 446, "pan.___", state 680, "(1)" + line 696, "pan.___", state 683, "cached_urcu_active_readers = (tmp+1)" + line 696, "pan.___", state 684, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 696, "pan.___", state 685, "(1)" + line 407, "pan.___", state 692, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 724, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 738, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 757, "(1)" + line 434, "pan.___", state 787, "(1)" + line 438, "pan.___", state 800, "(1)" + line 407, "pan.___", state 828, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 860, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 874, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 893, "(1)" + line 434, "pan.___", state 923, "(1)" + line 438, "pan.___", state 936, "(1)" + line 407, "pan.___", state 957, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 959, "(1)" + line 407, "pan.___", state 960, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 960, "else" + line 407, "pan.___", state 963, "(1)" + line 411, "pan.___", state 971, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 973, "(1)" + line 411, "pan.___", state 974, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 974, "else" + line 411, "pan.___", state 977, "(1)" + line 411, "pan.___", state 978, "(1)" + line 411, "pan.___", state 978, "(1)" + line 409, "pan.___", state 983, "((i<1))" + line 409, "pan.___", state 983, "((i>=1))" + line 416, "pan.___", state 989, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 991, "(1)" + line 416, "pan.___", state 992, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 992, "else" + line 416, "pan.___", state 995, "(1)" + line 416, "pan.___", state 996, "(1)" + line 416, "pan.___", state 996, "(1)" + line 420, "pan.___", state 1003, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 1005, "(1)" + line 420, "pan.___", state 1006, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 1006, "else" + line 420, "pan.___", state 1009, "(1)" + line 420, "pan.___", state 1010, "(1)" + line 420, "pan.___", state 1010, "(1)" + line 418, "pan.___", state 1015, "((i<2))" + line 418, "pan.___", state 1015, "((i>=2))" + line 425, "pan.___", state 1022, "(1)" + line 425, "pan.___", state 1023, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 1023, "else" + line 425, "pan.___", state 1026, "(1)" + line 425, "pan.___", state 1027, "(1)" + line 425, "pan.___", state 1027, "(1)" + line 429, "pan.___", state 1035, "(1)" + line 429, "pan.___", state 1036, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 1036, "else" + line 429, "pan.___", state 1039, "(1)" + line 429, "pan.___", state 1040, "(1)" + line 429, "pan.___", state 1040, "(1)" + line 427, "pan.___", state 1045, "((i<1))" + line 427, "pan.___", state 1045, "((i>=1))" + line 434, "pan.___", state 1052, "(1)" + line 434, "pan.___", state 1053, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 1053, "else" + line 434, "pan.___", state 1056, "(1)" + line 434, "pan.___", state 1057, "(1)" + line 434, "pan.___", state 1057, "(1)" + line 438, "pan.___", state 1065, "(1)" + line 438, "pan.___", state 1066, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 1066, "else" + line 438, "pan.___", state 1069, "(1)" + line 438, "pan.___", state 1070, "(1)" + line 438, "pan.___", state 1070, "(1)" + line 436, "pan.___", state 1075, "((i<2))" + line 436, "pan.___", state 1075, "((i>=2))" + line 446, "pan.___", state 1079, "(1)" + line 446, "pan.___", state 1079, "(1)" + line 704, "pan.___", state 1083, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 407, "pan.___", state 1088, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1120, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1134, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1153, "(1)" + line 434, "pan.___", state 1183, "(1)" + line 438, "pan.___", state 1196, "(1)" + line 407, "pan.___", state 1220, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1252, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1285, "(1)" + line 434, "pan.___", state 1315, "(1)" + line 438, "pan.___", state 1328, "(1)" + line 407, "pan.___", state 1353, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1385, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1399, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1418, "(1)" + line 434, "pan.___", state 1448, "(1)" + line 438, "pan.___", state 1461, "(1)" + line 407, "pan.___", state 1482, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1514, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1528, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1547, "(1)" + line 434, "pan.___", state 1577, "(1)" + line 438, "pan.___", state 1590, "(1)" + line 407, "pan.___", state 1616, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1648, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1681, "(1)" + line 434, "pan.___", state 1711, "(1)" + line 438, "pan.___", state 1724, "(1)" + line 407, "pan.___", state 1745, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1777, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1791, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1810, "(1)" + line 434, "pan.___", state 1840, "(1)" + line 438, "pan.___", state 1853, "(1)" + line 407, "pan.___", state 1877, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1909, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1923, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1942, "(1)" + line 434, "pan.___", state 1972, "(1)" + line 438, "pan.___", state 1985, "(1)" + line 743, "pan.___", state 2006, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 407, "pan.___", state 2013, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2045, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2059, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2078, "(1)" + line 434, "pan.___", state 2108, "(1)" + line 438, "pan.___", state 2121, "(1)" + line 407, "pan.___", state 2142, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2174, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2188, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2207, "(1)" + line 434, "pan.___", state 2237, "(1)" + line 438, "pan.___", state 2250, "(1)" + line 407, "pan.___", state 2273, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 2275, "(1)" + line 407, "pan.___", state 2276, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 2276, "else" + line 407, "pan.___", state 2279, "(1)" + line 411, "pan.___", state 2287, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 2289, "(1)" + line 411, "pan.___", state 2290, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 2290, "else" + line 411, "pan.___", state 2293, "(1)" + line 411, "pan.___", state 2294, "(1)" + line 411, "pan.___", state 2294, "(1)" + line 409, "pan.___", state 2299, "((i<1))" + line 409, "pan.___", state 2299, "((i>=1))" + line 416, "pan.___", state 2305, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 2307, "(1)" + line 416, "pan.___", state 2308, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 2308, "else" + line 416, "pan.___", state 2311, "(1)" + line 416, "pan.___", state 2312, "(1)" + line 416, "pan.___", state 2312, "(1)" + line 420, "pan.___", state 2319, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 2321, "(1)" + line 420, "pan.___", state 2322, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 2322, "else" + line 420, "pan.___", state 2325, "(1)" + line 420, "pan.___", state 2326, "(1)" + line 420, "pan.___", state 2326, "(1)" + line 418, "pan.___", state 2331, "((i<2))" + line 418, "pan.___", state 2331, "((i>=2))" + line 425, "pan.___", state 2338, "(1)" + line 425, "pan.___", state 2339, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 2339, "else" + line 425, "pan.___", state 2342, "(1)" + line 425, "pan.___", state 2343, "(1)" + line 425, "pan.___", state 2343, "(1)" + line 429, "pan.___", state 2351, "(1)" + line 429, "pan.___", state 2352, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 2352, "else" + line 429, "pan.___", state 2355, "(1)" + line 429, "pan.___", state 2356, "(1)" + line 429, "pan.___", state 2356, "(1)" + line 427, "pan.___", state 2361, "((i<1))" + line 427, "pan.___", state 2361, "((i>=1))" + line 434, "pan.___", state 2368, "(1)" + line 434, "pan.___", state 2369, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 2369, "else" + line 434, "pan.___", state 2372, "(1)" + line 434, "pan.___", state 2373, "(1)" + line 434, "pan.___", state 2373, "(1)" + line 438, "pan.___", state 2381, "(1)" + line 438, "pan.___", state 2382, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 2382, "else" + line 438, "pan.___", state 2385, "(1)" + line 438, "pan.___", state 2386, "(1)" + line 438, "pan.___", state 2386, "(1)" + line 436, "pan.___", state 2391, "((i<2))" + line 436, "pan.___", state 2391, "((i>=2))" + line 446, "pan.___", state 2395, "(1)" + line 446, "pan.___", state 2395, "(1)" + line 743, "pan.___", state 2398, "cached_urcu_active_readers = (tmp+1)" + line 743, "pan.___", state 2399, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 743, "pan.___", state 2400, "(1)" + line 407, "pan.___", state 2407, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2439, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2453, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2472, "(1)" + line 434, "pan.___", state 2502, "(1)" + line 438, "pan.___", state 2515, "(1)" + line 407, "pan.___", state 2542, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2574, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2588, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2607, "(1)" + line 434, "pan.___", state 2637, "(1)" + line 438, "pan.___", state 2650, "(1)" + line 407, "pan.___", state 2671, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2703, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2717, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2736, "(1)" + line 434, "pan.___", state 2766, "(1)" + line 438, "pan.___", state 2779, "(1)" + line 245, "pan.___", state 2812, "(1)" + line 253, "pan.___", state 2832, "(1)" + line 257, "pan.___", state 2840, "(1)" + line 245, "pan.___", state 2855, "(1)" + line 253, "pan.___", state 2875, "(1)" + line 257, "pan.___", state 2883, "(1)" + line 929, "pan.___", state 2900, "-end-" + (246 of 2900 states) +unreached in proctype urcu_writer + line 1018, "pan.___", state 12, "((i<1))" + line 1018, "pan.___", state 12, "((i>=1))" + line 407, "pan.___", state 47, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 53, "(1)" + line 411, "pan.___", state 61, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 67, "(1)" + line 411, "pan.___", state 68, "(1)" + line 411, "pan.___", state 68, "(1)" + line 409, "pan.___", state 73, "((i<1))" + line 409, "pan.___", state 73, "((i>=1))" + line 416, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 85, "(1)" + line 416, "pan.___", state 86, "(1)" + line 416, "pan.___", state 86, "(1)" + line 420, "pan.___", state 99, "(1)" + line 420, "pan.___", state 100, "(1)" + line 420, "pan.___", state 100, "(1)" + line 418, "pan.___", state 105, "((i<2))" + line 418, "pan.___", state 105, "((i>=2))" + line 425, "pan.___", state 112, "(1)" + line 425, "pan.___", state 113, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 113, "else" + line 425, "pan.___", state 116, "(1)" + line 425, "pan.___", state 117, "(1)" + line 425, "pan.___", state 117, "(1)" + line 429, "pan.___", state 125, "(1)" + line 429, "pan.___", state 126, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 126, "else" + line 429, "pan.___", state 129, "(1)" + line 429, "pan.___", state 130, "(1)" + line 429, "pan.___", state 130, "(1)" + line 427, "pan.___", state 135, "((i<1))" + line 427, "pan.___", state 135, "((i>=1))" + line 434, "pan.___", state 142, "(1)" + line 434, "pan.___", state 143, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 143, "else" + line 434, "pan.___", state 146, "(1)" + line 434, "pan.___", state 147, "(1)" + line 434, "pan.___", state 147, "(1)" + line 438, "pan.___", state 155, "(1)" + line 438, "pan.___", state 156, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 156, "else" + line 438, "pan.___", state 159, "(1)" + line 438, "pan.___", state 160, "(1)" + line 438, "pan.___", state 160, "(1)" + line 436, "pan.___", state 165, "((i<2))" + line 436, "pan.___", state 165, "((i>=2))" + line 446, "pan.___", state 169, "(1)" + line 446, "pan.___", state 169, "(1)" + line 268, "pan.___", state 178, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 187, "cache_dirty_urcu_active_readers = 0" + line 270, "pan.___", state 195, "((i<1))" + line 270, "pan.___", state 195, "((i>=1))" + line 276, "pan.___", state 200, "cache_dirty_rcu_ptr = 0" + line 1088, "pan.___", state 228, "old_data = cached_rcu_ptr" + line 1099, "pan.___", state 232, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" + line 407, "pan.___", state 240, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 246, "(1)" + line 411, "pan.___", state 254, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 260, "(1)" + line 411, "pan.___", state 261, "(1)" + line 411, "pan.___", state 261, "(1)" + line 409, "pan.___", state 266, "((i<1))" + line 409, "pan.___", state 266, "((i>=1))" + line 416, "pan.___", state 274, "(1)" + line 416, "pan.___", state 275, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 275, "else" + line 416, "pan.___", state 278, "(1)" + line 416, "pan.___", state 279, "(1)" + line 416, "pan.___", state 279, "(1)" + line 420, "pan.___", state 286, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 292, "(1)" + line 420, "pan.___", state 293, "(1)" + line 420, "pan.___", state 293, "(1)" + line 418, "pan.___", state 298, "((i<2))" + line 418, "pan.___", state 298, "((i>=2))" + line 425, "pan.___", state 305, "(1)" + line 425, "pan.___", state 306, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 306, "else" + line 425, "pan.___", state 309, "(1)" + line 425, "pan.___", state 310, "(1)" + line 425, "pan.___", state 310, "(1)" + line 429, "pan.___", state 318, "(1)" + line 429, "pan.___", state 319, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 319, "else" + line 429, "pan.___", state 322, "(1)" + line 429, "pan.___", state 323, "(1)" + line 429, "pan.___", state 323, "(1)" + line 427, "pan.___", state 328, "((i<1))" + line 427, "pan.___", state 328, "((i>=1))" + line 434, "pan.___", state 335, "(1)" + line 434, "pan.___", state 336, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 336, "else" + line 434, "pan.___", state 339, "(1)" + line 434, "pan.___", state 340, "(1)" + line 434, "pan.___", state 340, "(1)" + line 438, "pan.___", state 348, "(1)" + line 438, "pan.___", state 349, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 349, "else" + line 438, "pan.___", state 352, "(1)" + line 438, "pan.___", state 353, "(1)" + line 438, "pan.___", state 353, "(1)" + line 436, "pan.___", state 358, "((i<2))" + line 436, "pan.___", state 358, "((i>=2))" + line 446, "pan.___", state 362, "(1)" + line 446, "pan.___", state 362, "(1)" + line 407, "pan.___", state 373, "(1)" + line 407, "pan.___", state 374, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 374, "else" + line 407, "pan.___", state 377, "(1)" + line 411, "pan.___", state 385, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 391, "(1)" + line 411, "pan.___", state 392, "(1)" + line 411, "pan.___", state 392, "(1)" + line 409, "pan.___", state 397, "((i<1))" + line 409, "pan.___", state 397, "((i>=1))" + line 416, "pan.___", state 403, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 409, "(1)" + line 416, "pan.___", state 410, "(1)" + line 416, "pan.___", state 410, "(1)" + line 420, "pan.___", state 417, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 423, "(1)" + line 420, "pan.___", state 424, "(1)" + line 420, "pan.___", state 424, "(1)" + line 418, "pan.___", state 429, "((i<2))" + line 418, "pan.___", state 429, "((i>=2))" + line 425, "pan.___", state 436, "(1)" + line 425, "pan.___", state 437, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 437, "else" + line 425, "pan.___", state 440, "(1)" + line 425, "pan.___", state 441, "(1)" + line 425, "pan.___", state 441, "(1)" + line 429, "pan.___", state 449, "(1)" + line 429, "pan.___", state 450, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 450, "else" + line 429, "pan.___", state 453, "(1)" + line 429, "pan.___", state 454, "(1)" + line 429, "pan.___", state 454, "(1)" + line 427, "pan.___", state 459, "((i<1))" + line 427, "pan.___", state 459, "((i>=1))" + line 434, "pan.___", state 466, "(1)" + line 434, "pan.___", state 467, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 467, "else" + line 434, "pan.___", state 470, "(1)" + line 434, "pan.___", state 471, "(1)" + line 434, "pan.___", state 471, "(1)" + line 438, "pan.___", state 479, "(1)" + line 438, "pan.___", state 480, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 480, "else" + line 438, "pan.___", state 483, "(1)" + line 438, "pan.___", state 484, "(1)" + line 438, "pan.___", state 484, "(1)" + line 436, "pan.___", state 489, "((i<2))" + line 436, "pan.___", state 489, "((i>=2))" + line 446, "pan.___", state 493, "(1)" + line 446, "pan.___", state 493, "(1)" + line 1153, "pan.___", state 504, "_proc_urcu_writer = (_proc_urcu_writer&~((1<<9)))" + line 1158, "pan.___", state 505, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<8)|(1<<7))))" + line 407, "pan.___", state 510, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 516, "(1)" + line 411, "pan.___", state 524, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 530, "(1)" + line 411, "pan.___", state 531, "(1)" + line 411, "pan.___", state 531, "(1)" + line 409, "pan.___", state 536, "((i<1))" + line 409, "pan.___", state 536, "((i>=1))" + line 416, "pan.___", state 542, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 548, "(1)" + line 416, "pan.___", state 549, "(1)" + line 416, "pan.___", state 549, "(1)" + line 420, "pan.___", state 556, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 562, "(1)" + line 420, "pan.___", state 563, "(1)" + line 420, "pan.___", state 563, "(1)" + line 418, "pan.___", state 568, "((i<2))" + line 418, "pan.___", state 568, "((i>=2))" + line 425, "pan.___", state 575, "(1)" + line 425, "pan.___", state 576, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 576, "else" + line 425, "pan.___", state 579, "(1)" + line 425, "pan.___", state 580, "(1)" + line 425, "pan.___", state 580, "(1)" + line 429, "pan.___", state 588, "(1)" + line 429, "pan.___", state 589, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 589, "else" + line 429, "pan.___", state 592, "(1)" + line 429, "pan.___", state 593, "(1)" + line 429, "pan.___", state 593, "(1)" + line 427, "pan.___", state 598, "((i<1))" + line 427, "pan.___", state 598, "((i>=1))" + line 434, "pan.___", state 605, "(1)" + line 434, "pan.___", state 606, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 606, "else" + line 434, "pan.___", state 609, "(1)" + line 434, "pan.___", state 610, "(1)" + line 434, "pan.___", state 610, "(1)" + line 438, "pan.___", state 618, "(1)" + line 438, "pan.___", state 619, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 619, "else" + line 438, "pan.___", state 622, "(1)" + line 438, "pan.___", state 623, "(1)" + line 438, "pan.___", state 623, "(1)" + line 446, "pan.___", state 632, "(1)" + line 446, "pan.___", state 632, "(1)" + line 407, "pan.___", state 639, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 653, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 671, "cache_dirty_rcu_ptr = 0" + line 425, "pan.___", state 704, "(1)" + line 429, "pan.___", state 717, "(1)" + line 434, "pan.___", state 734, "(1)" + line 438, "pan.___", state 747, "(1)" + line 411, "pan.___", state 784, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 802, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 816, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 848, "(1)" + line 434, "pan.___", state 865, "(1)" + line 438, "pan.___", state 878, "(1)" + line 1235, "pan.___", state 905, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" + line 268, "pan.___", state 933, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 935, "(1)" + line 272, "pan.___", state 942, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 944, "(1)" + line 272, "pan.___", state 945, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 945, "else" + line 270, "pan.___", state 950, "((i<1))" + line 270, "pan.___", state 950, "((i>=1))" + line 276, "pan.___", state 955, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 957, "(1)" + line 276, "pan.___", state 958, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 958, "else" + line 280, "pan.___", state 964, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 966, "(1)" + line 280, "pan.___", state 967, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 967, "else" + line 278, "pan.___", state 972, "((i<2))" + line 278, "pan.___", state 972, "((i>=2))" + line 245, "pan.___", state 980, "(1)" + line 249, "pan.___", state 988, "(1)" + line 249, "pan.___", state 989, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 989, "else" + line 247, "pan.___", state 994, "((i<1))" + line 247, "pan.___", state 994, "((i>=1))" + line 253, "pan.___", state 1000, "(1)" + line 253, "pan.___", state 1001, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1001, "else" + line 257, "pan.___", state 1008, "(1)" + line 257, "pan.___", state 1009, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1009, "else" + line 262, "pan.___", state 1018, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1018, "else" + line 1289, "pan.___", state 1034, "((i<1))" + line 1289, "pan.___", state 1034, "((i>=1))" + line 268, "pan.___", state 1039, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1041, "(1)" + line 272, "pan.___", state 1048, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1050, "(1)" + line 272, "pan.___", state 1051, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1051, "else" + line 270, "pan.___", state 1056, "((i<1))" + line 270, "pan.___", state 1056, "((i>=1))" + line 276, "pan.___", state 1061, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1063, "(1)" + line 276, "pan.___", state 1064, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1064, "else" + line 280, "pan.___", state 1070, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1072, "(1)" + line 280, "pan.___", state 1073, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1073, "else" + line 278, "pan.___", state 1078, "((i<2))" + line 278, "pan.___", state 1078, "((i>=2))" + line 245, "pan.___", state 1086, "(1)" + line 249, "pan.___", state 1094, "(1)" + line 249, "pan.___", state 1095, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1095, "else" + line 247, "pan.___", state 1100, "((i<1))" + line 247, "pan.___", state 1100, "((i>=1))" + line 253, "pan.___", state 1106, "(1)" + line 253, "pan.___", state 1107, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1107, "else" + line 257, "pan.___", state 1114, "(1)" + line 257, "pan.___", state 1115, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1115, "else" + line 262, "pan.___", state 1124, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1124, "else" + line 295, "pan.___", state 1126, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1126, "else" + line 1289, "pan.___", state 1127, "(cache_dirty_urcu_gp_ctr)" + line 1289, "pan.___", state 1127, "else" + line 268, "pan.___", state 1131, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1133, "(1)" + line 272, "pan.___", state 1140, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1142, "(1)" + line 272, "pan.___", state 1143, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1143, "else" + line 270, "pan.___", state 1148, "((i<1))" + line 270, "pan.___", state 1148, "((i>=1))" + line 276, "pan.___", state 1153, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1155, "(1)" + line 276, "pan.___", state 1156, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1156, "else" + line 280, "pan.___", state 1162, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1164, "(1)" + line 280, "pan.___", state 1165, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1165, "else" + line 278, "pan.___", state 1170, "((i<2))" + line 278, "pan.___", state 1170, "((i>=2))" + line 245, "pan.___", state 1178, "(1)" + line 249, "pan.___", state 1186, "(1)" + line 249, "pan.___", state 1187, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1187, "else" + line 247, "pan.___", state 1192, "((i<1))" + line 247, "pan.___", state 1192, "((i>=1))" + line 253, "pan.___", state 1198, "(1)" + line 253, "pan.___", state 1199, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1199, "else" + line 257, "pan.___", state 1206, "(1)" + line 257, "pan.___", state 1207, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1207, "else" + line 262, "pan.___", state 1216, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1216, "else" + line 1293, "pan.___", state 1219, "i = 0" + line 1293, "pan.___", state 1221, "reader_barrier = 1" + line 1293, "pan.___", state 1232, "((i<1))" + line 1293, "pan.___", state 1232, "((i>=1))" + line 268, "pan.___", state 1237, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1239, "(1)" + line 272, "pan.___", state 1246, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1248, "(1)" + line 272, "pan.___", state 1249, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1249, "else" + line 270, "pan.___", state 1254, "((i<1))" + line 270, "pan.___", state 1254, "((i>=1))" + line 276, "pan.___", state 1259, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1261, "(1)" + line 276, "pan.___", state 1262, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1262, "else" + line 280, "pan.___", state 1268, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1270, "(1)" + line 280, "pan.___", state 1271, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1271, "else" + line 278, "pan.___", state 1276, "((i<2))" + line 278, "pan.___", state 1276, "((i>=2))" + line 245, "pan.___", state 1284, "(1)" + line 249, "pan.___", state 1292, "(1)" + line 249, "pan.___", state 1293, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1293, "else" + line 247, "pan.___", state 1298, "((i<1))" + line 247, "pan.___", state 1298, "((i>=1))" + line 253, "pan.___", state 1304, "(1)" + line 253, "pan.___", state 1305, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1305, "else" + line 257, "pan.___", state 1312, "(1)" + line 257, "pan.___", state 1313, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1313, "else" + line 262, "pan.___", state 1322, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1322, "else" + line 295, "pan.___", state 1324, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1324, "else" + line 1293, "pan.___", state 1325, "(cache_dirty_urcu_gp_ctr)" + line 1293, "pan.___", state 1325, "else" + line 272, "pan.___", state 1338, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1351, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1360, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1376, "(1)" + line 249, "pan.___", state 1384, "(1)" + line 253, "pan.___", state 1396, "(1)" + line 257, "pan.___", state 1404, "(1)" + line 268, "pan.___", state 1435, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1444, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1457, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1466, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1482, "(1)" + line 249, "pan.___", state 1490, "(1)" + line 253, "pan.___", state 1502, "(1)" + line 257, "pan.___", state 1510, "(1)" + line 268, "pan.___", state 1527, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1529, "(1)" + line 272, "pan.___", state 1536, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1538, "(1)" + line 272, "pan.___", state 1539, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1539, "else" + line 270, "pan.___", state 1544, "((i<1))" + line 270, "pan.___", state 1544, "((i>=1))" + line 276, "pan.___", state 1549, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1551, "(1)" + line 276, "pan.___", state 1552, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1552, "else" + line 280, "pan.___", state 1558, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1560, "(1)" + line 280, "pan.___", state 1561, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1561, "else" + line 278, "pan.___", state 1566, "((i<2))" + line 278, "pan.___", state 1566, "((i>=2))" + line 245, "pan.___", state 1574, "(1)" + line 249, "pan.___", state 1582, "(1)" + line 249, "pan.___", state 1583, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1583, "else" + line 247, "pan.___", state 1588, "((i<1))" + line 247, "pan.___", state 1588, "((i>=1))" + line 253, "pan.___", state 1594, "(1)" + line 253, "pan.___", state 1595, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1595, "else" + line 257, "pan.___", state 1602, "(1)" + line 257, "pan.___", state 1603, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1603, "else" + line 262, "pan.___", state 1612, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1612, "else" + line 1300, "pan.___", state 1615, "i = 0" + line 1300, "pan.___", state 1617, "reader_barrier = 1" + line 1300, "pan.___", state 1628, "((i<1))" + line 1300, "pan.___", state 1628, "((i>=1))" + line 268, "pan.___", state 1633, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1635, "(1)" + line 272, "pan.___", state 1642, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1644, "(1)" + line 272, "pan.___", state 1645, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1645, "else" + line 270, "pan.___", state 1650, "((i<1))" + line 270, "pan.___", state 1650, "((i>=1))" + line 276, "pan.___", state 1655, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1657, "(1)" + line 276, "pan.___", state 1658, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1658, "else" + line 280, "pan.___", state 1664, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1666, "(1)" + line 280, "pan.___", state 1667, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1667, "else" + line 278, "pan.___", state 1672, "((i<2))" + line 278, "pan.___", state 1672, "((i>=2))" + line 245, "pan.___", state 1680, "(1)" + line 249, "pan.___", state 1688, "(1)" + line 249, "pan.___", state 1689, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1689, "else" + line 247, "pan.___", state 1694, "((i<1))" + line 247, "pan.___", state 1694, "((i>=1))" + line 253, "pan.___", state 1700, "(1)" + line 253, "pan.___", state 1701, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1701, "else" + line 257, "pan.___", state 1708, "(1)" + line 257, "pan.___", state 1709, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1709, "else" + line 262, "pan.___", state 1718, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1718, "else" + line 295, "pan.___", state 1720, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1720, "else" + line 1300, "pan.___", state 1721, "(cache_dirty_urcu_gp_ctr)" + line 1300, "pan.___", state 1721, "else" + line 1304, "pan.___", state 1724, "-end-" + (312 of 1724 states) +unreached in proctype :init: + line 1319, "pan.___", state 13, "((i<1))" + line 1319, "pan.___", state 13, "((i>=1))" + (1 of 28 states) +unreached in proctype :never: + line 1367, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 792 seconds +pan: rate 3330.8797 states/second +pan: avg transition delay 1.5481e-06 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..b35bf7b --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input @@ -0,0 +1,1340 @@ +#define NO_MB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input.trail b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..915575e --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,1485 @@ +-2:3:-2 +-4:-4:-4 +1:0:4654 +2:2:2900 +3:2:2905 +4:2:2909 +5:2:2917 +6:2:2921 +7:2:2925 +8:0:4654 +9:1:0 +10:1:5 +11:1:9 +12:1:17 +13:1:21 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b/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.log b/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.log new file mode 100644 index 0000000..91e8666 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.log @@ -0,0 +1,540 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +Depth= 8300 States= 1e+06 Transitions= 1.86e+08 Memory= 513.029 t= 280 R= 4e+03 +Depth= 10044 States= 2e+06 Transitions= 3.84e+08 Memory= 559.221 t= 594 R= 3e+03 +Depth= 10044 States= 3e+06 Transitions= 6.04e+08 Memory= 605.803 t= 964 R= 3e+03 +pan: resizing hashtable to -w22.. done +Depth= 10044 States= 4e+06 Transitions= 8.01e+08 Memory= 682.920 t= 1.27e+03 R= 3e+03 +Depth= 10044 States= 5e+06 Transitions= 9.95e+08 Memory= 728.721 t= 1.57e+03 R= 3e+03 +Depth= 10044 States= 6e+06 Transitions= 1.26e+09 Memory= 775.010 t= 1.99e+03 R= 3e+03 +Depth= 10044 States= 7e+06 Transitions= 1.79e+09 Memory= 821.592 t= 2.89e+03 R= 2e+03 +Depth= 10044 States= 8e+06 Transitions= 2.16e+09 Memory= 867.979 t= 3.5e+03 R= 2e+03 +Depth= 10044 States= 9e+06 Transitions= 2.51e+09 Memory= 914.072 t= 4.1e+03 R= 2e+03 +pan: resizing hashtable to -w24.. done +Depth= 10044 States= 1e+07 Transitions= 2.87e+09 Memory= 1085.334 t= 4.67e+03 R= 2e+03 +Depth= 10044 States= 1.1e+07 Transitions= 3.27e+09 Memory= 1132.404 t= 5.29e+03 R= 2e+03 +Depth= 10044 States= 1.2e+07 Transitions= 3.66e+09 Memory= 1179.377 t= 5.91e+03 R= 2e+03 +pan: claim violated! (at depth 1680) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 10044, errors: 1 + 12387044 states, stored +3.7683983e+09 states, matched +3.7807853e+09 transitions (= stored+matched) +2.0718621e+10 atomic steps +hash conflicts: 2.2091218e+09 (resolved) + +Stats on memory usage (in Megabytes): + 1370.332 equivalent memory usage for states (stored*(State-vector + overhead)) + 612.258 actual memory usage for states (compression: 44.68%) + state-vector as stored = 16 byte + 36 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1197.736 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 166228 1420 961 2 2 ] +unreached in proctype urcu_reader + line 894, "pan.___", state 12, "((i<1))" + line 894, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 104, "(1)" + line 249, "pan.___", state 112, "(1)" + line 253, "pan.___", state 124, "(1)" + line 257, "pan.___", state 132, "(1)" + line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 223, "(1)" + line 434, "pan.___", state 253, "(1)" + line 438, "pan.___", state 266, "(1)" + line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 359, "(1)" + line 434, "pan.___", state 389, "(1)" + line 438, "pan.___", state 402, "(1)" + line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 488, "(1)" + line 434, "pan.___", state 518, "(1)" + line 438, "pan.___", state 531, "(1)" + line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 556, "(1)" + line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 557, "else" + line 407, "pan.___", state 560, "(1)" + line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 570, "(1)" + line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 571, "else" + line 411, "pan.___", state 574, "(1)" + line 411, "pan.___", state 575, "(1)" + line 411, "pan.___", state 575, "(1)" + line 409, "pan.___", state 580, "((i<1))" + line 409, "pan.___", state 580, "((i>=1))" + line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 588, "(1)" + line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 589, "else" + line 416, "pan.___", state 592, "(1)" + line 416, "pan.___", state 593, "(1)" + line 416, "pan.___", state 593, "(1)" + line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 602, "(1)" + line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 603, "else" + line 420, "pan.___", state 606, "(1)" + line 420, "pan.___", state 607, "(1)" + line 420, "pan.___", state 607, "(1)" + line 418, "pan.___", state 612, "((i<2))" + line 418, "pan.___", state 612, "((i>=2))" + line 425, "pan.___", state 619, "(1)" + line 425, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 620, "else" + line 425, "pan.___", state 623, "(1)" + line 425, "pan.___", state 624, "(1)" + line 425, "pan.___", state 624, "(1)" + line 429, "pan.___", state 632, "(1)" + line 429, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 633, "else" + line 429, "pan.___", state 636, "(1)" + line 429, "pan.___", state 637, "(1)" + line 429, "pan.___", state 637, "(1)" + line 427, "pan.___", state 642, "((i<1))" + line 427, "pan.___", state 642, "((i>=1))" + line 434, "pan.___", state 649, "(1)" + line 434, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 650, "else" + line 434, "pan.___", state 653, "(1)" + line 434, "pan.___", state 654, "(1)" + line 434, "pan.___", state 654, "(1)" + line 438, "pan.___", state 662, "(1)" + line 438, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 663, "else" + line 438, "pan.___", state 666, "(1)" + line 438, "pan.___", state 667, "(1)" + line 438, "pan.___", state 667, "(1)" + line 436, "pan.___", state 672, "((i<2))" + line 436, "pan.___", state 672, "((i>=2))" + line 446, "pan.___", state 676, "(1)" + line 446, "pan.___", state 676, "(1)" + line 687, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" + line 687, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 687, "pan.___", state 681, "(1)" + line 407, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 753, "(1)" + line 434, "pan.___", state 783, "(1)" + line 438, "pan.___", state 796, "(1)" + line 407, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 889, "(1)" + line 434, "pan.___", state 919, "(1)" + line 438, "pan.___", state 932, "(1)" + line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 955, "(1)" + line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 956, "else" + line 407, "pan.___", state 959, "(1)" + line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 969, "(1)" + line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 970, "else" + line 411, "pan.___", state 973, "(1)" + line 411, "pan.___", state 974, "(1)" + line 411, "pan.___", state 974, "(1)" + line 409, "pan.___", state 979, "((i<1))" + line 409, "pan.___", state 979, "((i>=1))" + line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 987, "(1)" + line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 988, "else" + line 416, "pan.___", state 991, "(1)" + line 416, "pan.___", state 992, "(1)" + line 416, "pan.___", state 992, "(1)" + line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 1001, "(1)" + line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 1002, "else" + line 420, "pan.___", state 1005, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 418, "pan.___", state 1011, "((i<2))" + line 418, "pan.___", state 1011, "((i>=2))" + line 425, "pan.___", state 1018, "(1)" + line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 1019, "else" + line 425, "pan.___", state 1022, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 429, "pan.___", state 1031, "(1)" + line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 1032, "else" + line 429, "pan.___", state 1035, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 427, "pan.___", state 1041, "((i<1))" + line 427, "pan.___", state 1041, "((i>=1))" + line 434, "pan.___", state 1048, "(1)" + line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 1049, "else" + line 434, "pan.___", state 1052, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 438, "pan.___", state 1061, "(1)" + line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 1062, "else" + line 438, "pan.___", state 1065, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 436, "pan.___", state 1071, "((i<2))" + line 436, "pan.___", state 1071, "((i>=2))" + line 446, "pan.___", state 1075, "(1)" + line 446, "pan.___", state 1075, "(1)" + line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1149, "(1)" + line 434, "pan.___", state 1179, "(1)" + line 438, "pan.___", state 1192, "(1)" + line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1281, "(1)" + line 434, "pan.___", state 1311, "(1)" + line 438, "pan.___", state 1324, "(1)" + line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1414, "(1)" + line 434, "pan.___", state 1444, "(1)" + line 438, "pan.___", state 1457, "(1)" + line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1543, "(1)" + line 434, "pan.___", state 1573, "(1)" + line 438, "pan.___", state 1586, "(1)" + line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1677, "(1)" + line 434, "pan.___", state 1707, "(1)" + line 438, "pan.___", state 1720, "(1)" + line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1806, "(1)" + line 434, "pan.___", state 1836, "(1)" + line 438, "pan.___", state 1849, "(1)" + line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1938, "(1)" + line 434, "pan.___", state 1968, "(1)" + line 438, "pan.___", state 1981, "(1)" + line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2074, "(1)" + line 434, "pan.___", state 2104, "(1)" + line 438, "pan.___", state 2117, "(1)" + line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2203, "(1)" + line 434, "pan.___", state 2233, "(1)" + line 438, "pan.___", state 2246, "(1)" + line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 2271, "(1)" + line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 2272, "else" + line 407, "pan.___", state 2275, "(1)" + line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 2286, "else" + line 411, "pan.___", state 2289, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 409, "pan.___", state 2295, "((i<1))" + line 409, "pan.___", state 2295, "((i>=1))" + line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 2303, "(1)" + line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 2304, "else" + line 416, "pan.___", state 2307, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 2317, "(1)" + line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 2318, "else" + line 420, "pan.___", state 2321, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 418, "pan.___", state 2327, "((i<2))" + line 418, "pan.___", state 2327, "((i>=2))" + line 425, "pan.___", state 2334, "(1)" + line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 2335, "else" + line 425, "pan.___", state 2338, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 429, "pan.___", state 2347, "(1)" + line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 2348, "else" + line 429, "pan.___", state 2351, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 427, "pan.___", state 2357, "((i<1))" + line 427, "pan.___", state 2357, "((i>=1))" + line 434, "pan.___", state 2364, "(1)" + line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 2365, "else" + line 434, "pan.___", state 2368, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 438, "pan.___", state 2377, "(1)" + line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 2378, "else" + line 438, "pan.___", state 2381, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 436, "pan.___", state 2387, "((i<2))" + line 436, "pan.___", state 2387, "((i>=2))" + line 446, "pan.___", state 2391, "(1)" + line 446, "pan.___", state 2391, "(1)" + line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" + line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 734, "pan.___", state 2396, "(1)" + line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2468, "(1)" + line 434, "pan.___", state 2498, "(1)" + line 438, "pan.___", state 2511, "(1)" + line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2603, "(1)" + line 434, "pan.___", state 2633, "(1)" + line 438, "pan.___", state 2646, "(1)" + line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2732, "(1)" + line 434, "pan.___", state 2762, "(1)" + line 438, "pan.___", state 2775, "(1)" + line 407, "pan.___", state 2808, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2840, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2854, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2873, "(1)" + line 434, "pan.___", state 2903, "(1)" + line 438, "pan.___", state 2916, "(1)" + line 407, "pan.___", state 2935, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2967, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2981, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 3000, "(1)" + line 434, "pan.___", state 3030, "(1)" + line 438, "pan.___", state 3043, "(1)" + line 929, "pan.___", state 3064, "-end-" + (252 of 3064 states) +unreached in proctype urcu_writer + line 1018, "pan.___", state 12, "((i<1))" + line 1018, "pan.___", state 12, "((i>=1))" + line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 51, "(1)" + line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 65, "(1)" + line 411, "pan.___", state 66, "(1)" + line 411, "pan.___", state 66, "(1)" + line 409, "pan.___", state 71, "((i<1))" + line 409, "pan.___", state 71, "((i>=1))" + line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 83, "(1)" + line 416, "pan.___", state 84, "(1)" + line 416, "pan.___", state 84, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 98, "(1)" + line 420, "pan.___", state 98, "(1)" + line 418, "pan.___", state 103, "((i<2))" + line 418, "pan.___", state 103, "((i>=2))" + line 425, "pan.___", state 110, "(1)" + line 425, "pan.___", state 111, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 111, "else" + line 425, "pan.___", state 114, "(1)" + line 425, "pan.___", state 115, "(1)" + line 425, "pan.___", state 115, "(1)" + line 429, "pan.___", state 123, "(1)" + line 429, "pan.___", state 124, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 124, "else" + line 429, "pan.___", state 127, "(1)" + line 429, "pan.___", state 128, "(1)" + line 429, "pan.___", state 128, "(1)" + line 427, "pan.___", state 133, "((i<1))" + line 427, "pan.___", state 133, "((i>=1))" + line 434, "pan.___", state 140, "(1)" + line 434, "pan.___", state 141, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 141, "else" + line 434, "pan.___", state 144, "(1)" + line 434, "pan.___", state 145, "(1)" + line 434, "pan.___", state 145, "(1)" + line 438, "pan.___", state 153, "(1)" + line 438, "pan.___", state 154, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 154, "else" + line 438, "pan.___", state 157, "(1)" + line 438, "pan.___", state 158, "(1)" + line 438, "pan.___", state 158, "(1)" + line 436, "pan.___", state 163, "((i<2))" + line 436, "pan.___", state 163, "((i>=2))" + line 446, "pan.___", state 167, "(1)" + line 446, "pan.___", state 167, "(1)" + line 268, "pan.___", state 176, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 185, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 198, "cache_dirty_rcu_ptr = 0" + line 407, "pan.___", state 238, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 252, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 270, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 284, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 303, "(1)" + line 429, "pan.___", state 316, "(1)" + line 434, "pan.___", state 333, "(1)" + line 438, "pan.___", state 346, "(1)" + line 411, "pan.___", state 383, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 401, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 415, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 447, "(1)" + line 434, "pan.___", state 464, "(1)" + line 438, "pan.___", state 477, "(1)" + line 411, "pan.___", state 522, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 540, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 554, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 586, "(1)" + line 434, "pan.___", state 603, "(1)" + line 438, "pan.___", state 616, "(1)" + line 411, "pan.___", state 651, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 669, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 683, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 715, "(1)" + line 434, "pan.___", state 732, "(1)" + line 438, "pan.___", state 745, "(1)" + line 411, "pan.___", state 782, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 800, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 814, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 846, "(1)" + line 434, "pan.___", state 863, "(1)" + line 438, "pan.___", state 876, "(1)" + line 268, "pan.___", state 931, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 940, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 955, "(1)" + line 280, "pan.___", state 962, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 978, "(1)" + line 249, "pan.___", state 986, "(1)" + line 253, "pan.___", state 998, "(1)" + line 257, "pan.___", state 1006, "(1)" + line 268, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1046, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1059, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1068, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1084, "(1)" + line 249, "pan.___", state 1092, "(1)" + line 253, "pan.___", state 1104, "(1)" + line 257, "pan.___", state 1112, "(1)" + line 272, "pan.___", state 1138, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1151, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1160, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1176, "(1)" + line 249, "pan.___", state 1184, "(1)" + line 253, "pan.___", state 1196, "(1)" + line 257, "pan.___", state 1204, "(1)" + line 268, "pan.___", state 1235, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1244, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1257, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1266, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1282, "(1)" + line 249, "pan.___", state 1290, "(1)" + line 253, "pan.___", state 1302, "(1)" + line 257, "pan.___", state 1310, "(1)" + line 272, "pan.___", state 1336, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1349, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1358, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1374, "(1)" + line 249, "pan.___", state 1382, "(1)" + line 253, "pan.___", state 1394, "(1)" + line 257, "pan.___", state 1402, "(1)" + line 268, "pan.___", state 1433, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1442, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1455, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1464, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1480, "(1)" + line 249, "pan.___", state 1488, "(1)" + line 253, "pan.___", state 1500, "(1)" + line 257, "pan.___", state 1508, "(1)" + line 272, "pan.___", state 1534, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1547, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1556, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1572, "(1)" + line 249, "pan.___", state 1580, "(1)" + line 253, "pan.___", state 1592, "(1)" + line 257, "pan.___", state 1600, "(1)" + line 268, "pan.___", state 1631, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1640, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1653, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1662, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1678, "(1)" + line 249, "pan.___", state 1686, "(1)" + line 253, "pan.___", state 1698, "(1)" + line 257, "pan.___", state 1706, "(1)" + line 1304, "pan.___", state 1722, "-end-" + (129 of 1722 states) +unreached in proctype :init: + line 1319, "pan.___", state 13, "((i<1))" + line 1319, "pan.___", state 13, "((i>=1))" + (1 of 28 states) +unreached in proctype :never: + line 1367, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 6.09e+03 seconds +pan: rate 2033.9606 states/second +pan: avg transition delay 1.6108e-06 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input b/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..cf50dff --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input @@ -0,0 +1,1340 @@ +#define NO_RMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input.trail b/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..d5ed67a --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1683 @@ +-2:3:-2 +-4:-4:-4 +1:0:4816 +2:2:3064 +3:2:3069 +4:2:3073 +5:2:3081 +6:2:3085 +7:2:3089 +8:0:4816 +9:1:0 +10:1:5 +11:1:9 +12:1:17 +13:1:21 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+1665:1:2910 +1666:1:2911 +1667:1:2912 +1668:1:2910 +1669:1:2918 +1670:1:2919 +1671:1:2923 +1672:1:2927 +1673:0:4816 +1674:2:4086 +1675:0:4816 +1676:1:1342 +1677:1:1343 +1678:0:4814 +1679:1:42 +1680:0:4820 +1681:1:2421 diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.define b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.log b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.log new file mode 100644 index 0000000..7da250d --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.log @@ -0,0 +1,580 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +Depth= 8002 States= 1e+06 Transitions= 1.77e+08 Memory= 513.029 t= 264 R= 4e+03 +Depth= 9746 States= 2e+06 Transitions= 3.71e+08 Memory= 559.318 t= 570 R= 4e+03 +Depth= 9746 States= 3e+06 Transitions= 5.8e+08 Memory= 605.901 t= 916 R= 3e+03 +pan: resizing hashtable to -w22.. done +Depth= 9746 States= 4e+06 Transitions= 7.6e+08 Memory= 682.920 t= 1.19e+03 R= 3e+03 +Depth= 9746 States= 5e+06 Transitions= 9.44e+08 Memory= 728.721 t= 1.47e+03 R= 3e+03 +Depth= 9746 States= 6e+06 Transitions= 1.35e+09 Memory= 775.303 t= 2.12e+03 R= 3e+03 +Depth= 9746 States= 7e+06 Transitions= 1.79e+09 Memory= 821.885 t= 2.84e+03 R= 2e+03 +Depth= 9746 States= 8e+06 Transitions= 2.11e+09 Memory= 868.076 t= 3.35e+03 R= 2e+03 +Depth= 9746 States= 9e+06 Transitions= 2.49e+09 Memory= 914.658 t= 3.99e+03 R= 2e+03 +pan: resizing hashtable to -w24.. done +Depth= 9746 States= 1e+07 Transitions= 2.83e+09 Memory= 1085.529 t= 4.5e+03 R= 2e+03 +Depth= 9746 States= 1.1e+07 Transitions= 3.2e+09 Memory= 1132.795 t= 5.06e+03 R= 2e+03 +Depth= 9746 States= 1.2e+07 Transitions= 3.59e+09 Memory= 1179.670 t= 5.66e+03 R= 2e+03 +Depth= 9746 States= 1.3e+07 Transitions= 3.78e+09 Memory= 1226.447 t= 5.95e+03 R= 2e+03 +Depth= 9746 States= 1.4e+07 Transitions= 3.96e+09 Memory= 1272.346 t= 6.23e+03 R= 2e+03 +Depth= 9746 States= 1.5e+07 Transitions= 4.17e+09 Memory= 1318.440 t= 6.56e+03 R= 2e+03 +Depth= 9746 States= 1.6e+07 Transitions= 4.37e+09 Memory= 1364.338 t= 6.86e+03 R= 2e+03 +Depth= 9746 States= 1.7e+07 Transitions= 4.55e+09 Memory= 1410.139 t= 7.14e+03 R= 2e+03 +Depth= 9746 States= 1.8e+07 Transitions= 4.8e+09 Memory= 1456.135 t= 7.53e+03 R= 2e+03 +Depth= 9746 States= 1.9e+07 Transitions= 5.2e+09 Memory= 1502.326 t= 8.17e+03 R= 2e+03 +Depth= 9746 States= 2e+07 Transitions= 5.67e+09 Memory= 1548.615 t= 8.94e+03 R= 2e+03 +Depth= 9746 States= 2.1e+07 Transitions= 6.01e+09 Memory= 1594.611 t= 9.49e+03 R= 2e+03 +Depth= 9746 States= 2.2e+07 Transitions= 6.42e+09 Memory= 1640.998 t= 1.01e+04 R= 2e+03 +Depth= 9746 States= 2.3e+07 Transitions= 6.67e+09 Memory= 1687.580 t= 1.05e+04 R= 2e+03 +Depth= 9746 States= 2.4e+07 Transitions= 6.96e+09 Memory= 1733.674 t= 1.1e+04 R= 2e+03 +Depth= 9746 States= 2.5e+07 Transitions= 7.2e+09 Memory= 1779.865 t= 1.14e+04 R= 2e+03 +Depth= 9746 States= 2.6e+07 Transitions= 7.61e+09 Memory= 1826.154 t= 1.2e+04 R= 2e+03 +Depth= 9746 States= 2.7e+07 Transitions= 8.36e+09 Memory= 1872.248 t= 1.32e+04 R= 2e+03 +Depth= 9746 States= 2.8e+07 Transitions= 9.08e+09 Memory= 1918.733 t= 1.44e+04 R= 2e+03 +Depth= 9746 States= 2.9e+07 Transitions= 9.48e+09 Memory= 1965.608 t= 1.51e+04 R= 2e+03 +Depth= 9746 States= 3e+07 Transitions= 9.94e+09 Memory= 2012.483 t= 1.58e+04 R= 2e+03 +Depth= 9746 States= 3.1e+07 Transitions= 1.02e+10 Memory= 2058.576 t= 1.62e+04 R= 2e+03 +Depth= 9746 States= 3.2e+07 Transitions= 1.05e+10 Memory= 2104.475 t= 1.67e+04 R= 2e+03 +Depth= 9746 States= 3.3e+07 Transitions= 1.08e+10 Memory= 2150.373 t= 1.72e+04 R= 2e+03 +Depth= 9746 States= 3.4e+07 Transitions= 1.15e+10 Memory= 2196.369 t= 1.84e+04 R= 2e+03 +pan: resizing hashtable to -w26.. done +Depth= 9746 States= 3.5e+07 Transitions= 1.22e+10 Memory= 2738.350 t= 1.96e+04 R= 2e+03 +Depth= 9746 States= 3.6e+07 Transitions= 1.27e+10 Memory= 2784.639 t= 2.03e+04 R= 2e+03 +Depth= 9746 States= 3.7e+07 Transitions= 1.29e+10 Memory= 2831.026 t= 2.07e+04 R= 2e+03 +Depth= 9746 States= 3.8e+07 Transitions= 1.34e+10 Memory= 2877.510 t= 2.14e+04 R= 2e+03 +Depth= 9746 States= 3.9e+07 Transitions= 1.39e+10 Memory= 2923.701 t= 2.21e+04 R= 2e+03 +Depth= 9746 States= 4e+07 Transitions= 1.44e+10 Memory= 2969.697 t= 2.29e+04 R= 2e+03 +Depth= 9746 States= 4.1e+07 Transitions= 1.48e+10 Memory= 3015.889 t= 2.36e+04 R= 2e+03 +Depth= 9746 States= 4.2e+07 Transitions= 1.52e+10 Memory= 3061.787 t= 2.42e+04 R= 2e+03 +Depth= 9746 States= 4.3e+07 Transitions= 1.57e+10 Memory= 3107.979 t= 2.5e+04 R= 2e+03 +Depth= 9746 States= 4.4e+07 Transitions= 1.61e+10 Memory= 3153.779 t= 2.56e+04 R= 2e+03 +Depth= 9746 States= 4.5e+07 Transitions= 1.64e+10 Memory= 3199.873 t= 2.6e+04 R= 2e+03 +Depth= 9746 States= 4.6e+07 Transitions= 1.68e+10 Memory= 3245.967 t= 2.66e+04 R= 2e+03 +Depth= 9746 States= 4.7e+07 Transitions= 1.7e+10 Memory= 3291.865 t= 2.7e+04 R= 2e+03 +Depth= 9746 States= 4.8e+07 Transitions= 1.74e+10 Memory= 3338.057 t= 2.75e+04 R= 2e+03 +Depth= 9746 States= 4.9e+07 Transitions= 1.79e+10 Memory= 3384.151 t= 2.83e+04 R= 2e+03 +Depth= 9868 States= 5e+07 Transitions= 1.82e+10 Memory= 3429.951 t= 2.88e+04 R= 2e+03 +Depth= 9912 States= 5.1e+07 Transitions= 1.86e+10 Memory= 3475.752 t= 2.94e+04 R= 2e+03 +Depth= 9912 States= 5.2e+07 Transitions= 1.89e+10 Memory= 3521.553 t= 2.99e+04 R= 2e+03 +Depth= 9912 States= 5.3e+07 Transitions= 1.93e+10 Memory= 3567.256 t= 3.05e+04 R= 2e+03 +Depth= 9912 States= 5.4e+07 Transitions= 1.96e+10 Memory= 3613.154 t= 3.1e+04 R= 2e+03 +Depth= 9912 States= 5.5e+07 Transitions= 2e+10 Memory= 3659.053 t= 3.16e+04 R= 2e+03 +Depth= 9912 States= 5.6e+07 Transitions= 2.03e+10 Memory= 3704.756 t= 3.2e+04 R= 2e+03 +Depth= 9912 States= 5.7e+07 Transitions= 2.06e+10 Memory= 3750.557 t= 3.25e+04 R= 2e+03 +Depth= 9912 States= 5.8e+07 Transitions= 2.1e+10 Memory= 3796.455 t= 3.31e+04 R= 2e+03 +Depth= 9912 States= 5.9e+07 Transitions= 2.13e+10 Memory= 3842.256 t= 3.37e+04 R= 2e+03 +Depth= 9912 States= 6e+07 Transitions= 2.16e+10 Memory= 3888.057 t= 3.42e+04 R= 2e+03 +Depth= 9912 States= 6.1e+07 Transitions= 2.2e+10 Memory= 3933.858 t= 3.47e+04 R= 2e+03 +Depth= 9912 States= 6.2e+07 Transitions= 2.23e+10 Memory= 3979.658 t= 3.52e+04 R= 2e+03 +Depth= 9912 States= 6.3e+07 Transitions= 2.27e+10 Memory= 4025.459 t= 3.58e+04 R= 2e+03 +Depth= 9912 States= 6.4e+07 Transitions= 2.3e+10 Memory= 4071.260 t= 3.63e+04 R= 2e+03 +Depth= 9912 States= 6.5e+07 Transitions= 2.33e+10 Memory= 4116.963 t= 3.69e+04 R= 2e+03 +Depth= 9912 States= 6.6e+07 Transitions= 2.36e+10 Memory= 4162.764 t= 3.73e+04 R= 2e+03 +Depth= 9912 States= 6.7e+07 Transitions= 2.39e+10 Memory= 4208.565 t= 3.78e+04 R= 2e+03 +Depth= 9912 States= 6.8e+07 Transitions= 2.42e+10 Memory= 4254.463 t= 3.83e+04 R= 2e+03 +Depth= 9912 States= 6.9e+07 Transitions= 2.46e+10 Memory= 4300.361 t= 3.88e+04 R= 2e+03 +Depth= 9912 States= 7e+07 Transitions= 2.5e+10 Memory= 4346.553 t= 3.94e+04 R= 2e+03 +Depth= 9912 States= 7.1e+07 Transitions= 2.53e+10 Memory= 4392.354 t= 4e+04 R= 2e+03 +Depth= 9912 States= 7.2e+07 Transitions= 2.58e+10 Memory= 4438.252 t= 4.07e+04 R= 2e+03 +Depth= 9912 States= 7.3e+07 Transitions= 2.61e+10 Memory= 4484.151 t= 4.12e+04 R= 2e+03 +Depth= 9912 States= 7.4e+07 Transitions= 2.66e+10 Memory= 4530.635 t= 4.19e+04 R= 2e+03 +Depth= 9912 States= 7.5e+07 Transitions= 2.69e+10 Memory= 4577.315 t= 4.25e+04 R= 2e+03 +Depth= 9912 States= 7.6e+07 Transitions= 2.74e+10 Memory= 4623.897 t= 4.32e+04 R= 2e+03 +Depth= 9912 States= 7.7e+07 Transitions= 2.78e+10 Memory= 4669.893 t= 4.39e+04 R= 2e+03 +Depth= 9912 States= 7.8e+07 Transitions= 2.82e+10 Memory= 4716.084 t= 4.45e+04 R= 2e+03 +Depth= 9912 States= 7.9e+07 Transitions= 2.85e+10 Memory= 4762.568 t= 4.5e+04 R= 2e+03 +Depth= 9912 States= 8e+07 Transitions= 2.87e+10 Memory= 4808.369 t= 4.52e+04 R= 2e+03 +Depth= 9912 States= 8.1e+07 Transitions= 2.89e+10 Memory= 4854.170 t= 4.56e+04 R= 2e+03 +Depth= 9912 States= 8.2e+07 Transitions= 2.91e+10 Memory= 4899.971 t= 4.59e+04 R= 2e+03 +Depth= 9912 States= 8.3e+07 Transitions= 2.93e+10 Memory= 4945.772 t= 4.61e+04 R= 2e+03 +Depth= 9912 States= 8.4e+07 Transitions= 2.95e+10 Memory= 4991.475 t= 4.64e+04 R= 2e+03 +Depth= 9912 States= 8.5e+07 Transitions= 2.99e+10 Memory= 5037.276 t= 4.71e+04 R= 2e+03 +Depth= 9912 States= 8.6e+07 Transitions= 3.03e+10 Memory= 5083.076 t= 4.78e+04 R= 2e+03 +Depth= 9912 States= 8.7e+07 Transitions= 3.07e+10 Memory= 5128.877 t= 4.83e+04 R= 2e+03 +pan: claim violated! (at depth 1530) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 9912, errors: 1 + 87915830 states, stored +3.0918075e+10 states, matched +3.100599e+10 transitions (= stored+matched) +1.742054e+11 atomic steps +hash conflicts: 1.5948958e+10 (resolved) + +Stats on memory usage (in Megabytes): + 9725.796 equivalent memory usage for states (stored*(State-vector + overhead)) + 4202.002 actual memory usage for states (compression: 43.20%) + state-vector as stored = 14 byte + 36 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 5170.869 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 517357 4332 4682 2 2 ] +unreached in proctype urcu_reader + line 894, "pan.___", state 12, "((i<1))" + line 894, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 104, "(1)" + line 249, "pan.___", state 112, "(1)" + line 253, "pan.___", state 124, "(1)" + line 257, "pan.___", state 132, "(1)" + line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 223, "(1)" + line 434, "pan.___", state 253, "(1)" + line 438, "pan.___", state 266, "(1)" + line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 359, "(1)" + line 434, "pan.___", state 389, "(1)" + line 438, "pan.___", state 402, "(1)" + line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 488, "(1)" + line 434, "pan.___", state 518, "(1)" + line 438, "pan.___", state 531, "(1)" + line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 556, "(1)" + line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 557, "else" + line 407, "pan.___", state 560, "(1)" + line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 570, "(1)" + line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 571, "else" + line 411, "pan.___", state 574, "(1)" + line 411, "pan.___", state 575, "(1)" + line 411, "pan.___", state 575, "(1)" + line 409, "pan.___", state 580, "((i<1))" + line 409, "pan.___", state 580, "((i>=1))" + line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 588, "(1)" + line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 589, "else" + line 416, "pan.___", state 592, "(1)" + line 416, "pan.___", state 593, "(1)" + line 416, "pan.___", state 593, "(1)" + line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 602, "(1)" + line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 603, "else" + line 420, "pan.___", state 606, "(1)" + line 420, "pan.___", state 607, "(1)" + line 420, "pan.___", state 607, "(1)" + line 418, "pan.___", state 612, "((i<2))" + line 418, "pan.___", state 612, "((i>=2))" + line 425, "pan.___", state 619, "(1)" + line 425, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 620, "else" + line 425, "pan.___", state 623, "(1)" + line 425, "pan.___", state 624, "(1)" + line 425, "pan.___", state 624, "(1)" + line 429, "pan.___", state 632, "(1)" + line 429, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 633, "else" + line 429, "pan.___", state 636, "(1)" + line 429, "pan.___", state 637, "(1)" + line 429, "pan.___", state 637, "(1)" + line 427, "pan.___", state 642, "((i<1))" + line 427, "pan.___", state 642, "((i>=1))" + line 434, "pan.___", state 649, "(1)" + line 434, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 650, "else" + line 434, "pan.___", state 653, "(1)" + line 434, "pan.___", state 654, "(1)" + line 434, "pan.___", state 654, "(1)" + line 438, "pan.___", state 662, "(1)" + line 438, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 663, "else" + line 438, "pan.___", state 666, "(1)" + line 438, "pan.___", state 667, "(1)" + line 438, "pan.___", state 667, "(1)" + line 436, "pan.___", state 672, "((i<2))" + line 436, "pan.___", state 672, "((i>=2))" + line 446, "pan.___", state 676, "(1)" + line 446, "pan.___", state 676, "(1)" + line 687, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" + line 687, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 687, "pan.___", state 681, "(1)" + line 407, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 753, "(1)" + line 434, "pan.___", state 783, "(1)" + line 438, "pan.___", state 796, "(1)" + line 407, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 889, "(1)" + line 434, "pan.___", state 919, "(1)" + line 438, "pan.___", state 932, "(1)" + line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 955, "(1)" + line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 956, "else" + line 407, "pan.___", state 959, "(1)" + line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 969, "(1)" + line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 970, "else" + line 411, "pan.___", state 973, "(1)" + line 411, "pan.___", state 974, "(1)" + line 411, "pan.___", state 974, "(1)" + line 409, "pan.___", state 979, "((i<1))" + line 409, "pan.___", state 979, "((i>=1))" + line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 987, "(1)" + line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 988, "else" + line 416, "pan.___", state 991, "(1)" + line 416, "pan.___", state 992, "(1)" + line 416, "pan.___", state 992, "(1)" + line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 1001, "(1)" + line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 1002, "else" + line 420, "pan.___", state 1005, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 418, "pan.___", state 1011, "((i<2))" + line 418, "pan.___", state 1011, "((i>=2))" + line 425, "pan.___", state 1018, "(1)" + line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 1019, "else" + line 425, "pan.___", state 1022, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 429, "pan.___", state 1031, "(1)" + line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 1032, "else" + line 429, "pan.___", state 1035, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 427, "pan.___", state 1041, "((i<1))" + line 427, "pan.___", state 1041, "((i>=1))" + line 434, "pan.___", state 1048, "(1)" + line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 1049, "else" + line 434, "pan.___", state 1052, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 438, "pan.___", state 1061, "(1)" + line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 1062, "else" + line 438, "pan.___", state 1065, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 436, "pan.___", state 1071, "((i<2))" + line 436, "pan.___", state 1071, "((i>=2))" + line 446, "pan.___", state 1075, "(1)" + line 446, "pan.___", state 1075, "(1)" + line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1149, "(1)" + line 434, "pan.___", state 1179, "(1)" + line 438, "pan.___", state 1192, "(1)" + line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1281, "(1)" + line 434, "pan.___", state 1311, "(1)" + line 438, "pan.___", state 1324, "(1)" + line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1414, "(1)" + line 434, "pan.___", state 1444, "(1)" + line 438, "pan.___", state 1457, "(1)" + line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1543, "(1)" + line 434, "pan.___", state 1573, "(1)" + line 438, "pan.___", state 1586, "(1)" + line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1677, "(1)" + line 434, "pan.___", state 1707, "(1)" + line 438, "pan.___", state 1720, "(1)" + line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1806, "(1)" + line 434, "pan.___", state 1836, "(1)" + line 438, "pan.___", state 1849, "(1)" + line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1938, "(1)" + line 434, "pan.___", state 1968, "(1)" + line 438, "pan.___", state 1981, "(1)" + line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2074, "(1)" + line 434, "pan.___", state 2104, "(1)" + line 438, "pan.___", state 2117, "(1)" + line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2203, "(1)" + line 434, "pan.___", state 2233, "(1)" + line 438, "pan.___", state 2246, "(1)" + line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 2271, "(1)" + line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 2272, "else" + line 407, "pan.___", state 2275, "(1)" + line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 2286, "else" + line 411, "pan.___", state 2289, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 409, "pan.___", state 2295, "((i<1))" + line 409, "pan.___", state 2295, "((i>=1))" + line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 2303, "(1)" + line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 2304, "else" + line 416, "pan.___", state 2307, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 2317, "(1)" + line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 2318, "else" + line 420, "pan.___", state 2321, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 418, "pan.___", state 2327, "((i<2))" + line 418, "pan.___", state 2327, "((i>=2))" + line 425, "pan.___", state 2334, "(1)" + line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 2335, "else" + line 425, "pan.___", state 2338, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 429, "pan.___", state 2347, "(1)" + line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 2348, "else" + line 429, "pan.___", state 2351, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 427, "pan.___", state 2357, "((i<1))" + line 427, "pan.___", state 2357, "((i>=1))" + line 434, "pan.___", state 2364, "(1)" + line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 2365, "else" + line 434, "pan.___", state 2368, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 438, "pan.___", state 2377, "(1)" + line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 2378, "else" + line 438, "pan.___", state 2381, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 436, "pan.___", state 2387, "((i<2))" + line 436, "pan.___", state 2387, "((i>=2))" + line 446, "pan.___", state 2391, "(1)" + line 446, "pan.___", state 2391, "(1)" + line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" + line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 734, "pan.___", state 2396, "(1)" + line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2468, "(1)" + line 434, "pan.___", state 2498, "(1)" + line 438, "pan.___", state 2511, "(1)" + line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2603, "(1)" + line 434, "pan.___", state 2633, "(1)" + line 438, "pan.___", state 2646, "(1)" + line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2732, "(1)" + line 434, "pan.___", state 2762, "(1)" + line 438, "pan.___", state 2775, "(1)" + line 245, "pan.___", state 2808, "(1)" + line 253, "pan.___", state 2828, "(1)" + line 257, "pan.___", state 2836, "(1)" + line 245, "pan.___", state 2851, "(1)" + line 253, "pan.___", state 2871, "(1)" + line 257, "pan.___", state 2879, "(1)" + line 929, "pan.___", state 2896, "-end-" + (246 of 2896 states) +unreached in proctype urcu_writer + line 1018, "pan.___", state 12, "((i<1))" + line 1018, "pan.___", state 12, "((i>=1))" + line 407, "pan.___", state 46, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 60, "cache_dirty_urcu_active_readers = 0" + line 425, "pan.___", state 111, "(1)" + line 429, "pan.___", state 124, "(1)" + line 268, "pan.___", state 177, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 179, "(1)" + line 272, "pan.___", state 186, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 188, "(1)" + line 272, "pan.___", state 189, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 189, "else" + line 270, "pan.___", state 194, "((i<1))" + line 270, "pan.___", state 194, "((i>=1))" + line 276, "pan.___", state 199, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 201, "(1)" + line 276, "pan.___", state 202, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 202, "else" + line 280, "pan.___", state 208, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 210, "(1)" + line 280, "pan.___", state 211, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 211, "else" + line 285, "pan.___", state 220, "(cache_dirty_urcu_gp_ctr)" + line 285, "pan.___", state 220, "else" + line 407, "pan.___", state 239, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 253, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 271, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 285, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 304, "(1)" + line 429, "pan.___", state 317, "(1)" + line 434, "pan.___", state 334, "(1)" + line 438, "pan.___", state 347, "(1)" + line 411, "pan.___", state 384, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 402, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 416, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 448, "(1)" + line 434, "pan.___", state 465, "(1)" + line 438, "pan.___", state 478, "(1)" + line 411, "pan.___", state 523, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 541, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 555, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 587, "(1)" + line 434, "pan.___", state 604, "(1)" + line 438, "pan.___", state 617, "(1)" + line 411, "pan.___", state 652, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 670, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 684, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 716, "(1)" + line 434, "pan.___", state 733, "(1)" + line 438, "pan.___", state 746, "(1)" + line 411, "pan.___", state 783, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 801, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 815, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 847, "(1)" + line 434, "pan.___", state 864, "(1)" + line 438, "pan.___", state 877, "(1)" + line 268, "pan.___", state 932, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 941, "cache_dirty_urcu_active_readers = 0" + line 245, "pan.___", state 979, "(1)" + line 249, "pan.___", state 987, "(1)" + line 253, "pan.___", state 999, "(1)" + line 257, "pan.___", state 1007, "(1)" + line 268, "pan.___", state 1038, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1047, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1060, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1069, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1085, "(1)" + line 249, "pan.___", state 1093, "(1)" + line 253, "pan.___", state 1105, "(1)" + line 257, "pan.___", state 1113, "(1)" + line 272, "pan.___", state 1139, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1152, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1161, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1177, "(1)" + line 249, "pan.___", state 1185, "(1)" + line 253, "pan.___", state 1197, "(1)" + line 257, "pan.___", state 1205, "(1)" + line 268, "pan.___", state 1236, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1245, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1258, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1267, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1283, "(1)" + line 249, "pan.___", state 1291, "(1)" + line 253, "pan.___", state 1303, "(1)" + line 257, "pan.___", state 1311, "(1)" + line 272, "pan.___", state 1337, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1350, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1359, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1375, "(1)" + line 249, "pan.___", state 1383, "(1)" + line 253, "pan.___", state 1395, "(1)" + line 257, "pan.___", state 1403, "(1)" + line 268, "pan.___", state 1434, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1443, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1456, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1465, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1481, "(1)" + line 249, "pan.___", state 1489, "(1)" + line 253, "pan.___", state 1501, "(1)" + line 257, "pan.___", state 1509, "(1)" + line 272, "pan.___", state 1535, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1548, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1557, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1573, "(1)" + line 249, "pan.___", state 1581, "(1)" + line 253, "pan.___", state 1593, "(1)" + line 257, "pan.___", state 1601, "(1)" + line 268, "pan.___", state 1632, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1641, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1654, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1663, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1679, "(1)" + line 249, "pan.___", state 1687, "(1)" + line 253, "pan.___", state 1699, "(1)" + line 257, "pan.___", state 1707, "(1)" + line 1304, "pan.___", state 1723, "-end-" + (110 of 1723 states) +unreached in proctype :init: + line 1319, "pan.___", state 13, "((i<1))" + line 1319, "pan.___", state 13, "((i>=1))" + (1 of 28 states) +unreached in proctype :never: + line 1367, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 4.88e+04 seconds +pan: rate 1799.8673 states/second +pan: avg transition delay 1.5754e-06 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..4159c77 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input @@ -0,0 +1,1340 @@ +#define NO_WMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input.trail b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..f280086 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1533 @@ +-2:3:-2 +-4:-4:-4 +1:0:4649 +2:2:2896 +3:2:2901 +4:2:2905 +5:2:2913 +6:2:2917 +7:2:2921 +8:0:4649 +9:1:0 +10:1:5 +11:1:9 +12:1:17 +13:1:21 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+1510:2:3891 +1511:2:3898 +1512:2:3899 +1513:2:3898 +1514:2:3899 +1515:2:3906 +1516:2:3910 +1517:0:4649 +1518:2:3915 +1519:0:4649 +1520:2:3916 +1521:0:4649 +1522:2:3917 +1523:0:4649 +1524:2:3918 +1525:0:4649 +1526:1:1342 +1527:1:1343 +1528:0:4647 +1529:2:3919 +1530:0:4653 +1531:1:2501 diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.define b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.log b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.log new file mode 100644 index 0000000..1d98e20 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.log @@ -0,0 +1,696 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +Depth= 9651 States= 1e+06 Transitions= 1.79e+08 Memory= 513.029 t= 267 R= 4e+03 +Depth= 9651 States= 2e+06 Transitions= 4.37e+08 Memory= 559.416 t= 679 R= 3e+03 +Depth= 9651 States= 3e+06 Transitions= 7.08e+08 Memory= 605.901 t= 1.13e+03 R= 3e+03 +pan: resizing hashtable to -w22.. done +Depth= 9651 States= 4e+06 Transitions= 9.4e+08 Memory= 683.213 t= 1.48e+03 R= 3e+03 +Depth= 9651 States= 5e+06 Transitions= 1.26e+09 Memory= 730.479 t= 1.98e+03 R= 3e+03 +Depth= 9651 States= 6e+06 Transitions= 1.55e+09 Memory= 777.451 t= 2.43e+03 R= 2e+03 +Depth= 9651 States= 7e+06 Transitions= 1.82e+09 Memory= 824.522 t= 2.87e+03 R= 2e+03 +Depth= 9651 States= 8e+06 Transitions= 2.01e+09 Memory= 871.494 t= 3.16e+03 R= 3e+03 +Depth= 9651 States= 9e+06 Transitions= 2.19e+09 Memory= 917.295 t= 3.45e+03 R= 3e+03 +pan: resizing hashtable to -w24.. done +Depth= 9651 States= 1e+07 Transitions= 2.37e+09 Memory= 1087.092 t= 3.73e+03 R= 3e+03 +Depth= 9651 States= 1.1e+07 Transitions= 2.59e+09 Memory= 1133.088 t= 4.06e+03 R= 3e+03 +Depth= 9651 States= 1.2e+07 Transitions= 2.88e+09 Memory= 1179.572 t= 4.5e+03 R= 3e+03 +Depth= 9651 States= 1.3e+07 Transitions= 3.1e+09 Memory= 1226.545 t= 4.84e+03 R= 3e+03 +Depth= 9651 States= 1.4e+07 Transitions= 3.33e+09 Memory= 1272.834 t= 5.18e+03 R= 3e+03 +Depth= 9651 States= 1.5e+07 Transitions= 3.58e+09 Memory= 1318.733 t= 5.57e+03 R= 3e+03 +Depth= 9651 States= 1.6e+07 Transitions= 3.79e+09 Memory= 1364.729 t= 5.9e+03 R= 3e+03 +Depth= 9651 States= 1.7e+07 Transitions= 4.09e+09 Memory= 1410.725 t= 6.36e+03 R= 3e+03 +Depth= 9892 States= 1.8e+07 Transitions= 4.34e+09 Memory= 1456.526 t= 6.76e+03 R= 3e+03 +Depth= 9897 States= 1.9e+07 Transitions= 4.61e+09 Memory= 1502.326 t= 7.17e+03 R= 3e+03 +Depth= 9897 States= 2e+07 Transitions= 4.88e+09 Memory= 1548.127 t= 7.6e+03 R= 3e+03 +Depth= 9897 States= 2.1e+07 Transitions= 5.16e+09 Memory= 1594.318 t= 8.03e+03 R= 3e+03 +Depth= 9897 States= 2.2e+07 Transitions= 5.46e+09 Memory= 1640.315 t= 8.52e+03 R= 3e+03 +Depth= 9897 States= 2.3e+07 Transitions= 5.74e+09 Memory= 1686.115 t= 8.95e+03 R= 3e+03 +Depth= 9897 States= 2.4e+07 Transitions= 6e+09 Memory= 1731.916 t= 9.36e+03 R= 3e+03 +Depth= 9897 States= 2.5e+07 Transitions= 6.24e+09 Memory= 1777.717 t= 9.75e+03 R= 3e+03 +Depth= 9897 States= 2.6e+07 Transitions= 6.48e+09 Memory= 1823.518 t= 1.01e+04 R= 3e+03 +Depth= 9897 States= 2.7e+07 Transitions= 6.7e+09 Memory= 1869.318 t= 1.05e+04 R= 3e+03 +Depth= 9897 States= 2.8e+07 Transitions= 7.03e+09 Memory= 1916.486 t= 1.1e+04 R= 3e+03 +Depth= 9897 States= 2.9e+07 Transitions= 7.36e+09 Memory= 1962.678 t= 1.15e+04 R= 3e+03 +Depth= 9897 States= 3e+07 Transitions= 7.63e+09 Memory= 2008.967 t= 1.2e+04 R= 3e+03 +Depth= 9897 States= 3.1e+07 Transitions= 7.94e+09 Memory= 2054.963 t= 1.25e+04 R= 2e+03 +Depth= 9897 States= 3.2e+07 Transitions= 8.2e+09 Memory= 2102.033 t= 1.29e+04 R= 2e+03 +Depth= 9897 States= 3.3e+07 Transitions= 8.41e+09 Memory= 2148.029 t= 1.32e+04 R= 2e+03 +Depth= 9897 States= 3.4e+07 Transitions= 8.68e+09 Memory= 2194.123 t= 1.36e+04 R= 2e+03 +pan: resizing hashtable to -w26.. done +Depth= 9897 States= 3.5e+07 Transitions= 8.91e+09 Memory= 2736.006 t= 1.4e+04 R= 2e+03 +Depth= 9897 States= 3.6e+07 Transitions= 9.2e+09 Memory= 2781.807 t= 1.44e+04 R= 2e+03 +Depth= 9897 States= 3.7e+07 Transitions= 9.48e+09 Memory= 2827.608 t= 1.49e+04 R= 2e+03 +Depth= 9897 States= 3.8e+07 Transitions= 9.72e+09 Memory= 2873.408 t= 1.52e+04 R= 2e+03 +Depth= 9897 States= 3.9e+07 Transitions= 9.98e+09 Memory= 2919.209 t= 1.56e+04 R= 2e+03 +Depth= 9897 States= 4e+07 Transitions= 1.02e+10 Memory= 2965.010 t= 1.6e+04 R= 2e+03 +Depth= 9897 States= 4.1e+07 Transitions= 1.05e+10 Memory= 3010.713 t= 1.64e+04 R= 2e+03 +Depth= 9897 States= 4.2e+07 Transitions= 1.07e+10 Memory= 3056.611 t= 1.68e+04 R= 3e+03 +pan: claim violated! (at depth 1439) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 9897, errors: 1 + 42642410 states, stored +1.0909582e+10 states, matched +1.0952224e+10 transitions (= stored+matched) +5.922913e+10 atomic steps +hash conflicts: 6.3170511e+09 (resolved) + +Stats on memory usage (in Megabytes): + 4717.369 equivalent memory usage for states (stored*(State-vector + overhead)) + 2117.231 actual memory usage for states (compression: 44.88%) + state-vector as stored = 16 byte + 36 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 3086.494 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 304368 3993 2946 2 2 ] +unreached in proctype urcu_reader + line 894, "pan.___", state 12, "((i<1))" + line 894, "pan.___", state 12, "((i>=1))" + line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 104, "(1)" + line 249, "pan.___", state 112, "(1)" + line 253, "pan.___", state 124, "(1)" + line 257, "pan.___", state 132, "(1)" + line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 223, "(1)" + line 434, "pan.___", state 253, "(1)" + line 438, "pan.___", state 266, "(1)" + line 687, "pan.___", state 287, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 407, "pan.___", state 294, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 326, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 340, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 359, "(1)" + line 434, "pan.___", state 389, "(1)" + line 438, "pan.___", state 402, "(1)" + line 407, "pan.___", state 423, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 455, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 469, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 488, "(1)" + line 434, "pan.___", state 518, "(1)" + line 438, "pan.___", state 531, "(1)" + line 407, "pan.___", state 554, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 556, "(1)" + line 407, "pan.___", state 557, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 557, "else" + line 407, "pan.___", state 560, "(1)" + line 411, "pan.___", state 568, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 570, "(1)" + line 411, "pan.___", state 571, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 571, "else" + line 411, "pan.___", state 574, "(1)" + line 411, "pan.___", state 575, "(1)" + line 411, "pan.___", state 575, "(1)" + line 409, "pan.___", state 580, "((i<1))" + line 409, "pan.___", state 580, "((i>=1))" + line 416, "pan.___", state 586, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 588, "(1)" + line 416, "pan.___", state 589, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 589, "else" + line 416, "pan.___", state 592, "(1)" + line 416, "pan.___", state 593, "(1)" + line 416, "pan.___", state 593, "(1)" + line 420, "pan.___", state 600, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 602, "(1)" + line 420, "pan.___", state 603, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 603, "else" + line 420, "pan.___", state 606, "(1)" + line 420, "pan.___", state 607, "(1)" + line 420, "pan.___", state 607, "(1)" + line 418, "pan.___", state 612, "((i<2))" + line 418, "pan.___", state 612, "((i>=2))" + line 425, "pan.___", state 619, "(1)" + line 425, "pan.___", state 620, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 620, "else" + line 425, "pan.___", state 623, "(1)" + line 425, "pan.___", state 624, "(1)" + line 425, "pan.___", state 624, "(1)" + line 429, "pan.___", state 632, "(1)" + line 429, "pan.___", state 633, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 633, "else" + line 429, "pan.___", state 636, "(1)" + line 429, "pan.___", state 637, "(1)" + line 429, "pan.___", state 637, "(1)" + line 427, "pan.___", state 642, "((i<1))" + line 427, "pan.___", state 642, "((i>=1))" + line 434, "pan.___", state 649, "(1)" + line 434, "pan.___", state 650, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 650, "else" + line 434, "pan.___", state 653, "(1)" + line 434, "pan.___", state 654, "(1)" + line 434, "pan.___", state 654, "(1)" + line 438, "pan.___", state 662, "(1)" + line 438, "pan.___", state 663, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 663, "else" + line 438, "pan.___", state 666, "(1)" + line 438, "pan.___", state 667, "(1)" + line 438, "pan.___", state 667, "(1)" + line 436, "pan.___", state 672, "((i<2))" + line 436, "pan.___", state 672, "((i>=2))" + line 446, "pan.___", state 676, "(1)" + line 446, "pan.___", state 676, "(1)" + line 687, "pan.___", state 679, "cached_urcu_active_readers = (tmp+1)" + line 687, "pan.___", state 680, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 687, "pan.___", state 681, "(1)" + line 407, "pan.___", state 688, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 720, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 734, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 753, "(1)" + line 434, "pan.___", state 783, "(1)" + line 438, "pan.___", state 796, "(1)" + line 407, "pan.___", state 824, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 856, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 870, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 889, "(1)" + line 434, "pan.___", state 919, "(1)" + line 438, "pan.___", state 932, "(1)" + line 407, "pan.___", state 953, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 955, "(1)" + line 407, "pan.___", state 956, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 956, "else" + line 407, "pan.___", state 959, "(1)" + line 411, "pan.___", state 967, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 969, "(1)" + line 411, "pan.___", state 970, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 970, "else" + line 411, "pan.___", state 973, "(1)" + line 411, "pan.___", state 974, "(1)" + line 411, "pan.___", state 974, "(1)" + line 409, "pan.___", state 979, "((i<1))" + line 409, "pan.___", state 979, "((i>=1))" + line 416, "pan.___", state 985, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 987, "(1)" + line 416, "pan.___", state 988, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 988, "else" + line 416, "pan.___", state 991, "(1)" + line 416, "pan.___", state 992, "(1)" + line 416, "pan.___", state 992, "(1)" + line 420, "pan.___", state 999, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 1001, "(1)" + line 420, "pan.___", state 1002, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 1002, "else" + line 420, "pan.___", state 1005, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 420, "pan.___", state 1006, "(1)" + line 418, "pan.___", state 1011, "((i<2))" + line 418, "pan.___", state 1011, "((i>=2))" + line 425, "pan.___", state 1018, "(1)" + line 425, "pan.___", state 1019, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 1019, "else" + line 425, "pan.___", state 1022, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 425, "pan.___", state 1023, "(1)" + line 429, "pan.___", state 1031, "(1)" + line 429, "pan.___", state 1032, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 1032, "else" + line 429, "pan.___", state 1035, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 429, "pan.___", state 1036, "(1)" + line 427, "pan.___", state 1041, "((i<1))" + line 427, "pan.___", state 1041, "((i>=1))" + line 434, "pan.___", state 1048, "(1)" + line 434, "pan.___", state 1049, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 1049, "else" + line 434, "pan.___", state 1052, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 434, "pan.___", state 1053, "(1)" + line 438, "pan.___", state 1061, "(1)" + line 438, "pan.___", state 1062, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 1062, "else" + line 438, "pan.___", state 1065, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 438, "pan.___", state 1066, "(1)" + line 436, "pan.___", state 1071, "((i<2))" + line 436, "pan.___", state 1071, "((i>=2))" + line 446, "pan.___", state 1075, "(1)" + line 446, "pan.___", state 1075, "(1)" + line 695, "pan.___", state 1079, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 407, "pan.___", state 1084, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1116, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1130, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1149, "(1)" + line 434, "pan.___", state 1179, "(1)" + line 438, "pan.___", state 1192, "(1)" + line 407, "pan.___", state 1216, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1248, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1262, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1281, "(1)" + line 434, "pan.___", state 1311, "(1)" + line 438, "pan.___", state 1324, "(1)" + line 407, "pan.___", state 1349, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1381, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1395, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1414, "(1)" + line 434, "pan.___", state 1444, "(1)" + line 438, "pan.___", state 1457, "(1)" + line 407, "pan.___", state 1478, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1510, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1524, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1543, "(1)" + line 434, "pan.___", state 1573, "(1)" + line 438, "pan.___", state 1586, "(1)" + line 407, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1644, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1658, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1677, "(1)" + line 434, "pan.___", state 1707, "(1)" + line 438, "pan.___", state 1720, "(1)" + line 407, "pan.___", state 1741, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1773, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1787, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1806, "(1)" + line 434, "pan.___", state 1836, "(1)" + line 438, "pan.___", state 1849, "(1)" + line 407, "pan.___", state 1873, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1905, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1919, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 1938, "(1)" + line 434, "pan.___", state 1968, "(1)" + line 438, "pan.___", state 1981, "(1)" + line 734, "pan.___", state 2002, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 407, "pan.___", state 2009, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2041, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2055, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2074, "(1)" + line 434, "pan.___", state 2104, "(1)" + line 438, "pan.___", state 2117, "(1)" + line 407, "pan.___", state 2138, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2170, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2184, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2203, "(1)" + line 434, "pan.___", state 2233, "(1)" + line 438, "pan.___", state 2246, "(1)" + line 407, "pan.___", state 2269, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 2271, "(1)" + line 407, "pan.___", state 2272, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 2272, "else" + line 407, "pan.___", state 2275, "(1)" + line 411, "pan.___", state 2283, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2286, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 2286, "else" + line 411, "pan.___", state 2289, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 411, "pan.___", state 2290, "(1)" + line 409, "pan.___", state 2295, "((i<1))" + line 409, "pan.___", state 2295, "((i>=1))" + line 416, "pan.___", state 2301, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 2303, "(1)" + line 416, "pan.___", state 2304, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 2304, "else" + line 416, "pan.___", state 2307, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 416, "pan.___", state 2308, "(1)" + line 420, "pan.___", state 2315, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 2317, "(1)" + line 420, "pan.___", state 2318, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 2318, "else" + line 420, "pan.___", state 2321, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 420, "pan.___", state 2322, "(1)" + line 418, "pan.___", state 2327, "((i<2))" + line 418, "pan.___", state 2327, "((i>=2))" + line 425, "pan.___", state 2334, "(1)" + line 425, "pan.___", state 2335, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 2335, "else" + line 425, "pan.___", state 2338, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 425, "pan.___", state 2339, "(1)" + line 429, "pan.___", state 2347, "(1)" + line 429, "pan.___", state 2348, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 2348, "else" + line 429, "pan.___", state 2351, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 429, "pan.___", state 2352, "(1)" + line 427, "pan.___", state 2357, "((i<1))" + line 427, "pan.___", state 2357, "((i>=1))" + line 434, "pan.___", state 2364, "(1)" + line 434, "pan.___", state 2365, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 2365, "else" + line 434, "pan.___", state 2368, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 434, "pan.___", state 2369, "(1)" + line 438, "pan.___", state 2377, "(1)" + line 438, "pan.___", state 2378, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 2378, "else" + line 438, "pan.___", state 2381, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 438, "pan.___", state 2382, "(1)" + line 436, "pan.___", state 2387, "((i<2))" + line 436, "pan.___", state 2387, "((i>=2))" + line 446, "pan.___", state 2391, "(1)" + line 446, "pan.___", state 2391, "(1)" + line 734, "pan.___", state 2394, "cached_urcu_active_readers = (tmp+1)" + line 734, "pan.___", state 2395, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 734, "pan.___", state 2396, "(1)" + line 407, "pan.___", state 2403, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2435, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2449, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2468, "(1)" + line 434, "pan.___", state 2498, "(1)" + line 438, "pan.___", state 2511, "(1)" + line 407, "pan.___", state 2538, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2570, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2584, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2603, "(1)" + line 434, "pan.___", state 2633, "(1)" + line 438, "pan.___", state 2646, "(1)" + line 407, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2699, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2713, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 2732, "(1)" + line 434, "pan.___", state 2762, "(1)" + line 438, "pan.___", state 2775, "(1)" + line 245, "pan.___", state 2808, "(1)" + line 253, "pan.___", state 2828, "(1)" + line 257, "pan.___", state 2836, "(1)" + line 245, "pan.___", state 2851, "(1)" + line 253, "pan.___", state 2871, "(1)" + line 257, "pan.___", state 2879, "(1)" + line 929, "pan.___", state 2896, "-end-" + (246 of 2896 states) +unreached in proctype urcu_writer + line 1018, "pan.___", state 12, "((i<1))" + line 1018, "pan.___", state 12, "((i>=1))" + line 407, "pan.___", state 49, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 63, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 81, "cache_dirty_rcu_ptr = 0" + line 425, "pan.___", state 114, "(1)" + line 429, "pan.___", state 127, "(1)" + line 434, "pan.___", state 144, "(1)" + line 268, "pan.___", state 180, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 189, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 202, "cache_dirty_rcu_ptr = 0" + line 407, "pan.___", state 242, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 256, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 274, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 288, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 307, "(1)" + line 429, "pan.___", state 320, "(1)" + line 434, "pan.___", state 337, "(1)" + line 438, "pan.___", state 350, "(1)" + line 411, "pan.___", state 387, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 405, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 419, "cache_dirty_rcu_data[i] = 0" + line 429, "pan.___", state 451, "(1)" + line 434, "pan.___", state 468, "(1)" + line 438, "pan.___", state 481, "(1)" + line 407, "pan.___", state 511, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 525, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 543, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 557, "cache_dirty_rcu_data[i] = 0" + line 425, "pan.___", state 576, "(1)" + line 429, "pan.___", state 589, "(1)" + line 434, "pan.___", state 606, "(1)" + line 438, "pan.___", state 619, "(1)" + line 407, "pan.___", state 640, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 642, "(1)" + line 407, "pan.___", state 643, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 643, "else" + line 407, "pan.___", state 646, "(1)" + line 411, "pan.___", state 654, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 656, "(1)" + line 411, "pan.___", state 657, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 657, "else" + line 411, "pan.___", state 660, "(1)" + line 411, "pan.___", state 661, "(1)" + line 411, "pan.___", state 661, "(1)" + line 409, "pan.___", state 666, "((i<1))" + line 409, "pan.___", state 666, "((i>=1))" + line 416, "pan.___", state 672, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 674, "(1)" + line 416, "pan.___", state 675, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 675, "else" + line 416, "pan.___", state 678, "(1)" + line 416, "pan.___", state 679, "(1)" + line 416, "pan.___", state 679, "(1)" + line 420, "pan.___", state 686, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 688, "(1)" + line 420, "pan.___", state 689, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 689, "else" + line 420, "pan.___", state 692, "(1)" + line 420, "pan.___", state 693, "(1)" + line 420, "pan.___", state 693, "(1)" + line 418, "pan.___", state 698, "((i<2))" + line 418, "pan.___", state 698, "((i>=2))" + line 425, "pan.___", state 705, "(1)" + line 425, "pan.___", state 706, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 706, "else" + line 425, "pan.___", state 709, "(1)" + line 425, "pan.___", state 710, "(1)" + line 425, "pan.___", state 710, "(1)" + line 429, "pan.___", state 718, "(1)" + line 429, "pan.___", state 719, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 719, "else" + line 429, "pan.___", state 722, "(1)" + line 429, "pan.___", state 723, "(1)" + line 429, "pan.___", state 723, "(1)" + line 427, "pan.___", state 728, "((i<1))" + line 427, "pan.___", state 728, "((i>=1))" + line 434, "pan.___", state 735, "(1)" + line 434, "pan.___", state 736, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 736, "else" + line 434, "pan.___", state 739, "(1)" + line 434, "pan.___", state 740, "(1)" + line 434, "pan.___", state 740, "(1)" + line 438, "pan.___", state 748, "(1)" + line 438, "pan.___", state 749, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 749, "else" + line 438, "pan.___", state 752, "(1)" + line 438, "pan.___", state 753, "(1)" + line 438, "pan.___", state 753, "(1)" + line 436, "pan.___", state 758, "((i<2))" + line 436, "pan.___", state 758, "((i>=2))" + line 446, "pan.___", state 762, "(1)" + line 446, "pan.___", state 762, "(1)" + line 1184, "pan.___", state 766, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" + line 407, "pan.___", state 771, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 773, "(1)" + line 407, "pan.___", state 774, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 774, "else" + line 407, "pan.___", state 777, "(1)" + line 411, "pan.___", state 785, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 787, "(1)" + line 411, "pan.___", state 788, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 788, "else" + line 411, "pan.___", state 791, "(1)" + line 411, "pan.___", state 792, "(1)" + line 411, "pan.___", state 792, "(1)" + line 409, "pan.___", state 797, "((i<1))" + line 409, "pan.___", state 797, "((i>=1))" + line 416, "pan.___", state 803, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 805, "(1)" + line 416, "pan.___", state 806, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 806, "else" + line 416, "pan.___", state 809, "(1)" + line 416, "pan.___", state 810, "(1)" + line 416, "pan.___", state 810, "(1)" + line 420, "pan.___", state 817, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 819, "(1)" + line 420, "pan.___", state 820, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 820, "else" + line 420, "pan.___", state 823, "(1)" + line 420, "pan.___", state 824, "(1)" + line 420, "pan.___", state 824, "(1)" + line 418, "pan.___", state 829, "((i<2))" + line 418, "pan.___", state 829, "((i>=2))" + line 425, "pan.___", state 836, "(1)" + line 425, "pan.___", state 837, "(!(cache_dirty_urcu_gp_ctr))" + line 425, "pan.___", state 837, "else" + line 425, "pan.___", state 840, "(1)" + line 425, "pan.___", state 841, "(1)" + line 425, "pan.___", state 841, "(1)" + line 429, "pan.___", state 849, "(1)" + line 429, "pan.___", state 850, "(!(cache_dirty_urcu_active_readers))" + line 429, "pan.___", state 850, "else" + line 429, "pan.___", state 853, "(1)" + line 429, "pan.___", state 854, "(1)" + line 429, "pan.___", state 854, "(1)" + line 427, "pan.___", state 859, "((i<1))" + line 427, "pan.___", state 859, "((i>=1))" + line 434, "pan.___", state 866, "(1)" + line 434, "pan.___", state 867, "(!(cache_dirty_rcu_ptr))" + line 434, "pan.___", state 867, "else" + line 434, "pan.___", state 870, "(1)" + line 434, "pan.___", state 871, "(1)" + line 434, "pan.___", state 871, "(1)" + line 438, "pan.___", state 879, "(1)" + line 438, "pan.___", state 880, "(!(cache_dirty_rcu_data[i]))" + line 438, "pan.___", state 880, "else" + line 438, "pan.___", state 883, "(1)" + line 438, "pan.___", state 884, "(1)" + line 438, "pan.___", state 884, "(1)" + line 436, "pan.___", state 889, "((i<2))" + line 436, "pan.___", state 889, "((i>=2))" + line 446, "pan.___", state 893, "(1)" + line 446, "pan.___", state 893, "(1)" + line 1200, "pan.___", state 898, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" + line 1195, "pan.___", state 899, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" + line 1195, "pan.___", state 899, "else" + line 1220, "pan.___", state 903, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" + line 268, "pan.___", state 934, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 943, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 958, "(1)" + line 280, "pan.___", state 965, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 981, "(1)" + line 249, "pan.___", state 989, "(1)" + line 253, "pan.___", state 1001, "(1)" + line 257, "pan.___", state 1009, "(1)" + line 268, "pan.___", state 1040, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1049, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1062, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1071, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1087, "(1)" + line 249, "pan.___", state 1095, "(1)" + line 253, "pan.___", state 1107, "(1)" + line 257, "pan.___", state 1115, "(1)" + line 272, "pan.___", state 1141, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1154, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1163, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1179, "(1)" + line 249, "pan.___", state 1187, "(1)" + line 253, "pan.___", state 1199, "(1)" + line 257, "pan.___", state 1207, "(1)" + line 268, "pan.___", state 1238, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1247, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1260, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1269, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1285, "(1)" + line 249, "pan.___", state 1293, "(1)" + line 253, "pan.___", state 1305, "(1)" + line 257, "pan.___", state 1313, "(1)" + line 268, "pan.___", state 1330, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1332, "(1)" + line 272, "pan.___", state 1339, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1341, "(1)" + line 272, "pan.___", state 1342, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1342, "else" + line 270, "pan.___", state 1347, "((i<1))" + line 270, "pan.___", state 1347, "((i>=1))" + line 276, "pan.___", state 1352, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1354, "(1)" + line 276, "pan.___", state 1355, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1355, "else" + line 280, "pan.___", state 1361, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1363, "(1)" + line 280, "pan.___", state 1364, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1364, "else" + line 278, "pan.___", state 1369, "((i<2))" + line 278, "pan.___", state 1369, "((i>=2))" + line 245, "pan.___", state 1377, "(1)" + line 249, "pan.___", state 1385, "(1)" + line 249, "pan.___", state 1386, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1386, "else" + line 247, "pan.___", state 1391, "((i<1))" + line 247, "pan.___", state 1391, "((i>=1))" + line 253, "pan.___", state 1397, "(1)" + line 253, "pan.___", state 1398, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1398, "else" + line 257, "pan.___", state 1405, "(1)" + line 257, "pan.___", state 1406, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1406, "else" + line 262, "pan.___", state 1415, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1415, "else" + line 1296, "pan.___", state 1418, "i = 0" + line 1296, "pan.___", state 1420, "reader_barrier = 1" + line 1296, "pan.___", state 1431, "((i<1))" + line 1296, "pan.___", state 1431, "((i>=1))" + line 268, "pan.___", state 1436, "cache_dirty_urcu_gp_ctr = 0" + line 268, "pan.___", state 1438, "(1)" + line 272, "pan.___", state 1445, "cache_dirty_urcu_active_readers = 0" + line 272, "pan.___", state 1447, "(1)" + line 272, "pan.___", state 1448, "(cache_dirty_urcu_active_readers)" + line 272, "pan.___", state 1448, "else" + line 270, "pan.___", state 1453, "((i<1))" + line 270, "pan.___", state 1453, "((i>=1))" + line 276, "pan.___", state 1458, "cache_dirty_rcu_ptr = 0" + line 276, "pan.___", state 1460, "(1)" + line 276, "pan.___", state 1461, "(cache_dirty_rcu_ptr)" + line 276, "pan.___", state 1461, "else" + line 280, "pan.___", state 1467, "cache_dirty_rcu_data[i] = 0" + line 280, "pan.___", state 1469, "(1)" + line 280, "pan.___", state 1470, "(cache_dirty_rcu_data[i])" + line 280, "pan.___", state 1470, "else" + line 278, "pan.___", state 1475, "((i<2))" + line 278, "pan.___", state 1475, "((i>=2))" + line 245, "pan.___", state 1483, "(1)" + line 249, "pan.___", state 1491, "(1)" + line 249, "pan.___", state 1492, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 1492, "else" + line 247, "pan.___", state 1497, "((i<1))" + line 247, "pan.___", state 1497, "((i>=1))" + line 253, "pan.___", state 1503, "(1)" + line 253, "pan.___", state 1504, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 1504, "else" + line 257, "pan.___", state 1511, "(1)" + line 257, "pan.___", state 1512, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 1512, "else" + line 262, "pan.___", state 1521, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 1521, "else" + line 295, "pan.___", state 1523, "(cache_dirty_urcu_gp_ctr)" + line 295, "pan.___", state 1523, "else" + line 1296, "pan.___", state 1524, "(cache_dirty_urcu_gp_ctr)" + line 1296, "pan.___", state 1524, "else" + line 272, "pan.___", state 1537, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1550, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1559, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1575, "(1)" + line 249, "pan.___", state 1583, "(1)" + line 253, "pan.___", state 1595, "(1)" + line 257, "pan.___", state 1603, "(1)" + line 268, "pan.___", state 1634, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1643, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1656, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1665, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1681, "(1)" + line 249, "pan.___", state 1689, "(1)" + line 253, "pan.___", state 1701, "(1)" + line 257, "pan.___", state 1709, "(1)" + line 1304, "pan.___", state 1725, "-end-" + (212 of 1725 states) +unreached in proctype :init: + line 1319, "pan.___", state 13, "((i<1))" + line 1319, "pan.___", state 13, "((i>=1))" + (1 of 28 states) +unreached in proctype :never: + line 1367, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.71e+04 seconds +pan: rate 2490.8226 states/second +pan: avg transition delay 1.5631e-06 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-ipi' diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..602bb6c --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input @@ -0,0 +1,1340 @@ +#define SINGLE_FLIP + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input.trail b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..6a83ce1 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1442 @@ +-2:3:-2 +-4:-4:-4 +1:0:4651 +2:2:2896 +3:2:2901 +4:2:2905 +5:2:2913 +6:2:2917 +7:2:2921 +8:0:4651 +9:1:0 +10:1:5 +11:1:9 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+1435:1:1342 +1436:1:1343 +1437:0:4649 +1438:2:3921 +1439:0:4655 +1440:1:2458 diff --git a/urcu-controldataflow-alpha-ipi/urcu_progress.ltl b/urcu-controldataflow-alpha-ipi/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-controldataflow-alpha-ipi/urcu_progress_reader.define b/urcu-controldataflow-alpha-ipi/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi/urcu_progress_writer.define b/urcu-controldataflow-alpha-ipi/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-ipi/urcu_progress_writer_error.define b/urcu-controldataflow-alpha-ipi/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-alpha-ipi/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-no-ipi/.input.spin b/urcu-controldataflow-alpha-no-ipi/.input.spin new file mode 100644 index 0000000..b59aa77 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/.input.spin @@ -0,0 +1,1272 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/DEFINES b/urcu-controldataflow-alpha-no-ipi/DEFINES new file mode 100644 index 0000000..a1008a6 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/DEFINES @@ -0,0 +1,18 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow-alpha-no-ipi/Makefile b/urcu-controldataflow-alpha-no-ipi/Makefile new file mode 100644 index 0000000..de47dff --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/Makefile @@ -0,0 +1,170 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow-alpha-no-ipi/asserts.log b/urcu-controldataflow-alpha-no-ipi/asserts.log new file mode 100644 index 0000000..9a18131 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/asserts.log @@ -0,0 +1,468 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 4773 States= 1e+06 Transitions= 6.22e+08 Memory= 542.717 t= 624 R= 2e+03 +Depth= 5040 States= 2e+06 Transitions= 1.3e+09 Memory= 618.986 t= 1.33e+03 R= 1e+03 +Depth= 5040 States= 3e+06 Transitions= 1.95e+09 Memory= 695.256 t= 2.03e+03 R= 1e+03 +pan: resizing hashtable to -w22.. done +Depth= 5040 States= 4e+06 Transitions= 2.64e+09 Memory= 802.647 t= 2.73e+03 R= 1e+03 +Depth= 5040 States= 5e+06 Transitions= 3.3e+09 Memory= 878.916 t= 3.41e+03 R= 1e+03 +Depth= 5141 States= 6e+06 Transitions= 3.99e+09 Memory= 955.186 t= 4.12e+03 R= 1e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 72 byte, depth reached 5141, errors: 0 + 6711104 states, stored +4.4393201e+09 states, matched +4.4460312e+09 transitions (= stored+matched) +2.5322962e+10 atomic steps +hash conflicts: 3.3332015e+09 (resolved) + +Stats on memory usage (in Megabytes): + 640.021 equivalent memory usage for states (stored*(State-vector + overhead)) + 519.783 actual memory usage for states (compression: 81.21%) + state-vector as stored = 53 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 1009.483 total actual memory usage + +unreached in proctype urcu_reader + line 410, ".input.spin", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 82, "(1)" + line 437, ".input.spin", state 112, "(1)" + line 441, ".input.spin", state 125, "(1)" + line 596, ".input.spin", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 410, ".input.spin", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 218, "(1)" + line 437, ".input.spin", state 248, "(1)" + line 441, ".input.spin", state 261, "(1)" + line 410, ".input.spin", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 347, "(1)" + line 437, ".input.spin", state 377, "(1)" + line 441, ".input.spin", state 390, "(1)" + line 410, ".input.spin", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 415, "(1)" + line 410, ".input.spin", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, ".input.spin", state 416, "else" + line 410, ".input.spin", state 419, "(1)" + line 414, ".input.spin", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 429, "(1)" + line 414, ".input.spin", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, ".input.spin", state 430, "else" + line 414, ".input.spin", state 433, "(1)" + line 414, ".input.spin", state 434, "(1)" + line 414, ".input.spin", state 434, "(1)" + line 412, ".input.spin", state 439, "((i<1))" + line 412, ".input.spin", state 439, "((i>=1))" + line 419, ".input.spin", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 447, "(1)" + line 419, ".input.spin", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, ".input.spin", state 448, "else" + line 419, ".input.spin", state 451, "(1)" + line 419, ".input.spin", state 452, "(1)" + line 419, ".input.spin", state 452, "(1)" + line 423, ".input.spin", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 461, "(1)" + line 423, ".input.spin", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, ".input.spin", state 462, "else" + line 423, ".input.spin", state 465, "(1)" + line 423, ".input.spin", state 466, "(1)" + line 423, ".input.spin", state 466, "(1)" + line 421, ".input.spin", state 471, "((i<2))" + line 421, ".input.spin", state 471, "((i>=2))" + line 428, ".input.spin", state 478, "(1)" + line 428, ".input.spin", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 428, ".input.spin", state 479, "else" + line 428, ".input.spin", state 482, "(1)" + line 428, ".input.spin", state 483, "(1)" + line 428, ".input.spin", state 483, "(1)" + line 432, ".input.spin", state 491, "(1)" + line 432, ".input.spin", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 432, ".input.spin", state 492, "else" + line 432, ".input.spin", state 495, "(1)" + line 432, ".input.spin", state 496, "(1)" + line 432, ".input.spin", state 496, "(1)" + line 430, ".input.spin", state 501, "((i<1))" + line 430, ".input.spin", state 501, "((i>=1))" + line 437, ".input.spin", state 508, "(1)" + line 437, ".input.spin", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 437, ".input.spin", state 509, "else" + line 437, ".input.spin", state 512, "(1)" + line 437, ".input.spin", state 513, "(1)" + line 437, ".input.spin", state 513, "(1)" + line 441, ".input.spin", state 521, "(1)" + line 441, ".input.spin", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 441, ".input.spin", state 522, "else" + line 441, ".input.spin", state 525, "(1)" + line 441, ".input.spin", state 526, "(1)" + line 441, ".input.spin", state 526, "(1)" + line 439, ".input.spin", state 531, "((i<2))" + line 439, ".input.spin", state 531, "((i>=2))" + line 449, ".input.spin", state 535, "(1)" + line 449, ".input.spin", state 535, "(1)" + line 596, ".input.spin", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 596, ".input.spin", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 596, ".input.spin", state 540, "(1)" + line 271, ".input.spin", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 555, "(1)" + line 279, ".input.spin", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 591, "(1)" + line 252, ".input.spin", state 599, "(1)" + line 256, ".input.spin", state 611, "(1)" + line 260, ".input.spin", state 619, "(1)" + line 410, ".input.spin", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 702, "(1)" + line 432, ".input.spin", state 715, "(1)" + line 437, ".input.spin", state 732, "(1)" + line 441, ".input.spin", state 745, "(1)" + line 410, ".input.spin", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 838, "(1)" + line 437, ".input.spin", state 868, "(1)" + line 441, ".input.spin", state 881, "(1)" + line 410, ".input.spin", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 904, "(1)" + line 410, ".input.spin", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, ".input.spin", state 905, "else" + line 410, ".input.spin", state 908, "(1)" + line 414, ".input.spin", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 918, "(1)" + line 414, ".input.spin", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, ".input.spin", state 919, "else" + line 414, ".input.spin", state 922, "(1)" + line 414, ".input.spin", state 923, "(1)" + line 414, ".input.spin", state 923, "(1)" + line 412, ".input.spin", state 928, "((i<1))" + line 412, ".input.spin", state 928, "((i>=1))" + line 419, ".input.spin", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 936, "(1)" + line 419, ".input.spin", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, ".input.spin", state 937, "else" + line 419, ".input.spin", state 940, "(1)" + line 419, ".input.spin", state 941, "(1)" + line 419, ".input.spin", state 941, "(1)" + line 423, ".input.spin", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 950, "(1)" + line 423, ".input.spin", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, ".input.spin", state 951, "else" + line 423, ".input.spin", state 954, "(1)" + line 423, ".input.spin", state 955, "(1)" + line 423, ".input.spin", state 955, "(1)" + line 421, ".input.spin", state 960, "((i<2))" + line 421, ".input.spin", state 960, "((i>=2))" + line 428, ".input.spin", state 967, "(1)" + line 428, ".input.spin", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 428, ".input.spin", state 968, "else" + line 428, ".input.spin", state 971, "(1)" + line 428, ".input.spin", state 972, "(1)" + line 428, ".input.spin", state 972, "(1)" + line 432, ".input.spin", state 980, "(1)" + line 432, ".input.spin", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 432, ".input.spin", state 981, "else" + line 432, ".input.spin", state 984, "(1)" + line 432, ".input.spin", state 985, "(1)" + line 432, ".input.spin", state 985, "(1)" + line 430, ".input.spin", state 990, "((i<1))" + line 430, ".input.spin", state 990, "((i>=1))" + line 437, ".input.spin", state 997, "(1)" + line 437, ".input.spin", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 437, ".input.spin", state 998, "else" + line 437, ".input.spin", state 1001, "(1)" + line 437, ".input.spin", state 1002, "(1)" + line 437, ".input.spin", state 1002, "(1)" + line 441, ".input.spin", state 1010, "(1)" + line 441, ".input.spin", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 441, ".input.spin", state 1011, "else" + line 441, ".input.spin", state 1014, "(1)" + line 441, ".input.spin", state 1015, "(1)" + line 441, ".input.spin", state 1015, "(1)" + line 439, ".input.spin", state 1020, "((i<2))" + line 439, ".input.spin", state 1020, "((i>=2))" + line 449, ".input.spin", state 1024, "(1)" + line 449, ".input.spin", state 1024, "(1)" + line 604, ".input.spin", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 410, ".input.spin", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 1098, "(1)" + line 432, ".input.spin", state 1111, "(1)" + line 437, ".input.spin", state 1128, "(1)" + line 441, ".input.spin", state 1141, "(1)" + line 410, ".input.spin", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 1230, "(1)" + line 437, ".input.spin", state 1260, "(1)" + line 441, ".input.spin", state 1273, "(1)" + line 410, ".input.spin", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 1363, "(1)" + line 437, ".input.spin", state 1393, "(1)" + line 441, ".input.spin", state 1406, "(1)" + line 410, ".input.spin", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 1492, "(1)" + line 437, ".input.spin", state 1522, "(1)" + line 441, ".input.spin", state 1535, "(1)" + line 271, ".input.spin", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1605, "(1)" + line 252, ".input.spin", state 1613, "(1)" + line 256, ".input.spin", state 1625, "(1)" + line 260, ".input.spin", state 1633, "(1)" + line 410, ".input.spin", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 1716, "(1)" + line 432, ".input.spin", state 1729, "(1)" + line 437, ".input.spin", state 1746, "(1)" + line 441, ".input.spin", state 1759, "(1)" + line 410, ".input.spin", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 1845, "(1)" + line 432, ".input.spin", state 1858, "(1)" + line 437, ".input.spin", state 1875, "(1)" + line 441, ".input.spin", state 1888, "(1)" + line 410, ".input.spin", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 1977, "(1)" + line 437, ".input.spin", state 2007, "(1)" + line 441, ".input.spin", state 2020, "(1)" + line 643, ".input.spin", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 410, ".input.spin", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 2113, "(1)" + line 437, ".input.spin", state 2143, "(1)" + line 441, ".input.spin", state 2156, "(1)" + line 410, ".input.spin", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 2242, "(1)" + line 437, ".input.spin", state 2272, "(1)" + line 441, ".input.spin", state 2285, "(1)" + line 410, ".input.spin", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 2310, "(1)" + line 410, ".input.spin", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, ".input.spin", state 2311, "else" + line 410, ".input.spin", state 2314, "(1)" + line 414, ".input.spin", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2324, "(1)" + line 414, ".input.spin", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, ".input.spin", state 2325, "else" + line 414, ".input.spin", state 2328, "(1)" + line 414, ".input.spin", state 2329, "(1)" + line 414, ".input.spin", state 2329, "(1)" + line 412, ".input.spin", state 2334, "((i<1))" + line 412, ".input.spin", state 2334, "((i>=1))" + line 419, ".input.spin", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2342, "(1)" + line 419, ".input.spin", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, ".input.spin", state 2343, "else" + line 419, ".input.spin", state 2346, "(1)" + line 419, ".input.spin", state 2347, "(1)" + line 419, ".input.spin", state 2347, "(1)" + line 423, ".input.spin", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2356, "(1)" + line 423, ".input.spin", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, ".input.spin", state 2357, "else" + line 423, ".input.spin", state 2360, "(1)" + line 423, ".input.spin", state 2361, "(1)" + line 423, ".input.spin", state 2361, "(1)" + line 421, ".input.spin", state 2366, "((i<2))" + line 421, ".input.spin", state 2366, "((i>=2))" + line 428, ".input.spin", state 2373, "(1)" + line 428, ".input.spin", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 428, ".input.spin", state 2374, "else" + line 428, ".input.spin", state 2377, "(1)" + line 428, ".input.spin", state 2378, "(1)" + line 428, ".input.spin", state 2378, "(1)" + line 432, ".input.spin", state 2386, "(1)" + line 432, ".input.spin", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 432, ".input.spin", state 2387, "else" + line 432, ".input.spin", state 2390, "(1)" + line 432, ".input.spin", state 2391, "(1)" + line 432, ".input.spin", state 2391, "(1)" + line 430, ".input.spin", state 2396, "((i<1))" + line 430, ".input.spin", state 2396, "((i>=1))" + line 437, ".input.spin", state 2403, "(1)" + line 437, ".input.spin", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 437, ".input.spin", state 2404, "else" + line 437, ".input.spin", state 2407, "(1)" + line 437, ".input.spin", state 2408, "(1)" + line 437, ".input.spin", state 2408, "(1)" + line 441, ".input.spin", state 2416, "(1)" + line 441, ".input.spin", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 441, ".input.spin", state 2417, "else" + line 441, ".input.spin", state 2420, "(1)" + line 441, ".input.spin", state 2421, "(1)" + line 441, ".input.spin", state 2421, "(1)" + line 439, ".input.spin", state 2426, "((i<2))" + line 439, ".input.spin", state 2426, "((i>=2))" + line 449, ".input.spin", state 2430, "(1)" + line 449, ".input.spin", state 2430, "(1)" + line 643, ".input.spin", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 643, ".input.spin", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 643, ".input.spin", state 2435, "(1)" + line 271, ".input.spin", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 2486, "(1)" + line 252, ".input.spin", state 2494, "(1)" + line 256, ".input.spin", state 2506, "(1)" + line 260, ".input.spin", state 2514, "(1)" + line 410, ".input.spin", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 2597, "(1)" + line 432, ".input.spin", state 2610, "(1)" + line 437, ".input.spin", state 2627, "(1)" + line 441, ".input.spin", state 2640, "(1)" + line 271, ".input.spin", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 2711, "(1)" + line 252, ".input.spin", state 2719, "(1)" + line 256, ".input.spin", state 2731, "(1)" + line 260, ".input.spin", state 2739, "(1)" + line 410, ".input.spin", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 2822, "(1)" + line 432, ".input.spin", state 2835, "(1)" + line 437, ".input.spin", state 2852, "(1)" + line 441, ".input.spin", state 2865, "(1)" + line 410, ".input.spin", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 2951, "(1)" + line 432, ".input.spin", state 2964, "(1)" + line 437, ".input.spin", state 2981, "(1)" + line 441, ".input.spin", state 2994, "(1)" + line 248, ".input.spin", state 3027, "(1)" + line 256, ".input.spin", state 3047, "(1)" + line 260, ".input.spin", state 3055, "(1)" + line 248, ".input.spin", state 3070, "(1)" + line 252, ".input.spin", state 3078, "(1)" + line 256, ".input.spin", state 3090, "(1)" + line 260, ".input.spin", state 3098, "(1)" + line 897, ".input.spin", state 3115, "-end-" + (283 of 3115 states) +unreached in proctype urcu_writer + line 410, ".input.spin", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 83, "(1)" + line 432, ".input.spin", state 96, "(1)" + line 437, ".input.spin", state 113, "(1)" + line 271, ".input.spin", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, ".input.spin", state 276, "(1)" + line 432, ".input.spin", state 289, "(1)" + line 437, ".input.spin", state 306, "(1)" + line 441, ".input.spin", state 319, "(1)" + line 414, ".input.spin", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, ".input.spin", state 420, "(1)" + line 437, ".input.spin", state 437, "(1)" + line 441, ".input.spin", state 450, "(1)" + line 414, ".input.spin", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, ".input.spin", state 559, "(1)" + line 437, ".input.spin", state 576, "(1)" + line 441, ".input.spin", state 589, "(1)" + line 414, ".input.spin", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, ".input.spin", state 688, "(1)" + line 437, ".input.spin", state 705, "(1)" + line 441, ".input.spin", state 718, "(1)" + line 414, ".input.spin", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, ".input.spin", state 819, "(1)" + line 437, ".input.spin", state 836, "(1)" + line 441, ".input.spin", state 849, "(1)" + line 271, ".input.spin", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 928, "(1)" + line 283, ".input.spin", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 951, "(1)" + line 252, ".input.spin", state 959, "(1)" + line 256, ".input.spin", state 971, "(1)" + line 260, ".input.spin", state 979, "(1)" + line 275, ".input.spin", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1042, "(1)" + line 252, ".input.spin", state 1050, "(1)" + line 256, ".input.spin", state 1062, "(1)" + line 260, ".input.spin", state 1070, "(1)" + line 275, ".input.spin", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1133, "(1)" + line 252, ".input.spin", state 1141, "(1)" + line 256, ".input.spin", state 1153, "(1)" + line 260, ".input.spin", state 1161, "(1)" + line 275, ".input.spin", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1224, "(1)" + line 252, ".input.spin", state 1232, "(1)" + line 256, ".input.spin", state 1244, "(1)" + line 260, ".input.spin", state 1252, "(1)" + line 1236, ".input.spin", state 1267, "-end-" + (71 of 1267 states) +unreached in proctype :init: + (0 of 78 states) + +pan: elapsed time 4.59e+03 seconds +pan: rate 1460.6376 states/second +pan: avg transition delay 1.0334e-06 usec +cp .input.spin asserts.spin.input +cp .input.spin.trail asserts.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/asserts.spin.input b/urcu-controldataflow-alpha-no-ipi/asserts.spin.input new file mode 100644 index 0000000..b59aa77 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/asserts.spin.input @@ -0,0 +1,1272 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/references.txt b/urcu-controldataflow-alpha-no-ipi/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow-alpha-no-ipi/urcu.sh b/urcu-controldataflow-alpha-no-ipi/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow-alpha-no-ipi/urcu.spin b/urcu-controldataflow-alpha-no-ipi/urcu.spin new file mode 100644 index 0000000..54752a1 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu.spin @@ -0,0 +1,1254 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free.log b/urcu-controldataflow-alpha-no-ipi/urcu_free.log new file mode 100644 index 0000000..0802f77 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free.log @@ -0,0 +1,479 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1294) +Depth= 5182 States= 1e+06 Transitions= 6.22e+08 Memory= 550.432 t= 762 R= 1e+03 +Depth= 5473 States= 2e+06 Transitions= 1.3e+09 Memory= 634.318 t= 1.62e+03 R= 1e+03 +Depth= 5473 States= 3e+06 Transitions= 1.95e+09 Memory= 718.303 t= 2.47e+03 R= 1e+03 +pan: resizing hashtable to -w22.. done +Depth= 5473 States= 4e+06 Transitions= 2.64e+09 Memory= 833.311 t= 3.32e+03 R= 1e+03 +Depth= 5473 States= 5e+06 Transitions= 3.3e+09 Memory= 917.295 t= 4.14e+03 R= 1e+03 +Depth= 5582 States= 6e+06 Transitions= 3.99e+09 Memory= 1001.279 t= 5e+03 R= 1e+03 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 5582, errors: 0 + 6711104 states, stored +4.4393362e+09 states, matched +4.4460473e+09 transitions (= stored+matched) +2.5322962e+10 atomic steps +hash conflicts: 3.3328749e+09 (resolved) + +Stats on memory usage (in Megabytes): + 742.424 equivalent memory usage for states (stored*(State-vector + overhead)) + 571.575 actual memory usage for states (compression: 76.99%) + state-vector as stored = 61 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 1060.947 total actual memory usage + +unreached in proctype urcu_reader + line 410, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 82, "(1)" + line 437, "pan.___", state 112, "(1)" + line 441, "pan.___", state 125, "(1)" + line 596, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 410, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 218, "(1)" + line 437, "pan.___", state 248, "(1)" + line 441, "pan.___", state 261, "(1)" + line 410, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 347, "(1)" + line 437, "pan.___", state 377, "(1)" + line 441, "pan.___", state 390, "(1)" + line 410, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 415, "(1)" + line 410, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 416, "else" + line 410, "pan.___", state 419, "(1)" + line 414, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 429, "(1)" + line 414, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 430, "else" + line 414, "pan.___", state 433, "(1)" + line 414, "pan.___", state 434, "(1)" + line 414, "pan.___", state 434, "(1)" + line 412, "pan.___", state 439, "((i<1))" + line 412, "pan.___", state 439, "((i>=1))" + line 419, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 447, "(1)" + line 419, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 448, "else" + line 419, "pan.___", state 451, "(1)" + line 419, "pan.___", state 452, "(1)" + line 419, "pan.___", state 452, "(1)" + line 423, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 461, "(1)" + line 423, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 462, "else" + line 423, "pan.___", state 465, "(1)" + line 423, "pan.___", state 466, "(1)" + line 423, "pan.___", state 466, "(1)" + line 421, "pan.___", state 471, "((i<2))" + line 421, "pan.___", state 471, "((i>=2))" + line 428, "pan.___", state 478, "(1)" + line 428, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 428, "pan.___", state 479, "else" + line 428, "pan.___", state 482, "(1)" + line 428, "pan.___", state 483, "(1)" + line 428, "pan.___", state 483, "(1)" + line 432, "pan.___", state 491, "(1)" + line 432, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 432, "pan.___", state 492, "else" + line 432, "pan.___", state 495, "(1)" + line 432, "pan.___", state 496, "(1)" + line 432, "pan.___", state 496, "(1)" + line 430, "pan.___", state 501, "((i<1))" + line 430, "pan.___", state 501, "((i>=1))" + line 437, "pan.___", state 508, "(1)" + line 437, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 437, "pan.___", state 509, "else" + line 437, "pan.___", state 512, "(1)" + line 437, "pan.___", state 513, "(1)" + line 437, "pan.___", state 513, "(1)" + line 441, "pan.___", state 521, "(1)" + line 441, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 441, "pan.___", state 522, "else" + line 441, "pan.___", state 525, "(1)" + line 441, "pan.___", state 526, "(1)" + line 441, "pan.___", state 526, "(1)" + line 439, "pan.___", state 531, "((i<2))" + line 439, "pan.___", state 531, "((i>=2))" + line 449, "pan.___", state 535, "(1)" + line 449, "pan.___", state 535, "(1)" + line 596, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 596, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 596, "pan.___", state 540, "(1)" + line 271, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 555, "(1)" + line 279, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 591, "(1)" + line 252, "pan.___", state 599, "(1)" + line 256, "pan.___", state 611, "(1)" + line 260, "pan.___", state 619, "(1)" + line 410, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 702, "(1)" + line 432, "pan.___", state 715, "(1)" + line 437, "pan.___", state 732, "(1)" + line 441, "pan.___", state 745, "(1)" + line 410, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 838, "(1)" + line 437, "pan.___", state 868, "(1)" + line 441, "pan.___", state 881, "(1)" + line 410, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 904, "(1)" + line 410, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 905, "else" + line 410, "pan.___", state 908, "(1)" + line 414, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 918, "(1)" + line 414, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 919, "else" + line 414, "pan.___", state 922, "(1)" + line 414, "pan.___", state 923, "(1)" + line 414, "pan.___", state 923, "(1)" + line 412, "pan.___", state 928, "((i<1))" + line 412, "pan.___", state 928, "((i>=1))" + line 419, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 936, "(1)" + line 419, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 937, "else" + line 419, "pan.___", state 940, "(1)" + line 419, "pan.___", state 941, "(1)" + line 419, "pan.___", state 941, "(1)" + line 423, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 950, "(1)" + line 423, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 951, "else" + line 423, "pan.___", state 954, "(1)" + line 423, "pan.___", state 955, "(1)" + line 423, "pan.___", state 955, "(1)" + line 421, "pan.___", state 960, "((i<2))" + line 421, "pan.___", state 960, "((i>=2))" + line 428, "pan.___", state 967, "(1)" + line 428, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 428, "pan.___", state 968, "else" + line 428, "pan.___", state 971, "(1)" + line 428, "pan.___", state 972, "(1)" + line 428, "pan.___", state 972, "(1)" + line 432, "pan.___", state 980, "(1)" + line 432, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 432, "pan.___", state 981, "else" + line 432, "pan.___", state 984, "(1)" + line 432, "pan.___", state 985, "(1)" + line 432, "pan.___", state 985, "(1)" + line 430, "pan.___", state 990, "((i<1))" + line 430, "pan.___", state 990, "((i>=1))" + line 437, "pan.___", state 997, "(1)" + line 437, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 437, "pan.___", state 998, "else" + line 437, "pan.___", state 1001, "(1)" + line 437, "pan.___", state 1002, "(1)" + line 437, "pan.___", state 1002, "(1)" + line 441, "pan.___", state 1010, "(1)" + line 441, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 441, "pan.___", state 1011, "else" + line 441, "pan.___", state 1014, "(1)" + line 441, "pan.___", state 1015, "(1)" + line 441, "pan.___", state 1015, "(1)" + line 439, "pan.___", state 1020, "((i<2))" + line 439, "pan.___", state 1020, "((i>=2))" + line 449, "pan.___", state 1024, "(1)" + line 449, "pan.___", state 1024, "(1)" + line 604, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 410, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 1098, "(1)" + line 432, "pan.___", state 1111, "(1)" + line 437, "pan.___", state 1128, "(1)" + line 441, "pan.___", state 1141, "(1)" + line 410, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 1230, "(1)" + line 437, "pan.___", state 1260, "(1)" + line 441, "pan.___", state 1273, "(1)" + line 410, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 1363, "(1)" + line 437, "pan.___", state 1393, "(1)" + line 441, "pan.___", state 1406, "(1)" + line 410, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 1492, "(1)" + line 437, "pan.___", state 1522, "(1)" + line 441, "pan.___", state 1535, "(1)" + line 271, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1605, "(1)" + line 252, "pan.___", state 1613, "(1)" + line 256, "pan.___", state 1625, "(1)" + line 260, "pan.___", state 1633, "(1)" + line 410, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 1716, "(1)" + line 432, "pan.___", state 1729, "(1)" + line 437, "pan.___", state 1746, "(1)" + line 441, "pan.___", state 1759, "(1)" + line 410, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 1845, "(1)" + line 432, "pan.___", state 1858, "(1)" + line 437, "pan.___", state 1875, "(1)" + line 441, "pan.___", state 1888, "(1)" + line 410, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 1977, "(1)" + line 437, "pan.___", state 2007, "(1)" + line 441, "pan.___", state 2020, "(1)" + line 643, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 410, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 2113, "(1)" + line 437, "pan.___", state 2143, "(1)" + line 441, "pan.___", state 2156, "(1)" + line 410, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 2242, "(1)" + line 437, "pan.___", state 2272, "(1)" + line 441, "pan.___", state 2285, "(1)" + line 410, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 2310, "(1)" + line 410, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 2311, "else" + line 410, "pan.___", state 2314, "(1)" + line 414, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2324, "(1)" + line 414, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 2325, "else" + line 414, "pan.___", state 2328, "(1)" + line 414, "pan.___", state 2329, "(1)" + line 414, "pan.___", state 2329, "(1)" + line 412, "pan.___", state 2334, "((i<1))" + line 412, "pan.___", state 2334, "((i>=1))" + line 419, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2342, "(1)" + line 419, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 2343, "else" + line 419, "pan.___", state 2346, "(1)" + line 419, "pan.___", state 2347, "(1)" + line 419, "pan.___", state 2347, "(1)" + line 423, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2356, "(1)" + line 423, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 2357, "else" + line 423, "pan.___", state 2360, "(1)" + line 423, "pan.___", state 2361, "(1)" + line 423, "pan.___", state 2361, "(1)" + line 421, "pan.___", state 2366, "((i<2))" + line 421, "pan.___", state 2366, "((i>=2))" + line 428, "pan.___", state 2373, "(1)" + line 428, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 428, "pan.___", state 2374, "else" + line 428, "pan.___", state 2377, "(1)" + line 428, "pan.___", state 2378, "(1)" + line 428, "pan.___", state 2378, "(1)" + line 432, "pan.___", state 2386, "(1)" + line 432, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 432, "pan.___", state 2387, "else" + line 432, "pan.___", state 2390, "(1)" + line 432, "pan.___", state 2391, "(1)" + line 432, "pan.___", state 2391, "(1)" + line 430, "pan.___", state 2396, "((i<1))" + line 430, "pan.___", state 2396, "((i>=1))" + line 437, "pan.___", state 2403, "(1)" + line 437, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 437, "pan.___", state 2404, "else" + line 437, "pan.___", state 2407, "(1)" + line 437, "pan.___", state 2408, "(1)" + line 437, "pan.___", state 2408, "(1)" + line 441, "pan.___", state 2416, "(1)" + line 441, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 441, "pan.___", state 2417, "else" + line 441, "pan.___", state 2420, "(1)" + line 441, "pan.___", state 2421, "(1)" + line 441, "pan.___", state 2421, "(1)" + line 439, "pan.___", state 2426, "((i<2))" + line 439, "pan.___", state 2426, "((i>=2))" + line 449, "pan.___", state 2430, "(1)" + line 449, "pan.___", state 2430, "(1)" + line 643, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 643, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 643, "pan.___", state 2435, "(1)" + line 271, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2486, "(1)" + line 252, "pan.___", state 2494, "(1)" + line 256, "pan.___", state 2506, "(1)" + line 260, "pan.___", state 2514, "(1)" + line 410, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 2597, "(1)" + line 432, "pan.___", state 2610, "(1)" + line 437, "pan.___", state 2627, "(1)" + line 441, "pan.___", state 2640, "(1)" + line 271, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2711, "(1)" + line 252, "pan.___", state 2719, "(1)" + line 256, "pan.___", state 2731, "(1)" + line 260, "pan.___", state 2739, "(1)" + line 410, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 2822, "(1)" + line 432, "pan.___", state 2835, "(1)" + line 437, "pan.___", state 2852, "(1)" + line 441, "pan.___", state 2865, "(1)" + line 410, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 2951, "(1)" + line 432, "pan.___", state 2964, "(1)" + line 437, "pan.___", state 2981, "(1)" + line 441, "pan.___", state 2994, "(1)" + line 248, "pan.___", state 3027, "(1)" + line 256, "pan.___", state 3047, "(1)" + line 260, "pan.___", state 3055, "(1)" + line 248, "pan.___", state 3070, "(1)" + line 252, "pan.___", state 3078, "(1)" + line 256, "pan.___", state 3090, "(1)" + line 260, "pan.___", state 3098, "(1)" + line 897, "pan.___", state 3115, "-end-" + (283 of 3115 states) +unreached in proctype urcu_writer + line 410, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 428, "pan.___", state 83, "(1)" + line 432, "pan.___", state 96, "(1)" + line 437, "pan.___", state 113, "(1)" + line 271, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 428, "pan.___", state 276, "(1)" + line 432, "pan.___", state 289, "(1)" + line 437, "pan.___", state 306, "(1)" + line 441, "pan.___", state 319, "(1)" + line 414, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, "pan.___", state 420, "(1)" + line 437, "pan.___", state 437, "(1)" + line 441, "pan.___", state 450, "(1)" + line 414, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, "pan.___", state 559, "(1)" + line 437, "pan.___", state 576, "(1)" + line 441, "pan.___", state 589, "(1)" + line 414, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, "pan.___", state 688, "(1)" + line 437, "pan.___", state 705, "(1)" + line 441, "pan.___", state 718, "(1)" + line 414, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 432, "pan.___", state 819, "(1)" + line 437, "pan.___", state 836, "(1)" + line 441, "pan.___", state 849, "(1)" + line 271, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 928, "(1)" + line 283, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 951, "(1)" + line 252, "pan.___", state 959, "(1)" + line 256, "pan.___", state 971, "(1)" + line 260, "pan.___", state 979, "(1)" + line 275, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1042, "(1)" + line 252, "pan.___", state 1050, "(1)" + line 256, "pan.___", state 1062, "(1)" + line 260, "pan.___", state 1070, "(1)" + line 275, "pan.___", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1133, "(1)" + line 252, "pan.___", state 1141, "(1)" + line 256, "pan.___", state 1153, "(1)" + line 260, "pan.___", state 1161, "(1)" + line 275, "pan.___", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1224, "(1)" + line 252, "pan.___", state 1232, "(1)" + line 256, "pan.___", state 1244, "(1)" + line 260, "pan.___", state 1252, "(1)" + line 1236, "pan.___", state 1267, "-end-" + (71 of 1267 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1299, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 5.57e+03 seconds +pan: rate 1203.9777 states/second +pan: avg transition delay 1.2537e-06 usec +cp .input.spin urcu_free.spin.input +cp .input.spin.trail urcu_free.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free.ltl b/urcu-controldataflow-alpha-no-ipi/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_free.spin.input new file mode 100644 index 0000000..b59aa77 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free.spin.input @@ -0,0 +1,1272 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_nested.define b/urcu-controldataflow-alpha-no-ipi/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.define b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.log b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.log new file mode 100644 index 0000000..5ccd769 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.log @@ -0,0 +1,841 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 5985 States= 1e+06 Transitions= 3.71e+08 Memory= 550.432 t= 439 R= 2e+03 +Depth= 8926 States= 2e+06 Transitions= 9.51e+08 Memory= 634.416 t= 1.15e+03 R= 2e+03 +Depth= 8926 States= 3e+06 Transitions= 1.54e+09 Memory= 718.303 t= 1.89e+03 R= 2e+03 +pan: resizing hashtable to -w22.. done +Depth= 8926 States= 4e+06 Transitions= 2.08e+09 Memory= 833.311 t= 2.56e+03 R= 2e+03 +Depth= 8926 States= 5e+06 Transitions= 2.46e+09 Memory= 917.295 t= 3.01e+03 R= 2e+03 +Depth= 8926 States= 6e+06 Transitions= 2.91e+09 Memory= 1001.279 t= 3.56e+03 R= 2e+03 +pan: claim violated! (at depth 1267) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 8926, errors: 1 + 6822337 states, stored +3.2012922e+09 states, matched +3.2081145e+09 transitions (= stored+matched) +1.7190132e+10 atomic steps +hash conflicts: 2.341747e+09 (resolved) + +Stats on memory usage (in Megabytes): + 754.729 equivalent memory usage for states (stored*(State-vector + overhead)) + 580.944 actual memory usage for states (compression: 76.97%) + state-vector as stored = 61 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 1070.322 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 21, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 53, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 67, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 86, "(1)" + line 438, "pan.___", state 116, "(1)" + line 442, "pan.___", state 129, "(1)" + line 603, "pan.___", state 150, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 157, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 189, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 203, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 222, "(1)" + line 438, "pan.___", state 252, "(1)" + line 442, "pan.___", state 265, "(1)" + line 411, "pan.___", state 286, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 318, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 332, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 351, "(1)" + line 438, "pan.___", state 381, "(1)" + line 442, "pan.___", state 394, "(1)" + line 411, "pan.___", state 417, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 419, "(1)" + line 411, "pan.___", state 420, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 420, "else" + line 411, "pan.___", state 423, "(1)" + line 415, "pan.___", state 431, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 433, "(1)" + line 415, "pan.___", state 434, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 434, "else" + line 415, "pan.___", state 437, "(1)" + line 415, "pan.___", state 438, "(1)" + line 415, "pan.___", state 438, "(1)" + line 413, "pan.___", state 443, "((i<1))" + line 413, "pan.___", state 443, "((i>=1))" + line 420, "pan.___", state 449, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 451, "(1)" + line 420, "pan.___", state 452, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 452, "else" + line 420, "pan.___", state 455, "(1)" + line 420, "pan.___", state 456, "(1)" + line 420, "pan.___", state 456, "(1)" + line 424, "pan.___", state 463, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 465, "(1)" + line 424, "pan.___", state 466, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 466, "else" + line 424, "pan.___", state 469, "(1)" + line 424, "pan.___", state 470, "(1)" + line 424, "pan.___", state 470, "(1)" + line 422, "pan.___", state 475, "((i<2))" + line 422, "pan.___", state 475, "((i>=2))" + line 429, "pan.___", state 482, "(1)" + line 429, "pan.___", state 483, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 483, "else" + line 429, "pan.___", state 486, "(1)" + line 429, "pan.___", state 487, "(1)" + line 429, "pan.___", state 487, "(1)" + line 433, "pan.___", state 495, "(1)" + line 433, "pan.___", state 496, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 496, "else" + line 433, "pan.___", state 499, "(1)" + line 433, "pan.___", state 500, "(1)" + line 433, "pan.___", state 500, "(1)" + line 431, "pan.___", state 505, "((i<1))" + line 431, "pan.___", state 505, "((i>=1))" + line 438, "pan.___", state 512, "(1)" + line 438, "pan.___", state 513, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 513, "else" + line 438, "pan.___", state 516, "(1)" + line 438, "pan.___", state 517, "(1)" + line 438, "pan.___", state 517, "(1)" + line 442, "pan.___", state 525, "(1)" + line 442, "pan.___", state 526, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 526, "else" + line 442, "pan.___", state 529, "(1)" + line 442, "pan.___", state 530, "(1)" + line 442, "pan.___", state 530, "(1)" + line 440, "pan.___", state 535, "((i<2))" + line 440, "pan.___", state 535, "((i>=2))" + line 450, "pan.___", state 539, "(1)" + line 450, "pan.___", state 539, "(1)" + line 603, "pan.___", state 542, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 603, "pan.___", state 543, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 603, "pan.___", state 544, "(1)" + line 272, "pan.___", state 548, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 550, "(1)" + line 276, "pan.___", state 557, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 559, "(1)" + line 276, "pan.___", state 560, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 560, "else" + line 274, "pan.___", state 565, "((i<1))" + line 274, "pan.___", state 565, "((i>=1))" + line 280, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 572, "(1)" + line 280, "pan.___", state 573, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 573, "else" + line 284, "pan.___", state 579, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 581, "(1)" + line 284, "pan.___", state 582, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 582, "else" + line 282, "pan.___", state 587, "((i<2))" + line 282, "pan.___", state 587, "((i>=2))" + line 249, "pan.___", state 595, "(1)" + line 253, "pan.___", state 603, "(1)" + line 253, "pan.___", state 604, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 604, "else" + line 251, "pan.___", state 609, "((i<1))" + line 251, "pan.___", state 609, "((i>=1))" + line 257, "pan.___", state 615, "(1)" + line 257, "pan.___", state 616, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 616, "else" + line 261, "pan.___", state 623, "(1)" + line 261, "pan.___", state 624, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 624, "else" + line 266, "pan.___", state 633, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 633, "else" + line 299, "pan.___", state 635, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 635, "else" + line 411, "pan.___", state 641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 673, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 687, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 706, "(1)" + line 438, "pan.___", state 736, "(1)" + line 442, "pan.___", state 749, "(1)" + line 411, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 809, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 823, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 842, "(1)" + line 438, "pan.___", state 872, "(1)" + line 442, "pan.___", state 885, "(1)" + line 411, "pan.___", state 906, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 908, "(1)" + line 411, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 909, "else" + line 411, "pan.___", state 912, "(1)" + line 415, "pan.___", state 920, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 922, "(1)" + line 415, "pan.___", state 923, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 923, "else" + line 415, "pan.___", state 926, "(1)" + line 415, "pan.___", state 927, "(1)" + line 415, "pan.___", state 927, "(1)" + line 413, "pan.___", state 932, "((i<1))" + line 413, "pan.___", state 932, "((i>=1))" + line 420, "pan.___", state 938, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 940, "(1)" + line 420, "pan.___", state 941, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 941, "else" + line 420, "pan.___", state 944, "(1)" + line 420, "pan.___", state 945, "(1)" + line 420, "pan.___", state 945, "(1)" + line 424, "pan.___", state 952, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 954, "(1)" + line 424, "pan.___", state 955, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 955, "else" + line 424, "pan.___", state 958, "(1)" + line 424, "pan.___", state 959, "(1)" + line 424, "pan.___", state 959, "(1)" + line 422, "pan.___", state 964, "((i<2))" + line 422, "pan.___", state 964, "((i>=2))" + line 429, "pan.___", state 971, "(1)" + line 429, "pan.___", state 972, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 972, "else" + line 429, "pan.___", state 975, "(1)" + line 429, "pan.___", state 976, "(1)" + line 429, "pan.___", state 976, "(1)" + line 433, "pan.___", state 984, "(1)" + line 433, "pan.___", state 985, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 985, "else" + line 433, "pan.___", state 988, "(1)" + line 433, "pan.___", state 989, "(1)" + line 433, "pan.___", state 989, "(1)" + line 431, "pan.___", state 994, "((i<1))" + line 431, "pan.___", state 994, "((i>=1))" + line 438, "pan.___", state 1001, "(1)" + line 438, "pan.___", state 1002, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 1002, "else" + line 438, "pan.___", state 1005, "(1)" + line 438, "pan.___", state 1006, "(1)" + line 438, "pan.___", state 1006, "(1)" + line 442, "pan.___", state 1014, "(1)" + line 442, "pan.___", state 1015, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 1015, "else" + line 442, "pan.___", state 1018, "(1)" + line 442, "pan.___", state 1019, "(1)" + line 442, "pan.___", state 1019, "(1)" + line 440, "pan.___", state 1024, "((i<2))" + line 440, "pan.___", state 1024, "((i>=2))" + line 450, "pan.___", state 1028, "(1)" + line 450, "pan.___", state 1028, "(1)" + line 611, "pan.___", state 1032, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 1037, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1069, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1083, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1102, "(1)" + line 438, "pan.___", state 1132, "(1)" + line 442, "pan.___", state 1145, "(1)" + line 411, "pan.___", state 1169, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1201, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1215, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1234, "(1)" + line 438, "pan.___", state 1264, "(1)" + line 442, "pan.___", state 1277, "(1)" + line 411, "pan.___", state 1302, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1334, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1348, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1367, "(1)" + line 438, "pan.___", state 1397, "(1)" + line 442, "pan.___", state 1410, "(1)" + line 411, "pan.___", state 1431, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1463, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1477, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1496, "(1)" + line 438, "pan.___", state 1526, "(1)" + line 442, "pan.___", state 1539, "(1)" + line 272, "pan.___", state 1562, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1564, "(1)" + line 276, "pan.___", state 1571, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1573, "(1)" + line 276, "pan.___", state 1574, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1574, "else" + line 274, "pan.___", state 1579, "((i<1))" + line 274, "pan.___", state 1579, "((i>=1))" + line 280, "pan.___", state 1584, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1586, "(1)" + line 280, "pan.___", state 1587, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1587, "else" + line 284, "pan.___", state 1593, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1595, "(1)" + line 284, "pan.___", state 1596, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1596, "else" + line 282, "pan.___", state 1601, "((i<2))" + line 282, "pan.___", state 1601, "((i>=2))" + line 249, "pan.___", state 1609, "(1)" + line 253, "pan.___", state 1617, "(1)" + line 253, "pan.___", state 1618, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1618, "else" + line 251, "pan.___", state 1623, "((i<1))" + line 251, "pan.___", state 1623, "((i>=1))" + line 257, "pan.___", state 1629, "(1)" + line 257, "pan.___", state 1630, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1630, "else" + line 261, "pan.___", state 1637, "(1)" + line 261, "pan.___", state 1638, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1638, "else" + line 266, "pan.___", state 1647, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1647, "else" + line 299, "pan.___", state 1649, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1649, "else" + line 411, "pan.___", state 1655, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1687, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1701, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1720, "(1)" + line 438, "pan.___", state 1750, "(1)" + line 442, "pan.___", state 1763, "(1)" + line 411, "pan.___", state 1784, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1816, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1830, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1849, "(1)" + line 438, "pan.___", state 1879, "(1)" + line 442, "pan.___", state 1892, "(1)" + line 411, "pan.___", state 1916, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1948, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1962, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1981, "(1)" + line 438, "pan.___", state 2011, "(1)" + line 442, "pan.___", state 2024, "(1)" + line 650, "pan.___", state 2045, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 2052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2084, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2098, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2117, "(1)" + line 438, "pan.___", state 2147, "(1)" + line 442, "pan.___", state 2160, "(1)" + line 411, "pan.___", state 2181, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2213, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2227, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2246, "(1)" + line 438, "pan.___", state 2276, "(1)" + line 442, "pan.___", state 2289, "(1)" + line 411, "pan.___", state 2312, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2314, "(1)" + line 411, "pan.___", state 2315, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2315, "else" + line 411, "pan.___", state 2318, "(1)" + line 415, "pan.___", state 2326, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2328, "(1)" + line 415, "pan.___", state 2329, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2329, "else" + line 415, "pan.___", state 2332, "(1)" + line 415, "pan.___", state 2333, "(1)" + line 415, "pan.___", state 2333, "(1)" + line 413, "pan.___", state 2338, "((i<1))" + line 413, "pan.___", state 2338, "((i>=1))" + line 420, "pan.___", state 2344, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2346, "(1)" + line 420, "pan.___", state 2347, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2347, "else" + line 420, "pan.___", state 2350, "(1)" + line 420, "pan.___", state 2351, "(1)" + line 420, "pan.___", state 2351, "(1)" + line 424, "pan.___", state 2358, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2360, "(1)" + line 424, "pan.___", state 2361, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2361, "else" + line 424, "pan.___", state 2364, "(1)" + line 424, "pan.___", state 2365, "(1)" + line 424, "pan.___", state 2365, "(1)" + line 422, "pan.___", state 2370, "((i<2))" + line 422, "pan.___", state 2370, "((i>=2))" + line 429, "pan.___", state 2377, "(1)" + line 429, "pan.___", state 2378, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 2378, "else" + line 429, "pan.___", state 2381, "(1)" + line 429, "pan.___", state 2382, "(1)" + line 429, "pan.___", state 2382, "(1)" + line 433, "pan.___", state 2390, "(1)" + line 433, "pan.___", state 2391, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 2391, "else" + line 433, "pan.___", state 2394, "(1)" + line 433, "pan.___", state 2395, "(1)" + line 433, "pan.___", state 2395, "(1)" + line 431, "pan.___", state 2400, "((i<1))" + line 431, "pan.___", state 2400, "((i>=1))" + line 438, "pan.___", state 2407, "(1)" + line 438, "pan.___", state 2408, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 2408, "else" + line 438, "pan.___", state 2411, "(1)" + line 438, "pan.___", state 2412, "(1)" + line 438, "pan.___", state 2412, "(1)" + line 442, "pan.___", state 2420, "(1)" + line 442, "pan.___", state 2421, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 2421, "else" + line 442, "pan.___", state 2424, "(1)" + line 442, "pan.___", state 2425, "(1)" + line 442, "pan.___", state 2425, "(1)" + line 440, "pan.___", state 2430, "((i<2))" + line 440, "pan.___", state 2430, "((i>=2))" + line 450, "pan.___", state 2434, "(1)" + line 450, "pan.___", state 2434, "(1)" + line 650, "pan.___", state 2437, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 650, "pan.___", state 2438, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 650, "pan.___", state 2439, "(1)" + line 272, "pan.___", state 2443, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 2445, "(1)" + line 276, "pan.___", state 2452, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2454, "(1)" + line 276, "pan.___", state 2455, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 2455, "else" + line 274, "pan.___", state 2460, "((i<1))" + line 274, "pan.___", state 2460, "((i>=1))" + line 280, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2467, "(1)" + line 280, "pan.___", state 2468, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 2468, "else" + line 284, "pan.___", state 2474, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2476, "(1)" + line 284, "pan.___", state 2477, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 2477, "else" + line 282, "pan.___", state 2482, "((i<2))" + line 282, "pan.___", state 2482, "((i>=2))" + line 249, "pan.___", state 2490, "(1)" + line 253, "pan.___", state 2498, "(1)" + line 253, "pan.___", state 2499, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2499, "else" + line 251, "pan.___", state 2504, "((i<1))" + line 251, "pan.___", state 2504, "((i>=1))" + line 257, "pan.___", state 2510, "(1)" + line 257, "pan.___", state 2511, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2511, "else" + line 261, "pan.___", state 2518, "(1)" + line 261, "pan.___", state 2519, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2519, "else" + line 266, "pan.___", state 2528, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2528, "else" + line 299, "pan.___", state 2530, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 2530, "else" + line 411, "pan.___", state 2536, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2568, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2582, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2601, "(1)" + line 438, "pan.___", state 2631, "(1)" + line 442, "pan.___", state 2644, "(1)" + line 272, "pan.___", state 2668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 2670, "(1)" + line 276, "pan.___", state 2677, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2679, "(1)" + line 276, "pan.___", state 2680, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 2680, "else" + line 274, "pan.___", state 2685, "((i<1))" + line 274, "pan.___", state 2685, "((i>=1))" + line 280, "pan.___", state 2690, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2692, "(1)" + line 280, "pan.___", state 2693, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 2693, "else" + line 284, "pan.___", state 2699, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2701, "(1)" + line 284, "pan.___", state 2702, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 2702, "else" + line 282, "pan.___", state 2707, "((i<2))" + line 282, "pan.___", state 2707, "((i>=2))" + line 249, "pan.___", state 2715, "(1)" + line 253, "pan.___", state 2723, "(1)" + line 253, "pan.___", state 2724, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2724, "else" + line 251, "pan.___", state 2729, "((i<1))" + line 251, "pan.___", state 2729, "((i>=1))" + line 257, "pan.___", state 2735, "(1)" + line 257, "pan.___", state 2736, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2736, "else" + line 261, "pan.___", state 2743, "(1)" + line 261, "pan.___", state 2744, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2744, "else" + line 266, "pan.___", state 2753, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2753, "else" + line 299, "pan.___", state 2755, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 2755, "else" + line 411, "pan.___", state 2761, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2793, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2807, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2826, "(1)" + line 438, "pan.___", state 2856, "(1)" + line 442, "pan.___", state 2869, "(1)" + line 411, "pan.___", state 2890, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2922, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2936, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2955, "(1)" + line 438, "pan.___", state 2985, "(1)" + line 442, "pan.___", state 2998, "(1)" + line 249, "pan.___", state 3031, "(1)" + line 257, "pan.___", state 3051, "(1)" + line 261, "pan.___", state 3059, "(1)" + line 249, "pan.___", state 3074, "(1)" + line 257, "pan.___", state 3094, "(1)" + line 261, "pan.___", state 3102, "(1)" + line 898, "pan.___", state 3119, "-end-" + (330 of 3119 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 20, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 26, "(1)" + line 415, "pan.___", state 34, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 40, "(1)" + line 415, "pan.___", state 41, "(1)" + line 415, "pan.___", state 41, "(1)" + line 413, "pan.___", state 46, "((i<1))" + line 413, "pan.___", state 46, "((i>=1))" + line 420, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 58, "(1)" + line 420, "pan.___", state 59, "(1)" + line 420, "pan.___", state 59, "(1)" + line 424, "pan.___", state 72, "(1)" + line 424, "pan.___", state 73, "(1)" + line 424, "pan.___", state 73, "(1)" + line 422, "pan.___", state 78, "((i<2))" + line 422, "pan.___", state 78, "((i>=2))" + line 429, "pan.___", state 85, "(1)" + line 429, "pan.___", state 86, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 86, "else" + line 429, "pan.___", state 89, "(1)" + line 429, "pan.___", state 90, "(1)" + line 429, "pan.___", state 90, "(1)" + line 433, "pan.___", state 98, "(1)" + line 433, "pan.___", state 99, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 99, "else" + line 433, "pan.___", state 102, "(1)" + line 433, "pan.___", state 103, "(1)" + line 433, "pan.___", state 103, "(1)" + line 431, "pan.___", state 108, "((i<1))" + line 431, "pan.___", state 108, "((i>=1))" + line 438, "pan.___", state 115, "(1)" + line 438, "pan.___", state 116, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 116, "else" + line 438, "pan.___", state 119, "(1)" + line 438, "pan.___", state 120, "(1)" + line 438, "pan.___", state 120, "(1)" + line 442, "pan.___", state 128, "(1)" + line 442, "pan.___", state 129, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 129, "else" + line 442, "pan.___", state 132, "(1)" + line 442, "pan.___", state 133, "(1)" + line 442, "pan.___", state 133, "(1)" + line 440, "pan.___", state 138, "((i<2))" + line 440, "pan.___", state 138, "((i>=2))" + line 450, "pan.___", state 142, "(1)" + line 450, "pan.___", state 142, "(1)" + line 272, "pan.___", state 151, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 160, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 274, "pan.___", state 168, "((i<1))" + line 274, "pan.___", state 168, "((i>=1))" + line 280, "pan.___", state 173, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 1021, "pan.___", state 201, "old_data = cached_rcu_ptr.val[_pid]" + line 1032, "pan.___", state 205, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" + line 411, "pan.___", state 213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 219, "(1)" + line 415, "pan.___", state 227, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 233, "(1)" + line 415, "pan.___", state 234, "(1)" + line 415, "pan.___", state 234, "(1)" + line 413, "pan.___", state 239, "((i<1))" + line 413, "pan.___", state 239, "((i>=1))" + line 420, "pan.___", state 247, "(1)" + line 420, "pan.___", state 248, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 248, "else" + line 420, "pan.___", state 251, "(1)" + line 420, "pan.___", state 252, "(1)" + line 420, "pan.___", state 252, "(1)" + line 424, "pan.___", state 259, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 265, "(1)" + line 424, "pan.___", state 266, "(1)" + line 424, "pan.___", state 266, "(1)" + line 422, "pan.___", state 271, "((i<2))" + line 422, "pan.___", state 271, "((i>=2))" + line 429, "pan.___", state 278, "(1)" + line 429, "pan.___", state 279, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 279, "else" + line 429, "pan.___", state 282, "(1)" + line 429, "pan.___", state 283, "(1)" + line 429, "pan.___", state 283, "(1)" + line 433, "pan.___", state 291, "(1)" + line 433, "pan.___", state 292, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 292, "else" + line 433, "pan.___", state 295, "(1)" + line 433, "pan.___", state 296, "(1)" + line 433, "pan.___", state 296, "(1)" + line 431, "pan.___", state 301, "((i<1))" + line 431, "pan.___", state 301, "((i>=1))" + line 438, "pan.___", state 308, "(1)" + line 438, "pan.___", state 309, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 309, "else" + line 438, "pan.___", state 312, "(1)" + line 438, "pan.___", state 313, "(1)" + line 438, "pan.___", state 313, "(1)" + line 442, "pan.___", state 321, "(1)" + line 442, "pan.___", state 322, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 322, "else" + line 442, "pan.___", state 325, "(1)" + line 442, "pan.___", state 326, "(1)" + line 442, "pan.___", state 326, "(1)" + line 440, "pan.___", state 331, "((i<2))" + line 440, "pan.___", state 331, "((i>=2))" + line 450, "pan.___", state 335, "(1)" + line 450, "pan.___", state 335, "(1)" + line 411, "pan.___", state 346, "(1)" + line 411, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 347, "else" + line 411, "pan.___", state 350, "(1)" + line 415, "pan.___", state 358, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 364, "(1)" + line 415, "pan.___", state 365, "(1)" + line 415, "pan.___", state 365, "(1)" + line 413, "pan.___", state 370, "((i<1))" + line 413, "pan.___", state 370, "((i>=1))" + line 420, "pan.___", state 376, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 382, "(1)" + line 420, "pan.___", state 383, "(1)" + line 420, "pan.___", state 383, "(1)" + line 424, "pan.___", state 390, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 396, "(1)" + line 424, "pan.___", state 397, "(1)" + line 424, "pan.___", state 397, "(1)" + line 422, "pan.___", state 402, "((i<2))" + line 422, "pan.___", state 402, "((i>=2))" + line 429, "pan.___", state 409, "(1)" + line 429, "pan.___", state 410, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 410, "else" + line 429, "pan.___", state 413, "(1)" + line 429, "pan.___", state 414, "(1)" + line 429, "pan.___", state 414, "(1)" + line 433, "pan.___", state 422, "(1)" + line 433, "pan.___", state 423, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 423, "else" + line 433, "pan.___", state 426, "(1)" + line 433, "pan.___", state 427, "(1)" + line 433, "pan.___", state 427, "(1)" + line 431, "pan.___", state 432, "((i<1))" + line 431, "pan.___", state 432, "((i>=1))" + line 438, "pan.___", state 439, "(1)" + line 438, "pan.___", state 440, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 440, "else" + line 438, "pan.___", state 443, "(1)" + line 438, "pan.___", state 444, "(1)" + line 438, "pan.___", state 444, "(1)" + line 442, "pan.___", state 452, "(1)" + line 442, "pan.___", state 453, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 453, "else" + line 442, "pan.___", state 456, "(1)" + line 442, "pan.___", state 457, "(1)" + line 442, "pan.___", state 457, "(1)" + line 440, "pan.___", state 462, "((i<2))" + line 440, "pan.___", state 462, "((i>=2))" + line 450, "pan.___", state 466, "(1)" + line 450, "pan.___", state 466, "(1)" + line 1086, "pan.___", state 477, "_proc_urcu_writer = (_proc_urcu_writer&~((1<<9)))" + line 1091, "pan.___", state 478, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<8)|(1<<7))))" + line 411, "pan.___", state 483, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 489, "(1)" + line 415, "pan.___", state 497, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 503, "(1)" + line 415, "pan.___", state 504, "(1)" + line 415, "pan.___", state 504, "(1)" + line 413, "pan.___", state 509, "((i<1))" + line 413, "pan.___", state 509, "((i>=1))" + line 420, "pan.___", state 515, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 521, "(1)" + line 420, "pan.___", state 522, "(1)" + line 420, "pan.___", state 522, "(1)" + line 424, "pan.___", state 529, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 535, "(1)" + line 424, "pan.___", state 536, "(1)" + line 424, "pan.___", state 536, "(1)" + line 422, "pan.___", state 541, "((i<2))" + line 422, "pan.___", state 541, "((i>=2))" + line 429, "pan.___", state 548, "(1)" + line 429, "pan.___", state 549, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 549, "else" + line 429, "pan.___", state 552, "(1)" + line 429, "pan.___", state 553, "(1)" + line 429, "pan.___", state 553, "(1)" + line 433, "pan.___", state 561, "(1)" + line 433, "pan.___", state 562, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 562, "else" + line 433, "pan.___", state 565, "(1)" + line 433, "pan.___", state 566, "(1)" + line 433, "pan.___", state 566, "(1)" + line 431, "pan.___", state 571, "((i<1))" + line 431, "pan.___", state 571, "((i>=1))" + line 438, "pan.___", state 578, "(1)" + line 438, "pan.___", state 579, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 579, "else" + line 438, "pan.___", state 582, "(1)" + line 438, "pan.___", state 583, "(1)" + line 438, "pan.___", state 583, "(1)" + line 442, "pan.___", state 591, "(1)" + line 442, "pan.___", state 592, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 592, "else" + line 442, "pan.___", state 595, "(1)" + line 442, "pan.___", state 596, "(1)" + line 442, "pan.___", state 596, "(1)" + line 450, "pan.___", state 605, "(1)" + line 450, "pan.___", state 605, "(1)" + line 411, "pan.___", state 612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 626, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 429, "pan.___", state 677, "(1)" + line 433, "pan.___", state 690, "(1)" + line 438, "pan.___", state 707, "(1)" + line 442, "pan.___", state 720, "(1)" + line 415, "pan.___", state 757, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 775, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 789, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 821, "(1)" + line 438, "pan.___", state 838, "(1)" + line 442, "pan.___", state 851, "(1)" + line 1168, "pan.___", state 878, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" + line 272, "pan.___", state 906, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 908, "(1)" + line 276, "pan.___", state 915, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 917, "(1)" + line 276, "pan.___", state 918, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 918, "else" + line 274, "pan.___", state 923, "((i<1))" + line 274, "pan.___", state 923, "((i>=1))" + line 280, "pan.___", state 928, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 930, "(1)" + line 280, "pan.___", state 931, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 931, "else" + line 284, "pan.___", state 937, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 939, "(1)" + line 284, "pan.___", state 940, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 940, "else" + line 282, "pan.___", state 945, "((i<2))" + line 282, "pan.___", state 945, "((i>=2))" + line 249, "pan.___", state 953, "(1)" + line 253, "pan.___", state 961, "(1)" + line 253, "pan.___", state 962, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 962, "else" + line 251, "pan.___", state 967, "((i<1))" + line 251, "pan.___", state 967, "((i>=1))" + line 257, "pan.___", state 973, "(1)" + line 257, "pan.___", state 974, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 974, "else" + line 261, "pan.___", state 981, "(1)" + line 261, "pan.___", state 982, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 982, "else" + line 266, "pan.___", state 991, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 991, "else" + line 299, "pan.___", state 993, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 993, "else" + line 272, "pan.___", state 997, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 999, "(1)" + line 276, "pan.___", state 1006, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1008, "(1)" + line 276, "pan.___", state 1009, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1009, "else" + line 274, "pan.___", state 1014, "((i<1))" + line 274, "pan.___", state 1014, "((i>=1))" + line 280, "pan.___", state 1019, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1021, "(1)" + line 280, "pan.___", state 1022, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1022, "else" + line 284, "pan.___", state 1028, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1030, "(1)" + line 284, "pan.___", state 1031, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1031, "else" + line 282, "pan.___", state 1036, "((i<2))" + line 282, "pan.___", state 1036, "((i>=2))" + line 249, "pan.___", state 1044, "(1)" + line 253, "pan.___", state 1052, "(1)" + line 253, "pan.___", state 1053, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1053, "else" + line 251, "pan.___", state 1058, "((i<1))" + line 251, "pan.___", state 1058, "((i>=1))" + line 257, "pan.___", state 1064, "(1)" + line 257, "pan.___", state 1065, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1065, "else" + line 261, "pan.___", state 1072, "(1)" + line 261, "pan.___", state 1073, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1073, "else" + line 266, "pan.___", state 1082, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1082, "else" + line 299, "pan.___", state 1084, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1084, "else" + line 276, "pan.___", state 1097, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1110, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1119, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1135, "(1)" + line 253, "pan.___", state 1143, "(1)" + line 257, "pan.___", state 1155, "(1)" + line 261, "pan.___", state 1163, "(1)" + line 272, "pan.___", state 1179, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1181, "(1)" + line 276, "pan.___", state 1188, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1190, "(1)" + line 276, "pan.___", state 1191, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1191, "else" + line 274, "pan.___", state 1196, "((i<1))" + line 274, "pan.___", state 1196, "((i>=1))" + line 280, "pan.___", state 1201, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1203, "(1)" + line 280, "pan.___", state 1204, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1204, "else" + line 284, "pan.___", state 1210, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1212, "(1)" + line 284, "pan.___", state 1213, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1213, "else" + line 282, "pan.___", state 1218, "((i<2))" + line 282, "pan.___", state 1218, "((i>=2))" + line 249, "pan.___", state 1226, "(1)" + line 253, "pan.___", state 1234, "(1)" + line 253, "pan.___", state 1235, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1235, "else" + line 251, "pan.___", state 1240, "((i<1))" + line 251, "pan.___", state 1240, "((i>=1))" + line 257, "pan.___", state 1246, "(1)" + line 257, "pan.___", state 1247, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1247, "else" + line 261, "pan.___", state 1254, "(1)" + line 261, "pan.___", state 1255, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1255, "else" + line 266, "pan.___", state 1264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1264, "else" + line 299, "pan.___", state 1266, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1266, "else" + line 1237, "pan.___", state 1269, "-end-" + (227 of 1269 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 3.93e+03 seconds +pan: rate 1735.2351 states/second +pan: avg transition delay 1.2255e-06 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..ba5712c --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input @@ -0,0 +1,1273 @@ +#define NO_MB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input.trail b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..fbd72f1 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,1270 @@ +-2:3:-2 +-4:-4:-4 +1:0:4468 +2:3:4388 +3:3:4391 +4:3:4391 +5:3:4394 +6:3:4402 +7:3:4402 +8:3:4405 +9:3:4411 +10:3:4415 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+1262:0:4468 +1263:1:1295 +1264:1:1296 +1265:0:4466 +1266:2:4016 +1267:0:4472 +1268:1:756 diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.define b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.log b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.log new file mode 100644 index 0000000..3da0a27 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.log @@ -0,0 +1,536 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +pan: claim violated! (at depth 2092) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 5332, errors: 1 + 615700 states, stored +3.8337558e+08 states, matched +3.8399128e+08 transitions (= stored+matched) +2.147943e+09 atomic steps +hash conflicts: 90741041 (resolved) + +Stats on memory usage (in Megabytes): + 68.113 equivalent memory usage for states (stored*(State-vector + overhead)) + 52.415 actual memory usage for states (compression: 76.95%) + state-vector as stored = 61 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 518.108 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 82, "(1)" + line 438, "pan.___", state 112, "(1)" + line 442, "pan.___", state 125, "(1)" + line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 218, "(1)" + line 438, "pan.___", state 248, "(1)" + line 442, "pan.___", state 261, "(1)" + line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 347, "(1)" + line 438, "pan.___", state 377, "(1)" + line 442, "pan.___", state 390, "(1)" + line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 415, "(1)" + line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 416, "else" + line 411, "pan.___", state 419, "(1)" + line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 429, "(1)" + line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 430, "else" + line 415, "pan.___", state 433, "(1)" + line 415, "pan.___", state 434, "(1)" + line 415, "pan.___", state 434, "(1)" + line 413, "pan.___", state 439, "((i<1))" + line 413, "pan.___", state 439, "((i>=1))" + line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 447, "(1)" + line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 448, "else" + line 420, "pan.___", state 451, "(1)" + line 420, "pan.___", state 452, "(1)" + line 420, "pan.___", state 452, "(1)" + line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 461, "(1)" + line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 462, "else" + line 424, "pan.___", state 465, "(1)" + line 424, "pan.___", state 466, "(1)" + line 424, "pan.___", state 466, "(1)" + line 422, "pan.___", state 471, "((i<2))" + line 422, "pan.___", state 471, "((i>=2))" + line 429, "pan.___", state 478, "(1)" + line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 479, "else" + line 429, "pan.___", state 482, "(1)" + line 429, "pan.___", state 483, "(1)" + line 429, "pan.___", state 483, "(1)" + line 433, "pan.___", state 491, "(1)" + line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 492, "else" + line 433, "pan.___", state 495, "(1)" + line 433, "pan.___", state 496, "(1)" + line 433, "pan.___", state 496, "(1)" + line 431, "pan.___", state 501, "((i<1))" + line 431, "pan.___", state 501, "((i>=1))" + line 438, "pan.___", state 508, "(1)" + line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 509, "else" + line 438, "pan.___", state 512, "(1)" + line 438, "pan.___", state 513, "(1)" + line 438, "pan.___", state 513, "(1)" + line 442, "pan.___", state 521, "(1)" + line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 522, "else" + line 442, "pan.___", state 525, "(1)" + line 442, "pan.___", state 526, "(1)" + line 442, "pan.___", state 526, "(1)" + line 440, "pan.___", state 531, "((i<2))" + line 440, "pan.___", state 531, "((i>=2))" + line 450, "pan.___", state 535, "(1)" + line 450, "pan.___", state 535, "(1)" + line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 540, "(1)" + line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 555, "(1)" + line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 591, "(1)" + line 253, "pan.___", state 599, "(1)" + line 257, "pan.___", state 611, "(1)" + line 261, "pan.___", state 619, "(1)" + line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 702, "(1)" + line 433, "pan.___", state 715, "(1)" + line 438, "pan.___", state 732, "(1)" + line 442, "pan.___", state 745, "(1)" + line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 838, "(1)" + line 438, "pan.___", state 868, "(1)" + line 442, "pan.___", state 881, "(1)" + line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 904, "(1)" + line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 905, "else" + line 411, "pan.___", state 908, "(1)" + line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 918, "(1)" + line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 919, "else" + line 415, "pan.___", state 922, "(1)" + line 415, "pan.___", state 923, "(1)" + line 415, "pan.___", state 923, "(1)" + line 413, "pan.___", state 928, "((i<1))" + line 413, "pan.___", state 928, "((i>=1))" + line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 936, "(1)" + line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 937, "else" + line 420, "pan.___", state 940, "(1)" + line 420, "pan.___", state 941, "(1)" + line 420, "pan.___", state 941, "(1)" + line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 950, "(1)" + line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 951, "else" + line 424, "pan.___", state 954, "(1)" + line 424, "pan.___", state 955, "(1)" + line 424, "pan.___", state 955, "(1)" + line 422, "pan.___", state 960, "((i<2))" + line 422, "pan.___", state 960, "((i>=2))" + line 429, "pan.___", state 967, "(1)" + line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 968, "else" + line 429, "pan.___", state 971, "(1)" + line 429, "pan.___", state 972, "(1)" + line 429, "pan.___", state 972, "(1)" + line 433, "pan.___", state 980, "(1)" + line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 981, "else" + line 433, "pan.___", state 984, "(1)" + line 433, "pan.___", state 985, "(1)" + line 433, "pan.___", state 985, "(1)" + line 431, "pan.___", state 990, "((i<1))" + line 431, "pan.___", state 990, "((i>=1))" + line 438, "pan.___", state 997, "(1)" + line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 998, "else" + line 438, "pan.___", state 1001, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 442, "pan.___", state 1010, "(1)" + line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 1011, "else" + line 442, "pan.___", state 1014, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 440, "pan.___", state 1020, "((i<2))" + line 440, "pan.___", state 1020, "((i>=2))" + line 450, "pan.___", state 1024, "(1)" + line 450, "pan.___", state 1024, "(1)" + line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1098, "(1)" + line 433, "pan.___", state 1111, "(1)" + line 438, "pan.___", state 1128, "(1)" + line 442, "pan.___", state 1141, "(1)" + line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1230, "(1)" + line 438, "pan.___", state 1260, "(1)" + line 442, "pan.___", state 1273, "(1)" + line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1363, "(1)" + line 438, "pan.___", state 1393, "(1)" + line 442, "pan.___", state 1406, "(1)" + line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1492, "(1)" + line 438, "pan.___", state 1522, "(1)" + line 442, "pan.___", state 1535, "(1)" + line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1605, "(1)" + line 253, "pan.___", state 1613, "(1)" + line 257, "pan.___", state 1625, "(1)" + line 261, "pan.___", state 1633, "(1)" + line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1716, "(1)" + line 433, "pan.___", state 1729, "(1)" + line 438, "pan.___", state 1746, "(1)" + line 442, "pan.___", state 1759, "(1)" + line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1845, "(1)" + line 433, "pan.___", state 1858, "(1)" + line 438, "pan.___", state 1875, "(1)" + line 442, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1977, "(1)" + line 438, "pan.___", state 2007, "(1)" + line 442, "pan.___", state 2020, "(1)" + line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2113, "(1)" + line 438, "pan.___", state 2143, "(1)" + line 442, "pan.___", state 2156, "(1)" + line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2242, "(1)" + line 438, "pan.___", state 2272, "(1)" + line 442, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2310, "(1)" + line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2311, "else" + line 411, "pan.___", state 2314, "(1)" + line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2324, "(1)" + line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2325, "else" + line 415, "pan.___", state 2328, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 413, "pan.___", state 2334, "((i<1))" + line 413, "pan.___", state 2334, "((i>=1))" + line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2342, "(1)" + line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2343, "else" + line 420, "pan.___", state 2346, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2356, "(1)" + line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2357, "else" + line 424, "pan.___", state 2360, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 422, "pan.___", state 2366, "((i<2))" + line 422, "pan.___", state 2366, "((i>=2))" + line 429, "pan.___", state 2373, "(1)" + line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 2374, "else" + line 429, "pan.___", state 2377, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 433, "pan.___", state 2386, "(1)" + line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 2387, "else" + line 433, "pan.___", state 2390, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 431, "pan.___", state 2396, "((i<1))" + line 431, "pan.___", state 2396, "((i>=1))" + line 438, "pan.___", state 2403, "(1)" + line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 2404, "else" + line 438, "pan.___", state 2407, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 442, "pan.___", state 2416, "(1)" + line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 2417, "else" + line 442, "pan.___", state 2420, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 440, "pan.___", state 2426, "((i<2))" + line 440, "pan.___", state 2426, "((i>=2))" + line 450, "pan.___", state 2430, "(1)" + line 450, "pan.___", state 2430, "(1)" + line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2435, "(1)" + line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2486, "(1)" + line 253, "pan.___", state 2494, "(1)" + line 257, "pan.___", state 2506, "(1)" + line 261, "pan.___", state 2514, "(1)" + line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2597, "(1)" + line 433, "pan.___", state 2610, "(1)" + line 438, "pan.___", state 2627, "(1)" + line 442, "pan.___", state 2640, "(1)" + line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2711, "(1)" + line 253, "pan.___", state 2719, "(1)" + line 257, "pan.___", state 2731, "(1)" + line 261, "pan.___", state 2739, "(1)" + line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2822, "(1)" + line 433, "pan.___", state 2835, "(1)" + line 438, "pan.___", state 2852, "(1)" + line 442, "pan.___", state 2865, "(1)" + line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2951, "(1)" + line 433, "pan.___", state 2964, "(1)" + line 438, "pan.___", state 2981, "(1)" + line 442, "pan.___", state 2994, "(1)" + line 411, "pan.___", state 3027, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 3059, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 3073, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 3092, "(1)" + line 438, "pan.___", state 3122, "(1)" + line 442, "pan.___", state 3135, "(1)" + line 411, "pan.___", state 3154, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 3168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 3186, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 3200, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 3219, "(1)" + line 433, "pan.___", state 3232, "(1)" + line 438, "pan.___", state 3249, "(1)" + line 442, "pan.___", state 3262, "(1)" + line 898, "pan.___", state 3283, "-end-" + (290 of 3283 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 24, "(1)" + line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 38, "(1)" + line 415, "pan.___", state 39, "(1)" + line 415, "pan.___", state 39, "(1)" + line 413, "pan.___", state 44, "((i<1))" + line 413, "pan.___", state 44, "((i>=1))" + line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 56, "(1)" + line 420, "pan.___", state 57, "(1)" + line 420, "pan.___", state 57, "(1)" + line 424, "pan.___", state 70, "(1)" + line 424, "pan.___", state 71, "(1)" + line 424, "pan.___", state 71, "(1)" + line 422, "pan.___", state 76, "((i<2))" + line 422, "pan.___", state 76, "((i>=2))" + line 429, "pan.___", state 83, "(1)" + line 429, "pan.___", state 84, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 84, "else" + line 429, "pan.___", state 87, "(1)" + line 429, "pan.___", state 88, "(1)" + line 429, "pan.___", state 88, "(1)" + line 433, "pan.___", state 96, "(1)" + line 433, "pan.___", state 97, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 97, "else" + line 433, "pan.___", state 100, "(1)" + line 433, "pan.___", state 101, "(1)" + line 433, "pan.___", state 101, "(1)" + line 431, "pan.___", state 106, "((i<1))" + line 431, "pan.___", state 106, "((i>=1))" + line 438, "pan.___", state 113, "(1)" + line 438, "pan.___", state 114, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 114, "else" + line 438, "pan.___", state 117, "(1)" + line 438, "pan.___", state 118, "(1)" + line 438, "pan.___", state 118, "(1)" + line 442, "pan.___", state 126, "(1)" + line 442, "pan.___", state 127, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 127, "else" + line 442, "pan.___", state 130, "(1)" + line 442, "pan.___", state 131, "(1)" + line 442, "pan.___", state 131, "(1)" + line 440, "pan.___", state 136, "((i<2))" + line 440, "pan.___", state 136, "((i>=2))" + line 450, "pan.___", state 140, "(1)" + line 450, "pan.___", state 140, "(1)" + line 272, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 276, "(1)" + line 433, "pan.___", state 289, "(1)" + line 438, "pan.___", state 306, "(1)" + line 442, "pan.___", state 319, "(1)" + line 415, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 420, "(1)" + line 438, "pan.___", state 437, "(1)" + line 442, "pan.___", state 450, "(1)" + line 415, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 559, "(1)" + line 438, "pan.___", state 576, "(1)" + line 442, "pan.___", state 589, "(1)" + line 415, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 688, "(1)" + line 438, "pan.___", state 705, "(1)" + line 442, "pan.___", state 718, "(1)" + line 415, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 819, "(1)" + line 438, "pan.___", state 836, "(1)" + line 442, "pan.___", state 849, "(1)" + line 272, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 928, "(1)" + line 284, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 951, "(1)" + line 253, "pan.___", state 959, "(1)" + line 257, "pan.___", state 971, "(1)" + line 261, "pan.___", state 979, "(1)" + line 276, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1042, "(1)" + line 253, "pan.___", state 1050, "(1)" + line 257, "pan.___", state 1062, "(1)" + line 261, "pan.___", state 1070, "(1)" + line 276, "pan.___", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1133, "(1)" + line 253, "pan.___", state 1141, "(1)" + line 257, "pan.___", state 1153, "(1)" + line 261, "pan.___", state 1161, "(1)" + line 276, "pan.___", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1224, "(1)" + line 253, "pan.___", state 1232, "(1)" + line 257, "pan.___", state 1244, "(1)" + line 261, "pan.___", state 1252, "(1)" + line 1237, "pan.___", state 1267, "-end-" + (96 of 1267 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 474 seconds +pan: rate 1298.3425 states/second +pan: avg transition delay 1.235e-06 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..8cb5f81 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input @@ -0,0 +1,1273 @@ +#define NO_RMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input.trail b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..de03f6a --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,2095 @@ +-2:3:-2 +-4:-4:-4 +1:0:4630 +2:3:4550 +3:3:4553 +4:3:4553 +5:3:4556 +6:3:4564 +7:3:4564 +8:3:4567 +9:3:4573 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/dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.log b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.log new file mode 100644 index 0000000..5c504a7 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.log @@ -0,0 +1,505 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 5131 States= 1e+06 Transitions= 5.44e+08 Memory= 550.432 t= 664 R= 2e+03 +Depth= 5131 States= 2e+06 Transitions= 1.26e+09 Memory= 634.318 t= 1.56e+03 R= 1e+03 +Depth= 5422 States= 3e+06 Transitions= 1.93e+09 Memory= 718.303 t= 2.43e+03 R= 1e+03 +pan: resizing hashtable to -w22.. done +Depth= 5422 States= 4e+06 Transitions= 2.58e+09 Memory= 833.311 t= 3.23e+03 R= 1e+03 +Depth= 5422 States= 5e+06 Transitions= 3.25e+09 Memory= 917.295 t= 4.07e+03 R= 1e+03 +pan: claim violated! (at depth 1420) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 5422, errors: 1 + 5523708 states, stored +3.5450503e+09 states, matched +3.550574e+09 transitions (= stored+matched) +2.0146324e+10 atomic steps +hash conflicts: 2.4095106e+09 (resolved) + +Stats on memory usage (in Megabytes): + 611.067 equivalent memory usage for states (stored*(State-vector + overhead)) + 471.813 actual memory usage for states (compression: 77.21%) + state-vector as stored = 62 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 961.240 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 82, "(1)" + line 438, "pan.___", state 112, "(1)" + line 442, "pan.___", state 125, "(1)" + line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 218, "(1)" + line 438, "pan.___", state 248, "(1)" + line 442, "pan.___", state 261, "(1)" + line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 347, "(1)" + line 438, "pan.___", state 377, "(1)" + line 442, "pan.___", state 390, "(1)" + line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 415, "(1)" + line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 416, "else" + line 411, "pan.___", state 419, "(1)" + line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 429, "(1)" + line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 430, "else" + line 415, "pan.___", state 433, "(1)" + line 415, "pan.___", state 434, "(1)" + line 415, "pan.___", state 434, "(1)" + line 413, "pan.___", state 439, "((i<1))" + line 413, "pan.___", state 439, "((i>=1))" + line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 447, "(1)" + line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 448, "else" + line 420, "pan.___", state 451, "(1)" + line 420, "pan.___", state 452, "(1)" + line 420, "pan.___", state 452, "(1)" + line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 461, "(1)" + line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 462, "else" + line 424, "pan.___", state 465, "(1)" + line 424, "pan.___", state 466, "(1)" + line 424, "pan.___", state 466, "(1)" + line 422, "pan.___", state 471, "((i<2))" + line 422, "pan.___", state 471, "((i>=2))" + line 429, "pan.___", state 478, "(1)" + line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 479, "else" + line 429, "pan.___", state 482, "(1)" + line 429, "pan.___", state 483, "(1)" + line 429, "pan.___", state 483, "(1)" + line 433, "pan.___", state 491, "(1)" + line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 492, "else" + line 433, "pan.___", state 495, "(1)" + line 433, "pan.___", state 496, "(1)" + line 433, "pan.___", state 496, "(1)" + line 431, "pan.___", state 501, "((i<1))" + line 431, "pan.___", state 501, "((i>=1))" + line 438, "pan.___", state 508, "(1)" + line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 509, "else" + line 438, "pan.___", state 512, "(1)" + line 438, "pan.___", state 513, "(1)" + line 438, "pan.___", state 513, "(1)" + line 442, "pan.___", state 521, "(1)" + line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 522, "else" + line 442, "pan.___", state 525, "(1)" + line 442, "pan.___", state 526, "(1)" + line 442, "pan.___", state 526, "(1)" + line 440, "pan.___", state 531, "((i<2))" + line 440, "pan.___", state 531, "((i>=2))" + line 450, "pan.___", state 535, "(1)" + line 450, "pan.___", state 535, "(1)" + line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 540, "(1)" + line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 555, "(1)" + line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 591, "(1)" + line 253, "pan.___", state 599, "(1)" + line 257, "pan.___", state 611, "(1)" + line 261, "pan.___", state 619, "(1)" + line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 702, "(1)" + line 433, "pan.___", state 715, "(1)" + line 438, "pan.___", state 732, "(1)" + line 442, "pan.___", state 745, "(1)" + line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 838, "(1)" + line 438, "pan.___", state 868, "(1)" + line 442, "pan.___", state 881, "(1)" + line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 904, "(1)" + line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 905, "else" + line 411, "pan.___", state 908, "(1)" + line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 918, "(1)" + line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 919, "else" + line 415, "pan.___", state 922, "(1)" + line 415, "pan.___", state 923, "(1)" + line 415, "pan.___", state 923, "(1)" + line 413, "pan.___", state 928, "((i<1))" + line 413, "pan.___", state 928, "((i>=1))" + line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 936, "(1)" + line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 937, "else" + line 420, "pan.___", state 940, "(1)" + line 420, "pan.___", state 941, "(1)" + line 420, "pan.___", state 941, "(1)" + line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 950, "(1)" + line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 951, "else" + line 424, "pan.___", state 954, "(1)" + line 424, "pan.___", state 955, "(1)" + line 424, "pan.___", state 955, "(1)" + line 422, "pan.___", state 960, "((i<2))" + line 422, "pan.___", state 960, "((i>=2))" + line 429, "pan.___", state 967, "(1)" + line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 968, "else" + line 429, "pan.___", state 971, "(1)" + line 429, "pan.___", state 972, "(1)" + line 429, "pan.___", state 972, "(1)" + line 433, "pan.___", state 980, "(1)" + line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 981, "else" + line 433, "pan.___", state 984, "(1)" + line 433, "pan.___", state 985, "(1)" + line 433, "pan.___", state 985, "(1)" + line 431, "pan.___", state 990, "((i<1))" + line 431, "pan.___", state 990, "((i>=1))" + line 438, "pan.___", state 997, "(1)" + line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 998, "else" + line 438, "pan.___", state 1001, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 442, "pan.___", state 1010, "(1)" + line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 1011, "else" + line 442, "pan.___", state 1014, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 440, "pan.___", state 1020, "((i<2))" + line 440, "pan.___", state 1020, "((i>=2))" + line 450, "pan.___", state 1024, "(1)" + line 450, "pan.___", state 1024, "(1)" + line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1098, "(1)" + line 433, "pan.___", state 1111, "(1)" + line 438, "pan.___", state 1128, "(1)" + line 442, "pan.___", state 1141, "(1)" + line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1230, "(1)" + line 438, "pan.___", state 1260, "(1)" + line 442, "pan.___", state 1273, "(1)" + line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1363, "(1)" + line 438, "pan.___", state 1393, "(1)" + line 442, "pan.___", state 1406, "(1)" + line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1492, "(1)" + line 438, "pan.___", state 1522, "(1)" + line 442, "pan.___", state 1535, "(1)" + line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1605, "(1)" + line 253, "pan.___", state 1613, "(1)" + line 257, "pan.___", state 1625, "(1)" + line 261, "pan.___", state 1633, "(1)" + line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1716, "(1)" + line 433, "pan.___", state 1729, "(1)" + line 438, "pan.___", state 1746, "(1)" + line 442, "pan.___", state 1759, "(1)" + line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1845, "(1)" + line 433, "pan.___", state 1858, "(1)" + line 438, "pan.___", state 1875, "(1)" + line 442, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1977, "(1)" + line 438, "pan.___", state 2007, "(1)" + line 442, "pan.___", state 2020, "(1)" + line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2113, "(1)" + line 438, "pan.___", state 2143, "(1)" + line 442, "pan.___", state 2156, "(1)" + line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2242, "(1)" + line 438, "pan.___", state 2272, "(1)" + line 442, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2310, "(1)" + line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2311, "else" + line 411, "pan.___", state 2314, "(1)" + line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2324, "(1)" + line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2325, "else" + line 415, "pan.___", state 2328, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 413, "pan.___", state 2334, "((i<1))" + line 413, "pan.___", state 2334, "((i>=1))" + line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2342, "(1)" + line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2343, "else" + line 420, "pan.___", state 2346, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2356, "(1)" + line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2357, "else" + line 424, "pan.___", state 2360, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 422, "pan.___", state 2366, "((i<2))" + line 422, "pan.___", state 2366, "((i>=2))" + line 429, "pan.___", state 2373, "(1)" + line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 2374, "else" + line 429, "pan.___", state 2377, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 433, "pan.___", state 2386, "(1)" + line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 2387, "else" + line 433, "pan.___", state 2390, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 431, "pan.___", state 2396, "((i<1))" + line 431, "pan.___", state 2396, "((i>=1))" + line 438, "pan.___", state 2403, "(1)" + line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 2404, "else" + line 438, "pan.___", state 2407, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 442, "pan.___", state 2416, "(1)" + line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 2417, "else" + line 442, "pan.___", state 2420, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 440, "pan.___", state 2426, "((i<2))" + line 440, "pan.___", state 2426, "((i>=2))" + line 450, "pan.___", state 2430, "(1)" + line 450, "pan.___", state 2430, "(1)" + line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2435, "(1)" + line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2486, "(1)" + line 253, "pan.___", state 2494, "(1)" + line 257, "pan.___", state 2506, "(1)" + line 261, "pan.___", state 2514, "(1)" + line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2597, "(1)" + line 433, "pan.___", state 2610, "(1)" + line 438, "pan.___", state 2627, "(1)" + line 442, "pan.___", state 2640, "(1)" + line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2711, "(1)" + line 253, "pan.___", state 2719, "(1)" + line 257, "pan.___", state 2731, "(1)" + line 261, "pan.___", state 2739, "(1)" + line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2822, "(1)" + line 433, "pan.___", state 2835, "(1)" + line 438, "pan.___", state 2852, "(1)" + line 442, "pan.___", state 2865, "(1)" + line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2951, "(1)" + line 433, "pan.___", state 2964, "(1)" + line 438, "pan.___", state 2981, "(1)" + line 442, "pan.___", state 2994, "(1)" + line 249, "pan.___", state 3027, "(1)" + line 257, "pan.___", state 3047, "(1)" + line 261, "pan.___", state 3055, "(1)" + line 249, "pan.___", state 3070, "(1)" + line 253, "pan.___", state 3078, "(1)" + line 257, "pan.___", state 3090, "(1)" + line 261, "pan.___", state 3098, "(1)" + line 898, "pan.___", state 3115, "-end-" + (283 of 3115 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 19, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 33, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 429, "pan.___", state 84, "(1)" + line 433, "pan.___", state 97, "(1)" + line 272, "pan.___", state 150, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 152, "(1)" + line 276, "pan.___", state 159, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 161, "(1)" + line 276, "pan.___", state 162, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 162, "else" + line 274, "pan.___", state 167, "((i<1))" + line 274, "pan.___", state 167, "((i>=1))" + line 280, "pan.___", state 172, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 174, "(1)" + line 280, "pan.___", state 175, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 175, "else" + line 284, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 183, "(1)" + line 284, "pan.___", state 184, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 184, "else" + line 289, "pan.___", state 193, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 289, "pan.___", state 193, "else" + line 411, "pan.___", state 212, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 226, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 244, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 258, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 277, "(1)" + line 433, "pan.___", state 290, "(1)" + line 438, "pan.___", state 307, "(1)" + line 442, "pan.___", state 320, "(1)" + line 415, "pan.___", state 357, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 375, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 389, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 421, "(1)" + line 438, "pan.___", state 438, "(1)" + line 442, "pan.___", state 451, "(1)" + line 415, "pan.___", state 496, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 514, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 528, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 560, "(1)" + line 438, "pan.___", state 577, "(1)" + line 442, "pan.___", state 590, "(1)" + line 415, "pan.___", state 625, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 643, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 657, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 689, "(1)" + line 438, "pan.___", state 706, "(1)" + line 442, "pan.___", state 719, "(1)" + line 415, "pan.___", state 756, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 774, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 788, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 820, "(1)" + line 438, "pan.___", state 837, "(1)" + line 442, "pan.___", state 850, "(1)" + line 272, "pan.___", state 905, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 914, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 952, "(1)" + line 253, "pan.___", state 960, "(1)" + line 257, "pan.___", state 972, "(1)" + line 261, "pan.___", state 980, "(1)" + line 276, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1018, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1027, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1043, "(1)" + line 253, "pan.___", state 1051, "(1)" + line 257, "pan.___", state 1063, "(1)" + line 261, "pan.___", state 1071, "(1)" + line 276, "pan.___", state 1096, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1109, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1118, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1134, "(1)" + line 253, "pan.___", state 1142, "(1)" + line 257, "pan.___", state 1154, "(1)" + line 261, "pan.___", state 1162, "(1)" + line 276, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1200, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1209, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1225, "(1)" + line 253, "pan.___", state 1233, "(1)" + line 257, "pan.___", state 1245, "(1)" + line 261, "pan.___", state 1253, "(1)" + line 1237, "pan.___", state 1268, "-end-" + (77 of 1268 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 4.43e+03 seconds +pan: rate 1246.6728 states/second +pan: avg transition delay 1.2479e-06 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..49791b0 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input @@ -0,0 +1,1273 @@ +#define NO_WMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input.trail b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..b250110 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1423 @@ +-2:3:-2 +-4:-4:-4 +1:0:4463 +2:3:4383 +3:3:4386 +4:3:4386 +5:3:4389 +6:3:4397 +7:3:4397 +8:3:4400 +9:3:4406 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+1417:1:1292 +1418:0:4461 +1419:1:11 +1420:0:4467 +1421:1:2299 diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.define b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.log b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.log new file mode 100644 index 0000000..90b0d78 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.log @@ -0,0 +1,632 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 5164 States= 1e+06 Transitions= 4.75e+08 Memory= 550.432 t= 582 R= 2e+03 +Depth= 5746 States= 2e+06 Transitions= 1.02e+09 Memory= 634.318 t= 1.27e+03 R= 2e+03 +pan: claim violated! (at depth 1144) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 5746, errors: 1 + 2322493 states, stored +1.1944827e+09 states, matched +1.1968052e+09 transitions (= stored+matched) +6.6651798e+09 atomic steps +hash conflicts: 7.6855101e+08 (resolved) + +Stats on memory usage (in Megabytes): + 256.929 equivalent memory usage for states (stored*(State-vector + overhead)) + 195.871 actual memory usage for states (compression: 76.24%) + state-vector as stored = 60 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 661.467 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 82, "(1)" + line 438, "pan.___", state 112, "(1)" + line 442, "pan.___", state 125, "(1)" + line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 218, "(1)" + line 438, "pan.___", state 248, "(1)" + line 442, "pan.___", state 261, "(1)" + line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 347, "(1)" + line 438, "pan.___", state 377, "(1)" + line 442, "pan.___", state 390, "(1)" + line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 415, "(1)" + line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 416, "else" + line 411, "pan.___", state 419, "(1)" + line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 429, "(1)" + line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 430, "else" + line 415, "pan.___", state 433, "(1)" + line 415, "pan.___", state 434, "(1)" + line 415, "pan.___", state 434, "(1)" + line 413, "pan.___", state 439, "((i<1))" + line 413, "pan.___", state 439, "((i>=1))" + line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 447, "(1)" + line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 448, "else" + line 420, "pan.___", state 451, "(1)" + line 420, "pan.___", state 452, "(1)" + line 420, "pan.___", state 452, "(1)" + line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 461, "(1)" + line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 462, "else" + line 424, "pan.___", state 465, "(1)" + line 424, "pan.___", state 466, "(1)" + line 424, "pan.___", state 466, "(1)" + line 422, "pan.___", state 471, "((i<2))" + line 422, "pan.___", state 471, "((i>=2))" + line 429, "pan.___", state 478, "(1)" + line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 479, "else" + line 429, "pan.___", state 482, "(1)" + line 429, "pan.___", state 483, "(1)" + line 429, "pan.___", state 483, "(1)" + line 433, "pan.___", state 491, "(1)" + line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 492, "else" + line 433, "pan.___", state 495, "(1)" + line 433, "pan.___", state 496, "(1)" + line 433, "pan.___", state 496, "(1)" + line 431, "pan.___", state 501, "((i<1))" + line 431, "pan.___", state 501, "((i>=1))" + line 438, "pan.___", state 508, "(1)" + line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 509, "else" + line 438, "pan.___", state 512, "(1)" + line 438, "pan.___", state 513, "(1)" + line 438, "pan.___", state 513, "(1)" + line 442, "pan.___", state 521, "(1)" + line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 522, "else" + line 442, "pan.___", state 525, "(1)" + line 442, "pan.___", state 526, "(1)" + line 442, "pan.___", state 526, "(1)" + line 440, "pan.___", state 531, "((i<2))" + line 440, "pan.___", state 531, "((i>=2))" + line 450, "pan.___", state 535, "(1)" + line 450, "pan.___", state 535, "(1)" + line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 540, "(1)" + line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 555, "(1)" + line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 591, "(1)" + line 253, "pan.___", state 599, "(1)" + line 257, "pan.___", state 611, "(1)" + line 261, "pan.___", state 619, "(1)" + line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 702, "(1)" + line 433, "pan.___", state 715, "(1)" + line 438, "pan.___", state 732, "(1)" + line 442, "pan.___", state 745, "(1)" + line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 838, "(1)" + line 438, "pan.___", state 868, "(1)" + line 442, "pan.___", state 881, "(1)" + line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 904, "(1)" + line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 905, "else" + line 411, "pan.___", state 908, "(1)" + line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 918, "(1)" + line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 919, "else" + line 415, "pan.___", state 922, "(1)" + line 415, "pan.___", state 923, "(1)" + line 415, "pan.___", state 923, "(1)" + line 413, "pan.___", state 928, "((i<1))" + line 413, "pan.___", state 928, "((i>=1))" + line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 936, "(1)" + line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 937, "else" + line 420, "pan.___", state 940, "(1)" + line 420, "pan.___", state 941, "(1)" + line 420, "pan.___", state 941, "(1)" + line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 950, "(1)" + line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 951, "else" + line 424, "pan.___", state 954, "(1)" + line 424, "pan.___", state 955, "(1)" + line 424, "pan.___", state 955, "(1)" + line 422, "pan.___", state 960, "((i<2))" + line 422, "pan.___", state 960, "((i>=2))" + line 429, "pan.___", state 967, "(1)" + line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 968, "else" + line 429, "pan.___", state 971, "(1)" + line 429, "pan.___", state 972, "(1)" + line 429, "pan.___", state 972, "(1)" + line 433, "pan.___", state 980, "(1)" + line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 981, "else" + line 433, "pan.___", state 984, "(1)" + line 433, "pan.___", state 985, "(1)" + line 433, "pan.___", state 985, "(1)" + line 431, "pan.___", state 990, "((i<1))" + line 431, "pan.___", state 990, "((i>=1))" + line 438, "pan.___", state 997, "(1)" + line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 998, "else" + line 438, "pan.___", state 1001, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 442, "pan.___", state 1010, "(1)" + line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 1011, "else" + line 442, "pan.___", state 1014, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 440, "pan.___", state 1020, "((i<2))" + line 440, "pan.___", state 1020, "((i>=2))" + line 450, "pan.___", state 1024, "(1)" + line 450, "pan.___", state 1024, "(1)" + line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1098, "(1)" + line 433, "pan.___", state 1111, "(1)" + line 438, "pan.___", state 1128, "(1)" + line 442, "pan.___", state 1141, "(1)" + line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1230, "(1)" + line 438, "pan.___", state 1260, "(1)" + line 442, "pan.___", state 1273, "(1)" + line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1363, "(1)" + line 438, "pan.___", state 1393, "(1)" + line 442, "pan.___", state 1406, "(1)" + line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1492, "(1)" + line 438, "pan.___", state 1522, "(1)" + line 442, "pan.___", state 1535, "(1)" + line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1605, "(1)" + line 253, "pan.___", state 1613, "(1)" + line 257, "pan.___", state 1625, "(1)" + line 261, "pan.___", state 1633, "(1)" + line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1716, "(1)" + line 433, "pan.___", state 1729, "(1)" + line 438, "pan.___", state 1746, "(1)" + line 442, "pan.___", state 1759, "(1)" + line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1845, "(1)" + line 433, "pan.___", state 1858, "(1)" + line 438, "pan.___", state 1875, "(1)" + line 442, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1977, "(1)" + line 438, "pan.___", state 2007, "(1)" + line 442, "pan.___", state 2020, "(1)" + line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2113, "(1)" + line 438, "pan.___", state 2143, "(1)" + line 442, "pan.___", state 2156, "(1)" + line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2242, "(1)" + line 438, "pan.___", state 2272, "(1)" + line 442, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2310, "(1)" + line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2311, "else" + line 411, "pan.___", state 2314, "(1)" + line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2324, "(1)" + line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2325, "else" + line 415, "pan.___", state 2328, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 413, "pan.___", state 2334, "((i<1))" + line 413, "pan.___", state 2334, "((i>=1))" + line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2342, "(1)" + line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2343, "else" + line 420, "pan.___", state 2346, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2356, "(1)" + line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2357, "else" + line 424, "pan.___", state 2360, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 422, "pan.___", state 2366, "((i<2))" + line 422, "pan.___", state 2366, "((i>=2))" + line 429, "pan.___", state 2373, "(1)" + line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 2374, "else" + line 429, "pan.___", state 2377, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 433, "pan.___", state 2386, "(1)" + line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 2387, "else" + line 433, "pan.___", state 2390, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 431, "pan.___", state 2396, "((i<1))" + line 431, "pan.___", state 2396, "((i>=1))" + line 438, "pan.___", state 2403, "(1)" + line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 2404, "else" + line 438, "pan.___", state 2407, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 442, "pan.___", state 2416, "(1)" + line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 2417, "else" + line 442, "pan.___", state 2420, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 440, "pan.___", state 2426, "((i<2))" + line 440, "pan.___", state 2426, "((i>=2))" + line 450, "pan.___", state 2430, "(1)" + line 450, "pan.___", state 2430, "(1)" + line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2435, "(1)" + line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2486, "(1)" + line 253, "pan.___", state 2494, "(1)" + line 257, "pan.___", state 2506, "(1)" + line 261, "pan.___", state 2514, "(1)" + line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2597, "(1)" + line 433, "pan.___", state 2610, "(1)" + line 438, "pan.___", state 2627, "(1)" + line 442, "pan.___", state 2640, "(1)" + line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2711, "(1)" + line 253, "pan.___", state 2719, "(1)" + line 257, "pan.___", state 2731, "(1)" + line 261, "pan.___", state 2739, "(1)" + line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2822, "(1)" + line 433, "pan.___", state 2835, "(1)" + line 438, "pan.___", state 2852, "(1)" + line 442, "pan.___", state 2865, "(1)" + line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2951, "(1)" + line 433, "pan.___", state 2964, "(1)" + line 438, "pan.___", state 2981, "(1)" + line 442, "pan.___", state 2994, "(1)" + line 249, "pan.___", state 3027, "(1)" + line 257, "pan.___", state 3047, "(1)" + line 261, "pan.___", state 3055, "(1)" + line 249, "pan.___", state 3070, "(1)" + line 253, "pan.___", state 3078, "(1)" + line 257, "pan.___", state 3090, "(1)" + line 261, "pan.___", state 3098, "(1)" + line 898, "pan.___", state 3115, "-end-" + (283 of 3115 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 22, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 36, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 54, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 429, "pan.___", state 87, "(1)" + line 433, "pan.___", state 100, "(1)" + line 438, "pan.___", state 117, "(1)" + line 272, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 162, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 175, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 215, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 229, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 247, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 261, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 280, "(1)" + line 433, "pan.___", state 293, "(1)" + line 438, "pan.___", state 310, "(1)" + line 442, "pan.___", state 323, "(1)" + line 415, "pan.___", state 360, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 378, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 392, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 424, "(1)" + line 438, "pan.___", state 441, "(1)" + line 442, "pan.___", state 454, "(1)" + line 411, "pan.___", state 484, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 498, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 516, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 530, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 549, "(1)" + line 433, "pan.___", state 562, "(1)" + line 438, "pan.___", state 579, "(1)" + line 442, "pan.___", state 592, "(1)" + line 411, "pan.___", state 613, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 615, "(1)" + line 411, "pan.___", state 616, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 616, "else" + line 411, "pan.___", state 619, "(1)" + line 415, "pan.___", state 627, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 629, "(1)" + line 415, "pan.___", state 630, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 630, "else" + line 415, "pan.___", state 633, "(1)" + line 415, "pan.___", state 634, "(1)" + line 415, "pan.___", state 634, "(1)" + line 413, "pan.___", state 639, "((i<1))" + line 413, "pan.___", state 639, "((i>=1))" + line 420, "pan.___", state 645, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 647, "(1)" + line 420, "pan.___", state 648, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 648, "else" + line 420, "pan.___", state 651, "(1)" + line 420, "pan.___", state 652, "(1)" + line 420, "pan.___", state 652, "(1)" + line 424, "pan.___", state 659, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 661, "(1)" + line 424, "pan.___", state 662, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 662, "else" + line 424, "pan.___", state 665, "(1)" + line 424, "pan.___", state 666, "(1)" + line 424, "pan.___", state 666, "(1)" + line 422, "pan.___", state 671, "((i<2))" + line 422, "pan.___", state 671, "((i>=2))" + line 429, "pan.___", state 678, "(1)" + line 429, "pan.___", state 679, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 679, "else" + line 429, "pan.___", state 682, "(1)" + line 429, "pan.___", state 683, "(1)" + line 429, "pan.___", state 683, "(1)" + line 433, "pan.___", state 691, "(1)" + line 433, "pan.___", state 692, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 692, "else" + line 433, "pan.___", state 695, "(1)" + line 433, "pan.___", state 696, "(1)" + line 433, "pan.___", state 696, "(1)" + line 431, "pan.___", state 701, "((i<1))" + line 431, "pan.___", state 701, "((i>=1))" + line 438, "pan.___", state 708, "(1)" + line 438, "pan.___", state 709, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 709, "else" + line 438, "pan.___", state 712, "(1)" + line 438, "pan.___", state 713, "(1)" + line 438, "pan.___", state 713, "(1)" + line 442, "pan.___", state 721, "(1)" + line 442, "pan.___", state 722, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 722, "else" + line 442, "pan.___", state 725, "(1)" + line 442, "pan.___", state 726, "(1)" + line 442, "pan.___", state 726, "(1)" + line 440, "pan.___", state 731, "((i<2))" + line 440, "pan.___", state 731, "((i>=2))" + line 450, "pan.___", state 735, "(1)" + line 450, "pan.___", state 735, "(1)" + line 1117, "pan.___", state 739, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" + line 411, "pan.___", state 744, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 746, "(1)" + line 411, "pan.___", state 747, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 747, "else" + line 411, "pan.___", state 750, "(1)" + line 415, "pan.___", state 758, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 760, "(1)" + line 415, "pan.___", state 761, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 761, "else" + line 415, "pan.___", state 764, "(1)" + line 415, "pan.___", state 765, "(1)" + line 415, "pan.___", state 765, "(1)" + line 413, "pan.___", state 770, "((i<1))" + line 413, "pan.___", state 770, "((i>=1))" + line 420, "pan.___", state 776, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 778, "(1)" + line 420, "pan.___", state 779, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 779, "else" + line 420, "pan.___", state 782, "(1)" + line 420, "pan.___", state 783, "(1)" + line 420, "pan.___", state 783, "(1)" + line 424, "pan.___", state 790, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 792, "(1)" + line 424, "pan.___", state 793, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 793, "else" + line 424, "pan.___", state 796, "(1)" + line 424, "pan.___", state 797, "(1)" + line 424, "pan.___", state 797, "(1)" + line 422, "pan.___", state 802, "((i<2))" + line 422, "pan.___", state 802, "((i>=2))" + line 429, "pan.___", state 809, "(1)" + line 429, "pan.___", state 810, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 810, "else" + line 429, "pan.___", state 813, "(1)" + line 429, "pan.___", state 814, "(1)" + line 429, "pan.___", state 814, "(1)" + line 433, "pan.___", state 822, "(1)" + line 433, "pan.___", state 823, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 823, "else" + line 433, "pan.___", state 826, "(1)" + line 433, "pan.___", state 827, "(1)" + line 433, "pan.___", state 827, "(1)" + line 431, "pan.___", state 832, "((i<1))" + line 431, "pan.___", state 832, "((i>=1))" + line 438, "pan.___", state 839, "(1)" + line 438, "pan.___", state 840, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 840, "else" + line 438, "pan.___", state 843, "(1)" + line 438, "pan.___", state 844, "(1)" + line 438, "pan.___", state 844, "(1)" + line 442, "pan.___", state 852, "(1)" + line 442, "pan.___", state 853, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 853, "else" + line 442, "pan.___", state 856, "(1)" + line 442, "pan.___", state 857, "(1)" + line 442, "pan.___", state 857, "(1)" + line 440, "pan.___", state 862, "((i<2))" + line 440, "pan.___", state 862, "((i>=2))" + line 450, "pan.___", state 866, "(1)" + line 450, "pan.___", state 866, "(1)" + line 1133, "pan.___", state 871, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" + line 1128, "pan.___", state 872, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" + line 1128, "pan.___", state 872, "else" + line 1153, "pan.___", state 876, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" + line 272, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 931, "(1)" + line 284, "pan.___", state 938, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 954, "(1)" + line 253, "pan.___", state 962, "(1)" + line 257, "pan.___", state 974, "(1)" + line 261, "pan.___", state 982, "(1)" + line 276, "pan.___", state 1007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1020, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1029, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1045, "(1)" + line 253, "pan.___", state 1053, "(1)" + line 257, "pan.___", state 1065, "(1)" + line 261, "pan.___", state 1073, "(1)" + line 272, "pan.___", state 1089, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1091, "(1)" + line 276, "pan.___", state 1098, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1100, "(1)" + line 276, "pan.___", state 1101, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1101, "else" + line 274, "pan.___", state 1106, "((i<1))" + line 274, "pan.___", state 1106, "((i>=1))" + line 280, "pan.___", state 1111, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1113, "(1)" + line 280, "pan.___", state 1114, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1114, "else" + line 284, "pan.___", state 1120, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1122, "(1)" + line 284, "pan.___", state 1123, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1123, "else" + line 282, "pan.___", state 1128, "((i<2))" + line 282, "pan.___", state 1128, "((i>=2))" + line 249, "pan.___", state 1136, "(1)" + line 253, "pan.___", state 1144, "(1)" + line 253, "pan.___", state 1145, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1145, "else" + line 251, "pan.___", state 1150, "((i<1))" + line 251, "pan.___", state 1150, "((i>=1))" + line 257, "pan.___", state 1156, "(1)" + line 257, "pan.___", state 1157, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1157, "else" + line 261, "pan.___", state 1164, "(1)" + line 261, "pan.___", state 1165, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1165, "else" + line 266, "pan.___", state 1174, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1174, "else" + line 299, "pan.___", state 1176, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1176, "else" + line 276, "pan.___", state 1189, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1202, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1227, "(1)" + line 253, "pan.___", state 1235, "(1)" + line 257, "pan.___", state 1247, "(1)" + line 261, "pan.___", state 1255, "(1)" + line 1237, "pan.___", state 1270, "-end-" + (161 of 1270 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.49e+03 seconds +pan: rate 1556.4638 states/second +pan: avg transition delay 1.2468e-06 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..38db318 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input @@ -0,0 +1,1273 @@ +#define SINGLE_FLIP + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input.trail b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..fe03394 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1147 @@ +-2:3:-2 +-4:-4:-4 +1:0:4465 +2:3:4385 +3:3:4388 +4:3:4388 +5:3:4391 +6:3:4399 +7:3:4399 +8:3:4402 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+1109:2:3131 +1110:0:4465 +1111:2:3590 +1112:0:4465 +1113:2:4113 +1114:2:4114 +1115:2:4118 +1116:2:4122 +1117:2:4123 +1118:2:4127 +1119:2:4135 +1120:2:4136 +1121:2:4140 +1122:2:4144 +1123:2:4145 +1124:2:4140 +1125:2:4144 +1126:2:4145 +1127:2:4149 +1128:2:4156 +1129:2:4163 +1130:2:4164 +1131:2:4171 +1132:2:4176 +1133:2:4183 +1134:2:4184 +1135:2:4183 +1136:2:4184 +1137:2:4191 +1138:2:4195 +1139:0:4465 +1140:1:1291 +1141:1:1292 +1142:0:4463 +1143:1:11 +1144:0:4469 +1145:2:3684 diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress.ltl b/urcu-controldataflow-alpha-no-ipi/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.define b/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.log b/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.log new file mode 100644 index 0000000..f854122 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.log @@ -0,0 +1,512 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +depth 23: Claim reached state 9 (line 1300) +depth 1143: Claim reached state 9 (line 1299) +Depth= 6515 States= 1e+06 Transitions= 5.44e+08 Memory= 507.561 t= 715 R= 1e+03 +Depth= 6515 States= 2e+06 Transitions= 1.44e+09 Memory= 545.940 t= 1.93e+03 R= 1e+03 +Depth= 6515 States= 3e+06 Transitions= 2.29e+09 Memory= 584.416 t= 3.08e+03 R= 1e+03 +pan: resizing hashtable to -w22.. done +Depth= 6515 States= 4e+06 Transitions= 3.07e+09 Memory= 646.299 t= 4.13e+03 R= 1e+03 +Depth= 6515 States= 5e+06 Transitions= 3.84e+09 Memory= 681.065 t= 5.17e+03 R= 1e+03 +Depth= 6515 States= 6e+06 Transitions= 4.91e+09 Memory= 728.916 t= 6.63e+03 R= 9e+02 +Depth= 6515 States= 7e+06 Transitions= 5.88e+09 Memory= 767.393 t= 7.96e+03 R= 9e+02 +Depth= 6515 States= 8e+06 Transitions= 6.76e+09 Memory= 808.018 t= 9.16e+03 R= 9e+02 +Depth= 6515 States= 9e+06 Transitions= 7.69e+09 Memory= 846.885 t= 1.04e+04 R= 9e+02 +pan: resizing hashtable to -w24.. done +Depth= 6515 States= 1e+07 Transitions= 8.63e+09 Memory= 1015.705 t= 1.17e+04 R= 9e+02 +Depth= 6515 States= 1.1e+07 Transitions= 9.44e+09 Memory= 1054.572 t= 1.28e+04 R= 9e+02 +Depth= 6515 States= 1.2e+07 Transitions= 1.02e+10 Memory= 1095.490 t= 1.39e+04 R= 9e+02 +Depth= 6515 States= 1.3e+07 Transitions= 1.11e+10 Memory= 1129.182 t= 1.51e+04 R= 9e+02 +Depth= 6515 States= 1.4e+07 Transitions= 1.22e+10 Memory= 1173.518 t= 1.65e+04 R= 8e+02 +Depth= 6515 States= 1.5e+07 Transitions= 1.3e+10 Memory= 1207.893 t= 1.76e+04 R= 9e+02 +Depth= 6515 States= 1.6e+07 Transitions= 1.38e+10 Memory= 1234.065 t= 1.86e+04 R= 9e+02 +Depth= 6515 States= 1.7e+07 Transitions= 1.47e+10 Memory= 1277.424 t= 1.99e+04 R= 9e+02 +Depth= 6515 States= 1.8e+07 Transitions= 1.58e+10 Memory= 1325.568 t= 2.13e+04 R= 8e+02 +Depth= 6515 States= 1.9e+07 Transitions= 1.67e+10 Memory= 1366.486 t= 2.26e+04 R= 8e+02 +Depth= 6515 States= 2e+07 Transitions= 1.76e+10 Memory= 1405.940 t= 2.38e+04 R= 8e+02 +Depth= 6515 States= 2.1e+07 Transitions= 1.85e+10 Memory= 1450.080 t= 2.51e+04 R= 8e+02 +Depth= 6515 States= 2.2e+07 Transitions= 1.94e+10 Memory= 1491.291 t= 2.63e+04 R= 8e+02 +Depth= 6515 States= 2.3e+07 Transitions= 2.02e+10 Memory= 1530.744 t= 2.74e+04 R= 8e+02 +Depth= 6515 States= 2.4e+07 Transitions= 2.12e+10 Memory= 1565.217 t= 2.87e+04 R= 8e+02 +Depth= 6515 States= 2.5e+07 Transitions= 2.22e+10 Memory= 1608.479 t= 3e+04 R= 8e+02 +Depth= 6515 States= 2.6e+07 Transitions= 2.3e+10 Memory= 1634.651 t= 3.11e+04 R= 8e+02 +Depth= 6515 States= 2.7e+07 Transitions= 2.4e+10 Memory= 1685.725 t= 3.25e+04 R= 8e+02 +Depth= 6515 States= 2.8e+07 Transitions= 2.49e+10 Memory= 1724.885 t= 3.37e+04 R= 8e+02 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 6515, errors: 0 + 13561338 states, stored (2.88138e+07 visited) +2.5567499e+10 states, matched +2.5596313e+10 transitions (= visited+matched) +1.4615258e+11 atomic steps +hash conflicts: 8.6536644e+09 (resolved) + +Stats on memory usage (in Megabytes): + 1500.240 equivalent memory usage for states (stored*(State-vector + overhead)) + 1175.180 actual memory usage for states (compression: 78.33%) + state-vector as stored = 63 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1760.236 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 82, "(1)" + line 438, "pan.___", state 112, "(1)" + line 442, "pan.___", state 125, "(1)" + line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 218, "(1)" + line 438, "pan.___", state 248, "(1)" + line 442, "pan.___", state 261, "(1)" + line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 347, "(1)" + line 438, "pan.___", state 377, "(1)" + line 442, "pan.___", state 390, "(1)" + line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 415, "(1)" + line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 416, "else" + line 411, "pan.___", state 419, "(1)" + line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 429, "(1)" + line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 430, "else" + line 415, "pan.___", state 433, "(1)" + line 415, "pan.___", state 434, "(1)" + line 415, "pan.___", state 434, "(1)" + line 413, "pan.___", state 439, "((i<1))" + line 413, "pan.___", state 439, "((i>=1))" + line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 447, "(1)" + line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 448, "else" + line 420, "pan.___", state 451, "(1)" + line 420, "pan.___", state 452, "(1)" + line 420, "pan.___", state 452, "(1)" + line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 461, "(1)" + line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 462, "else" + line 424, "pan.___", state 465, "(1)" + line 424, "pan.___", state 466, "(1)" + line 424, "pan.___", state 466, "(1)" + line 422, "pan.___", state 471, "((i<2))" + line 422, "pan.___", state 471, "((i>=2))" + line 429, "pan.___", state 478, "(1)" + line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 479, "else" + line 429, "pan.___", state 482, "(1)" + line 429, "pan.___", state 483, "(1)" + line 429, "pan.___", state 483, "(1)" + line 433, "pan.___", state 491, "(1)" + line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 492, "else" + line 433, "pan.___", state 495, "(1)" + line 433, "pan.___", state 496, "(1)" + line 433, "pan.___", state 496, "(1)" + line 431, "pan.___", state 501, "((i<1))" + line 431, "pan.___", state 501, "((i>=1))" + line 438, "pan.___", state 508, "(1)" + line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 509, "else" + line 438, "pan.___", state 512, "(1)" + line 438, "pan.___", state 513, "(1)" + line 438, "pan.___", state 513, "(1)" + line 442, "pan.___", state 521, "(1)" + line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 522, "else" + line 442, "pan.___", state 525, "(1)" + line 442, "pan.___", state 526, "(1)" + line 442, "pan.___", state 526, "(1)" + line 440, "pan.___", state 531, "((i<2))" + line 440, "pan.___", state 531, "((i>=2))" + line 450, "pan.___", state 535, "(1)" + line 450, "pan.___", state 535, "(1)" + line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 540, "(1)" + line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 555, "(1)" + line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 591, "(1)" + line 253, "pan.___", state 599, "(1)" + line 257, "pan.___", state 611, "(1)" + line 261, "pan.___", state 619, "(1)" + line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 702, "(1)" + line 433, "pan.___", state 715, "(1)" + line 438, "pan.___", state 732, "(1)" + line 442, "pan.___", state 745, "(1)" + line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 838, "(1)" + line 438, "pan.___", state 868, "(1)" + line 442, "pan.___", state 881, "(1)" + line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 904, "(1)" + line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 905, "else" + line 411, "pan.___", state 908, "(1)" + line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 918, "(1)" + line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 919, "else" + line 415, "pan.___", state 922, "(1)" + line 415, "pan.___", state 923, "(1)" + line 415, "pan.___", state 923, "(1)" + line 413, "pan.___", state 928, "((i<1))" + line 413, "pan.___", state 928, "((i>=1))" + line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 936, "(1)" + line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 937, "else" + line 420, "pan.___", state 940, "(1)" + line 420, "pan.___", state 941, "(1)" + line 420, "pan.___", state 941, "(1)" + line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 950, "(1)" + line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 951, "else" + line 424, "pan.___", state 954, "(1)" + line 424, "pan.___", state 955, "(1)" + line 424, "pan.___", state 955, "(1)" + line 422, "pan.___", state 960, "((i<2))" + line 422, "pan.___", state 960, "((i>=2))" + line 429, "pan.___", state 967, "(1)" + line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 968, "else" + line 429, "pan.___", state 971, "(1)" + line 429, "pan.___", state 972, "(1)" + line 429, "pan.___", state 972, "(1)" + line 433, "pan.___", state 980, "(1)" + line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 981, "else" + line 433, "pan.___", state 984, "(1)" + line 433, "pan.___", state 985, "(1)" + line 433, "pan.___", state 985, "(1)" + line 431, "pan.___", state 990, "((i<1))" + line 431, "pan.___", state 990, "((i>=1))" + line 438, "pan.___", state 997, "(1)" + line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 998, "else" + line 438, "pan.___", state 1001, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 442, "pan.___", state 1010, "(1)" + line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 1011, "else" + line 442, "pan.___", state 1014, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 440, "pan.___", state 1020, "((i<2))" + line 440, "pan.___", state 1020, "((i>=2))" + line 450, "pan.___", state 1024, "(1)" + line 450, "pan.___", state 1024, "(1)" + line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1098, "(1)" + line 433, "pan.___", state 1111, "(1)" + line 438, "pan.___", state 1128, "(1)" + line 442, "pan.___", state 1141, "(1)" + line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1230, "(1)" + line 438, "pan.___", state 1260, "(1)" + line 442, "pan.___", state 1273, "(1)" + line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1363, "(1)" + line 438, "pan.___", state 1393, "(1)" + line 442, "pan.___", state 1406, "(1)" + line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1492, "(1)" + line 438, "pan.___", state 1522, "(1)" + line 442, "pan.___", state 1535, "(1)" + line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1605, "(1)" + line 253, "pan.___", state 1613, "(1)" + line 257, "pan.___", state 1625, "(1)" + line 261, "pan.___", state 1633, "(1)" + line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1716, "(1)" + line 433, "pan.___", state 1729, "(1)" + line 438, "pan.___", state 1746, "(1)" + line 442, "pan.___", state 1759, "(1)" + line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1845, "(1)" + line 433, "pan.___", state 1858, "(1)" + line 438, "pan.___", state 1875, "(1)" + line 442, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1977, "(1)" + line 438, "pan.___", state 2007, "(1)" + line 442, "pan.___", state 2020, "(1)" + line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2113, "(1)" + line 438, "pan.___", state 2143, "(1)" + line 442, "pan.___", state 2156, "(1)" + line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2242, "(1)" + line 438, "pan.___", state 2272, "(1)" + line 442, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2310, "(1)" + line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2311, "else" + line 411, "pan.___", state 2314, "(1)" + line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2324, "(1)" + line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2325, "else" + line 415, "pan.___", state 2328, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 413, "pan.___", state 2334, "((i<1))" + line 413, "pan.___", state 2334, "((i>=1))" + line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2342, "(1)" + line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2343, "else" + line 420, "pan.___", state 2346, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2356, "(1)" + line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2357, "else" + line 424, "pan.___", state 2360, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 422, "pan.___", state 2366, "((i<2))" + line 422, "pan.___", state 2366, "((i>=2))" + line 429, "pan.___", state 2373, "(1)" + line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 2374, "else" + line 429, "pan.___", state 2377, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 433, "pan.___", state 2386, "(1)" + line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 2387, "else" + line 433, "pan.___", state 2390, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 431, "pan.___", state 2396, "((i<1))" + line 431, "pan.___", state 2396, "((i>=1))" + line 438, "pan.___", state 2403, "(1)" + line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 2404, "else" + line 438, "pan.___", state 2407, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 442, "pan.___", state 2416, "(1)" + line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 2417, "else" + line 442, "pan.___", state 2420, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 440, "pan.___", state 2426, "((i<2))" + line 440, "pan.___", state 2426, "((i>=2))" + line 450, "pan.___", state 2430, "(1)" + line 450, "pan.___", state 2430, "(1)" + line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2435, "(1)" + line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2486, "(1)" + line 253, "pan.___", state 2494, "(1)" + line 257, "pan.___", state 2506, "(1)" + line 261, "pan.___", state 2514, "(1)" + line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2597, "(1)" + line 433, "pan.___", state 2610, "(1)" + line 438, "pan.___", state 2627, "(1)" + line 442, "pan.___", state 2640, "(1)" + line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2711, "(1)" + line 253, "pan.___", state 2719, "(1)" + line 257, "pan.___", state 2731, "(1)" + line 261, "pan.___", state 2739, "(1)" + line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2822, "(1)" + line 433, "pan.___", state 2835, "(1)" + line 438, "pan.___", state 2852, "(1)" + line 442, "pan.___", state 2865, "(1)" + line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2951, "(1)" + line 433, "pan.___", state 2964, "(1)" + line 438, "pan.___", state 2981, "(1)" + line 442, "pan.___", state 2994, "(1)" + line 249, "pan.___", state 3027, "(1)" + line 257, "pan.___", state 3047, "(1)" + line 261, "pan.___", state 3055, "(1)" + line 249, "pan.___", state 3070, "(1)" + line 253, "pan.___", state 3078, "(1)" + line 257, "pan.___", state 3090, "(1)" + line 261, "pan.___", state 3098, "(1)" + line 898, "pan.___", state 3115, "-end-" + (283 of 3115 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 429, "pan.___", state 83, "(1)" + line 433, "pan.___", state 96, "(1)" + line 438, "pan.___", state 113, "(1)" + line 272, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 276, "(1)" + line 433, "pan.___", state 289, "(1)" + line 438, "pan.___", state 306, "(1)" + line 442, "pan.___", state 319, "(1)" + line 415, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 420, "(1)" + line 438, "pan.___", state 437, "(1)" + line 442, "pan.___", state 450, "(1)" + line 415, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 559, "(1)" + line 438, "pan.___", state 576, "(1)" + line 442, "pan.___", state 589, "(1)" + line 415, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 688, "(1)" + line 438, "pan.___", state 705, "(1)" + line 442, "pan.___", state 718, "(1)" + line 415, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 819, "(1)" + line 438, "pan.___", state 836, "(1)" + line 442, "pan.___", state 849, "(1)" + line 272, "pan.___", state 899, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 908, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 921, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 946, "(1)" + line 253, "pan.___", state 954, "(1)" + line 257, "pan.___", state 966, "(1)" + line 261, "pan.___", state 974, "(1)" + line 272, "pan.___", state 994, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1003, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1018, "(1)" + line 284, "pan.___", state 1025, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1041, "(1)" + line 253, "pan.___", state 1049, "(1)" + line 257, "pan.___", state 1061, "(1)" + line 261, "pan.___", state 1069, "(1)" + line 276, "pan.___", state 1094, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1107, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1132, "(1)" + line 253, "pan.___", state 1140, "(1)" + line 257, "pan.___", state 1152, "(1)" + line 261, "pan.___", state 1160, "(1)" + line 276, "pan.___", state 1185, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1198, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1207, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1223, "(1)" + line 253, "pan.___", state 1231, "(1)" + line 257, "pan.___", state 1243, "(1)" + line 261, "pan.___", state 1251, "(1)" + line 276, "pan.___", state 1276, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1289, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1298, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1314, "(1)" + line 253, "pan.___", state 1322, "(1)" + line 257, "pan.___", state 1334, "(1)" + line 261, "pan.___", state 1342, "(1)" + line 1237, "pan.___", state 1357, "-end-" + (78 of 1357 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1302, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 3.47e+04 seconds +pan: rate 831.51243 states/second +pan: avg transition delay 1.3538e-06 usec +cp .input.spin urcu_progress_reader.spin.input +cp .input.spin.trail urcu_progress_reader.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.spin.input new file mode 100644 index 0000000..da34f03 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_reader.spin.input @@ -0,0 +1,1273 @@ +#define READER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.define b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.log b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.log new file mode 100644 index 0000000..9bc0ba8 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.log @@ -0,0 +1,505 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +depth 23: Claim reached state 9 (line 1300) +depth 1559: Claim reached state 9 (line 1299) +Depth= 4420 States= 1e+06 Transitions= 6.06e+08 Memory= 491.936 t= 782 R= 1e+03 +Depth= 4420 States= 2e+06 Transitions= 1.36e+09 Memory= 516.838 t= 1.76e+03 R= 1e+03 +Depth= 4477 States= 3e+06 Transitions= 1.91e+09 Memory= 542.424 t= 2.47e+03 R= 1e+03 +pan: resizing hashtable to -w22.. done +Depth= 4770 States= 4e+06 Transitions= 2.71e+09 Memory= 598.545 t= 3.51e+03 R= 1e+03 +Depth= 4829 States= 5e+06 Transitions= 3.25e+09 Memory= 623.838 t= 4.2e+03 R= 1e+03 +Depth= 5120 States= 6e+06 Transitions= 4.02e+09 Memory= 648.838 t= 5.19e+03 R= 1e+03 +Depth= 5188 States= 7e+06 Transitions= 4.89e+09 Memory= 693.662 t= 6.32e+03 R= 1e+03 +Depth= 5188 States= 8e+06 Transitions= 5.86e+09 Memory= 742.588 t= 7.58e+03 R= 1e+03 +Depth= 5188 States= 9e+06 Transitions= 6.88e+09 Memory= 781.651 t= 8.92e+03 R= 1e+03 +pan: resizing hashtable to -w24.. done +Depth= 5188 States= 1e+07 Transitions= 7.86e+09 Memory= 952.229 t= 1.02e+04 R= 1e+03 +Depth= 5188 States= 1.1e+07 Transitions= 8.82e+09 Memory= 991.096 t= 1.15e+04 R= 1e+03 +Depth= 5436 States= 1.2e+07 Transitions= 9.74e+09 Memory= 1031.037 t= 1.27e+04 R= 9e+02 +Depth= 5479 States= 1.3e+07 Transitions= 1.07e+10 Memory= 1074.006 t= 1.4e+04 R= 9e+02 +Depth= 5479 States= 1.4e+07 Transitions= 1.16e+10 Memory= 1117.658 t= 1.52e+04 R= 9e+02 +Depth= 5479 States= 1.5e+07 Transitions= 1.25e+10 Memory= 1160.529 t= 1.63e+04 R= 9e+02 +Depth= 5479 States= 1.6e+07 Transitions= 1.36e+10 Memory= 1208.772 t= 1.77e+04 R= 9e+02 +Depth= 5479 States= 1.7e+07 Transitions= 1.45e+10 Memory= 1253.401 t= 1.88e+04 R= 9e+02 +Depth= 5479 States= 1.8e+07 Transitions= 1.54e+10 Memory= 1278.986 t= 2.01e+04 R= 9e+02 +Depth= 5479 States= 1.9e+07 Transitions= 1.64e+10 Memory= 1333.186 t= 2.14e+04 R= 9e+02 +Depth= 5479 States= 2e+07 Transitions= 1.73e+10 Memory= 1370.979 t= 2.26e+04 R= 9e+02 +Depth= 5479 States= 2.1e+07 Transitions= 1.83e+10 Memory= 1415.998 t= 2.39e+04 R= 9e+02 +Depth= 5479 States= 2.2e+07 Transitions= 1.92e+10 Memory= 1455.940 t= 2.51e+04 R= 9e+02 +Depth= 5479 States= 2.3e+07 Transitions= 2.02e+10 Memory= 1499.397 t= 2.63e+04 R= 9e+02 +Depth= 5479 States= 2.4e+07 Transitions= 2.1e+10 Memory= 1542.951 t= 2.75e+04 R= 9e+02 +Depth= 5588 States= 2.5e+07 Transitions= 2.21e+10 Memory= 1589.533 t= 2.89e+04 R= 9e+02 +Depth= 5588 States= 2.6e+07 Transitions= 2.31e+10 Memory= 1630.647 t= 3.02e+04 R= 9e+02 +Depth= 5588 States= 2.7e+07 Transitions= 2.4e+10 Memory= 1669.123 t= 3.14e+04 R= 9e+02 +Depth= 5588 States= 2.8e+07 Transitions= 2.5e+10 Memory= 1714.533 t= 3.27e+04 R= 9e+02 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 5588, errors: 0 + 13563866 states, stored (2.88596e+07 visited) +2.5765769e+10 states, matched +2.5794629e+10 transitions (= visited+matched) +1.4717516e+11 atomic steps +hash conflicts: 6.8547236e+09 (resolved) + +Stats on memory usage (in Megabytes): + 1500.519 equivalent memory usage for states (stored*(State-vector + overhead)) + 1175.436 actual memory usage for states (compression: 78.34%) + state-vector as stored = 63 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1760.432 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 82, "(1)" + line 438, "pan.___", state 112, "(1)" + line 442, "pan.___", state 125, "(1)" + line 597, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 218, "(1)" + line 438, "pan.___", state 248, "(1)" + line 442, "pan.___", state 261, "(1)" + line 411, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 347, "(1)" + line 438, "pan.___", state 377, "(1)" + line 442, "pan.___", state 390, "(1)" + line 411, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 415, "(1)" + line 411, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 416, "else" + line 411, "pan.___", state 419, "(1)" + line 415, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 429, "(1)" + line 415, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 430, "else" + line 415, "pan.___", state 433, "(1)" + line 415, "pan.___", state 434, "(1)" + line 415, "pan.___", state 434, "(1)" + line 413, "pan.___", state 439, "((i<1))" + line 413, "pan.___", state 439, "((i>=1))" + line 420, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 447, "(1)" + line 420, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 448, "else" + line 420, "pan.___", state 451, "(1)" + line 420, "pan.___", state 452, "(1)" + line 420, "pan.___", state 452, "(1)" + line 424, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 461, "(1)" + line 424, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 462, "else" + line 424, "pan.___", state 465, "(1)" + line 424, "pan.___", state 466, "(1)" + line 424, "pan.___", state 466, "(1)" + line 422, "pan.___", state 471, "((i<2))" + line 422, "pan.___", state 471, "((i>=2))" + line 429, "pan.___", state 478, "(1)" + line 429, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 479, "else" + line 429, "pan.___", state 482, "(1)" + line 429, "pan.___", state 483, "(1)" + line 429, "pan.___", state 483, "(1)" + line 433, "pan.___", state 491, "(1)" + line 433, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 492, "else" + line 433, "pan.___", state 495, "(1)" + line 433, "pan.___", state 496, "(1)" + line 433, "pan.___", state 496, "(1)" + line 431, "pan.___", state 501, "((i<1))" + line 431, "pan.___", state 501, "((i>=1))" + line 438, "pan.___", state 508, "(1)" + line 438, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 509, "else" + line 438, "pan.___", state 512, "(1)" + line 438, "pan.___", state 513, "(1)" + line 438, "pan.___", state 513, "(1)" + line 442, "pan.___", state 521, "(1)" + line 442, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 522, "else" + line 442, "pan.___", state 525, "(1)" + line 442, "pan.___", state 526, "(1)" + line 442, "pan.___", state 526, "(1)" + line 440, "pan.___", state 531, "((i<2))" + line 440, "pan.___", state 531, "((i>=2))" + line 450, "pan.___", state 535, "(1)" + line 450, "pan.___", state 535, "(1)" + line 597, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 540, "(1)" + line 272, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 555, "(1)" + line 280, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 591, "(1)" + line 253, "pan.___", state 599, "(1)" + line 257, "pan.___", state 611, "(1)" + line 261, "pan.___", state 619, "(1)" + line 411, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 702, "(1)" + line 433, "pan.___", state 715, "(1)" + line 438, "pan.___", state 732, "(1)" + line 442, "pan.___", state 745, "(1)" + line 411, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 838, "(1)" + line 438, "pan.___", state 868, "(1)" + line 442, "pan.___", state 881, "(1)" + line 411, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 904, "(1)" + line 411, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 905, "else" + line 411, "pan.___", state 908, "(1)" + line 415, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 918, "(1)" + line 415, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 919, "else" + line 415, "pan.___", state 922, "(1)" + line 415, "pan.___", state 923, "(1)" + line 415, "pan.___", state 923, "(1)" + line 413, "pan.___", state 928, "((i<1))" + line 413, "pan.___", state 928, "((i>=1))" + line 420, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 936, "(1)" + line 420, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 937, "else" + line 420, "pan.___", state 940, "(1)" + line 420, "pan.___", state 941, "(1)" + line 420, "pan.___", state 941, "(1)" + line 424, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 950, "(1)" + line 424, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 951, "else" + line 424, "pan.___", state 954, "(1)" + line 424, "pan.___", state 955, "(1)" + line 424, "pan.___", state 955, "(1)" + line 422, "pan.___", state 960, "((i<2))" + line 422, "pan.___", state 960, "((i>=2))" + line 429, "pan.___", state 967, "(1)" + line 429, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 968, "else" + line 429, "pan.___", state 971, "(1)" + line 429, "pan.___", state 972, "(1)" + line 429, "pan.___", state 972, "(1)" + line 433, "pan.___", state 980, "(1)" + line 433, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 981, "else" + line 433, "pan.___", state 984, "(1)" + line 433, "pan.___", state 985, "(1)" + line 433, "pan.___", state 985, "(1)" + line 431, "pan.___", state 990, "((i<1))" + line 431, "pan.___", state 990, "((i>=1))" + line 438, "pan.___", state 997, "(1)" + line 438, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 998, "else" + line 438, "pan.___", state 1001, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 438, "pan.___", state 1002, "(1)" + line 442, "pan.___", state 1010, "(1)" + line 442, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 1011, "else" + line 442, "pan.___", state 1014, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 442, "pan.___", state 1015, "(1)" + line 440, "pan.___", state 1020, "((i<2))" + line 440, "pan.___", state 1020, "((i>=2))" + line 450, "pan.___", state 1024, "(1)" + line 450, "pan.___", state 1024, "(1)" + line 605, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1098, "(1)" + line 433, "pan.___", state 1111, "(1)" + line 438, "pan.___", state 1128, "(1)" + line 442, "pan.___", state 1141, "(1)" + line 411, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1230, "(1)" + line 438, "pan.___", state 1260, "(1)" + line 442, "pan.___", state 1273, "(1)" + line 411, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1363, "(1)" + line 438, "pan.___", state 1393, "(1)" + line 442, "pan.___", state 1406, "(1)" + line 411, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1492, "(1)" + line 438, "pan.___", state 1522, "(1)" + line 442, "pan.___", state 1535, "(1)" + line 272, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1605, "(1)" + line 253, "pan.___", state 1613, "(1)" + line 257, "pan.___", state 1625, "(1)" + line 261, "pan.___", state 1633, "(1)" + line 411, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1716, "(1)" + line 433, "pan.___", state 1729, "(1)" + line 438, "pan.___", state 1746, "(1)" + line 442, "pan.___", state 1759, "(1)" + line 411, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1845, "(1)" + line 433, "pan.___", state 1858, "(1)" + line 438, "pan.___", state 1875, "(1)" + line 442, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 1977, "(1)" + line 438, "pan.___", state 2007, "(1)" + line 442, "pan.___", state 2020, "(1)" + line 644, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2113, "(1)" + line 438, "pan.___", state 2143, "(1)" + line 442, "pan.___", state 2156, "(1)" + line 411, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2242, "(1)" + line 438, "pan.___", state 2272, "(1)" + line 442, "pan.___", state 2285, "(1)" + line 411, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2310, "(1)" + line 411, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2311, "else" + line 411, "pan.___", state 2314, "(1)" + line 415, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2324, "(1)" + line 415, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2325, "else" + line 415, "pan.___", state 2328, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 415, "pan.___", state 2329, "(1)" + line 413, "pan.___", state 2334, "((i<1))" + line 413, "pan.___", state 2334, "((i>=1))" + line 420, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2342, "(1)" + line 420, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2343, "else" + line 420, "pan.___", state 2346, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 420, "pan.___", state 2347, "(1)" + line 424, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2356, "(1)" + line 424, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2357, "else" + line 424, "pan.___", state 2360, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 424, "pan.___", state 2361, "(1)" + line 422, "pan.___", state 2366, "((i<2))" + line 422, "pan.___", state 2366, "((i>=2))" + line 429, "pan.___", state 2373, "(1)" + line 429, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 429, "pan.___", state 2374, "else" + line 429, "pan.___", state 2377, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 429, "pan.___", state 2378, "(1)" + line 433, "pan.___", state 2386, "(1)" + line 433, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 433, "pan.___", state 2387, "else" + line 433, "pan.___", state 2390, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 433, "pan.___", state 2391, "(1)" + line 431, "pan.___", state 2396, "((i<1))" + line 431, "pan.___", state 2396, "((i>=1))" + line 438, "pan.___", state 2403, "(1)" + line 438, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 438, "pan.___", state 2404, "else" + line 438, "pan.___", state 2407, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 438, "pan.___", state 2408, "(1)" + line 442, "pan.___", state 2416, "(1)" + line 442, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 442, "pan.___", state 2417, "else" + line 442, "pan.___", state 2420, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 442, "pan.___", state 2421, "(1)" + line 440, "pan.___", state 2426, "((i<2))" + line 440, "pan.___", state 2426, "((i>=2))" + line 450, "pan.___", state 2430, "(1)" + line 450, "pan.___", state 2430, "(1)" + line 644, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2435, "(1)" + line 272, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2486, "(1)" + line 253, "pan.___", state 2494, "(1)" + line 257, "pan.___", state 2506, "(1)" + line 261, "pan.___", state 2514, "(1)" + line 411, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2597, "(1)" + line 433, "pan.___", state 2610, "(1)" + line 438, "pan.___", state 2627, "(1)" + line 442, "pan.___", state 2640, "(1)" + line 272, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2711, "(1)" + line 253, "pan.___", state 2719, "(1)" + line 257, "pan.___", state 2731, "(1)" + line 261, "pan.___", state 2739, "(1)" + line 411, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2822, "(1)" + line 433, "pan.___", state 2835, "(1)" + line 438, "pan.___", state 2852, "(1)" + line 442, "pan.___", state 2865, "(1)" + line 411, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 2951, "(1)" + line 433, "pan.___", state 2964, "(1)" + line 438, "pan.___", state 2981, "(1)" + line 442, "pan.___", state 2994, "(1)" + line 249, "pan.___", state 3027, "(1)" + line 257, "pan.___", state 3047, "(1)" + line 261, "pan.___", state 3055, "(1)" + line 249, "pan.___", state 3070, "(1)" + line 253, "pan.___", state 3078, "(1)" + line 257, "pan.___", state 3090, "(1)" + line 261, "pan.___", state 3098, "(1)" + line 898, "pan.___", state 3115, "-end-" + (283 of 3115 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 429, "pan.___", state 83, "(1)" + line 433, "pan.___", state 96, "(1)" + line 438, "pan.___", state 113, "(1)" + line 272, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 429, "pan.___", state 276, "(1)" + line 433, "pan.___", state 289, "(1)" + line 438, "pan.___", state 306, "(1)" + line 442, "pan.___", state 319, "(1)" + line 415, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 420, "(1)" + line 438, "pan.___", state 437, "(1)" + line 442, "pan.___", state 450, "(1)" + line 415, "pan.___", state 495, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 513, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 559, "(1)" + line 438, "pan.___", state 576, "(1)" + line 442, "pan.___", state 589, "(1)" + line 415, "pan.___", state 624, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 642, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 656, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 688, "(1)" + line 438, "pan.___", state 705, "(1)" + line 442, "pan.___", state 718, "(1)" + line 415, "pan.___", state 755, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 773, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 787, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 433, "pan.___", state 819, "(1)" + line 438, "pan.___", state 836, "(1)" + line 442, "pan.___", state 849, "(1)" + line 272, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 928, "(1)" + line 284, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 951, "(1)" + line 253, "pan.___", state 959, "(1)" + line 257, "pan.___", state 971, "(1)" + line 261, "pan.___", state 979, "(1)" + line 276, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1042, "(1)" + line 253, "pan.___", state 1050, "(1)" + line 257, "pan.___", state 1062, "(1)" + line 261, "pan.___", state 1070, "(1)" + line 276, "pan.___", state 1095, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1108, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1117, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1133, "(1)" + line 253, "pan.___", state 1141, "(1)" + line 257, "pan.___", state 1153, "(1)" + line 261, "pan.___", state 1161, "(1)" + line 276, "pan.___", state 1186, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1199, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1208, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1224, "(1)" + line 253, "pan.___", state 1232, "(1)" + line 257, "pan.___", state 1244, "(1)" + line 261, "pan.___", state 1252, "(1)" + line 1237, "pan.___", state 1267, "-end-" + (71 of 1267 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1302, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 3.38e+04 seconds +pan: rate 854.75351 states/second +pan: avg transition delay 1.3089e-06 usec +cp .input.spin urcu_progress_writer.spin.input +cp .input.spin.trail urcu_progress_writer.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.spin.input new file mode 100644 index 0000000..051f2f3 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer.spin.input @@ -0,0 +1,1273 @@ +#define WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.define b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.log b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.log new file mode 100644 index 0000000..0912929 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.log @@ -0,0 +1,757 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1296) +depth 23: Claim reached state 9 (line 1301) +depth 1559: Claim reached state 9 (line 1300) +pan: acceptance cycle (at depth 6380) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 7421, errors: 1 + 55319 states, stored (173044 visited) + 69543507 states, matched + 69716551 transitions (= visited+matched) +3.7666148e+08 atomic steps +hash conflicts: 1148679 (resolved) + +Stats on memory usage (in Megabytes): + 6.120 equivalent memory usage for states (stored*(State-vector + overhead)) + 5.332 actual memory usage for states (compression: 87.12%) + state-vector as stored = 73 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 471.037 total actual memory usage + +unreached in proctype urcu_reader + line 412, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 82, "(1)" + line 439, "pan.___", state 112, "(1)" + line 443, "pan.___", state 125, "(1)" + line 598, "pan.___", state 146, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 412, "pan.___", state 153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 185, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 199, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 218, "(1)" + line 439, "pan.___", state 248, "(1)" + line 443, "pan.___", state 261, "(1)" + line 412, "pan.___", state 282, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 314, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 328, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 347, "(1)" + line 439, "pan.___", state 377, "(1)" + line 443, "pan.___", state 390, "(1)" + line 412, "pan.___", state 413, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 415, "(1)" + line 412, "pan.___", state 416, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 416, "else" + line 412, "pan.___", state 419, "(1)" + line 416, "pan.___", state 427, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 429, "(1)" + line 416, "pan.___", state 430, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 430, "else" + line 416, "pan.___", state 433, "(1)" + line 416, "pan.___", state 434, "(1)" + line 416, "pan.___", state 434, "(1)" + line 414, "pan.___", state 439, "((i<1))" + line 414, "pan.___", state 439, "((i>=1))" + line 421, "pan.___", state 445, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 447, "(1)" + line 421, "pan.___", state 448, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 448, "else" + line 421, "pan.___", state 451, "(1)" + line 421, "pan.___", state 452, "(1)" + line 421, "pan.___", state 452, "(1)" + line 425, "pan.___", state 459, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 461, "(1)" + line 425, "pan.___", state 462, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 462, "else" + line 425, "pan.___", state 465, "(1)" + line 425, "pan.___", state 466, "(1)" + line 425, "pan.___", state 466, "(1)" + line 423, "pan.___", state 471, "((i<2))" + line 423, "pan.___", state 471, "((i>=2))" + line 430, "pan.___", state 478, "(1)" + line 430, "pan.___", state 479, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 479, "else" + line 430, "pan.___", state 482, "(1)" + line 430, "pan.___", state 483, "(1)" + line 430, "pan.___", state 483, "(1)" + line 434, "pan.___", state 491, "(1)" + line 434, "pan.___", state 492, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 492, "else" + line 434, "pan.___", state 495, "(1)" + line 434, "pan.___", state 496, "(1)" + line 434, "pan.___", state 496, "(1)" + line 432, "pan.___", state 501, "((i<1))" + line 432, "pan.___", state 501, "((i>=1))" + line 439, "pan.___", state 508, "(1)" + line 439, "pan.___", state 509, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 509, "else" + line 439, "pan.___", state 512, "(1)" + line 439, "pan.___", state 513, "(1)" + line 439, "pan.___", state 513, "(1)" + line 443, "pan.___", state 521, "(1)" + line 443, "pan.___", state 522, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 522, "else" + line 443, "pan.___", state 525, "(1)" + line 443, "pan.___", state 526, "(1)" + line 443, "pan.___", state 526, "(1)" + line 441, "pan.___", state 531, "((i<2))" + line 441, "pan.___", state 531, "((i>=2))" + line 451, "pan.___", state 535, "(1)" + line 451, "pan.___", state 535, "(1)" + line 598, "pan.___", state 538, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 598, "pan.___", state 539, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 598, "pan.___", state 540, "(1)" + line 273, "pan.___", state 544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 555, "(1)" + line 281, "pan.___", state 566, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 575, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 591, "(1)" + line 254, "pan.___", state 599, "(1)" + line 258, "pan.___", state 611, "(1)" + line 262, "pan.___", state 619, "(1)" + line 412, "pan.___", state 637, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 651, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 669, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 683, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 702, "(1)" + line 434, "pan.___", state 715, "(1)" + line 439, "pan.___", state 732, "(1)" + line 443, "pan.___", state 745, "(1)" + line 412, "pan.___", state 773, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 805, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 819, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 838, "(1)" + line 439, "pan.___", state 868, "(1)" + line 443, "pan.___", state 881, "(1)" + line 412, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 904, "(1)" + line 412, "pan.___", state 905, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 905, "else" + line 412, "pan.___", state 908, "(1)" + line 416, "pan.___", state 916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 918, "(1)" + line 416, "pan.___", state 919, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 919, "else" + line 416, "pan.___", state 922, "(1)" + line 416, "pan.___", state 923, "(1)" + line 416, "pan.___", state 923, "(1)" + line 414, "pan.___", state 928, "((i<1))" + line 414, "pan.___", state 928, "((i>=1))" + line 421, "pan.___", state 934, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 936, "(1)" + line 421, "pan.___", state 937, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 937, "else" + line 421, "pan.___", state 940, "(1)" + line 421, "pan.___", state 941, "(1)" + line 421, "pan.___", state 941, "(1)" + line 425, "pan.___", state 948, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 950, "(1)" + line 425, "pan.___", state 951, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 951, "else" + line 425, "pan.___", state 954, "(1)" + line 425, "pan.___", state 955, "(1)" + line 425, "pan.___", state 955, "(1)" + line 423, "pan.___", state 960, "((i<2))" + line 423, "pan.___", state 960, "((i>=2))" + line 430, "pan.___", state 967, "(1)" + line 430, "pan.___", state 968, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 968, "else" + line 430, "pan.___", state 971, "(1)" + line 430, "pan.___", state 972, "(1)" + line 430, "pan.___", state 972, "(1)" + line 434, "pan.___", state 980, "(1)" + line 434, "pan.___", state 981, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 981, "else" + line 434, "pan.___", state 984, "(1)" + line 434, "pan.___", state 985, "(1)" + line 434, "pan.___", state 985, "(1)" + line 432, "pan.___", state 990, "((i<1))" + line 432, "pan.___", state 990, "((i>=1))" + line 439, "pan.___", state 997, "(1)" + line 439, "pan.___", state 998, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 998, "else" + line 439, "pan.___", state 1001, "(1)" + line 439, "pan.___", state 1002, "(1)" + line 439, "pan.___", state 1002, "(1)" + line 443, "pan.___", state 1010, "(1)" + line 443, "pan.___", state 1011, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 1011, "else" + line 443, "pan.___", state 1014, "(1)" + line 443, "pan.___", state 1015, "(1)" + line 443, "pan.___", state 1015, "(1)" + line 441, "pan.___", state 1020, "((i<2))" + line 441, "pan.___", state 1020, "((i>=2))" + line 451, "pan.___", state 1024, "(1)" + line 451, "pan.___", state 1024, "(1)" + line 606, "pan.___", state 1028, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 412, "pan.___", state 1033, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 1047, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1065, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1079, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1098, "(1)" + line 434, "pan.___", state 1111, "(1)" + line 439, "pan.___", state 1128, "(1)" + line 443, "pan.___", state 1141, "(1)" + line 412, "pan.___", state 1165, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1197, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1211, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1230, "(1)" + line 439, "pan.___", state 1260, "(1)" + line 443, "pan.___", state 1273, "(1)" + line 412, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1363, "(1)" + line 439, "pan.___", state 1393, "(1)" + line 443, "pan.___", state 1406, "(1)" + line 412, "pan.___", state 1427, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1492, "(1)" + line 439, "pan.___", state 1522, "(1)" + line 443, "pan.___", state 1535, "(1)" + line 273, "pan.___", state 1558, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 1580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 1589, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1605, "(1)" + line 254, "pan.___", state 1613, "(1)" + line 258, "pan.___", state 1625, "(1)" + line 262, "pan.___", state 1633, "(1)" + line 412, "pan.___", state 1651, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 1665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1716, "(1)" + line 434, "pan.___", state 1729, "(1)" + line 439, "pan.___", state 1746, "(1)" + line 443, "pan.___", state 1759, "(1)" + line 412, "pan.___", state 1780, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 1794, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1812, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1826, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1845, "(1)" + line 434, "pan.___", state 1858, "(1)" + line 439, "pan.___", state 1875, "(1)" + line 443, "pan.___", state 1888, "(1)" + line 412, "pan.___", state 1912, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1944, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1958, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1977, "(1)" + line 439, "pan.___", state 2007, "(1)" + line 443, "pan.___", state 2020, "(1)" + line 645, "pan.___", state 2041, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 412, "pan.___", state 2048, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2080, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2094, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 2113, "(1)" + line 439, "pan.___", state 2143, "(1)" + line 443, "pan.___", state 2156, "(1)" + line 412, "pan.___", state 2177, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2209, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 2242, "(1)" + line 439, "pan.___", state 2272, "(1)" + line 443, "pan.___", state 2285, "(1)" + line 412, "pan.___", state 2308, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 2310, "(1)" + line 412, "pan.___", state 2311, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 2311, "else" + line 412, "pan.___", state 2314, "(1)" + line 416, "pan.___", state 2322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2324, "(1)" + line 416, "pan.___", state 2325, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 2325, "else" + line 416, "pan.___", state 2328, "(1)" + line 416, "pan.___", state 2329, "(1)" + line 416, "pan.___", state 2329, "(1)" + line 414, "pan.___", state 2334, "((i<1))" + line 414, "pan.___", state 2334, "((i>=1))" + line 421, "pan.___", state 2340, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2342, "(1)" + line 421, "pan.___", state 2343, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 2343, "else" + line 421, "pan.___", state 2346, "(1)" + line 421, "pan.___", state 2347, "(1)" + line 421, "pan.___", state 2347, "(1)" + line 425, "pan.___", state 2354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2356, "(1)" + line 425, "pan.___", state 2357, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 2357, "else" + line 425, "pan.___", state 2360, "(1)" + line 425, "pan.___", state 2361, "(1)" + line 425, "pan.___", state 2361, "(1)" + line 423, "pan.___", state 2366, "((i<2))" + line 423, "pan.___", state 2366, "((i>=2))" + line 430, "pan.___", state 2373, "(1)" + line 430, "pan.___", state 2374, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 2374, "else" + line 430, "pan.___", state 2377, "(1)" + line 430, "pan.___", state 2378, "(1)" + line 430, "pan.___", state 2378, "(1)" + line 434, "pan.___", state 2386, "(1)" + line 434, "pan.___", state 2387, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 2387, "else" + line 434, "pan.___", state 2390, "(1)" + line 434, "pan.___", state 2391, "(1)" + line 434, "pan.___", state 2391, "(1)" + line 432, "pan.___", state 2396, "((i<1))" + line 432, "pan.___", state 2396, "((i>=1))" + line 439, "pan.___", state 2403, "(1)" + line 439, "pan.___", state 2404, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 2404, "else" + line 439, "pan.___", state 2407, "(1)" + line 439, "pan.___", state 2408, "(1)" + line 439, "pan.___", state 2408, "(1)" + line 443, "pan.___", state 2416, "(1)" + line 443, "pan.___", state 2417, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 2417, "else" + line 443, "pan.___", state 2420, "(1)" + line 443, "pan.___", state 2421, "(1)" + line 443, "pan.___", state 2421, "(1)" + line 441, "pan.___", state 2426, "((i<2))" + line 441, "pan.___", state 2426, "((i>=2))" + line 451, "pan.___", state 2430, "(1)" + line 451, "pan.___", state 2430, "(1)" + line 645, "pan.___", state 2433, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 645, "pan.___", state 2434, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 645, "pan.___", state 2435, "(1)" + line 273, "pan.___", state 2439, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 2461, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 2470, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 2486, "(1)" + line 254, "pan.___", state 2494, "(1)" + line 258, "pan.___", state 2506, "(1)" + line 262, "pan.___", state 2514, "(1)" + line 412, "pan.___", state 2532, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2546, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2564, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2578, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 2597, "(1)" + line 434, "pan.___", state 2610, "(1)" + line 439, "pan.___", state 2627, "(1)" + line 443, "pan.___", state 2640, "(1)" + line 273, "pan.___", state 2664, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 2673, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 2686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 2695, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 2711, "(1)" + line 254, "pan.___", state 2719, "(1)" + line 258, "pan.___", state 2731, "(1)" + line 262, "pan.___", state 2739, "(1)" + line 412, "pan.___", state 2757, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 2822, "(1)" + line 434, "pan.___", state 2835, "(1)" + line 439, "pan.___", state 2852, "(1)" + line 443, "pan.___", state 2865, "(1)" + line 412, "pan.___", state 2886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2918, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2932, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 2951, "(1)" + line 434, "pan.___", state 2964, "(1)" + line 439, "pan.___", state 2981, "(1)" + line 443, "pan.___", state 2994, "(1)" + line 250, "pan.___", state 3027, "(1)" + line 258, "pan.___", state 3047, "(1)" + line 262, "pan.___", state 3055, "(1)" + line 250, "pan.___", state 3070, "(1)" + line 254, "pan.___", state 3078, "(1)" + line 258, "pan.___", state 3090, "(1)" + line 262, "pan.___", state 3098, "(1)" + line 899, "pan.___", state 3115, "-end-" + (283 of 3115 states) +unreached in proctype urcu_writer + line 412, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 24, "(1)" + line 416, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 38, "(1)" + line 416, "pan.___", state 39, "(1)" + line 416, "pan.___", state 39, "(1)" + line 414, "pan.___", state 44, "((i<1))" + line 414, "pan.___", state 44, "((i>=1))" + line 421, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 56, "(1)" + line 421, "pan.___", state 57, "(1)" + line 421, "pan.___", state 57, "(1)" + line 425, "pan.___", state 64, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 70, "(1)" + line 425, "pan.___", state 71, "(1)" + line 425, "pan.___", state 71, "(1)" + line 423, "pan.___", state 76, "((i<2))" + line 423, "pan.___", state 76, "((i>=2))" + line 430, "pan.___", state 83, "(1)" + line 430, "pan.___", state 84, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 84, "else" + line 430, "pan.___", state 87, "(1)" + line 430, "pan.___", state 88, "(1)" + line 430, "pan.___", state 88, "(1)" + line 434, "pan.___", state 96, "(1)" + line 434, "pan.___", state 97, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 97, "else" + line 434, "pan.___", state 100, "(1)" + line 434, "pan.___", state 101, "(1)" + line 434, "pan.___", state 101, "(1)" + line 432, "pan.___", state 106, "((i<1))" + line 432, "pan.___", state 106, "((i>=1))" + line 439, "pan.___", state 113, "(1)" + line 439, "pan.___", state 114, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 114, "else" + line 439, "pan.___", state 117, "(1)" + line 439, "pan.___", state 118, "(1)" + line 439, "pan.___", state 118, "(1)" + line 443, "pan.___", state 126, "(1)" + line 443, "pan.___", state 127, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 127, "else" + line 443, "pan.___", state 130, "(1)" + line 443, "pan.___", state 131, "(1)" + line 443, "pan.___", state 131, "(1)" + line 441, "pan.___", state 136, "((i<2))" + line 441, "pan.___", state 136, "((i>=2))" + line 451, "pan.___", state 140, "(1)" + line 451, "pan.___", state 140, "(1)" + line 273, "pan.___", state 149, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 158, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 166, "((i<1))" + line 275, "pan.___", state 166, "((i>=1))" + line 281, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 1022, "pan.___", state 199, "old_data = cached_rcu_ptr.val[_pid]" + line 412, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 217, "(1)" + line 416, "pan.___", state 225, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 231, "(1)" + line 416, "pan.___", state 232, "(1)" + line 416, "pan.___", state 232, "(1)" + line 414, "pan.___", state 237, "((i<1))" + line 414, "pan.___", state 237, "((i>=1))" + line 421, "pan.___", state 243, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 249, "(1)" + line 421, "pan.___", state 250, "(1)" + line 421, "pan.___", state 250, "(1)" + line 425, "pan.___", state 257, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 263, "(1)" + line 425, "pan.___", state 264, "(1)" + line 425, "pan.___", state 264, "(1)" + line 423, "pan.___", state 269, "((i<2))" + line 423, "pan.___", state 269, "((i>=2))" + line 430, "pan.___", state 276, "(1)" + line 430, "pan.___", state 277, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 277, "else" + line 430, "pan.___", state 280, "(1)" + line 430, "pan.___", state 281, "(1)" + line 430, "pan.___", state 281, "(1)" + line 434, "pan.___", state 289, "(1)" + line 434, "pan.___", state 290, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 290, "else" + line 434, "pan.___", state 293, "(1)" + line 434, "pan.___", state 294, "(1)" + line 434, "pan.___", state 294, "(1)" + line 432, "pan.___", state 299, "((i<1))" + line 432, "pan.___", state 299, "((i>=1))" + line 439, "pan.___", state 306, "(1)" + line 439, "pan.___", state 307, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 307, "else" + line 439, "pan.___", state 310, "(1)" + line 439, "pan.___", state 311, "(1)" + line 439, "pan.___", state 311, "(1)" + line 443, "pan.___", state 319, "(1)" + line 443, "pan.___", state 320, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 320, "else" + line 443, "pan.___", state 323, "(1)" + line 443, "pan.___", state 324, "(1)" + line 443, "pan.___", state 324, "(1)" + line 441, "pan.___", state 329, "((i<2))" + line 441, "pan.___", state 329, "((i>=2))" + line 451, "pan.___", state 333, "(1)" + line 451, "pan.___", state 333, "(1)" + line 412, "pan.___", state 344, "(1)" + line 412, "pan.___", state 345, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 345, "else" + line 412, "pan.___", state 348, "(1)" + line 416, "pan.___", state 356, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 362, "(1)" + line 416, "pan.___", state 363, "(1)" + line 416, "pan.___", state 363, "(1)" + line 414, "pan.___", state 368, "((i<1))" + line 414, "pan.___", state 368, "((i>=1))" + line 421, "pan.___", state 374, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 380, "(1)" + line 421, "pan.___", state 381, "(1)" + line 421, "pan.___", state 381, "(1)" + line 425, "pan.___", state 388, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 394, "(1)" + line 425, "pan.___", state 395, "(1)" + line 425, "pan.___", state 395, "(1)" + line 423, "pan.___", state 400, "((i<2))" + line 423, "pan.___", state 400, "((i>=2))" + line 430, "pan.___", state 407, "(1)" + line 430, "pan.___", state 408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 408, "else" + line 430, "pan.___", state 411, "(1)" + line 430, "pan.___", state 412, "(1)" + line 430, "pan.___", state 412, "(1)" + line 434, "pan.___", state 420, "(1)" + line 434, "pan.___", state 421, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 421, "else" + line 434, "pan.___", state 424, "(1)" + line 434, "pan.___", state 425, "(1)" + line 434, "pan.___", state 425, "(1)" + line 432, "pan.___", state 430, "((i<1))" + line 432, "pan.___", state 430, "((i>=1))" + line 439, "pan.___", state 437, "(1)" + line 439, "pan.___", state 438, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 438, "else" + line 439, "pan.___", state 441, "(1)" + line 439, "pan.___", state 442, "(1)" + line 439, "pan.___", state 442, "(1)" + line 443, "pan.___", state 450, "(1)" + line 443, "pan.___", state 451, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 451, "else" + line 443, "pan.___", state 454, "(1)" + line 443, "pan.___", state 455, "(1)" + line 443, "pan.___", state 455, "(1)" + line 441, "pan.___", state 460, "((i<2))" + line 441, "pan.___", state 460, "((i>=2))" + line 451, "pan.___", state 464, "(1)" + line 451, "pan.___", state 464, "(1)" + line 412, "pan.___", state 477, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 479, "(1)" + line 412, "pan.___", state 480, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 480, "else" + line 412, "pan.___", state 483, "(1)" + line 416, "pan.___", state 491, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 493, "(1)" + line 416, "pan.___", state 494, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 494, "else" + line 416, "pan.___", state 497, "(1)" + line 416, "pan.___", state 498, "(1)" + line 416, "pan.___", state 498, "(1)" + line 414, "pan.___", state 503, "((i<1))" + line 414, "pan.___", state 503, "((i>=1))" + line 421, "pan.___", state 509, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 511, "(1)" + line 421, "pan.___", state 512, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 512, "else" + line 421, "pan.___", state 515, "(1)" + line 421, "pan.___", state 516, "(1)" + line 421, "pan.___", state 516, "(1)" + line 425, "pan.___", state 523, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 525, "(1)" + line 425, "pan.___", state 526, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 526, "else" + line 425, "pan.___", state 529, "(1)" + line 425, "pan.___", state 530, "(1)" + line 425, "pan.___", state 530, "(1)" + line 423, "pan.___", state 535, "((i<2))" + line 423, "pan.___", state 535, "((i>=2))" + line 430, "pan.___", state 542, "(1)" + line 430, "pan.___", state 543, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 543, "else" + line 430, "pan.___", state 546, "(1)" + line 430, "pan.___", state 547, "(1)" + line 430, "pan.___", state 547, "(1)" + line 434, "pan.___", state 555, "(1)" + line 434, "pan.___", state 556, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 556, "else" + line 434, "pan.___", state 559, "(1)" + line 434, "pan.___", state 560, "(1)" + line 434, "pan.___", state 560, "(1)" + line 432, "pan.___", state 565, "((i<1))" + line 432, "pan.___", state 565, "((i>=1))" + line 439, "pan.___", state 572, "(1)" + line 439, "pan.___", state 573, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 573, "else" + line 439, "pan.___", state 576, "(1)" + line 439, "pan.___", state 577, "(1)" + line 439, "pan.___", state 577, "(1)" + line 443, "pan.___", state 585, "(1)" + line 443, "pan.___", state 586, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 586, "else" + line 443, "pan.___", state 589, "(1)" + line 443, "pan.___", state 590, "(1)" + line 443, "pan.___", state 590, "(1)" + line 451, "pan.___", state 599, "(1)" + line 451, "pan.___", state 599, "(1)" + line 412, "pan.___", state 605, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 611, "(1)" + line 416, "pan.___", state 619, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 625, "(1)" + line 416, "pan.___", state 626, "(1)" + line 416, "pan.___", state 626, "(1)" + line 414, "pan.___", state 631, "((i<1))" + line 414, "pan.___", state 631, "((i>=1))" + line 421, "pan.___", state 637, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 643, "(1)" + line 421, "pan.___", state 644, "(1)" + line 421, "pan.___", state 644, "(1)" + line 425, "pan.___", state 651, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 657, "(1)" + line 425, "pan.___", state 658, "(1)" + line 425, "pan.___", state 658, "(1)" + line 423, "pan.___", state 663, "((i<2))" + line 423, "pan.___", state 663, "((i>=2))" + line 430, "pan.___", state 670, "(1)" + line 430, "pan.___", state 671, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 671, "else" + line 430, "pan.___", state 674, "(1)" + line 430, "pan.___", state 675, "(1)" + line 430, "pan.___", state 675, "(1)" + line 434, "pan.___", state 683, "(1)" + line 434, "pan.___", state 684, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 684, "else" + line 434, "pan.___", state 687, "(1)" + line 434, "pan.___", state 688, "(1)" + line 434, "pan.___", state 688, "(1)" + line 432, "pan.___", state 693, "((i<1))" + line 432, "pan.___", state 693, "((i>=1))" + line 439, "pan.___", state 700, "(1)" + line 439, "pan.___", state 701, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 701, "else" + line 439, "pan.___", state 704, "(1)" + line 439, "pan.___", state 705, "(1)" + line 439, "pan.___", state 705, "(1)" + line 443, "pan.___", state 713, "(1)" + line 443, "pan.___", state 714, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 714, "else" + line 443, "pan.___", state 717, "(1)" + line 443, "pan.___", state 718, "(1)" + line 443, "pan.___", state 718, "(1)" + line 451, "pan.___", state 727, "(1)" + line 451, "pan.___", state 727, "(1)" + line 412, "pan.___", state 734, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 740, "(1)" + line 416, "pan.___", state 748, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 754, "(1)" + line 416, "pan.___", state 755, "(1)" + line 416, "pan.___", state 755, "(1)" + line 414, "pan.___", state 760, "((i<1))" + line 414, "pan.___", state 760, "((i>=1))" + line 421, "pan.___", state 766, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 772, "(1)" + line 421, "pan.___", state 773, "(1)" + line 421, "pan.___", state 773, "(1)" + line 425, "pan.___", state 780, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 786, "(1)" + line 425, "pan.___", state 787, "(1)" + line 425, "pan.___", state 787, "(1)" + line 423, "pan.___", state 792, "((i<2))" + line 423, "pan.___", state 792, "((i>=2))" + line 430, "pan.___", state 799, "(1)" + line 430, "pan.___", state 800, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 430, "pan.___", state 800, "else" + line 430, "pan.___", state 803, "(1)" + line 430, "pan.___", state 804, "(1)" + line 430, "pan.___", state 804, "(1)" + line 434, "pan.___", state 812, "(1)" + line 434, "pan.___", state 813, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 434, "pan.___", state 813, "else" + line 434, "pan.___", state 816, "(1)" + line 434, "pan.___", state 817, "(1)" + line 434, "pan.___", state 817, "(1)" + line 432, "pan.___", state 822, "((i<1))" + line 432, "pan.___", state 822, "((i>=1))" + line 439, "pan.___", state 829, "(1)" + line 439, "pan.___", state 830, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 439, "pan.___", state 830, "else" + line 439, "pan.___", state 833, "(1)" + line 439, "pan.___", state 834, "(1)" + line 439, "pan.___", state 834, "(1)" + line 443, "pan.___", state 842, "(1)" + line 443, "pan.___", state 843, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 443, "pan.___", state 843, "else" + line 443, "pan.___", state 846, "(1)" + line 443, "pan.___", state 847, "(1)" + line 443, "pan.___", state 847, "(1)" + line 441, "pan.___", state 852, "((i<2))" + line 441, "pan.___", state 852, "((i>=2))" + line 451, "pan.___", state 856, "(1)" + line 451, "pan.___", state 856, "(1)" + line 416, "pan.___", state 879, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 897, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 911, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 434, "pan.___", state 943, "(1)" + line 439, "pan.___", state 960, "(1)" + line 443, "pan.___", state 973, "(1)" + line 412, "pan.___", state 999, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 1013, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1031, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1045, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 430, "pan.___", state 1064, "(1)" + line 434, "pan.___", state 1077, "(1)" + line 439, "pan.___", state 1094, "(1)" + line 443, "pan.___", state 1107, "(1)" + line 273, "pan.___", state 1153, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 1162, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 1170, "((i<1))" + line 275, "pan.___", state 1170, "((i>=1))" + line 281, "pan.___", state 1177, "(1)" + line 281, "pan.___", state 1178, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 281, "pan.___", state 1178, "else" + line 285, "pan.___", state 1184, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1192, "((i<2))" + line 283, "pan.___", state 1192, "((i>=2))" + line 250, "pan.___", state 1200, "(1)" + line 254, "pan.___", state 1208, "(1)" + line 254, "pan.___", state 1209, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 1209, "else" + line 252, "pan.___", state 1214, "((i<1))" + line 252, "pan.___", state 1214, "((i>=1))" + line 258, "pan.___", state 1220, "(1)" + line 258, "pan.___", state 1221, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 1221, "else" + line 262, "pan.___", state 1228, "(1)" + line 262, "pan.___", state 1229, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 1229, "else" + line 267, "pan.___", state 1238, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 1238, "else" + line 277, "pan.___", state 1253, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 1266, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 1275, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1291, "(1)" + line 254, "pan.___", state 1299, "(1)" + line 258, "pan.___", state 1311, "(1)" + line 262, "pan.___", state 1319, "(1)" + line 1238, "pan.___", state 1334, "-end-" + (242 of 1334 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1303, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 88.5 seconds +pan: rate 1954.1954 states/second +pan: avg transition delay 1.2701e-06 usec +cp .input.spin urcu_progress_writer_error.spin.input +cp .input.spin.trail urcu_progress_writer_error.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-alpha-no-ipi' diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..ad4f91f --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input @@ -0,0 +1,1274 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input.trail b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..8ab0111 --- /dev/null +++ b/urcu-controldataflow-alpha-no-ipi/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,7390 @@ +-2:3:-2 +-4:-4:-4 +1:0:4529 +2:3:4449 +3:3:4452 +4:3:4452 +5:3:4455 +6:3:4463 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+7376:2:4082 +7377:2:4083 +7378:2:4084 +7379:2:4082 +7380:2:4083 +7381:2:4084 +7382:2:4095 +7383:2:4103 +7384:0:4533 +7385:2:3127 +7386:0:4533 +7387:1:3013 diff --git a/urcu-controldataflow-intel-ipi-compress/.input.define b/urcu-controldataflow-intel-ipi-compress/.input.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/.input.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-intel-ipi-compress/.input.spin b/urcu-controldataflow-intel-ipi-compress/.input.spin new file mode 100644 index 0000000..6cccb27 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/.input.spin @@ -0,0 +1,1341 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi-compress/.input.spin.trail b/urcu-controldataflow-intel-ipi-compress/.input.spin.trail new file mode 100644 index 0000000..e9b06b3 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/.input.spin.trail @@ -0,0 +1,1699 @@ +-2:3:-2 +-4:-4:-4 +1:0:3997 +2:2:2536 +3:2:2541 +4:2:2545 +5:2:2553 +6:2:2557 +7:2:2561 +8:0:3997 +9:1:0 +10:1:5 +11:1:9 +12:1:17 +13:1:21 +14:1:25 +15:0:3997 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(RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow-intel-ipi-compress/Makefile b/urcu-controldataflow-intel-ipi-compress/Makefile new file mode 100644 index 0000000..f8bfd31 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/Makefile @@ -0,0 +1,171 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 -DCOLLAPSE +#CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + #make urcu_free | tee urcu_free.log + #make urcu_free_no_mb | tee urcu_free_no_mb.log + #make urcu_free_no_rmb | tee urcu_free_no_rmb.log + #make urcu_free_no_wmb | tee urcu_free_no_wmb.log + #make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + #make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow-intel-ipi-compress/references.txt b/urcu-controldataflow-intel-ipi-compress/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow-intel-ipi-compress/urcu.sh b/urcu-controldataflow-intel-ipi-compress/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow-intel-ipi-compress/urcu.spin b/urcu-controldataflow-intel-ipi-compress/urcu.spin new file mode 100644 index 0000000..8075506 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu.spin @@ -0,0 +1,1321 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_free.log b/urcu-controldataflow-intel-ipi-compress/urcu_free.log new file mode 100644 index 0000000..43e9bba --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_free.log @@ -0,0 +1,55 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1294) +Depth= 9223 States= 1e+06 Transitions= 6.87e+06 Memory= 516.350 t= 19.4 R= 5e+04 +Depth= 9223 States= 2e+06 Transitions= 1.47e+07 Memory= 563.713 t= 43.1 R= 5e+04 +Depth= 9223 States= 3e+06 Transitions= 2.46e+07 Memory= 613.127 t= 73.9 R= 4e+04 +pan: resizing hashtable to -w22.. done +Depth= 9223 States= 4e+06 Transitions= 3.19e+07 Memory= 690.440 t= 95.5 R= 4e+04 +Depth= 9223 States= 5e+06 Transitions= 3.95e+07 Memory= 736.533 t= 118 R= 4e+04 +Depth= 9223 States= 6e+06 Transitions= 5.71e+07 Memory= 785.068 t= 174 R= 3e+04 +Depth= 9223 States= 7e+06 Transitions= 6.81e+07 Memory= 834.580 t= 209 R= 3e+04 +Depth= 9223 States= 8e+06 Transitions= 8.22e+07 Memory= 883.311 t= 254 R= 3e+04 +Depth= 9223 States= 9e+06 Transitions= 9.54e+07 Memory= 932.139 t= 296 R= 3e+04 +pan: resizing hashtable to -w24.. done +Depth= 9223 States= 1e+07 Transitions= 1.08e+08 Memory= 1104.670 t= 338 R= 3e+04 +Depth= 9223 States= 1.1e+07 Transitions= 1.21e+08 Memory= 1155.451 t= 375 R= 3e+04 +Depth= 9223 States= 1.2e+07 Transitions= 1.3e+08 Memory= 1205.744 t= 403 R= 3e+04 +Depth= 9223 States= 1.3e+07 Transitions= 1.42e+08 Memory= 1254.572 t= 442 R= 3e+04 +Depth= 9223 States= 1.4e+07 Transitions= 1.72e+08 Memory= 1302.717 t= 539 R= 3e+04 +Depth= 9223 States= 1.5e+07 Transitions= 1.91e+08 Memory= 1354.768 t= 600 R= 3e+04 +Depth= 9223 States= 1.6e+07 Transitions= 2.08e+08 Memory= 1405.842 t= 653 R= 2e+04 +Depth= 9223 States= 1.7e+07 Transitions= 2.2e+08 Memory= 1456.818 t= 691 R= 2e+04 +Depth= 9223 States= 1.8e+07 Transitions= 2.39e+08 Memory= 1506.135 t= 751 R= 2e+04 +Depth= 9223 States= 1.9e+07 Transitions= 2.55e+08 Memory= 1556.330 t= 801 R= 2e+04 +Depth= 9223 States= 2e+07 Transitions= 2.72e+08 Memory= 1604.084 t= 856 R= 2e+04 +Depth= 9285 States= 2.1e+07 Transitions= 2.85e+08 Memory= 1650.080 t= 898 R= 2e+04 +Depth= 9324 States= 2.2e+07 Transitions= 2.99e+08 Memory= 1696.760 t= 941 R= 2e+04 +Depth= 9324 States= 2.3e+07 Transitions= 3.1e+08 Memory= 1746.369 t= 976 R= 2e+04 +Depth= 9324 States= 2.4e+07 Transitions= 3.21e+08 Memory= 1792.561 t= 1.01e+03 R= 2e+04 +Depth= 9324 States= 2.5e+07 Transitions= 3.34e+08 Memory= 1841.096 t= 1.05e+03 R= 2e+04 +Depth= 9324 States= 2.6e+07 Transitions= 3.45e+08 Memory= 1890.998 t= 1.09e+03 R= 2e+04 +Depth= 9324 States= 2.7e+07 Transitions= 3.59e+08 Memory= 1940.412 t= 1.13e+03 R= 2e+04 +Depth= 9324 States= 2.8e+07 Transitions= 3.71e+08 Memory= 1987.776 t= 1.17e+03 R= 2e+04 +Depth= 9324 States= 2.9e+07 Transitions= 3.84e+08 Memory= 2034.846 t= 1.21e+03 R= 2e+04 +Depth= 9324 States= 3e+07 Transitions= 3.96e+08 Memory= 2081.233 t= 1.25e+03 R= 2e+04 +Depth= 9324 States= 3.1e+07 Transitions= 4.09e+08 Memory= 2129.865 t= 1.29e+03 R= 2e+04 +Depth= 9324 States= 3.2e+07 Transitions= 4.19e+08 Memory= 2179.670 t= 1.32e+03 R= 2e+04 +Depth= 9324 States= 3.3e+07 Transitions= 4.3e+08 Memory= 2227.717 t= 1.36e+03 R= 2e+04 +Depth= 9324 States= 3.4e+07 Transitions= 4.44e+08 Memory= 2277.033 t= 1.4e+03 R= 2e+04 +pan: resizing hashtable to -w26.. done +Depth= 9324 States= 3.5e+07 Transitions= 4.6e+08 Memory= 2824.190 t= 1.46e+03 R= 2e+04 diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_free.ltl b/urcu-controldataflow-intel-ipi-compress/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_free_nested.define b/urcu-controldataflow-intel-ipi-compress/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_free_no_mb.define b/urcu-controldataflow-intel-ipi-compress/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_free_no_rmb.define b/urcu-controldataflow-intel-ipi-compress/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_free_no_wmb.define b/urcu-controldataflow-intel-ipi-compress/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_free_single_flip.define b/urcu-controldataflow-intel-ipi-compress/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress.ltl b/urcu-controldataflow-intel-ipi-compress/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.define b/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.log b/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.log new file mode 100644 index 0000000..d087e70 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.log @@ -0,0 +1,703 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +depth 7: Claim reached state 9 (line 1367) +depth 131: Claim reached state 9 (line 1366) +Depth= 108226 States= 1e+06 Transitions= 1.1e+07 Memory= 495.354 t= 32.5 R= 3e+04 +Depth= 108226 States= 2e+06 Transitions= 2.2e+07 Memory= 526.018 t= 65.8 R= 3e+04 +Depth= 108226 States= 3e+06 Transitions= 3.31e+07 Memory= 555.510 t= 99.5 R= 3e+04 +pan: resizing hashtable to -w22.. done +Depth= 108226 States= 4e+06 Transitions= 4.38e+07 Memory= 615.733 t= 132 R= 3e+04 +Depth= 108226 States= 5e+06 Transitions= 5.47e+07 Memory= 644.346 t= 164 R= 3e+04 +Depth= 108226 States= 6e+06 Transitions= 6.54e+07 Memory= 671.983 t= 197 R= 3e+04 +Depth= 108226 States= 7e+06 Transitions= 7.64e+07 Memory= 700.108 t= 230 R= 3e+04 +Depth= 110273 States= 8e+06 Transitions= 8.89e+07 Memory= 728.428 t= 268 R= 3e+04 +Depth= 110273 States= 9e+06 Transitions= 1.02e+08 Memory= 757.920 t= 310 R= 3e+04 +pan: resizing hashtable to -w24.. done +Depth= 110273 States= 1e+07 Transitions= 1.14e+08 Memory= 911.408 t= 347 R= 3e+04 +Depth= 110273 States= 1.1e+07 Transitions= 1.26e+08 Memory= 939.924 t= 380 R= 3e+04 +Depth= 110273 States= 1.2e+07 Transitions= 1.37e+08 Memory= 968.440 t= 414 R= 3e+04 +Depth= 110273 States= 1.3e+07 Transitions= 1.58e+08 Memory= 996.272 t= 479 R= 3e+04 +Depth= 110273 States= 1.4e+07 Transitions= 1.69e+08 Memory= 1026.545 t= 513 R= 3e+04 +Depth= 110273 States= 1.5e+07 Transitions= 1.81e+08 Memory= 1055.451 t= 550 R= 3e+04 +Depth= 110273 States= 1.6e+07 Transitions= 1.92e+08 Memory= 1084.943 t= 583 R= 3e+04 +Depth= 110273 States= 1.7e+07 Transitions= 2.03e+08 Memory= 1114.045 t= 615 R= 3e+04 +Depth= 110273 States= 1.8e+07 Transitions= 2.14e+08 Memory= 1144.318 t= 647 R= 3e+04 +Depth= 110273 States= 1.9e+07 Transitions= 2.25e+08 Memory= 1173.420 t= 680 R= 3e+04 +Depth= 110273 States= 2e+07 Transitions= 2.36e+08 Memory= 1202.717 t= 713 R= 3e+04 +Depth= 110273 States= 2.1e+07 Transitions= 2.47e+08 Memory= 1232.404 t= 746 R= 3e+04 +Depth= 110273 States= 2.2e+07 Transitions= 2.58e+08 Memory= 1262.092 t= 778 R= 3e+04 +Depth= 110273 States= 2.3e+07 Transitions= 2.69e+08 Memory= 1290.119 t= 811 R= 3e+04 +Depth= 110273 States= 2.4e+07 Transitions= 2.82e+08 Memory= 1317.268 t= 851 R= 3e+04 +Depth= 110273 States= 2.5e+07 Transitions= 2.96e+08 Memory= 1345.783 t= 893 R= 3e+04 +Depth= 110273 States= 2.6e+07 Transitions= 3.13e+08 Memory= 1373.615 t= 948 R= 3e+04 +Depth= 110273 States= 2.7e+07 Transitions= 3.48e+08 Memory= 1403.889 t= 1.06e+03 R= 3e+04 +Depth= 110273 States= 2.8e+07 Transitions= 3.7e+08 Memory= 1434.651 t= 1.13e+03 R= 2e+04 +Depth= 110273 States= 2.9e+07 Transitions= 3.84e+08 Memory= 1464.338 t= 1.17e+03 R= 2e+04 +Depth= 110273 States= 3e+07 Transitions= 4.04e+08 Memory= 1492.365 t= 1.24e+03 R= 2e+04 +Depth= 110273 States= 3.1e+07 Transitions= 4.26e+08 Memory= 1520.490 t= 1.31e+03 R= 2e+04 +Depth= 110273 States= 3.2e+07 Transitions= 4.42e+08 Memory= 1550.080 t= 1.36e+03 R= 2e+04 +Depth= 110273 States= 3.3e+07 Transitions= 4.63e+08 Memory= 1578.791 t= 1.42e+03 R= 2e+04 +Depth= 110273 States= 3.4e+07 Transitions= 4.87e+08 Memory= 1605.842 t= 1.5e+03 R= 2e+04 +pan: resizing hashtable to -w26.. done +Depth= 110273 States= 3.5e+07 Transitions= 5.01e+08 Memory= 2130.147 t= 1.55e+03 R= 2e+04 +Depth= 110273 States= 3.6e+07 Transitions= 5.22e+08 Memory= 2158.467 t= 1.61e+03 R= 2e+04 +Depth= 110273 States= 3.7e+07 Transitions= 5.4e+08 Memory= 2186.006 t= 1.67e+03 R= 2e+04 +Depth= 110273 States= 3.8e+07 Transitions= 5.61e+08 Memory= 2213.545 t= 1.74e+03 R= 2e+04 +Depth= 110273 States= 3.9e+07 Transitions= 5.82e+08 Memory= 2242.061 t= 1.82e+03 R= 2e+04 +Depth= 110273 States= 4e+07 Transitions= 6e+08 Memory= 2270.088 t= 1.87e+03 R= 2e+04 +Depth= 110273 States= 4.1e+07 Transitions= 6.18e+08 Memory= 2298.408 t= 1.93e+03 R= 2e+04 +Depth= 110273 States= 4.2e+07 Transitions= 6.37e+08 Memory= 2325.850 t= 1.99e+03 R= 2e+04 +Depth= 110273 States= 4.3e+07 Transitions= 6.65e+08 Memory= 2352.803 t= 2.08e+03 R= 2e+04 +Depth= 110273 States= 4.4e+07 Transitions= 6.82e+08 Memory= 2380.733 t= 2.13e+03 R= 2e+04 +Depth= 110273 States= 4.5e+07 Transitions= 6.99e+08 Memory= 2408.076 t= 2.18e+03 R= 2e+04 +Depth= 110273 States= 4.6e+07 Transitions= 7.12e+08 Memory= 2434.346 t= 2.23e+03 R= 2e+04 +Depth= 110273 States= 4.7e+07 Transitions= 7.26e+08 Memory= 2462.959 t= 2.27e+03 R= 2e+04 +Depth= 110273 States= 4.8e+07 Transitions= 7.4e+08 Memory= 2493.721 t= 2.31e+03 R= 2e+04 +Depth= 110273 States= 4.9e+07 Transitions= 7.53e+08 Memory= 2522.627 t= 2.35e+03 R= 2e+04 +Depth= 110273 States= 5e+07 Transitions= 7.66e+08 Memory= 2552.803 t= 2.39e+03 R= 2e+04 +Depth= 110273 States= 5.1e+07 Transitions= 7.77e+08 Memory= 2583.565 t= 2.42e+03 R= 2e+04 +Depth= 110273 States= 5.2e+07 Transitions= 7.9e+08 Memory= 2611.006 t= 2.46e+03 R= 2e+04 +Depth= 110273 States= 5.3e+07 Transitions= 8.16e+08 Memory= 2641.182 t= 2.54e+03 R= 2e+04 +Depth= 110273 States= 5.4e+07 Transitions= 8.52e+08 Memory= 2673.213 t= 2.66e+03 R= 2e+04 +Depth= 110273 States= 5.5e+07 Transitions= 8.93e+08 Memory= 2707.197 t= 2.79e+03 R= 2e+04 +Depth= 110273 States= 5.6e+07 Transitions= 9.4e+08 Memory= 2738.447 t= 2.94e+03 R= 2e+04 +Depth= 110273 States= 5.7e+07 Transitions= 9.81e+08 Memory= 2767.354 t= 3.08e+03 R= 2e+04 +Depth= 110273 States= 5.8e+07 Transitions= 1.01e+09 Memory= 2794.111 t= 3.16e+03 R= 2e+04 +Depth= 110273 States= 5.9e+07 Transitions= 1.02e+09 Memory= 2822.529 t= 3.21e+03 R= 2e+04 +Depth= 110273 States= 6e+07 Transitions= 1.05e+09 Memory= 2850.654 t= 3.28e+03 R= 2e+04 +Depth= 110273 States= 6.1e+07 Transitions= 1.08e+09 Memory= 2879.170 t= 3.39e+03 R= 2e+04 +Depth= 110273 States= 6.2e+07 Transitions= 1.1e+09 Memory= 2908.858 t= 3.44e+03 R= 2e+04 +Depth= 110273 States= 6.3e+07 Transitions= 1.11e+09 Memory= 2935.908 t= 3.49e+03 R= 2e+04 +Depth= 110273 States= 6.4e+07 Transitions= 1.13e+09 Memory= 2960.518 t= 3.54e+03 R= 2e+04 +Depth= 110273 States= 6.5e+07 Transitions= 1.14e+09 Memory= 2990.205 t= 3.58e+03 R= 2e+04 +Depth= 110273 States= 6.6e+07 Transitions= 1.17e+09 Memory= 3018.721 t= 3.67e+03 R= 2e+04 +Depth= 110273 States= 6.7e+07 Transitions= 1.18e+09 Memory= 3047.041 t= 3.71e+03 R= 2e+04 +Depth= 110273 States= 6.8e+07 Transitions= 1.21e+09 Memory= 3074.580 t= 3.79e+03 R= 2e+04 +Depth= 110273 States= 6.9e+07 Transitions= 1.23e+09 Memory= 3101.826 t= 3.87e+03 R= 2e+04 +Depth= 110273 States= 7e+07 Transitions= 1.27e+09 Memory= 3130.635 t= 3.98e+03 R= 2e+04 +Depth= 110273 States= 7.1e+07 Transitions= 1.29e+09 Memory= 3157.197 t= 4.06e+03 R= 2e+04 +Depth= 110273 States= 7.2e+07 Transitions= 1.32e+09 Memory= 3184.443 t= 4.16e+03 R= 2e+04 +Depth= 110273 States= 7.3e+07 Transitions= 1.34e+09 Memory= 3211.690 t= 4.24e+03 R= 2e+04 +Depth= 110273 States= 7.4e+07 Transitions= 1.37e+09 Memory= 3239.229 t= 4.32e+03 R= 2e+04 +Depth= 110273 States= 7.5e+07 Transitions= 1.38e+09 Memory= 3266.670 t= 4.38e+03 R= 2e+04 +Depth= 110273 States= 7.6e+07 Transitions= 1.41e+09 Memory= 3294.307 t= 4.46e+03 R= 2e+04 +Depth= 110273 States= 7.7e+07 Transitions= 1.44e+09 Memory= 3322.432 t= 4.55e+03 R= 2e+04 +Depth= 110273 States= 7.8e+07 Transitions= 1.46e+09 Memory= 3352.608 t= 4.62e+03 R= 2e+04 +Depth= 110273 States= 7.9e+07 Transitions= 1.47e+09 Memory= 3378.193 t= 4.66e+03 R= 2e+04 +Depth= 110273 States= 8e+07 Transitions= 1.49e+09 Memory= 3407.490 t= 4.71e+03 R= 2e+04 +Depth= 110273 States= 8.1e+07 Transitions= 1.52e+09 Memory= 3436.397 t= 4.8e+03 R= 2e+04 +Depth= 110273 States= 8.2e+07 Transitions= 1.53e+09 Memory= 3461.690 t= 4.84e+03 R= 2e+04 +Depth= 110273 States= 8.3e+07 Transitions= 1.56e+09 Memory= 3491.182 t= 4.92e+03 R= 2e+04 +Depth= 110273 States= 8.4e+07 Transitions= 1.57e+09 Memory= 3519.990 t= 4.98e+03 R= 2e+04 +Depth= 110273 States= 8.5e+07 Transitions= 1.59e+09 Memory= 3546.065 t= 5.02e+03 R= 2e+04 +Depth= 110273 States= 8.6e+07 Transitions= 1.6e+09 Memory= 3575.459 t= 5.07e+03 R= 2e+04 +Depth= 110273 States= 8.7e+07 Transitions= 1.63e+09 Memory= 3605.049 t= 5.14e+03 R= 2e+04 +Depth= 110273 States= 8.8e+07 Transitions= 1.64e+09 Memory= 3632.588 t= 5.2e+03 R= 2e+04 +Depth= 110273 States= 8.9e+07 Transitions= 1.66e+09 Memory= 3661.787 t= 5.26e+03 R= 2e+04 +Depth= 110273 States= 9e+07 Transitions= 1.68e+09 Memory= 3688.154 t= 5.3e+03 R= 2e+04 +Depth= 110273 States= 9.1e+07 Transitions= 1.7e+09 Memory= 3715.986 t= 5.36e+03 R= 2e+04 +Depth= 110273 States= 9.2e+07 Transitions= 1.71e+09 Memory= 3743.623 t= 5.41e+03 R= 2e+04 +Depth= 110273 States= 9.3e+07 Transitions= 1.73e+09 Memory= 3771.358 t= 5.46e+03 R= 2e+04 +Depth= 110273 States= 9.4e+07 Transitions= 1.75e+09 Memory= 3797.920 t= 5.53e+03 R= 2e+04 +Depth= 110273 States= 9.5e+07 Transitions= 1.77e+09 Memory= 3827.119 t= 5.6e+03 R= 2e+04 +Depth= 110273 States= 9.6e+07 Transitions= 1.79e+09 Memory= 3858.858 t= 5.64e+03 R= 2e+04 +Depth= 110273 States= 9.7e+07 Transitions= 1.8e+09 Memory= 3885.713 t= 5.7e+03 R= 2e+04 +Depth= 110273 States= 9.8e+07 Transitions= 1.82e+09 Memory= 3914.717 t= 5.75e+03 R= 2e+04 +Depth= 110273 States= 9.9e+07 Transitions= 1.84e+09 Memory= 3941.670 t= 5.81e+03 R= 2e+04 +Depth= 110273 States= 1e+08 Transitions= 1.86e+09 Memory= 3968.818 t= 5.87e+03 R= 2e+04 +Depth= 110273 States= 1.01e+08 Transitions= 1.88e+09 Memory= 3994.990 t= 5.94e+03 R= 2e+04 +Depth= 110273 States= 1.02e+08 Transitions= 1.9e+09 Memory= 4023.311 t= 6.01e+03 R= 2e+04 +Depth= 110273 States= 1.03e+08 Transitions= 1.92e+09 Memory= 4053.193 t= 6.08e+03 R= 2e+04 +Depth= 110273 States= 1.04e+08 Transitions= 1.94e+09 Memory= 4078.389 t= 6.12e+03 R= 2e+04 +Depth= 110273 States= 1.05e+08 Transitions= 1.96e+09 Memory= 4108.467 t= 6.2e+03 R= 2e+04 +Depth= 110273 States= 1.06e+08 Transitions= 1.98e+09 Memory= 4137.080 t= 6.25e+03 R= 2e+04 +Depth= 110273 States= 1.07e+08 Transitions= 1.99e+09 Memory= 4163.740 t= 6.29e+03 R= 2e+04 +Depth= 110273 States= 1.08e+08 Transitions= 2.01e+09 Memory= 4191.768 t= 6.35e+03 R= 2e+04 +Depth= 110273 States= 1.09e+08 Transitions= 2.03e+09 Memory= 4221.651 t= 6.4e+03 R= 2e+04 +Depth= 110273 States= 1.1e+08 Transitions= 2.04e+09 Memory= 4249.971 t= 6.45e+03 R= 2e+04 +Depth= 110273 States= 1.11e+08 Transitions= 2.07e+09 Memory= 4278.877 t= 6.52e+03 R= 2e+04 +Depth= 110273 States= 1.12e+08 Transitions= 2.09e+09 Memory= 4308.174 t= 6.59e+03 R= 2e+04 +Depth= 110273 States= 1.13e+08 Transitions= 2.1e+09 Memory= 4333.760 t= 6.64e+03 R= 2e+04 +Depth= 110273 States= 1.14e+08 Transitions= 2.13e+09 Memory= 4363.740 t= 6.71e+03 R= 2e+04 +Depth= 110273 States= 1.15e+08 Transitions= 2.14e+09 Memory= 4392.158 t= 6.76e+03 R= 2e+04 +Depth= 110273 States= 1.16e+08 Transitions= 2.16e+09 Memory= 4419.014 t= 6.81e+03 R= 2e+04 +Depth= 110273 States= 1.17e+08 Transitions= 2.17e+09 Memory= 4446.846 t= 6.86e+03 R= 2e+04 +Depth= 110273 States= 1.18e+08 Transitions= 2.19e+09 Memory= 4476.338 t= 6.91e+03 R= 2e+04 +Depth= 110273 States= 1.19e+08 Transitions= 2.21e+09 Memory= 4505.440 t= 6.96e+03 R= 2e+04 +Depth= 110273 States= 1.2e+08 Transitions= 2.22e+09 Memory= 4529.561 t= 7.01e+03 R= 2e+04 +Depth= 110273 States= 1.21e+08 Transitions= 2.24e+09 Memory= 4557.588 t= 7.07e+03 R= 2e+04 +Depth= 110273 States= 1.22e+08 Transitions= 2.26e+09 Memory= 4584.736 t= 7.12e+03 R= 2e+04 +Depth= 110273 States= 1.23e+08 Transitions= 2.27e+09 Memory= 4612.764 t= 7.18e+03 R= 2e+04 +Depth= 110273 States= 1.24e+08 Transitions= 2.29e+09 Memory= 4640.303 t= 7.22e+03 R= 2e+04 +Depth= 110273 States= 1.25e+08 Transitions= 2.32e+09 Memory= 4669.404 t= 7.32e+03 R= 2e+04 +Depth= 110273 States= 1.26e+08 Transitions= 2.35e+09 Memory= 4698.018 t= 7.44e+03 R= 2e+04 +Depth= 110273 States= 1.27e+08 Transitions= 2.37e+09 Memory= 4728.877 t= 7.49e+03 R= 2e+04 +Depth= 110273 States= 1.28e+08 Transitions= 2.38e+09 Memory= 4757.393 t= 7.54e+03 R= 2e+04 +Depth= 110273 States= 1.29e+08 Transitions= 2.4e+09 Memory= 4785.811 t= 7.6e+03 R= 2e+04 +Depth= 110273 States= 1.3e+08 Transitions= 2.42e+09 Memory= 4814.033 t= 7.66e+03 R= 2e+04 +Depth= 110273 States= 1.31e+08 Transitions= 2.44e+09 Memory= 4843.428 t= 7.72e+03 R= 2e+04 +Depth= 110273 States= 1.32e+08 Transitions= 2.46e+09 Memory= 4871.943 t= 7.78e+03 R= 2e+04 +Depth= 110273 States= 1.33e+08 Transitions= 2.49e+09 Memory= 4898.311 t= 7.88e+03 R= 2e+04 +Depth= 110273 States= 1.34e+08 Transitions= 2.51e+09 Memory= 4926.143 t= 7.95e+03 R= 2e+04 +Depth= 110273 States= 1.35e+08 Transitions= 2.54e+09 Memory= 4953.389 t= 8.02e+03 R= 2e+04 +pan: resizing hashtable to -w28.. done +Depth= 110273 States= 1.36e+08 Transitions= 2.56e+09 Memory= 7001.389 t= 8.13e+03 R= 2e+04 +Depth= 110273 States= 1.37e+08 Transitions= 2.58e+09 Memory= 7001.389 t= 8.19e+03 R= 2e+04 +Depth= 110273 States= 1.38e+08 Transitions= 2.61e+09 Memory= 7018.381 t= 8.26e+03 R= 2e+04 +Depth= 110273 States= 1.39e+08 Transitions= 2.63e+09 Memory= 7045.236 t= 8.33e+03 R= 2e+04 +Depth= 110273 States= 1.4e+08 Transitions= 2.65e+09 Memory= 7073.068 t= 8.39e+03 R= 2e+04 +Depth= 110273 States= 1.41e+08 Transitions= 2.68e+09 Memory= 7100.022 t= 8.48e+03 R= 2e+04 +Depth= 110273 States= 1.42e+08 Transitions= 2.7e+09 Memory= 7128.733 t= 8.54e+03 R= 2e+04 +Depth= 110273 States= 1.43e+08 Transitions= 2.72e+09 Memory= 7155.686 t= 8.6e+03 R= 2e+04 +Depth= 110273 States= 1.44e+08 Transitions= 2.73e+09 Memory= 7181.662 t= 8.65e+03 R= 2e+04 +Depth= 110273 States= 1.45e+08 Transitions= 2.74e+09 Memory= 7209.885 t= 8.69e+03 R= 2e+04 +Depth= 110273 States= 1.46e+08 Transitions= 2.76e+09 Memory= 7239.963 t= 8.73e+03 R= 2e+04 +Depth= 110273 States= 1.47e+08 Transitions= 2.77e+09 Memory= 7269.846 t= 8.77e+03 R= 2e+04 +Depth= 110273 States= 1.48e+08 Transitions= 2.79e+09 Memory= 7299.533 t= 8.82e+03 R= 2e+04 +Depth= 110273 States= 1.49e+08 Transitions= 2.8e+09 Memory= 7327.365 t= 8.87e+03 R= 2e+04 +Depth= 110273 States= 1.5e+08 Transitions= 2.82e+09 Memory= 7356.760 t= 8.92e+03 R= 2e+04 +Depth= 110273 States= 1.51e+08 Transitions= 2.84e+09 Memory= 7384.983 t= 8.97e+03 R= 2e+04 +Depth= 110273 States= 1.52e+08 Transitions= 2.85e+09 Memory= 7412.522 t= 9.02e+03 R= 2e+04 +Depth= 110273 States= 1.53e+08 Transitions= 2.87e+09 Memory= 7440.256 t= 9.09e+03 R= 2e+04 +Depth= 110273 States= 1.54e+08 Transitions= 2.91e+09 Memory= 7471.604 t= 9.2e+03 R= 2e+04 +Depth= 110273 States= 1.55e+08 Transitions= 2.95e+09 Memory= 7506.662 t= 9.32e+03 R= 2e+04 +Depth= 110273 States= 1.56e+08 Transitions= 3e+09 Memory= 7540.744 t= 9.48e+03 R= 2e+04 +Depth= 110273 States= 1.57e+08 Transitions= 3.04e+09 Memory= 7570.041 t= 9.62e+03 R= 2e+04 +Depth= 110273 States= 1.58e+08 Transitions= 3.07e+09 Memory= 7593.772 t= 9.72e+03 R= 2e+04 +Depth= 110273 States= 1.59e+08 Transitions= 3.09e+09 Memory= 7622.580 t= 9.77e+03 R= 2e+04 +Depth= 110273 States= 1.6e+08 Transitions= 3.11e+09 Memory= 7650.315 t= 9.83e+03 R= 2e+04 +Depth= 110273 States= 1.61e+08 Transitions= 3.14e+09 Memory= 7678.733 t= 9.93e+03 R= 2e+04 +Depth= 110273 States= 1.62e+08 Transitions= 3.16e+09 Memory= 7707.639 t= 1e+04 R= 2e+04 +Depth= 110273 States= 1.63e+08 Transitions= 3.18e+09 Memory= 7735.276 t= 1.01e+04 R= 2e+04 +Depth= 110273 States= 1.64e+08 Transitions= 3.2e+09 Memory= 7761.350 t= 1.01e+04 R= 2e+04 +Depth= 110273 States= 1.65e+08 Transitions= 3.21e+09 Memory= 7787.326 t= 1.02e+04 R= 2e+04 +Depth= 110273 States= 1.66e+08 Transitions= 3.23e+09 Memory= 7817.111 t= 1.02e+04 R= 2e+04 +Depth= 110273 States= 1.67e+08 Transitions= 3.25e+09 Memory= 7844.065 t= 1.03e+04 R= 2e+04 +Depth= 110273 States= 1.68e+08 Transitions= 3.28e+09 Memory= 7871.213 t= 1.04e+04 R= 2e+04 +Depth= 110273 States= 1.69e+08 Transitions= 3.3e+09 Memory= 7898.264 t= 1.04e+04 R= 2e+04 +Depth= 110273 States= 1.7e+08 Transitions= 3.32e+09 Memory= 7925.608 t= 1.05e+04 R= 2e+04 +Depth= 110273 States= 1.71e+08 Transitions= 3.35e+09 Memory= 7952.658 t= 1.06e+04 R= 2e+04 +Depth= 110273 States= 1.72e+08 Transitions= 3.38e+09 Memory= 7981.467 t= 1.07e+04 R= 2e+04 +Depth= 110273 States= 1.73e+08 Transitions= 3.4e+09 Memory= 8009.592 t= 1.08e+04 R= 2e+04 +Depth= 110273 States= 1.74e+08 Transitions= 3.43e+09 Memory= 8036.154 t= 1.08e+04 R= 2e+04 +Depth= 110273 States= 1.75e+08 Transitions= 3.45e+09 Memory= 8063.108 t= 1.09e+04 R= 2e+04 +Depth= 110273 States= 1.76e+08 Transitions= 3.48e+09 Memory= 8091.428 t= 1.1e+04 R= 2e+04 +Depth= 110273 States= 1.77e+08 Transitions= 3.5e+09 Memory= 8119.943 t= 1.11e+04 R= 2e+04 +Depth= 110273 States= 1.78e+08 Transitions= 3.53e+09 Memory= 8148.459 t= 1.12e+04 R= 2e+04 +Depth= 110273 States= 1.79e+08 Transitions= 3.54e+09 Memory= 8176.779 t= 1.12e+04 R= 2e+04 +Depth= 110273 States= 1.8e+08 Transitions= 3.56e+09 Memory= 8202.463 t= 1.12e+04 R= 2e+04 +Depth= 110273 States= 1.81e+08 Transitions= 3.58e+09 Memory= 8232.053 t= 1.13e+04 R= 2e+04 +Depth= 110273 States= 1.82e+08 Transitions= 3.6e+09 Memory= 8260.178 t= 1.14e+04 R= 2e+04 +Depth= 110273 States= 1.83e+08 Transitions= 3.62e+09 Memory= 8288.596 t= 1.14e+04 R= 2e+04 +Depth= 110273 States= 1.84e+08 Transitions= 3.64e+09 Memory= 8317.502 t= 1.15e+04 R= 2e+04 +Depth= 110273 States= 1.85e+08 Transitions= 3.66e+09 Memory= 8342.697 t= 1.16e+04 R= 2e+04 +Depth= 110273 States= 1.86e+08 Transitions= 3.67e+09 Memory= 8371.506 t= 1.16e+04 R= 2e+04 +Depth= 110273 States= 1.87e+08 Transitions= 3.69e+09 Memory= 8400.803 t= 1.17e+04 R= 2e+04 +Depth= 110273 States= 1.88e+08 Transitions= 3.71e+09 Memory= 8428.440 t= 1.17e+04 R= 2e+04 +Depth= 110273 States= 1.89e+08 Transitions= 3.73e+09 Memory= 8458.029 t= 1.18e+04 R= 2e+04 +Depth= 110273 States= 1.9e+08 Transitions= 3.75e+09 Memory= 8484.885 t= 1.18e+04 R= 2e+04 +Depth= 110273 States= 1.91e+08 Transitions= 3.76e+09 Memory= 8512.522 t= 1.19e+04 R= 2e+04 +Depth= 110273 States= 1.92e+08 Transitions= 3.78e+09 Memory= 8540.549 t= 1.19e+04 R= 2e+04 +Depth= 110273 States= 1.93e+08 Transitions= 3.79e+09 Memory= 8567.893 t= 1.2e+04 R= 2e+04 +Depth= 110273 States= 1.94e+08 Transitions= 3.82e+09 Memory= 8595.041 t= 1.21e+04 R= 2e+04 +Depth= 110273 States= 1.95e+08 Transitions= 3.84e+09 Memory= 8626.584 t= 1.21e+04 R= 2e+04 +Depth= 110273 States= 1.96e+08 Transitions= 3.85e+09 Memory= 8655.295 t= 1.22e+04 R= 2e+04 +Depth= 110273 States= 1.97e+08 Transitions= 3.87e+09 Memory= 8683.908 t= 1.22e+04 R= 2e+04 +Depth= 110273 States= 1.98e+08 Transitions= 3.89e+09 Memory= 8711.447 t= 1.23e+04 R= 2e+04 +Depth= 110273 States= 1.99e+08 Transitions= 3.91e+09 Memory= 8738.108 t= 1.23e+04 R= 2e+04 +Depth= 110273 States= 2e+08 Transitions= 3.93e+09 Memory= 8766.818 t= 1.24e+04 R= 2e+04 +Depth= 110273 States= 2.01e+08 Transitions= 3.95e+09 Memory= 8796.701 t= 1.25e+04 R= 2e+04 +Depth= 110273 States= 2.02e+08 Transitions= 3.96e+09 Memory= 8821.897 t= 1.25e+04 R= 2e+04 +Depth= 110273 States= 2.03e+08 Transitions= 3.99e+09 Memory= 8852.072 t= 1.26e+04 R= 2e+04 +Depth= 110273 States= 2.04e+08 Transitions= 4e+09 Memory= 8880.490 t= 1.26e+04 R= 2e+04 +Depth= 110273 States= 2.05e+08 Transitions= 4.02e+09 Memory= 8907.541 t= 1.27e+04 R= 2e+04 +Depth= 110273 States= 2.06e+08 Transitions= 4.03e+09 Memory= 8935.373 t= 1.27e+04 R= 2e+04 +Depth= 110273 States= 2.07e+08 Transitions= 4.05e+09 Memory= 8965.354 t= 1.28e+04 R= 2e+04 +Depth= 110273 States= 2.08e+08 Transitions= 4.07e+09 Memory= 8993.674 t= 1.28e+04 R= 2e+04 +Depth= 110273 States= 2.09e+08 Transitions= 4.09e+09 Memory= 9022.190 t= 1.29e+04 R= 2e+04 +Depth= 110273 States= 2.1e+08 Transitions= 4.11e+09 Memory= 9052.072 t= 1.3e+04 R= 2e+04 +Depth= 110273 States= 2.11e+08 Transitions= 4.13e+09 Memory= 9077.268 t= 1.3e+04 R= 2e+04 +Depth= 110273 States= 2.12e+08 Transitions= 4.15e+09 Memory= 9107.248 t= 1.31e+04 R= 2e+04 +Depth= 110273 States= 2.13e+08 Transitions= 4.16e+09 Memory= 9135.861 t= 1.31e+04 R= 2e+04 +Depth= 110273 States= 2.14e+08 Transitions= 4.18e+09 Memory= 9162.619 t= 1.32e+04 R= 2e+04 +Depth= 110273 States= 2.15e+08 Transitions= 4.2e+09 Memory= 9190.549 t= 1.32e+04 R= 2e+04 +Depth= 110273 States= 2.16e+08 Transitions= 4.21e+09 Memory= 9220.139 t= 1.33e+04 R= 2e+04 +Depth= 110273 States= 2.17e+08 Transitions= 4.23e+09 Memory= 9248.947 t= 1.33e+04 R= 2e+04 +Depth= 110273 States= 2.18e+08 Transitions= 4.25e+09 Memory= 9273.166 t= 1.34e+04 R= 2e+04 +Depth= 110273 States= 2.19e+08 Transitions= 4.26e+09 Memory= 9301.096 t= 1.34e+04 R= 2e+04 +Depth= 110273 States= 2.2e+08 Transitions= 4.28e+09 Memory= 9329.221 t= 1.35e+04 R= 2e+04 +Depth= 110273 States= 2.21e+08 Transitions= 4.29e+09 Memory= 9356.858 t= 1.35e+04 R= 2e+04 +Depth= 110273 States= 2.22e+08 Transitions= 4.32e+09 Memory= 9384.494 t= 1.36e+04 R= 2e+04 +Depth= 110273 States= 2.23e+08 Transitions= 4.35e+09 Memory= 9414.279 t= 1.37e+04 R= 2e+04 +Depth= 110273 States= 2.24e+08 Transitions= 4.37e+09 Memory= 9445.139 t= 1.38e+04 R= 2e+04 +Depth= 110273 States= 2.25e+08 Transitions= 4.39e+09 Memory= 9473.361 t= 1.38e+04 R= 2e+04 +Depth= 110273 States= 2.26e+08 Transitions= 4.4e+09 Memory= 9502.365 t= 1.39e+04 R= 2e+04 +Depth= 110273 States= 2.27e+08 Transitions= 4.42e+09 Memory= 9530.783 t= 1.39e+04 R= 2e+04 +Depth= 110273 States= 2.28e+08 Transitions= 4.44e+09 Memory= 9559.592 t= 1.4e+04 R= 2e+04 +Depth= 110273 States= 2.29e+08 Transitions= 4.47e+09 Memory= 9586.838 t= 1.41e+04 R= 2e+04 +Depth= 110273 States= 2.3e+08 Transitions= 4.49e+09 Memory= 9612.815 t= 1.42e+04 R= 2e+04 +Depth= 110273 States= 2.31e+08 Transitions= 4.52e+09 Memory= 9639.572 t= 1.42e+04 R= 2e+04 +Depth= 110273 States= 2.32e+08 Transitions= 4.54e+09 Memory= 9666.233 t= 1.43e+04 R= 2e+04 +Depth= 110273 States= 2.33e+08 Transitions= 4.57e+09 Memory= 9692.307 t= 1.44e+04 R= 2e+04 +Depth= 110273 States= 2.34e+08 Transitions= 4.59e+09 Memory= 9718.186 t= 1.45e+04 R= 2e+04 +Depth= 110273 States= 2.35e+08 Transitions= 4.61e+09 Memory= 9746.604 t= 1.45e+04 R= 2e+04 +Depth= 110273 States= 2.36e+08 Transitions= 4.63e+09 Memory= 9772.678 t= 1.46e+04 R= 2e+04 +Depth= 110273 States= 2.37e+08 Transitions= 4.65e+09 Memory= 9799.826 t= 1.46e+04 R= 2e+04 +Depth= 110273 States= 2.38e+08 Transitions= 4.67e+09 Memory= 9826.779 t= 1.47e+04 R= 2e+04 +Depth= 110273 States= 2.39e+08 Transitions= 4.7e+09 Memory= 9853.342 t= 1.48e+04 R= 2e+04 +Depth= 110273 States= 2.4e+08 Transitions= 4.72e+09 Memory= 9879.709 t= 1.49e+04 R= 2e+04 +Depth= 110273 States= 2.41e+08 Transitions= 4.75e+09 Memory= 9906.174 t= 1.49e+04 R= 2e+04 +Depth= 110273 States= 2.42e+08 Transitions= 4.77e+09 Memory= 9934.006 t= 1.5e+04 R= 2e+04 +Depth= 110273 States= 2.43e+08 Transitions= 4.79e+09 Memory= 9960.471 t= 1.51e+04 R= 2e+04 +Depth= 110273 States= 2.44e+08 Transitions= 4.81e+09 Memory= 9987.229 t= 1.51e+04 R= 2e+04 +Depth= 110273 States= 2.45e+08 Transitions= 4.83e+09 Memory= 10014.084 t= 1.52e+04 R= 2e+04 +Depth= 110273 States= 2.46e+08 Transitions= 4.85e+09 Memory= 10040.842 t= 1.53e+04 R= 2e+04 +Depth= 110273 States= 2.47e+08 Transitions= 4.87e+09 Memory= 10067.404 t= 1.53e+04 R= 2e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 110273, errors: 0 +1.5183145e+08 states, stored (2.47605e+08 visited) +4.6348493e+09 states, matched +4.8824543e+09 transitions (= visited+matched) +7.5925477e+10 atomic steps +hash conflicts: 9.7802755e+08 (resolved) + +Stats on memory usage (in Megabytes): +16796.540 equivalent memory usage for states (stored*(State-vector + overhead)) + 7578.458 actual memory usage for states (compression: 45.12%) + state-vector as stored = 16 byte + 36 byte overhead + 2048.000 memory used for hash table (-w28) + 457.764 memory used for DFS stack (-m10000000) + 1.290 memory lost to fragmentation +10082.932 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 547261 4207 4043 2 2 ] +unreached in proctype urcu_reader + line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 104, "(1)" + line 249, "pan.___", state 112, "(1)" + line 253, "pan.___", state 124, "(1)" + line 257, "pan.___", state 132, "(1)" + line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 222, "(1)" + line 253, "pan.___", state 242, "(1)" + line 257, "pan.___", state 250, "(1)" + line 687, "pan.___", state 269, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 407, "pan.___", state 276, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 308, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 322, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 340, "(1)" + line 253, "pan.___", state 360, "(1)" + line 257, "pan.___", state 368, "(1)" + line 407, "pan.___", state 387, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 419, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 433, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 451, "(1)" + line 253, "pan.___", state 471, "(1)" + line 257, "pan.___", state 479, "(1)" + line 407, "pan.___", state 500, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 502, "(1)" + line 407, "pan.___", state 503, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 503, "else" + line 407, "pan.___", state 506, "(1)" + line 411, "pan.___", state 514, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 516, "(1)" + line 411, "pan.___", state 517, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 517, "else" + line 411, "pan.___", state 520, "(1)" + line 411, "pan.___", state 521, "(1)" + line 411, "pan.___", state 521, "(1)" + line 409, "pan.___", state 526, "((i<1))" + line 409, "pan.___", state 526, "((i>=1))" + line 416, "pan.___", state 532, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 534, "(1)" + line 416, "pan.___", state 535, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 535, "else" + line 416, "pan.___", state 538, "(1)" + line 416, "pan.___", state 539, "(1)" + line 416, "pan.___", state 539, "(1)" + line 420, "pan.___", state 546, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 548, "(1)" + line 420, "pan.___", state 549, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 549, "else" + line 420, "pan.___", state 552, "(1)" + line 420, "pan.___", state 553, "(1)" + line 420, "pan.___", state 553, "(1)" + line 418, "pan.___", state 558, "((i<2))" + line 418, "pan.___", state 558, "((i>=2))" + line 245, "pan.___", state 564, "(1)" + line 249, "pan.___", state 572, "(1)" + line 249, "pan.___", state 573, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 573, "else" + line 247, "pan.___", state 578, "((i<1))" + line 247, "pan.___", state 578, "((i>=1))" + line 253, "pan.___", state 584, "(1)" + line 253, "pan.___", state 585, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 585, "else" + line 257, "pan.___", state 592, "(1)" + line 257, "pan.___", state 593, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 593, "else" + line 255, "pan.___", state 598, "((i<2))" + line 255, "pan.___", state 598, "((i>=2))" + line 262, "pan.___", state 602, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 602, "else" + line 427, "pan.___", state 604, "(1)" + line 427, "pan.___", state 604, "(1)" + line 687, "pan.___", state 607, "cached_urcu_active_readers = (tmp+1)" + line 687, "pan.___", state 608, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 687, "pan.___", state 609, "(1)" + line 407, "pan.___", state 616, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 648, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 662, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 680, "(1)" + line 253, "pan.___", state 700, "(1)" + line 257, "pan.___", state 708, "(1)" + line 407, "pan.___", state 734, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 766, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 780, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 798, "(1)" + line 253, "pan.___", state 818, "(1)" + line 257, "pan.___", state 826, "(1)" + line 407, "pan.___", state 845, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 847, "(1)" + line 407, "pan.___", state 848, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 848, "else" + line 407, "pan.___", state 851, "(1)" + line 411, "pan.___", state 859, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 861, "(1)" + line 411, "pan.___", state 862, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 862, "else" + line 411, "pan.___", state 865, "(1)" + line 411, "pan.___", state 866, "(1)" + line 411, "pan.___", state 866, "(1)" + line 409, "pan.___", state 871, "((i<1))" + line 409, "pan.___", state 871, "((i>=1))" + line 416, "pan.___", state 877, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 879, "(1)" + line 416, "pan.___", state 880, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 880, "else" + line 416, "pan.___", state 883, "(1)" + line 416, "pan.___", state 884, "(1)" + line 416, "pan.___", state 884, "(1)" + line 420, "pan.___", state 891, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 893, "(1)" + line 420, "pan.___", state 894, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 894, "else" + line 420, "pan.___", state 897, "(1)" + line 420, "pan.___", state 898, "(1)" + line 420, "pan.___", state 898, "(1)" + line 418, "pan.___", state 903, "((i<2))" + line 418, "pan.___", state 903, "((i>=2))" + line 245, "pan.___", state 909, "(1)" + line 249, "pan.___", state 917, "(1)" + line 249, "pan.___", state 918, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 918, "else" + line 247, "pan.___", state 923, "((i<1))" + line 247, "pan.___", state 923, "((i>=1))" + line 253, "pan.___", state 929, "(1)" + line 253, "pan.___", state 930, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 930, "else" + line 257, "pan.___", state 937, "(1)" + line 257, "pan.___", state 938, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 938, "else" + line 255, "pan.___", state 943, "((i<2))" + line 255, "pan.___", state 943, "((i>=2))" + line 262, "pan.___", state 947, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 947, "else" + line 427, "pan.___", state 949, "(1)" + line 427, "pan.___", state 949, "(1)" + line 695, "pan.___", state 953, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 407, "pan.___", state 958, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 990, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1004, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1022, "(1)" + line 253, "pan.___", state 1042, "(1)" + line 257, "pan.___", state 1050, "(1)" + line 407, "pan.___", state 1072, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1104, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1118, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1136, "(1)" + line 253, "pan.___", state 1156, "(1)" + line 257, "pan.___", state 1164, "(1)" + line 407, "pan.___", state 1187, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1219, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1233, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1251, "(1)" + line 253, "pan.___", state 1271, "(1)" + line 257, "pan.___", state 1279, "(1)" + line 407, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1330, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1344, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1362, "(1)" + line 253, "pan.___", state 1382, "(1)" + line 257, "pan.___", state 1390, "(1)" + line 407, "pan.___", state 1414, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1446, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1460, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1478, "(1)" + line 253, "pan.___", state 1498, "(1)" + line 257, "pan.___", state 1506, "(1)" + line 407, "pan.___", state 1525, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1557, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1571, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1589, "(1)" + line 253, "pan.___", state 1609, "(1)" + line 257, "pan.___", state 1617, "(1)" + line 407, "pan.___", state 1639, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1671, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1685, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1703, "(1)" + line 253, "pan.___", state 1723, "(1)" + line 257, "pan.___", state 1731, "(1)" + line 734, "pan.___", state 1750, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 407, "pan.___", state 1757, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1789, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1803, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1821, "(1)" + line 253, "pan.___", state 1841, "(1)" + line 257, "pan.___", state 1849, "(1)" + line 407, "pan.___", state 1868, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1900, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1914, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1932, "(1)" + line 253, "pan.___", state 1952, "(1)" + line 257, "pan.___", state 1960, "(1)" + line 407, "pan.___", state 1981, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 1983, "(1)" + line 407, "pan.___", state 1984, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 1984, "else" + line 407, "pan.___", state 1987, "(1)" + line 411, "pan.___", state 1995, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 1997, "(1)" + line 411, "pan.___", state 1998, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 1998, "else" + line 411, "pan.___", state 2001, "(1)" + line 411, "pan.___", state 2002, "(1)" + line 411, "pan.___", state 2002, "(1)" + line 409, "pan.___", state 2007, "((i<1))" + line 409, "pan.___", state 2007, "((i>=1))" + line 416, "pan.___", state 2013, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 2015, "(1)" + line 416, "pan.___", state 2016, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 2016, "else" + line 416, "pan.___", state 2019, "(1)" + line 416, "pan.___", state 2020, "(1)" + line 416, "pan.___", state 2020, "(1)" + line 420, "pan.___", state 2027, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 2029, "(1)" + line 420, "pan.___", state 2030, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 2030, "else" + line 420, "pan.___", state 2033, "(1)" + line 420, "pan.___", state 2034, "(1)" + line 420, "pan.___", state 2034, "(1)" + line 418, "pan.___", state 2039, "((i<2))" + line 418, "pan.___", state 2039, "((i>=2))" + line 245, "pan.___", state 2045, "(1)" + line 249, "pan.___", state 2053, "(1)" + line 249, "pan.___", state 2054, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 2054, "else" + line 247, "pan.___", state 2059, "((i<1))" + line 247, "pan.___", state 2059, "((i>=1))" + line 253, "pan.___", state 2065, "(1)" + line 253, "pan.___", state 2066, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 2066, "else" + line 257, "pan.___", state 2073, "(1)" + line 257, "pan.___", state 2074, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 2074, "else" + line 255, "pan.___", state 2079, "((i<2))" + line 255, "pan.___", state 2079, "((i>=2))" + line 262, "pan.___", state 2083, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 2083, "else" + line 427, "pan.___", state 2085, "(1)" + line 427, "pan.___", state 2085, "(1)" + line 734, "pan.___", state 2088, "cached_urcu_active_readers = (tmp+1)" + line 734, "pan.___", state 2089, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 734, "pan.___", state 2090, "(1)" + line 407, "pan.___", state 2097, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2129, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2143, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 2161, "(1)" + line 253, "pan.___", state 2181, "(1)" + line 257, "pan.___", state 2189, "(1)" + line 407, "pan.___", state 2214, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2246, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2260, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 2278, "(1)" + line 253, "pan.___", state 2298, "(1)" + line 257, "pan.___", state 2306, "(1)" + line 407, "pan.___", state 2325, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2357, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2371, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 2389, "(1)" + line 253, "pan.___", state 2409, "(1)" + line 257, "pan.___", state 2417, "(1)" + line 245, "pan.___", state 2448, "(1)" + line 253, "pan.___", state 2468, "(1)" + line 257, "pan.___", state 2476, "(1)" + line 245, "pan.___", state 2491, "(1)" + line 253, "pan.___", state 2511, "(1)" + line 257, "pan.___", state 2519, "(1)" + line 929, "pan.___", state 2536, "-end-" + (221 of 2536 states) +unreached in proctype urcu_writer + line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 245, "pan.___", state 109, "(1)" + line 249, "pan.___", state 117, "(1)" + line 253, "pan.___", state 129, "(1)" + line 268, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 167, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 180, "cache_dirty_rcu_ptr = 0" + line 407, "pan.___", state 220, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 234, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 252, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 266, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 284, "(1)" + line 249, "pan.___", state 292, "(1)" + line 253, "pan.___", state 304, "(1)" + line 257, "pan.___", state 312, "(1)" + line 411, "pan.___", state 347, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 365, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 379, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 405, "(1)" + line 253, "pan.___", state 417, "(1)" + line 257, "pan.___", state 425, "(1)" + line 411, "pan.___", state 468, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 486, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 500, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 526, "(1)" + line 253, "pan.___", state 538, "(1)" + line 257, "pan.___", state 546, "(1)" + line 411, "pan.___", state 579, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 597, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 611, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 637, "(1)" + line 253, "pan.___", state 649, "(1)" + line 257, "pan.___", state 657, "(1)" + line 411, "pan.___", state 692, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 710, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 724, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 750, "(1)" + line 253, "pan.___", state 762, "(1)" + line 257, "pan.___", state 770, "(1)" + line 268, "pan.___", state 818, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 827, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 840, "cache_dirty_rcu_ptr = 0" + line 245, "pan.___", state 865, "(1)" + line 249, "pan.___", state 873, "(1)" + line 253, "pan.___", state 885, "(1)" + line 257, "pan.___", state 893, "(1)" + line 268, "pan.___", state 924, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 933, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 946, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 955, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 971, "(1)" + line 249, "pan.___", state 979, "(1)" + line 253, "pan.___", state 991, "(1)" + line 257, "pan.___", state 999, "(1)" + line 268, "pan.___", state 1020, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1029, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1044, "(1)" + line 280, "pan.___", state 1051, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1067, "(1)" + line 249, "pan.___", state 1075, "(1)" + line 253, "pan.___", state 1087, "(1)" + line 257, "pan.___", state 1095, "(1)" + line 268, "pan.___", state 1126, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1135, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1148, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1157, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1173, "(1)" + line 249, "pan.___", state 1181, "(1)" + line 253, "pan.___", state 1193, "(1)" + line 257, "pan.___", state 1201, "(1)" + line 272, "pan.___", state 1227, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1240, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1249, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1265, "(1)" + line 249, "pan.___", state 1273, "(1)" + line 253, "pan.___", state 1285, "(1)" + line 257, "pan.___", state 1293, "(1)" + line 268, "pan.___", state 1324, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1333, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1346, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1355, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1371, "(1)" + line 249, "pan.___", state 1379, "(1)" + line 253, "pan.___", state 1391, "(1)" + line 257, "pan.___", state 1399, "(1)" + line 272, "pan.___", state 1425, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1438, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1447, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1463, "(1)" + line 249, "pan.___", state 1471, "(1)" + line 253, "pan.___", state 1483, "(1)" + line 257, "pan.___", state 1491, "(1)" + line 268, "pan.___", state 1522, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1531, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1544, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1553, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1569, "(1)" + line 249, "pan.___", state 1577, "(1)" + line 253, "pan.___", state 1589, "(1)" + line 257, "pan.___", state 1597, "(1)" + line 272, "pan.___", state 1623, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1636, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1645, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1661, "(1)" + line 249, "pan.___", state 1669, "(1)" + line 253, "pan.___", state 1681, "(1)" + line 257, "pan.___", state 1689, "(1)" + line 268, "pan.___", state 1720, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1729, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1742, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1751, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1767, "(1)" + line 249, "pan.___", state 1775, "(1)" + line 253, "pan.___", state 1787, "(1)" + line 257, "pan.___", state 1795, "(1)" + line 1304, "pan.___", state 1811, "-end-" + (118 of 1811 states) +unreached in proctype :init: + (0 of 28 states) +unreached in proctype :never: + line 1369, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 1.54e+04 seconds +pan: rate 16109.46 states/second +pan: avg transition delay 3.148e-06 usec +cp .input.spin urcu_progress_reader.spin.input +cp .input.spin.trail urcu_progress_reader.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.spin.input b/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.spin.input new file mode 100644 index 0000000..83c0751 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_reader.spin.input @@ -0,0 +1,1340 @@ +#define READER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.define b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.log b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.log new file mode 100644 index 0000000..a04140c --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.log @@ -0,0 +1,681 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1362) +depth 7: Claim reached state 9 (line 1367) +depth 50: Claim reached state 9 (line 1366) +Depth= 7070 States= 1e+06 Transitions= 1.16e+07 Memory= 493.010 t= 34.5 R= 3e+04 +Depth= 7070 States= 2e+06 Transitions= 2.31e+07 Memory= 521.330 t= 69.3 R= 3e+04 +Depth= 7070 States= 3e+06 Transitions= 3.43e+07 Memory= 549.455 t= 103 R= 3e+04 +pan: resizing hashtable to -w22.. done +Depth= 8814 States= 4e+06 Transitions= 4.57e+07 Memory= 607.041 t= 138 R= 3e+04 +Depth= 8814 States= 5e+06 Transitions= 5.73e+07 Memory= 632.920 t= 174 R= 3e+04 +Depth= 8814 States= 6e+06 Transitions= 7.04e+07 Memory= 662.217 t= 215 R= 3e+04 +Depth= 8814 States= 7e+06 Transitions= 8.38e+07 Memory= 690.049 t= 257 R= 3e+04 +Depth= 8814 States= 8e+06 Transitions= 9.59e+07 Memory= 717.588 t= 294 R= 3e+04 +Depth= 8814 States= 9e+06 Transitions= 1.08e+08 Memory= 745.127 t= 332 R= 3e+04 +pan: resizing hashtable to -w24.. done +Depth= 8814 States= 1e+07 Transitions= 1.29e+08 Memory= 897.639 t= 398 R= 3e+04 +Depth= 8814 States= 1.1e+07 Transitions= 1.41e+08 Memory= 926.154 t= 434 R= 3e+04 +Depth= 8814 States= 1.2e+07 Transitions= 1.53e+08 Memory= 953.401 t= 471 R= 3e+04 +Depth= 8814 States= 1.3e+07 Transitions= 1.64e+08 Memory= 980.940 t= 505 R= 3e+04 +Depth= 8814 States= 1.4e+07 Transitions= 1.75e+08 Memory= 1010.725 t= 539 R= 3e+04 +Depth= 8814 States= 1.5e+07 Transitions= 1.87e+08 Memory= 1037.580 t= 573 R= 3e+04 +Depth= 8814 States= 1.6e+07 Transitions= 1.98e+08 Memory= 1064.924 t= 607 R= 3e+04 +Depth= 8814 States= 1.7e+07 Transitions= 2.09e+08 Memory= 1094.904 t= 641 R= 3e+04 +Depth= 8814 States= 1.8e+07 Transitions= 2.23e+08 Memory= 1119.514 t= 683 R= 3e+04 +Depth= 8814 States= 1.9e+07 Transitions= 2.36e+08 Memory= 1146.662 t= 725 R= 3e+04 +Depth= 8814 States= 2e+07 Transitions= 2.57e+08 Memory= 1174.201 t= 790 R= 3e+04 +Depth= 8814 States= 2.1e+07 Transitions= 2.93e+08 Memory= 1205.549 t= 908 R= 2e+04 +Depth= 9015 States= 2.2e+07 Transitions= 3.11e+08 Memory= 1235.822 t= 965 R= 2e+04 +Depth= 9015 States= 2.3e+07 Transitions= 3.25e+08 Memory= 1264.533 t= 1.01e+03 R= 2e+04 +Depth= 9015 States= 2.4e+07 Transitions= 3.45e+08 Memory= 1293.244 t= 1.07e+03 R= 2e+04 +Depth= 9015 States= 2.5e+07 Transitions= 3.67e+08 Memory= 1321.467 t= 1.14e+03 R= 2e+04 +Depth= 9015 States= 2.6e+07 Transitions= 3.84e+08 Memory= 1350.764 t= 1.2e+03 R= 2e+04 +Depth= 9015 States= 2.7e+07 Transitions= 4.07e+08 Memory= 1380.158 t= 1.27e+03 R= 2e+04 +Depth= 9015 States= 2.8e+07 Transitions= 4.29e+08 Memory= 1405.940 t= 1.34e+03 R= 2e+04 +Depth= 9015 States= 2.9e+07 Transitions= 4.48e+08 Memory= 1433.381 t= 1.4e+03 R= 2e+04 +Depth= 9015 States= 3e+07 Transitions= 4.66e+08 Memory= 1461.506 t= 1.46e+03 R= 2e+04 +Depth= 9015 States= 3.1e+07 Transitions= 4.86e+08 Memory= 1489.143 t= 1.52e+03 R= 2e+04 +Depth= 9015 States= 3.2e+07 Transitions= 5.1e+08 Memory= 1516.486 t= 1.6e+03 R= 2e+04 +Depth= 9015 States= 3.3e+07 Transitions= 5.29e+08 Memory= 1543.733 t= 1.66e+03 R= 2e+04 +Depth= 9015 States= 3.4e+07 Transitions= 5.47e+08 Memory= 1571.760 t= 1.72e+03 R= 2e+04 +pan: resizing hashtable to -w26.. done +Depth= 9015 States= 3.5e+07 Transitions= 5.69e+08 Memory= 2095.088 t= 1.79e+03 R= 2e+04 +Depth= 9015 States= 3.6e+07 Transitions= 5.95e+08 Memory= 2122.041 t= 1.87e+03 R= 2e+04 +Depth= 9015 States= 3.7e+07 Transitions= 6.12e+08 Memory= 2149.971 t= 1.93e+03 R= 2e+04 +Depth= 9015 States= 3.8e+07 Transitions= 6.29e+08 Memory= 2176.045 t= 1.98e+03 R= 2e+04 +Depth= 9015 States= 3.9e+07 Transitions= 6.42e+08 Memory= 2204.268 t= 2.02e+03 R= 2e+04 +Depth= 9015 States= 4e+07 Transitions= 6.56e+08 Memory= 2233.565 t= 2.06e+03 R= 2e+04 +Depth= 9015 States= 4.1e+07 Transitions= 6.69e+08 Memory= 2264.424 t= 2.1e+03 R= 2e+04 +Depth= 9015 States= 4.2e+07 Transitions= 6.82e+08 Memory= 2292.940 t= 2.14e+03 R= 2e+04 +Depth= 9015 States= 4.3e+07 Transitions= 6.95e+08 Memory= 2322.529 t= 2.18e+03 R= 2e+04 +Depth= 9015 States= 4.4e+07 Transitions= 7.07e+08 Memory= 2350.654 t= 2.22e+03 R= 2e+04 +Depth= 9015 States= 4.5e+07 Transitions= 7.28e+08 Memory= 2378.193 t= 2.29e+03 R= 2e+04 +Depth= 9015 States= 4.6e+07 Transitions= 7.63e+08 Memory= 2409.443 t= 2.4e+03 R= 2e+04 +Depth= 9015 States= 4.7e+07 Transitions= 7.99e+08 Memory= 2445.088 t= 2.52e+03 R= 2e+04 +Depth= 9015 States= 4.8e+07 Transitions= 8.49e+08 Memory= 2479.072 t= 2.69e+03 R= 2e+04 +Depth= 9015 States= 4.9e+07 Transitions= 8.91e+08 Memory= 2508.076 t= 2.82e+03 R= 2e+04 +Depth= 9015 States= 5e+07 Transitions= 9.24e+08 Memory= 2532.295 t= 2.93e+03 R= 2e+04 +Depth= 9015 States= 5.1e+07 Transitions= 9.39e+08 Memory= 2561.494 t= 2.98e+03 R= 2e+04 +Depth= 9015 States= 5.2e+07 Transitions= 9.6e+08 Memory= 2589.522 t= 3.05e+03 R= 2e+04 +Depth= 9015 States= 5.3e+07 Transitions= 9.99e+08 Memory= 2617.158 t= 3.17e+03 R= 2e+04 +Depth= 9015 States= 5.4e+07 Transitions= 1.01e+09 Memory= 2647.725 t= 3.22e+03 R= 2e+04 +Depth= 9015 States= 5.5e+07 Transitions= 1.03e+09 Memory= 2674.580 t= 3.27e+03 R= 2e+04 +Depth= 9015 States= 5.6e+07 Transitions= 1.05e+09 Memory= 2701.143 t= 3.32e+03 R= 2e+04 +Depth= 9015 States= 5.7e+07 Transitions= 1.06e+09 Memory= 2730.928 t= 3.36e+03 R= 2e+04 +Depth= 9015 States= 5.8e+07 Transitions= 1.09e+09 Memory= 2759.053 t= 3.45e+03 R= 2e+04 +Depth= 9015 States= 5.9e+07 Transitions= 1.1e+09 Memory= 2786.983 t= 3.5e+03 R= 2e+04 +Depth= 9015 States= 6e+07 Transitions= 1.13e+09 Memory= 2814.619 t= 3.6e+03 R= 2e+04 +Depth= 9015 States= 6.1e+07 Transitions= 1.15e+09 Memory= 2841.670 t= 3.66e+03 R= 2e+04 +Depth= 9015 States= 6.2e+07 Transitions= 1.19e+09 Memory= 2870.576 t= 3.77e+03 R= 2e+04 +Depth= 9015 States= 6.3e+07 Transitions= 1.21e+09 Memory= 2897.627 t= 3.84e+03 R= 2e+04 +Depth= 9015 States= 6.4e+07 Transitions= 1.24e+09 Memory= 2925.166 t= 3.94e+03 R= 2e+04 +Depth= 9015 States= 6.5e+07 Transitions= 1.26e+09 Memory= 2952.803 t= 4.01e+03 R= 2e+04 +Depth= 9015 States= 6.6e+07 Transitions= 1.28e+09 Memory= 2979.756 t= 4.09e+03 R= 2e+04 +Depth= 9015 States= 6.7e+07 Transitions= 1.3e+09 Memory= 3007.686 t= 4.15e+03 R= 2e+04 +Depth= 9015 States= 6.8e+07 Transitions= 1.33e+09 Memory= 3035.811 t= 4.23e+03 R= 2e+04 +Depth= 9015 States= 6.9e+07 Transitions= 1.36e+09 Memory= 3063.838 t= 4.32e+03 R= 2e+04 +Depth= 9522 States= 7e+07 Transitions= 1.38e+09 Memory= 3094.795 t= 4.39e+03 R= 2e+04 +Depth= 9522 States= 7.1e+07 Transitions= 1.39e+09 Memory= 3120.186 t= 4.43e+03 R= 2e+04 +Depth= 9522 States= 7.2e+07 Transitions= 1.41e+09 Memory= 3149.971 t= 4.5e+03 R= 2e+04 +Depth= 9553 States= 7.3e+07 Transitions= 1.44e+09 Memory= 3179.365 t= 4.57e+03 R= 2e+04 +Depth= 9553 States= 7.4e+07 Transitions= 1.45e+09 Memory= 3205.244 t= 4.61e+03 R= 2e+04 +Depth= 9553 States= 7.5e+07 Transitions= 1.47e+09 Memory= 3235.225 t= 4.69e+03 R= 2e+04 +Depth= 9553 States= 7.6e+07 Transitions= 1.49e+09 Memory= 3263.545 t= 4.75e+03 R= 2e+04 +Depth= 9553 States= 7.7e+07 Transitions= 1.51e+09 Memory= 3290.401 t= 4.8e+03 R= 2e+04 +Depth= 9553 States= 7.8e+07 Transitions= 1.52e+09 Memory= 3319.795 t= 4.84e+03 R= 2e+04 +Depth= 9553 States= 7.9e+07 Transitions= 1.54e+09 Memory= 3349.190 t= 4.91e+03 R= 2e+04 +Depth= 9553 States= 8e+07 Transitions= 1.56e+09 Memory= 3377.803 t= 4.98e+03 R= 2e+04 +Depth= 9553 States= 8.1e+07 Transitions= 1.58e+09 Memory= 3406.904 t= 5.04e+03 R= 2e+04 +Depth= 9553 States= 8.2e+07 Transitions= 1.6e+09 Memory= 3434.443 t= 5.08e+03 R= 2e+04 +Depth= 9553 States= 8.3e+07 Transitions= 1.61e+09 Memory= 3462.178 t= 5.14e+03 R= 2e+04 +Depth= 9553 States= 8.4e+07 Transitions= 1.63e+09 Memory= 3490.205 t= 5.18e+03 R= 2e+04 +Depth= 9553 States= 8.5e+07 Transitions= 1.65e+09 Memory= 3517.549 t= 5.24e+03 R= 2e+04 +Depth= 9553 States= 8.6e+07 Transitions= 1.67e+09 Memory= 3544.502 t= 5.31e+03 R= 2e+04 +Depth= 9553 States= 8.7e+07 Transitions= 1.69e+09 Memory= 3574.190 t= 5.38e+03 R= 2e+04 +Depth= 9553 States= 8.8e+07 Transitions= 1.7e+09 Memory= 3606.026 t= 5.42e+03 R= 2e+04 +Depth= 9553 States= 8.9e+07 Transitions= 1.72e+09 Memory= 3632.588 t= 5.48e+03 R= 2e+04 +Depth= 9553 States= 9e+07 Transitions= 1.74e+09 Memory= 3662.080 t= 5.53e+03 R= 2e+04 +Depth= 9553 States= 9.1e+07 Transitions= 1.76e+09 Memory= 3689.229 t= 5.59e+03 R= 2e+04 +Depth= 9553 States= 9.2e+07 Transitions= 1.78e+09 Memory= 3716.572 t= 5.65e+03 R= 2e+04 +Depth= 9553 States= 9.3e+07 Transitions= 1.8e+09 Memory= 3743.135 t= 5.72e+03 R= 2e+04 +Depth= 9553 States= 9.4e+07 Transitions= 1.82e+09 Memory= 3771.553 t= 5.8e+03 R= 2e+04 +Depth= 9553 States= 9.5e+07 Transitions= 1.84e+09 Memory= 3801.436 t= 5.86e+03 R= 2e+04 +Depth= 9553 States= 9.6e+07 Transitions= 1.86e+09 Memory= 3827.803 t= 5.91e+03 R= 2e+04 +Depth= 9553 States= 9.7e+07 Transitions= 1.88e+09 Memory= 3857.881 t= 5.99e+03 R= 2e+04 +Depth= 9553 States= 9.8e+07 Transitions= 1.9e+09 Memory= 3886.494 t= 6.03e+03 R= 2e+04 +Depth= 9553 States= 9.9e+07 Transitions= 1.91e+09 Memory= 3914.229 t= 6.08e+03 R= 2e+04 +Depth= 9553 States= 1e+08 Transitions= 1.93e+09 Memory= 3942.549 t= 6.13e+03 R= 2e+04 +Depth= 9553 States= 1.01e+08 Transitions= 1.94e+09 Memory= 3972.236 t= 6.19e+03 R= 2e+04 +Depth= 9553 States= 1.02e+08 Transitions= 1.96e+09 Memory= 4001.729 t= 6.24e+03 R= 2e+04 +Depth= 9553 States= 1.03e+08 Transitions= 1.98e+09 Memory= 4030.049 t= 6.3e+03 R= 2e+04 +Depth= 9553 States= 1.04e+08 Transitions= 2e+09 Memory= 4059.639 t= 6.38e+03 R= 2e+04 +Depth= 9553 States= 1.05e+08 Transitions= 2.02e+09 Memory= 4086.006 t= 6.43e+03 R= 2e+04 +Depth= 9553 States= 1.06e+08 Transitions= 2.04e+09 Memory= 4115.889 t= 6.49e+03 R= 2e+04 +Depth= 9553 States= 1.07e+08 Transitions= 2.06e+09 Memory= 4144.990 t= 6.55e+03 R= 2e+04 +Depth= 9553 States= 1.08e+08 Transitions= 2.07e+09 Memory= 4172.822 t= 6.6e+03 R= 2e+04 +Depth= 9553 States= 1.09e+08 Transitions= 2.09e+09 Memory= 4200.752 t= 6.65e+03 R= 2e+04 +Depth= 9553 States= 1.1e+08 Transitions= 2.11e+09 Memory= 4230.147 t= 6.7e+03 R= 2e+04 +Depth= 9553 States= 1.11e+08 Transitions= 2.12e+09 Memory= 4259.932 t= 6.75e+03 R= 2e+04 +Depth= 9553 States= 1.12e+08 Transitions= 2.14e+09 Memory= 4284.541 t= 6.81e+03 R= 2e+04 +Depth= 9553 States= 1.13e+08 Transitions= 2.16e+09 Memory= 4312.471 t= 6.86e+03 R= 2e+04 +Depth= 9553 States= 1.14e+08 Transitions= 2.17e+09 Memory= 4340.401 t= 6.91e+03 R= 2e+04 +Depth= 9553 States= 1.15e+08 Transitions= 2.19e+09 Memory= 4368.526 t= 6.97e+03 R= 2e+04 +Depth= 9553 States= 1.16e+08 Transitions= 2.21e+09 Memory= 4396.651 t= 7.02e+03 R= 2e+04 +Depth= 9553 States= 1.17e+08 Transitions= 2.23e+09 Memory= 4423.897 t= 7.1e+03 R= 2e+04 +Depth= 9553 States= 1.18e+08 Transitions= 2.27e+09 Memory= 4453.779 t= 7.22e+03 R= 2e+04 +Depth= 9553 States= 1.19e+08 Transitions= 2.29e+09 Memory= 4483.955 t= 7.29e+03 R= 2e+04 +Depth= 9553 States= 1.2e+08 Transitions= 2.3e+09 Memory= 4513.545 t= 7.33e+03 R= 2e+04 +Depth= 9553 States= 1.21e+08 Transitions= 2.32e+09 Memory= 4541.279 t= 7.4e+03 R= 2e+04 +Depth= 9553 States= 1.22e+08 Transitions= 2.34e+09 Memory= 4569.893 t= 7.45e+03 R= 2e+04 +Depth= 9553 States= 1.23e+08 Transitions= 2.36e+09 Memory= 4599.483 t= 7.52e+03 R= 2e+04 +Depth= 9553 States= 1.24e+08 Transitions= 2.38e+09 Memory= 4627.705 t= 7.58e+03 R= 2e+04 +Depth= 9553 States= 1.25e+08 Transitions= 2.41e+09 Memory= 4654.658 t= 7.68e+03 R= 2e+04 +Depth= 9553 States= 1.26e+08 Transitions= 2.43e+09 Memory= 4681.807 t= 7.76e+03 R= 2e+04 +Depth= 9553 States= 1.27e+08 Transitions= 2.45e+09 Memory= 4708.760 t= 7.83e+03 R= 2e+04 +Depth= 9553 States= 1.28e+08 Transitions= 2.48e+09 Memory= 4735.518 t= 7.93e+03 R= 2e+04 +Depth= 9553 States= 1.29e+08 Transitions= 2.5e+09 Memory= 4762.178 t= 8e+03 R= 2e+04 +Depth= 9553 States= 1.3e+08 Transitions= 2.52e+09 Memory= 4790.303 t= 8.07e+03 R= 2e+04 +Depth= 9553 States= 1.31e+08 Transitions= 2.55e+09 Memory= 4817.451 t= 8.15e+03 R= 2e+04 +Depth= 9553 States= 1.32e+08 Transitions= 2.57e+09 Memory= 4845.186 t= 8.22e+03 R= 2e+04 +Depth= 9553 States= 1.33e+08 Transitions= 2.59e+09 Memory= 4872.139 t= 8.3e+03 R= 2e+04 +Depth= 9553 States= 1.34e+08 Transitions= 2.61e+09 Memory= 4900.850 t= 8.37e+03 R= 2e+04 +Depth= 9553 States= 1.35e+08 Transitions= 2.63e+09 Memory= 4927.803 t= 8.43e+03 R= 2e+04 +pan: resizing hashtable to -w28.. done +Depth= 9553 States= 1.36e+08 Transitions= 2.65e+09 Memory= 6975.803 t= 8.5e+03 R= 2e+04 +Depth= 9553 States= 1.37e+08 Transitions= 2.66e+09 Memory= 6975.803 t= 8.54e+03 R= 2e+04 +Depth= 9553 States= 1.38e+08 Transitions= 2.67e+09 Memory= 6996.799 t= 8.58e+03 R= 2e+04 +Depth= 9553 States= 1.39e+08 Transitions= 2.69e+09 Memory= 7026.779 t= 8.62e+03 R= 2e+04 +Depth= 9553 States= 1.4e+08 Transitions= 2.7e+09 Memory= 7056.467 t= 8.68e+03 R= 2e+04 +Depth= 9553 States= 1.41e+08 Transitions= 2.72e+09 Memory= 7084.787 t= 8.72e+03 R= 2e+04 +Depth= 9553 States= 1.42e+08 Transitions= 2.74e+09 Memory= 7114.084 t= 8.77e+03 R= 2e+04 +Depth= 9553 States= 1.43e+08 Transitions= 2.75e+09 Memory= 7143.088 t= 8.82e+03 R= 2e+04 +Depth= 9553 States= 1.44e+08 Transitions= 2.77e+09 Memory= 7170.920 t= 8.88e+03 R= 2e+04 +Depth= 9553 States= 1.45e+08 Transitions= 2.79e+09 Memory= 7198.166 t= 8.94e+03 R= 2e+04 +Depth= 9553 States= 1.46e+08 Transitions= 2.82e+09 Memory= 7229.514 t= 9.06e+03 R= 2e+04 +Depth= 9553 States= 1.47e+08 Transitions= 2.86e+09 Memory= 7265.158 t= 9.18e+03 R= 2e+04 +Depth= 9553 States= 1.48e+08 Transitions= 2.91e+09 Memory= 7299.143 t= 9.34e+03 R= 2e+04 +Depth= 9553 States= 1.49e+08 Transitions= 2.95e+09 Memory= 7327.170 t= 9.47e+03 R= 2e+04 +Depth= 9553 States= 1.5e+08 Transitions= 2.99e+09 Memory= 7352.561 t= 9.59e+03 R= 2e+04 +Depth= 9553 States= 1.51e+08 Transitions= 3e+09 Memory= 7380.881 t= 9.64e+03 R= 2e+04 +Depth= 9553 States= 1.52e+08 Transitions= 3.02e+09 Memory= 7408.908 t= 9.7e+03 R= 2e+04 +Depth= 9553 States= 1.53e+08 Transitions= 3.05e+09 Memory= 7437.033 t= 9.8e+03 R= 2e+04 +Depth= 9553 States= 1.54e+08 Transitions= 3.08e+09 Memory= 7465.744 t= 9.89e+03 R= 2e+04 +Depth= 9553 States= 1.55e+08 Transitions= 3.1e+09 Memory= 7493.869 t= 9.95e+03 R= 2e+04 +Depth= 9553 States= 1.56e+08 Transitions= 3.11e+09 Memory= 7520.529 t= 9.99e+03 R= 2e+04 +Depth= 9553 States= 1.57e+08 Transitions= 3.13e+09 Memory= 7547.092 t= 1e+04 R= 2e+04 +Depth= 9553 States= 1.58e+08 Transitions= 3.14e+09 Memory= 7577.170 t= 1.01e+04 R= 2e+04 +Depth= 9553 States= 1.59e+08 Transitions= 3.17e+09 Memory= 7604.611 t= 1.02e+04 R= 2e+04 +Depth= 9553 States= 1.6e+08 Transitions= 3.19e+09 Memory= 7631.955 t= 1.02e+04 R= 2e+04 +Depth= 9553 States= 1.61e+08 Transitions= 3.21e+09 Memory= 7659.299 t= 1.03e+04 R= 2e+04 +Depth= 9553 States= 1.62e+08 Transitions= 3.24e+09 Memory= 7686.740 t= 1.04e+04 R= 2e+04 +Depth= 9553 States= 1.63e+08 Transitions= 3.27e+09 Memory= 7713.791 t= 1.05e+04 R= 2e+04 +Depth= 9553 States= 1.64e+08 Transitions= 3.29e+09 Memory= 7743.186 t= 1.06e+04 R= 2e+04 +Depth= 9553 States= 1.65e+08 Transitions= 3.31e+09 Memory= 7771.604 t= 1.06e+04 R= 2e+04 +Depth= 9553 States= 1.66e+08 Transitions= 3.34e+09 Memory= 7797.971 t= 1.07e+04 R= 2e+04 +Depth= 9553 States= 1.67e+08 Transitions= 3.37e+09 Memory= 7825.217 t= 1.08e+04 R= 2e+04 +Depth= 9553 States= 1.68e+08 Transitions= 3.39e+09 Memory= 7853.733 t= 1.09e+04 R= 2e+04 +Depth= 9553 States= 1.69e+08 Transitions= 3.41e+09 Memory= 7880.686 t= 1.09e+04 R= 2e+04 +Depth= 9553 States= 1.7e+08 Transitions= 3.44e+09 Memory= 7909.690 t= 1.1e+04 R= 2e+04 +Depth= 9553 States= 1.71e+08 Transitions= 3.46e+09 Memory= 7939.279 t= 1.11e+04 R= 2e+04 +Depth= 9553 States= 1.72e+08 Transitions= 3.47e+09 Memory= 7964.768 t= 1.11e+04 R= 2e+04 +Depth= 9553 States= 1.73e+08 Transitions= 3.5e+09 Memory= 7994.260 t= 1.12e+04 R= 2e+04 +Depth= 9553 States= 1.74e+08 Transitions= 3.52e+09 Memory= 8023.850 t= 1.13e+04 R= 2e+04 +Depth= 9553 States= 1.75e+08 Transitions= 3.53e+09 Memory= 8051.877 t= 1.13e+04 R= 2e+04 +Depth= 9553 States= 1.76e+08 Transitions= 3.56e+09 Memory= 8080.979 t= 1.14e+04 R= 2e+04 +Depth= 9553 States= 1.77e+08 Transitions= 3.57e+09 Memory= 8107.834 t= 1.15e+04 R= 2e+04 +Depth= 9553 States= 1.78e+08 Transitions= 3.59e+09 Memory= 8137.033 t= 1.15e+04 R= 2e+04 +Depth= 9553 States= 1.79e+08 Transitions= 3.61e+09 Memory= 8165.158 t= 1.16e+04 R= 2e+04 +Depth= 9553 States= 1.8e+08 Transitions= 3.63e+09 Memory= 8194.065 t= 1.16e+04 R= 2e+04 +Depth= 9553 States= 1.81e+08 Transitions= 3.65e+09 Memory= 8222.971 t= 1.17e+04 R= 2e+04 +Depth= 9553 States= 1.82e+08 Transitions= 3.66e+09 Memory= 8251.096 t= 1.17e+04 R= 2e+04 +Depth= 9553 States= 1.83e+08 Transitions= 3.68e+09 Memory= 8279.514 t= 1.18e+04 R= 2e+04 +Depth= 9553 States= 1.84e+08 Transitions= 3.69e+09 Memory= 8307.151 t= 1.18e+04 R= 2e+04 +Depth= 9553 States= 1.85e+08 Transitions= 3.71e+09 Memory= 8334.787 t= 1.19e+04 R= 2e+04 +Depth= 9553 States= 1.86e+08 Transitions= 3.73e+09 Memory= 8361.838 t= 1.2e+04 R= 2e+04 +Depth= 9553 States= 1.87e+08 Transitions= 3.75e+09 Memory= 8392.209 t= 1.2e+04 R= 2e+04 +Depth= 9553 States= 1.88e+08 Transitions= 3.77e+09 Memory= 8423.361 t= 1.21e+04 R= 2e+04 +Depth= 9553 States= 1.89e+08 Transitions= 3.78e+09 Memory= 8449.826 t= 1.21e+04 R= 2e+04 +Depth= 9553 States= 1.9e+08 Transitions= 3.8e+09 Memory= 8479.026 t= 1.22e+04 R= 2e+04 +Depth= 9553 States= 1.91e+08 Transitions= 3.82e+09 Memory= 8506.076 t= 1.22e+04 R= 2e+04 +Depth= 9553 States= 1.92e+08 Transitions= 3.84e+09 Memory= 8533.029 t= 1.23e+04 R= 2e+04 +Depth= 9553 States= 1.93e+08 Transitions= 3.86e+09 Memory= 8563.889 t= 1.24e+04 R= 2e+04 +Depth= 9553 States= 1.94e+08 Transitions= 3.88e+09 Memory= 8590.744 t= 1.24e+04 R= 2e+04 +Depth= 9553 States= 1.95e+08 Transitions= 3.9e+09 Memory= 8620.334 t= 1.25e+04 R= 2e+04 +Depth= 9553 States= 1.96e+08 Transitions= 3.92e+09 Memory= 8649.826 t= 1.25e+04 R= 2e+04 +Depth= 9553 States= 1.97e+08 Transitions= 3.93e+09 Memory= 8676.486 t= 1.26e+04 R= 2e+04 +Depth= 9553 States= 1.98e+08 Transitions= 3.95e+09 Memory= 8705.197 t= 1.26e+04 R= 2e+04 +Depth= 9553 States= 1.99e+08 Transitions= 3.96e+09 Memory= 8734.006 t= 1.27e+04 R= 2e+04 +Depth= 9553 States= 2e+08 Transitions= 3.98e+09 Memory= 8764.279 t= 1.27e+04 R= 2e+04 +Depth= 9553 States= 2.01e+08 Transitions= 4e+09 Memory= 8792.209 t= 1.28e+04 R= 2e+04 +Depth= 9553 States= 2.02e+08 Transitions= 4.03e+09 Memory= 8821.408 t= 1.29e+04 R= 2e+04 +Depth= 9553 States= 2.03e+08 Transitions= 4.04e+09 Memory= 8849.338 t= 1.29e+04 R= 2e+04 +Depth= 9553 States= 2.04e+08 Transitions= 4.06e+09 Memory= 8878.733 t= 1.3e+04 R= 2e+04 +Depth= 9553 States= 2.05e+08 Transitions= 4.08e+09 Memory= 8908.322 t= 1.31e+04 R= 2e+04 +Depth= 9553 States= 2.06e+08 Transitions= 4.09e+09 Memory= 8934.494 t= 1.31e+04 R= 2e+04 +Depth= 9553 States= 2.07e+08 Transitions= 4.11e+09 Memory= 8963.498 t= 1.32e+04 R= 2e+04 +Depth= 9553 States= 2.08e+08 Transitions= 4.13e+09 Memory= 8991.818 t= 1.32e+04 R= 2e+04 +Depth= 9553 States= 2.09e+08 Transitions= 4.14e+09 Memory= 9022.287 t= 1.33e+04 R= 2e+04 +Depth= 9553 States= 2.1e+08 Transitions= 4.16e+09 Memory= 9047.580 t= 1.33e+04 R= 2e+04 +Depth= 9553 States= 2.11e+08 Transitions= 4.18e+09 Memory= 9075.412 t= 1.34e+04 R= 2e+04 +Depth= 9553 States= 2.12e+08 Transitions= 4.19e+09 Memory= 9103.244 t= 1.34e+04 R= 2e+04 +Depth= 9553 States= 2.13e+08 Transitions= 4.21e+09 Memory= 9131.467 t= 1.35e+04 R= 2e+04 +Depth= 9553 States= 2.14e+08 Transitions= 4.22e+09 Memory= 9159.006 t= 1.35e+04 R= 2e+04 +Depth= 9553 States= 2.15e+08 Transitions= 4.26e+09 Memory= 9188.010 t= 1.36e+04 R= 2e+04 +Depth= 9553 States= 2.16e+08 Transitions= 4.29e+09 Memory= 9218.283 t= 1.37e+04 R= 2e+04 +Depth= 9553 States= 2.17e+08 Transitions= 4.3e+09 Memory= 9246.897 t= 1.37e+04 R= 2e+04 +Depth= 9553 States= 2.18e+08 Transitions= 4.32e+09 Memory= 9276.193 t= 1.38e+04 R= 2e+04 +Depth= 9553 States= 2.19e+08 Transitions= 4.33e+09 Memory= 9305.002 t= 1.39e+04 R= 2e+04 +Depth= 9553 States= 2.2e+08 Transitions= 4.35e+09 Memory= 9334.299 t= 1.39e+04 R= 2e+04 +Depth= 9553 States= 2.21e+08 Transitions= 4.37e+09 Memory= 9362.619 t= 1.4e+04 R= 2e+04 +Depth= 9553 States= 2.22e+08 Transitions= 4.4e+09 Memory= 9388.108 t= 1.41e+04 R= 2e+04 +Depth= 9553 States= 2.23e+08 Transitions= 4.43e+09 Memory= 9415.354 t= 1.42e+04 R= 2e+04 +Depth= 9553 States= 2.24e+08 Transitions= 4.45e+09 Memory= 9442.111 t= 1.42e+04 R= 2e+04 +Depth= 9553 States= 2.25e+08 Transitions= 4.48e+09 Memory= 9468.967 t= 1.43e+04 R= 2e+04 +Depth= 9553 States= 2.26e+08 Transitions= 4.5e+09 Memory= 9495.041 t= 1.44e+04 R= 2e+04 +Depth= 9553 States= 2.27e+08 Transitions= 4.52e+09 Memory= 9522.580 t= 1.44e+04 R= 2e+04 +Depth= 9553 States= 2.28e+08 Transitions= 4.54e+09 Memory= 9549.631 t= 1.45e+04 R= 2e+04 +Depth= 9553 States= 2.29e+08 Transitions= 4.56e+09 Memory= 9576.096 t= 1.46e+04 R= 2e+04 +Depth= 9553 States= 2.3e+08 Transitions= 4.59e+09 Memory= 9602.268 t= 1.47e+04 R= 2e+04 +Depth= 9553 States= 2.31e+08 Transitions= 4.6e+09 Memory= 9630.197 t= 1.47e+04 R= 2e+04 +Depth= 9553 States= 2.32e+08 Transitions= 4.63e+09 Memory= 9656.858 t= 1.48e+04 R= 2e+04 +Depth= 9553 States= 2.33e+08 Transitions= 4.66e+09 Memory= 9683.713 t= 1.49e+04 R= 2e+04 +Depth= 9553 States= 2.34e+08 Transitions= 4.68e+09 Memory= 9710.373 t= 1.5e+04 R= 2e+04 +Depth= 9553 States= 2.35e+08 Transitions= 4.7e+09 Memory= 9738.108 t= 1.5e+04 R= 2e+04 +Depth= 9553 States= 2.36e+08 Transitions= 4.72e+09 Memory= 9765.158 t= 1.51e+04 R= 2e+04 +Depth= 9553 States= 2.37e+08 Transitions= 4.74e+09 Memory= 9792.404 t= 1.52e+04 R= 2e+04 +Depth= 9553 States= 2.38e+08 Transitions= 4.77e+09 Memory= 9818.576 t= 1.52e+04 R= 2e+04 +Depth= 9553 States= 2.39e+08 Transitions= 4.79e+09 Memory= 9845.432 t= 1.53e+04 R= 2e+04 +Depth= 9553 States= 2.4e+08 Transitions= 4.8e+09 Memory= 9871.701 t= 1.53e+04 R= 2e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 9553, errors: 0 +1.4728139e+08 states, stored (2.40187e+08 visited) +4.565323e+09 states, matched +4.8055096e+09 transitions (= visited+matched) +7.4787137e+10 atomic steps +hash conflicts: 1.0275497e+09 (resolved) + +Stats on memory usage (in Megabytes): +16293.183 equivalent memory usage for states (stored*(State-vector + overhead)) + 7372.383 actual memory usage for states (compression: 45.25%) + state-vector as stored = 16 byte + 36 byte overhead + 2048.000 memory used for hash table (-w28) + 457.764 memory used for DFS stack (-m10000000) + 1.367 memory lost to fragmentation + 9876.779 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 592075 4097 3828 2 2 ] +unreached in proctype urcu_reader + line 268, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 276, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 104, "(1)" + line 249, "pan.___", state 112, "(1)" + line 253, "pan.___", state 124, "(1)" + line 257, "pan.___", state 132, "(1)" + line 407, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 222, "(1)" + line 253, "pan.___", state 242, "(1)" + line 257, "pan.___", state 250, "(1)" + line 687, "pan.___", state 269, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 407, "pan.___", state 276, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 308, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 322, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 340, "(1)" + line 253, "pan.___", state 360, "(1)" + line 257, "pan.___", state 368, "(1)" + line 407, "pan.___", state 387, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 419, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 433, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 451, "(1)" + line 253, "pan.___", state 471, "(1)" + line 257, "pan.___", state 479, "(1)" + line 407, "pan.___", state 500, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 502, "(1)" + line 407, "pan.___", state 503, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 503, "else" + line 407, "pan.___", state 506, "(1)" + line 411, "pan.___", state 514, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 516, "(1)" + line 411, "pan.___", state 517, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 517, "else" + line 411, "pan.___", state 520, "(1)" + line 411, "pan.___", state 521, "(1)" + line 411, "pan.___", state 521, "(1)" + line 409, "pan.___", state 526, "((i<1))" + line 409, "pan.___", state 526, "((i>=1))" + line 416, "pan.___", state 532, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 534, "(1)" + line 416, "pan.___", state 535, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 535, "else" + line 416, "pan.___", state 538, "(1)" + line 416, "pan.___", state 539, "(1)" + line 416, "pan.___", state 539, "(1)" + line 420, "pan.___", state 546, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 548, "(1)" + line 420, "pan.___", state 549, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 549, "else" + line 420, "pan.___", state 552, "(1)" + line 420, "pan.___", state 553, "(1)" + line 420, "pan.___", state 553, "(1)" + line 418, "pan.___", state 558, "((i<2))" + line 418, "pan.___", state 558, "((i>=2))" + line 245, "pan.___", state 564, "(1)" + line 249, "pan.___", state 572, "(1)" + line 249, "pan.___", state 573, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 573, "else" + line 247, "pan.___", state 578, "((i<1))" + line 247, "pan.___", state 578, "((i>=1))" + line 253, "pan.___", state 584, "(1)" + line 253, "pan.___", state 585, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 585, "else" + line 257, "pan.___", state 592, "(1)" + line 257, "pan.___", state 593, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 593, "else" + line 255, "pan.___", state 598, "((i<2))" + line 255, "pan.___", state 598, "((i>=2))" + line 262, "pan.___", state 602, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 602, "else" + line 427, "pan.___", state 604, "(1)" + line 427, "pan.___", state 604, "(1)" + line 687, "pan.___", state 607, "cached_urcu_active_readers = (tmp+1)" + line 687, "pan.___", state 608, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 687, "pan.___", state 609, "(1)" + line 407, "pan.___", state 616, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 648, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 662, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 680, "(1)" + line 253, "pan.___", state 700, "(1)" + line 257, "pan.___", state 708, "(1)" + line 407, "pan.___", state 734, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 766, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 780, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 798, "(1)" + line 253, "pan.___", state 818, "(1)" + line 257, "pan.___", state 826, "(1)" + line 407, "pan.___", state 845, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 847, "(1)" + line 407, "pan.___", state 848, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 848, "else" + line 407, "pan.___", state 851, "(1)" + line 411, "pan.___", state 859, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 861, "(1)" + line 411, "pan.___", state 862, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 862, "else" + line 411, "pan.___", state 865, "(1)" + line 411, "pan.___", state 866, "(1)" + line 411, "pan.___", state 866, "(1)" + line 409, "pan.___", state 871, "((i<1))" + line 409, "pan.___", state 871, "((i>=1))" + line 416, "pan.___", state 877, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 879, "(1)" + line 416, "pan.___", state 880, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 880, "else" + line 416, "pan.___", state 883, "(1)" + line 416, "pan.___", state 884, "(1)" + line 416, "pan.___", state 884, "(1)" + line 420, "pan.___", state 891, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 893, "(1)" + line 420, "pan.___", state 894, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 894, "else" + line 420, "pan.___", state 897, "(1)" + line 420, "pan.___", state 898, "(1)" + line 420, "pan.___", state 898, "(1)" + line 418, "pan.___", state 903, "((i<2))" + line 418, "pan.___", state 903, "((i>=2))" + line 245, "pan.___", state 909, "(1)" + line 249, "pan.___", state 917, "(1)" + line 249, "pan.___", state 918, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 918, "else" + line 247, "pan.___", state 923, "((i<1))" + line 247, "pan.___", state 923, "((i>=1))" + line 253, "pan.___", state 929, "(1)" + line 253, "pan.___", state 930, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 930, "else" + line 257, "pan.___", state 937, "(1)" + line 257, "pan.___", state 938, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 938, "else" + line 255, "pan.___", state 943, "((i<2))" + line 255, "pan.___", state 943, "((i>=2))" + line 262, "pan.___", state 947, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 947, "else" + line 427, "pan.___", state 949, "(1)" + line 427, "pan.___", state 949, "(1)" + line 695, "pan.___", state 953, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 407, "pan.___", state 958, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 990, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1004, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1022, "(1)" + line 253, "pan.___", state 1042, "(1)" + line 257, "pan.___", state 1050, "(1)" + line 407, "pan.___", state 1072, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1104, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1118, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1136, "(1)" + line 253, "pan.___", state 1156, "(1)" + line 257, "pan.___", state 1164, "(1)" + line 407, "pan.___", state 1187, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1219, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1233, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1251, "(1)" + line 253, "pan.___", state 1271, "(1)" + line 257, "pan.___", state 1279, "(1)" + line 407, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1330, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1344, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1362, "(1)" + line 253, "pan.___", state 1382, "(1)" + line 257, "pan.___", state 1390, "(1)" + line 407, "pan.___", state 1414, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1446, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1460, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1478, "(1)" + line 253, "pan.___", state 1498, "(1)" + line 257, "pan.___", state 1506, "(1)" + line 407, "pan.___", state 1525, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1557, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1571, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1589, "(1)" + line 253, "pan.___", state 1609, "(1)" + line 257, "pan.___", state 1617, "(1)" + line 407, "pan.___", state 1639, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1671, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1685, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1703, "(1)" + line 253, "pan.___", state 1723, "(1)" + line 257, "pan.___", state 1731, "(1)" + line 734, "pan.___", state 1750, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 407, "pan.___", state 1757, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1789, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1803, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1821, "(1)" + line 253, "pan.___", state 1841, "(1)" + line 257, "pan.___", state 1849, "(1)" + line 407, "pan.___", state 1868, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 1900, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 1914, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1932, "(1)" + line 253, "pan.___", state 1952, "(1)" + line 257, "pan.___", state 1960, "(1)" + line 407, "pan.___", state 1981, "cache_dirty_urcu_gp_ctr = 0" + line 407, "pan.___", state 1983, "(1)" + line 407, "pan.___", state 1984, "(cache_dirty_urcu_gp_ctr)" + line 407, "pan.___", state 1984, "else" + line 407, "pan.___", state 1987, "(1)" + line 411, "pan.___", state 1995, "cache_dirty_urcu_active_readers = 0" + line 411, "pan.___", state 1997, "(1)" + line 411, "pan.___", state 1998, "(cache_dirty_urcu_active_readers)" + line 411, "pan.___", state 1998, "else" + line 411, "pan.___", state 2001, "(1)" + line 411, "pan.___", state 2002, "(1)" + line 411, "pan.___", state 2002, "(1)" + line 409, "pan.___", state 2007, "((i<1))" + line 409, "pan.___", state 2007, "((i>=1))" + line 416, "pan.___", state 2013, "cache_dirty_rcu_ptr = 0" + line 416, "pan.___", state 2015, "(1)" + line 416, "pan.___", state 2016, "(cache_dirty_rcu_ptr)" + line 416, "pan.___", state 2016, "else" + line 416, "pan.___", state 2019, "(1)" + line 416, "pan.___", state 2020, "(1)" + line 416, "pan.___", state 2020, "(1)" + line 420, "pan.___", state 2027, "cache_dirty_rcu_data[i] = 0" + line 420, "pan.___", state 2029, "(1)" + line 420, "pan.___", state 2030, "(cache_dirty_rcu_data[i])" + line 420, "pan.___", state 2030, "else" + line 420, "pan.___", state 2033, "(1)" + line 420, "pan.___", state 2034, "(1)" + line 420, "pan.___", state 2034, "(1)" + line 418, "pan.___", state 2039, "((i<2))" + line 418, "pan.___", state 2039, "((i>=2))" + line 245, "pan.___", state 2045, "(1)" + line 249, "pan.___", state 2053, "(1)" + line 249, "pan.___", state 2054, "(!(cache_dirty_urcu_active_readers))" + line 249, "pan.___", state 2054, "else" + line 247, "pan.___", state 2059, "((i<1))" + line 247, "pan.___", state 2059, "((i>=1))" + line 253, "pan.___", state 2065, "(1)" + line 253, "pan.___", state 2066, "(!(cache_dirty_rcu_ptr))" + line 253, "pan.___", state 2066, "else" + line 257, "pan.___", state 2073, "(1)" + line 257, "pan.___", state 2074, "(!(cache_dirty_rcu_data[i]))" + line 257, "pan.___", state 2074, "else" + line 255, "pan.___", state 2079, "((i<2))" + line 255, "pan.___", state 2079, "((i>=2))" + line 262, "pan.___", state 2083, "(!(cache_dirty_urcu_gp_ctr))" + line 262, "pan.___", state 2083, "else" + line 427, "pan.___", state 2085, "(1)" + line 427, "pan.___", state 2085, "(1)" + line 734, "pan.___", state 2088, "cached_urcu_active_readers = (tmp+1)" + line 734, "pan.___", state 2089, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 734, "pan.___", state 2090, "(1)" + line 407, "pan.___", state 2097, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2129, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2143, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 2161, "(1)" + line 253, "pan.___", state 2181, "(1)" + line 257, "pan.___", state 2189, "(1)" + line 407, "pan.___", state 2214, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2246, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2260, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 2278, "(1)" + line 253, "pan.___", state 2298, "(1)" + line 257, "pan.___", state 2306, "(1)" + line 407, "pan.___", state 2325, "cache_dirty_urcu_gp_ctr = 0" + line 416, "pan.___", state 2357, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 2371, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 2389, "(1)" + line 253, "pan.___", state 2409, "(1)" + line 257, "pan.___", state 2417, "(1)" + line 245, "pan.___", state 2448, "(1)" + line 253, "pan.___", state 2468, "(1)" + line 257, "pan.___", state 2476, "(1)" + line 245, "pan.___", state 2491, "(1)" + line 253, "pan.___", state 2511, "(1)" + line 257, "pan.___", state 2519, "(1)" + line 929, "pan.___", state 2536, "-end-" + (221 of 2536 states) +unreached in proctype urcu_writer + line 407, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 245, "pan.___", state 109, "(1)" + line 249, "pan.___", state 117, "(1)" + line 253, "pan.___", state 129, "(1)" + line 268, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 167, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 180, "cache_dirty_rcu_ptr = 0" + line 407, "pan.___", state 220, "cache_dirty_urcu_gp_ctr = 0" + line 411, "pan.___", state 234, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 252, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 266, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 284, "(1)" + line 249, "pan.___", state 292, "(1)" + line 253, "pan.___", state 304, "(1)" + line 257, "pan.___", state 312, "(1)" + line 411, "pan.___", state 347, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 365, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 379, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 405, "(1)" + line 253, "pan.___", state 417, "(1)" + line 257, "pan.___", state 425, "(1)" + line 411, "pan.___", state 468, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 486, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 500, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 526, "(1)" + line 253, "pan.___", state 538, "(1)" + line 257, "pan.___", state 546, "(1)" + line 411, "pan.___", state 579, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 597, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 611, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 637, "(1)" + line 253, "pan.___", state 649, "(1)" + line 257, "pan.___", state 657, "(1)" + line 411, "pan.___", state 692, "cache_dirty_urcu_active_readers = 0" + line 416, "pan.___", state 710, "cache_dirty_rcu_ptr = 0" + line 420, "pan.___", state 724, "cache_dirty_rcu_data[i] = 0" + line 249, "pan.___", state 750, "(1)" + line 253, "pan.___", state 762, "(1)" + line 257, "pan.___", state 770, "(1)" + line 268, "pan.___", state 823, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 832, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 847, "(1)" + line 280, "pan.___", state 854, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 870, "(1)" + line 249, "pan.___", state 878, "(1)" + line 253, "pan.___", state 890, "(1)" + line 257, "pan.___", state 898, "(1)" + line 268, "pan.___", state 929, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 938, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 951, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 960, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 976, "(1)" + line 249, "pan.___", state 984, "(1)" + line 253, "pan.___", state 996, "(1)" + line 257, "pan.___", state 1004, "(1)" + line 272, "pan.___", state 1030, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1043, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1052, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1068, "(1)" + line 249, "pan.___", state 1076, "(1)" + line 253, "pan.___", state 1088, "(1)" + line 257, "pan.___", state 1096, "(1)" + line 268, "pan.___", state 1127, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1136, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1149, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1158, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1174, "(1)" + line 249, "pan.___", state 1182, "(1)" + line 253, "pan.___", state 1194, "(1)" + line 257, "pan.___", state 1202, "(1)" + line 272, "pan.___", state 1228, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1241, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1250, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1266, "(1)" + line 249, "pan.___", state 1274, "(1)" + line 253, "pan.___", state 1286, "(1)" + line 257, "pan.___", state 1294, "(1)" + line 268, "pan.___", state 1325, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1334, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1347, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1356, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1372, "(1)" + line 249, "pan.___", state 1380, "(1)" + line 253, "pan.___", state 1392, "(1)" + line 257, "pan.___", state 1400, "(1)" + line 272, "pan.___", state 1426, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1439, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1448, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1464, "(1)" + line 249, "pan.___", state 1472, "(1)" + line 253, "pan.___", state 1484, "(1)" + line 257, "pan.___", state 1492, "(1)" + line 268, "pan.___", state 1523, "cache_dirty_urcu_gp_ctr = 0" + line 272, "pan.___", state 1532, "cache_dirty_urcu_active_readers = 0" + line 276, "pan.___", state 1545, "cache_dirty_rcu_ptr = 0" + line 280, "pan.___", state 1554, "cache_dirty_rcu_data[i] = 0" + line 245, "pan.___", state 1570, "(1)" + line 249, "pan.___", state 1578, "(1)" + line 253, "pan.___", state 1590, "(1)" + line 257, "pan.___", state 1598, "(1)" + line 1304, "pan.___", state 1614, "-end-" + (103 of 1614 states) +unreached in proctype :init: + (0 of 28 states) +unreached in proctype :never: + line 1369, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 1.54e+04 seconds +pan: rate 15645.145 states/second +pan: avg transition delay 3.1947e-06 usec +cp .input.spin urcu_progress_writer.spin.input +cp .input.spin.trail urcu_progress_writer.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.spin.input b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.spin.input new file mode 100644 index 0000000..b353239 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer.spin.input @@ -0,0 +1,1340 @@ +#define WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.define b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.log b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.log new file mode 100644 index 0000000..52db020 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.log @@ -0,0 +1,465 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DCOLLAPSE -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1363) +depth 7: Claim reached state 9 (line 1368) +depth 50: Claim reached state 9 (line 1367) +Depth= 7070 States= 1e+06 Transitions= 1.16e+07 Memory= 492.912 t= 33.7 R= 3e+04 +Depth= 7070 States= 2e+06 Transitions= 2.31e+07 Memory= 521.233 t= 68 R= 3e+04 +Depth= 7070 States= 3e+06 Transitions= 3.43e+07 Memory= 549.358 t= 102 R= 3e+04 +pan: resizing hashtable to -w22.. done +pan: acceptance cycle (at depth 1558) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + + Compression + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 80 byte, depth reached 7070, errors: 1 + 1856640 states, stored (3.13554e+06 visited) + 32657997 states, matched + 35793542 transitions (= visited+matched) +5.1088012e+08 atomic steps +hash conflicts: 10885217 (resolved) + +Stats on memory usage (in Megabytes): + 205.393 equivalent memory usage for states (stored*(State-vector + overhead)) + 93.456 actual memory usage for states (compression: 45.50%) + state-vector as stored = 17 byte + 36 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 583.115 total actual memory usage + +nr of templates: [ globals chans procs ] +collapse counts: [ 12368 744 254 2 2 ] +unreached in proctype urcu_reader + line 269, "pan.___", state 57, "cache_dirty_urcu_gp_ctr = 0" + line 277, "pan.___", state 79, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 88, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 104, "(1)" + line 250, "pan.___", state 112, "(1)" + line 254, "pan.___", state 124, "(1)" + line 258, "pan.___", state 132, "(1)" + line 408, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 190, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 204, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 222, "(1)" + line 254, "pan.___", state 242, "(1)" + line 258, "pan.___", state 250, "(1)" + line 688, "pan.___", state 269, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 408, "pan.___", state 276, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 308, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 322, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 340, "(1)" + line 254, "pan.___", state 360, "(1)" + line 258, "pan.___", state 368, "(1)" + line 408, "pan.___", state 387, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 419, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 433, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 451, "(1)" + line 254, "pan.___", state 471, "(1)" + line 258, "pan.___", state 479, "(1)" + line 408, "pan.___", state 500, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 502, "(1)" + line 408, "pan.___", state 503, "(cache_dirty_urcu_gp_ctr)" + line 408, "pan.___", state 503, "else" + line 408, "pan.___", state 506, "(1)" + line 412, "pan.___", state 514, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 516, "(1)" + line 412, "pan.___", state 517, "(cache_dirty_urcu_active_readers)" + line 412, "pan.___", state 517, "else" + line 412, "pan.___", state 520, "(1)" + line 412, "pan.___", state 521, "(1)" + line 412, "pan.___", state 521, "(1)" + line 410, "pan.___", state 526, "((i<1))" + line 410, "pan.___", state 526, "((i>=1))" + line 417, "pan.___", state 532, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 534, "(1)" + line 417, "pan.___", state 535, "(cache_dirty_rcu_ptr)" + line 417, "pan.___", state 535, "else" + line 417, "pan.___", state 538, "(1)" + line 417, "pan.___", state 539, "(1)" + line 417, "pan.___", state 539, "(1)" + line 421, "pan.___", state 546, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 548, "(1)" + line 421, "pan.___", state 549, "(cache_dirty_rcu_data[i])" + line 421, "pan.___", state 549, "else" + line 421, "pan.___", state 552, "(1)" + line 421, "pan.___", state 553, "(1)" + line 421, "pan.___", state 553, "(1)" + line 419, "pan.___", state 558, "((i<2))" + line 419, "pan.___", state 558, "((i>=2))" + line 246, "pan.___", state 564, "(1)" + line 250, "pan.___", state 572, "(1)" + line 250, "pan.___", state 573, "(!(cache_dirty_urcu_active_readers))" + line 250, "pan.___", state 573, "else" + line 248, "pan.___", state 578, "((i<1))" + line 248, "pan.___", state 578, "((i>=1))" + line 254, "pan.___", state 584, "(1)" + line 254, "pan.___", state 585, "(!(cache_dirty_rcu_ptr))" + line 254, "pan.___", state 585, "else" + line 258, "pan.___", state 592, "(1)" + line 258, "pan.___", state 593, "(!(cache_dirty_rcu_data[i]))" + line 258, "pan.___", state 593, "else" + line 256, "pan.___", state 598, "((i<2))" + line 256, "pan.___", state 598, "((i>=2))" + line 263, "pan.___", state 602, "(!(cache_dirty_urcu_gp_ctr))" + line 263, "pan.___", state 602, "else" + line 428, "pan.___", state 604, "(1)" + line 428, "pan.___", state 604, "(1)" + line 688, "pan.___", state 607, "cached_urcu_active_readers = (tmp+1)" + line 688, "pan.___", state 608, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 688, "pan.___", state 609, "(1)" + line 408, "pan.___", state 616, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 648, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 662, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 680, "(1)" + line 254, "pan.___", state 700, "(1)" + line 258, "pan.___", state 708, "(1)" + line 408, "pan.___", state 734, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 766, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 780, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 798, "(1)" + line 254, "pan.___", state 818, "(1)" + line 258, "pan.___", state 826, "(1)" + line 408, "pan.___", state 845, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 847, "(1)" + line 408, "pan.___", state 848, "(cache_dirty_urcu_gp_ctr)" + line 408, "pan.___", state 848, "else" + line 408, "pan.___", state 851, "(1)" + line 412, "pan.___", state 859, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 861, "(1)" + line 412, "pan.___", state 862, "(cache_dirty_urcu_active_readers)" + line 412, "pan.___", state 862, "else" + line 412, "pan.___", state 865, "(1)" + line 412, "pan.___", state 866, "(1)" + line 412, "pan.___", state 866, "(1)" + line 410, "pan.___", state 871, "((i<1))" + line 410, "pan.___", state 871, "((i>=1))" + line 417, "pan.___", state 877, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 879, "(1)" + line 417, "pan.___", state 880, "(cache_dirty_rcu_ptr)" + line 417, "pan.___", state 880, "else" + line 417, "pan.___", state 883, "(1)" + line 417, "pan.___", state 884, "(1)" + line 417, "pan.___", state 884, "(1)" + line 421, "pan.___", state 891, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 893, "(1)" + line 421, "pan.___", state 894, "(cache_dirty_rcu_data[i])" + line 421, "pan.___", state 894, "else" + line 421, "pan.___", state 897, "(1)" + line 421, "pan.___", state 898, "(1)" + line 421, "pan.___", state 898, "(1)" + line 419, "pan.___", state 903, "((i<2))" + line 419, "pan.___", state 903, "((i>=2))" + line 246, "pan.___", state 909, "(1)" + line 250, "pan.___", state 917, "(1)" + line 250, "pan.___", state 918, "(!(cache_dirty_urcu_active_readers))" + line 250, "pan.___", state 918, "else" + line 248, "pan.___", state 923, "((i<1))" + line 248, "pan.___", state 923, "((i>=1))" + line 254, "pan.___", state 929, "(1)" + line 254, "pan.___", state 930, "(!(cache_dirty_rcu_ptr))" + line 254, "pan.___", state 930, "else" + line 258, "pan.___", state 937, "(1)" + line 258, "pan.___", state 938, "(!(cache_dirty_rcu_data[i]))" + line 258, "pan.___", state 938, "else" + line 256, "pan.___", state 943, "((i<2))" + line 256, "pan.___", state 943, "((i>=2))" + line 263, "pan.___", state 947, "(!(cache_dirty_urcu_gp_ctr))" + line 263, "pan.___", state 947, "else" + line 428, "pan.___", state 949, "(1)" + line 428, "pan.___", state 949, "(1)" + line 696, "pan.___", state 953, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 408, "pan.___", state 958, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 990, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1004, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1022, "(1)" + line 254, "pan.___", state 1042, "(1)" + line 258, "pan.___", state 1050, "(1)" + line 408, "pan.___", state 1072, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1104, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1118, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1136, "(1)" + line 254, "pan.___", state 1156, "(1)" + line 258, "pan.___", state 1164, "(1)" + line 408, "pan.___", state 1187, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1219, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1233, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1251, "(1)" + line 254, "pan.___", state 1271, "(1)" + line 258, "pan.___", state 1279, "(1)" + line 408, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1330, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1344, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1362, "(1)" + line 254, "pan.___", state 1382, "(1)" + line 258, "pan.___", state 1390, "(1)" + line 408, "pan.___", state 1414, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1446, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1460, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1478, "(1)" + line 254, "pan.___", state 1498, "(1)" + line 258, "pan.___", state 1506, "(1)" + line 408, "pan.___", state 1525, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1557, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1571, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1589, "(1)" + line 254, "pan.___", state 1609, "(1)" + line 258, "pan.___", state 1617, "(1)" + line 408, "pan.___", state 1639, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1671, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1685, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1703, "(1)" + line 254, "pan.___", state 1723, "(1)" + line 258, "pan.___", state 1731, "(1)" + line 735, "pan.___", state 1750, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 408, "pan.___", state 1757, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1789, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1803, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1821, "(1)" + line 254, "pan.___", state 1841, "(1)" + line 258, "pan.___", state 1849, "(1)" + line 408, "pan.___", state 1868, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 1900, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 1914, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1932, "(1)" + line 254, "pan.___", state 1952, "(1)" + line 258, "pan.___", state 1960, "(1)" + line 408, "pan.___", state 1981, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 1983, "(1)" + line 408, "pan.___", state 1984, "(cache_dirty_urcu_gp_ctr)" + line 408, "pan.___", state 1984, "else" + line 408, "pan.___", state 1987, "(1)" + line 412, "pan.___", state 1995, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 1997, "(1)" + line 412, "pan.___", state 1998, "(cache_dirty_urcu_active_readers)" + line 412, "pan.___", state 1998, "else" + line 412, "pan.___", state 2001, "(1)" + line 412, "pan.___", state 2002, "(1)" + line 412, "pan.___", state 2002, "(1)" + line 410, "pan.___", state 2007, "((i<1))" + line 410, "pan.___", state 2007, "((i>=1))" + line 417, "pan.___", state 2013, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 2015, "(1)" + line 417, "pan.___", state 2016, "(cache_dirty_rcu_ptr)" + line 417, "pan.___", state 2016, "else" + line 417, "pan.___", state 2019, "(1)" + line 417, "pan.___", state 2020, "(1)" + line 417, "pan.___", state 2020, "(1)" + line 421, "pan.___", state 2027, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 2029, "(1)" + line 421, "pan.___", state 2030, "(cache_dirty_rcu_data[i])" + line 421, "pan.___", state 2030, "else" + line 421, "pan.___", state 2033, "(1)" + line 421, "pan.___", state 2034, "(1)" + line 421, "pan.___", state 2034, "(1)" + line 419, "pan.___", state 2039, "((i<2))" + line 419, "pan.___", state 2039, "((i>=2))" + line 246, "pan.___", state 2045, "(1)" + line 250, "pan.___", state 2053, "(1)" + line 250, "pan.___", state 2054, "(!(cache_dirty_urcu_active_readers))" + line 250, "pan.___", state 2054, "else" + line 248, "pan.___", state 2059, "((i<1))" + line 248, "pan.___", state 2059, "((i>=1))" + line 254, "pan.___", state 2065, "(1)" + line 254, "pan.___", state 2066, "(!(cache_dirty_rcu_ptr))" + line 254, "pan.___", state 2066, "else" + line 258, "pan.___", state 2073, "(1)" + line 258, "pan.___", state 2074, "(!(cache_dirty_rcu_data[i]))" + line 258, "pan.___", state 2074, "else" + line 256, "pan.___", state 2079, "((i<2))" + line 256, "pan.___", state 2079, "((i>=2))" + line 263, "pan.___", state 2083, "(!(cache_dirty_urcu_gp_ctr))" + line 263, "pan.___", state 2083, "else" + line 428, "pan.___", state 2085, "(1)" + line 428, "pan.___", state 2085, "(1)" + line 735, "pan.___", state 2088, "cached_urcu_active_readers = (tmp+1)" + line 735, "pan.___", state 2089, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 735, "pan.___", state 2090, "(1)" + line 408, "pan.___", state 2097, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 2129, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 2143, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 2161, "(1)" + line 254, "pan.___", state 2181, "(1)" + line 258, "pan.___", state 2189, "(1)" + line 408, "pan.___", state 2214, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 2246, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 2260, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 2278, "(1)" + line 254, "pan.___", state 2298, "(1)" + line 258, "pan.___", state 2306, "(1)" + line 408, "pan.___", state 2325, "cache_dirty_urcu_gp_ctr = 0" + line 417, "pan.___", state 2357, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 2371, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 2389, "(1)" + line 254, "pan.___", state 2409, "(1)" + line 258, "pan.___", state 2417, "(1)" + line 246, "pan.___", state 2448, "(1)" + line 254, "pan.___", state 2468, "(1)" + line 258, "pan.___", state 2476, "(1)" + line 246, "pan.___", state 2491, "(1)" + line 254, "pan.___", state 2511, "(1)" + line 258, "pan.___", state 2519, "(1)" + line 930, "pan.___", state 2536, "-end-" + (221 of 2536 states) +unreached in proctype urcu_writer + line 408, "pan.___", state 45, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 59, "cache_dirty_urcu_active_readers = 0" + line 417, "pan.___", state 77, "cache_dirty_rcu_ptr = 0" + line 246, "pan.___", state 109, "(1)" + line 250, "pan.___", state 117, "(1)" + line 254, "pan.___", state 129, "(1)" + line 269, "pan.___", state 158, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 167, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 180, "cache_dirty_rcu_ptr = 0" + line 408, "pan.___", state 220, "cache_dirty_urcu_gp_ctr = 0" + line 412, "pan.___", state 234, "cache_dirty_urcu_active_readers = 0" + line 417, "pan.___", state 252, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 266, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 284, "(1)" + line 250, "pan.___", state 292, "(1)" + line 254, "pan.___", state 304, "(1)" + line 258, "pan.___", state 312, "(1)" + line 412, "pan.___", state 347, "cache_dirty_urcu_active_readers = 0" + line 417, "pan.___", state 365, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 379, "cache_dirty_rcu_data[i] = 0" + line 250, "pan.___", state 405, "(1)" + line 254, "pan.___", state 417, "(1)" + line 258, "pan.___", state 425, "(1)" + line 408, "pan.___", state 450, "cache_dirty_urcu_gp_ctr = 0" + line 408, "pan.___", state 452, "(1)" + line 408, "pan.___", state 453, "(cache_dirty_urcu_gp_ctr)" + line 408, "pan.___", state 453, "else" + line 408, "pan.___", state 456, "(1)" + line 412, "pan.___", state 464, "cache_dirty_urcu_active_readers = 0" + line 412, "pan.___", state 466, "(1)" + line 412, "pan.___", state 467, "(cache_dirty_urcu_active_readers)" + line 412, "pan.___", state 467, "else" + line 412, "pan.___", state 470, "(1)" + line 412, "pan.___", state 471, "(1)" + line 412, "pan.___", state 471, "(1)" + line 410, "pan.___", state 476, "((i<1))" + line 410, "pan.___", state 476, "((i>=1))" + line 417, "pan.___", state 482, "cache_dirty_rcu_ptr = 0" + line 417, "pan.___", state 484, "(1)" + line 417, "pan.___", state 485, "(cache_dirty_rcu_ptr)" + line 417, "pan.___", state 485, "else" + line 417, "pan.___", state 488, "(1)" + line 417, "pan.___", state 489, "(1)" + line 417, "pan.___", state 489, "(1)" + line 421, "pan.___", state 496, "cache_dirty_rcu_data[i] = 0" + line 421, "pan.___", state 498, "(1)" + line 421, "pan.___", state 499, "(cache_dirty_rcu_data[i])" + line 421, "pan.___", state 499, "else" + line 421, "pan.___", state 502, "(1)" + line 421, "pan.___", state 503, "(1)" + line 421, "pan.___", state 503, "(1)" + line 419, "pan.___", state 508, "((i<2))" + line 419, "pan.___", state 508, "((i>=2))" + line 246, "pan.___", state 514, "(1)" + line 250, "pan.___", state 522, "(1)" + line 250, "pan.___", state 523, "(!(cache_dirty_urcu_active_readers))" + line 250, "pan.___", state 523, "else" + line 248, "pan.___", state 528, "((i<1))" + line 248, "pan.___", state 528, "((i>=1))" + line 254, "pan.___", state 534, "(1)" + line 254, "pan.___", state 535, "(!(cache_dirty_rcu_ptr))" + line 254, "pan.___", state 535, "else" + line 258, "pan.___", state 542, "(1)" + line 258, "pan.___", state 543, "(!(cache_dirty_rcu_data[i]))" + line 258, "pan.___", state 543, "else" + line 263, "pan.___", state 552, "(!(cache_dirty_urcu_gp_ctr))" + line 263, "pan.___", state 552, "else" + line 428, "pan.___", state 554, "(1)" + line 428, "pan.___", state 554, "(1)" + line 412, "pan.___", state 574, "cache_dirty_urcu_active_readers = 0" + line 417, "pan.___", state 592, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 606, "cache_dirty_rcu_data[i] = 0" + line 250, "pan.___", state 632, "(1)" + line 254, "pan.___", state 644, "(1)" + line 258, "pan.___", state 652, "(1)" + line 412, "pan.___", state 685, "cache_dirty_urcu_active_readers = 0" + line 417, "pan.___", state 703, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 717, "cache_dirty_rcu_data[i] = 0" + line 250, "pan.___", state 743, "(1)" + line 254, "pan.___", state 755, "(1)" + line 258, "pan.___", state 763, "(1)" + line 412, "pan.___", state 798, "cache_dirty_urcu_active_readers = 0" + line 417, "pan.___", state 816, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 830, "cache_dirty_rcu_data[i] = 0" + line 250, "pan.___", state 856, "(1)" + line 254, "pan.___", state 868, "(1)" + line 258, "pan.___", state 876, "(1)" + line 412, "pan.___", state 914, "cache_dirty_urcu_active_readers = 0" + line 417, "pan.___", state 932, "cache_dirty_rcu_ptr = 0" + line 421, "pan.___", state 946, "cache_dirty_rcu_data[i] = 0" + line 250, "pan.___", state 972, "(1)" + line 254, "pan.___", state 984, "(1)" + line 258, "pan.___", state 992, "(1)" + line 269, "pan.___", state 1036, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 1045, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1060, "(1)" + line 281, "pan.___", state 1067, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1083, "(1)" + line 250, "pan.___", state 1091, "(1)" + line 254, "pan.___", state 1103, "(1)" + line 258, "pan.___", state 1111, "(1)" + line 269, "pan.___", state 1142, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 1151, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1164, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 1173, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1189, "(1)" + line 250, "pan.___", state 1197, "(1)" + line 254, "pan.___", state 1209, "(1)" + line 258, "pan.___", state 1217, "(1)" + line 273, "pan.___", state 1243, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1256, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 1265, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1281, "(1)" + line 250, "pan.___", state 1289, "(1)" + line 254, "pan.___", state 1301, "(1)" + line 258, "pan.___", state 1309, "(1)" + line 269, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr = 0" + line 273, "pan.___", state 1349, "cache_dirty_urcu_active_readers = 0" + line 277, "pan.___", state 1362, "cache_dirty_rcu_ptr = 0" + line 281, "pan.___", state 1371, "cache_dirty_rcu_data[i] = 0" + line 246, "pan.___", state 1387, "(1)" + line 250, "pan.___", state 1395, "(1)" + line 254, "pan.___", state 1407, "(1)" + line 258, "pan.___", state 1415, "(1)" + line 1305, "pan.___", state 1431, "-end-" + (110 of 1431 states) +unreached in proctype :init: + (0 of 28 states) +unreached in proctype :never: + line 1370, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 106 seconds +pan: rate 29466.638 states/second +pan: avg transition delay 2.9729e-06 usec +cp .input.spin urcu_progress_writer_error.spin.input +cp .input.spin.trail urcu_progress_writer_error.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi-compress' diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..6cccb27 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input @@ -0,0 +1,1341 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input.trail b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..e9b06b3 --- /dev/null +++ b/urcu-controldataflow-intel-ipi-compress/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,1699 @@ +-2:3:-2 +-4:-4:-4 +1:0:3997 +2:2:2536 +3:2:2541 +4:2:2545 +5:2:2553 +6:2:2557 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b/urcu-controldataflow-intel-ipi/.input.spin @@ -0,0 +1,1273 @@ +#define WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi/DEFINES b/urcu-controldataflow-intel-ipi/DEFINES new file mode 100644 index 0000000..abea5ff --- /dev/null +++ b/urcu-controldataflow-intel-ipi/DEFINES @@ -0,0 +1,18 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow-intel-ipi/Makefile b/urcu-controldataflow-intel-ipi/Makefile new file mode 100644 index 0000000..de47dff --- /dev/null +++ b/urcu-controldataflow-intel-ipi/Makefile @@ -0,0 +1,170 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow-intel-ipi/references.txt b/urcu-controldataflow-intel-ipi/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow-intel-ipi/urcu.sh b/urcu-controldataflow-intel-ipi/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow-intel-ipi/urcu.spin b/urcu-controldataflow-intel-ipi/urcu.spin new file mode 100644 index 0000000..54752a1 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu.spin @@ -0,0 +1,1254 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi/urcu_free.log b/urcu-controldataflow-intel-ipi/urcu_free.log new file mode 100644 index 0000000..afb21ca --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free.log @@ -0,0 +1,503 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1294) +Depth= 9223 States= 1e+06 Transitions= 6.87e+06 Memory= 550.432 t= 16.6 R= 6e+04 +Depth= 9223 States= 2e+06 Transitions= 1.47e+07 Memory= 634.318 t= 36.7 R= 5e+04 +Depth= 9223 States= 3e+06 Transitions= 2.46e+07 Memory= 718.303 t= 62.6 R= 5e+04 +pan: resizing hashtable to -w22.. done +Depth= 9223 States= 4e+06 Transitions= 3.19e+07 Memory= 833.311 t= 81.2 R= 5e+04 +Depth= 9223 States= 5e+06 Transitions= 3.95e+07 Memory= 917.295 t= 100 R= 5e+04 +Depth= 9223 States= 6e+06 Transitions= 5.71e+07 Memory= 1001.279 t= 149 R= 4e+04 +Depth= 9223 States= 7e+06 Transitions= 6.81e+07 Memory= 1085.264 t= 178 R= 4e+04 +Depth= 9223 States= 8e+06 Transitions= 8.22e+07 Memory= 1169.151 t= 216 R= 4e+04 +Depth= 9223 States= 9e+06 Transitions= 9.54e+07 Memory= 1253.135 t= 252 R= 4e+04 +pan: resizing hashtable to -w24.. done +Depth= 9223 States= 1e+07 Transitions= 1.08e+08 Memory= 1461.115 t= 288 R= 3e+04 +Depth= 9223 States= 1.1e+07 Transitions= 1.21e+08 Memory= 1545.100 t= 321 R= 3e+04 +Depth= 9223 States= 1.2e+07 Transitions= 1.3e+08 Memory= 1629.084 t= 345 R= 3e+04 +Depth= 9223 States= 1.3e+07 Transitions= 1.42e+08 Memory= 1713.068 t= 378 R= 3e+04 +Depth= 9223 States= 1.4e+07 Transitions= 1.72e+08 Memory= 1797.053 t= 463 R= 3e+04 +Depth= 9223 States= 1.5e+07 Transitions= 1.91e+08 Memory= 1881.037 t= 516 R= 3e+04 +Depth= 9223 States= 1.6e+07 Transitions= 2.08e+08 Memory= 1964.924 t= 562 R= 3e+04 +Depth= 9223 States= 1.7e+07 Transitions= 2.2e+08 Memory= 2048.908 t= 595 R= 3e+04 +Depth= 9223 States= 1.8e+07 Transitions= 2.39e+08 Memory= 2132.893 t= 647 R= 3e+04 +Depth= 9223 States= 1.9e+07 Transitions= 2.55e+08 Memory= 2216.877 t= 691 R= 3e+04 +Depth= 9223 States= 2e+07 Transitions= 2.72e+08 Memory= 2300.861 t= 739 R= 3e+04 +Depth= 9285 States= 2.1e+07 Transitions= 2.85e+08 Memory= 2384.846 t= 774 R= 3e+04 +Depth= 9324 States= 2.2e+07 Transitions= 2.99e+08 Memory= 2468.830 t= 812 R= 3e+04 +Depth= 9324 States= 2.3e+07 Transitions= 3.1e+08 Memory= 2552.717 t= 842 R= 3e+04 +Depth= 9324 States= 2.4e+07 Transitions= 3.21e+08 Memory= 2636.701 t= 873 R= 3e+04 +Depth= 9324 States= 2.5e+07 Transitions= 3.34e+08 Memory= 2720.686 t= 908 R= 3e+04 +Depth= 9324 States= 2.6e+07 Transitions= 3.45e+08 Memory= 2804.670 t= 939 R= 3e+04 +Depth= 9324 States= 2.7e+07 Transitions= 3.59e+08 Memory= 2888.654 t= 975 R= 3e+04 +Depth= 9324 States= 2.8e+07 Transitions= 3.71e+08 Memory= 2972.639 t= 1.01e+03 R= 3e+04 +Depth= 9324 States= 2.9e+07 Transitions= 3.84e+08 Memory= 3056.526 t= 1.04e+03 R= 3e+04 +Depth= 9324 States= 3e+07 Transitions= 3.96e+08 Memory= 3140.510 t= 1.08e+03 R= 3e+04 +Depth= 9324 States= 3.1e+07 Transitions= 4.09e+08 Memory= 3224.494 t= 1.11e+03 R= 3e+04 +Depth= 9324 States= 3.2e+07 Transitions= 4.19e+08 Memory= 3308.479 t= 1.14e+03 R= 3e+04 +Depth= 9324 States= 3.3e+07 Transitions= 4.3e+08 Memory= 3392.463 t= 1.17e+03 R= 3e+04 +Depth= 9324 States= 3.4e+07 Transitions= 4.44e+08 Memory= 3476.447 t= 1.21e+03 R= 3e+04 +pan: resizing hashtable to -w26.. done +Depth= 9324 States= 3.5e+07 Transitions= 4.6e+08 Memory= 4056.416 t= 1.26e+03 R= 3e+04 +Depth= 9324 States= 3.6e+07 Transitions= 4.73e+08 Memory= 4140.401 t= 1.3e+03 R= 3e+04 +Depth= 9324 States= 3.7e+07 Transitions= 4.89e+08 Memory= 4224.385 t= 1.34e+03 R= 3e+04 +Depth= 9324 States= 3.8e+07 Transitions= 5.04e+08 Memory= 4308.369 t= 1.38e+03 R= 3e+04 +Depth= 9324 States= 3.9e+07 Transitions= 5.18e+08 Memory= 4392.354 t= 1.42e+03 R= 3e+04 +Depth= 9324 States= 4e+07 Transitions= 5.28e+08 Memory= 4476.338 t= 1.44e+03 R= 3e+04 +Depth= 9324 States= 4.1e+07 Transitions= 5.38e+08 Memory= 4560.225 t= 1.47e+03 R= 3e+04 +Depth= 9324 States= 4.2e+07 Transitions= 5.5e+08 Memory= 4644.209 t= 1.5e+03 R= 3e+04 +Depth= 9324 States= 4.3e+07 Transitions= 5.76e+08 Memory= 4728.193 t= 1.58e+03 R= 3e+04 +Depth= 9324 States= 4.4e+07 Transitions= 6.01e+08 Memory= 4812.178 t= 1.65e+03 R= 3e+04 +Depth= 9324 States= 4.5e+07 Transitions= 6.18e+08 Memory= 4896.162 t= 1.69e+03 R= 3e+04 +Depth= 9324 States= 4.6e+07 Transitions= 6.29e+08 Memory= 4980.147 t= 1.72e+03 R= 3e+04 +Depth= 9324 States= 4.7e+07 Transitions= 6.44e+08 Memory= 5064.131 t= 1.76e+03 R= 3e+04 +Depth= 9324 States= 4.8e+07 Transitions= 6.63e+08 Memory= 5148.018 t= 1.82e+03 R= 3e+04 +Depth= 9324 States= 4.9e+07 Transitions= 6.8e+08 Memory= 5232.002 t= 1.86e+03 R= 3e+04 +Depth= 9324 States= 5e+07 Transitions= 6.94e+08 Memory= 5315.986 t= 1.9e+03 R= 3e+04 +Depth= 9324 States= 5.1e+07 Transitions= 7.07e+08 Memory= 5399.971 t= 1.94e+03 R= 3e+04 +Depth= 9324 States= 5.2e+07 Transitions= 7.19e+08 Memory= 5483.955 t= 1.97e+03 R= 3e+04 +Depth= 9324 States= 5.3e+07 Transitions= 7.33e+08 Memory= 5567.940 t= 2.01e+03 R= 3e+04 +Depth= 9324 States= 5.4e+07 Transitions= 7.43e+08 Memory= 5651.826 t= 2.03e+03 R= 3e+04 +Depth= 9324 States= 5.5e+07 Transitions= 7.56e+08 Memory= 5735.811 t= 2.07e+03 R= 3e+04 +Depth= 9324 States= 5.6e+07 Transitions= 7.67e+08 Memory= 5819.795 t= 2.1e+03 R= 3e+04 +Depth= 9324 States= 5.7e+07 Transitions= 7.82e+08 Memory= 5903.779 t= 2.14e+03 R= 3e+04 +Depth= 9324 States= 5.8e+07 Transitions= 7.92e+08 Memory= 5987.764 t= 2.17e+03 R= 3e+04 +Depth= 9324 States= 5.9e+07 Transitions= 8.05e+08 Memory= 6071.748 t= 2.2e+03 R= 3e+04 +Depth= 9324 States= 6e+07 Transitions= 8.17e+08 Memory= 6155.733 t= 2.23e+03 R= 3e+04 +Depth= 9324 States= 6.1e+07 Transitions= 8.27e+08 Memory= 6239.619 t= 2.26e+03 R= 3e+04 +Depth= 9324 States= 6.2e+07 Transitions= 8.39e+08 Memory= 6323.604 t= 2.29e+03 R= 3e+04 +Depth= 9324 States= 6.3e+07 Transitions= 8.57e+08 Memory= 6407.588 t= 2.34e+03 R= 3e+04 +Depth= 9324 States= 6.4e+07 Transitions= 8.68e+08 Memory= 6491.572 t= 2.37e+03 R= 3e+04 +Depth= 9324 States= 6.5e+07 Transitions= 8.83e+08 Memory= 6575.557 t= 2.41e+03 R= 3e+04 +Depth= 9324 States= 6.6e+07 Transitions= 8.98e+08 Memory= 6659.541 t= 2.45e+03 R= 3e+04 +Depth= 9324 States= 6.7e+07 Transitions= 9.13e+08 Memory= 6743.428 t= 2.49e+03 R= 3e+04 +Depth= 9324 States= 6.8e+07 Transitions= 9.28e+08 Memory= 6827.412 t= 2.53e+03 R= 3e+04 +Depth= 9324 States= 6.9e+07 Transitions= 9.42e+08 Memory= 6911.397 t= 2.57e+03 R= 3e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 9324, errors: 0 + 69786664 states, stored +8.8218731e+08 states, matched +9.5197398e+08 transitions (= stored+matched) +1.4613809e+10 atomic steps +hash conflicts: 5.3037519e+08 (resolved) + +Stats on memory usage (in Megabytes): + 7720.235 equivalent memory usage for states (stored*(State-vector + overhead)) + 6011.129 actual memory usage for states (compression: 77.86%) + state-vector as stored = 62 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 3.383 memory lost to fragmentation + 6977.510 total actual memory usage + +unreached in proctype urcu_reader + line 271, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 77, "(1)" + line 252, "pan.___", state 85, "(1)" + line 256, "pan.___", state 97, "(1)" + line 260, "pan.___", state 105, "(1)" + line 410, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 195, "(1)" + line 256, "pan.___", state 215, "(1)" + line 260, "pan.___", state 223, "(1)" + line 690, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 410, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 313, "(1)" + line 256, "pan.___", state 333, "(1)" + line 260, "pan.___", state 341, "(1)" + line 410, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 424, "(1)" + line 256, "pan.___", state 444, "(1)" + line 260, "pan.___", state 452, "(1)" + line 410, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 475, "(1)" + line 410, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 476, "else" + line 410, "pan.___", state 479, "(1)" + line 414, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 489, "(1)" + line 414, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 490, "else" + line 414, "pan.___", state 493, "(1)" + line 414, "pan.___", state 494, "(1)" + line 414, "pan.___", state 494, "(1)" + line 412, "pan.___", state 499, "((i<1))" + line 412, "pan.___", state 499, "((i>=1))" + line 419, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 507, "(1)" + line 419, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 508, "else" + line 419, "pan.___", state 511, "(1)" + line 419, "pan.___", state 512, "(1)" + line 419, "pan.___", state 512, "(1)" + line 423, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 521, "(1)" + line 423, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 522, "else" + line 423, "pan.___", state 525, "(1)" + line 423, "pan.___", state 526, "(1)" + line 423, "pan.___", state 526, "(1)" + line 421, "pan.___", state 531, "((i<2))" + line 421, "pan.___", state 531, "((i>=2))" + line 248, "pan.___", state 537, "(1)" + line 252, "pan.___", state 545, "(1)" + line 252, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, "pan.___", state 546, "else" + line 250, "pan.___", state 551, "((i<1))" + line 250, "pan.___", state 551, "((i>=1))" + line 256, "pan.___", state 557, "(1)" + line 256, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, "pan.___", state 558, "else" + line 260, "pan.___", state 565, "(1)" + line 260, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, "pan.___", state 566, "else" + line 258, "pan.___", state 571, "((i<2))" + line 258, "pan.___", state 571, "((i>=2))" + line 265, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, "pan.___", state 575, "else" + line 430, "pan.___", state 577, "(1)" + line 430, "pan.___", state 577, "(1)" + line 690, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 690, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 690, "pan.___", state 582, "(1)" + line 410, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 653, "(1)" + line 256, "pan.___", state 673, "(1)" + line 260, "pan.___", state 681, "(1)" + line 410, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 771, "(1)" + line 256, "pan.___", state 791, "(1)" + line 260, "pan.___", state 799, "(1)" + line 410, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 820, "(1)" + line 410, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 821, "else" + line 410, "pan.___", state 824, "(1)" + line 414, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 834, "(1)" + line 414, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 835, "else" + line 414, "pan.___", state 838, "(1)" + line 414, "pan.___", state 839, "(1)" + line 414, "pan.___", state 839, "(1)" + line 412, "pan.___", state 844, "((i<1))" + line 412, "pan.___", state 844, "((i>=1))" + line 419, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 852, "(1)" + line 419, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 853, "else" + line 419, "pan.___", state 856, "(1)" + line 419, "pan.___", state 857, "(1)" + line 419, "pan.___", state 857, "(1)" + line 423, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 866, "(1)" + line 423, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 867, "else" + line 423, "pan.___", state 870, "(1)" + line 423, "pan.___", state 871, "(1)" + line 423, "pan.___", state 871, "(1)" + line 421, "pan.___", state 876, "((i<2))" + line 421, "pan.___", state 876, "((i>=2))" + line 248, "pan.___", state 882, "(1)" + line 252, "pan.___", state 890, "(1)" + line 252, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, "pan.___", state 891, "else" + line 250, "pan.___", state 896, "((i<1))" + line 250, "pan.___", state 896, "((i>=1))" + line 256, "pan.___", state 902, "(1)" + line 256, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, "pan.___", state 903, "else" + line 260, "pan.___", state 910, "(1)" + line 260, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, "pan.___", state 911, "else" + line 258, "pan.___", state 916, "((i<2))" + line 258, "pan.___", state 916, "((i>=2))" + line 265, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, "pan.___", state 920, "else" + line 430, "pan.___", state 922, "(1)" + line 430, "pan.___", state 922, "(1)" + line 698, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 410, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 995, "(1)" + line 256, "pan.___", state 1015, "(1)" + line 260, "pan.___", state 1023, "(1)" + line 410, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1109, "(1)" + line 256, "pan.___", state 1129, "(1)" + line 260, "pan.___", state 1137, "(1)" + line 410, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1224, "(1)" + line 256, "pan.___", state 1244, "(1)" + line 260, "pan.___", state 1252, "(1)" + line 410, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1335, "(1)" + line 256, "pan.___", state 1355, "(1)" + line 260, "pan.___", state 1363, "(1)" + line 410, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1451, "(1)" + line 256, "pan.___", state 1471, "(1)" + line 260, "pan.___", state 1479, "(1)" + line 410, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1562, "(1)" + line 256, "pan.___", state 1582, "(1)" + line 260, "pan.___", state 1590, "(1)" + line 410, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1676, "(1)" + line 256, "pan.___", state 1696, "(1)" + line 260, "pan.___", state 1704, "(1)" + line 737, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 410, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1794, "(1)" + line 256, "pan.___", state 1814, "(1)" + line 260, "pan.___", state 1822, "(1)" + line 410, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1905, "(1)" + line 256, "pan.___", state 1925, "(1)" + line 260, "pan.___", state 1933, "(1)" + line 410, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1956, "(1)" + line 410, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 1957, "else" + line 410, "pan.___", state 1960, "(1)" + line 414, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1970, "(1)" + line 414, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 1971, "else" + line 414, "pan.___", state 1974, "(1)" + line 414, "pan.___", state 1975, "(1)" + line 414, "pan.___", state 1975, "(1)" + line 412, "pan.___", state 1980, "((i<1))" + line 412, "pan.___", state 1980, "((i>=1))" + line 419, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1988, "(1)" + line 419, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 1989, "else" + line 419, "pan.___", state 1992, "(1)" + line 419, "pan.___", state 1993, "(1)" + line 419, "pan.___", state 1993, "(1)" + line 423, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2002, "(1)" + line 423, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 2003, "else" + line 423, "pan.___", state 2006, "(1)" + line 423, "pan.___", state 2007, "(1)" + line 423, "pan.___", state 2007, "(1)" + line 421, "pan.___", state 2012, "((i<2))" + line 421, "pan.___", state 2012, "((i>=2))" + line 248, "pan.___", state 2018, "(1)" + line 252, "pan.___", state 2026, "(1)" + line 252, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, "pan.___", state 2027, "else" + line 250, "pan.___", state 2032, "((i<1))" + line 250, "pan.___", state 2032, "((i>=1))" + line 256, "pan.___", state 2038, "(1)" + line 256, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, "pan.___", state 2039, "else" + line 260, "pan.___", state 2046, "(1)" + line 260, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, "pan.___", state 2047, "else" + line 258, "pan.___", state 2052, "((i<2))" + line 258, "pan.___", state 2052, "((i>=2))" + line 265, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, "pan.___", state 2056, "else" + line 430, "pan.___", state 2058, "(1)" + line 430, "pan.___", state 2058, "(1)" + line 737, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 737, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 737, "pan.___", state 2063, "(1)" + line 410, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2134, "(1)" + line 256, "pan.___", state 2154, "(1)" + line 260, "pan.___", state 2162, "(1)" + line 410, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2251, "(1)" + line 256, "pan.___", state 2271, "(1)" + line 260, "pan.___", state 2279, "(1)" + line 410, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2362, "(1)" + line 256, "pan.___", state 2382, "(1)" + line 260, "pan.___", state 2390, "(1)" + line 248, "pan.___", state 2421, "(1)" + line 256, "pan.___", state 2441, "(1)" + line 260, "pan.___", state 2449, "(1)" + line 248, "pan.___", state 2464, "(1)" + line 256, "pan.___", state 2484, "(1)" + line 260, "pan.___", state 2492, "(1)" + line 897, "pan.___", state 2509, "-end-" + (221 of 2509 states) +unreached in proctype urcu_writer + line 410, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 248, "pan.___", state 82, "(1)" + line 252, "pan.___", state 90, "(1)" + line 256, "pan.___", state 102, "(1)" + line 271, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 257, "(1)" + line 252, "pan.___", state 265, "(1)" + line 256, "pan.___", state 277, "(1)" + line 260, "pan.___", state 285, "(1)" + line 414, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 378, "(1)" + line 256, "pan.___", state 390, "(1)" + line 260, "pan.___", state 398, "(1)" + line 414, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 499, "(1)" + line 256, "pan.___", state 511, "(1)" + line 260, "pan.___", state 519, "(1)" + line 414, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 610, "(1)" + line 256, "pan.___", state 622, "(1)" + line 260, "pan.___", state 630, "(1)" + line 414, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 723, "(1)" + line 256, "pan.___", state 735, "(1)" + line 260, "pan.___", state 743, "(1)" + line 271, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 820, "(1)" + line 283, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 843, "(1)" + line 252, "pan.___", state 851, "(1)" + line 256, "pan.___", state 863, "(1)" + line 260, "pan.___", state 871, "(1)" + line 271, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 911, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 924, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 933, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 949, "(1)" + line 252, "pan.___", state 957, "(1)" + line 256, "pan.___", state 969, "(1)" + line 260, "pan.___", state 977, "(1)" + line 275, "pan.___", state 1003, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1016, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1025, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1041, "(1)" + line 252, "pan.___", state 1049, "(1)" + line 256, "pan.___", state 1061, "(1)" + line 260, "pan.___", state 1069, "(1)" + line 271, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 1109, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1122, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1131, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1147, "(1)" + line 252, "pan.___", state 1155, "(1)" + line 256, "pan.___", state 1167, "(1)" + line 260, "pan.___", state 1175, "(1)" + line 275, "pan.___", state 1201, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1214, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1239, "(1)" + line 252, "pan.___", state 1247, "(1)" + line 256, "pan.___", state 1259, "(1)" + line 260, "pan.___", state 1267, "(1)" + line 271, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 1307, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1320, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1329, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1345, "(1)" + line 252, "pan.___", state 1353, "(1)" + line 256, "pan.___", state 1365, "(1)" + line 260, "pan.___", state 1373, "(1)" + line 275, "pan.___", state 1399, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1412, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1421, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1437, "(1)" + line 252, "pan.___", state 1445, "(1)" + line 256, "pan.___", state 1457, "(1)" + line 260, "pan.___", state 1465, "(1)" + line 271, "pan.___", state 1496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 1505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1518, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1543, "(1)" + line 252, "pan.___", state 1551, "(1)" + line 256, "pan.___", state 1563, "(1)" + line 260, "pan.___", state 1571, "(1)" + line 1236, "pan.___", state 1587, "-end-" + (103 of 1587 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1299, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 2.6e+03 seconds +pan: rate 26856.415 states/second +pan: avg transition delay 2.7296e-06 usec +cp .input.spin urcu_free.spin.input +cp .input.spin.trail urcu_free.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/urcu-controldataflow-intel-ipi/urcu_free.ltl b/urcu-controldataflow-intel-ipi/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow-intel-ipi/urcu_free.spin.input b/urcu-controldataflow-intel-ipi/urcu_free.spin.input new file mode 100644 index 0000000..66927ee --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free.spin.input @@ -0,0 +1,1272 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi/urcu_free_nested.define b/urcu-controldataflow-intel-ipi/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_mb.define b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_mb.log b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.log new file mode 100644 index 0000000..1984f88 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.log @@ -0,0 +1,592 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 8619 States= 1e+06 Transitions= 8e+06 Memory= 550.432 t= 20.2 R= 5e+04 +Depth= 8619 States= 2e+06 Transitions= 1.8e+07 Memory= 634.318 t= 46.3 R= 4e+04 +Depth= 8619 States= 3e+06 Transitions= 2.53e+07 Memory= 718.303 t= 64.9 R= 5e+04 +pan: resizing hashtable to -w22.. done +Depth= 8619 States= 4e+06 Transitions= 3.53e+07 Memory= 833.311 t= 91.4 R= 4e+04 +Depth= 8619 States= 5e+06 Transitions= 5.71e+07 Memory= 917.295 t= 152 R= 3e+04 +Depth= 8619 States= 6e+06 Transitions= 6.81e+07 Memory= 1001.279 t= 181 R= 3e+04 +Depth= 8619 States= 7e+06 Transitions= 8.02e+07 Memory= 1085.264 t= 214 R= 3e+04 +Depth= 8619 States= 8e+06 Transitions= 8.9e+07 Memory= 1169.151 t= 238 R= 3e+04 +pan: claim violated! (at depth 1359) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 8619, errors: 1 + 8162162 states, stored + 81941434 states, matched + 90103596 transitions (= stored+matched) +1.3256628e+09 atomic steps +hash conflicts: 60101961 (resolved) + +Stats on memory usage (in Megabytes): + 902.949 equivalent memory usage for states (stored*(State-vector + overhead)) + 693.526 actual memory usage for states (compression: 76.81%) + state-vector as stored = 61 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 1182.822 total actual memory usage + +unreached in proctype urcu_reader + line 272, "pan.___", state 34, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 56, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 65, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 81, "(1)" + line 253, "pan.___", state 89, "(1)" + line 257, "pan.___", state 101, "(1)" + line 261, "pan.___", state 109, "(1)" + line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 199, "(1)" + line 257, "pan.___", state 219, "(1)" + line 261, "pan.___", state 227, "(1)" + line 700, "pan.___", state 246, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 253, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 285, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 299, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 317, "(1)" + line 257, "pan.___", state 337, "(1)" + line 261, "pan.___", state 345, "(1)" + line 411, "pan.___", state 364, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 396, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 410, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 428, "(1)" + line 257, "pan.___", state 448, "(1)" + line 261, "pan.___", state 456, "(1)" + line 411, "pan.___", state 477, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 479, "(1)" + line 411, "pan.___", state 480, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 480, "else" + line 411, "pan.___", state 483, "(1)" + line 415, "pan.___", state 491, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 493, "(1)" + line 415, "pan.___", state 494, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 494, "else" + line 415, "pan.___", state 497, "(1)" + line 415, "pan.___", state 498, "(1)" + line 415, "pan.___", state 498, "(1)" + line 413, "pan.___", state 503, "((i<1))" + line 413, "pan.___", state 503, "((i>=1))" + line 420, "pan.___", state 509, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 511, "(1)" + line 420, "pan.___", state 512, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 512, "else" + line 420, "pan.___", state 515, "(1)" + line 420, "pan.___", state 516, "(1)" + line 420, "pan.___", state 516, "(1)" + line 424, "pan.___", state 523, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 525, "(1)" + line 424, "pan.___", state 526, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 526, "else" + line 424, "pan.___", state 529, "(1)" + line 424, "pan.___", state 530, "(1)" + line 424, "pan.___", state 530, "(1)" + line 422, "pan.___", state 535, "((i<2))" + line 422, "pan.___", state 535, "((i>=2))" + line 249, "pan.___", state 541, "(1)" + line 253, "pan.___", state 549, "(1)" + line 253, "pan.___", state 550, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 550, "else" + line 251, "pan.___", state 555, "((i<1))" + line 251, "pan.___", state 555, "((i>=1))" + line 257, "pan.___", state 561, "(1)" + line 257, "pan.___", state 562, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 562, "else" + line 261, "pan.___", state 569, "(1)" + line 261, "pan.___", state 570, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 570, "else" + line 259, "pan.___", state 575, "((i<2))" + line 259, "pan.___", state 575, "((i>=2))" + line 266, "pan.___", state 579, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 579, "else" + line 431, "pan.___", state 581, "(1)" + line 431, "pan.___", state 581, "(1)" + line 700, "pan.___", state 584, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 700, "pan.___", state 585, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 700, "pan.___", state 586, "(1)" + line 411, "pan.___", state 593, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 625, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 639, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 657, "(1)" + line 257, "pan.___", state 677, "(1)" + line 261, "pan.___", state 685, "(1)" + line 411, "pan.___", state 711, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 743, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 757, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 775, "(1)" + line 257, "pan.___", state 795, "(1)" + line 261, "pan.___", state 803, "(1)" + line 411, "pan.___", state 822, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 824, "(1)" + line 411, "pan.___", state 825, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 825, "else" + line 411, "pan.___", state 828, "(1)" + line 415, "pan.___", state 836, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 838, "(1)" + line 415, "pan.___", state 839, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 839, "else" + line 415, "pan.___", state 842, "(1)" + line 415, "pan.___", state 843, "(1)" + line 415, "pan.___", state 843, "(1)" + line 413, "pan.___", state 848, "((i<1))" + line 413, "pan.___", state 848, "((i>=1))" + line 420, "pan.___", state 854, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 856, "(1)" + line 420, "pan.___", state 857, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 857, "else" + line 420, "pan.___", state 860, "(1)" + line 420, "pan.___", state 861, "(1)" + line 420, "pan.___", state 861, "(1)" + line 424, "pan.___", state 868, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 870, "(1)" + line 424, "pan.___", state 871, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 871, "else" + line 424, "pan.___", state 874, "(1)" + line 424, "pan.___", state 875, "(1)" + line 424, "pan.___", state 875, "(1)" + line 422, "pan.___", state 880, "((i<2))" + line 422, "pan.___", state 880, "((i>=2))" + line 249, "pan.___", state 886, "(1)" + line 253, "pan.___", state 894, "(1)" + line 253, "pan.___", state 895, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 895, "else" + line 251, "pan.___", state 900, "((i<1))" + line 251, "pan.___", state 900, "((i>=1))" + line 257, "pan.___", state 906, "(1)" + line 257, "pan.___", state 907, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 907, "else" + line 261, "pan.___", state 914, "(1)" + line 261, "pan.___", state 915, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 915, "else" + line 259, "pan.___", state 920, "((i<2))" + line 259, "pan.___", state 920, "((i>=2))" + line 266, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 924, "else" + line 431, "pan.___", state 926, "(1)" + line 431, "pan.___", state 926, "(1)" + line 708, "pan.___", state 930, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 935, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 967, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 981, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 999, "(1)" + line 257, "pan.___", state 1019, "(1)" + line 261, "pan.___", state 1027, "(1)" + line 411, "pan.___", state 1049, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1081, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1095, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1113, "(1)" + line 257, "pan.___", state 1133, "(1)" + line 261, "pan.___", state 1141, "(1)" + line 411, "pan.___", state 1164, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1196, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1210, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1228, "(1)" + line 257, "pan.___", state 1248, "(1)" + line 261, "pan.___", state 1256, "(1)" + line 411, "pan.___", state 1275, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1307, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1321, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1339, "(1)" + line 257, "pan.___", state 1359, "(1)" + line 261, "pan.___", state 1367, "(1)" + line 411, "pan.___", state 1391, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1423, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1437, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1455, "(1)" + line 257, "pan.___", state 1475, "(1)" + line 261, "pan.___", state 1483, "(1)" + line 411, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1534, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1548, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1566, "(1)" + line 257, "pan.___", state 1586, "(1)" + line 261, "pan.___", state 1594, "(1)" + line 411, "pan.___", state 1616, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1648, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1662, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1680, "(1)" + line 257, "pan.___", state 1700, "(1)" + line 261, "pan.___", state 1708, "(1)" + line 747, "pan.___", state 1727, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1734, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1766, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1780, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1798, "(1)" + line 257, "pan.___", state 1818, "(1)" + line 261, "pan.___", state 1826, "(1)" + line 411, "pan.___", state 1845, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1877, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1891, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1909, "(1)" + line 257, "pan.___", state 1929, "(1)" + line 261, "pan.___", state 1937, "(1)" + line 411, "pan.___", state 1958, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 1960, "(1)" + line 411, "pan.___", state 1961, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 1961, "else" + line 411, "pan.___", state 1964, "(1)" + line 415, "pan.___", state 1972, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1974, "(1)" + line 415, "pan.___", state 1975, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 1975, "else" + line 415, "pan.___", state 1978, "(1)" + line 415, "pan.___", state 1979, "(1)" + line 415, "pan.___", state 1979, "(1)" + line 413, "pan.___", state 1984, "((i<1))" + line 413, "pan.___", state 1984, "((i>=1))" + line 420, "pan.___", state 1990, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1992, "(1)" + line 420, "pan.___", state 1993, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 1993, "else" + line 420, "pan.___", state 1996, "(1)" + line 420, "pan.___", state 1997, "(1)" + line 420, "pan.___", state 1997, "(1)" + line 424, "pan.___", state 2004, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2006, "(1)" + line 424, "pan.___", state 2007, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2007, "else" + line 424, "pan.___", state 2010, "(1)" + line 424, "pan.___", state 2011, "(1)" + line 424, "pan.___", state 2011, "(1)" + line 422, "pan.___", state 2016, "((i<2))" + line 422, "pan.___", state 2016, "((i>=2))" + line 249, "pan.___", state 2022, "(1)" + line 253, "pan.___", state 2030, "(1)" + line 253, "pan.___", state 2031, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2031, "else" + line 251, "pan.___", state 2036, "((i<1))" + line 251, "pan.___", state 2036, "((i>=1))" + line 257, "pan.___", state 2042, "(1)" + line 257, "pan.___", state 2043, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2043, "else" + line 261, "pan.___", state 2050, "(1)" + line 261, "pan.___", state 2051, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2051, "else" + line 259, "pan.___", state 2056, "((i<2))" + line 259, "pan.___", state 2056, "((i>=2))" + line 266, "pan.___", state 2060, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2060, "else" + line 431, "pan.___", state 2062, "(1)" + line 431, "pan.___", state 2062, "(1)" + line 747, "pan.___", state 2065, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 747, "pan.___", state 2066, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 747, "pan.___", state 2067, "(1)" + line 411, "pan.___", state 2074, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2106, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2120, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2138, "(1)" + line 257, "pan.___", state 2158, "(1)" + line 261, "pan.___", state 2166, "(1)" + line 411, "pan.___", state 2191, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2223, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2237, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2255, "(1)" + line 257, "pan.___", state 2275, "(1)" + line 261, "pan.___", state 2283, "(1)" + line 411, "pan.___", state 2302, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2334, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2348, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2366, "(1)" + line 257, "pan.___", state 2386, "(1)" + line 261, "pan.___", state 2394, "(1)" + line 249, "pan.___", state 2425, "(1)" + line 257, "pan.___", state 2445, "(1)" + line 261, "pan.___", state 2453, "(1)" + line 249, "pan.___", state 2468, "(1)" + line 257, "pan.___", state 2488, "(1)" + line 261, "pan.___", state 2496, "(1)" + line 898, "pan.___", state 2513, "-end-" + (221 of 2513 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 20, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 26, "(1)" + line 415, "pan.___", state 34, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 40, "(1)" + line 415, "pan.___", state 41, "(1)" + line 415, "pan.___", state 41, "(1)" + line 413, "pan.___", state 46, "((i<1))" + line 413, "pan.___", state 46, "((i>=1))" + line 420, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 58, "(1)" + line 420, "pan.___", state 59, "(1)" + line 420, "pan.___", state 59, "(1)" + line 424, "pan.___", state 72, "(1)" + line 424, "pan.___", state 73, "(1)" + line 424, "pan.___", state 73, "(1)" + line 422, "pan.___", state 78, "((i<2))" + line 422, "pan.___", state 78, "((i>=2))" + line 249, "pan.___", state 84, "(1)" + line 253, "pan.___", state 92, "(1)" + line 253, "pan.___", state 93, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 93, "else" + line 251, "pan.___", state 98, "((i<1))" + line 251, "pan.___", state 98, "((i>=1))" + line 257, "pan.___", state 104, "(1)" + line 257, "pan.___", state 105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 105, "else" + line 261, "pan.___", state 112, "(1)" + line 261, "pan.___", state 113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 113, "else" + line 259, "pan.___", state 118, "((i<2))" + line 259, "pan.___", state 118, "((i>=2))" + line 266, "pan.___", state 122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 122, "else" + line 431, "pan.___", state 124, "(1)" + line 431, "pan.___", state 124, "(1)" + line 272, "pan.___", state 133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 142, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 274, "pan.___", state 150, "((i<1))" + line 274, "pan.___", state 150, "((i>=1))" + line 280, "pan.___", state 155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 1021, "pan.___", state 183, "old_data = cached_rcu_ptr.val[_pid]" + line 1032, "pan.___", state 187, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" + line 411, "pan.___", state 195, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 201, "(1)" + line 415, "pan.___", state 209, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 215, "(1)" + line 415, "pan.___", state 216, "(1)" + line 415, "pan.___", state 216, "(1)" + line 420, "pan.___", state 229, "(1)" + line 424, "pan.___", state 241, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 259, "(1)" + line 253, "pan.___", state 267, "(1)" + line 261, "pan.___", state 287, "(1)" + line 431, "pan.___", state 299, "(1)" + line 431, "pan.___", state 299, "(1)" + line 415, "pan.___", state 322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 380, "(1)" + line 261, "pan.___", state 400, "(1)" + line 415, "pan.___", state 443, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 253, "pan.___", state 501, "(1)" + line 415, "pan.___", state 554, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 253, "pan.___", state 612, "(1)" + line 415, "pan.___", state 667, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 699, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 725, "(1)" + line 261, "pan.___", state 745, "(1)" + line 1168, "pan.___", state 770, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" + line 272, "pan.___", state 798, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 800, "(1)" + line 276, "pan.___", state 807, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 809, "(1)" + line 276, "pan.___", state 810, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 810, "else" + line 274, "pan.___", state 815, "((i<1))" + line 274, "pan.___", state 815, "((i>=1))" + line 280, "pan.___", state 820, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 822, "(1)" + line 280, "pan.___", state 823, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 823, "else" + line 284, "pan.___", state 829, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 831, "(1)" + line 284, "pan.___", state 832, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 832, "else" + line 282, "pan.___", state 837, "((i<2))" + line 282, "pan.___", state 837, "((i>=2))" + line 249, "pan.___", state 845, "(1)" + line 253, "pan.___", state 853, "(1)" + line 253, "pan.___", state 854, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 854, "else" + line 251, "pan.___", state 859, "((i<1))" + line 251, "pan.___", state 859, "((i>=1))" + line 257, "pan.___", state 865, "(1)" + line 257, "pan.___", state 866, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 866, "else" + line 261, "pan.___", state 873, "(1)" + line 261, "pan.___", state 874, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 874, "else" + line 266, "pan.___", state 883, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 883, "else" + line 1222, "pan.___", state 899, "((i<1))" + line 1222, "pan.___", state 899, "((i>=1))" + line 272, "pan.___", state 904, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 906, "(1)" + line 276, "pan.___", state 913, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 915, "(1)" + line 276, "pan.___", state 916, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 916, "else" + line 274, "pan.___", state 921, "((i<1))" + line 274, "pan.___", state 921, "((i>=1))" + line 280, "pan.___", state 926, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 928, "(1)" + line 280, "pan.___", state 929, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 929, "else" + line 284, "pan.___", state 935, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 937, "(1)" + line 284, "pan.___", state 938, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 938, "else" + line 282, "pan.___", state 943, "((i<2))" + line 282, "pan.___", state 943, "((i>=2))" + line 249, "pan.___", state 951, "(1)" + line 253, "pan.___", state 959, "(1)" + line 253, "pan.___", state 960, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 960, "else" + line 251, "pan.___", state 965, "((i<1))" + line 251, "pan.___", state 965, "((i>=1))" + line 257, "pan.___", state 971, "(1)" + line 257, "pan.___", state 972, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 972, "else" + line 261, "pan.___", state 979, "(1)" + line 261, "pan.___", state 980, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 980, "else" + line 266, "pan.___", state 989, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 989, "else" + line 299, "pan.___", state 991, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 991, "else" + line 1222, "pan.___", state 992, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 1222, "pan.___", state 992, "else" + line 276, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1018, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1027, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1043, "(1)" + line 253, "pan.___", state 1051, "(1)" + line 257, "pan.___", state 1063, "(1)" + line 261, "pan.___", state 1071, "(1)" + line 272, "pan.___", state 1102, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1111, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1124, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1133, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1149, "(1)" + line 253, "pan.___", state 1157, "(1)" + line 257, "pan.___", state 1169, "(1)" + line 261, "pan.___", state 1177, "(1)" + line 276, "pan.___", state 1203, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1225, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1241, "(1)" + line 253, "pan.___", state 1249, "(1)" + line 257, "pan.___", state 1261, "(1)" + line 261, "pan.___", state 1269, "(1)" + line 272, "pan.___", state 1300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1309, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1322, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1331, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1347, "(1)" + line 253, "pan.___", state 1355, "(1)" + line 257, "pan.___", state 1367, "(1)" + line 261, "pan.___", state 1375, "(1)" + line 272, "pan.___", state 1392, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1394, "(1)" + line 276, "pan.___", state 1401, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1403, "(1)" + line 276, "pan.___", state 1404, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1404, "else" + line 274, "pan.___", state 1409, "((i<1))" + line 274, "pan.___", state 1409, "((i>=1))" + line 280, "pan.___", state 1414, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1416, "(1)" + line 280, "pan.___", state 1417, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1417, "else" + line 284, "pan.___", state 1423, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1425, "(1)" + line 284, "pan.___", state 1426, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1426, "else" + line 282, "pan.___", state 1431, "((i<2))" + line 282, "pan.___", state 1431, "((i>=2))" + line 249, "pan.___", state 1439, "(1)" + line 253, "pan.___", state 1447, "(1)" + line 253, "pan.___", state 1448, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1448, "else" + line 251, "pan.___", state 1453, "((i<1))" + line 251, "pan.___", state 1453, "((i>=1))" + line 257, "pan.___", state 1459, "(1)" + line 257, "pan.___", state 1460, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1460, "else" + line 261, "pan.___", state 1467, "(1)" + line 261, "pan.___", state 1468, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1468, "else" + line 266, "pan.___", state 1477, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1477, "else" + line 1233, "pan.___", state 1480, "i = 0" + line 1233, "pan.___", state 1482, "reader_barrier = 1" + line 1233, "pan.___", state 1493, "((i<1))" + line 1233, "pan.___", state 1493, "((i>=1))" + line 272, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1500, "(1)" + line 276, "pan.___", state 1507, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1509, "(1)" + line 276, "pan.___", state 1510, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1510, "else" + line 274, "pan.___", state 1515, "((i<1))" + line 274, "pan.___", state 1515, "((i>=1))" + line 280, "pan.___", state 1520, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1522, "(1)" + line 280, "pan.___", state 1523, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1523, "else" + line 284, "pan.___", state 1529, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1531, "(1)" + line 284, "pan.___", state 1532, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1532, "else" + line 282, "pan.___", state 1537, "((i<2))" + line 282, "pan.___", state 1537, "((i>=2))" + line 249, "pan.___", state 1545, "(1)" + line 253, "pan.___", state 1553, "(1)" + line 253, "pan.___", state 1554, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1554, "else" + line 251, "pan.___", state 1559, "((i<1))" + line 251, "pan.___", state 1559, "((i>=1))" + line 257, "pan.___", state 1565, "(1)" + line 257, "pan.___", state 1566, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1566, "else" + line 261, "pan.___", state 1573, "(1)" + line 261, "pan.___", state 1574, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1574, "else" + line 266, "pan.___", state 1583, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1583, "else" + line 299, "pan.___", state 1585, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1585, "else" + line 1233, "pan.___", state 1586, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 1233, "pan.___", state 1586, "else" + line 1237, "pan.___", state 1589, "-end-" + (179 of 1589 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 241 seconds +pan: rate 33888.985 states/second +pan: avg transition delay 2.673e-06 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..ddb4112 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input @@ -0,0 +1,1273 @@ +#define NO_MB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input.trail b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..e886f80 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,1362 @@ +-2:3:-2 +-4:-4:-4 +1:0:4182 +2:3:4102 +3:3:4105 +4:3:4105 +5:3:4108 +6:3:4116 +7:3:4116 +8:3:4119 +9:3:4125 +10:3:4129 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+1343:1:2429 +1344:1:2436 +1345:1:2441 +1346:1:2448 +1347:1:2449 +1348:1:2448 +1349:1:2449 +1350:1:2456 +1351:1:2460 +1352:0:4182 +1353:2:3303 +1354:0:4182 +1355:1:1157 +1356:1:1158 +1357:0:4180 +1358:2:3302 +1359:0:4186 +1360:1:2169 diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.define b/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.log b/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.log new file mode 100644 index 0000000..42698f6 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.log @@ -0,0 +1,510 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 9420 States= 1e+06 Transitions= 7.12e+06 Memory= 550.432 t= 17.7 R= 6e+04 +Depth= 9420 States= 2e+06 Transitions= 1.53e+07 Memory= 634.318 t= 38.9 R= 5e+04 +Depth= 9420 States= 3e+06 Transitions= 2.54e+07 Memory= 718.303 t= 66.3 R= 5e+04 +pan: resizing hashtable to -w22.. done +Depth= 9420 States= 4e+06 Transitions= 3.3e+07 Memory= 833.311 t= 86.1 R= 5e+04 +Depth= 9420 States= 5e+06 Transitions= 4.08e+07 Memory= 917.295 t= 106 R= 5e+04 +Depth= 9420 States= 6e+06 Transitions= 5.88e+07 Memory= 1001.279 t= 157 R= 4e+04 +Depth= 9420 States= 7e+06 Transitions= 7.01e+07 Memory= 1085.264 t= 187 R= 4e+04 +Depth= 9420 States= 8e+06 Transitions= 8.44e+07 Memory= 1169.151 t= 227 R= 4e+04 +Depth= 9420 States= 9e+06 Transitions= 9.77e+07 Memory= 1253.135 t= 264 R= 3e+04 +pan: resizing hashtable to -w24.. done +Depth= 9420 States= 1e+07 Transitions= 1.11e+08 Memory= 1461.115 t= 302 R= 3e+04 +Depth= 9420 States= 1.1e+07 Transitions= 1.24e+08 Memory= 1545.100 t= 336 R= 3e+04 +Depth= 9420 States= 1.2e+07 Transitions= 1.33e+08 Memory= 1629.084 t= 362 R= 3e+04 +Depth= 9420 States= 1.3e+07 Transitions= 1.46e+08 Memory= 1713.068 t= 397 R= 3e+04 +Depth= 9420 States= 1.4e+07 Transitions= 1.76e+08 Memory= 1797.053 t= 485 R= 3e+04 +Depth= 9420 States= 1.5e+07 Transitions= 1.95e+08 Memory= 1881.037 t= 540 R= 3e+04 +Depth= 9420 States= 1.6e+07 Transitions= 2.12e+08 Memory= 1964.924 t= 587 R= 3e+04 +Depth= 9420 States= 1.7e+07 Transitions= 2.25e+08 Memory= 2048.908 t= 622 R= 3e+04 +Depth= 9420 States= 1.8e+07 Transitions= 2.44e+08 Memory= 2132.893 t= 676 R= 3e+04 +Depth= 9420 States= 1.9e+07 Transitions= 2.6e+08 Memory= 2216.877 t= 721 R= 3e+04 +Depth= 9420 States= 2e+07 Transitions= 2.78e+08 Memory= 2300.861 t= 771 R= 3e+04 +Depth= 9522 States= 2.1e+07 Transitions= 2.91e+08 Memory= 2384.846 t= 808 R= 3e+04 +Depth= 9542 States= 2.2e+07 Transitions= 3.05e+08 Memory= 2468.830 t= 847 R= 3e+04 +Depth= 9542 States= 2.3e+07 Transitions= 3.16e+08 Memory= 2552.717 t= 878 R= 3e+04 +Depth= 9542 States= 2.4e+07 Transitions= 3.28e+08 Memory= 2636.701 t= 910 R= 3e+04 +Depth= 9542 States= 2.5e+07 Transitions= 3.41e+08 Memory= 2720.686 t= 947 R= 3e+04 +Depth= 9542 States= 2.6e+07 Transitions= 3.53e+08 Memory= 2804.670 t= 979 R= 3e+04 +Depth= 9542 States= 2.7e+07 Transitions= 3.66e+08 Memory= 2888.654 t= 1.02e+03 R= 3e+04 +Depth= 9542 States= 2.8e+07 Transitions= 3.79e+08 Memory= 2972.639 t= 1.05e+03 R= 3e+04 +Depth= 9542 States= 2.9e+07 Transitions= 3.92e+08 Memory= 3056.526 t= 1.09e+03 R= 3e+04 +Depth= 9542 States= 3e+07 Transitions= 4.04e+08 Memory= 3140.510 t= 1.12e+03 R= 3e+04 +Depth= 9542 States= 3.1e+07 Transitions= 4.17e+08 Memory= 3224.494 t= 1.16e+03 R= 3e+04 +Depth= 9542 States= 3.2e+07 Transitions= 4.28e+08 Memory= 3308.479 t= 1.19e+03 R= 3e+04 +Depth= 9542 States= 3.3e+07 Transitions= 4.39e+08 Memory= 3392.463 t= 1.22e+03 R= 3e+04 +Depth= 9542 States= 3.4e+07 Transitions= 4.53e+08 Memory= 3476.447 t= 1.26e+03 R= 3e+04 +pan: resizing hashtable to -w26.. done +Depth= 9542 States= 3.5e+07 Transitions= 4.7e+08 Memory= 4056.416 t= 1.32e+03 R= 3e+04 +Depth= 9542 States= 3.6e+07 Transitions= 4.83e+08 Memory= 4140.401 t= 1.35e+03 R= 3e+04 +Depth= 9542 States= 3.7e+07 Transitions= 4.99e+08 Memory= 4224.385 t= 1.4e+03 R= 3e+04 +Depth= 9542 States= 3.8e+07 Transitions= 5.14e+08 Memory= 4308.369 t= 1.44e+03 R= 3e+04 +Depth= 9542 States= 3.9e+07 Transitions= 5.29e+08 Memory= 4392.354 t= 1.48e+03 R= 3e+04 +Depth= 9542 States= 4e+07 Transitions= 5.39e+08 Memory= 4476.338 t= 1.51e+03 R= 3e+04 +Depth= 9542 States= 4.1e+07 Transitions= 5.49e+08 Memory= 4560.225 t= 1.53e+03 R= 3e+04 +Depth= 9542 States= 4.2e+07 Transitions= 5.61e+08 Memory= 4644.209 t= 1.56e+03 R= 3e+04 +Depth= 9542 States= 4.3e+07 Transitions= 5.88e+08 Memory= 4728.193 t= 1.64e+03 R= 3e+04 +Depth= 9542 States= 4.4e+07 Transitions= 6.14e+08 Memory= 4812.178 t= 1.72e+03 R= 3e+04 +Depth= 9542 States= 4.5e+07 Transitions= 6.31e+08 Memory= 4896.162 t= 1.76e+03 R= 3e+04 +Depth= 9542 States= 4.6e+07 Transitions= 6.41e+08 Memory= 4980.147 t= 1.79e+03 R= 3e+04 +Depth= 9542 States= 4.7e+07 Transitions= 6.57e+08 Memory= 5064.131 t= 1.84e+03 R= 3e+04 +Depth= 9542 States= 4.8e+07 Transitions= 6.76e+08 Memory= 5148.018 t= 1.89e+03 R= 3e+04 +Depth= 9542 States= 4.9e+07 Transitions= 6.93e+08 Memory= 5232.002 t= 1.94e+03 R= 3e+04 +Depth= 9542 States= 5e+07 Transitions= 7.08e+08 Memory= 5315.986 t= 1.98e+03 R= 3e+04 +Depth= 9542 States= 5.1e+07 Transitions= 7.21e+08 Memory= 5399.971 t= 2.02e+03 R= 3e+04 +Depth= 9542 States= 5.2e+07 Transitions= 7.34e+08 Memory= 5483.955 t= 2.05e+03 R= 3e+04 +Depth= 9542 States= 5.3e+07 Transitions= 7.47e+08 Memory= 5567.940 t= 2.09e+03 R= 3e+04 +Depth= 9542 States= 5.4e+07 Transitions= 7.58e+08 Memory= 5651.826 t= 2.12e+03 R= 3e+04 +Depth= 9542 States= 5.5e+07 Transitions= 7.71e+08 Memory= 5735.811 t= 2.15e+03 R= 3e+04 +Depth= 9542 States= 5.6e+07 Transitions= 7.83e+08 Memory= 5819.795 t= 2.19e+03 R= 3e+04 +Depth= 9542 States= 5.7e+07 Transitions= 7.98e+08 Memory= 5903.779 t= 2.23e+03 R= 3e+04 +Depth= 9542 States= 5.8e+07 Transitions= 8.08e+08 Memory= 5987.764 t= 2.25e+03 R= 3e+04 +Depth= 9542 States= 5.9e+07 Transitions= 8.22e+08 Memory= 6071.748 t= 2.29e+03 R= 3e+04 +Depth= 9542 States= 6e+07 Transitions= 8.33e+08 Memory= 6155.733 t= 2.32e+03 R= 3e+04 +Depth= 9542 States= 6.1e+07 Transitions= 8.44e+08 Memory= 6239.619 t= 2.35e+03 R= 3e+04 +Depth= 9542 States= 6.2e+07 Transitions= 8.56e+08 Memory= 6323.604 t= 2.39e+03 R= 3e+04 +Depth= 9542 States= 6.3e+07 Transitions= 8.74e+08 Memory= 6407.588 t= 2.44e+03 R= 3e+04 +Depth= 9542 States= 6.4e+07 Transitions= 8.86e+08 Memory= 6491.572 t= 2.47e+03 R= 3e+04 +Depth= 9542 States= 6.5e+07 Transitions= 9.01e+08 Memory= 6575.557 t= 2.51e+03 R= 3e+04 +Depth= 9542 States= 6.6e+07 Transitions= 9.17e+08 Memory= 6659.541 t= 2.55e+03 R= 3e+04 +Depth= 9542 States= 6.7e+07 Transitions= 9.31e+08 Memory= 6743.428 t= 2.59e+03 R= 3e+04 +Depth= 9542 States= 6.8e+07 Transitions= 9.46e+08 Memory= 6827.412 t= 2.64e+03 R= 3e+04 +Depth= 9542 States= 6.9e+07 Transitions= 9.6e+08 Memory= 6911.397 t= 2.67e+03 R= 3e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 9542, errors: 0 + 69795266 states, stored +9.0126381e+08 states, matched +9.7105908e+08 transitions (= stored+matched) +1.4943649e+10 atomic steps +hash conflicts: 5.4028862e+08 (resolved) + +Stats on memory usage (in Megabytes): + 7721.187 equivalent memory usage for states (stored*(State-vector + overhead)) + 6011.798 actual memory usage for states (compression: 77.86%) + state-vector as stored = 62 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 3.368 memory lost to fragmentation + 6978.193 total actual memory usage + +unreached in proctype urcu_reader + line 272, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 77, "(1)" + line 253, "pan.___", state 85, "(1)" + line 257, "pan.___", state 97, "(1)" + line 261, "pan.___", state 105, "(1)" + line 411, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 195, "(1)" + line 257, "pan.___", state 215, "(1)" + line 261, "pan.___", state 223, "(1)" + line 691, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 313, "(1)" + line 257, "pan.___", state 333, "(1)" + line 261, "pan.___", state 341, "(1)" + line 411, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 424, "(1)" + line 257, "pan.___", state 444, "(1)" + line 261, "pan.___", state 452, "(1)" + line 411, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 475, "(1)" + line 411, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 476, "else" + line 411, "pan.___", state 479, "(1)" + line 415, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 489, "(1)" + line 415, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 490, "else" + line 415, "pan.___", state 493, "(1)" + line 415, "pan.___", state 494, "(1)" + line 415, "pan.___", state 494, "(1)" + line 413, "pan.___", state 499, "((i<1))" + line 413, "pan.___", state 499, "((i>=1))" + line 420, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 507, "(1)" + line 420, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 508, "else" + line 420, "pan.___", state 511, "(1)" + line 420, "pan.___", state 512, "(1)" + line 420, "pan.___", state 512, "(1)" + line 424, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 521, "(1)" + line 424, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 522, "else" + line 424, "pan.___", state 525, "(1)" + line 424, "pan.___", state 526, "(1)" + line 424, "pan.___", state 526, "(1)" + line 422, "pan.___", state 531, "((i<2))" + line 422, "pan.___", state 531, "((i>=2))" + line 249, "pan.___", state 537, "(1)" + line 253, "pan.___", state 545, "(1)" + line 253, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 546, "else" + line 251, "pan.___", state 551, "((i<1))" + line 251, "pan.___", state 551, "((i>=1))" + line 257, "pan.___", state 557, "(1)" + line 257, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 558, "else" + line 261, "pan.___", state 565, "(1)" + line 261, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 566, "else" + line 259, "pan.___", state 571, "((i<2))" + line 259, "pan.___", state 571, "((i>=2))" + line 266, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 575, "else" + line 431, "pan.___", state 577, "(1)" + line 431, "pan.___", state 577, "(1)" + line 691, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 691, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 691, "pan.___", state 582, "(1)" + line 411, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 653, "(1)" + line 257, "pan.___", state 673, "(1)" + line 261, "pan.___", state 681, "(1)" + line 411, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 771, "(1)" + line 257, "pan.___", state 791, "(1)" + line 261, "pan.___", state 799, "(1)" + line 411, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 820, "(1)" + line 411, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 821, "else" + line 411, "pan.___", state 824, "(1)" + line 415, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 834, "(1)" + line 415, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 835, "else" + line 415, "pan.___", state 838, "(1)" + line 415, "pan.___", state 839, "(1)" + line 415, "pan.___", state 839, "(1)" + line 413, "pan.___", state 844, "((i<1))" + line 413, "pan.___", state 844, "((i>=1))" + line 420, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 852, "(1)" + line 420, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 853, "else" + line 420, "pan.___", state 856, "(1)" + line 420, "pan.___", state 857, "(1)" + line 420, "pan.___", state 857, "(1)" + line 424, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 866, "(1)" + line 424, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 867, "else" + line 424, "pan.___", state 870, "(1)" + line 424, "pan.___", state 871, "(1)" + line 424, "pan.___", state 871, "(1)" + line 422, "pan.___", state 876, "((i<2))" + line 422, "pan.___", state 876, "((i>=2))" + line 249, "pan.___", state 882, "(1)" + line 253, "pan.___", state 890, "(1)" + line 253, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 891, "else" + line 251, "pan.___", state 896, "((i<1))" + line 251, "pan.___", state 896, "((i>=1))" + line 257, "pan.___", state 902, "(1)" + line 257, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 903, "else" + line 261, "pan.___", state 910, "(1)" + line 261, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 911, "else" + line 259, "pan.___", state 916, "((i<2))" + line 259, "pan.___", state 916, "((i>=2))" + line 266, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 920, "else" + line 431, "pan.___", state 922, "(1)" + line 431, "pan.___", state 922, "(1)" + line 699, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 995, "(1)" + line 257, "pan.___", state 1015, "(1)" + line 261, "pan.___", state 1023, "(1)" + line 411, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1109, "(1)" + line 257, "pan.___", state 1129, "(1)" + line 261, "pan.___", state 1137, "(1)" + line 411, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1224, "(1)" + line 257, "pan.___", state 1244, "(1)" + line 261, "pan.___", state 1252, "(1)" + line 411, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1335, "(1)" + line 257, "pan.___", state 1355, "(1)" + line 261, "pan.___", state 1363, "(1)" + line 411, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1451, "(1)" + line 257, "pan.___", state 1471, "(1)" + line 261, "pan.___", state 1479, "(1)" + line 411, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1562, "(1)" + line 257, "pan.___", state 1582, "(1)" + line 261, "pan.___", state 1590, "(1)" + line 411, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1676, "(1)" + line 257, "pan.___", state 1696, "(1)" + line 261, "pan.___", state 1704, "(1)" + line 738, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1794, "(1)" + line 257, "pan.___", state 1814, "(1)" + line 261, "pan.___", state 1822, "(1)" + line 411, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1905, "(1)" + line 257, "pan.___", state 1925, "(1)" + line 261, "pan.___", state 1933, "(1)" + line 411, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 1956, "(1)" + line 411, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 1957, "else" + line 411, "pan.___", state 1960, "(1)" + line 415, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1970, "(1)" + line 415, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 1971, "else" + line 415, "pan.___", state 1974, "(1)" + line 415, "pan.___", state 1975, "(1)" + line 415, "pan.___", state 1975, "(1)" + line 413, "pan.___", state 1980, "((i<1))" + line 413, "pan.___", state 1980, "((i>=1))" + line 420, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1988, "(1)" + line 420, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 1989, "else" + line 420, "pan.___", state 1992, "(1)" + line 420, "pan.___", state 1993, "(1)" + line 420, "pan.___", state 1993, "(1)" + line 424, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2002, "(1)" + line 424, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2003, "else" + line 424, "pan.___", state 2006, "(1)" + line 424, "pan.___", state 2007, "(1)" + line 424, "pan.___", state 2007, "(1)" + line 422, "pan.___", state 2012, "((i<2))" + line 422, "pan.___", state 2012, "((i>=2))" + line 249, "pan.___", state 2018, "(1)" + line 253, "pan.___", state 2026, "(1)" + line 253, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2027, "else" + line 251, "pan.___", state 2032, "((i<1))" + line 251, "pan.___", state 2032, "((i>=1))" + line 257, "pan.___", state 2038, "(1)" + line 257, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2039, "else" + line 261, "pan.___", state 2046, "(1)" + line 261, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2047, "else" + line 259, "pan.___", state 2052, "((i<2))" + line 259, "pan.___", state 2052, "((i>=2))" + line 266, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2056, "else" + line 431, "pan.___", state 2058, "(1)" + line 431, "pan.___", state 2058, "(1)" + line 738, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 738, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 738, "pan.___", state 2063, "(1)" + line 411, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2134, "(1)" + line 257, "pan.___", state 2154, "(1)" + line 261, "pan.___", state 2162, "(1)" + line 411, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2251, "(1)" + line 257, "pan.___", state 2271, "(1)" + line 261, "pan.___", state 2279, "(1)" + line 411, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2362, "(1)" + line 257, "pan.___", state 2382, "(1)" + line 261, "pan.___", state 2390, "(1)" + line 411, "pan.___", state 2421, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2453, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2467, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2485, "(1)" + line 257, "pan.___", state 2505, "(1)" + line 261, "pan.___", state 2513, "(1)" + line 411, "pan.___", state 2530, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2562, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2576, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2594, "(1)" + line 257, "pan.___", state 2614, "(1)" + line 261, "pan.___", state 2622, "(1)" + line 898, "pan.___", state 2641, "-end-" + (227 of 2641 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 82, "(1)" + line 253, "pan.___", state 90, "(1)" + line 257, "pan.___", state 102, "(1)" + line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 257, "(1)" + line 253, "pan.___", state 265, "(1)" + line 257, "pan.___", state 277, "(1)" + line 261, "pan.___", state 285, "(1)" + line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 378, "(1)" + line 257, "pan.___", state 390, "(1)" + line 261, "pan.___", state 398, "(1)" + line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 499, "(1)" + line 257, "pan.___", state 511, "(1)" + line 261, "pan.___", state 519, "(1)" + line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 610, "(1)" + line 257, "pan.___", state 622, "(1)" + line 261, "pan.___", state 630, "(1)" + line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 723, "(1)" + line 257, "pan.___", state 735, "(1)" + line 261, "pan.___", state 743, "(1)" + line 272, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 820, "(1)" + line 284, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 843, "(1)" + line 253, "pan.___", state 851, "(1)" + line 257, "pan.___", state 863, "(1)" + line 261, "pan.___", state 871, "(1)" + line 272, "pan.___", state 902, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 911, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 924, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 933, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 949, "(1)" + line 253, "pan.___", state 957, "(1)" + line 257, "pan.___", state 969, "(1)" + line 261, "pan.___", state 977, "(1)" + line 276, "pan.___", state 1003, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1016, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1025, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1041, "(1)" + line 253, "pan.___", state 1049, "(1)" + line 257, "pan.___", state 1061, "(1)" + line 261, "pan.___", state 1069, "(1)" + line 272, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1109, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1122, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1131, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1147, "(1)" + line 253, "pan.___", state 1155, "(1)" + line 257, "pan.___", state 1167, "(1)" + line 261, "pan.___", state 1175, "(1)" + line 276, "pan.___", state 1201, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1214, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1223, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1239, "(1)" + line 253, "pan.___", state 1247, "(1)" + line 257, "pan.___", state 1259, "(1)" + line 261, "pan.___", state 1267, "(1)" + line 272, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1307, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1320, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1329, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1345, "(1)" + line 253, "pan.___", state 1353, "(1)" + line 257, "pan.___", state 1365, "(1)" + line 261, "pan.___", state 1373, "(1)" + line 276, "pan.___", state 1399, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1412, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1421, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1437, "(1)" + line 253, "pan.___", state 1445, "(1)" + line 257, "pan.___", state 1457, "(1)" + line 261, "pan.___", state 1465, "(1)" + line 272, "pan.___", state 1496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1518, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1527, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1543, "(1)" + line 253, "pan.___", state 1551, "(1)" + line 257, "pan.___", state 1563, "(1)" + line 261, "pan.___", state 1571, "(1)" + line 1237, "pan.___", state 1587, "-end-" + (103 of 1587 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 2.7e+03 seconds +pan: rate 25814.341 states/second +pan: avg transition delay 2.7843e-06 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.spin.input b/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..80445f6 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_rmb.spin.input @@ -0,0 +1,1273 @@ +#define NO_RMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.define b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.log b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.log new file mode 100644 index 0000000..319fbe9 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.log @@ -0,0 +1,530 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 9172 States= 1e+06 Transitions= 6.87e+06 Memory= 550.432 t= 17 R= 6e+04 +Depth= 9172 States= 2e+06 Transitions= 1.47e+07 Memory= 634.318 t= 37.6 R= 5e+04 +Depth= 9172 States= 3e+06 Transitions= 2.46e+07 Memory= 718.303 t= 64.2 R= 5e+04 +pan: resizing hashtable to -w22.. done +Depth= 9172 States= 4e+06 Transitions= 3.19e+07 Memory= 833.311 t= 83.2 R= 5e+04 +Depth= 9172 States= 5e+06 Transitions= 3.95e+07 Memory= 917.295 t= 103 R= 5e+04 +Depth= 9172 States= 6e+06 Transitions= 5.71e+07 Memory= 1001.279 t= 152 R= 4e+04 +Depth= 9172 States= 7e+06 Transitions= 6.81e+07 Memory= 1085.264 t= 182 R= 4e+04 +Depth= 9172 States= 8e+06 Transitions= 8.22e+07 Memory= 1169.151 t= 221 R= 4e+04 +Depth= 9172 States= 9e+06 Transitions= 9.54e+07 Memory= 1253.135 t= 258 R= 3e+04 +pan: resizing hashtable to -w24.. done +Depth= 9172 States= 1e+07 Transitions= 1.08e+08 Memory= 1461.115 t= 295 R= 3e+04 +Depth= 9172 States= 1.1e+07 Transitions= 1.2e+08 Memory= 1545.100 t= 327 R= 3e+04 +Depth= 9172 States= 1.2e+07 Transitions= 1.27e+08 Memory= 1629.084 t= 344 R= 3e+04 +Depth= 9172 States= 1.3e+07 Transitions= 1.35e+08 Memory= 1713.068 t= 365 R= 4e+04 +Depth= 9172 States= 1.4e+07 Transitions= 1.46e+08 Memory= 1797.053 t= 394 R= 4e+04 +Depth= 9172 States= 1.5e+07 Transitions= 1.53e+08 Memory= 1881.037 t= 413 R= 4e+04 +Depth= 9172 States= 1.6e+07 Transitions= 1.6e+08 Memory= 1964.924 t= 432 R= 4e+04 +Depth= 9172 States= 1.7e+07 Transitions= 1.76e+08 Memory= 2048.908 t= 475 R= 4e+04 +Depth= 9172 States= 1.8e+07 Transitions= 1.9e+08 Memory= 2132.893 t= 515 R= 3e+04 +Depth= 9172 States= 1.9e+07 Transitions= 2.02e+08 Memory= 2216.877 t= 548 R= 3e+04 +Depth= 9172 States= 2e+07 Transitions= 2.15e+08 Memory= 2300.861 t= 585 R= 3e+04 +Depth= 9172 States= 2.1e+07 Transitions= 2.25e+08 Memory= 2384.846 t= 610 R= 3e+04 +Depth= 9172 States= 2.2e+07 Transitions= 2.38e+08 Memory= 2468.830 t= 646 R= 3e+04 +Depth= 9172 States= 2.3e+07 Transitions= 2.67e+08 Memory= 2552.717 t= 732 R= 3e+04 +Depth= 9172 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2636.701 t= 785 R= 3e+04 +Depth= 9172 States= 2.5e+07 Transitions= 3.03e+08 Memory= 2720.686 t= 832 R= 3e+04 +Depth= 9172 States= 2.6e+07 Transitions= 3.12e+08 Memory= 2804.670 t= 857 R= 3e+04 +Depth= 9172 States= 2.7e+07 Transitions= 3.27e+08 Memory= 2888.654 t= 899 R= 3e+04 +Depth= 9172 States= 2.8e+07 Transitions= 3.57e+08 Memory= 2972.639 t= 987 R= 3e+04 +Depth= 9172 States= 2.9e+07 Transitions= 3.73e+08 Memory= 3056.526 t= 1.03e+03 R= 3e+04 +Depth= 9172 States= 3e+07 Transitions= 3.86e+08 Memory= 3140.510 t= 1.07e+03 R= 3e+04 +Depth= 9172 States= 3.1e+07 Transitions= 4.03e+08 Memory= 3224.494 t= 1.12e+03 R= 3e+04 +Depth= 9172 States= 3.2e+07 Transitions= 4.22e+08 Memory= 3308.479 t= 1.17e+03 R= 3e+04 +Depth= 9172 States= 3.3e+07 Transitions= 4.39e+08 Memory= 3392.463 t= 1.22e+03 R= 3e+04 +Depth= 9172 States= 3.4e+07 Transitions= 4.56e+08 Memory= 3476.447 t= 1.27e+03 R= 3e+04 +pan: resizing hashtable to -w26.. done +Depth= 9234 States= 3.5e+07 Transitions= 4.73e+08 Memory= 4056.416 t= 1.33e+03 R= 3e+04 +Depth= 9234 States= 3.6e+07 Transitions= 4.85e+08 Memory= 4140.401 t= 1.36e+03 R= 3e+04 +Depth= 9273 States= 3.7e+07 Transitions= 5e+08 Memory= 4224.385 t= 1.4e+03 R= 3e+04 +Depth= 9273 States= 3.8e+07 Transitions= 5.14e+08 Memory= 4308.369 t= 1.44e+03 R= 3e+04 +Depth= 9273 States= 3.9e+07 Transitions= 5.26e+08 Memory= 4392.354 t= 1.47e+03 R= 3e+04 +Depth= 9273 States= 4e+07 Transitions= 5.39e+08 Memory= 4476.338 t= 1.51e+03 R= 3e+04 +Depth= 9273 States= 4.1e+07 Transitions= 5.5e+08 Memory= 4560.322 t= 1.54e+03 R= 3e+04 +Depth= 9273 States= 4.2e+07 Transitions= 5.64e+08 Memory= 4644.209 t= 1.58e+03 R= 3e+04 +Depth= 9273 States= 4.3e+07 Transitions= 5.75e+08 Memory= 4728.193 t= 1.61e+03 R= 3e+04 +Depth= 9273 States= 4.4e+07 Transitions= 5.86e+08 Memory= 4812.178 t= 1.64e+03 R= 3e+04 +Depth= 9273 States= 4.5e+07 Transitions= 6.01e+08 Memory= 4896.162 t= 1.68e+03 R= 3e+04 +Depth= 9273 States= 4.6e+07 Transitions= 6.16e+08 Memory= 4980.147 t= 1.72e+03 R= 3e+04 +Depth= 9273 States= 4.7e+07 Transitions= 6.29e+08 Memory= 5064.131 t= 1.76e+03 R= 3e+04 +Depth= 9273 States= 4.8e+07 Transitions= 6.4e+08 Memory= 5148.018 t= 1.79e+03 R= 3e+04 +Depth= 9273 States= 4.9e+07 Transitions= 6.51e+08 Memory= 5232.002 t= 1.82e+03 R= 3e+04 +Depth= 9273 States= 5e+07 Transitions= 6.66e+08 Memory= 5315.986 t= 1.86e+03 R= 3e+04 +Depth= 9273 States= 5.1e+07 Transitions= 6.8e+08 Memory= 5399.971 t= 1.9e+03 R= 3e+04 +Depth= 9273 States= 5.2e+07 Transitions= 6.9e+08 Memory= 5483.955 t= 1.93e+03 R= 3e+04 +Depth= 9273 States= 5.3e+07 Transitions= 7.01e+08 Memory= 5567.940 t= 1.96e+03 R= 3e+04 +Depth= 9273 States= 5.4e+07 Transitions= 7.14e+08 Memory= 5651.826 t= 1.99e+03 R= 3e+04 +Depth= 9273 States= 5.5e+07 Transitions= 7.26e+08 Memory= 5735.811 t= 2.02e+03 R= 3e+04 +Depth= 9273 States= 5.6e+07 Transitions= 7.44e+08 Memory= 5819.795 t= 2.07e+03 R= 3e+04 +Depth= 9273 States= 5.7e+07 Transitions= 7.57e+08 Memory= 5903.779 t= 2.11e+03 R= 3e+04 +Depth= 9273 States= 5.8e+07 Transitions= 7.72e+08 Memory= 5987.764 t= 2.15e+03 R= 3e+04 +Depth= 9273 States= 5.9e+07 Transitions= 7.87e+08 Memory= 6071.748 t= 2.19e+03 R= 3e+04 +Depth= 9273 States= 6e+07 Transitions= 8.03e+08 Memory= 6155.733 t= 2.24e+03 R= 3e+04 +Depth= 9273 States= 6.1e+07 Transitions= 8.18e+08 Memory= 6239.619 t= 2.28e+03 R= 3e+04 +Depth= 9273 States= 6.2e+07 Transitions= 8.31e+08 Memory= 6323.604 t= 2.31e+03 R= 3e+04 +Depth= 9273 States= 6.3e+07 Transitions= 8.38e+08 Memory= 6407.588 t= 2.33e+03 R= 3e+04 +Depth= 9273 States= 6.4e+07 Transitions= 8.46e+08 Memory= 6491.572 t= 2.35e+03 R= 3e+04 +Depth= 9273 States= 6.5e+07 Transitions= 8.56e+08 Memory= 6575.557 t= 2.38e+03 R= 3e+04 +Depth= 9273 States= 6.6e+07 Transitions= 8.63e+08 Memory= 6659.541 t= 2.4e+03 R= 3e+04 +Depth= 9273 States= 6.7e+07 Transitions= 8.7e+08 Memory= 6743.428 t= 2.42e+03 R= 3e+04 +Depth= 9273 States= 6.8e+07 Transitions= 8.88e+08 Memory= 6827.412 t= 2.47e+03 R= 3e+04 +Depth= 9273 States= 6.9e+07 Transitions= 9e+08 Memory= 6911.397 t= 2.5e+03 R= 3e+04 +pan: claim violated! (at depth 1431) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 9273, errors: 1 + 69874699 states, stored +8.4222224e+08 states, matched +9.1209694e+08 transitions (= stored+matched) +1.3919028e+10 atomic steps +hash conflicts: 5.0632776e+08 (resolved) + +Stats on memory usage (in Megabytes): + 7729.974 equivalent memory usage for states (stored*(State-vector + overhead)) + 6018.458 actual memory usage for states (compression: 77.86%) + state-vector as stored = 62 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 3.388 memory lost to fragmentation + 6984.834 total actual memory usage + +unreached in proctype urcu_reader + line 272, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 77, "(1)" + line 253, "pan.___", state 85, "(1)" + line 257, "pan.___", state 97, "(1)" + line 261, "pan.___", state 105, "(1)" + line 411, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 195, "(1)" + line 257, "pan.___", state 215, "(1)" + line 261, "pan.___", state 223, "(1)" + line 691, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 313, "(1)" + line 257, "pan.___", state 333, "(1)" + line 261, "pan.___", state 341, "(1)" + line 411, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 424, "(1)" + line 257, "pan.___", state 444, "(1)" + line 261, "pan.___", state 452, "(1)" + line 411, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 475, "(1)" + line 411, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 476, "else" + line 411, "pan.___", state 479, "(1)" + line 415, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 489, "(1)" + line 415, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 490, "else" + line 415, "pan.___", state 493, "(1)" + line 415, "pan.___", state 494, "(1)" + line 415, "pan.___", state 494, "(1)" + line 413, "pan.___", state 499, "((i<1))" + line 413, "pan.___", state 499, "((i>=1))" + line 420, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 507, "(1)" + line 420, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 508, "else" + line 420, "pan.___", state 511, "(1)" + line 420, "pan.___", state 512, "(1)" + line 420, "pan.___", state 512, "(1)" + line 424, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 521, "(1)" + line 424, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 522, "else" + line 424, "pan.___", state 525, "(1)" + line 424, "pan.___", state 526, "(1)" + line 424, "pan.___", state 526, "(1)" + line 422, "pan.___", state 531, "((i<2))" + line 422, "pan.___", state 531, "((i>=2))" + line 249, "pan.___", state 537, "(1)" + line 253, "pan.___", state 545, "(1)" + line 253, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 546, "else" + line 251, "pan.___", state 551, "((i<1))" + line 251, "pan.___", state 551, "((i>=1))" + line 257, "pan.___", state 557, "(1)" + line 257, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 558, "else" + line 261, "pan.___", state 565, "(1)" + line 261, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 566, "else" + line 259, "pan.___", state 571, "((i<2))" + line 259, "pan.___", state 571, "((i>=2))" + line 266, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 575, "else" + line 431, "pan.___", state 577, "(1)" + line 431, "pan.___", state 577, "(1)" + line 691, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 691, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 691, "pan.___", state 582, "(1)" + line 411, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 653, "(1)" + line 257, "pan.___", state 673, "(1)" + line 261, "pan.___", state 681, "(1)" + line 411, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 771, "(1)" + line 257, "pan.___", state 791, "(1)" + line 261, "pan.___", state 799, "(1)" + line 411, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 820, "(1)" + line 411, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 821, "else" + line 411, "pan.___", state 824, "(1)" + line 415, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 834, "(1)" + line 415, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 835, "else" + line 415, "pan.___", state 838, "(1)" + line 415, "pan.___", state 839, "(1)" + line 415, "pan.___", state 839, "(1)" + line 413, "pan.___", state 844, "((i<1))" + line 413, "pan.___", state 844, "((i>=1))" + line 420, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 852, "(1)" + line 420, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 853, "else" + line 420, "pan.___", state 856, "(1)" + line 420, "pan.___", state 857, "(1)" + line 420, "pan.___", state 857, "(1)" + line 424, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 866, "(1)" + line 424, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 867, "else" + line 424, "pan.___", state 870, "(1)" + line 424, "pan.___", state 871, "(1)" + line 424, "pan.___", state 871, "(1)" + line 422, "pan.___", state 876, "((i<2))" + line 422, "pan.___", state 876, "((i>=2))" + line 249, "pan.___", state 882, "(1)" + line 253, "pan.___", state 890, "(1)" + line 253, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 891, "else" + line 251, "pan.___", state 896, "((i<1))" + line 251, "pan.___", state 896, "((i>=1))" + line 257, "pan.___", state 902, "(1)" + line 257, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 903, "else" + line 261, "pan.___", state 910, "(1)" + line 261, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 911, "else" + line 259, "pan.___", state 916, "((i<2))" + line 259, "pan.___", state 916, "((i>=2))" + line 266, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 920, "else" + line 431, "pan.___", state 922, "(1)" + line 431, "pan.___", state 922, "(1)" + line 699, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 995, "(1)" + line 257, "pan.___", state 1015, "(1)" + line 261, "pan.___", state 1023, "(1)" + line 411, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1109, "(1)" + line 257, "pan.___", state 1129, "(1)" + line 261, "pan.___", state 1137, "(1)" + line 411, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1224, "(1)" + line 257, "pan.___", state 1244, "(1)" + line 261, "pan.___", state 1252, "(1)" + line 411, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1335, "(1)" + line 257, "pan.___", state 1355, "(1)" + line 261, "pan.___", state 1363, "(1)" + line 411, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1451, "(1)" + line 257, "pan.___", state 1471, "(1)" + line 261, "pan.___", state 1479, "(1)" + line 411, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1562, "(1)" + line 257, "pan.___", state 1582, "(1)" + line 261, "pan.___", state 1590, "(1)" + line 411, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1676, "(1)" + line 257, "pan.___", state 1696, "(1)" + line 261, "pan.___", state 1704, "(1)" + line 738, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1794, "(1)" + line 257, "pan.___", state 1814, "(1)" + line 261, "pan.___", state 1822, "(1)" + line 411, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1905, "(1)" + line 257, "pan.___", state 1925, "(1)" + line 261, "pan.___", state 1933, "(1)" + line 411, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 1956, "(1)" + line 411, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 1957, "else" + line 411, "pan.___", state 1960, "(1)" + line 415, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1970, "(1)" + line 415, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 1971, "else" + line 415, "pan.___", state 1974, "(1)" + line 415, "pan.___", state 1975, "(1)" + line 415, "pan.___", state 1975, "(1)" + line 413, "pan.___", state 1980, "((i<1))" + line 413, "pan.___", state 1980, "((i>=1))" + line 420, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1988, "(1)" + line 420, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 1989, "else" + line 420, "pan.___", state 1992, "(1)" + line 420, "pan.___", state 1993, "(1)" + line 420, "pan.___", state 1993, "(1)" + line 424, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2002, "(1)" + line 424, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2003, "else" + line 424, "pan.___", state 2006, "(1)" + line 424, "pan.___", state 2007, "(1)" + line 424, "pan.___", state 2007, "(1)" + line 422, "pan.___", state 2012, "((i<2))" + line 422, "pan.___", state 2012, "((i>=2))" + line 249, "pan.___", state 2018, "(1)" + line 253, "pan.___", state 2026, "(1)" + line 253, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2027, "else" + line 251, "pan.___", state 2032, "((i<1))" + line 251, "pan.___", state 2032, "((i>=1))" + line 257, "pan.___", state 2038, "(1)" + line 257, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2039, "else" + line 261, "pan.___", state 2046, "(1)" + line 261, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2047, "else" + line 259, "pan.___", state 2052, "((i<2))" + line 259, "pan.___", state 2052, "((i>=2))" + line 266, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2056, "else" + line 431, "pan.___", state 2058, "(1)" + line 431, "pan.___", state 2058, "(1)" + line 738, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 738, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 738, "pan.___", state 2063, "(1)" + line 411, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2134, "(1)" + line 257, "pan.___", state 2154, "(1)" + line 261, "pan.___", state 2162, "(1)" + line 411, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2251, "(1)" + line 257, "pan.___", state 2271, "(1)" + line 261, "pan.___", state 2279, "(1)" + line 411, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2362, "(1)" + line 257, "pan.___", state 2382, "(1)" + line 261, "pan.___", state 2390, "(1)" + line 249, "pan.___", state 2421, "(1)" + line 257, "pan.___", state 2441, "(1)" + line 261, "pan.___", state 2449, "(1)" + line 249, "pan.___", state 2464, "(1)" + line 257, "pan.___", state 2484, "(1)" + line 261, "pan.___", state 2492, "(1)" + line 898, "pan.___", state 2509, "-end-" + (221 of 2509 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 19, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 33, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 83, "(1)" + line 253, "pan.___", state 91, "(1)" + line 272, "pan.___", state 132, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 134, "(1)" + line 276, "pan.___", state 141, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 143, "(1)" + line 276, "pan.___", state 144, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 144, "else" + line 274, "pan.___", state 149, "((i<1))" + line 274, "pan.___", state 149, "((i>=1))" + line 280, "pan.___", state 154, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 156, "(1)" + line 280, "pan.___", state 157, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 157, "else" + line 284, "pan.___", state 163, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 165, "(1)" + line 284, "pan.___", state 166, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 166, "else" + line 289, "pan.___", state 175, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 289, "pan.___", state 175, "else" + line 411, "pan.___", state 194, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 208, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 226, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 240, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 258, "(1)" + line 253, "pan.___", state 266, "(1)" + line 257, "pan.___", state 278, "(1)" + line 261, "pan.___", state 286, "(1)" + line 415, "pan.___", state 321, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 339, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 353, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 379, "(1)" + line 257, "pan.___", state 391, "(1)" + line 261, "pan.___", state 399, "(1)" + line 415, "pan.___", state 442, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 460, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 474, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 500, "(1)" + line 257, "pan.___", state 512, "(1)" + line 261, "pan.___", state 520, "(1)" + line 415, "pan.___", state 553, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 571, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 585, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 611, "(1)" + line 257, "pan.___", state 623, "(1)" + line 261, "pan.___", state 631, "(1)" + line 415, "pan.___", state 666, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 684, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 698, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 724, "(1)" + line 257, "pan.___", state 736, "(1)" + line 261, "pan.___", state 744, "(1)" + line 272, "pan.___", state 797, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 806, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 844, "(1)" + line 253, "pan.___", state 852, "(1)" + line 257, "pan.___", state 864, "(1)" + line 261, "pan.___", state 872, "(1)" + line 272, "pan.___", state 903, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 912, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 925, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 934, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 950, "(1)" + line 253, "pan.___", state 958, "(1)" + line 257, "pan.___", state 970, "(1)" + line 261, "pan.___", state 978, "(1)" + line 276, "pan.___", state 1004, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1017, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1026, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1042, "(1)" + line 253, "pan.___", state 1050, "(1)" + line 257, "pan.___", state 1062, "(1)" + line 261, "pan.___", state 1070, "(1)" + line 272, "pan.___", state 1101, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1110, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1123, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1132, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1148, "(1)" + line 253, "pan.___", state 1156, "(1)" + line 257, "pan.___", state 1168, "(1)" + line 261, "pan.___", state 1176, "(1)" + line 276, "pan.___", state 1202, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1215, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1224, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1240, "(1)" + line 253, "pan.___", state 1248, "(1)" + line 257, "pan.___", state 1260, "(1)" + line 261, "pan.___", state 1268, "(1)" + line 272, "pan.___", state 1299, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1308, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1321, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1330, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1346, "(1)" + line 253, "pan.___", state 1354, "(1)" + line 257, "pan.___", state 1366, "(1)" + line 261, "pan.___", state 1374, "(1)" + line 276, "pan.___", state 1400, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1413, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1422, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1438, "(1)" + line 253, "pan.___", state 1446, "(1)" + line 257, "pan.___", state 1458, "(1)" + line 261, "pan.___", state 1466, "(1)" + line 272, "pan.___", state 1497, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1506, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1519, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1528, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1544, "(1)" + line 253, "pan.___", state 1552, "(1)" + line 257, "pan.___", state 1564, "(1)" + line 261, "pan.___", state 1572, "(1)" + line 1237, "pan.___", state 1588, "-end-" + (109 of 1588 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 2.53e+03 seconds +pan: rate 27617.257 states/second +pan: avg transition delay 2.7739e-06 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..511c963 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input @@ -0,0 +1,1273 @@ +#define NO_WMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input.trail b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..62969b9 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1434 @@ +-2:3:-2 +-4:-4:-4 +1:0:4177 +2:3:4097 +3:3:4100 +4:3:4100 +5:3:4103 +6:3:4111 +7:3:4111 +8:3:4114 +9:3:4120 +10:3:4124 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+1432:1:2165 diff --git a/urcu-controldataflow-intel-ipi/urcu_free_single_flip.define b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow-intel-ipi/urcu_free_single_flip.log b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.log new file mode 100644 index 0000000..3fc8991 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.log @@ -0,0 +1,635 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 9112 States= 1e+06 Transitions= 7.1e+06 Memory= 550.432 t= 17.4 R= 6e+04 +Depth= 9112 States= 2e+06 Transitions= 1.64e+07 Memory= 634.318 t= 41.8 R= 5e+04 +Depth= 9112 States= 3e+06 Transitions= 2.63e+07 Memory= 718.303 t= 68.2 R= 4e+04 +pan: resizing hashtable to -w22.. done +Depth= 9112 States= 4e+06 Transitions= 3.56e+07 Memory= 833.311 t= 93.2 R= 4e+04 +Depth= 9112 States= 5e+06 Transitions= 4.66e+07 Memory= 917.295 t= 122 R= 4e+04 +Depth= 9112 States= 6e+06 Transitions= 5.77e+07 Memory= 1001.279 t= 152 R= 4e+04 +Depth= 9112 States= 7e+06 Transitions= 6.72e+07 Memory= 1085.264 t= 177 R= 4e+04 +Depth= 9112 States= 8e+06 Transitions= 7.41e+07 Memory= 1169.151 t= 194 R= 4e+04 +Depth= 9112 States= 9e+06 Transitions= 8.11e+07 Memory= 1253.135 t= 212 R= 4e+04 +pan: resizing hashtable to -w24.. done +Depth= 9112 States= 1e+07 Transitions= 8.81e+07 Memory= 1461.115 t= 231 R= 4e+04 +Depth= 9112 States= 1.1e+07 Transitions= 9.84e+07 Memory= 1545.100 t= 259 R= 4e+04 +Depth= 9112 States= 1.2e+07 Transitions= 1.08e+08 Memory= 1629.084 t= 282 R= 4e+04 +Depth= 9112 States= 1.3e+07 Transitions= 1.16e+08 Memory= 1713.068 t= 304 R= 4e+04 +Depth= 9112 States= 1.4e+07 Transitions= 1.25e+08 Memory= 1797.053 t= 329 R= 4e+04 +Depth= 9112 States= 1.5e+07 Transitions= 1.35e+08 Memory= 1881.037 t= 352 R= 4e+04 +Depth= 9278 States= 1.6e+07 Transitions= 1.45e+08 Memory= 1964.924 t= 382 R= 4e+04 +Depth= 9283 States= 1.7e+07 Transitions= 1.56e+08 Memory= 2048.908 t= 409 R= 4e+04 +Depth= 9283 States= 1.8e+07 Transitions= 1.66e+08 Memory= 2132.893 t= 437 R= 4e+04 +Depth= 9283 States= 1.9e+07 Transitions= 1.76e+08 Memory= 2216.877 t= 464 R= 4e+04 +Depth= 9283 States= 2e+07 Transitions= 1.87e+08 Memory= 2300.861 t= 493 R= 4e+04 +Depth= 9283 States= 2.1e+07 Transitions= 1.97e+08 Memory= 2384.846 t= 521 R= 4e+04 +Depth= 9283 States= 2.2e+07 Transitions= 2.08e+08 Memory= 2468.830 t= 549 R= 4e+04 +Depth= 9283 States= 2.3e+07 Transitions= 2.17e+08 Memory= 2552.717 t= 572 R= 4e+04 +Depth= 9283 States= 2.4e+07 Transitions= 2.26e+08 Memory= 2636.701 t= 596 R= 4e+04 +Depth= 9283 States= 2.5e+07 Transitions= 2.37e+08 Memory= 2720.686 t= 627 R= 4e+04 +Depth= 9283 States= 2.6e+07 Transitions= 2.49e+08 Memory= 2804.670 t= 659 R= 4e+04 +Depth= 9283 States= 2.7e+07 Transitions= 2.6e+08 Memory= 2888.654 t= 689 R= 4e+04 +Depth= 9283 States= 2.8e+07 Transitions= 2.71e+08 Memory= 2972.639 t= 718 R= 4e+04 +Depth= 9283 States= 2.9e+07 Transitions= 2.8e+08 Memory= 3056.526 t= 741 R= 4e+04 +Depth= 9283 States= 3e+07 Transitions= 2.89e+08 Memory= 3140.510 t= 764 R= 4e+04 +Depth= 9283 States= 3.1e+07 Transitions= 2.99e+08 Memory= 3224.494 t= 791 R= 4e+04 +Depth= 9283 States= 3.2e+07 Transitions= 3.09e+08 Memory= 3308.479 t= 818 R= 4e+04 +Depth= 9283 States= 3.3e+07 Transitions= 3.19e+08 Memory= 3392.463 t= 846 R= 4e+04 +Depth= 9283 States= 3.4e+07 Transitions= 3.29e+08 Memory= 3476.447 t= 873 R= 4e+04 +pan: resizing hashtable to -w26.. done +Depth= 9283 States= 3.5e+07 Transitions= 3.39e+08 Memory= 4056.416 t= 908 R= 4e+04 +Depth= 9283 States= 3.6e+07 Transitions= 3.49e+08 Memory= 4140.401 t= 934 R= 4e+04 +Depth= 9283 States= 3.7e+07 Transitions= 3.59e+08 Memory= 4224.385 t= 959 R= 4e+04 +pan: claim violated! (at depth 1298) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 9283, errors: 1 + 37684654 states, stored +3.2905753e+08 states, matched +3.6674218e+08 transitions (= stored+matched) +5.3145922e+09 atomic steps +hash conflicts: 2.6456917e+08 (resolved) + +Stats on memory usage (in Megabytes): + 4168.911 equivalent memory usage for states (stored*(State-vector + overhead)) + 3314.050 actual memory usage for states (compression: 79.49%) + state-vector as stored = 64 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 1.910 memory lost to fragmentation + 4281.904 total actual memory usage + +unreached in proctype urcu_reader + line 272, "pan.___", state 30, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 61, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 77, "(1)" + line 253, "pan.___", state 85, "(1)" + line 257, "pan.___", state 97, "(1)" + line 261, "pan.___", state 105, "(1)" + line 411, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 163, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 177, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 195, "(1)" + line 257, "pan.___", state 215, "(1)" + line 261, "pan.___", state 223, "(1)" + line 691, "pan.___", state 242, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 249, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 281, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 295, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 313, "(1)" + line 257, "pan.___", state 333, "(1)" + line 261, "pan.___", state 341, "(1)" + line 411, "pan.___", state 360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 392, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 406, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 424, "(1)" + line 257, "pan.___", state 444, "(1)" + line 261, "pan.___", state 452, "(1)" + line 411, "pan.___", state 473, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 475, "(1)" + line 411, "pan.___", state 476, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 476, "else" + line 411, "pan.___", state 479, "(1)" + line 415, "pan.___", state 487, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 489, "(1)" + line 415, "pan.___", state 490, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 490, "else" + line 415, "pan.___", state 493, "(1)" + line 415, "pan.___", state 494, "(1)" + line 415, "pan.___", state 494, "(1)" + line 413, "pan.___", state 499, "((i<1))" + line 413, "pan.___", state 499, "((i>=1))" + line 420, "pan.___", state 505, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 507, "(1)" + line 420, "pan.___", state 508, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 508, "else" + line 420, "pan.___", state 511, "(1)" + line 420, "pan.___", state 512, "(1)" + line 420, "pan.___", state 512, "(1)" + line 424, "pan.___", state 519, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 521, "(1)" + line 424, "pan.___", state 522, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 522, "else" + line 424, "pan.___", state 525, "(1)" + line 424, "pan.___", state 526, "(1)" + line 424, "pan.___", state 526, "(1)" + line 422, "pan.___", state 531, "((i<2))" + line 422, "pan.___", state 531, "((i>=2))" + line 249, "pan.___", state 537, "(1)" + line 253, "pan.___", state 545, "(1)" + line 253, "pan.___", state 546, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 546, "else" + line 251, "pan.___", state 551, "((i<1))" + line 251, "pan.___", state 551, "((i>=1))" + line 257, "pan.___", state 557, "(1)" + line 257, "pan.___", state 558, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 558, "else" + line 261, "pan.___", state 565, "(1)" + line 261, "pan.___", state 566, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 566, "else" + line 259, "pan.___", state 571, "((i<2))" + line 259, "pan.___", state 571, "((i>=2))" + line 266, "pan.___", state 575, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 575, "else" + line 431, "pan.___", state 577, "(1)" + line 431, "pan.___", state 577, "(1)" + line 691, "pan.___", state 580, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 691, "pan.___", state 581, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 691, "pan.___", state 582, "(1)" + line 411, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 621, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 635, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 653, "(1)" + line 257, "pan.___", state 673, "(1)" + line 261, "pan.___", state 681, "(1)" + line 411, "pan.___", state 707, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 739, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 753, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 771, "(1)" + line 257, "pan.___", state 791, "(1)" + line 261, "pan.___", state 799, "(1)" + line 411, "pan.___", state 818, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 820, "(1)" + line 411, "pan.___", state 821, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 821, "else" + line 411, "pan.___", state 824, "(1)" + line 415, "pan.___", state 832, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 834, "(1)" + line 415, "pan.___", state 835, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 835, "else" + line 415, "pan.___", state 838, "(1)" + line 415, "pan.___", state 839, "(1)" + line 415, "pan.___", state 839, "(1)" + line 413, "pan.___", state 844, "((i<1))" + line 413, "pan.___", state 844, "((i>=1))" + line 420, "pan.___", state 850, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 852, "(1)" + line 420, "pan.___", state 853, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 853, "else" + line 420, "pan.___", state 856, "(1)" + line 420, "pan.___", state 857, "(1)" + line 420, "pan.___", state 857, "(1)" + line 424, "pan.___", state 864, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 866, "(1)" + line 424, "pan.___", state 867, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 867, "else" + line 424, "pan.___", state 870, "(1)" + line 424, "pan.___", state 871, "(1)" + line 424, "pan.___", state 871, "(1)" + line 422, "pan.___", state 876, "((i<2))" + line 422, "pan.___", state 876, "((i>=2))" + line 249, "pan.___", state 882, "(1)" + line 253, "pan.___", state 890, "(1)" + line 253, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 891, "else" + line 251, "pan.___", state 896, "((i<1))" + line 251, "pan.___", state 896, "((i>=1))" + line 257, "pan.___", state 902, "(1)" + line 257, "pan.___", state 903, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 903, "else" + line 261, "pan.___", state 910, "(1)" + line 261, "pan.___", state 911, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 911, "else" + line 259, "pan.___", state 916, "((i<2))" + line 259, "pan.___", state 916, "((i>=2))" + line 266, "pan.___", state 920, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 920, "else" + line 431, "pan.___", state 922, "(1)" + line 431, "pan.___", state 922, "(1)" + line 699, "pan.___", state 926, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 963, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 977, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 995, "(1)" + line 257, "pan.___", state 1015, "(1)" + line 261, "pan.___", state 1023, "(1)" + line 411, "pan.___", state 1045, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1077, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1091, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1109, "(1)" + line 257, "pan.___", state 1129, "(1)" + line 261, "pan.___", state 1137, "(1)" + line 411, "pan.___", state 1160, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1192, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1206, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1224, "(1)" + line 257, "pan.___", state 1244, "(1)" + line 261, "pan.___", state 1252, "(1)" + line 411, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1303, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1317, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1335, "(1)" + line 257, "pan.___", state 1355, "(1)" + line 261, "pan.___", state 1363, "(1)" + line 411, "pan.___", state 1387, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1419, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1433, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1451, "(1)" + line 257, "pan.___", state 1471, "(1)" + line 261, "pan.___", state 1479, "(1)" + line 411, "pan.___", state 1498, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1530, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1544, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1562, "(1)" + line 257, "pan.___", state 1582, "(1)" + line 261, "pan.___", state 1590, "(1)" + line 411, "pan.___", state 1612, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1644, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1658, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1676, "(1)" + line 257, "pan.___", state 1696, "(1)" + line 261, "pan.___", state 1704, "(1)" + line 738, "pan.___", state 1723, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1730, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1762, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1776, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1794, "(1)" + line 257, "pan.___", state 1814, "(1)" + line 261, "pan.___", state 1822, "(1)" + line 411, "pan.___", state 1841, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1873, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1887, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1905, "(1)" + line 257, "pan.___", state 1925, "(1)" + line 261, "pan.___", state 1933, "(1)" + line 411, "pan.___", state 1954, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 1956, "(1)" + line 411, "pan.___", state 1957, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 1957, "else" + line 411, "pan.___", state 1960, "(1)" + line 415, "pan.___", state 1968, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1970, "(1)" + line 415, "pan.___", state 1971, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 1971, "else" + line 415, "pan.___", state 1974, "(1)" + line 415, "pan.___", state 1975, "(1)" + line 415, "pan.___", state 1975, "(1)" + line 413, "pan.___", state 1980, "((i<1))" + line 413, "pan.___", state 1980, "((i>=1))" + line 420, "pan.___", state 1986, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1988, "(1)" + line 420, "pan.___", state 1989, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 1989, "else" + line 420, "pan.___", state 1992, "(1)" + line 420, "pan.___", state 1993, "(1)" + line 420, "pan.___", state 1993, "(1)" + line 424, "pan.___", state 2000, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2002, "(1)" + line 424, "pan.___", state 2003, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2003, "else" + line 424, "pan.___", state 2006, "(1)" + line 424, "pan.___", state 2007, "(1)" + line 424, "pan.___", state 2007, "(1)" + line 422, "pan.___", state 2012, "((i<2))" + line 422, "pan.___", state 2012, "((i>=2))" + line 249, "pan.___", state 2018, "(1)" + line 253, "pan.___", state 2026, "(1)" + line 253, "pan.___", state 2027, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2027, "else" + line 251, "pan.___", state 2032, "((i<1))" + line 251, "pan.___", state 2032, "((i>=1))" + line 257, "pan.___", state 2038, "(1)" + line 257, "pan.___", state 2039, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2039, "else" + line 261, "pan.___", state 2046, "(1)" + line 261, "pan.___", state 2047, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2047, "else" + line 259, "pan.___", state 2052, "((i<2))" + line 259, "pan.___", state 2052, "((i>=2))" + line 266, "pan.___", state 2056, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2056, "else" + line 431, "pan.___", state 2058, "(1)" + line 431, "pan.___", state 2058, "(1)" + line 738, "pan.___", state 2061, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 738, "pan.___", state 2062, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 738, "pan.___", state 2063, "(1)" + line 411, "pan.___", state 2070, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2102, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2116, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2134, "(1)" + line 257, "pan.___", state 2154, "(1)" + line 261, "pan.___", state 2162, "(1)" + line 411, "pan.___", state 2187, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2219, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2233, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2251, "(1)" + line 257, "pan.___", state 2271, "(1)" + line 261, "pan.___", state 2279, "(1)" + line 411, "pan.___", state 2298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2330, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2344, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2362, "(1)" + line 257, "pan.___", state 2382, "(1)" + line 261, "pan.___", state 2390, "(1)" + line 249, "pan.___", state 2421, "(1)" + line 257, "pan.___", state 2441, "(1)" + line 261, "pan.___", state 2449, "(1)" + line 249, "pan.___", state 2464, "(1)" + line 257, "pan.___", state 2484, "(1)" + line 261, "pan.___", state 2492, "(1)" + line 898, "pan.___", state 2509, "-end-" + (221 of 2509 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 22, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 36, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 54, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 86, "(1)" + line 253, "pan.___", state 94, "(1)" + line 257, "pan.___", state 106, "(1)" + line 272, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 144, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 157, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 211, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 229, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 243, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 261, "(1)" + line 253, "pan.___", state 269, "(1)" + line 257, "pan.___", state 281, "(1)" + line 261, "pan.___", state 289, "(1)" + line 415, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 342, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 356, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 382, "(1)" + line 257, "pan.___", state 394, "(1)" + line 261, "pan.___", state 402, "(1)" + line 411, "pan.___", state 430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 444, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 462, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 476, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 494, "(1)" + line 253, "pan.___", state 502, "(1)" + line 257, "pan.___", state 514, "(1)" + line 261, "pan.___", state 522, "(1)" + line 411, "pan.___", state 541, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 543, "(1)" + line 411, "pan.___", state 544, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 544, "else" + line 411, "pan.___", state 547, "(1)" + line 415, "pan.___", state 555, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 557, "(1)" + line 415, "pan.___", state 558, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 558, "else" + line 415, "pan.___", state 561, "(1)" + line 415, "pan.___", state 562, "(1)" + line 415, "pan.___", state 562, "(1)" + line 413, "pan.___", state 567, "((i<1))" + line 413, "pan.___", state 567, "((i>=1))" + line 420, "pan.___", state 573, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 575, "(1)" + line 420, "pan.___", state 576, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 576, "else" + line 420, "pan.___", state 579, "(1)" + line 420, "pan.___", state 580, "(1)" + line 420, "pan.___", state 580, "(1)" + line 424, "pan.___", state 587, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 589, "(1)" + line 424, "pan.___", state 590, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 590, "else" + line 424, "pan.___", state 593, "(1)" + line 424, "pan.___", state 594, "(1)" + line 424, "pan.___", state 594, "(1)" + line 422, "pan.___", state 599, "((i<2))" + line 422, "pan.___", state 599, "((i>=2))" + line 249, "pan.___", state 605, "(1)" + line 253, "pan.___", state 613, "(1)" + line 253, "pan.___", state 614, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 614, "else" + line 251, "pan.___", state 619, "((i<1))" + line 251, "pan.___", state 619, "((i>=1))" + line 257, "pan.___", state 625, "(1)" + line 257, "pan.___", state 626, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 626, "else" + line 261, "pan.___", state 633, "(1)" + line 261, "pan.___", state 634, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 634, "else" + line 259, "pan.___", state 639, "((i<2))" + line 259, "pan.___", state 639, "((i>=2))" + line 266, "pan.___", state 643, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 643, "else" + line 431, "pan.___", state 645, "(1)" + line 431, "pan.___", state 645, "(1)" + line 1117, "pan.___", state 649, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" + line 411, "pan.___", state 654, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 656, "(1)" + line 411, "pan.___", state 657, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 657, "else" + line 411, "pan.___", state 660, "(1)" + line 415, "pan.___", state 668, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 670, "(1)" + line 415, "pan.___", state 671, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 671, "else" + line 415, "pan.___", state 674, "(1)" + line 415, "pan.___", state 675, "(1)" + line 415, "pan.___", state 675, "(1)" + line 413, "pan.___", state 680, "((i<1))" + line 413, "pan.___", state 680, "((i>=1))" + line 420, "pan.___", state 686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 688, "(1)" + line 420, "pan.___", state 689, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 689, "else" + line 420, "pan.___", state 692, "(1)" + line 420, "pan.___", state 693, "(1)" + line 420, "pan.___", state 693, "(1)" + line 424, "pan.___", state 700, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 702, "(1)" + line 424, "pan.___", state 703, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 703, "else" + line 424, "pan.___", state 706, "(1)" + line 424, "pan.___", state 707, "(1)" + line 424, "pan.___", state 707, "(1)" + line 422, "pan.___", state 712, "((i<2))" + line 422, "pan.___", state 712, "((i>=2))" + line 249, "pan.___", state 718, "(1)" + line 253, "pan.___", state 726, "(1)" + line 253, "pan.___", state 727, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 727, "else" + line 251, "pan.___", state 732, "((i<1))" + line 251, "pan.___", state 732, "((i>=1))" + line 257, "pan.___", state 738, "(1)" + line 257, "pan.___", state 739, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 739, "else" + line 261, "pan.___", state 746, "(1)" + line 261, "pan.___", state 747, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 747, "else" + line 259, "pan.___", state 752, "((i<2))" + line 259, "pan.___", state 752, "((i>=2))" + line 266, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 756, "else" + line 431, "pan.___", state 758, "(1)" + line 431, "pan.___", state 758, "(1)" + line 1133, "pan.___", state 763, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" + line 1128, "pan.___", state 764, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" + line 1128, "pan.___", state 764, "else" + line 1153, "pan.___", state 768, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" + line 272, "pan.___", state 799, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 823, "(1)" + line 284, "pan.___", state 830, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 846, "(1)" + line 253, "pan.___", state 854, "(1)" + line 257, "pan.___", state 866, "(1)" + line 261, "pan.___", state 874, "(1)" + line 272, "pan.___", state 905, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 914, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 927, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 936, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 952, "(1)" + line 253, "pan.___", state 960, "(1)" + line 257, "pan.___", state 972, "(1)" + line 261, "pan.___", state 980, "(1)" + line 276, "pan.___", state 1006, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1019, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1028, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1044, "(1)" + line 253, "pan.___", state 1052, "(1)" + line 257, "pan.___", state 1064, "(1)" + line 261, "pan.___", state 1072, "(1)" + line 272, "pan.___", state 1103, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1112, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1125, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1134, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1150, "(1)" + line 253, "pan.___", state 1158, "(1)" + line 257, "pan.___", state 1170, "(1)" + line 261, "pan.___", state 1178, "(1)" + line 272, "pan.___", state 1195, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1197, "(1)" + line 276, "pan.___", state 1204, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1206, "(1)" + line 276, "pan.___", state 1207, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1207, "else" + line 274, "pan.___", state 1212, "((i<1))" + line 274, "pan.___", state 1212, "((i>=1))" + line 280, "pan.___", state 1217, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1219, "(1)" + line 280, "pan.___", state 1220, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1220, "else" + line 284, "pan.___", state 1226, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1228, "(1)" + line 284, "pan.___", state 1229, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1229, "else" + line 282, "pan.___", state 1234, "((i<2))" + line 282, "pan.___", state 1234, "((i>=2))" + line 249, "pan.___", state 1242, "(1)" + line 253, "pan.___", state 1250, "(1)" + line 253, "pan.___", state 1251, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1251, "else" + line 251, "pan.___", state 1256, "((i<1))" + line 251, "pan.___", state 1256, "((i>=1))" + line 257, "pan.___", state 1262, "(1)" + line 257, "pan.___", state 1263, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1263, "else" + line 261, "pan.___", state 1270, "(1)" + line 261, "pan.___", state 1271, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1271, "else" + line 266, "pan.___", state 1280, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1280, "else" + line 1229, "pan.___", state 1283, "i = 0" + line 1229, "pan.___", state 1285, "reader_barrier = 1" + line 1229, "pan.___", state 1296, "((i<1))" + line 1229, "pan.___", state 1296, "((i>=1))" + line 272, "pan.___", state 1301, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1303, "(1)" + line 276, "pan.___", state 1310, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1312, "(1)" + line 276, "pan.___", state 1313, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1313, "else" + line 274, "pan.___", state 1318, "((i<1))" + line 274, "pan.___", state 1318, "((i>=1))" + line 280, "pan.___", state 1323, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1325, "(1)" + line 280, "pan.___", state 1326, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1326, "else" + line 284, "pan.___", state 1332, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1334, "(1)" + line 284, "pan.___", state 1335, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1335, "else" + line 282, "pan.___", state 1340, "((i<2))" + line 282, "pan.___", state 1340, "((i>=2))" + line 249, "pan.___", state 1348, "(1)" + line 253, "pan.___", state 1356, "(1)" + line 253, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1357, "else" + line 251, "pan.___", state 1362, "((i<1))" + line 251, "pan.___", state 1362, "((i>=1))" + line 257, "pan.___", state 1368, "(1)" + line 257, "pan.___", state 1369, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1369, "else" + line 261, "pan.___", state 1376, "(1)" + line 261, "pan.___", state 1377, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1377, "else" + line 266, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1386, "else" + line 299, "pan.___", state 1388, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1388, "else" + line 1229, "pan.___", state 1389, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 1229, "pan.___", state 1389, "else" + line 276, "pan.___", state 1402, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1415, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1424, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1440, "(1)" + line 253, "pan.___", state 1448, "(1)" + line 257, "pan.___", state 1460, "(1)" + line 261, "pan.___", state 1468, "(1)" + line 272, "pan.___", state 1499, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1508, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1521, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1530, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1546, "(1)" + line 253, "pan.___", state 1554, "(1)" + line 257, "pan.___", state 1566, "(1)" + line 261, "pan.___", state 1574, "(1)" + line 1237, "pan.___", state 1590, "-end-" + (195 of 1590 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 982 seconds +pan: rate 38391.44 states/second +pan: avg transition delay 2.6765e-06 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' diff --git a/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..6e6560d --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input @@ -0,0 +1,1273 @@ +#define SINGLE_FLIP + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input.trail b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..05857aa --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1301 @@ +-2:3:-2 +-4:-4:-4 +1:0:4179 +2:3:4099 +3:3:4102 +4:3:4102 +5:3:4105 +6:3:4113 +7:3:4113 +8:3:4116 +9:3:4122 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+1280:2:3379 +1281:2:3378 +1282:2:3379 +1283:2:3386 +1284:2:3390 +1285:0:4179 +1286:2:3395 +1287:0:4179 +1288:2:3396 +1289:0:4179 +1290:2:3397 +1291:0:4179 +1292:2:3398 +1293:0:4179 +1294:1:1153 +1295:1:1154 +1296:0:4177 +1297:2:3399 +1298:0:4183 +1299:1:2145 diff --git a/urcu-controldataflow-intel-ipi/urcu_progress.ltl b/urcu-controldataflow-intel-ipi/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-controldataflow-intel-ipi/urcu_progress_reader.define b/urcu-controldataflow-intel-ipi/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-intel-ipi/urcu_progress_writer.define b/urcu-controldataflow-intel-ipi/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow-intel-ipi/urcu_progress_writer.log b/urcu-controldataflow-intel-ipi/urcu_progress_writer.log new file mode 100644 index 0000000..e238402 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_progress_writer.log @@ -0,0 +1,256 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +depth 23: Claim reached state 9 (line 1300) +depth 51: Claim reached state 9 (line 1299) +Depth= 7071 States= 1e+06 Transitions= 1.16e+07 Memory= 514.397 t= 30.7 R= 3e+04 +Depth= 7071 States= 2e+06 Transitions= 2.31e+07 Memory= 566.252 t= 61.5 R= 3e+04 +Depth= 7071 States= 3e+06 Transitions= 3.43e+07 Memory= 617.326 t= 91.6 R= 3e+04 +pan: resizing hashtable to -w22.. done +Depth= 8815 States= 4e+06 Transitions= 4.57e+07 Memory= 696.592 t= 122 R= 3e+04 +Depth= 8815 States= 5e+06 Transitions= 5.73e+07 Memory= 743.955 t= 153 R= 3e+04 +Depth= 8815 States= 6e+06 Transitions= 7.04e+07 Memory= 797.373 t= 190 R= 3e+04 +Depth= 8815 States= 7e+06 Transitions= 8.38e+07 Memory= 847.861 t= 226 R= 3e+04 +Depth= 8815 States= 8e+06 Transitions= 9.59e+07 Memory= 898.057 t= 259 R= 3e+04 +Depth= 8815 States= 9e+06 Transitions= 1.08e+08 Memory= 948.350 t= 293 R= 3e+04 +pan: resizing hashtable to -w24.. done +Depth= 8815 States= 1e+07 Transitions= 1.29e+08 Memory= 1123.615 t= 352 R= 3e+04 +Depth= 8815 States= 1.1e+07 Transitions= 1.41e+08 Memory= 1175.764 t= 385 R= 3e+04 +Depth= 8815 States= 1.2e+07 Transitions= 1.53e+08 Memory= 1225.471 t= 417 R= 3e+04 +Depth= 8815 States= 1.3e+07 Transitions= 1.64e+08 Memory= 1276.057 t= 447 R= 3e+04 +Depth= 8815 States= 1.4e+07 Transitions= 1.75e+08 Memory= 1330.451 t= 477 R= 3e+04 +Depth= 8815 States= 1.5e+07 Transitions= 1.87e+08 Memory= 1379.670 t= 508 R= 3e+04 +Depth= 8815 States= 1.6e+07 Transitions= 1.98e+08 Memory= 1429.865 t= 538 R= 3e+04 +Depth= 8815 States= 1.7e+07 Transitions= 2.09e+08 Memory= 1484.748 t= 568 R= 3e+04 +Depth= 8815 States= 1.8e+07 Transitions= 2.23e+08 Memory= 1529.670 t= 606 R= 3e+04 +Depth= 8815 States= 1.9e+07 Transitions= 2.36e+08 Memory= 1579.377 t= 643 R= 3e+04 +Depth= 8815 States= 2e+07 Transitions= 2.57e+08 Memory= 1629.279 t= 701 R= 3e+04 +Depth= 8815 States= 2.1e+07 Transitions= 2.93e+08 Memory= 1686.115 t= 807 R= 3e+04 +Depth= 9016 States= 2.2e+07 Transitions= 3.11e+08 Memory= 1741.193 t= 858 R= 3e+04 +Depth= 9016 States= 2.3e+07 Transitions= 3.25e+08 Memory= 1793.733 t= 897 R= 3e+04 +Depth= 9016 States= 2.4e+07 Transitions= 3.45e+08 Memory= 1846.272 t= 954 R= 3e+04 +Depth= 9016 States= 2.5e+07 Transitions= 3.67e+08 Memory= 1897.639 t= 1.02e+03 R= 2e+04 +Depth= 9016 States= 2.6e+07 Transitions= 3.84e+08 Memory= 1951.447 t= 1.06e+03 R= 2e+04 +Depth= 9016 States= 2.7e+07 Transitions= 4.07e+08 Memory= 2004.670 t= 1.13e+03 R= 2e+04 +Depth= 9016 States= 2.8e+07 Transitions= 4.29e+08 Memory= 2050.764 t= 1.19e+03 R= 2e+04 +Depth= 9016 States= 2.9e+07 Transitions= 4.48e+08 Memory= 2100.373 t= 1.25e+03 R= 2e+04 +Depth= 9016 States= 3e+07 Transitions= 4.66e+08 Memory= 2151.545 t= 1.3e+03 R= 2e+04 +Depth= 9016 States= 3.1e+07 Transitions= 4.86e+08 Memory= 2201.838 t= 1.36e+03 R= 2e+04 +Depth= 9016 States= 3.2e+07 Transitions= 5.1e+08 Memory= 2250.861 t= 1.43e+03 R= 2e+04 +Depth= 9016 States= 3.3e+07 Transitions= 5.29e+08 Memory= 2299.983 t= 1.48e+03 R= 2e+04 +Depth= 9016 States= 3.4e+07 Transitions= 5.47e+08 Memory= 2351.057 t= 1.53e+03 R= 2e+04 +pan: resizing hashtable to -w26.. done +Depth= 9016 States= 3.5e+07 Transitions= 5.69e+08 Memory= 2896.943 t= 1.6e+03 R= 2e+04 +Depth= 9016 States= 3.6e+07 Transitions= 5.95e+08 Memory= 2945.186 t= 1.67e+03 R= 2e+04 +Depth= 9016 States= 3.7e+07 Transitions= 6.12e+08 Memory= 2995.576 t= 1.72e+03 R= 2e+04 +Depth= 9016 States= 3.8e+07 Transitions= 6.29e+08 Memory= 3042.256 t= 1.77e+03 R= 2e+04 +Depth= 9016 States= 3.9e+07 Transitions= 6.42e+08 Memory= 3093.135 t= 1.8e+03 R= 2e+04 +Depth= 9016 States= 4e+07 Transitions= 6.56e+08 Memory= 3146.651 t= 1.84e+03 R= 2e+04 +Depth= 9016 States= 4.1e+07 Transitions= 6.69e+08 Memory= 3202.901 t= 1.88e+03 R= 2e+04 +Depth= 9016 States= 4.2e+07 Transitions= 6.82e+08 Memory= 3254.951 t= 1.91e+03 R= 2e+04 +Depth= 9016 States= 4.3e+07 Transitions= 6.95e+08 Memory= 3309.053 t= 1.95e+03 R= 2e+04 +Depth= 9016 States= 4.4e+07 Transitions= 7.07e+08 Memory= 3360.615 t= 1.98e+03 R= 2e+04 +Depth= 9016 States= 4.5e+07 Transitions= 7.28e+08 Memory= 3410.713 t= 2.04e+03 R= 2e+04 +Depth= 9016 States= 4.6e+07 Transitions= 7.63e+08 Memory= 3466.963 t= 2.14e+03 R= 2e+04 +Depth= 9016 States= 4.7e+07 Transitions= 7.99e+08 Memory= 3532.295 t= 2.25e+03 R= 2e+04 +Depth= 9016 States= 4.8e+07 Transitions= 8.49e+08 Memory= 3594.307 t= 2.4e+03 R= 2e+04 +Depth= 9016 States= 4.9e+07 Transitions= 8.91e+08 Memory= 3646.455 t= 2.52e+03 R= 2e+04 +Depth= 9016 States= 5e+07 Transitions= 9.24e+08 Memory= 3689.912 t= 2.62e+03 R= 2e+04 +Depth= 9016 States= 5.1e+07 Transitions= 9.39e+08 Memory= 3742.940 t= 2.66e+03 R= 2e+04 +Depth= 9016 States= 5.2e+07 Transitions= 9.6e+08 Memory= 3793.721 t= 2.72e+03 R= 2e+04 +Depth= 9016 States= 5.3e+07 Transitions= 9.99e+08 Memory= 3843.721 t= 2.84e+03 R= 2e+04 +Depth= 9016 States= 5.4e+07 Transitions= 1.01e+09 Memory= 3899.287 t= 2.88e+03 R= 2e+04 +Depth= 9016 States= 5.5e+07 Transitions= 1.03e+09 Memory= 3947.627 t= 2.93e+03 R= 2e+04 +Depth= 9016 States= 5.6e+07 Transitions= 1.05e+09 Memory= 3995.479 t= 2.97e+03 R= 2e+04 +Depth= 9016 States= 5.7e+07 Transitions= 1.06e+09 Memory= 4049.776 t= 3.01e+03 R= 2e+04 +Depth= 9016 States= 5.8e+07 Transitions= 1.09e+09 Memory= 4100.947 t= 3.09e+03 R= 2e+04 +Depth= 9016 States= 5.9e+07 Transitions= 1.1e+09 Memory= 4151.533 t= 3.13e+03 R= 2e+04 +Depth= 9016 States= 6e+07 Transitions= 1.13e+09 Memory= 4201.924 t= 3.22e+03 R= 2e+04 +Depth= 9016 States= 6.1e+07 Transitions= 1.15e+09 Memory= 4251.240 t= 3.28e+03 R= 2e+04 +Depth= 9016 States= 6.2e+07 Transitions= 1.19e+09 Memory= 4303.779 t= 3.38e+03 R= 2e+04 +Depth= 9016 States= 6.3e+07 Transitions= 1.21e+09 Memory= 4352.998 t= 3.43e+03 R= 2e+04 +Depth= 9016 States= 6.4e+07 Transitions= 1.24e+09 Memory= 4403.096 t= 3.53e+03 R= 2e+04 +Depth= 9016 States= 6.5e+07 Transitions= 1.26e+09 Memory= 4453.682 t= 3.59e+03 R= 2e+04 +Depth= 9016 States= 6.6e+07 Transitions= 1.28e+09 Memory= 4503.096 t= 3.66e+03 R= 2e+04 +Depth= 9016 States= 6.7e+07 Transitions= 1.3e+09 Memory= 4554.072 t= 3.71e+03 R= 2e+04 +Depth= 9016 States= 6.8e+07 Transitions= 1.33e+09 Memory= 4604.951 t= 3.79e+03 R= 2e+04 +Depth= 9016 States= 6.9e+07 Transitions= 1.36e+09 Memory= 4656.221 t= 3.87e+03 R= 2e+04 +Depth= 9523 States= 7e+07 Transitions= 1.38e+09 Memory= 4712.959 t= 3.93e+03 R= 2e+04 +Depth= 9523 States= 7.1e+07 Transitions= 1.39e+09 Memory= 4759.443 t= 3.97e+03 R= 2e+04 +Depth= 9523 States= 7.2e+07 Transitions= 1.41e+09 Memory= 4814.033 t= 4.03e+03 R= 2e+04 +Depth= 9554 States= 7.3e+07 Transitions= 1.44e+09 Memory= 4868.037 t= 4.09e+03 R= 2e+04 +Depth= 9554 States= 7.4e+07 Transitions= 1.45e+09 Memory= 4915.401 t= 4.13e+03 R= 2e+04 +Depth= 9554 States= 7.5e+07 Transitions= 1.47e+09 Memory= 4970.479 t= 4.2e+03 R= 2e+04 +Depth= 9554 States= 7.6e+07 Transitions= 1.49e+09 Memory= 5022.334 t= 4.26e+03 R= 2e+04 +Depth= 9554 States= 7.7e+07 Transitions= 1.51e+09 Memory= 5071.358 t= 4.3e+03 R= 2e+04 +Depth= 9554 States= 7.8e+07 Transitions= 1.52e+09 Memory= 5124.971 t= 4.33e+03 R= 2e+04 +Depth= 9554 States= 7.9e+07 Transitions= 1.54e+09 Memory= 5178.779 t= 4.4e+03 R= 2e+04 +Depth= 9554 States= 8e+07 Transitions= 1.56e+09 Memory= 5231.221 t= 4.46e+03 R= 2e+04 +Depth= 9554 States= 8.1e+07 Transitions= 1.58e+09 Memory= 5284.541 t= 4.51e+03 R= 2e+04 +Depth= 9554 States= 8.2e+07 Transitions= 1.6e+09 Memory= 5335.029 t= 4.55e+03 R= 2e+04 +Depth= 9554 States= 8.3e+07 Transitions= 1.61e+09 Memory= 5385.908 t= 4.6e+03 R= 2e+04 +Depth= 9554 States= 8.4e+07 Transitions= 1.63e+09 Memory= 5437.276 t= 4.64e+03 R= 2e+04 +Depth= 9554 States= 8.5e+07 Transitions= 1.65e+09 Memory= 5486.787 t= 4.69e+03 R= 2e+04 +Depth= 9554 States= 8.6e+07 Transitions= 1.67e+09 Memory= 5535.615 t= 4.76e+03 R= 2e+04 +Depth= 9554 States= 8.7e+07 Transitions= 1.69e+09 Memory= 5589.522 t= 4.81e+03 R= 2e+04 +Depth= 9554 States= 8.8e+07 Transitions= 1.7e+09 Memory= 5647.627 t= 4.86e+03 R= 2e+04 +Depth= 9554 States= 8.9e+07 Transitions= 1.72e+09 Memory= 5695.967 t= 4.9e+03 R= 2e+04 +Depth= 9554 States= 9e+07 Transitions= 1.74e+09 Memory= 5749.971 t= 4.95e+03 R= 2e+04 +Depth= 9554 States= 9.1e+07 Transitions= 1.76e+09 Memory= 5799.483 t= 5.01e+03 R= 2e+04 +Depth= 9554 States= 9.2e+07 Transitions= 1.78e+09 Memory= 5849.092 t= 5.06e+03 R= 2e+04 +Depth= 9554 States= 9.3e+07 Transitions= 1.8e+09 Memory= 5897.529 t= 5.12e+03 R= 2e+04 +Depth= 9554 States= 9.4e+07 Transitions= 1.82e+09 Memory= 5949.287 t= 5.19e+03 R= 2e+04 +Depth= 9554 States= 9.5e+07 Transitions= 1.84e+09 Memory= 6004.072 t= 5.25e+03 R= 2e+04 +Depth= 9554 States= 9.6e+07 Transitions= 1.86e+09 Memory= 6052.412 t= 5.29e+03 R= 2e+04 +Depth= 9554 States= 9.7e+07 Transitions= 1.88e+09 Memory= 6107.588 t= 5.36e+03 R= 2e+04 +Depth= 9554 States= 9.8e+07 Transitions= 1.9e+09 Memory= 6160.029 t= 5.4e+03 R= 2e+04 +Depth= 9554 States= 9.9e+07 Transitions= 1.91e+09 Memory= 6211.006 t= 5.44e+03 R= 2e+04 +Depth= 9554 States= 1e+08 Transitions= 1.93e+09 Memory= 6262.861 t= 5.49e+03 R= 2e+04 +Depth= 9554 States= 1.01e+08 Transitions= 1.94e+09 Memory= 6317.256 t= 5.54e+03 R= 2e+04 +Depth= 9554 States= 1.02e+08 Transitions= 1.96e+09 Memory= 6371.455 t= 5.58e+03 R= 2e+04 +Depth= 9554 States= 1.03e+08 Transitions= 1.98e+09 Memory= 6423.311 t= 5.64e+03 R= 2e+04 +Depth= 9554 States= 1.04e+08 Transitions= 2e+09 Memory= 6477.608 t= 5.71e+03 R= 2e+04 +Depth= 9554 States= 1.05e+08 Transitions= 2.02e+09 Memory= 6526.045 t= 5.75e+03 R= 2e+04 +Depth= 9554 States= 1.06e+08 Transitions= 2.04e+09 Memory= 6580.733 t= 5.81e+03 R= 2e+04 +Depth= 9554 States= 1.07e+08 Transitions= 2.06e+09 Memory= 6634.053 t= 5.87e+03 R= 2e+04 +Depth= 9554 States= 1.08e+08 Transitions= 2.07e+09 Memory= 6685.127 t= 5.9e+03 R= 2e+04 +Depth= 9554 States= 1.09e+08 Transitions= 2.09e+09 Memory= 6736.299 t= 5.96e+03 R= 2e+04 +Depth= 9554 States= 1.1e+08 Transitions= 2.11e+09 Memory= 6790.401 t= 6e+03 R= 2e+04 +Depth= 9554 States= 1.11e+08 Transitions= 2.12e+09 Memory= 6844.990 t= 6.05e+03 R= 2e+04 +Depth= 9554 States= 1.12e+08 Transitions= 2.14e+09 Memory= 6890.010 t= 6.09e+03 R= 2e+04 +Depth= 9554 States= 1.13e+08 Transitions= 2.16e+09 Memory= 6940.889 t= 6.14e+03 R= 2e+04 +Depth= 9554 States= 1.14e+08 Transitions= 2.17e+09 Memory= 6992.061 t= 6.19e+03 R= 2e+04 +Depth= 9554 States= 1.15e+08 Transitions= 2.19e+09 Memory= 7043.623 t= 6.24e+03 R= 2e+04 +Depth= 9554 States= 1.16e+08 Transitions= 2.21e+09 Memory= 7095.186 t= 6.28e+03 R= 2e+04 +Depth= 9554 States= 1.17e+08 Transitions= 2.23e+09 Memory= 7144.600 t= 6.36e+03 R= 2e+04 +Depth= 9554 States= 1.18e+08 Transitions= 2.27e+09 Memory= 7198.897 t= 6.46e+03 R= 2e+04 +Depth= 9554 States= 1.19e+08 Transitions= 2.29e+09 Memory= 7253.779 t= 6.52e+03 R= 2e+04 +Depth= 9554 States= 1.2e+08 Transitions= 2.3e+09 Memory= 7307.783 t= 6.56e+03 R= 2e+04 +Depth= 9554 States= 1.21e+08 Transitions= 2.32e+09 Memory= 7358.467 t= 6.62e+03 R= 2e+04 +Depth= 9554 States= 1.22e+08 Transitions= 2.34e+09 Memory= 7410.811 t= 6.67e+03 R= 2e+04 +Depth= 9554 States= 1.23e+08 Transitions= 2.36e+09 Memory= 7465.010 t= 6.72e+03 R= 2e+04 +Depth= 9554 States= 1.24e+08 Transitions= 2.38e+09 Memory= 7516.670 t= 6.78e+03 R= 2e+04 +Depth= 9554 States= 1.25e+08 Transitions= 2.41e+09 Memory= 7565.205 t= 6.87e+03 R= 2e+04 +Depth= 9554 States= 1.26e+08 Transitions= 2.43e+09 Memory= 7613.936 t= 6.93e+03 R= 2e+04 +Depth= 9554 States= 1.27e+08 Transitions= 2.45e+09 Memory= 7662.471 t= 7e+03 R= 2e+04 +Depth= 9554 States= 1.28e+08 Transitions= 2.48e+09 Memory= 7710.713 t= 7.08e+03 R= 2e+04 +Depth= 9554 States= 1.29e+08 Transitions= 2.5e+09 Memory= 7759.346 t= 7.14e+03 R= 2e+04 +Depth= 9554 States= 1.3e+08 Transitions= 2.52e+09 Memory= 7810.322 t= 7.2e+03 R= 2e+04 +Depth= 9554 States= 1.31e+08 Transitions= 2.55e+09 Memory= 7859.834 t= 7.26e+03 R= 2e+04 +Depth= 9554 States= 1.32e+08 Transitions= 2.57e+09 Memory= 7910.615 t= 7.33e+03 R= 2e+04 +Depth= 9554 States= 1.33e+08 Transitions= 2.59e+09 Memory= 7959.248 t= 7.4e+03 R= 2e+04 +Depth= 9554 States= 1.34e+08 Transitions= 2.61e+09 Memory= 8011.787 t= 7.46e+03 R= 2e+04 +Depth= 9554 States= 1.35e+08 Transitions= 2.63e+09 Memory= 8060.713 t= 7.51e+03 R= 2e+04 +pan: resizing hashtable to -w28.. done +Depth= 9554 States= 1.36e+08 Transitions= 2.65e+09 Memory= 10108.713 t= 7.58e+03 R= 2e+04 +Depth= 9554 States= 1.37e+08 Transitions= 2.66e+09 Memory= 10144.455 t= 7.62e+03 R= 2e+04 +Depth= 9554 States= 1.38e+08 Transitions= 2.67e+09 Memory= 10199.143 t= 7.65e+03 R= 2e+04 +Depth= 9554 States= 1.39e+08 Transitions= 2.69e+09 Memory= 10253.830 t= 7.69e+03 R= 2e+04 +Depth= 9554 States= 1.4e+08 Transitions= 2.7e+09 Memory= 10308.127 t= 7.74e+03 R= 2e+04 +Depth= 9554 States= 1.41e+08 Transitions= 2.72e+09 Memory= 10360.178 t= 7.78e+03 R= 2e+04 +Depth= 9554 States= 1.42e+08 Transitions= 2.74e+09 Memory= 10413.889 t= 7.83e+03 R= 2e+04 +Depth= 9554 States= 1.43e+08 Transitions= 2.75e+09 Memory= 10467.111 t= 7.87e+03 R= 2e+04 +Depth= 9554 States= 1.44e+08 Transitions= 2.77e+09 Memory= 10518.088 t= 7.92e+03 R= 2e+04 +Depth= 9554 States= 1.45e+08 Transitions= 2.79e+09 Memory= 10567.795 t= 7.98e+03 R= 2e+04 +Depth= 9554 States= 1.46e+08 Transitions= 2.82e+09 Memory= 10624.631 t= 8.08e+03 R= 2e+04 +Depth= 9554 States= 1.47e+08 Transitions= 2.86e+09 Memory= 10689.963 t= 8.19e+03 R= 2e+04 +Depth= 9554 States= 1.48e+08 Transitions= 2.91e+09 Memory= 10752.072 t= 8.34e+03 R= 2e+04 +Depth= 9554 States= 1.49e+08 Transitions= 2.95e+09 Memory= 10802.658 t= 8.46e+03 R= 2e+04 +Depth= 9554 States= 1.5e+08 Transitions= 2.99e+09 Memory= 10848.361 t= 8.56e+03 R= 2e+04 +Depth= 9554 States= 1.51e+08 Transitions= 3e+09 Memory= 10900.022 t= 8.61e+03 R= 2e+04 +Depth= 9554 States= 1.52e+08 Transitions= 3.02e+09 Memory= 10951.096 t= 8.66e+03 R= 2e+04 +Depth= 9554 States= 1.53e+08 Transitions= 3.05e+09 Memory= 11002.365 t= 8.75e+03 R= 2e+04 +Depth= 9554 States= 1.54e+08 Transitions= 3.08e+09 Memory= 11054.611 t= 8.83e+03 R= 2e+04 +Depth= 9554 States= 1.55e+08 Transitions= 3.1e+09 Memory= 11105.783 t= 8.88e+03 R= 2e+04 +Depth= 9554 States= 1.56e+08 Transitions= 3.11e+09 Memory= 11153.830 t= 8.92e+03 R= 2e+04 +Depth= 9554 States= 1.57e+08 Transitions= 3.13e+09 Memory= 11202.365 t= 8.96e+03 R= 2e+04 +Depth= 9554 States= 1.58e+08 Transitions= 3.14e+09 Memory= 11257.443 t= 9e+03 R= 2e+04 +Depth= 9554 States= 1.59e+08 Transitions= 3.17e+09 Memory= 11307.639 t= 9.08e+03 R= 2e+04 +Depth= 9554 States= 1.6e+08 Transitions= 3.19e+09 Memory= 11357.541 t= 9.15e+03 R= 2e+04 +Depth= 9554 States= 1.61e+08 Transitions= 3.21e+09 Memory= 11407.541 t= 9.21e+03 R= 2e+04 +Depth= 9554 States= 1.62e+08 Transitions= 3.24e+09 Memory= 11457.736 t= 9.28e+03 R= 2e+04 +Depth= 9554 States= 1.63e+08 Transitions= 3.27e+09 Memory= 11507.053 t= 9.36e+03 R= 2e+04 +Depth= 9554 States= 1.64e+08 Transitions= 3.29e+09 Memory= 11560.959 t= 9.44e+03 R= 2e+04 +Depth= 9554 States= 1.65e+08 Transitions= 3.31e+09 Memory= 11613.108 t= 9.5e+03 R= 2e+04 +Depth= 9554 States= 1.66e+08 Transitions= 3.34e+09 Memory= 11661.252 t= 9.58e+03 R= 2e+04 +Depth= 9554 States= 1.67e+08 Transitions= 3.37e+09 Memory= 11711.154 t= 9.66e+03 R= 2e+04 +Depth= 9554 States= 1.68e+08 Transitions= 3.39e+09 Memory= 11763.596 t= 9.72e+03 R= 2e+04 +Depth= 9554 States= 1.69e+08 Transitions= 3.41e+09 Memory= 11812.912 t= 9.78e+03 R= 2e+04 +Depth= 9554 States= 1.7e+08 Transitions= 3.44e+09 Memory= 11866.135 t= 9.87e+03 R= 2e+04 +Depth= 9554 States= 1.71e+08 Transitions= 3.46e+09 Memory= 11920.139 t= 9.91e+03 R= 2e+04 +Depth= 9554 States= 1.72e+08 Transitions= 3.47e+09 Memory= 11967.014 t= 9.95e+03 R= 2e+04 +Depth= 9554 States= 1.73e+08 Transitions= 3.5e+09 Memory= 12021.115 t= 1e+04 R= 2e+04 +Depth= 9554 States= 1.74e+08 Transitions= 3.52e+09 Memory= 12075.315 t= 1.01e+04 R= 2e+04 +Depth= 9554 States= 1.75e+08 Transitions= 3.53e+09 Memory= 12126.779 t= 1.01e+04 R= 2e+04 +Depth= 9554 States= 1.76e+08 Transitions= 3.56e+09 Memory= 12180.002 t= 1.02e+04 R= 2e+04 +Depth= 9554 States= 1.77e+08 Transitions= 3.57e+09 Memory= 12229.416 t= 1.02e+04 R= 2e+04 +Depth= 9554 States= 1.78e+08 Transitions= 3.59e+09 Memory= 12282.834 t= 1.03e+04 R= 2e+04 +Depth= 9554 States= 1.79e+08 Transitions= 3.61e+09 Memory= 12334.494 t= 1.03e+04 R= 2e+04 +Depth= 9554 States= 1.8e+08 Transitions= 3.63e+09 Memory= 12387.522 t= 1.04e+04 R= 2e+04 +Depth= 9554 States= 1.81e+08 Transitions= 3.65e+09 Memory= 12440.451 t= 1.05e+04 R= 2e+04 +Depth= 9554 States= 1.82e+08 Transitions= 3.66e+09 Memory= 12492.111 t= 1.05e+04 R= 2e+04 +Depth= 9554 States= 1.83e+08 Transitions= 3.68e+09 Memory= 12544.162 t= 1.05e+04 R= 2e+04 +Depth= 9554 States= 1.84e+08 Transitions= 3.69e+09 Memory= 12594.943 t= 1.06e+04 R= 2e+04 +Depth= 9554 States= 1.85e+08 Transitions= 3.71e+09 Memory= 12645.627 t= 1.06e+04 R= 2e+04 +Depth= 9554 States= 1.86e+08 Transitions= 3.73e+09 Memory= 12695.236 t= 1.07e+04 R= 2e+04 +Depth= 9554 States= 1.87e+08 Transitions= 3.75e+09 Memory= 12750.705 t= 1.07e+04 R= 2e+04 +Depth= 9554 States= 1.88e+08 Transitions= 3.77e+09 Memory= 12807.639 t= 1.08e+04 R= 2e+04 +Depth= 9554 States= 1.89e+08 Transitions= 3.78e+09 Memory= 12855.979 t= 1.08e+04 R= 2e+04 +Depth= 9554 States= 1.9e+08 Transitions= 3.8e+09 Memory= 12909.592 t= 1.09e+04 R= 2e+04 +Depth= 9554 States= 1.91e+08 Transitions= 3.82e+09 Memory= 12959.104 t= 1.09e+04 R= 2e+04 +Depth= 9554 States= 1.92e+08 Transitions= 3.84e+09 Memory= 13008.615 t= 1.1e+04 R= 2e+04 +Depth= 9554 States= 1.93e+08 Transitions= 3.86e+09 Memory= 13065.061 t= 1.11e+04 R= 2e+04 +Depth= 9554 States= 1.94e+08 Transitions= 3.88e+09 Memory= 13114.377 t= 1.11e+04 R= 2e+04 +Depth= 9554 States= 1.95e+08 Transitions= 3.9e+09 Memory= 13168.674 t= 1.12e+04 R= 2e+04 +Depth= 9554 States= 1.96e+08 Transitions= 3.92e+09 Memory= 13222.678 t= 1.12e+04 R= 2e+04 +Depth= 9554 States= 1.97e+08 Transitions= 3.93e+09 Memory= 13271.701 t= 1.13e+04 R= 2e+04 +Depth= 9554 States= 1.98e+08 Transitions= 3.95e+09 Memory= 13324.338 t= 1.13e+04 R= 2e+04 +Depth= 9554 States= 1.99e+08 Transitions= 3.96e+09 Memory= 13377.170 t= 1.13e+04 R= 2e+04 +Depth= 9554 States= 2e+08 Transitions= 3.98e+09 Memory= 13432.639 t= 1.14e+04 R= 2e+04 +Depth= 9554 States= 2.01e+08 Transitions= 4e+09 Memory= 13483.811 t= 1.14e+04 R= 2e+04 +Depth= 9554 States= 2.02e+08 Transitions= 4.03e+09 Memory= 13537.522 t= 1.15e+04 R= 2e+04 +Depth= 9554 States= 2.03e+08 Transitions= 4.04e+09 Memory= 13588.693 t= 1.16e+04 R= 2e+04 +Depth= 9554 States= 2.04e+08 Transitions= 4.06e+09 Memory= 13642.600 t= 1.16e+04 R= 2e+04 +Depth= 9554 States= 2.05e+08 Transitions= 4.08e+09 Memory= 13696.799 t= 1.17e+04 R= 2e+04 +Depth= 9554 States= 2.06e+08 Transitions= 4.09e+09 Memory= 13744.748 t= 1.17e+04 R= 2e+04 +Depth= 9554 States= 2.07e+08 Transitions= 4.11e+09 Memory= 13798.068 t= 1.18e+04 R= 2e+04 +Depth= 9554 States= 2.08e+08 Transitions= 4.13e+09 Memory= 13850.022 t= 1.18e+04 R= 2e+04 +Depth= 9554 States= 2.09e+08 Transitions= 4.14e+09 Memory= 13905.783 t= 1.18e+04 R= 2e+04 +Depth= 9554 States= 2.1e+08 Transitions= 4.16e+09 Memory= 13952.365 t= 1.19e+04 R= 2e+04 +Depth= 9554 States= 2.11e+08 Transitions= 4.18e+09 Memory= 14003.244 t= 1.19e+04 R= 2e+04 +Depth= 9554 States= 2.12e+08 Transitions= 4.19e+09 Memory= 14054.318 t= 1.2e+04 R= 2e+04 +Depth= 9554 States= 2.13e+08 Transitions= 4.21e+09 Memory= 14106.076 t= 1.2e+04 R= 2e+04 +Depth= 9554 States= 2.14e+08 Transitions= 4.22e+09 Memory= 14156.662 t= 1.21e+04 R= 2e+04 +Depth= 9554 States= 2.15e+08 Transitions= 4.26e+09 Memory= 14209.690 t= 1.22e+04 R= 2e+04 +Depth= 9554 States= 2.16e+08 Transitions= 4.29e+09 Memory= 14265.256 t= 1.23e+04 R= 2e+04 +Depth= 9554 States= 2.17e+08 Transitions= 4.3e+09 Memory= 14317.697 t= 1.23e+04 R= 2e+04 +Depth= 9554 States= 2.18e+08 Transitions= 4.32e+09 Memory= 14371.311 t= 1.23e+04 R= 2e+04 +Depth= 9554 States= 2.19e+08 Transitions= 4.33e+09 Memory= 14424.045 t= 1.24e+04 R= 2e+04 +Depth= 9554 States= 2.2e+08 Transitions= 4.35e+09 Memory= 14477.854 t= 1.24e+04 R= 2e+04 +Depth= 9554 States= 2.21e+08 Transitions= 4.37e+09 Memory= 14529.611 t= 1.25e+04 R= 2e+04 +Depth= 9554 States= 2.22e+08 Transitions= 4.4e+09 Memory= 14576.291 t= 1.26e+04 R= 2e+04 +Depth= 9554 States= 2.23e+08 Transitions= 4.43e+09 Memory= 14625.608 t= 1.27e+04 R= 2e+04 +Depth= 9554 States= 2.24e+08 Transitions= 4.45e+09 Memory= 14674.045 t= 1.27e+04 R= 2e+04 +Depth= 9554 States= 2.25e+08 Transitions= 4.48e+09 Memory= 14722.776 t= 1.28e+04 R= 2e+04 +Depth= 9554 States= 2.26e+08 Transitions= 4.5e+09 Memory= 14770.529 t= 1.29e+04 R= 2e+04 +Depth= 9554 States= 2.27e+08 Transitions= 4.52e+09 Memory= 14821.018 t= 1.29e+04 R= 2e+04 +Depth= 9554 States= 2.28e+08 Transitions= 4.54e+09 Memory= 14870.529 t= 1.3e+04 R= 2e+04 +Depth= 9554 States= 2.29e+08 Transitions= 4.56e+09 Memory= 14918.967 t= 1.3e+04 R= 2e+04 +Depth= 9554 States= 2.3e+08 Transitions= 4.59e+09 Memory= 14966.916 t= 1.31e+04 R= 2e+04 +Depth= 9554 States= 2.31e+08 Transitions= 4.6e+09 Memory= 15017.600 t= 1.32e+04 R= 2e+04 +Depth= 9554 States= 2.32e+08 Transitions= 4.63e+09 Memory= 15066.330 t= 1.32e+04 R= 2e+04 diff --git a/urcu-controldataflow-intel-ipi/urcu_progress_writer_error.define b/urcu-controldataflow-intel-ipi/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-intel-ipi/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-intel-no-ipi/.input.spin b/urcu-controldataflow-intel-no-ipi/.input.spin new file mode 100644 index 0000000..3191ba1 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/.input.spin @@ -0,0 +1,1272 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/DEFINES b/urcu-controldataflow-intel-no-ipi/DEFINES new file mode 100644 index 0000000..b4d92d7 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/DEFINES @@ -0,0 +1,18 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow-intel-no-ipi/Makefile b/urcu-controldataflow-intel-no-ipi/Makefile new file mode 100644 index 0000000..de47dff --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/Makefile @@ -0,0 +1,170 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow-intel-no-ipi/asserts.log b/urcu-controldataflow-intel-no-ipi/asserts.log new file mode 100644 index 0000000..fe09a53 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/asserts.log @@ -0,0 +1,429 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 4473 States= 1e+06 Transitions= 2.37e+07 Memory= 542.619 t= 57.3 R= 2e+04 +Depth= 4540 States= 2e+06 Transitions= 4.8e+07 Memory= 618.889 t= 117 R= 2e+04 +Depth= 4540 States= 3e+06 Transitions= 7.25e+07 Memory= 695.158 t= 178 R= 2e+04 +pan: resizing hashtable to -w22.. done + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 72 byte, depth reached 4540, errors: 0 + 3841511 states, stored + 90242688 states, matched + 94084199 transitions (= stored+matched) +1.5073578e+09 atomic steps +hash conflicts: 63759942 (resolved) + +Stats on memory usage (in Megabytes): + 366.355 equivalent memory usage for states (stored*(State-vector + overhead)) + 300.680 actual memory usage for states (compression: 82.07%) + state-vector as stored = 54 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 790.440 total actual memory usage + +unreached in proctype urcu_reader + line 410, ".input.spin", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 81, "(1)" + line 256, ".input.spin", state 101, "(1)" + line 260, ".input.spin", state 109, "(1)" + line 596, ".input.spin", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 410, ".input.spin", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 199, "(1)" + line 256, ".input.spin", state 219, "(1)" + line 260, ".input.spin", state 227, "(1)" + line 410, ".input.spin", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 310, "(1)" + line 256, ".input.spin", state 330, "(1)" + line 260, ".input.spin", state 338, "(1)" + line 410, ".input.spin", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 361, "(1)" + line 410, ".input.spin", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, ".input.spin", state 362, "else" + line 410, ".input.spin", state 365, "(1)" + line 414, ".input.spin", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 375, "(1)" + line 414, ".input.spin", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, ".input.spin", state 376, "else" + line 414, ".input.spin", state 379, "(1)" + line 414, ".input.spin", state 380, "(1)" + line 414, ".input.spin", state 380, "(1)" + line 412, ".input.spin", state 385, "((i<1))" + line 412, ".input.spin", state 385, "((i>=1))" + line 419, ".input.spin", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 393, "(1)" + line 419, ".input.spin", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, ".input.spin", state 394, "else" + line 419, ".input.spin", state 397, "(1)" + line 419, ".input.spin", state 398, "(1)" + line 419, ".input.spin", state 398, "(1)" + line 423, ".input.spin", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 407, "(1)" + line 423, ".input.spin", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, ".input.spin", state 408, "else" + line 423, ".input.spin", state 411, "(1)" + line 423, ".input.spin", state 412, "(1)" + line 423, ".input.spin", state 412, "(1)" + line 421, ".input.spin", state 417, "((i<2))" + line 421, ".input.spin", state 417, "((i>=2))" + line 248, ".input.spin", state 423, "(1)" + line 252, ".input.spin", state 431, "(1)" + line 252, ".input.spin", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, ".input.spin", state 432, "else" + line 250, ".input.spin", state 437, "((i<1))" + line 250, ".input.spin", state 437, "((i>=1))" + line 256, ".input.spin", state 443, "(1)" + line 256, ".input.spin", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, ".input.spin", state 444, "else" + line 260, ".input.spin", state 451, "(1)" + line 260, ".input.spin", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, ".input.spin", state 452, "else" + line 258, ".input.spin", state 457, "((i<2))" + line 258, ".input.spin", state 457, "((i>=2))" + line 265, ".input.spin", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, ".input.spin", state 461, "else" + line 430, ".input.spin", state 463, "(1)" + line 430, ".input.spin", state 463, "(1)" + line 596, ".input.spin", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 596, ".input.spin", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 596, ".input.spin", state 468, "(1)" + line 271, ".input.spin", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 483, "(1)" + line 279, ".input.spin", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 519, "(1)" + line 252, ".input.spin", state 527, "(1)" + line 256, ".input.spin", state 539, "(1)" + line 260, ".input.spin", state 547, "(1)" + line 410, ".input.spin", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 629, "(1)" + line 252, ".input.spin", state 637, "(1)" + line 256, ".input.spin", state 649, "(1)" + line 260, ".input.spin", state 657, "(1)" + line 410, ".input.spin", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 747, "(1)" + line 256, ".input.spin", state 767, "(1)" + line 260, ".input.spin", state 775, "(1)" + line 410, ".input.spin", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 796, "(1)" + line 410, ".input.spin", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, ".input.spin", state 797, "else" + line 410, ".input.spin", state 800, "(1)" + line 414, ".input.spin", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 810, "(1)" + line 414, ".input.spin", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, ".input.spin", state 811, "else" + line 414, ".input.spin", state 814, "(1)" + line 414, ".input.spin", state 815, "(1)" + line 414, ".input.spin", state 815, "(1)" + line 412, ".input.spin", state 820, "((i<1))" + line 412, ".input.spin", state 820, "((i>=1))" + line 419, ".input.spin", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 828, "(1)" + line 419, ".input.spin", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, ".input.spin", state 829, "else" + line 419, ".input.spin", state 832, "(1)" + line 419, ".input.spin", state 833, "(1)" + line 419, ".input.spin", state 833, "(1)" + line 423, ".input.spin", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 842, "(1)" + line 423, ".input.spin", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, ".input.spin", state 843, "else" + line 423, ".input.spin", state 846, "(1)" + line 423, ".input.spin", state 847, "(1)" + line 423, ".input.spin", state 847, "(1)" + line 421, ".input.spin", state 852, "((i<2))" + line 421, ".input.spin", state 852, "((i>=2))" + line 248, ".input.spin", state 858, "(1)" + line 252, ".input.spin", state 866, "(1)" + line 252, ".input.spin", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, ".input.spin", state 867, "else" + line 250, ".input.spin", state 872, "((i<1))" + line 250, ".input.spin", state 872, "((i>=1))" + line 256, ".input.spin", state 878, "(1)" + line 256, ".input.spin", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, ".input.spin", state 879, "else" + line 260, ".input.spin", state 886, "(1)" + line 260, ".input.spin", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, ".input.spin", state 887, "else" + line 258, ".input.spin", state 892, "((i<2))" + line 258, ".input.spin", state 892, "((i>=2))" + line 265, ".input.spin", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, ".input.spin", state 896, "else" + line 430, ".input.spin", state 898, "(1)" + line 430, ".input.spin", state 898, "(1)" + line 604, ".input.spin", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 410, ".input.spin", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 971, "(1)" + line 252, ".input.spin", state 979, "(1)" + line 256, ".input.spin", state 991, "(1)" + line 260, ".input.spin", state 999, "(1)" + line 410, ".input.spin", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1085, "(1)" + line 256, ".input.spin", state 1105, "(1)" + line 260, ".input.spin", state 1113, "(1)" + line 410, ".input.spin", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1200, "(1)" + line 256, ".input.spin", state 1220, "(1)" + line 260, ".input.spin", state 1228, "(1)" + line 410, ".input.spin", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1311, "(1)" + line 256, ".input.spin", state 1331, "(1)" + line 260, ".input.spin", state 1339, "(1)" + line 271, ".input.spin", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1407, "(1)" + line 252, ".input.spin", state 1415, "(1)" + line 256, ".input.spin", state 1427, "(1)" + line 260, ".input.spin", state 1435, "(1)" + line 410, ".input.spin", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1517, "(1)" + line 252, ".input.spin", state 1525, "(1)" + line 256, ".input.spin", state 1537, "(1)" + line 260, ".input.spin", state 1545, "(1)" + line 410, ".input.spin", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1628, "(1)" + line 252, ".input.spin", state 1636, "(1)" + line 256, ".input.spin", state 1648, "(1)" + line 260, ".input.spin", state 1656, "(1)" + line 410, ".input.spin", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1742, "(1)" + line 256, ".input.spin", state 1762, "(1)" + line 260, ".input.spin", state 1770, "(1)" + line 643, ".input.spin", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 410, ".input.spin", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1860, "(1)" + line 256, ".input.spin", state 1880, "(1)" + line 260, ".input.spin", state 1888, "(1)" + line 410, ".input.spin", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1971, "(1)" + line 256, ".input.spin", state 1991, "(1)" + line 260, ".input.spin", state 1999, "(1)" + line 410, ".input.spin", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 2022, "(1)" + line 410, ".input.spin", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, ".input.spin", state 2023, "else" + line 410, ".input.spin", state 2026, "(1)" + line 414, ".input.spin", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2036, "(1)" + line 414, ".input.spin", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, ".input.spin", state 2037, "else" + line 414, ".input.spin", state 2040, "(1)" + line 414, ".input.spin", state 2041, "(1)" + line 414, ".input.spin", state 2041, "(1)" + line 412, ".input.spin", state 2046, "((i<1))" + line 412, ".input.spin", state 2046, "((i>=1))" + line 419, ".input.spin", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2054, "(1)" + line 419, ".input.spin", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, ".input.spin", state 2055, "else" + line 419, ".input.spin", state 2058, "(1)" + line 419, ".input.spin", state 2059, "(1)" + line 419, ".input.spin", state 2059, "(1)" + line 423, ".input.spin", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2068, "(1)" + line 423, ".input.spin", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, ".input.spin", state 2069, "else" + line 423, ".input.spin", state 2072, "(1)" + line 423, ".input.spin", state 2073, "(1)" + line 423, ".input.spin", state 2073, "(1)" + line 421, ".input.spin", state 2078, "((i<2))" + line 421, ".input.spin", state 2078, "((i>=2))" + line 248, ".input.spin", state 2084, "(1)" + line 252, ".input.spin", state 2092, "(1)" + line 252, ".input.spin", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, ".input.spin", state 2093, "else" + line 250, ".input.spin", state 2098, "((i<1))" + line 250, ".input.spin", state 2098, "((i>=1))" + line 256, ".input.spin", state 2104, "(1)" + line 256, ".input.spin", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, ".input.spin", state 2105, "else" + line 260, ".input.spin", state 2112, "(1)" + line 260, ".input.spin", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, ".input.spin", state 2113, "else" + line 258, ".input.spin", state 2118, "((i<2))" + line 258, ".input.spin", state 2118, "((i>=2))" + line 265, ".input.spin", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, ".input.spin", state 2122, "else" + line 430, ".input.spin", state 2124, "(1)" + line 430, ".input.spin", state 2124, "(1)" + line 643, ".input.spin", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 643, ".input.spin", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 643, ".input.spin", state 2129, "(1)" + line 271, ".input.spin", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 2180, "(1)" + line 252, ".input.spin", state 2188, "(1)" + line 256, ".input.spin", state 2200, "(1)" + line 260, ".input.spin", state 2208, "(1)" + line 410, ".input.spin", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 2290, "(1)" + line 252, ".input.spin", state 2298, "(1)" + line 256, ".input.spin", state 2310, "(1)" + line 260, ".input.spin", state 2318, "(1)" + line 271, ".input.spin", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 2387, "(1)" + line 252, ".input.spin", state 2395, "(1)" + line 256, ".input.spin", state 2407, "(1)" + line 260, ".input.spin", state 2415, "(1)" + line 410, ".input.spin", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 2497, "(1)" + line 252, ".input.spin", state 2505, "(1)" + line 256, ".input.spin", state 2517, "(1)" + line 260, ".input.spin", state 2525, "(1)" + line 410, ".input.spin", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 2608, "(1)" + line 252, ".input.spin", state 2616, "(1)" + line 256, ".input.spin", state 2628, "(1)" + line 260, ".input.spin", state 2636, "(1)" + line 248, ".input.spin", state 2667, "(1)" + line 256, ".input.spin", state 2687, "(1)" + line 260, ".input.spin", state 2695, "(1)" + line 248, ".input.spin", state 2710, "(1)" + line 252, ".input.spin", state 2718, "(1)" + line 256, ".input.spin", state 2730, "(1)" + line 260, ".input.spin", state 2738, "(1)" + line 897, ".input.spin", state 2755, "-end-" + (259 of 2755 states) +unreached in proctype urcu_writer + line 410, ".input.spin", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 82, "(1)" + line 252, ".input.spin", state 90, "(1)" + line 256, ".input.spin", state 102, "(1)" + line 271, ".input.spin", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 410, ".input.spin", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, ".input.spin", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 257, "(1)" + line 252, ".input.spin", state 265, "(1)" + line 256, ".input.spin", state 277, "(1)" + line 260, ".input.spin", state 285, "(1)" + line 414, ".input.spin", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, ".input.spin", state 378, "(1)" + line 256, ".input.spin", state 390, "(1)" + line 260, ".input.spin", state 398, "(1)" + line 414, ".input.spin", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, ".input.spin", state 499, "(1)" + line 256, ".input.spin", state 511, "(1)" + line 260, ".input.spin", state 519, "(1)" + line 414, ".input.spin", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, ".input.spin", state 610, "(1)" + line 256, ".input.spin", state 622, "(1)" + line 260, ".input.spin", state 630, "(1)" + line 414, ".input.spin", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, ".input.spin", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, ".input.spin", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, ".input.spin", state 723, "(1)" + line 256, ".input.spin", state 735, "(1)" + line 260, ".input.spin", state 743, "(1)" + line 271, ".input.spin", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, ".input.spin", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 820, "(1)" + line 283, ".input.spin", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 843, "(1)" + line 252, ".input.spin", state 851, "(1)" + line 256, ".input.spin", state 863, "(1)" + line 260, ".input.spin", state 871, "(1)" + line 275, ".input.spin", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 934, "(1)" + line 252, ".input.spin", state 942, "(1)" + line 256, ".input.spin", state 954, "(1)" + line 260, ".input.spin", state 962, "(1)" + line 275, ".input.spin", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1025, "(1)" + line 252, ".input.spin", state 1033, "(1)" + line 256, ".input.spin", state 1045, "(1)" + line 260, ".input.spin", state 1053, "(1)" + line 275, ".input.spin", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, ".input.spin", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, ".input.spin", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, ".input.spin", state 1116, "(1)" + line 252, ".input.spin", state 1124, "(1)" + line 256, ".input.spin", state 1136, "(1)" + line 260, ".input.spin", state 1144, "(1)" + line 1236, ".input.spin", state 1159, "-end-" + (71 of 1159 states) +unreached in proctype :init: + (0 of 78 states) + +pan: elapsed time 231 seconds +pan: rate 16628.478 states/second +pan: avg transition delay 2.4555e-06 usec +cp .input.spin asserts.spin.input +cp .input.spin.trail asserts.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/asserts.spin.input b/urcu-controldataflow-intel-no-ipi/asserts.spin.input new file mode 100644 index 0000000..3191ba1 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/asserts.spin.input @@ -0,0 +1,1272 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/references.txt b/urcu-controldataflow-intel-no-ipi/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow-intel-no-ipi/urcu.sh b/urcu-controldataflow-intel-no-ipi/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow-intel-no-ipi/urcu.spin b/urcu-controldataflow-intel-no-ipi/urcu.spin new file mode 100644 index 0000000..54752a1 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu.spin @@ -0,0 +1,1254 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free.log b/urcu-controldataflow-intel-no-ipi/urcu_free.log new file mode 100644 index 0000000..aaa4217 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free.log @@ -0,0 +1,440 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1294) +Depth= 4900 States= 1e+06 Transitions= 2.37e+07 Memory= 550.334 t= 65.5 R= 2e+04 +Depth= 4973 States= 2e+06 Transitions= 4.8e+07 Memory= 634.221 t= 134 R= 1e+04 +Depth= 4973 States= 3e+06 Transitions= 7.25e+07 Memory= 718.205 t= 204 R= 1e+04 +pan: resizing hashtable to -w22.. done + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 4973, errors: 0 + 3841511 states, stored + 90254094 states, matched + 94095605 transitions (= stored+matched) +1.5073578e+09 atomic steps +hash conflicts: 63765708 (resolved) + +Stats on memory usage (in Megabytes): + 424.972 equivalent memory usage for states (stored*(State-vector + overhead)) + 330.368 actual memory usage for states (compression: 77.74%) + state-vector as stored = 62 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 819.932 total actual memory usage + +unreached in proctype urcu_reader + line 410, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 81, "(1)" + line 256, "pan.___", state 101, "(1)" + line 260, "pan.___", state 109, "(1)" + line 596, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 410, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 199, "(1)" + line 256, "pan.___", state 219, "(1)" + line 260, "pan.___", state 227, "(1)" + line 410, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 310, "(1)" + line 256, "pan.___", state 330, "(1)" + line 260, "pan.___", state 338, "(1)" + line 410, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 361, "(1)" + line 410, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 362, "else" + line 410, "pan.___", state 365, "(1)" + line 414, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 375, "(1)" + line 414, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 376, "else" + line 414, "pan.___", state 379, "(1)" + line 414, "pan.___", state 380, "(1)" + line 414, "pan.___", state 380, "(1)" + line 412, "pan.___", state 385, "((i<1))" + line 412, "pan.___", state 385, "((i>=1))" + line 419, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 393, "(1)" + line 419, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 394, "else" + line 419, "pan.___", state 397, "(1)" + line 419, "pan.___", state 398, "(1)" + line 419, "pan.___", state 398, "(1)" + line 423, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 407, "(1)" + line 423, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 408, "else" + line 423, "pan.___", state 411, "(1)" + line 423, "pan.___", state 412, "(1)" + line 423, "pan.___", state 412, "(1)" + line 421, "pan.___", state 417, "((i<2))" + line 421, "pan.___", state 417, "((i>=2))" + line 248, "pan.___", state 423, "(1)" + line 252, "pan.___", state 431, "(1)" + line 252, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, "pan.___", state 432, "else" + line 250, "pan.___", state 437, "((i<1))" + line 250, "pan.___", state 437, "((i>=1))" + line 256, "pan.___", state 443, "(1)" + line 256, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, "pan.___", state 444, "else" + line 260, "pan.___", state 451, "(1)" + line 260, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, "pan.___", state 452, "else" + line 258, "pan.___", state 457, "((i<2))" + line 258, "pan.___", state 457, "((i>=2))" + line 265, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, "pan.___", state 461, "else" + line 430, "pan.___", state 463, "(1)" + line 430, "pan.___", state 463, "(1)" + line 596, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 596, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 596, "pan.___", state 468, "(1)" + line 271, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 483, "(1)" + line 279, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 519, "(1)" + line 252, "pan.___", state 527, "(1)" + line 256, "pan.___", state 539, "(1)" + line 260, "pan.___", state 547, "(1)" + line 410, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 629, "(1)" + line 252, "pan.___", state 637, "(1)" + line 256, "pan.___", state 649, "(1)" + line 260, "pan.___", state 657, "(1)" + line 410, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 747, "(1)" + line 256, "pan.___", state 767, "(1)" + line 260, "pan.___", state 775, "(1)" + line 410, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 796, "(1)" + line 410, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 797, "else" + line 410, "pan.___", state 800, "(1)" + line 414, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 810, "(1)" + line 414, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 811, "else" + line 414, "pan.___", state 814, "(1)" + line 414, "pan.___", state 815, "(1)" + line 414, "pan.___", state 815, "(1)" + line 412, "pan.___", state 820, "((i<1))" + line 412, "pan.___", state 820, "((i>=1))" + line 419, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 828, "(1)" + line 419, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 829, "else" + line 419, "pan.___", state 832, "(1)" + line 419, "pan.___", state 833, "(1)" + line 419, "pan.___", state 833, "(1)" + line 423, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 842, "(1)" + line 423, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 843, "else" + line 423, "pan.___", state 846, "(1)" + line 423, "pan.___", state 847, "(1)" + line 423, "pan.___", state 847, "(1)" + line 421, "pan.___", state 852, "((i<2))" + line 421, "pan.___", state 852, "((i>=2))" + line 248, "pan.___", state 858, "(1)" + line 252, "pan.___", state 866, "(1)" + line 252, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, "pan.___", state 867, "else" + line 250, "pan.___", state 872, "((i<1))" + line 250, "pan.___", state 872, "((i>=1))" + line 256, "pan.___", state 878, "(1)" + line 256, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, "pan.___", state 879, "else" + line 260, "pan.___", state 886, "(1)" + line 260, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, "pan.___", state 887, "else" + line 258, "pan.___", state 892, "((i<2))" + line 258, "pan.___", state 892, "((i>=2))" + line 265, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, "pan.___", state 896, "else" + line 430, "pan.___", state 898, "(1)" + line 430, "pan.___", state 898, "(1)" + line 604, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 410, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 971, "(1)" + line 252, "pan.___", state 979, "(1)" + line 256, "pan.___", state 991, "(1)" + line 260, "pan.___", state 999, "(1)" + line 410, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1085, "(1)" + line 256, "pan.___", state 1105, "(1)" + line 260, "pan.___", state 1113, "(1)" + line 410, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1200, "(1)" + line 256, "pan.___", state 1220, "(1)" + line 260, "pan.___", state 1228, "(1)" + line 410, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1311, "(1)" + line 256, "pan.___", state 1331, "(1)" + line 260, "pan.___", state 1339, "(1)" + line 271, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1407, "(1)" + line 252, "pan.___", state 1415, "(1)" + line 256, "pan.___", state 1427, "(1)" + line 260, "pan.___", state 1435, "(1)" + line 410, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1517, "(1)" + line 252, "pan.___", state 1525, "(1)" + line 256, "pan.___", state 1537, "(1)" + line 260, "pan.___", state 1545, "(1)" + line 410, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1628, "(1)" + line 252, "pan.___", state 1636, "(1)" + line 256, "pan.___", state 1648, "(1)" + line 260, "pan.___", state 1656, "(1)" + line 410, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1742, "(1)" + line 256, "pan.___", state 1762, "(1)" + line 260, "pan.___", state 1770, "(1)" + line 643, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 410, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1860, "(1)" + line 256, "pan.___", state 1880, "(1)" + line 260, "pan.___", state 1888, "(1)" + line 410, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1971, "(1)" + line 256, "pan.___", state 1991, "(1)" + line 260, "pan.___", state 1999, "(1)" + line 410, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 2022, "(1)" + line 410, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 410, "pan.___", state 2023, "else" + line 410, "pan.___", state 2026, "(1)" + line 414, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2036, "(1)" + line 414, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 414, "pan.___", state 2037, "else" + line 414, "pan.___", state 2040, "(1)" + line 414, "pan.___", state 2041, "(1)" + line 414, "pan.___", state 2041, "(1)" + line 412, "pan.___", state 2046, "((i<1))" + line 412, "pan.___", state 2046, "((i>=1))" + line 419, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2054, "(1)" + line 419, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 419, "pan.___", state 2055, "else" + line 419, "pan.___", state 2058, "(1)" + line 419, "pan.___", state 2059, "(1)" + line 419, "pan.___", state 2059, "(1)" + line 423, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2068, "(1)" + line 423, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 423, "pan.___", state 2069, "else" + line 423, "pan.___", state 2072, "(1)" + line 423, "pan.___", state 2073, "(1)" + line 423, "pan.___", state 2073, "(1)" + line 421, "pan.___", state 2078, "((i<2))" + line 421, "pan.___", state 2078, "((i>=2))" + line 248, "pan.___", state 2084, "(1)" + line 252, "pan.___", state 2092, "(1)" + line 252, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 252, "pan.___", state 2093, "else" + line 250, "pan.___", state 2098, "((i<1))" + line 250, "pan.___", state 2098, "((i>=1))" + line 256, "pan.___", state 2104, "(1)" + line 256, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 256, "pan.___", state 2105, "else" + line 260, "pan.___", state 2112, "(1)" + line 260, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 260, "pan.___", state 2113, "else" + line 258, "pan.___", state 2118, "((i<2))" + line 258, "pan.___", state 2118, "((i>=2))" + line 265, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 265, "pan.___", state 2122, "else" + line 430, "pan.___", state 2124, "(1)" + line 430, "pan.___", state 2124, "(1)" + line 643, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 643, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 643, "pan.___", state 2129, "(1)" + line 271, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2180, "(1)" + line 252, "pan.___", state 2188, "(1)" + line 256, "pan.___", state 2200, "(1)" + line 260, "pan.___", state 2208, "(1)" + line 410, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2290, "(1)" + line 252, "pan.___", state 2298, "(1)" + line 256, "pan.___", state 2310, "(1)" + line 260, "pan.___", state 2318, "(1)" + line 271, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2387, "(1)" + line 252, "pan.___", state 2395, "(1)" + line 256, "pan.___", state 2407, "(1)" + line 260, "pan.___", state 2415, "(1)" + line 410, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2497, "(1)" + line 252, "pan.___", state 2505, "(1)" + line 256, "pan.___", state 2517, "(1)" + line 260, "pan.___", state 2525, "(1)" + line 410, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 2608, "(1)" + line 252, "pan.___", state 2616, "(1)" + line 256, "pan.___", state 2628, "(1)" + line 260, "pan.___", state 2636, "(1)" + line 248, "pan.___", state 2667, "(1)" + line 256, "pan.___", state 2687, "(1)" + line 260, "pan.___", state 2695, "(1)" + line 248, "pan.___", state 2710, "(1)" + line 252, "pan.___", state 2718, "(1)" + line 256, "pan.___", state 2730, "(1)" + line 260, "pan.___", state 2738, "(1)" + line 897, "pan.___", state 2755, "-end-" + (259 of 2755 states) +unreached in proctype urcu_writer + line 410, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 248, "pan.___", state 82, "(1)" + line 252, "pan.___", state 90, "(1)" + line 256, "pan.___", state 102, "(1)" + line 271, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 257, "(1)" + line 252, "pan.___", state 265, "(1)" + line 256, "pan.___", state 277, "(1)" + line 260, "pan.___", state 285, "(1)" + line 414, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 378, "(1)" + line 256, "pan.___", state 390, "(1)" + line 260, "pan.___", state 398, "(1)" + line 414, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 499, "(1)" + line 256, "pan.___", state 511, "(1)" + line 260, "pan.___", state 519, "(1)" + line 414, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 610, "(1)" + line 256, "pan.___", state 622, "(1)" + line 260, "pan.___", state 630, "(1)" + line 414, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 419, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 423, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 252, "pan.___", state 723, "(1)" + line 256, "pan.___", state 735, "(1)" + line 260, "pan.___", state 743, "(1)" + line 271, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 820, "(1)" + line 283, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 843, "(1)" + line 252, "pan.___", state 851, "(1)" + line 256, "pan.___", state 863, "(1)" + line 260, "pan.___", state 871, "(1)" + line 275, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 934, "(1)" + line 252, "pan.___", state 942, "(1)" + line 256, "pan.___", state 954, "(1)" + line 260, "pan.___", state 962, "(1)" + line 275, "pan.___", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1025, "(1)" + line 252, "pan.___", state 1033, "(1)" + line 256, "pan.___", state 1045, "(1)" + line 260, "pan.___", state 1053, "(1)" + line 275, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 279, "pan.___", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 248, "pan.___", state 1116, "(1)" + line 252, "pan.___", state 1124, "(1)" + line 256, "pan.___", state 1136, "(1)" + line 260, "pan.___", state 1144, "(1)" + line 1236, "pan.___", state 1159, "-end-" + (71 of 1159 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1299, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 265 seconds +pan: rate 14518.182 states/second +pan: avg transition delay 2.812e-06 usec +cp .input.spin urcu_free.spin.input +cp .input.spin.trail urcu_free.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free.ltl b/urcu-controldataflow-intel-no-ipi/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_free.spin.input new file mode 100644 index 0000000..3191ba1 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free.spin.input @@ -0,0 +1,1272 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_nested.define b/urcu-controldataflow-intel-no-ipi/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.define b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.log b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.log new file mode 100644 index 0000000..4cf70c8 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.log @@ -0,0 +1,639 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 8086 States= 1e+06 Transitions= 1.91e+07 Memory= 550.334 t= 51.2 R= 2e+04 +Depth= 8086 States= 2e+06 Transitions= 3.68e+07 Memory= 634.318 t= 98.4 R= 2e+04 +Depth= 8086 States= 3e+06 Transitions= 5.68e+07 Memory= 718.205 t= 153 R= 2e+04 +pan: resizing hashtable to -w22.. done +Depth= 8086 States= 4e+06 Transitions= 7.01e+07 Memory= 833.213 t= 188 R= 2e+04 +Depth= 8086 States= 5e+06 Transitions= 8.42e+07 Memory= 917.197 t= 225 R= 2e+04 +Depth= 8086 States= 6e+06 Transitions= 9.87e+07 Memory= 1001.182 t= 263 R= 2e+04 +Depth= 8086 States= 7e+06 Transitions= 1.12e+08 Memory= 1085.166 t= 298 R= 2e+04 +Depth= 8086 States= 8e+06 Transitions= 1.28e+08 Memory= 1169.053 t= 342 R= 2e+04 +Depth= 8086 States= 9e+06 Transitions= 1.62e+08 Memory= 1253.037 t= 436 R= 2e+04 +pan: resizing hashtable to -w24.. done +Depth= 8086 States= 1e+07 Transitions= 1.95e+08 Memory= 1461.018 t= 530 R= 2e+04 +Depth= 13700 States= 1.1e+07 Transitions= 2.31e+08 Memory= 1545.002 t= 629 R= 2e+04 +Depth= 13700 States= 1.2e+07 Transitions= 2.64e+08 Memory= 1628.986 t= 721 R= 2e+04 +Depth= 13700 States= 1.3e+07 Transitions= 2.89e+08 Memory= 1712.971 t= 789 R= 2e+04 +Depth= 13700 States= 1.4e+07 Transitions= 3.09e+08 Memory= 1796.955 t= 844 R= 2e+04 +Depth= 13700 States= 1.5e+07 Transitions= 3.29e+08 Memory= 1880.940 t= 897 R= 2e+04 +pan: claim violated! (at depth 1143) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 13700, errors: 1 + 15925114 states, stored +3.2589318e+08 states, matched +3.418183e+08 transitions (= stored+matched) +5.3108495e+09 atomic steps +hash conflicts: 1.8673119e+08 (resolved) + +Stats on memory usage (in Megabytes): + 1761.735 equivalent memory usage for states (stored*(State-vector + overhead)) + 1373.571 actual memory usage for states (compression: 77.97%) + state-vector as stored = 62 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1958.576 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 21, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 53, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 67, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 85, "(1)" + line 257, "pan.___", state 105, "(1)" + line 261, "pan.___", state 113, "(1)" + line 603, "pan.___", state 132, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 139, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 171, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 185, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 203, "(1)" + line 257, "pan.___", state 223, "(1)" + line 261, "pan.___", state 231, "(1)" + line 411, "pan.___", state 250, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 282, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 296, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 314, "(1)" + line 257, "pan.___", state 334, "(1)" + line 261, "pan.___", state 342, "(1)" + line 411, "pan.___", state 363, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 365, "(1)" + line 411, "pan.___", state 366, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 366, "else" + line 411, "pan.___", state 369, "(1)" + line 415, "pan.___", state 377, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 379, "(1)" + line 415, "pan.___", state 380, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 380, "else" + line 415, "pan.___", state 383, "(1)" + line 415, "pan.___", state 384, "(1)" + line 415, "pan.___", state 384, "(1)" + line 413, "pan.___", state 389, "((i<1))" + line 413, "pan.___", state 389, "((i>=1))" + line 420, "pan.___", state 395, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 397, "(1)" + line 420, "pan.___", state 398, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 398, "else" + line 420, "pan.___", state 401, "(1)" + line 420, "pan.___", state 402, "(1)" + line 420, "pan.___", state 402, "(1)" + line 424, "pan.___", state 409, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 411, "(1)" + line 424, "pan.___", state 412, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 412, "else" + line 424, "pan.___", state 415, "(1)" + line 424, "pan.___", state 416, "(1)" + line 424, "pan.___", state 416, "(1)" + line 422, "pan.___", state 421, "((i<2))" + line 422, "pan.___", state 421, "((i>=2))" + line 249, "pan.___", state 427, "(1)" + line 253, "pan.___", state 435, "(1)" + line 253, "pan.___", state 436, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 436, "else" + line 251, "pan.___", state 441, "((i<1))" + line 251, "pan.___", state 441, "((i>=1))" + line 257, "pan.___", state 447, "(1)" + line 257, "pan.___", state 448, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 448, "else" + line 261, "pan.___", state 455, "(1)" + line 261, "pan.___", state 456, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 456, "else" + line 259, "pan.___", state 461, "((i<2))" + line 259, "pan.___", state 461, "((i>=2))" + line 266, "pan.___", state 465, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 465, "else" + line 431, "pan.___", state 467, "(1)" + line 431, "pan.___", state 467, "(1)" + line 603, "pan.___", state 470, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 603, "pan.___", state 471, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 603, "pan.___", state 472, "(1)" + line 272, "pan.___", state 476, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 478, "(1)" + line 276, "pan.___", state 485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 487, "(1)" + line 276, "pan.___", state 488, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 488, "else" + line 274, "pan.___", state 493, "((i<1))" + line 274, "pan.___", state 493, "((i>=1))" + line 280, "pan.___", state 498, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 500, "(1)" + line 280, "pan.___", state 501, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 501, "else" + line 284, "pan.___", state 507, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 509, "(1)" + line 284, "pan.___", state 510, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 510, "else" + line 282, "pan.___", state 515, "((i<2))" + line 282, "pan.___", state 515, "((i>=2))" + line 249, "pan.___", state 523, "(1)" + line 253, "pan.___", state 531, "(1)" + line 253, "pan.___", state 532, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 532, "else" + line 251, "pan.___", state 537, "((i<1))" + line 251, "pan.___", state 537, "((i>=1))" + line 257, "pan.___", state 543, "(1)" + line 257, "pan.___", state 544, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 544, "else" + line 261, "pan.___", state 551, "(1)" + line 261, "pan.___", state 552, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 552, "else" + line 266, "pan.___", state 561, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 561, "else" + line 299, "pan.___", state 563, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 563, "else" + line 411, "pan.___", state 569, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 601, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 615, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 633, "(1)" + line 257, "pan.___", state 653, "(1)" + line 261, "pan.___", state 661, "(1)" + line 411, "pan.___", state 687, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 719, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 733, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 751, "(1)" + line 257, "pan.___", state 771, "(1)" + line 261, "pan.___", state 779, "(1)" + line 411, "pan.___", state 798, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 800, "(1)" + line 411, "pan.___", state 801, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 801, "else" + line 411, "pan.___", state 804, "(1)" + line 415, "pan.___", state 812, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 814, "(1)" + line 415, "pan.___", state 815, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 815, "else" + line 415, "pan.___", state 818, "(1)" + line 415, "pan.___", state 819, "(1)" + line 415, "pan.___", state 819, "(1)" + line 413, "pan.___", state 824, "((i<1))" + line 413, "pan.___", state 824, "((i>=1))" + line 420, "pan.___", state 830, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 832, "(1)" + line 420, "pan.___", state 833, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 833, "else" + line 420, "pan.___", state 836, "(1)" + line 420, "pan.___", state 837, "(1)" + line 420, "pan.___", state 837, "(1)" + line 424, "pan.___", state 844, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 846, "(1)" + line 424, "pan.___", state 847, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 847, "else" + line 424, "pan.___", state 850, "(1)" + line 424, "pan.___", state 851, "(1)" + line 424, "pan.___", state 851, "(1)" + line 422, "pan.___", state 856, "((i<2))" + line 422, "pan.___", state 856, "((i>=2))" + line 249, "pan.___", state 862, "(1)" + line 253, "pan.___", state 870, "(1)" + line 253, "pan.___", state 871, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 871, "else" + line 251, "pan.___", state 876, "((i<1))" + line 251, "pan.___", state 876, "((i>=1))" + line 257, "pan.___", state 882, "(1)" + line 257, "pan.___", state 883, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 883, "else" + line 261, "pan.___", state 890, "(1)" + line 261, "pan.___", state 891, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 891, "else" + line 259, "pan.___", state 896, "((i<2))" + line 259, "pan.___", state 896, "((i>=2))" + line 266, "pan.___", state 900, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 900, "else" + line 431, "pan.___", state 902, "(1)" + line 431, "pan.___", state 902, "(1)" + line 611, "pan.___", state 906, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 911, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 943, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 957, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 975, "(1)" + line 257, "pan.___", state 995, "(1)" + line 261, "pan.___", state 1003, "(1)" + line 411, "pan.___", state 1025, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1057, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1071, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1089, "(1)" + line 257, "pan.___", state 1109, "(1)" + line 261, "pan.___", state 1117, "(1)" + line 411, "pan.___", state 1140, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1172, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1186, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1204, "(1)" + line 257, "pan.___", state 1224, "(1)" + line 261, "pan.___", state 1232, "(1)" + line 411, "pan.___", state 1251, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1283, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1297, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1315, "(1)" + line 257, "pan.___", state 1335, "(1)" + line 261, "pan.___", state 1343, "(1)" + line 272, "pan.___", state 1364, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1366, "(1)" + line 276, "pan.___", state 1373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1375, "(1)" + line 276, "pan.___", state 1376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1376, "else" + line 274, "pan.___", state 1381, "((i<1))" + line 274, "pan.___", state 1381, "((i>=1))" + line 280, "pan.___", state 1386, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1388, "(1)" + line 280, "pan.___", state 1389, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1389, "else" + line 284, "pan.___", state 1395, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1397, "(1)" + line 284, "pan.___", state 1398, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1398, "else" + line 282, "pan.___", state 1403, "((i<2))" + line 282, "pan.___", state 1403, "((i>=2))" + line 249, "pan.___", state 1411, "(1)" + line 253, "pan.___", state 1419, "(1)" + line 253, "pan.___", state 1420, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1420, "else" + line 251, "pan.___", state 1425, "((i<1))" + line 251, "pan.___", state 1425, "((i>=1))" + line 257, "pan.___", state 1431, "(1)" + line 257, "pan.___", state 1432, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1432, "else" + line 261, "pan.___", state 1439, "(1)" + line 261, "pan.___", state 1440, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1440, "else" + line 266, "pan.___", state 1449, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1449, "else" + line 299, "pan.___", state 1451, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1451, "else" + line 411, "pan.___", state 1457, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1489, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1521, "(1)" + line 257, "pan.___", state 1541, "(1)" + line 261, "pan.___", state 1549, "(1)" + line 411, "pan.___", state 1568, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1600, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1614, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1632, "(1)" + line 257, "pan.___", state 1652, "(1)" + line 261, "pan.___", state 1660, "(1)" + line 411, "pan.___", state 1682, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1714, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1728, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1746, "(1)" + line 257, "pan.___", state 1766, "(1)" + line 261, "pan.___", state 1774, "(1)" + line 650, "pan.___", state 1793, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1800, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1832, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1846, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1864, "(1)" + line 257, "pan.___", state 1884, "(1)" + line 261, "pan.___", state 1892, "(1)" + line 411, "pan.___", state 1911, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1943, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1957, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1975, "(1)" + line 257, "pan.___", state 1995, "(1)" + line 261, "pan.___", state 2003, "(1)" + line 411, "pan.___", state 2024, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2026, "(1)" + line 411, "pan.___", state 2027, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2027, "else" + line 411, "pan.___", state 2030, "(1)" + line 415, "pan.___", state 2038, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2040, "(1)" + line 415, "pan.___", state 2041, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2041, "else" + line 415, "pan.___", state 2044, "(1)" + line 415, "pan.___", state 2045, "(1)" + line 415, "pan.___", state 2045, "(1)" + line 413, "pan.___", state 2050, "((i<1))" + line 413, "pan.___", state 2050, "((i>=1))" + line 420, "pan.___", state 2056, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2058, "(1)" + line 420, "pan.___", state 2059, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2059, "else" + line 420, "pan.___", state 2062, "(1)" + line 420, "pan.___", state 2063, "(1)" + line 420, "pan.___", state 2063, "(1)" + line 424, "pan.___", state 2070, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2072, "(1)" + line 424, "pan.___", state 2073, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2073, "else" + line 424, "pan.___", state 2076, "(1)" + line 424, "pan.___", state 2077, "(1)" + line 424, "pan.___", state 2077, "(1)" + line 422, "pan.___", state 2082, "((i<2))" + line 422, "pan.___", state 2082, "((i>=2))" + line 249, "pan.___", state 2088, "(1)" + line 253, "pan.___", state 2096, "(1)" + line 253, "pan.___", state 2097, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2097, "else" + line 251, "pan.___", state 2102, "((i<1))" + line 251, "pan.___", state 2102, "((i>=1))" + line 257, "pan.___", state 2108, "(1)" + line 257, "pan.___", state 2109, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2109, "else" + line 261, "pan.___", state 2116, "(1)" + line 261, "pan.___", state 2117, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2117, "else" + line 259, "pan.___", state 2122, "((i<2))" + line 259, "pan.___", state 2122, "((i>=2))" + line 266, "pan.___", state 2126, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2126, "else" + line 431, "pan.___", state 2128, "(1)" + line 431, "pan.___", state 2128, "(1)" + line 650, "pan.___", state 2131, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 650, "pan.___", state 2132, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 650, "pan.___", state 2133, "(1)" + line 272, "pan.___", state 2137, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 2139, "(1)" + line 276, "pan.___", state 2146, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2148, "(1)" + line 276, "pan.___", state 2149, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 2149, "else" + line 274, "pan.___", state 2154, "((i<1))" + line 274, "pan.___", state 2154, "((i>=1))" + line 280, "pan.___", state 2159, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2161, "(1)" + line 280, "pan.___", state 2162, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 2162, "else" + line 284, "pan.___", state 2168, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2170, "(1)" + line 284, "pan.___", state 2171, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 2171, "else" + line 282, "pan.___", state 2176, "((i<2))" + line 282, "pan.___", state 2176, "((i>=2))" + line 249, "pan.___", state 2184, "(1)" + line 253, "pan.___", state 2192, "(1)" + line 253, "pan.___", state 2193, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2193, "else" + line 251, "pan.___", state 2198, "((i<1))" + line 251, "pan.___", state 2198, "((i>=1))" + line 257, "pan.___", state 2204, "(1)" + line 257, "pan.___", state 2205, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2205, "else" + line 261, "pan.___", state 2212, "(1)" + line 261, "pan.___", state 2213, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2213, "else" + line 266, "pan.___", state 2222, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2222, "else" + line 299, "pan.___", state 2224, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 2224, "else" + line 411, "pan.___", state 2230, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2262, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2276, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2294, "(1)" + line 257, "pan.___", state 2314, "(1)" + line 261, "pan.___", state 2322, "(1)" + line 272, "pan.___", state 2344, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 2346, "(1)" + line 276, "pan.___", state 2353, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2355, "(1)" + line 276, "pan.___", state 2356, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 2356, "else" + line 274, "pan.___", state 2361, "((i<1))" + line 274, "pan.___", state 2361, "((i>=1))" + line 280, "pan.___", state 2366, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2368, "(1)" + line 280, "pan.___", state 2369, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 2369, "else" + line 284, "pan.___", state 2375, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2377, "(1)" + line 284, "pan.___", state 2378, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 2378, "else" + line 282, "pan.___", state 2383, "((i<2))" + line 282, "pan.___", state 2383, "((i>=2))" + line 249, "pan.___", state 2391, "(1)" + line 253, "pan.___", state 2399, "(1)" + line 253, "pan.___", state 2400, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2400, "else" + line 251, "pan.___", state 2405, "((i<1))" + line 251, "pan.___", state 2405, "((i>=1))" + line 257, "pan.___", state 2411, "(1)" + line 257, "pan.___", state 2412, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2412, "else" + line 261, "pan.___", state 2419, "(1)" + line 261, "pan.___", state 2420, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2420, "else" + line 266, "pan.___", state 2429, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2429, "else" + line 299, "pan.___", state 2431, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 2431, "else" + line 411, "pan.___", state 2437, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2469, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2483, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2501, "(1)" + line 257, "pan.___", state 2521, "(1)" + line 261, "pan.___", state 2529, "(1)" + line 411, "pan.___", state 2548, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2580, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2594, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2612, "(1)" + line 257, "pan.___", state 2632, "(1)" + line 261, "pan.___", state 2640, "(1)" + line 249, "pan.___", state 2671, "(1)" + line 257, "pan.___", state 2691, "(1)" + line 261, "pan.___", state 2699, "(1)" + line 249, "pan.___", state 2714, "(1)" + line 257, "pan.___", state 2734, "(1)" + line 261, "pan.___", state 2742, "(1)" + line 898, "pan.___", state 2759, "-end-" + (306 of 2759 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 20, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 26, "(1)" + line 415, "pan.___", state 34, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 40, "(1)" + line 415, "pan.___", state 41, "(1)" + line 415, "pan.___", state 41, "(1)" + line 413, "pan.___", state 46, "((i<1))" + line 413, "pan.___", state 46, "((i>=1))" + line 420, "pan.___", state 52, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 58, "(1)" + line 420, "pan.___", state 59, "(1)" + line 420, "pan.___", state 59, "(1)" + line 424, "pan.___", state 72, "(1)" + line 424, "pan.___", state 73, "(1)" + line 424, "pan.___", state 73, "(1)" + line 422, "pan.___", state 78, "((i<2))" + line 422, "pan.___", state 78, "((i>=2))" + line 249, "pan.___", state 84, "(1)" + line 253, "pan.___", state 92, "(1)" + line 253, "pan.___", state 93, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 93, "else" + line 251, "pan.___", state 98, "((i<1))" + line 251, "pan.___", state 98, "((i>=1))" + line 257, "pan.___", state 104, "(1)" + line 257, "pan.___", state 105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 105, "else" + line 261, "pan.___", state 112, "(1)" + line 261, "pan.___", state 113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 113, "else" + line 259, "pan.___", state 118, "((i<2))" + line 259, "pan.___", state 118, "((i>=2))" + line 266, "pan.___", state 122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 122, "else" + line 431, "pan.___", state 124, "(1)" + line 431, "pan.___", state 124, "(1)" + line 272, "pan.___", state 133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 142, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 274, "pan.___", state 150, "((i<1))" + line 274, "pan.___", state 150, "((i>=1))" + line 280, "pan.___", state 155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 1021, "pan.___", state 183, "old_data = cached_rcu_ptr.val[_pid]" + line 1032, "pan.___", state 187, "_proc_urcu_writer = (_proc_urcu_writer|(1<<4))" + line 411, "pan.___", state 195, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 201, "(1)" + line 415, "pan.___", state 209, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 215, "(1)" + line 415, "pan.___", state 216, "(1)" + line 415, "pan.___", state 216, "(1)" + line 420, "pan.___", state 229, "(1)" + line 424, "pan.___", state 241, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 259, "(1)" + line 253, "pan.___", state 267, "(1)" + line 261, "pan.___", state 287, "(1)" + line 431, "pan.___", state 299, "(1)" + line 431, "pan.___", state 299, "(1)" + line 415, "pan.___", state 322, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 354, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 380, "(1)" + line 261, "pan.___", state 400, "(1)" + line 415, "pan.___", state 443, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 253, "pan.___", state 501, "(1)" + line 415, "pan.___", state 554, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 253, "pan.___", state 612, "(1)" + line 415, "pan.___", state 667, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 699, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 725, "(1)" + line 261, "pan.___", state 745, "(1)" + line 1168, "pan.___", state 770, "_proc_urcu_writer = (_proc_urcu_writer|(1<<13))" + line 272, "pan.___", state 798, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 800, "(1)" + line 276, "pan.___", state 807, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 809, "(1)" + line 276, "pan.___", state 810, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 810, "else" + line 274, "pan.___", state 815, "((i<1))" + line 274, "pan.___", state 815, "((i>=1))" + line 280, "pan.___", state 820, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 822, "(1)" + line 280, "pan.___", state 823, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 823, "else" + line 284, "pan.___", state 829, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 831, "(1)" + line 284, "pan.___", state 832, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 832, "else" + line 282, "pan.___", state 837, "((i<2))" + line 282, "pan.___", state 837, "((i>=2))" + line 249, "pan.___", state 845, "(1)" + line 253, "pan.___", state 853, "(1)" + line 253, "pan.___", state 854, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 854, "else" + line 251, "pan.___", state 859, "((i<1))" + line 251, "pan.___", state 859, "((i>=1))" + line 257, "pan.___", state 865, "(1)" + line 257, "pan.___", state 866, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 866, "else" + line 261, "pan.___", state 873, "(1)" + line 261, "pan.___", state 874, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 874, "else" + line 266, "pan.___", state 883, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 883, "else" + line 299, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 885, "else" + line 276, "pan.___", state 898, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 911, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 920, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 936, "(1)" + line 253, "pan.___", state 944, "(1)" + line 257, "pan.___", state 956, "(1)" + line 261, "pan.___", state 964, "(1)" + line 276, "pan.___", state 989, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1011, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1027, "(1)" + line 253, "pan.___", state 1035, "(1)" + line 257, "pan.___", state 1047, "(1)" + line 261, "pan.___", state 1055, "(1)" + line 272, "pan.___", state 1071, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 1073, "(1)" + line 276, "pan.___", state 1080, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 1082, "(1)" + line 276, "pan.___", state 1083, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 1083, "else" + line 274, "pan.___", state 1088, "((i<1))" + line 274, "pan.___", state 1088, "((i>=1))" + line 280, "pan.___", state 1093, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1095, "(1)" + line 280, "pan.___", state 1096, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1096, "else" + line 284, "pan.___", state 1102, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1104, "(1)" + line 284, "pan.___", state 1105, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1105, "else" + line 282, "pan.___", state 1110, "((i<2))" + line 282, "pan.___", state 1110, "((i>=2))" + line 249, "pan.___", state 1118, "(1)" + line 253, "pan.___", state 1126, "(1)" + line 253, "pan.___", state 1127, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1127, "else" + line 251, "pan.___", state 1132, "((i<1))" + line 251, "pan.___", state 1132, "((i>=1))" + line 257, "pan.___", state 1138, "(1)" + line 257, "pan.___", state 1139, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1139, "else" + line 261, "pan.___", state 1146, "(1)" + line 261, "pan.___", state 1147, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1147, "else" + line 266, "pan.___", state 1156, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1156, "else" + line 299, "pan.___", state 1158, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1158, "else" + line 1237, "pan.___", state 1161, "-end-" + (113 of 1161 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 933 seconds +pan: rate 17076.039 states/second +pan: avg transition delay 2.7284e-06 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..a7ea865 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input @@ -0,0 +1,1273 @@ +#define NO_MB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input.trail b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..39bdf85 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,1146 @@ +-2:3:-2 +-4:-4:-4 +1:0:4000 +2:3:3920 +3:3:3923 +4:3:3923 +5:3:3926 +6:3:3934 +7:3:3934 +8:3:3937 +9:3:3943 +10:3:3947 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+1,448 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 4907 States= 1e+06 Transitions= 2.54e+07 Memory= 550.432 t= 71.2 R= 1e+04 +Depth= 5133 States= 2e+06 Transitions= 5.13e+07 Memory= 634.318 t= 145 R= 1e+04 +Depth= 5133 States= 3e+06 Transitions= 7.76e+07 Memory= 718.303 t= 220 R= 1e+04 +pan: resizing hashtable to -w22.. done + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 5133, errors: 0 + 3846927 states, stored + 96650452 states, matched +1.0049738e+08 transitions (= stored+matched) +1.6169296e+09 atomic steps +hash conflicts: 68306904 (resolved) + +Stats on memory usage (in Megabytes): + 425.571 equivalent memory usage for states (stored*(State-vector + overhead)) + 330.939 actual memory usage for states (compression: 77.76%) + state-vector as stored = 62 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 820.420 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 81, "(1)" + line 257, "pan.___", state 101, "(1)" + line 261, "pan.___", state 109, "(1)" + line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 199, "(1)" + line 257, "pan.___", state 219, "(1)" + line 261, "pan.___", state 227, "(1)" + line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 310, "(1)" + line 257, "pan.___", state 330, "(1)" + line 261, "pan.___", state 338, "(1)" + line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 361, "(1)" + line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 362, "else" + line 411, "pan.___", state 365, "(1)" + line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 375, "(1)" + line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 376, "else" + line 415, "pan.___", state 379, "(1)" + line 415, "pan.___", state 380, "(1)" + line 415, "pan.___", state 380, "(1)" + line 413, "pan.___", state 385, "((i<1))" + line 413, "pan.___", state 385, "((i>=1))" + line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 393, "(1)" + line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 394, "else" + line 420, "pan.___", state 397, "(1)" + line 420, "pan.___", state 398, "(1)" + line 420, "pan.___", state 398, "(1)" + line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 407, "(1)" + line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 408, "else" + line 424, "pan.___", state 411, "(1)" + line 424, "pan.___", state 412, "(1)" + line 424, "pan.___", state 412, "(1)" + line 422, "pan.___", state 417, "((i<2))" + line 422, "pan.___", state 417, "((i>=2))" + line 249, "pan.___", state 423, "(1)" + line 253, "pan.___", state 431, "(1)" + line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 432, "else" + line 251, "pan.___", state 437, "((i<1))" + line 251, "pan.___", state 437, "((i>=1))" + line 257, "pan.___", state 443, "(1)" + line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 444, "else" + line 261, "pan.___", state 451, "(1)" + line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 452, "else" + line 259, "pan.___", state 457, "((i<2))" + line 259, "pan.___", state 457, "((i>=2))" + line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 461, "else" + line 431, "pan.___", state 463, "(1)" + line 431, "pan.___", state 463, "(1)" + line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 468, "(1)" + line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 483, "(1)" + line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 519, "(1)" + line 253, "pan.___", state 527, "(1)" + line 257, "pan.___", state 539, "(1)" + line 261, "pan.___", state 547, "(1)" + line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 629, "(1)" + line 253, "pan.___", state 637, "(1)" + line 257, "pan.___", state 649, "(1)" + line 261, "pan.___", state 657, "(1)" + line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 747, "(1)" + line 257, "pan.___", state 767, "(1)" + line 261, "pan.___", state 775, "(1)" + line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 796, "(1)" + line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 797, "else" + line 411, "pan.___", state 800, "(1)" + line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 810, "(1)" + line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 811, "else" + line 415, "pan.___", state 814, "(1)" + line 415, "pan.___", state 815, "(1)" + line 415, "pan.___", state 815, "(1)" + line 413, "pan.___", state 820, "((i<1))" + line 413, "pan.___", state 820, "((i>=1))" + line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 828, "(1)" + line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 829, "else" + line 420, "pan.___", state 832, "(1)" + line 420, "pan.___", state 833, "(1)" + line 420, "pan.___", state 833, "(1)" + line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 842, "(1)" + line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 843, "else" + line 424, "pan.___", state 846, "(1)" + line 424, "pan.___", state 847, "(1)" + line 424, "pan.___", state 847, "(1)" + line 422, "pan.___", state 852, "((i<2))" + line 422, "pan.___", state 852, "((i>=2))" + line 249, "pan.___", state 858, "(1)" + line 253, "pan.___", state 866, "(1)" + line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 867, "else" + line 251, "pan.___", state 872, "((i<1))" + line 251, "pan.___", state 872, "((i>=1))" + line 257, "pan.___", state 878, "(1)" + line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 879, "else" + line 261, "pan.___", state 886, "(1)" + line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 887, "else" + line 259, "pan.___", state 892, "((i<2))" + line 259, "pan.___", state 892, "((i>=2))" + line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 896, "else" + line 431, "pan.___", state 898, "(1)" + line 431, "pan.___", state 898, "(1)" + line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 971, "(1)" + line 253, "pan.___", state 979, "(1)" + line 257, "pan.___", state 991, "(1)" + line 261, "pan.___", state 999, "(1)" + line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1085, "(1)" + line 257, "pan.___", state 1105, "(1)" + line 261, "pan.___", state 1113, "(1)" + line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1200, "(1)" + line 257, "pan.___", state 1220, "(1)" + line 261, "pan.___", state 1228, "(1)" + line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1311, "(1)" + line 257, "pan.___", state 1331, "(1)" + line 261, "pan.___", state 1339, "(1)" + line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1407, "(1)" + line 253, "pan.___", state 1415, "(1)" + line 257, "pan.___", state 1427, "(1)" + line 261, "pan.___", state 1435, "(1)" + line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1517, "(1)" + line 253, "pan.___", state 1525, "(1)" + line 257, "pan.___", state 1537, "(1)" + line 261, "pan.___", state 1545, "(1)" + line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1628, "(1)" + line 253, "pan.___", state 1636, "(1)" + line 257, "pan.___", state 1648, "(1)" + line 261, "pan.___", state 1656, "(1)" + line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1742, "(1)" + line 257, "pan.___", state 1762, "(1)" + line 261, "pan.___", state 1770, "(1)" + line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1860, "(1)" + line 257, "pan.___", state 1880, "(1)" + line 261, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1971, "(1)" + line 257, "pan.___", state 1991, "(1)" + line 261, "pan.___", state 1999, "(1)" + line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2022, "(1)" + line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2023, "else" + line 411, "pan.___", state 2026, "(1)" + line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2036, "(1)" + line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2037, "else" + line 415, "pan.___", state 2040, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 413, "pan.___", state 2046, "((i<1))" + line 413, "pan.___", state 2046, "((i>=1))" + line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2054, "(1)" + line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2055, "else" + line 420, "pan.___", state 2058, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2068, "(1)" + line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2069, "else" + line 424, "pan.___", state 2072, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 422, "pan.___", state 2078, "((i<2))" + line 422, "pan.___", state 2078, "((i>=2))" + line 249, "pan.___", state 2084, "(1)" + line 253, "pan.___", state 2092, "(1)" + line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2093, "else" + line 251, "pan.___", state 2098, "((i<1))" + line 251, "pan.___", state 2098, "((i>=1))" + line 257, "pan.___", state 2104, "(1)" + line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2105, "else" + line 261, "pan.___", state 2112, "(1)" + line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2113, "else" + line 259, "pan.___", state 2118, "((i<2))" + line 259, "pan.___", state 2118, "((i>=2))" + line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2122, "else" + line 431, "pan.___", state 2124, "(1)" + line 431, "pan.___", state 2124, "(1)" + line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2129, "(1)" + line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2180, "(1)" + line 253, "pan.___", state 2188, "(1)" + line 257, "pan.___", state 2200, "(1)" + line 261, "pan.___", state 2208, "(1)" + line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2290, "(1)" + line 253, "pan.___", state 2298, "(1)" + line 257, "pan.___", state 2310, "(1)" + line 261, "pan.___", state 2318, "(1)" + line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2387, "(1)" + line 253, "pan.___", state 2395, "(1)" + line 257, "pan.___", state 2407, "(1)" + line 261, "pan.___", state 2415, "(1)" + line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2497, "(1)" + line 253, "pan.___", state 2505, "(1)" + line 257, "pan.___", state 2517, "(1)" + line 261, "pan.___", state 2525, "(1)" + line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2608, "(1)" + line 253, "pan.___", state 2616, "(1)" + line 257, "pan.___", state 2628, "(1)" + line 261, "pan.___", state 2636, "(1)" + line 411, "pan.___", state 2667, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2699, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2713, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2731, "(1)" + line 257, "pan.___", state 2751, "(1)" + line 261, "pan.___", state 2759, "(1)" + line 411, "pan.___", state 2776, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2790, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2808, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2822, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2840, "(1)" + line 253, "pan.___", state 2848, "(1)" + line 257, "pan.___", state 2860, "(1)" + line 261, "pan.___", state 2868, "(1)" + line 898, "pan.___", state 2887, "-end-" + (266 of 2887 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 82, "(1)" + line 253, "pan.___", state 90, "(1)" + line 257, "pan.___", state 102, "(1)" + line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 257, "(1)" + line 253, "pan.___", state 265, "(1)" + line 257, "pan.___", state 277, "(1)" + line 261, "pan.___", state 285, "(1)" + line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 378, "(1)" + line 257, "pan.___", state 390, "(1)" + line 261, "pan.___", state 398, "(1)" + line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 499, "(1)" + line 257, "pan.___", state 511, "(1)" + line 261, "pan.___", state 519, "(1)" + line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 610, "(1)" + line 257, "pan.___", state 622, "(1)" + line 261, "pan.___", state 630, "(1)" + line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 723, "(1)" + line 257, "pan.___", state 735, "(1)" + line 261, "pan.___", state 743, "(1)" + line 272, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 820, "(1)" + line 284, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 843, "(1)" + line 253, "pan.___", state 851, "(1)" + line 257, "pan.___", state 863, "(1)" + line 261, "pan.___", state 871, "(1)" + line 276, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 934, "(1)" + line 253, "pan.___", state 942, "(1)" + line 257, "pan.___", state 954, "(1)" + line 261, "pan.___", state 962, "(1)" + line 276, "pan.___", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1025, "(1)" + line 253, "pan.___", state 1033, "(1)" + line 257, "pan.___", state 1045, "(1)" + line 261, "pan.___", state 1053, "(1)" + line 276, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1116, "(1)" + line 253, "pan.___", state 1124, "(1)" + line 257, "pan.___", state 1136, "(1)" + line 261, "pan.___", state 1144, "(1)" + line 1237, "pan.___", state 1159, "-end-" + (71 of 1159 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 285 seconds +pan: rate 13484.269 states/second +pan: avg transition delay 2.8388e-06 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..d0fd74e --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_rmb.spin.input @@ -0,0 +1,1273 @@ +#define NO_RMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.define b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.log b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.log new file mode 100644 index 0000000..6c01490 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.log @@ -0,0 +1,467 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 4736 States= 1e+06 Transitions= 2.14e+07 Memory= 550.334 t= 59.2 R= 2e+04 +Depth= 4922 States= 2e+06 Transitions= 4.72e+07 Memory= 634.221 t= 132 R= 2e+04 +Depth= 4922 States= 3e+06 Transitions= 7.19e+07 Memory= 718.205 t= 203 R= 1e+04 +pan: resizing hashtable to -w22.. done +pan: claim violated! (at depth 1295) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 4922, errors: 1 + 3435201 states, stored + 77730101 states, matched + 81165302 transitions (= stored+matched) +1.2953753e+09 atomic steps +hash conflicts: 60833788 (resolved) + +Stats on memory usage (in Megabytes): + 380.023 equivalent memory usage for states (stored*(State-vector + overhead)) + 296.169 actual memory usage for states (compression: 77.93%) + state-vector as stored = 62 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 785.752 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 81, "(1)" + line 257, "pan.___", state 101, "(1)" + line 261, "pan.___", state 109, "(1)" + line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 199, "(1)" + line 257, "pan.___", state 219, "(1)" + line 261, "pan.___", state 227, "(1)" + line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 310, "(1)" + line 257, "pan.___", state 330, "(1)" + line 261, "pan.___", state 338, "(1)" + line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 361, "(1)" + line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 362, "else" + line 411, "pan.___", state 365, "(1)" + line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 375, "(1)" + line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 376, "else" + line 415, "pan.___", state 379, "(1)" + line 415, "pan.___", state 380, "(1)" + line 415, "pan.___", state 380, "(1)" + line 413, "pan.___", state 385, "((i<1))" + line 413, "pan.___", state 385, "((i>=1))" + line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 393, "(1)" + line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 394, "else" + line 420, "pan.___", state 397, "(1)" + line 420, "pan.___", state 398, "(1)" + line 420, "pan.___", state 398, "(1)" + line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 407, "(1)" + line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 408, "else" + line 424, "pan.___", state 411, "(1)" + line 424, "pan.___", state 412, "(1)" + line 424, "pan.___", state 412, "(1)" + line 422, "pan.___", state 417, "((i<2))" + line 422, "pan.___", state 417, "((i>=2))" + line 249, "pan.___", state 423, "(1)" + line 253, "pan.___", state 431, "(1)" + line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 432, "else" + line 251, "pan.___", state 437, "((i<1))" + line 251, "pan.___", state 437, "((i>=1))" + line 257, "pan.___", state 443, "(1)" + line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 444, "else" + line 261, "pan.___", state 451, "(1)" + line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 452, "else" + line 259, "pan.___", state 457, "((i<2))" + line 259, "pan.___", state 457, "((i>=2))" + line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 461, "else" + line 431, "pan.___", state 463, "(1)" + line 431, "pan.___", state 463, "(1)" + line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 468, "(1)" + line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 483, "(1)" + line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 519, "(1)" + line 253, "pan.___", state 527, "(1)" + line 257, "pan.___", state 539, "(1)" + line 261, "pan.___", state 547, "(1)" + line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 629, "(1)" + line 253, "pan.___", state 637, "(1)" + line 257, "pan.___", state 649, "(1)" + line 261, "pan.___", state 657, "(1)" + line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 747, "(1)" + line 257, "pan.___", state 767, "(1)" + line 261, "pan.___", state 775, "(1)" + line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 796, "(1)" + line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 797, "else" + line 411, "pan.___", state 800, "(1)" + line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 810, "(1)" + line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 811, "else" + line 415, "pan.___", state 814, "(1)" + line 415, "pan.___", state 815, "(1)" + line 415, "pan.___", state 815, "(1)" + line 413, "pan.___", state 820, "((i<1))" + line 413, "pan.___", state 820, "((i>=1))" + line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 828, "(1)" + line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 829, "else" + line 420, "pan.___", state 832, "(1)" + line 420, "pan.___", state 833, "(1)" + line 420, "pan.___", state 833, "(1)" + line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 842, "(1)" + line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 843, "else" + line 424, "pan.___", state 846, "(1)" + line 424, "pan.___", state 847, "(1)" + line 424, "pan.___", state 847, "(1)" + line 422, "pan.___", state 852, "((i<2))" + line 422, "pan.___", state 852, "((i>=2))" + line 249, "pan.___", state 858, "(1)" + line 253, "pan.___", state 866, "(1)" + line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 867, "else" + line 251, "pan.___", state 872, "((i<1))" + line 251, "pan.___", state 872, "((i>=1))" + line 257, "pan.___", state 878, "(1)" + line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 879, "else" + line 261, "pan.___", state 886, "(1)" + line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 887, "else" + line 259, "pan.___", state 892, "((i<2))" + line 259, "pan.___", state 892, "((i>=2))" + line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 896, "else" + line 431, "pan.___", state 898, "(1)" + line 431, "pan.___", state 898, "(1)" + line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 971, "(1)" + line 253, "pan.___", state 979, "(1)" + line 257, "pan.___", state 991, "(1)" + line 261, "pan.___", state 999, "(1)" + line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1085, "(1)" + line 257, "pan.___", state 1105, "(1)" + line 261, "pan.___", state 1113, "(1)" + line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1200, "(1)" + line 257, "pan.___", state 1220, "(1)" + line 261, "pan.___", state 1228, "(1)" + line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1311, "(1)" + line 257, "pan.___", state 1331, "(1)" + line 261, "pan.___", state 1339, "(1)" + line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1407, "(1)" + line 253, "pan.___", state 1415, "(1)" + line 257, "pan.___", state 1427, "(1)" + line 261, "pan.___", state 1435, "(1)" + line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1517, "(1)" + line 253, "pan.___", state 1525, "(1)" + line 257, "pan.___", state 1537, "(1)" + line 261, "pan.___", state 1545, "(1)" + line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1628, "(1)" + line 253, "pan.___", state 1636, "(1)" + line 257, "pan.___", state 1648, "(1)" + line 261, "pan.___", state 1656, "(1)" + line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1742, "(1)" + line 257, "pan.___", state 1762, "(1)" + line 261, "pan.___", state 1770, "(1)" + line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1860, "(1)" + line 257, "pan.___", state 1880, "(1)" + line 261, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1971, "(1)" + line 257, "pan.___", state 1991, "(1)" + line 261, "pan.___", state 1999, "(1)" + line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2022, "(1)" + line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2023, "else" + line 411, "pan.___", state 2026, "(1)" + line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2036, "(1)" + line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2037, "else" + line 415, "pan.___", state 2040, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 413, "pan.___", state 2046, "((i<1))" + line 413, "pan.___", state 2046, "((i>=1))" + line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2054, "(1)" + line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2055, "else" + line 420, "pan.___", state 2058, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2068, "(1)" + line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2069, "else" + line 424, "pan.___", state 2072, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 422, "pan.___", state 2078, "((i<2))" + line 422, "pan.___", state 2078, "((i>=2))" + line 249, "pan.___", state 2084, "(1)" + line 253, "pan.___", state 2092, "(1)" + line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2093, "else" + line 251, "pan.___", state 2098, "((i<1))" + line 251, "pan.___", state 2098, "((i>=1))" + line 257, "pan.___", state 2104, "(1)" + line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2105, "else" + line 261, "pan.___", state 2112, "(1)" + line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2113, "else" + line 259, "pan.___", state 2118, "((i<2))" + line 259, "pan.___", state 2118, "((i>=2))" + line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2122, "else" + line 431, "pan.___", state 2124, "(1)" + line 431, "pan.___", state 2124, "(1)" + line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2129, "(1)" + line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2180, "(1)" + line 253, "pan.___", state 2188, "(1)" + line 257, "pan.___", state 2200, "(1)" + line 261, "pan.___", state 2208, "(1)" + line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2290, "(1)" + line 253, "pan.___", state 2298, "(1)" + line 257, "pan.___", state 2310, "(1)" + line 261, "pan.___", state 2318, "(1)" + line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2387, "(1)" + line 253, "pan.___", state 2395, "(1)" + line 257, "pan.___", state 2407, "(1)" + line 261, "pan.___", state 2415, "(1)" + line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2497, "(1)" + line 253, "pan.___", state 2505, "(1)" + line 257, "pan.___", state 2517, "(1)" + line 261, "pan.___", state 2525, "(1)" + line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2608, "(1)" + line 253, "pan.___", state 2616, "(1)" + line 257, "pan.___", state 2628, "(1)" + line 261, "pan.___", state 2636, "(1)" + line 249, "pan.___", state 2667, "(1)" + line 257, "pan.___", state 2687, "(1)" + line 261, "pan.___", state 2695, "(1)" + line 249, "pan.___", state 2710, "(1)" + line 253, "pan.___", state 2718, "(1)" + line 257, "pan.___", state 2730, "(1)" + line 261, "pan.___", state 2738, "(1)" + line 898, "pan.___", state 2755, "-end-" + (259 of 2755 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 19, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 33, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 83, "(1)" + line 253, "pan.___", state 91, "(1)" + line 272, "pan.___", state 132, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 134, "(1)" + line 276, "pan.___", state 141, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 143, "(1)" + line 276, "pan.___", state 144, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 144, "else" + line 274, "pan.___", state 149, "((i<1))" + line 274, "pan.___", state 149, "((i>=1))" + line 280, "pan.___", state 154, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 156, "(1)" + line 280, "pan.___", state 157, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 157, "else" + line 284, "pan.___", state 163, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 165, "(1)" + line 284, "pan.___", state 166, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 166, "else" + line 289, "pan.___", state 175, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 289, "pan.___", state 175, "else" + line 411, "pan.___", state 194, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 208, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 226, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 240, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 258, "(1)" + line 253, "pan.___", state 266, "(1)" + line 257, "pan.___", state 278, "(1)" + line 261, "pan.___", state 286, "(1)" + line 415, "pan.___", state 321, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 339, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 353, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 379, "(1)" + line 257, "pan.___", state 391, "(1)" + line 261, "pan.___", state 399, "(1)" + line 415, "pan.___", state 442, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 460, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 474, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 500, "(1)" + line 257, "pan.___", state 512, "(1)" + line 261, "pan.___", state 520, "(1)" + line 415, "pan.___", state 553, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 571, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 585, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 611, "(1)" + line 257, "pan.___", state 623, "(1)" + line 261, "pan.___", state 631, "(1)" + line 415, "pan.___", state 666, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 684, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 698, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 724, "(1)" + line 257, "pan.___", state 736, "(1)" + line 261, "pan.___", state 744, "(1)" + line 272, "pan.___", state 797, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 806, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 844, "(1)" + line 253, "pan.___", state 852, "(1)" + line 257, "pan.___", state 864, "(1)" + line 261, "pan.___", state 872, "(1)" + line 276, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 910, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 919, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 935, "(1)" + line 253, "pan.___", state 943, "(1)" + line 257, "pan.___", state 955, "(1)" + line 261, "pan.___", state 963, "(1)" + line 276, "pan.___", state 988, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1001, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1010, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1026, "(1)" + line 253, "pan.___", state 1034, "(1)" + line 257, "pan.___", state 1046, "(1)" + line 261, "pan.___", state 1054, "(1)" + line 276, "pan.___", state 1079, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1092, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1101, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1117, "(1)" + line 253, "pan.___", state 1125, "(1)" + line 257, "pan.___", state 1137, "(1)" + line 261, "pan.___", state 1145, "(1)" + line 1237, "pan.___", state 1160, "-end-" + (77 of 1160 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 229 seconds +pan: rate 14976.68 states/second +pan: avg transition delay 2.826e-06 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..dc68ded --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input @@ -0,0 +1,1273 @@ +#define NO_WMB + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input.trail b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..aca9da8 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1298 @@ +-2:3:-2 +-4:-4:-4 +1:0:3995 +2:3:3915 +3:3:3918 +4:3:3918 +5:3:3921 +6:3:3929 +7:3:3929 +8:3:3932 +9:3:3938 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+1264:2:3643 +1265:2:3644 +1266:2:3648 +1267:2:3652 +1268:2:3653 +1269:2:3657 +1270:2:3665 +1271:2:3666 +1272:2:3670 +1273:2:3674 +1274:2:3675 +1275:2:3670 +1276:2:3674 +1277:2:3675 +1278:2:3679 +1279:2:3686 +1280:2:3693 +1281:2:3694 +1282:2:3701 +1283:2:3706 +1284:2:3713 +1285:2:3714 +1286:2:3713 +1287:2:3714 +1288:2:3721 +1289:2:3725 +1290:0:3995 +1291:1:1129 +1292:1:1130 +1293:0:3993 +1294:1:11 +1295:0:3999 +1296:1:2142 diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.define b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.log b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.log new file mode 100644 index 0000000..92cda73 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.log @@ -0,0 +1,571 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +Depth= 5162 States= 1e+06 Transitions= 1.79e+07 Memory= 550.334 t= 49 R= 2e+04 +pan: claim violated! (at depth 1059) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 5162, errors: 1 + 1708535 states, stored + 29763099 states, matched + 31471634 transitions (= stored+matched) +4.8935629e+08 atomic steps +hash conflicts: 14510834 (resolved) + +Stats on memory usage (in Megabytes): + 189.009 equivalent memory usage for states (stored*(State-vector + overhead)) + 144.122 actual memory usage for states (compression: 76.25%) + state-vector as stored = 60 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 609.807 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 81, "(1)" + line 257, "pan.___", state 101, "(1)" + line 261, "pan.___", state 109, "(1)" + line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 199, "(1)" + line 257, "pan.___", state 219, "(1)" + line 261, "pan.___", state 227, "(1)" + line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 310, "(1)" + line 257, "pan.___", state 330, "(1)" + line 261, "pan.___", state 338, "(1)" + line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 361, "(1)" + line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 362, "else" + line 411, "pan.___", state 365, "(1)" + line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 375, "(1)" + line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 376, "else" + line 415, "pan.___", state 379, "(1)" + line 415, "pan.___", state 380, "(1)" + line 415, "pan.___", state 380, "(1)" + line 413, "pan.___", state 385, "((i<1))" + line 413, "pan.___", state 385, "((i>=1))" + line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 393, "(1)" + line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 394, "else" + line 420, "pan.___", state 397, "(1)" + line 420, "pan.___", state 398, "(1)" + line 420, "pan.___", state 398, "(1)" + line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 407, "(1)" + line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 408, "else" + line 424, "pan.___", state 411, "(1)" + line 424, "pan.___", state 412, "(1)" + line 424, "pan.___", state 412, "(1)" + line 422, "pan.___", state 417, "((i<2))" + line 422, "pan.___", state 417, "((i>=2))" + line 249, "pan.___", state 423, "(1)" + line 253, "pan.___", state 431, "(1)" + line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 432, "else" + line 251, "pan.___", state 437, "((i<1))" + line 251, "pan.___", state 437, "((i>=1))" + line 257, "pan.___", state 443, "(1)" + line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 444, "else" + line 261, "pan.___", state 451, "(1)" + line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 452, "else" + line 259, "pan.___", state 457, "((i<2))" + line 259, "pan.___", state 457, "((i>=2))" + line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 461, "else" + line 431, "pan.___", state 463, "(1)" + line 431, "pan.___", state 463, "(1)" + line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 468, "(1)" + line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 483, "(1)" + line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 519, "(1)" + line 253, "pan.___", state 527, "(1)" + line 257, "pan.___", state 539, "(1)" + line 261, "pan.___", state 547, "(1)" + line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 629, "(1)" + line 253, "pan.___", state 637, "(1)" + line 257, "pan.___", state 649, "(1)" + line 261, "pan.___", state 657, "(1)" + line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 747, "(1)" + line 257, "pan.___", state 767, "(1)" + line 261, "pan.___", state 775, "(1)" + line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 796, "(1)" + line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 797, "else" + line 411, "pan.___", state 800, "(1)" + line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 810, "(1)" + line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 811, "else" + line 415, "pan.___", state 814, "(1)" + line 415, "pan.___", state 815, "(1)" + line 415, "pan.___", state 815, "(1)" + line 413, "pan.___", state 820, "((i<1))" + line 413, "pan.___", state 820, "((i>=1))" + line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 828, "(1)" + line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 829, "else" + line 420, "pan.___", state 832, "(1)" + line 420, "pan.___", state 833, "(1)" + line 420, "pan.___", state 833, "(1)" + line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 842, "(1)" + line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 843, "else" + line 424, "pan.___", state 846, "(1)" + line 424, "pan.___", state 847, "(1)" + line 424, "pan.___", state 847, "(1)" + line 422, "pan.___", state 852, "((i<2))" + line 422, "pan.___", state 852, "((i>=2))" + line 249, "pan.___", state 858, "(1)" + line 253, "pan.___", state 866, "(1)" + line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 867, "else" + line 251, "pan.___", state 872, "((i<1))" + line 251, "pan.___", state 872, "((i>=1))" + line 257, "pan.___", state 878, "(1)" + line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 879, "else" + line 261, "pan.___", state 886, "(1)" + line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 887, "else" + line 259, "pan.___", state 892, "((i<2))" + line 259, "pan.___", state 892, "((i>=2))" + line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 896, "else" + line 431, "pan.___", state 898, "(1)" + line 431, "pan.___", state 898, "(1)" + line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 971, "(1)" + line 253, "pan.___", state 979, "(1)" + line 257, "pan.___", state 991, "(1)" + line 261, "pan.___", state 999, "(1)" + line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1085, "(1)" + line 257, "pan.___", state 1105, "(1)" + line 261, "pan.___", state 1113, "(1)" + line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1200, "(1)" + line 257, "pan.___", state 1220, "(1)" + line 261, "pan.___", state 1228, "(1)" + line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1311, "(1)" + line 257, "pan.___", state 1331, "(1)" + line 261, "pan.___", state 1339, "(1)" + line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1407, "(1)" + line 253, "pan.___", state 1415, "(1)" + line 257, "pan.___", state 1427, "(1)" + line 261, "pan.___", state 1435, "(1)" + line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1517, "(1)" + line 253, "pan.___", state 1525, "(1)" + line 257, "pan.___", state 1537, "(1)" + line 261, "pan.___", state 1545, "(1)" + line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1628, "(1)" + line 253, "pan.___", state 1636, "(1)" + line 257, "pan.___", state 1648, "(1)" + line 261, "pan.___", state 1656, "(1)" + line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1742, "(1)" + line 257, "pan.___", state 1762, "(1)" + line 261, "pan.___", state 1770, "(1)" + line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1860, "(1)" + line 257, "pan.___", state 1880, "(1)" + line 261, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1971, "(1)" + line 257, "pan.___", state 1991, "(1)" + line 261, "pan.___", state 1999, "(1)" + line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2022, "(1)" + line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2023, "else" + line 411, "pan.___", state 2026, "(1)" + line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2036, "(1)" + line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2037, "else" + line 415, "pan.___", state 2040, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 413, "pan.___", state 2046, "((i<1))" + line 413, "pan.___", state 2046, "((i>=1))" + line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2054, "(1)" + line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2055, "else" + line 420, "pan.___", state 2058, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2068, "(1)" + line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2069, "else" + line 424, "pan.___", state 2072, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 422, "pan.___", state 2078, "((i<2))" + line 422, "pan.___", state 2078, "((i>=2))" + line 249, "pan.___", state 2084, "(1)" + line 253, "pan.___", state 2092, "(1)" + line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2093, "else" + line 251, "pan.___", state 2098, "((i<1))" + line 251, "pan.___", state 2098, "((i>=1))" + line 257, "pan.___", state 2104, "(1)" + line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2105, "else" + line 261, "pan.___", state 2112, "(1)" + line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2113, "else" + line 259, "pan.___", state 2118, "((i<2))" + line 259, "pan.___", state 2118, "((i>=2))" + line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2122, "else" + line 431, "pan.___", state 2124, "(1)" + line 431, "pan.___", state 2124, "(1)" + line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2129, "(1)" + line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2180, "(1)" + line 253, "pan.___", state 2188, "(1)" + line 257, "pan.___", state 2200, "(1)" + line 261, "pan.___", state 2208, "(1)" + line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2290, "(1)" + line 253, "pan.___", state 2298, "(1)" + line 257, "pan.___", state 2310, "(1)" + line 261, "pan.___", state 2318, "(1)" + line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2387, "(1)" + line 253, "pan.___", state 2395, "(1)" + line 257, "pan.___", state 2407, "(1)" + line 261, "pan.___", state 2415, "(1)" + line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2497, "(1)" + line 253, "pan.___", state 2505, "(1)" + line 257, "pan.___", state 2517, "(1)" + line 261, "pan.___", state 2525, "(1)" + line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2608, "(1)" + line 253, "pan.___", state 2616, "(1)" + line 257, "pan.___", state 2628, "(1)" + line 261, "pan.___", state 2636, "(1)" + line 249, "pan.___", state 2667, "(1)" + line 257, "pan.___", state 2687, "(1)" + line 261, "pan.___", state 2695, "(1)" + line 249, "pan.___", state 2710, "(1)" + line 253, "pan.___", state 2718, "(1)" + line 257, "pan.___", state 2730, "(1)" + line 261, "pan.___", state 2738, "(1)" + line 898, "pan.___", state 2755, "-end-" + (259 of 2755 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 22, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 36, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 54, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 86, "(1)" + line 253, "pan.___", state 94, "(1)" + line 257, "pan.___", state 106, "(1)" + line 272, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 144, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 157, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 211, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 229, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 243, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 261, "(1)" + line 253, "pan.___", state 269, "(1)" + line 257, "pan.___", state 281, "(1)" + line 261, "pan.___", state 289, "(1)" + line 415, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 342, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 356, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 382, "(1)" + line 257, "pan.___", state 394, "(1)" + line 261, "pan.___", state 402, "(1)" + line 411, "pan.___", state 430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 444, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 462, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 476, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 494, "(1)" + line 253, "pan.___", state 502, "(1)" + line 257, "pan.___", state 514, "(1)" + line 261, "pan.___", state 522, "(1)" + line 411, "pan.___", state 541, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 543, "(1)" + line 411, "pan.___", state 544, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 544, "else" + line 411, "pan.___", state 547, "(1)" + line 415, "pan.___", state 555, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 557, "(1)" + line 415, "pan.___", state 558, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 558, "else" + line 415, "pan.___", state 561, "(1)" + line 415, "pan.___", state 562, "(1)" + line 415, "pan.___", state 562, "(1)" + line 413, "pan.___", state 567, "((i<1))" + line 413, "pan.___", state 567, "((i>=1))" + line 420, "pan.___", state 573, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 575, "(1)" + line 420, "pan.___", state 576, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 576, "else" + line 420, "pan.___", state 579, "(1)" + line 420, "pan.___", state 580, "(1)" + line 420, "pan.___", state 580, "(1)" + line 424, "pan.___", state 587, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 589, "(1)" + line 424, "pan.___", state 590, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 590, "else" + line 424, "pan.___", state 593, "(1)" + line 424, "pan.___", state 594, "(1)" + line 424, "pan.___", state 594, "(1)" + line 422, "pan.___", state 599, "((i<2))" + line 422, "pan.___", state 599, "((i>=2))" + line 249, "pan.___", state 605, "(1)" + line 253, "pan.___", state 613, "(1)" + line 253, "pan.___", state 614, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 614, "else" + line 251, "pan.___", state 619, "((i<1))" + line 251, "pan.___", state 619, "((i>=1))" + line 257, "pan.___", state 625, "(1)" + line 257, "pan.___", state 626, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 626, "else" + line 261, "pan.___", state 633, "(1)" + line 261, "pan.___", state 634, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 634, "else" + line 259, "pan.___", state 639, "((i<2))" + line 259, "pan.___", state 639, "((i>=2))" + line 266, "pan.___", state 643, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 643, "else" + line 431, "pan.___", state 645, "(1)" + line 431, "pan.___", state 645, "(1)" + line 1117, "pan.___", state 649, "_proc_urcu_writer = (_proc_urcu_writer|(1<<10))" + line 411, "pan.___", state 654, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 656, "(1)" + line 411, "pan.___", state 657, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 657, "else" + line 411, "pan.___", state 660, "(1)" + line 415, "pan.___", state 668, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 670, "(1)" + line 415, "pan.___", state 671, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 671, "else" + line 415, "pan.___", state 674, "(1)" + line 415, "pan.___", state 675, "(1)" + line 415, "pan.___", state 675, "(1)" + line 413, "pan.___", state 680, "((i<1))" + line 413, "pan.___", state 680, "((i>=1))" + line 420, "pan.___", state 686, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 688, "(1)" + line 420, "pan.___", state 689, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 689, "else" + line 420, "pan.___", state 692, "(1)" + line 420, "pan.___", state 693, "(1)" + line 420, "pan.___", state 693, "(1)" + line 424, "pan.___", state 700, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 702, "(1)" + line 424, "pan.___", state 703, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 703, "else" + line 424, "pan.___", state 706, "(1)" + line 424, "pan.___", state 707, "(1)" + line 424, "pan.___", state 707, "(1)" + line 422, "pan.___", state 712, "((i<2))" + line 422, "pan.___", state 712, "((i>=2))" + line 249, "pan.___", state 718, "(1)" + line 253, "pan.___", state 726, "(1)" + line 253, "pan.___", state 727, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 727, "else" + line 251, "pan.___", state 732, "((i<1))" + line 251, "pan.___", state 732, "((i>=1))" + line 257, "pan.___", state 738, "(1)" + line 257, "pan.___", state 739, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 739, "else" + line 261, "pan.___", state 746, "(1)" + line 261, "pan.___", state 747, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 747, "else" + line 259, "pan.___", state 752, "((i<2))" + line 259, "pan.___", state 752, "((i>=2))" + line 266, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 756, "else" + line 431, "pan.___", state 758, "(1)" + line 431, "pan.___", state 758, "(1)" + line 1133, "pan.___", state 763, "_proc_urcu_writer = (_proc_urcu_writer|(1<<11))" + line 1128, "pan.___", state 764, "(((tmp2&((1<<7)-1))&&((tmp2^0)&(1<<7))))" + line 1128, "pan.___", state 764, "else" + line 1153, "pan.___", state 768, "_proc_urcu_writer = (_proc_urcu_writer&~(((1<<12)|(1<<11))))" + line 272, "pan.___", state 799, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 823, "(1)" + line 284, "pan.___", state 830, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 846, "(1)" + line 253, "pan.___", state 854, "(1)" + line 257, "pan.___", state 866, "(1)" + line 261, "pan.___", state 874, "(1)" + line 276, "pan.___", state 899, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 912, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 921, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 937, "(1)" + line 253, "pan.___", state 945, "(1)" + line 257, "pan.___", state 957, "(1)" + line 261, "pan.___", state 965, "(1)" + line 272, "pan.___", state 981, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 272, "pan.___", state 983, "(1)" + line 276, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 992, "(1)" + line 276, "pan.___", state 993, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 276, "pan.___", state 993, "else" + line 274, "pan.___", state 998, "((i<1))" + line 274, "pan.___", state 998, "((i>=1))" + line 280, "pan.___", state 1003, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1005, "(1)" + line 280, "pan.___", state 1006, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 280, "pan.___", state 1006, "else" + line 284, "pan.___", state 1012, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1014, "(1)" + line 284, "pan.___", state 1015, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 284, "pan.___", state 1015, "else" + line 282, "pan.___", state 1020, "((i<2))" + line 282, "pan.___", state 1020, "((i>=2))" + line 249, "pan.___", state 1028, "(1)" + line 253, "pan.___", state 1036, "(1)" + line 253, "pan.___", state 1037, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 1037, "else" + line 251, "pan.___", state 1042, "((i<1))" + line 251, "pan.___", state 1042, "((i>=1))" + line 257, "pan.___", state 1048, "(1)" + line 257, "pan.___", state 1049, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 1049, "else" + line 261, "pan.___", state 1056, "(1)" + line 261, "pan.___", state 1057, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 1057, "else" + line 266, "pan.___", state 1066, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 1066, "else" + line 299, "pan.___", state 1068, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 299, "pan.___", state 1068, "else" + line 276, "pan.___", state 1081, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1094, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1103, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1119, "(1)" + line 253, "pan.___", state 1127, "(1)" + line 257, "pan.___", state 1139, "(1)" + line 261, "pan.___", state 1147, "(1)" + line 1237, "pan.___", state 1162, "-end-" + (145 of 1162 states) +unreached in proctype :init: + line 1248, "pan.___", state 9, "((j<2))" + line 1248, "pan.___", state 9, "((j>=2))" + line 1249, "pan.___", state 20, "((j<2))" + line 1249, "pan.___", state 20, "((j>=2))" + line 1254, "pan.___", state 33, "((j<2))" + line 1254, "pan.___", state 33, "((j>=2))" + line 1252, "pan.___", state 43, "((i<1))" + line 1252, "pan.___", state 43, "((i>=1))" + line 1262, "pan.___", state 54, "((j<2))" + line 1262, "pan.___", state 54, "((j>=2))" + line 1266, "pan.___", state 67, "((j<2))" + line 1266, "pan.___", state 67, "((j>=2))" + (6 of 78 states) +unreached in proctype :never: + line 1300, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 86.8 seconds +pan: rate 19690.388 states/second +pan: avg transition delay 2.7571e-06 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..e7189ef --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input @@ -0,0 +1,1273 @@ +#define SINGLE_FLIP + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input.trail b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..6eb297f --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1062 @@ +-2:3:-2 +-4:-4:-4 +1:0:3997 +2:3:3917 +3:3:3920 +4:3:3920 +5:3:3923 +6:3:3931 +7:3:3931 +8:3:3934 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+1033:2:3659 +1034:2:3667 +1035:2:3668 +1036:2:3672 +1037:2:3676 +1038:2:3677 +1039:2:3672 +1040:2:3676 +1041:2:3677 +1042:2:3681 +1043:2:3688 +1044:2:3695 +1045:2:3696 +1046:2:3703 +1047:2:3708 +1048:2:3715 +1049:2:3716 +1050:2:3715 +1051:2:3716 +1052:2:3723 +1053:2:3727 +1054:0:3997 +1055:1:1129 +1056:1:1130 +1057:0:3995 +1058:1:11 +1059:0:4001 +1060:1:1715 diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress.ltl b/urcu-controldataflow-intel-no-ipi/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.define b/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.log b/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.log new file mode 100644 index 0000000..c286056 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.log @@ -0,0 +1,462 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +depth 23: Claim reached state 9 (line 1300) +depth 1053: Claim reached state 9 (line 1299) +Depth= 6090 States= 1e+06 Transitions= 2.22e+07 Memory= 510.295 t= 64.5 R= 2e+04 +Depth= 6090 States= 2e+06 Transitions= 5.32e+07 Memory= 552.776 t= 157 R= 1e+04 +Depth= 6090 States= 3e+06 Transitions= 8.56e+07 Memory= 597.014 t= 253 R= 1e+04 +pan: resizing hashtable to -w22.. done +Depth= 6090 States= 4e+06 Transitions= 1.18e+08 Memory= 672.764 t= 351 R= 1e+04 +Depth= 6090 States= 5e+06 Transitions= 1.49e+08 Memory= 716.416 t= 443 R= 1e+04 +Depth= 6090 States= 6e+06 Transitions= 1.79e+08 Memory= 760.459 t= 531 R= 1e+04 +Depth= 6090 States= 7e+06 Transitions= 2.11e+08 Memory= 804.990 t= 627 R= 1e+04 +Depth= 6090 States= 8e+06 Transitions= 2.44e+08 Memory= 848.057 t= 727 R= 1e+04 +Depth= 6090 States= 9e+06 Transitions= 2.77e+08 Memory= 891.807 t= 827 R= 1e+04 +pan: resizing hashtable to -w24.. done +Depth= 6090 States= 1e+07 Transitions= 3.11e+08 Memory= 1062.385 t= 928 R= 1e+04 +Depth= 6090 States= 1.1e+07 Transitions= 3.41e+08 Memory= 1105.744 t= 1.02e+03 R= 1e+04 +Depth= 6090 States= 1.2e+07 Transitions= 3.7e+08 Memory= 1151.252 t= 1.1e+03 R= 1e+04 +Depth= 6090 States= 1.3e+07 Transitions= 4.06e+08 Memory= 1193.635 t= 1.21e+03 R= 1e+04 +Depth= 6090 States= 1.4e+07 Transitions= 4.4e+08 Memory= 1236.506 t= 1.31e+03 R= 1e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 6090, errors: 0 + 7774591 states, stored (1.48046e+07 visited) +4.51403e+08 states, matched +4.6620756e+08 transitions (= visited+matched) +7.4729019e+09 atomic steps +hash conflicts: 1.6384912e+08 (resolved) + +Stats on memory usage (in Megabytes): + 860.074 equivalent memory usage for states (stored*(State-vector + overhead)) + 689.043 actual memory usage for states (compression: 80.11%) + state-vector as stored = 65 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1274.299 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 81, "(1)" + line 257, "pan.___", state 101, "(1)" + line 261, "pan.___", state 109, "(1)" + line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 199, "(1)" + line 257, "pan.___", state 219, "(1)" + line 261, "pan.___", state 227, "(1)" + line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 310, "(1)" + line 257, "pan.___", state 330, "(1)" + line 261, "pan.___", state 338, "(1)" + line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 361, "(1)" + line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 362, "else" + line 411, "pan.___", state 365, "(1)" + line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 375, "(1)" + line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 376, "else" + line 415, "pan.___", state 379, "(1)" + line 415, "pan.___", state 380, "(1)" + line 415, "pan.___", state 380, "(1)" + line 413, "pan.___", state 385, "((i<1))" + line 413, "pan.___", state 385, "((i>=1))" + line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 393, "(1)" + line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 394, "else" + line 420, "pan.___", state 397, "(1)" + line 420, "pan.___", state 398, "(1)" + line 420, "pan.___", state 398, "(1)" + line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 407, "(1)" + line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 408, "else" + line 424, "pan.___", state 411, "(1)" + line 424, "pan.___", state 412, "(1)" + line 424, "pan.___", state 412, "(1)" + line 422, "pan.___", state 417, "((i<2))" + line 422, "pan.___", state 417, "((i>=2))" + line 249, "pan.___", state 423, "(1)" + line 253, "pan.___", state 431, "(1)" + line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 432, "else" + line 251, "pan.___", state 437, "((i<1))" + line 251, "pan.___", state 437, "((i>=1))" + line 257, "pan.___", state 443, "(1)" + line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 444, "else" + line 261, "pan.___", state 451, "(1)" + line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 452, "else" + line 259, "pan.___", state 457, "((i<2))" + line 259, "pan.___", state 457, "((i>=2))" + line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 461, "else" + line 431, "pan.___", state 463, "(1)" + line 431, "pan.___", state 463, "(1)" + line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 468, "(1)" + line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 483, "(1)" + line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 519, "(1)" + line 253, "pan.___", state 527, "(1)" + line 257, "pan.___", state 539, "(1)" + line 261, "pan.___", state 547, "(1)" + line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 629, "(1)" + line 253, "pan.___", state 637, "(1)" + line 257, "pan.___", state 649, "(1)" + line 261, "pan.___", state 657, "(1)" + line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 747, "(1)" + line 257, "pan.___", state 767, "(1)" + line 261, "pan.___", state 775, "(1)" + line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 796, "(1)" + line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 797, "else" + line 411, "pan.___", state 800, "(1)" + line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 810, "(1)" + line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 811, "else" + line 415, "pan.___", state 814, "(1)" + line 415, "pan.___", state 815, "(1)" + line 415, "pan.___", state 815, "(1)" + line 413, "pan.___", state 820, "((i<1))" + line 413, "pan.___", state 820, "((i>=1))" + line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 828, "(1)" + line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 829, "else" + line 420, "pan.___", state 832, "(1)" + line 420, "pan.___", state 833, "(1)" + line 420, "pan.___", state 833, "(1)" + line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 842, "(1)" + line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 843, "else" + line 424, "pan.___", state 846, "(1)" + line 424, "pan.___", state 847, "(1)" + line 424, "pan.___", state 847, "(1)" + line 422, "pan.___", state 852, "((i<2))" + line 422, "pan.___", state 852, "((i>=2))" + line 249, "pan.___", state 858, "(1)" + line 253, "pan.___", state 866, "(1)" + line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 867, "else" + line 251, "pan.___", state 872, "((i<1))" + line 251, "pan.___", state 872, "((i>=1))" + line 257, "pan.___", state 878, "(1)" + line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 879, "else" + line 261, "pan.___", state 886, "(1)" + line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 887, "else" + line 259, "pan.___", state 892, "((i<2))" + line 259, "pan.___", state 892, "((i>=2))" + line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 896, "else" + line 431, "pan.___", state 898, "(1)" + line 431, "pan.___", state 898, "(1)" + line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 971, "(1)" + line 253, "pan.___", state 979, "(1)" + line 257, "pan.___", state 991, "(1)" + line 261, "pan.___", state 999, "(1)" + line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1085, "(1)" + line 257, "pan.___", state 1105, "(1)" + line 261, "pan.___", state 1113, "(1)" + line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1200, "(1)" + line 257, "pan.___", state 1220, "(1)" + line 261, "pan.___", state 1228, "(1)" + line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1311, "(1)" + line 257, "pan.___", state 1331, "(1)" + line 261, "pan.___", state 1339, "(1)" + line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1407, "(1)" + line 253, "pan.___", state 1415, "(1)" + line 257, "pan.___", state 1427, "(1)" + line 261, "pan.___", state 1435, "(1)" + line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1517, "(1)" + line 253, "pan.___", state 1525, "(1)" + line 257, "pan.___", state 1537, "(1)" + line 261, "pan.___", state 1545, "(1)" + line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1628, "(1)" + line 253, "pan.___", state 1636, "(1)" + line 257, "pan.___", state 1648, "(1)" + line 261, "pan.___", state 1656, "(1)" + line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1742, "(1)" + line 257, "pan.___", state 1762, "(1)" + line 261, "pan.___", state 1770, "(1)" + line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1860, "(1)" + line 257, "pan.___", state 1880, "(1)" + line 261, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1971, "(1)" + line 257, "pan.___", state 1991, "(1)" + line 261, "pan.___", state 1999, "(1)" + line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2022, "(1)" + line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2023, "else" + line 411, "pan.___", state 2026, "(1)" + line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2036, "(1)" + line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2037, "else" + line 415, "pan.___", state 2040, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 413, "pan.___", state 2046, "((i<1))" + line 413, "pan.___", state 2046, "((i>=1))" + line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2054, "(1)" + line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2055, "else" + line 420, "pan.___", state 2058, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2068, "(1)" + line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2069, "else" + line 424, "pan.___", state 2072, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 422, "pan.___", state 2078, "((i<2))" + line 422, "pan.___", state 2078, "((i>=2))" + line 249, "pan.___", state 2084, "(1)" + line 253, "pan.___", state 2092, "(1)" + line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2093, "else" + line 251, "pan.___", state 2098, "((i<1))" + line 251, "pan.___", state 2098, "((i>=1))" + line 257, "pan.___", state 2104, "(1)" + line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2105, "else" + line 261, "pan.___", state 2112, "(1)" + line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2113, "else" + line 259, "pan.___", state 2118, "((i<2))" + line 259, "pan.___", state 2118, "((i>=2))" + line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2122, "else" + line 431, "pan.___", state 2124, "(1)" + line 431, "pan.___", state 2124, "(1)" + line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2129, "(1)" + line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2180, "(1)" + line 253, "pan.___", state 2188, "(1)" + line 257, "pan.___", state 2200, "(1)" + line 261, "pan.___", state 2208, "(1)" + line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2290, "(1)" + line 253, "pan.___", state 2298, "(1)" + line 257, "pan.___", state 2310, "(1)" + line 261, "pan.___", state 2318, "(1)" + line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2387, "(1)" + line 253, "pan.___", state 2395, "(1)" + line 257, "pan.___", state 2407, "(1)" + line 261, "pan.___", state 2415, "(1)" + line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2497, "(1)" + line 253, "pan.___", state 2505, "(1)" + line 257, "pan.___", state 2517, "(1)" + line 261, "pan.___", state 2525, "(1)" + line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2608, "(1)" + line 253, "pan.___", state 2616, "(1)" + line 257, "pan.___", state 2628, "(1)" + line 261, "pan.___", state 2636, "(1)" + line 249, "pan.___", state 2667, "(1)" + line 257, "pan.___", state 2687, "(1)" + line 261, "pan.___", state 2695, "(1)" + line 249, "pan.___", state 2710, "(1)" + line 253, "pan.___", state 2718, "(1)" + line 257, "pan.___", state 2730, "(1)" + line 261, "pan.___", state 2738, "(1)" + line 898, "pan.___", state 2755, "-end-" + (259 of 2755 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 82, "(1)" + line 253, "pan.___", state 90, "(1)" + line 257, "pan.___", state 102, "(1)" + line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 257, "(1)" + line 253, "pan.___", state 265, "(1)" + line 257, "pan.___", state 277, "(1)" + line 261, "pan.___", state 285, "(1)" + line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 378, "(1)" + line 257, "pan.___", state 390, "(1)" + line 261, "pan.___", state 398, "(1)" + line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 499, "(1)" + line 257, "pan.___", state 511, "(1)" + line 261, "pan.___", state 519, "(1)" + line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 610, "(1)" + line 257, "pan.___", state 622, "(1)" + line 261, "pan.___", state 630, "(1)" + line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 723, "(1)" + line 257, "pan.___", state 735, "(1)" + line 261, "pan.___", state 743, "(1)" + line 272, "pan.___", state 791, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 800, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 813, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 838, "(1)" + line 253, "pan.___", state 846, "(1)" + line 257, "pan.___", state 858, "(1)" + line 261, "pan.___", state 866, "(1)" + line 272, "pan.___", state 886, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 895, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 910, "(1)" + line 284, "pan.___", state 917, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 933, "(1)" + line 253, "pan.___", state 941, "(1)" + line 257, "pan.___", state 953, "(1)" + line 261, "pan.___", state 961, "(1)" + line 276, "pan.___", state 986, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 999, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1008, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1024, "(1)" + line 253, "pan.___", state 1032, "(1)" + line 257, "pan.___", state 1044, "(1)" + line 261, "pan.___", state 1052, "(1)" + line 276, "pan.___", state 1077, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1090, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1099, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1115, "(1)" + line 253, "pan.___", state 1123, "(1)" + line 257, "pan.___", state 1135, "(1)" + line 261, "pan.___", state 1143, "(1)" + line 276, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1181, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1190, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1206, "(1)" + line 253, "pan.___", state 1214, "(1)" + line 257, "pan.___", state 1226, "(1)" + line 261, "pan.___", state 1234, "(1)" + line 1237, "pan.___", state 1249, "-end-" + (78 of 1249 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1302, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 1.39e+03 seconds +pan: rate 10656.973 states/second +pan: avg transition delay 2.9798e-06 usec +cp .input.spin urcu_progress_reader.spin.input +cp .input.spin.trail urcu_progress_reader.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.spin.input new file mode 100644 index 0000000..7cbeb11 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_reader.spin.input @@ -0,0 +1,1273 @@ +#define READER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.define b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.log b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.log new file mode 100644 index 0000000..065cb84 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.log @@ -0,0 +1,455 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1295) +depth 23: Claim reached state 9 (line 1300) +depth 1404: Claim reached state 9 (line 1299) +Depth= 4122 States= 1e+06 Transitions= 2.18e+07 Memory= 494.377 t= 63.1 R= 2e+04 +Depth= 4237 States= 2e+06 Transitions= 4.19e+07 Memory= 522.209 t= 122 R= 2e+04 +Depth= 4557 States= 3e+06 Transitions= 6.67e+07 Memory= 550.139 t= 195 R= 2e+04 +pan: resizing hashtable to -w22.. done +Depth= 4762 States= 4e+06 Transitions= 9.06e+07 Memory= 609.190 t= 264 R= 2e+04 +Depth= 4793 States= 5e+06 Transitions= 1.25e+08 Memory= 666.709 t= 366 R= 1e+04 +Depth= 4793 States= 6e+06 Transitions= 1.62e+08 Memory= 713.877 t= 473 R= 1e+04 +Depth= 4980 States= 7e+06 Transitions= 1.97e+08 Memory= 760.752 t= 578 R= 1e+04 +Depth= 4980 States= 8e+06 Transitions= 2.29e+08 Memory= 809.190 t= 674 R= 1e+04 +Depth= 4980 States= 9e+06 Transitions= 2.66e+08 Memory= 862.803 t= 784 R= 1e+04 +pan: resizing hashtable to -w24.. done +Depth= 4980 States= 1e+07 Transitions= 2.98e+08 Memory= 1029.377 t= 880 R= 1e+04 +Depth= 4980 States= 1.1e+07 Transitions= 3.34e+08 Memory= 1080.061 t= 987 R= 1e+04 +Depth= 4980 States= 1.2e+07 Transitions= 3.69e+08 Memory= 1129.279 t= 1.09e+03 R= 1e+04 +Depth= 4980 States= 1.3e+07 Transitions= 4.01e+08 Memory= 1177.912 t= 1.18e+03 R= 1e+04 +Depth= 4980 States= 1.4e+07 Transitions= 4.4e+08 Memory= 1226.447 t= 1.3e+03 R= 1e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 4980, errors: 0 + 7808338 states, stored (1.48869e+07 visited) +4.5734827e+08 states, matched +4.7223515e+08 transitions (= visited+matched) +7.5648218e+09 atomic steps +hash conflicts: 1.2909926e+08 (resolved) + +Stats on memory usage (in Megabytes): + 863.807 equivalent memory usage for states (stored*(State-vector + overhead)) + 691.866 actual memory usage for states (compression: 80.09%) + state-vector as stored = 65 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1277.131 total actual memory usage + +unreached in proctype urcu_reader + line 411, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 81, "(1)" + line 257, "pan.___", state 101, "(1)" + line 261, "pan.___", state 109, "(1)" + line 597, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 411, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 199, "(1)" + line 257, "pan.___", state 219, "(1)" + line 261, "pan.___", state 227, "(1)" + line 411, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 310, "(1)" + line 257, "pan.___", state 330, "(1)" + line 261, "pan.___", state 338, "(1)" + line 411, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 361, "(1)" + line 411, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 362, "else" + line 411, "pan.___", state 365, "(1)" + line 415, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 375, "(1)" + line 415, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 376, "else" + line 415, "pan.___", state 379, "(1)" + line 415, "pan.___", state 380, "(1)" + line 415, "pan.___", state 380, "(1)" + line 413, "pan.___", state 385, "((i<1))" + line 413, "pan.___", state 385, "((i>=1))" + line 420, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 393, "(1)" + line 420, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 394, "else" + line 420, "pan.___", state 397, "(1)" + line 420, "pan.___", state 398, "(1)" + line 420, "pan.___", state 398, "(1)" + line 424, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 407, "(1)" + line 424, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 408, "else" + line 424, "pan.___", state 411, "(1)" + line 424, "pan.___", state 412, "(1)" + line 424, "pan.___", state 412, "(1)" + line 422, "pan.___", state 417, "((i<2))" + line 422, "pan.___", state 417, "((i>=2))" + line 249, "pan.___", state 423, "(1)" + line 253, "pan.___", state 431, "(1)" + line 253, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 432, "else" + line 251, "pan.___", state 437, "((i<1))" + line 251, "pan.___", state 437, "((i>=1))" + line 257, "pan.___", state 443, "(1)" + line 257, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 444, "else" + line 261, "pan.___", state 451, "(1)" + line 261, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 452, "else" + line 259, "pan.___", state 457, "((i<2))" + line 259, "pan.___", state 457, "((i>=2))" + line 266, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 461, "else" + line 431, "pan.___", state 463, "(1)" + line 431, "pan.___", state 463, "(1)" + line 597, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 597, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 597, "pan.___", state 468, "(1)" + line 272, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 483, "(1)" + line 280, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 519, "(1)" + line 253, "pan.___", state 527, "(1)" + line 257, "pan.___", state 539, "(1)" + line 261, "pan.___", state 547, "(1)" + line 411, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 629, "(1)" + line 253, "pan.___", state 637, "(1)" + line 257, "pan.___", state 649, "(1)" + line 261, "pan.___", state 657, "(1)" + line 411, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 747, "(1)" + line 257, "pan.___", state 767, "(1)" + line 261, "pan.___", state 775, "(1)" + line 411, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 796, "(1)" + line 411, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 797, "else" + line 411, "pan.___", state 800, "(1)" + line 415, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 810, "(1)" + line 415, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 811, "else" + line 415, "pan.___", state 814, "(1)" + line 415, "pan.___", state 815, "(1)" + line 415, "pan.___", state 815, "(1)" + line 413, "pan.___", state 820, "((i<1))" + line 413, "pan.___", state 820, "((i>=1))" + line 420, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 828, "(1)" + line 420, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 829, "else" + line 420, "pan.___", state 832, "(1)" + line 420, "pan.___", state 833, "(1)" + line 420, "pan.___", state 833, "(1)" + line 424, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 842, "(1)" + line 424, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 843, "else" + line 424, "pan.___", state 846, "(1)" + line 424, "pan.___", state 847, "(1)" + line 424, "pan.___", state 847, "(1)" + line 422, "pan.___", state 852, "((i<2))" + line 422, "pan.___", state 852, "((i>=2))" + line 249, "pan.___", state 858, "(1)" + line 253, "pan.___", state 866, "(1)" + line 253, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 867, "else" + line 251, "pan.___", state 872, "((i<1))" + line 251, "pan.___", state 872, "((i>=1))" + line 257, "pan.___", state 878, "(1)" + line 257, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 879, "else" + line 261, "pan.___", state 886, "(1)" + line 261, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 887, "else" + line 259, "pan.___", state 892, "((i<2))" + line 259, "pan.___", state 892, "((i>=2))" + line 266, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 896, "else" + line 431, "pan.___", state 898, "(1)" + line 431, "pan.___", state 898, "(1)" + line 605, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 411, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 971, "(1)" + line 253, "pan.___", state 979, "(1)" + line 257, "pan.___", state 991, "(1)" + line 261, "pan.___", state 999, "(1)" + line 411, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1085, "(1)" + line 257, "pan.___", state 1105, "(1)" + line 261, "pan.___", state 1113, "(1)" + line 411, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1200, "(1)" + line 257, "pan.___", state 1220, "(1)" + line 261, "pan.___", state 1228, "(1)" + line 411, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1311, "(1)" + line 257, "pan.___", state 1331, "(1)" + line 261, "pan.___", state 1339, "(1)" + line 272, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1407, "(1)" + line 253, "pan.___", state 1415, "(1)" + line 257, "pan.___", state 1427, "(1)" + line 261, "pan.___", state 1435, "(1)" + line 411, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1517, "(1)" + line 253, "pan.___", state 1525, "(1)" + line 257, "pan.___", state 1537, "(1)" + line 261, "pan.___", state 1545, "(1)" + line 411, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1628, "(1)" + line 253, "pan.___", state 1636, "(1)" + line 257, "pan.___", state 1648, "(1)" + line 261, "pan.___", state 1656, "(1)" + line 411, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1742, "(1)" + line 257, "pan.___", state 1762, "(1)" + line 261, "pan.___", state 1770, "(1)" + line 644, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 411, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1860, "(1)" + line 257, "pan.___", state 1880, "(1)" + line 261, "pan.___", state 1888, "(1)" + line 411, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1971, "(1)" + line 257, "pan.___", state 1991, "(1)" + line 261, "pan.___", state 1999, "(1)" + line 411, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 2022, "(1)" + line 411, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 411, "pan.___", state 2023, "else" + line 411, "pan.___", state 2026, "(1)" + line 415, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2036, "(1)" + line 415, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 415, "pan.___", state 2037, "else" + line 415, "pan.___", state 2040, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 415, "pan.___", state 2041, "(1)" + line 413, "pan.___", state 2046, "((i<1))" + line 413, "pan.___", state 2046, "((i>=1))" + line 420, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2054, "(1)" + line 420, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 420, "pan.___", state 2055, "else" + line 420, "pan.___", state 2058, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 420, "pan.___", state 2059, "(1)" + line 424, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2068, "(1)" + line 424, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 424, "pan.___", state 2069, "else" + line 424, "pan.___", state 2072, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 424, "pan.___", state 2073, "(1)" + line 422, "pan.___", state 2078, "((i<2))" + line 422, "pan.___", state 2078, "((i>=2))" + line 249, "pan.___", state 2084, "(1)" + line 253, "pan.___", state 2092, "(1)" + line 253, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 253, "pan.___", state 2093, "else" + line 251, "pan.___", state 2098, "((i<1))" + line 251, "pan.___", state 2098, "((i>=1))" + line 257, "pan.___", state 2104, "(1)" + line 257, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 257, "pan.___", state 2105, "else" + line 261, "pan.___", state 2112, "(1)" + line 261, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 261, "pan.___", state 2113, "else" + line 259, "pan.___", state 2118, "((i<2))" + line 259, "pan.___", state 2118, "((i>=2))" + line 266, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 266, "pan.___", state 2122, "else" + line 431, "pan.___", state 2124, "(1)" + line 431, "pan.___", state 2124, "(1)" + line 644, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 644, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 644, "pan.___", state 2129, "(1)" + line 272, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2180, "(1)" + line 253, "pan.___", state 2188, "(1)" + line 257, "pan.___", state 2200, "(1)" + line 261, "pan.___", state 2208, "(1)" + line 411, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2290, "(1)" + line 253, "pan.___", state 2298, "(1)" + line 257, "pan.___", state 2310, "(1)" + line 261, "pan.___", state 2318, "(1)" + line 272, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2387, "(1)" + line 253, "pan.___", state 2395, "(1)" + line 257, "pan.___", state 2407, "(1)" + line 261, "pan.___", state 2415, "(1)" + line 411, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2497, "(1)" + line 253, "pan.___", state 2505, "(1)" + line 257, "pan.___", state 2517, "(1)" + line 261, "pan.___", state 2525, "(1)" + line 411, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 2608, "(1)" + line 253, "pan.___", state 2616, "(1)" + line 257, "pan.___", state 2628, "(1)" + line 261, "pan.___", state 2636, "(1)" + line 249, "pan.___", state 2667, "(1)" + line 257, "pan.___", state 2687, "(1)" + line 261, "pan.___", state 2695, "(1)" + line 249, "pan.___", state 2710, "(1)" + line 253, "pan.___", state 2718, "(1)" + line 257, "pan.___", state 2730, "(1)" + line 261, "pan.___", state 2738, "(1)" + line 898, "pan.___", state 2755, "-end-" + (259 of 2755 states) +unreached in proctype urcu_writer + line 411, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 249, "pan.___", state 82, "(1)" + line 253, "pan.___", state 90, "(1)" + line 257, "pan.___", state 102, "(1)" + line 272, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 411, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 415, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 257, "(1)" + line 253, "pan.___", state 265, "(1)" + line 257, "pan.___", state 277, "(1)" + line 261, "pan.___", state 285, "(1)" + line 415, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 378, "(1)" + line 257, "pan.___", state 390, "(1)" + line 261, "pan.___", state 398, "(1)" + line 415, "pan.___", state 441, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 459, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 473, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 499, "(1)" + line 257, "pan.___", state 511, "(1)" + line 261, "pan.___", state 519, "(1)" + line 415, "pan.___", state 552, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 570, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 584, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 610, "(1)" + line 257, "pan.___", state 622, "(1)" + line 261, "pan.___", state 630, "(1)" + line 415, "pan.___", state 665, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 420, "pan.___", state 683, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 424, "pan.___", state 697, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 253, "pan.___", state 723, "(1)" + line 257, "pan.___", state 735, "(1)" + line 261, "pan.___", state 743, "(1)" + line 272, "pan.___", state 796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 276, "pan.___", state 805, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 820, "(1)" + line 284, "pan.___", state 827, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 843, "(1)" + line 253, "pan.___", state 851, "(1)" + line 257, "pan.___", state 863, "(1)" + line 261, "pan.___", state 871, "(1)" + line 276, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 909, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 918, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 934, "(1)" + line 253, "pan.___", state 942, "(1)" + line 257, "pan.___", state 954, "(1)" + line 261, "pan.___", state 962, "(1)" + line 276, "pan.___", state 987, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1000, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1009, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1025, "(1)" + line 253, "pan.___", state 1033, "(1)" + line 257, "pan.___", state 1045, "(1)" + line 261, "pan.___", state 1053, "(1)" + line 276, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 280, "pan.___", state 1091, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 284, "pan.___", state 1100, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 249, "pan.___", state 1116, "(1)" + line 253, "pan.___", state 1124, "(1)" + line 257, "pan.___", state 1136, "(1)" + line 261, "pan.___", state 1144, "(1)" + line 1237, "pan.___", state 1159, "-end-" + (71 of 1159 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1302, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 1.4e+03 seconds +pan: rate 10667.087 states/second +pan: avg transition delay 2.9553e-06 usec +cp .input.spin urcu_progress_writer.spin.input +cp .input.spin.trail urcu_progress_writer.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.spin.input new file mode 100644 index 0000000..323cc66 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer.spin.input @@ -0,0 +1,1273 @@ +#define WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.define b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.log b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.log new file mode 100644 index 0000000..43b08ac --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.log @@ -0,0 +1,647 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 1296) +depth 23: Claim reached state 9 (line 1301) +depth 1404: Claim reached state 9 (line 1300) +pan: acceptance cycle (at depth 1950) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 4997, errors: 1 + 64372 states, stored (197067 visited) + 2733089 states, matched + 2930156 transitions (= visited+matched) + 44244571 atomic steps +hash conflicts: 43483 (resolved) + +Stats on memory usage (in Megabytes): + 7.121 equivalent memory usage for states (stored*(State-vector + overhead)) + 6.154 actual memory usage for states (compression: 86.41%) + state-vector as stored = 72 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 471.818 total actual memory usage + +unreached in proctype urcu_reader + line 412, "pan.___", state 17, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 49, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 63, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 81, "(1)" + line 258, "pan.___", state 101, "(1)" + line 262, "pan.___", state 109, "(1)" + line 598, "pan.___", state 128, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<1))" + line 412, "pan.___", state 135, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 167, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 181, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 199, "(1)" + line 258, "pan.___", state 219, "(1)" + line 262, "pan.___", state 227, "(1)" + line 412, "pan.___", state 246, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 278, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 292, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 310, "(1)" + line 258, "pan.___", state 330, "(1)" + line 262, "pan.___", state 338, "(1)" + line 412, "pan.___", state 359, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 361, "(1)" + line 412, "pan.___", state 362, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 362, "else" + line 412, "pan.___", state 365, "(1)" + line 416, "pan.___", state 373, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 375, "(1)" + line 416, "pan.___", state 376, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 376, "else" + line 416, "pan.___", state 379, "(1)" + line 416, "pan.___", state 380, "(1)" + line 416, "pan.___", state 380, "(1)" + line 414, "pan.___", state 385, "((i<1))" + line 414, "pan.___", state 385, "((i>=1))" + line 421, "pan.___", state 391, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 393, "(1)" + line 421, "pan.___", state 394, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 394, "else" + line 421, "pan.___", state 397, "(1)" + line 421, "pan.___", state 398, "(1)" + line 421, "pan.___", state 398, "(1)" + line 425, "pan.___", state 405, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 407, "(1)" + line 425, "pan.___", state 408, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 408, "else" + line 425, "pan.___", state 411, "(1)" + line 425, "pan.___", state 412, "(1)" + line 425, "pan.___", state 412, "(1)" + line 423, "pan.___", state 417, "((i<2))" + line 423, "pan.___", state 417, "((i>=2))" + line 250, "pan.___", state 423, "(1)" + line 254, "pan.___", state 431, "(1)" + line 254, "pan.___", state 432, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 432, "else" + line 252, "pan.___", state 437, "((i<1))" + line 252, "pan.___", state 437, "((i>=1))" + line 258, "pan.___", state 443, "(1)" + line 258, "pan.___", state 444, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 444, "else" + line 262, "pan.___", state 451, "(1)" + line 262, "pan.___", state 452, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 452, "else" + line 260, "pan.___", state 457, "((i<2))" + line 260, "pan.___", state 457, "((i>=2))" + line 267, "pan.___", state 461, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 461, "else" + line 432, "pan.___", state 463, "(1)" + line 432, "pan.___", state 463, "(1)" + line 598, "pan.___", state 466, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 598, "pan.___", state 467, "_proc_urcu_reader = (_proc_urcu_reader|(1<<5))" + line 598, "pan.___", state 468, "(1)" + line 273, "pan.___", state 472, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 483, "(1)" + line 281, "pan.___", state 494, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 503, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 519, "(1)" + line 254, "pan.___", state 527, "(1)" + line 258, "pan.___", state 539, "(1)" + line 262, "pan.___", state 547, "(1)" + line 412, "pan.___", state 565, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 579, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 597, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 611, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 629, "(1)" + line 254, "pan.___", state 637, "(1)" + line 258, "pan.___", state 649, "(1)" + line 262, "pan.___", state 657, "(1)" + line 412, "pan.___", state 683, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 715, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 729, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 747, "(1)" + line 258, "pan.___", state 767, "(1)" + line 262, "pan.___", state 775, "(1)" + line 412, "pan.___", state 794, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 796, "(1)" + line 412, "pan.___", state 797, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 797, "else" + line 412, "pan.___", state 800, "(1)" + line 416, "pan.___", state 808, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 810, "(1)" + line 416, "pan.___", state 811, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 811, "else" + line 416, "pan.___", state 814, "(1)" + line 416, "pan.___", state 815, "(1)" + line 416, "pan.___", state 815, "(1)" + line 414, "pan.___", state 820, "((i<1))" + line 414, "pan.___", state 820, "((i>=1))" + line 421, "pan.___", state 826, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 828, "(1)" + line 421, "pan.___", state 829, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 829, "else" + line 421, "pan.___", state 832, "(1)" + line 421, "pan.___", state 833, "(1)" + line 421, "pan.___", state 833, "(1)" + line 425, "pan.___", state 840, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 842, "(1)" + line 425, "pan.___", state 843, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 843, "else" + line 425, "pan.___", state 846, "(1)" + line 425, "pan.___", state 847, "(1)" + line 425, "pan.___", state 847, "(1)" + line 423, "pan.___", state 852, "((i<2))" + line 423, "pan.___", state 852, "((i>=2))" + line 250, "pan.___", state 858, "(1)" + line 254, "pan.___", state 866, "(1)" + line 254, "pan.___", state 867, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 867, "else" + line 252, "pan.___", state 872, "((i<1))" + line 252, "pan.___", state 872, "((i>=1))" + line 258, "pan.___", state 878, "(1)" + line 258, "pan.___", state 879, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 879, "else" + line 262, "pan.___", state 886, "(1)" + line 262, "pan.___", state 887, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 887, "else" + line 260, "pan.___", state 892, "((i<2))" + line 260, "pan.___", state 892, "((i>=2))" + line 267, "pan.___", state 896, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 896, "else" + line 432, "pan.___", state 898, "(1)" + line 432, "pan.___", state 898, "(1)" + line 606, "pan.___", state 902, "_proc_urcu_reader = (_proc_urcu_reader|(1<<11))" + line 412, "pan.___", state 907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 921, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 971, "(1)" + line 254, "pan.___", state 979, "(1)" + line 258, "pan.___", state 991, "(1)" + line 262, "pan.___", state 999, "(1)" + line 412, "pan.___", state 1021, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1053, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1067, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1085, "(1)" + line 258, "pan.___", state 1105, "(1)" + line 262, "pan.___", state 1113, "(1)" + line 412, "pan.___", state 1136, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1168, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1182, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1200, "(1)" + line 258, "pan.___", state 1220, "(1)" + line 262, "pan.___", state 1228, "(1)" + line 412, "pan.___", state 1247, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1279, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1293, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1311, "(1)" + line 258, "pan.___", state 1331, "(1)" + line 262, "pan.___", state 1339, "(1)" + line 273, "pan.___", state 1360, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 1382, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 1391, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1407, "(1)" + line 254, "pan.___", state 1415, "(1)" + line 258, "pan.___", state 1427, "(1)" + line 262, "pan.___", state 1435, "(1)" + line 412, "pan.___", state 1453, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 1467, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1485, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1499, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1517, "(1)" + line 254, "pan.___", state 1525, "(1)" + line 258, "pan.___", state 1537, "(1)" + line 262, "pan.___", state 1545, "(1)" + line 412, "pan.___", state 1564, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1596, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1610, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1628, "(1)" + line 254, "pan.___", state 1636, "(1)" + line 258, "pan.___", state 1648, "(1)" + line 262, "pan.___", state 1656, "(1)" + line 412, "pan.___", state 1678, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1710, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1724, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1742, "(1)" + line 258, "pan.___", state 1762, "(1)" + line 262, "pan.___", state 1770, "(1)" + line 645, "pan.___", state 1789, "_proc_urcu_reader = (_proc_urcu_reader|((1<<2)<<19))" + line 412, "pan.___", state 1796, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1828, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1842, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1860, "(1)" + line 258, "pan.___", state 1880, "(1)" + line 262, "pan.___", state 1888, "(1)" + line 412, "pan.___", state 1907, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 1939, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 1953, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1971, "(1)" + line 258, "pan.___", state 1991, "(1)" + line 262, "pan.___", state 1999, "(1)" + line 412, "pan.___", state 2020, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 2022, "(1)" + line 412, "pan.___", state 2023, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 2023, "else" + line 412, "pan.___", state 2026, "(1)" + line 416, "pan.___", state 2034, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2036, "(1)" + line 416, "pan.___", state 2037, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 2037, "else" + line 416, "pan.___", state 2040, "(1)" + line 416, "pan.___", state 2041, "(1)" + line 416, "pan.___", state 2041, "(1)" + line 414, "pan.___", state 2046, "((i<1))" + line 414, "pan.___", state 2046, "((i>=1))" + line 421, "pan.___", state 2052, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2054, "(1)" + line 421, "pan.___", state 2055, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 2055, "else" + line 421, "pan.___", state 2058, "(1)" + line 421, "pan.___", state 2059, "(1)" + line 421, "pan.___", state 2059, "(1)" + line 425, "pan.___", state 2066, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2068, "(1)" + line 425, "pan.___", state 2069, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 2069, "else" + line 425, "pan.___", state 2072, "(1)" + line 425, "pan.___", state 2073, "(1)" + line 425, "pan.___", state 2073, "(1)" + line 423, "pan.___", state 2078, "((i<2))" + line 423, "pan.___", state 2078, "((i>=2))" + line 250, "pan.___", state 2084, "(1)" + line 254, "pan.___", state 2092, "(1)" + line 254, "pan.___", state 2093, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 2093, "else" + line 252, "pan.___", state 2098, "((i<1))" + line 252, "pan.___", state 2098, "((i>=1))" + line 258, "pan.___", state 2104, "(1)" + line 258, "pan.___", state 2105, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 2105, "else" + line 262, "pan.___", state 2112, "(1)" + line 262, "pan.___", state 2113, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 2113, "else" + line 260, "pan.___", state 2118, "((i<2))" + line 260, "pan.___", state 2118, "((i>=2))" + line 267, "pan.___", state 2122, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 2122, "else" + line 432, "pan.___", state 2124, "(1)" + line 432, "pan.___", state 2124, "(1)" + line 645, "pan.___", state 2127, "cached_urcu_active_readers.val[_pid] = (tmp+1)" + line 645, "pan.___", state 2128, "_proc_urcu_reader = (_proc_urcu_reader|(1<<23))" + line 645, "pan.___", state 2129, "(1)" + line 273, "pan.___", state 2133, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 2155, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 2164, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 2180, "(1)" + line 254, "pan.___", state 2188, "(1)" + line 258, "pan.___", state 2200, "(1)" + line 262, "pan.___", state 2208, "(1)" + line 412, "pan.___", state 2226, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2240, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2258, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2272, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 2290, "(1)" + line 254, "pan.___", state 2298, "(1)" + line 258, "pan.___", state 2310, "(1)" + line 262, "pan.___", state 2318, "(1)" + line 273, "pan.___", state 2340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 2349, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 2362, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 2371, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 2387, "(1)" + line 254, "pan.___", state 2395, "(1)" + line 258, "pan.___", state 2407, "(1)" + line 262, "pan.___", state 2415, "(1)" + line 412, "pan.___", state 2433, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2447, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2465, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2479, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 2497, "(1)" + line 254, "pan.___", state 2505, "(1)" + line 258, "pan.___", state 2517, "(1)" + line 262, "pan.___", state 2525, "(1)" + line 412, "pan.___", state 2544, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 2558, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 2576, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 2590, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 2608, "(1)" + line 254, "pan.___", state 2616, "(1)" + line 258, "pan.___", state 2628, "(1)" + line 262, "pan.___", state 2636, "(1)" + line 250, "pan.___", state 2667, "(1)" + line 258, "pan.___", state 2687, "(1)" + line 262, "pan.___", state 2695, "(1)" + line 250, "pan.___", state 2710, "(1)" + line 254, "pan.___", state 2718, "(1)" + line 258, "pan.___", state 2730, "(1)" + line 262, "pan.___", state 2738, "(1)" + line 899, "pan.___", state 2755, "-end-" + (259 of 2755 states) +unreached in proctype urcu_writer + line 412, "pan.___", state 18, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 24, "(1)" + line 416, "pan.___", state 32, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 38, "(1)" + line 416, "pan.___", state 39, "(1)" + line 416, "pan.___", state 39, "(1)" + line 414, "pan.___", state 44, "((i<1))" + line 414, "pan.___", state 44, "((i>=1))" + line 421, "pan.___", state 50, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 56, "(1)" + line 421, "pan.___", state 57, "(1)" + line 421, "pan.___", state 57, "(1)" + line 425, "pan.___", state 64, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 70, "(1)" + line 425, "pan.___", state 71, "(1)" + line 425, "pan.___", state 71, "(1)" + line 423, "pan.___", state 76, "((i<2))" + line 423, "pan.___", state 76, "((i>=2))" + line 250, "pan.___", state 82, "(1)" + line 254, "pan.___", state 90, "(1)" + line 254, "pan.___", state 91, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 91, "else" + line 252, "pan.___", state 96, "((i<1))" + line 252, "pan.___", state 96, "((i>=1))" + line 258, "pan.___", state 102, "(1)" + line 258, "pan.___", state 103, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 103, "else" + line 262, "pan.___", state 110, "(1)" + line 262, "pan.___", state 111, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 111, "else" + line 260, "pan.___", state 116, "((i<2))" + line 260, "pan.___", state 116, "((i>=2))" + line 267, "pan.___", state 120, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 120, "else" + line 432, "pan.___", state 122, "(1)" + line 432, "pan.___", state 122, "(1)" + line 273, "pan.___", state 131, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 140, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 148, "((i<1))" + line 275, "pan.___", state 148, "((i>=1))" + line 281, "pan.___", state 153, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 1022, "pan.___", state 181, "old_data = cached_rcu_ptr.val[_pid]" + line 412, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 199, "(1)" + line 416, "pan.___", state 207, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 213, "(1)" + line 416, "pan.___", state 214, "(1)" + line 416, "pan.___", state 214, "(1)" + line 414, "pan.___", state 219, "((i<1))" + line 414, "pan.___", state 219, "((i>=1))" + line 421, "pan.___", state 225, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 231, "(1)" + line 421, "pan.___", state 232, "(1)" + line 421, "pan.___", state 232, "(1)" + line 425, "pan.___", state 239, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 245, "(1)" + line 425, "pan.___", state 246, "(1)" + line 425, "pan.___", state 246, "(1)" + line 423, "pan.___", state 251, "((i<2))" + line 423, "pan.___", state 251, "((i>=2))" + line 250, "pan.___", state 257, "(1)" + line 254, "pan.___", state 265, "(1)" + line 254, "pan.___", state 266, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 266, "else" + line 252, "pan.___", state 271, "((i<1))" + line 252, "pan.___", state 271, "((i>=1))" + line 258, "pan.___", state 277, "(1)" + line 258, "pan.___", state 278, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 278, "else" + line 262, "pan.___", state 285, "(1)" + line 262, "pan.___", state 286, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 286, "else" + line 260, "pan.___", state 291, "((i<2))" + line 260, "pan.___", state 291, "((i>=2))" + line 267, "pan.___", state 295, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 295, "else" + line 432, "pan.___", state 297, "(1)" + line 432, "pan.___", state 297, "(1)" + line 412, "pan.___", state 308, "(1)" + line 412, "pan.___", state 309, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 309, "else" + line 412, "pan.___", state 312, "(1)" + line 416, "pan.___", state 320, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 326, "(1)" + line 416, "pan.___", state 327, "(1)" + line 416, "pan.___", state 327, "(1)" + line 414, "pan.___", state 332, "((i<1))" + line 414, "pan.___", state 332, "((i>=1))" + line 421, "pan.___", state 338, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 344, "(1)" + line 421, "pan.___", state 345, "(1)" + line 421, "pan.___", state 345, "(1)" + line 425, "pan.___", state 352, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 358, "(1)" + line 425, "pan.___", state 359, "(1)" + line 425, "pan.___", state 359, "(1)" + line 423, "pan.___", state 364, "((i<2))" + line 423, "pan.___", state 364, "((i>=2))" + line 250, "pan.___", state 370, "(1)" + line 254, "pan.___", state 378, "(1)" + line 254, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 379, "else" + line 252, "pan.___", state 384, "((i<1))" + line 252, "pan.___", state 384, "((i>=1))" + line 258, "pan.___", state 390, "(1)" + line 258, "pan.___", state 391, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 391, "else" + line 262, "pan.___", state 398, "(1)" + line 262, "pan.___", state 399, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 399, "else" + line 260, "pan.___", state 404, "((i<2))" + line 260, "pan.___", state 404, "((i>=2))" + line 267, "pan.___", state 408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 408, "else" + line 432, "pan.___", state 410, "(1)" + line 432, "pan.___", state 410, "(1)" + line 412, "pan.___", state 423, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 425, "(1)" + line 412, "pan.___", state 426, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 412, "pan.___", state 426, "else" + line 412, "pan.___", state 429, "(1)" + line 416, "pan.___", state 437, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 439, "(1)" + line 416, "pan.___", state 440, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 416, "pan.___", state 440, "else" + line 416, "pan.___", state 443, "(1)" + line 416, "pan.___", state 444, "(1)" + line 416, "pan.___", state 444, "(1)" + line 414, "pan.___", state 449, "((i<1))" + line 414, "pan.___", state 449, "((i>=1))" + line 421, "pan.___", state 455, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 457, "(1)" + line 421, "pan.___", state 458, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 421, "pan.___", state 458, "else" + line 421, "pan.___", state 461, "(1)" + line 421, "pan.___", state 462, "(1)" + line 421, "pan.___", state 462, "(1)" + line 425, "pan.___", state 469, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 471, "(1)" + line 425, "pan.___", state 472, "((cache_dirty_rcu_data[i].bitfield&(1<<_pid)))" + line 425, "pan.___", state 472, "else" + line 425, "pan.___", state 475, "(1)" + line 425, "pan.___", state 476, "(1)" + line 425, "pan.___", state 476, "(1)" + line 423, "pan.___", state 481, "((i<2))" + line 423, "pan.___", state 481, "((i>=2))" + line 250, "pan.___", state 487, "(1)" + line 254, "pan.___", state 495, "(1)" + line 254, "pan.___", state 496, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 496, "else" + line 252, "pan.___", state 501, "((i<1))" + line 252, "pan.___", state 501, "((i>=1))" + line 258, "pan.___", state 507, "(1)" + line 258, "pan.___", state 508, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 508, "else" + line 262, "pan.___", state 515, "(1)" + line 262, "pan.___", state 516, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 516, "else" + line 267, "pan.___", state 525, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 525, "else" + line 432, "pan.___", state 527, "(1)" + line 432, "pan.___", state 527, "(1)" + line 412, "pan.___", state 533, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 539, "(1)" + line 416, "pan.___", state 547, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 553, "(1)" + line 416, "pan.___", state 554, "(1)" + line 416, "pan.___", state 554, "(1)" + line 414, "pan.___", state 559, "((i<1))" + line 414, "pan.___", state 559, "((i>=1))" + line 421, "pan.___", state 565, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 571, "(1)" + line 421, "pan.___", state 572, "(1)" + line 421, "pan.___", state 572, "(1)" + line 425, "pan.___", state 579, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 585, "(1)" + line 425, "pan.___", state 586, "(1)" + line 425, "pan.___", state 586, "(1)" + line 423, "pan.___", state 591, "((i<2))" + line 423, "pan.___", state 591, "((i>=2))" + line 250, "pan.___", state 597, "(1)" + line 254, "pan.___", state 605, "(1)" + line 254, "pan.___", state 606, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 606, "else" + line 252, "pan.___", state 611, "((i<1))" + line 252, "pan.___", state 611, "((i>=1))" + line 258, "pan.___", state 617, "(1)" + line 258, "pan.___", state 618, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 618, "else" + line 262, "pan.___", state 625, "(1)" + line 262, "pan.___", state 626, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 626, "else" + line 267, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 635, "else" + line 432, "pan.___", state 637, "(1)" + line 432, "pan.___", state 637, "(1)" + line 412, "pan.___", state 644, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 650, "(1)" + line 416, "pan.___", state 658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 416, "pan.___", state 664, "(1)" + line 416, "pan.___", state 665, "(1)" + line 416, "pan.___", state 665, "(1)" + line 414, "pan.___", state 670, "((i<1))" + line 414, "pan.___", state 670, "((i>=1))" + line 421, "pan.___", state 676, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 682, "(1)" + line 421, "pan.___", state 683, "(1)" + line 421, "pan.___", state 683, "(1)" + line 425, "pan.___", state 690, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 425, "pan.___", state 696, "(1)" + line 425, "pan.___", state 697, "(1)" + line 425, "pan.___", state 697, "(1)" + line 423, "pan.___", state 702, "((i<2))" + line 423, "pan.___", state 702, "((i>=2))" + line 250, "pan.___", state 708, "(1)" + line 254, "pan.___", state 716, "(1)" + line 254, "pan.___", state 717, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 717, "else" + line 252, "pan.___", state 722, "((i<1))" + line 252, "pan.___", state 722, "((i>=1))" + line 258, "pan.___", state 728, "(1)" + line 258, "pan.___", state 729, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 729, "else" + line 262, "pan.___", state 736, "(1)" + line 262, "pan.___", state 737, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 737, "else" + line 260, "pan.___", state 742, "((i<2))" + line 260, "pan.___", state 742, "((i>=2))" + line 267, "pan.___", state 746, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 746, "else" + line 432, "pan.___", state 748, "(1)" + line 432, "pan.___", state 748, "(1)" + line 416, "pan.___", state 771, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 789, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 803, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 254, "pan.___", state 829, "(1)" + line 258, "pan.___", state 841, "(1)" + line 262, "pan.___", state 849, "(1)" + line 416, "pan.___", state 887, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 421, "pan.___", state 905, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 425, "pan.___", state 919, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 254, "pan.___", state 945, "(1)" + line 258, "pan.___", state 957, "(1)" + line 262, "pan.___", state 965, "(1)" + line 273, "pan.___", state 1009, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 277, "pan.___", state 1018, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 275, "pan.___", state 1026, "((i<1))" + line 275, "pan.___", state 1026, "((i>=1))" + line 281, "pan.___", state 1033, "(1)" + line 281, "pan.___", state 1034, "((cache_dirty_rcu_ptr.bitfield&(1<<_pid)))" + line 281, "pan.___", state 1034, "else" + line 285, "pan.___", state 1040, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 283, "pan.___", state 1048, "((i<2))" + line 283, "pan.___", state 1048, "((i>=2))" + line 250, "pan.___", state 1056, "(1)" + line 254, "pan.___", state 1064, "(1)" + line 254, "pan.___", state 1065, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 254, "pan.___", state 1065, "else" + line 252, "pan.___", state 1070, "((i<1))" + line 252, "pan.___", state 1070, "((i>=1))" + line 258, "pan.___", state 1076, "(1)" + line 258, "pan.___", state 1077, "(!((cache_dirty_rcu_ptr.bitfield&(1<<_pid))))" + line 258, "pan.___", state 1077, "else" + line 262, "pan.___", state 1084, "(1)" + line 262, "pan.___", state 1085, "(!((cache_dirty_rcu_data[i].bitfield&(1<<_pid))))" + line 262, "pan.___", state 1085, "else" + line 267, "pan.___", state 1094, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 267, "pan.___", state 1094, "else" + line 277, "pan.___", state 1109, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 281, "pan.___", state 1122, "cache_dirty_rcu_ptr.bitfield = (cache_dirty_rcu_ptr.bitfield&~((1<<_pid)))" + line 285, "pan.___", state 1131, "cache_dirty_rcu_data[i].bitfield = (cache_dirty_rcu_data[i].bitfield&~((1<<_pid)))" + line 250, "pan.___", state 1147, "(1)" + line 254, "pan.___", state 1155, "(1)" + line 258, "pan.___", state 1167, "(1)" + line 262, "pan.___", state 1175, "(1)" + line 1238, "pan.___", state 1190, "-end-" + (192 of 1190 states) +unreached in proctype :init: + (0 of 78 states) +unreached in proctype :never: + line 1303, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 8.1 seconds +pan: rate 24329.259 states/second +pan: avg transition delay 2.7644e-06 usec +cp .input.spin urcu_progress_writer_error.spin.input +cp .input.spin.trail urcu_progress_writer_error.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu-controldataflow-intel-no-ipi' diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..67fec75 --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input @@ -0,0 +1,1274 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +//#define ARCH_ALPHA +#define ARCH_INTEL +//#define ARCH_POWERPC +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bitfield cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(rcu_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE, j); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON, j); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input.trail b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..e5fdf5a --- /dev/null +++ b/urcu-controldataflow-intel-no-ipi/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,5000 @@ +-2:3:-2 +-4:-4:-4 +1:0:4025 +2:3:3945 +3:3:3948 +4:3:3948 +5:3:3951 +6:3:3959 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+4994:1:2314 +4995:1:2313 +4996:1:2314 +4997:1:2321 diff --git a/urcu-controldataflow/DEFINES b/urcu-controldataflow/DEFINES new file mode 100644 index 0000000..a1008a6 --- /dev/null +++ b/urcu-controldataflow/DEFINES @@ -0,0 +1,18 @@ + +// Poison value for freed memory +#define POISON 1 +// Memory with correct data +#define WINE 0 +#define SLAB_SIZE 2 + +#define read_poison (data_read_first[0] == POISON || data_read_second[0] == POISON) + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +//disabled +//#define REMOTE_BARRIERS + +#define ARCH_ALPHA +//#define ARCH_INTEL +//#define ARCH_POWERPC diff --git a/urcu-controldataflow/Makefile b/urcu-controldataflow/Makefile new file mode 100644 index 0000000..abf201c --- /dev/null +++ b/urcu-controldataflow/Makefile @@ -0,0 +1,171 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 -DCOLLAPSE +#CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-controldataflow/references.txt b/urcu-controldataflow/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-controldataflow/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-controldataflow/urcu.sh b/urcu-controldataflow/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-controldataflow/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-controldataflow/urcu.spin b/urcu-controldataflow/urcu.spin new file mode 100644 index 0000000..8075506 --- /dev/null +++ b/urcu-controldataflow/urcu.spin @@ -0,0 +1,1321 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory + * and out-of-order instruction scheduling. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +#define get_readerid() (get_pid()) + +/* + * Produced process control and data flow. Updated after each instruction to + * show which variables are ready. Using one-hot bit encoding per variable to + * save state space. Used as triggers to execute the instructions having those + * variables as input. Leaving bits active to inhibit instruction execution. + * Scheme used to make instruction disabling and automatic dependency fall-back + * automatic. + */ + +#define CONSUME_TOKENS(state, bits, notbits) \ + ((!(state & (notbits))) && (state & (bits)) == (bits)) + +#define PRODUCE_TOKENS(state, bits) \ + state = state | (bits); + +#define CLEAR_TOKENS(state, bits) \ + state = state & ~(bits) + +/* + * Types of dependency : + * + * Data dependency + * + * - True dependency, Read-after-Write (RAW) + * + * This type of dependency happens when a statement depends on the result of a + * previous statement. This applies to any statement which needs to read a + * variable written by a preceding statement. + * + * - False dependency, Write-after-Read (WAR) + * + * Typically, variable renaming can ensure that this dependency goes away. + * However, if the statements must read and then write from/to the same variable + * in the OOO memory model, renaming may be impossible, and therefore this + * causes a WAR dependency. + * + * - Output dependency, Write-after-Write (WAW) + * + * Two writes to the same variable in subsequent statements. Variable renaming + * can ensure this is not needed, but can be required when writing multiple + * times to the same OOO mem model variable. + * + * Control dependency + * + * Execution of a given instruction depends on a previous instruction evaluating + * in a way that allows its execution. E.g. : branches. + * + * Useful considerations for joining dependencies after branch + * + * - Pre-dominance + * + * "We say box i dominates box j if every path (leading from input to output + * through the diagram) which passes through box j must also pass through box + * i. Thus box i dominates box j if box j is subordinate to box i in the + * program." + * + * http://www.hipersoft.rice.edu/grads/publications/dom14.pdf + * Other classic algorithm to calculate dominance : Lengauer-Tarjan (in gcc) + * + * - Post-dominance + * + * Just as pre-dominance, but with arcs of the data flow inverted, and input vs + * output exchanged. Therefore, i post-dominating j ensures that every path + * passing by j will pass by i before reaching the output. + * + * Prefetch and speculative execution + * + * If an instruction depends on the result of a previous branch, but it does not + * have side-effects, it can be executed before the branch result is known. + * however, it must be restarted if a core-synchronizing instruction is issued. + * Note that instructions which depend on the speculative instruction result + * but that have side-effects must depend on the branch completion in addition + * to the speculatively executed instruction. + * + * Other considerations + * + * Note about "volatile" keyword dependency : The compiler will order volatile + * accesses so they appear in the right order on a given CPU. They can be + * reordered by the CPU instruction scheduling. This therefore cannot be + * considered as a depencency. + * + * References : + * + * Cooper, Keith D.; & Torczon, Linda. (2005). Engineering a Compiler. Morgan + * Kaufmann. ISBN 1-55860-698-X. + * Kennedy, Ken; & Allen, Randy. (2001). Optimizing Compilers for Modern + * Architectures: A Dependence-based Approach. Morgan Kaufmann. ISBN + * 1-55860-286-0. + * Muchnick, Steven S. (1997). Advanced Compiler Design and Implementation. + * Morgan Kaufmann. ISBN 1-55860-320-4. + */ + +/* + * Note about loops and nested calls + * + * To keep this model simple, loops expressed in the framework will behave as if + * there was a core synchronizing instruction between loops. To see the effect + * of loop unrolling, manually unrolling loops is required. Note that if loops + * end or start with a core synchronizing instruction, the model is appropriate. + * Nested calls are not supported. + */ + +/* + * Only Alpha has out-of-order cache bank loads. Other architectures (intel, + * powerpc, arm) ensure that dependent reads won't be reordered. c.f. + * http://www.linuxjournal.com/article/8212) + */ +#ifdef ARCH_ALPHA +#define HAVE_OOO_CACHE_READ +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +typedef per_proc_bit { + bit val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bitfield { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; + +#define DECLARE_PROC_CACHED_VAR(type, x)\ + type cached_##x; \ + bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v) \ + mem_##x = v; + +#define INIT_PROC_CACHED_VAR(x, v) \ + cache_dirty_##x = 0; \ + cached_##x = v; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x) + +#define READ_CACHED_VAR(x) (cached_##x) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x = v; \ + cache_dirty_##x = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x; \ + cache_dirty_##x = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x = mem_##x; \ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* Must consume all prior read tokens. All subsequent reads depend on it. */ +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Must consume all prior write tokens. All subsequent writes depend on it. */ +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; + } +} + +/* Synchronization point. Must consume all prior read and write tokens. All + * subsequent reads and writes depend on it. */ +inline smp_mb(i) +{ + atomic { + smp_wmb(i); + smp_rmb(i); + } +} + +#ifdef REMOTE_BARRIERS + +bit reader_barrier[NR_READERS]; + +/* + * We cannot leave the barriers dependencies in place in REMOTE_BARRIERS mode + * because they would add unexisting core synchronization and would therefore + * create an incomplete model. + * Therefore, we model the read-side memory barriers by completely disabling the + * memory barriers and their dependencies from the read-side. One at a time + * (different verification runs), we make a different instruction listen for + * signals. + */ + +#define smp_mb_reader(i, j) + +/* + * Service 0, 1 or many barrier requests. + */ +inline smp_mb_recv(i, j) +{ + do + :: (reader_barrier[get_readerid()] == 1) -> + /* + * We choose to ignore cycles caused by writer busy-looping, + * waiting for the reader, sending barrier requests, and the + * reader always services them without continuing execution. + */ +progress_ignoring_mb1: + smp_mb(i); + reader_barrier[get_readerid()] = 0; + :: 1 -> + /* + * We choose to ignore writer's non-progress caused by the + * reader ignoring the writer's mb() requests. + */ +progress_ignoring_mb2: + break; + od; +} + +#define PROGRESS_LABEL(progressid) progress_writer_progid_##progressid: + +#define smp_mb_send(i, j, progressid) \ +{ \ + smp_mb(i); \ + i = 0; \ + do \ + :: i < NR_READERS -> \ + reader_barrier[i] = 1; \ + /* \ + * Busy-looping waiting for reader barrier handling is of little\ + * interest, given the reader has the ability to totally ignore \ + * barrier requests. \ + */ \ + do \ + :: (reader_barrier[i] == 1) -> \ +PROGRESS_LABEL(progressid) \ + skip; \ + :: (reader_barrier[i] == 0) -> break; \ + od; \ + i++; \ + :: i >= NR_READERS -> \ + break \ + od; \ + smp_mb(i); \ +} + +#else + +#define smp_mb_send(i, j, progressid) smp_mb(i) +#define smp_mb_reader(i, j) smp_mb(i) +#define smp_mb_recv(i, j) + +#endif + +/* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* RCU data */ +DECLARE_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + +/* RCU pointer */ +#if (SLAB_SIZE == 2) +DECLARE_CACHED_VAR(bit, rcu_ptr); +bit ptr_read_first[NR_READERS]; +bit ptr_read_second[NR_READERS]; +#else +DECLARE_CACHED_VAR(byte, rcu_ptr); +byte ptr_read_first[NR_READERS]; +byte ptr_read_second[NR_READERS]; +#endif + +bit data_read_first[NR_READERS]; +bit data_read_second[NR_READERS]; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_WRITE_TO_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#ifdef HAVE_OOO_CACHE_READ + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(rcu_ptr, get_pid()); + i = 0; + do + :: i < SLAB_SIZE -> + RANDOM_CACHE_READ_FROM_MEM(rcu_data[i], get_pid()); + i++ + :: i >= SLAB_SIZE -> break + od; +#else + smp_rmb(i); +#endif /* HAVE_OOO_CACHE_READ */ + } +} + +/* + * Bit encoding, urcu_reader : + */ + +int _proc_urcu_reader; +#define proc_urcu_reader _proc_urcu_reader + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROD_A_READ (1 << 0) +#define READ_PROD_B_IF_TRUE (1 << 1) +#define READ_PROD_B_IF_FALSE (1 << 2) +#define READ_PROD_C_IF_TRUE_READ (1 << 3) + +#define PROCEDURE_READ_LOCK(base, consumetoken, consumetoken2, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, (consumetoken | consumetoken2), READ_PROD_A_READ << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_A_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + READ_PROD_A_READ << base, /* RAW, pre-dominant */ \ + (READ_PROD_B_IF_TRUE | READ_PROD_B_IF_FALSE) << base) -> \ + if \ + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_TRUE << base); \ + :: else -> \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_B_IF_FALSE << base); \ + fi; \ + /* IF TRUE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, consumetoken, /* prefetch */ \ + READ_PROD_C_IF_TRUE_READ << base) -> \ + ooo_mem(i); \ + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_C_IF_TRUE_READ << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_TRUE \ + | READ_PROD_C_IF_TRUE_READ /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ELSE */ \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + (READ_PROD_B_IF_FALSE /* pre-dominant */ \ + | READ_PROD_A_READ) << base, /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], \ + tmp + 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + /* IF_MERGE implies \ + * post-dominance */ \ + /* ENDIF */ \ + skip + +/* Body of PROCEDURE_READ_LOCK */ +#define READ_PROC_READ_UNLOCK (1 << 0) + +#define PROCEDURE_READ_UNLOCK(base, consumetoken, producetoken) \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken, \ + READ_PROC_READ_UNLOCK << base) -> \ + ooo_mem(i); \ + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); \ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_UNLOCK << base); \ + :: CONSUME_TOKENS(proc_urcu_reader, \ + consumetoken \ + | (READ_PROC_READ_UNLOCK << base), /* WAR */ \ + producetoken) -> \ + ooo_mem(i); \ + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp - 1); \ + PRODUCE_TOKENS(proc_urcu_reader, producetoken); \ + skip + + +#define READ_PROD_NONE (1 << 0) + +/* PROCEDURE_READ_LOCK base = << 1 : 1 to 5 */ +#define READ_LOCK_BASE 1 +#define READ_LOCK_OUT (1 << 5) + +#define READ_PROC_FIRST_MB (1 << 6) + +/* PROCEDURE_READ_LOCK (NESTED) base : << 7 : 7 to 11 */ +#define READ_LOCK_NESTED_BASE 7 +#define READ_LOCK_NESTED_OUT (1 << 11) + +#define READ_PROC_READ_GEN (1 << 12) +#define READ_PROC_ACCESS_GEN (1 << 13) + +/* PROCEDURE_READ_UNLOCK (NESTED) base = << 14 : 14 to 15 */ +#define READ_UNLOCK_NESTED_BASE 14 +#define READ_UNLOCK_NESTED_OUT (1 << 15) + +#define READ_PROC_SECOND_MB (1 << 16) + +/* PROCEDURE_READ_UNLOCK base = << 17 : 17 to 18 */ +#define READ_UNLOCK_BASE 17 +#define READ_UNLOCK_OUT (1 << 18) + +/* PROCEDURE_READ_LOCK_UNROLL base = << 19 : 19 to 23 */ +#define READ_LOCK_UNROLL_BASE 19 +#define READ_LOCK_OUT_UNROLL (1 << 23) + +#define READ_PROC_THIRD_MB (1 << 24) + +#define READ_PROC_READ_GEN_UNROLL (1 << 25) +#define READ_PROC_ACCESS_GEN_UNROLL (1 << 26) + +#define READ_PROC_FOURTH_MB (1 << 27) + +/* PROCEDURE_READ_UNLOCK_UNROLL base = << 28 : 28 to 29 */ +#define READ_UNLOCK_UNROLL_BASE 28 +#define READ_UNLOCK_OUT_UNROLL (1 << 29) + + +/* Should not include branches */ +#define READ_PROC_ALL_TOKENS (READ_PROD_NONE \ + | READ_LOCK_OUT \ + | READ_PROC_FIRST_MB \ + | READ_LOCK_NESTED_OUT \ + | READ_PROC_READ_GEN \ + | READ_PROC_ACCESS_GEN \ + | READ_UNLOCK_NESTED_OUT \ + | READ_PROC_SECOND_MB \ + | READ_UNLOCK_OUT \ + | READ_LOCK_OUT_UNROLL \ + | READ_PROC_THIRD_MB \ + | READ_PROC_READ_GEN_UNROLL \ + | READ_PROC_ACCESS_GEN_UNROLL \ + | READ_PROC_FOURTH_MB \ + | READ_UNLOCK_OUT_UNROLL) + +/* Must clear all tokens, including branches */ +#define READ_PROC_ALL_TOKENS_CLEAR ((1 << 30) - 1) + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + PRODUCE_TOKENS(proc_urcu_reader, READ_PROD_NONE); + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + +#ifdef REMOTE_BARRIERS + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); +#endif + + do + :: 1 -> + +#ifdef REMOTE_BARRIERS + /* + * Signal-based memory barrier will only execute when the + * execution order appears in program order. + */ + if + :: 1 -> + atomic { + if + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE, + READ_LOCK_OUT | READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT, + READ_LOCK_NESTED_OUT + | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT | READ_LOCK_NESTED_OUT, + READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN, + READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT, + READ_UNLOCK_OUT + | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL, + READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL, + READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN + | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL, + READ_UNLOCK_OUT_UNROLL) + || CONSUME_TOKENS(proc_urcu_reader, READ_PROD_NONE | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT | READ_PROC_READ_GEN | READ_PROC_ACCESS_GEN | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT | READ_LOCK_OUT_UNROLL + | READ_PROC_READ_GEN_UNROLL | READ_PROC_ACCESS_GEN_UNROLL | READ_UNLOCK_OUT_UNROLL, + 0) -> + goto non_atomic3; +non_atomic3_end: + skip; + fi; + } + fi; + + goto non_atomic3_skip; +non_atomic3: + smp_mb_recv(i, j); + goto non_atomic3_end; +non_atomic3_skip: + +#endif /* REMOTE_BARRIERS */ + + atomic { + if + PROCEDURE_READ_LOCK(READ_LOCK_BASE, READ_PROD_NONE, 0, READ_LOCK_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_LOCK_OUT, /* post-dominant */ + READ_PROC_FIRST_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FIRST_MB); + + PROCEDURE_READ_LOCK(READ_LOCK_NESTED_BASE, READ_PROC_FIRST_MB, READ_LOCK_OUT, + READ_LOCK_NESTED_OUT); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_PROC_READ_GEN) -> + ooo_mem(i); + ptr_read_first[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_READ_GEN, + READ_PROC_ACCESS_GEN) -> + /* smp_read_barrier_depends */ + goto rmb1; +rmb1_end: + data_read_first[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_first[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN); + + + /* Note : we remove the nested memory barrier from the read unlock + * model, given it is not usually needed. The implementation has the barrier + * because the performance impact added by a branch in the common case does not + * justify it. + */ + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_NESTED_BASE, + READ_PROC_FIRST_MB + | READ_LOCK_OUT + | READ_LOCK_NESTED_OUT, + READ_UNLOCK_NESTED_OUT); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_ACCESS_GEN /* mb() orders reads */ + | READ_PROC_READ_GEN /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_LOCK_OUT /* post-dominant */ + | READ_LOCK_NESTED_OUT /* post-dominant */ + | READ_UNLOCK_NESTED_OUT, + READ_PROC_SECOND_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_SECOND_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT); + + /* Unrolling loop : second consecutive lock */ + /* reading urcu_active_readers, which have been written by + * READ_UNLOCK_OUT : RAW */ + PROCEDURE_READ_LOCK(READ_LOCK_UNROLL_BASE, + READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB, /* mb() orders reads */ + READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT /* RAW */ + | READ_UNLOCK_OUT, /* RAW */ + READ_LOCK_OUT_UNROLL); + + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_THIRD_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_THIRD_MB); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_READ_GEN_UNROLL) -> + ooo_mem(i); + ptr_read_second[get_readerid()] = READ_CACHED_VAR(rcu_ptr); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_READ_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB, /* mb() orders reads */ + READ_PROC_ACCESS_GEN_UNROLL) -> + /* smp_read_barrier_depends */ + goto rmb2; +rmb2_end: + data_read_second[get_readerid()] = + READ_CACHED_VAR(rcu_data[ptr_read_second[get_readerid()]]); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_ACCESS_GEN_UNROLL); + + :: CONSUME_TOKENS(proc_urcu_reader, + READ_PROC_READ_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_ACCESS_GEN_UNROLL /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() ordered */ + | READ_PROC_SECOND_MB /* mb() ordered */ + | READ_PROC_THIRD_MB /* mb() ordered */ + | READ_LOCK_OUT_UNROLL /* post-dominant */ + | READ_LOCK_NESTED_OUT + | READ_LOCK_OUT + | READ_UNLOCK_NESTED_OUT + | READ_UNLOCK_OUT, + READ_PROC_FOURTH_MB) -> + smp_mb_reader(i, j); + PRODUCE_TOKENS(proc_urcu_reader, READ_PROC_FOURTH_MB); + + PROCEDURE_READ_UNLOCK(READ_UNLOCK_UNROLL_BASE, + READ_PROC_FOURTH_MB /* mb() orders reads */ + | READ_PROC_THIRD_MB /* mb() orders reads */ + | READ_LOCK_OUT_UNROLL /* RAW */ + | READ_PROC_SECOND_MB /* mb() orders reads */ + | READ_PROC_FIRST_MB /* mb() orders reads */ + | READ_LOCK_NESTED_OUT /* RAW */ + | READ_LOCK_OUT /* RAW */ + | READ_UNLOCK_NESTED_OUT, /* RAW */ + READ_UNLOCK_OUT_UNROLL); + :: CONSUME_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_reader, READ_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Dependency between consecutive loops : + * RAW dependency on + * WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1) + * tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + * between loops. + * _WHEN THE MB()s are in place_, they add full ordering of the + * generation pointer read wrt active reader count read, which ensures + * execution will not spill across loop execution. + * However, in the event mb()s are removed (execution using signal + * handler to promote barrier()() -> smp_mb()), nothing prevents one loop + * to spill its execution on other loop's execution. + */ + goto end; +rmb1: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb1_end; +rmb2: +#ifndef NO_RMB + smp_rmb(i); +#else + ooo_mem(i); +#endif + goto rmb2_end; +end: + skip; +} + + + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* no name clash please */ +#undef proc_urcu_reader + + +/* Model the RCU update process. */ + +/* + * Bit encoding, urcu_writer : + * Currently only supports one reader. + */ + +int _proc_urcu_writer; +#define proc_urcu_writer _proc_urcu_writer + +#define WRITE_PROD_NONE (1 << 0) + +#define WRITE_DATA (1 << 1) +#define WRITE_PROC_WMB (1 << 2) +#define WRITE_XCHG_PTR (1 << 3) + +#define WRITE_PROC_FIRST_MB (1 << 4) + +/* first flip */ +#define WRITE_PROC_FIRST_READ_GP (1 << 5) +#define WRITE_PROC_FIRST_WRITE_GP (1 << 6) +#define WRITE_PROC_FIRST_WAIT (1 << 7) +#define WRITE_PROC_FIRST_WAIT_LOOP (1 << 8) + +/* second flip */ +#define WRITE_PROC_SECOND_READ_GP (1 << 9) +#define WRITE_PROC_SECOND_WRITE_GP (1 << 10) +#define WRITE_PROC_SECOND_WAIT (1 << 11) +#define WRITE_PROC_SECOND_WAIT_LOOP (1 << 12) + +#define WRITE_PROC_SECOND_MB (1 << 13) + +#define WRITE_FREE (1 << 14) + +#define WRITE_PROC_ALL_TOKENS (WRITE_PROD_NONE \ + | WRITE_DATA \ + | WRITE_PROC_WMB \ + | WRITE_XCHG_PTR \ + | WRITE_PROC_FIRST_MB \ + | WRITE_PROC_FIRST_READ_GP \ + | WRITE_PROC_FIRST_WRITE_GP \ + | WRITE_PROC_FIRST_WAIT \ + | WRITE_PROC_SECOND_READ_GP \ + | WRITE_PROC_SECOND_WRITE_GP \ + | WRITE_PROC_SECOND_WAIT \ + | WRITE_PROC_SECOND_MB \ + | WRITE_FREE) + +#define WRITE_PROC_ALL_TOKENS_CLEAR ((1 << 15) - 1) + +/* + * Mutexes are implied around writer execution. A single writer at a time. + */ +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2, tmpa; + byte cur_data = 0, old_data, loop_nr = 0; + byte cur_gp_val = 0; /* + * Keep a local trace of the current parity so + * we don't add non-existing dependencies on the global + * GP update. Needed to test single flip case. + */ + + /* Keep in sync manually with smp_rmb, smp_wmb, ooo_mem and init() */ + DECLARE_PROC_CACHED_VAR(byte, urcu_gp_ctr); + /* Note ! currently only one reader */ + DECLARE_PROC_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); + /* RCU data */ + DECLARE_PROC_CACHED_VAR(bit, rcu_data[SLAB_SIZE]); + + /* RCU pointer */ +#if (SLAB_SIZE == 2) + DECLARE_PROC_CACHED_VAR(bit, rcu_ptr); +#else + DECLARE_PROC_CACHED_VAR(byte, rcu_ptr); +#endif + + atomic { + INIT_PROC_CACHED_VAR(urcu_gp_ctr, 1); + INIT_PROC_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_PROC_CACHED_VAR(urcu_active_readers[i], 0); + i++; + :: i >= NR_READERS -> break + od; + INIT_PROC_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_PROC_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + } + + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (loop_nr < 3) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + loop_nr = loop_nr + 1; + + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROD_NONE); + +#ifdef NO_WMB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); +#endif + +#ifdef NO_MB + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); +#endif + +#ifdef SINGLE_FLIP + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + /* For single flip, we need to know the current parity */ + cur_gp_val = cur_gp_val ^ RCU_GP_CTR_BIT; +#endif + + do :: 1 -> + atomic { + if + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROD_NONE, + WRITE_DATA) -> + ooo_mem(i); + cur_data = (cur_data + 1) % SLAB_SIZE; + WRITE_CACHED_VAR(rcu_data[cur_data], WINE); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_DATA); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA, + WRITE_PROC_WMB) -> + smp_wmb(i); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_WMB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_WMB, + WRITE_XCHG_PTR) -> + /* rcu_xchg_pointer() */ + atomic { + old_data = READ_CACHED_VAR(rcu_ptr); + WRITE_CACHED_VAR(rcu_ptr, cur_data); + } + PRODUCE_TOKENS(proc_urcu_writer, WRITE_XCHG_PTR); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR, + WRITE_PROC_FIRST_MB) -> + goto smp_mb_send1; +smp_mb_send1_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_MB); + + /* first flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB, + WRITE_PROC_FIRST_READ_GP) -> + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_MB | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP, + WRITE_PROC_FIRST_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_FIRST_WAIT | WRITE_PROC_FIRST_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); +#ifndef SINGLE_FLIP + /* In normal execution, we are always starting by + * waiting for the even parity. + */ + cur_gp_val = RCU_GP_CTR_BIT; +#endif + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ cur_gp_val) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send2; +smp_mb_send2_end: + /* The memory barrier will invalidate the + * second read done as prefetching. Note that all + * instructions with side-effects depending on + * WRITE_PROC_SECOND_READ_GP should also depend on + * completion of this busy-waiting loop. */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_FIRST_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_FIRST_WAIT_LOOP | WRITE_PROC_FIRST_WAIT); + + /* second flip */ + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WAIT | //test /* no dependency. Could pre-fetch, no side-effect. */ + WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_READ_GP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + tmpa = READ_CACHED_VAR(urcu_gp_ctr); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_READ_GP); + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT /* dependency on first wait, because this + * instruction has globally observable + * side-effects. + */ + | WRITE_PROC_FIRST_MB + | WRITE_PROC_WMB + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP, + WRITE_PROC_SECOND_WRITE_GP) -> + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmpa ^ RCU_GP_CTR_BIT); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WRITE_GP); + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + WRITE_PROC_SECOND_WAIT | WRITE_PROC_SECOND_WAIT_LOOP) -> + ooo_mem(i); + //smp_mb(i); /* TEST */ + /* ONLY WAITING FOR READER 0 */ + tmp2 = READ_CACHED_VAR(urcu_active_readers[0]); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ 0) & RCU_GP_CTR_BIT) -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP); + :: else -> + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT); + fi; + + :: CONSUME_TOKENS(proc_urcu_writer, + //WRITE_PROC_FIRST_WRITE_GP | /* TEST ADDING SYNC CORE */ + WRITE_PROC_SECOND_WRITE_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_WAIT_LOOP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, /* can be reordered before/after flips */ + 0) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + goto smp_mb_send3; +smp_mb_send3_end: +#else + ooo_mem(i); +#endif + /* This instruction loops to WRITE_PROC_SECOND_WAIT */ + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_WAIT_LOOP | WRITE_PROC_SECOND_WAIT); + + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_FIRST_READ_GP + | WRITE_PROC_SECOND_READ_GP + | WRITE_PROC_FIRST_WRITE_GP + | WRITE_PROC_SECOND_WRITE_GP + | WRITE_DATA | WRITE_PROC_WMB | WRITE_XCHG_PTR + | WRITE_PROC_FIRST_MB, + WRITE_PROC_SECOND_MB) -> + goto smp_mb_send4; +smp_mb_send4_end: + PRODUCE_TOKENS(proc_urcu_writer, WRITE_PROC_SECOND_MB); + + :: CONSUME_TOKENS(proc_urcu_writer, + WRITE_XCHG_PTR + | WRITE_PROC_FIRST_WAIT + | WRITE_PROC_SECOND_WAIT + | WRITE_PROC_WMB /* No dependency on + * WRITE_DATA because we + * write to a + * different location. */ + | WRITE_PROC_SECOND_MB + | WRITE_PROC_FIRST_MB, + WRITE_FREE) -> + WRITE_CACHED_VAR(rcu_data[old_data], POISON); + PRODUCE_TOKENS(proc_urcu_writer, WRITE_FREE); + + :: CONSUME_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS, 0) -> + CLEAR_TOKENS(proc_urcu_writer, WRITE_PROC_ALL_TOKENS_CLEAR); + break; + fi; + } + od; + /* + * Note : Promela model adds implicit serialization of the + * WRITE_FREE instruction. Normally, it would be permitted to + * spill on the next loop execution. Given the validation we do + * checks for the data entry read to be poisoned, it's ok if + * we do not check "late arriving" memory poisoning. + */ + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif +#ifdef READER_PROGRESS + /* + * Make sure we don't block the reader's progress. + */ + smp_mb_send(i, j, 5); +#endif + skip; + od; + + /* Non-atomic parts of the loop */ + goto end; +smp_mb_send1: + smp_mb_send(i, j, 1); + goto smp_mb_send1_end; +#ifndef GEN_ERROR_WRITER_PROGRESS +smp_mb_send2: + smp_mb_send(i, j, 2); + goto smp_mb_send2_end; +smp_mb_send3: + smp_mb_send(i, j, 3); + goto smp_mb_send3_end; +#endif +smp_mb_send4: + smp_mb_send(i, j, 4); + goto smp_mb_send4_end; +end: + skip; +} + +/* no name clash please */ +#undef proc_urcu_writer + + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1); + INIT_CACHED_VAR(rcu_ptr, 0); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0); + ptr_read_first[i] = 1; + ptr_read_second[i] = 1; + data_read_first[i] = WINE; + data_read_second[i] = WINE; + i++; + :: i >= NR_READERS -> break + od; + INIT_CACHED_VAR(rcu_data[0], WINE); + i = 1; + do + :: i < SLAB_SIZE -> + INIT_CACHED_VAR(rcu_data[i], POISON); + i++ + :: i >= SLAB_SIZE -> break + od; + + init_done = 1; + } +} diff --git a/urcu-controldataflow/urcu_free.ltl b/urcu-controldataflow/urcu_free.ltl new file mode 100644 index 0000000..6be1be9 --- /dev/null +++ b/urcu-controldataflow/urcu_free.ltl @@ -0,0 +1 @@ +[] (!read_poison) diff --git a/urcu-controldataflow/urcu_free_nested.define b/urcu-controldataflow/urcu_free_nested.define new file mode 100644 index 0000000..0fb59bd --- /dev/null +++ b/urcu-controldataflow/urcu_free_nested.define @@ -0,0 +1 @@ +#define READER_NEST_LEVEL 2 diff --git a/urcu-controldataflow/urcu_free_no_mb.define b/urcu-controldataflow/urcu_free_no_mb.define new file mode 100644 index 0000000..d99d793 --- /dev/null +++ b/urcu-controldataflow/urcu_free_no_mb.define @@ -0,0 +1 @@ +#define NO_MB diff --git a/urcu-controldataflow/urcu_free_no_rmb.define b/urcu-controldataflow/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-controldataflow/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-controldataflow/urcu_free_no_wmb.define b/urcu-controldataflow/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-controldataflow/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-controldataflow/urcu_free_single_flip.define b/urcu-controldataflow/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-controldataflow/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-controldataflow/urcu_progress.ltl b/urcu-controldataflow/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-controldataflow/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-controldataflow/urcu_progress_reader.define b/urcu-controldataflow/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-controldataflow/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-controldataflow/urcu_progress_writer.define b/urcu-controldataflow/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-controldataflow/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-controldataflow/urcu_progress_writer_error.define b/urcu-controldataflow/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-controldataflow/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-reader/DEFINES b/urcu-nosched-model/result-signal-over-reader/DEFINES new file mode 100644 index 0000000..2fcb038 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/DEFINES @@ -0,0 +1,17 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu-nosched-model/result-signal-over-reader/Makefile b/urcu-nosched-model/result-signal-over-reader/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-nosched-model/result-signal-over-reader/asserts.log b/urcu-nosched-model/result-signal-over-reader/asserts.log new file mode 100644 index 0000000..d317f57 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/asserts.log @@ -0,0 +1,312 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 4926 States= 1e+06 Transitions= 9.03e+06 Memory= 527.287 t= 5.98 R= 2e+05 +Depth= 7228 States= 2e+06 Transitions= 1.88e+07 Memory= 588.322 t= 12.9 R= 2e+05 +Depth= 7228 States= 3e+06 Transitions= 3.14e+07 Memory= 649.358 t= 21.9 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 7228 States= 4e+06 Transitions= 4.3e+07 Memory= 741.416 t= 30.3 R= 1e+05 +Depth= 7228 States= 5e+06 Transitions= 5.65e+07 Memory= 802.451 t= 39.6 R= 1e+05 +Depth= 7228 States= 6e+06 Transitions= 6.78e+07 Memory= 863.486 t= 47.5 R= 1e+05 +Depth= 7228 States= 7e+06 Transitions= 8.05e+07 Memory= 924.522 t= 56.5 R= 1e+05 +Depth= 7228 States= 8e+06 Transitions= 9.49e+07 Memory= 985.557 t= 66.8 R= 1e+05 +Depth= 7228 States= 9e+06 Transitions= 1.06e+08 Memory= 1046.592 t= 74.7 R= 1e+05 +pan: resizing hashtable to -w24.. done +Depth= 7228 States= 1e+07 Transitions= 1.18e+08 Memory= 1231.721 t= 84.9 R= 1e+05 +Depth= 7228 States= 1.1e+07 Transitions= 1.29e+08 Memory= 1292.756 t= 92.8 R= 1e+05 +Depth= 7228 States= 1.2e+07 Transitions= 1.4e+08 Memory= 1353.791 t= 100 R= 1e+05 +Depth= 7228 States= 1.3e+07 Transitions= 1.53e+08 Memory= 1414.826 t= 109 R= 1e+05 +Depth= 7228 States= 1.4e+07 Transitions= 1.65e+08 Memory= 1475.861 t= 117 R= 1e+05 +Depth= 7228 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1536.897 t= 126 R= 1e+05 +Depth= 7228 States= 1.6e+07 Transitions= 1.89e+08 Memory= 1597.932 t= 134 R= 1e+05 +Depth= 7228 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1658.967 t= 143 R= 1e+05 +Depth= 7228 States= 1.8e+07 Transitions= 2.16e+08 Memory= 1720.002 t= 153 R= 1e+05 +Depth= 7228 States= 1.9e+07 Transitions= 2.27e+08 Memory= 1781.037 t= 160 R= 1e+05 +Depth= 7228 States= 2e+07 Transitions= 2.39e+08 Memory= 1842.072 t= 169 R= 1e+05 +Depth= 7228 States= 2.1e+07 Transitions= 2.51e+08 Memory= 1903.108 t= 177 R= 1e+05 +Depth= 7228 States= 2.2e+07 Transitions= 2.62e+08 Memory= 1964.143 t= 185 R= 1e+05 +Depth= 7228 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2025.178 t= 194 R= 1e+05 +Depth= 7228 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2086.213 t= 203 R= 1e+05 +Depth= 7228 States= 2.5e+07 Transitions= 2.99e+08 Memory= 2147.248 t= 212 R= 1e+05 +Depth= 7228 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2208.283 t= 220 R= 1e+05 +Depth= 7228 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2269.318 t= 230 R= 1e+05 +Depth= 7228 States= 2.8e+07 Transitions= 3.37e+08 Memory= 2330.354 t= 239 R= 1e+05 +Depth= 7228 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2391.389 t= 248 R= 1e+05 +Depth= 7228 States= 3e+07 Transitions= 3.6e+08 Memory= 2452.424 t= 256 R= 1e+05 +Depth= 7228 States= 3.1e+07 Transitions= 3.72e+08 Memory= 2513.459 t= 265 R= 1e+05 +Depth= 7228 States= 3.2e+07 Transitions= 3.83e+08 Memory= 2574.494 t= 273 R= 1e+05 +Depth= 7228 States= 3.3e+07 Transitions= 3.95e+08 Memory= 2635.529 t= 282 R= 1e+05 +Depth= 7228 States= 3.4e+07 Transitions= 4.07e+08 Memory= 2696.565 t= 291 R= 1e+05 +pan: resizing hashtable to -w26.. done +Depth= 7228 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3253.682 t= 308 R= 1e+05 +Depth= 7228 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3314.717 t= 316 R= 1e+05 +Depth= 7228 States= 3.7e+07 Transitions= 4.45e+08 Memory= 3375.752 t= 325 R= 1e+05 +Depth= 7228 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3436.787 t= 334 R= 1e+05 +Depth= 7228 States= 3.9e+07 Transitions= 4.71e+08 Memory= 3497.822 t= 343 R= 1e+05 +Depth= 7228 States= 4e+07 Transitions= 4.82e+08 Memory= 3558.858 t= 350 R= 1e+05 +Depth= 7228 States= 4.1e+07 Transitions= 4.94e+08 Memory= 3619.893 t= 359 R= 1e+05 +Depth= 7228 States= 4.2e+07 Transitions= 5.04e+08 Memory= 3680.928 t= 366 R= 1e+05 +Depth= 7228 States= 4.3e+07 Transitions= 5.16e+08 Memory= 3741.963 t= 374 R= 1e+05 +Depth= 7228 States= 4.4e+07 Transitions= 5.29e+08 Memory= 3802.998 t= 383 R= 1e+05 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 56 byte, depth reached 7228, errors: 0 + 44157204 states, stored +4.8641845e+08 states, matched +5.3057565e+08 transitions (= stored+matched) +1.8453582e+09 atomic steps +hash conflicts: 2.8837553e+08 (resolved) + +Stats on memory usage (in Megabytes): + 3537.374 equivalent memory usage for states (stored*(State-vector + overhead)) + 2843.050 actual memory usage for states (compression: 80.37%) + state-vector as stored = 40 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 3812.568 total actual memory usage + +unreached in proctype urcu_reader + line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 61, "(1)" + line 417, ".input.spin", state 91, "(1)" + line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 158, "(1)" + line 417, ".input.spin", state 188, "(1)" + line 398, ".input.spin", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 256, "(1)" + line 417, ".input.spin", state 286, "(1)" + line 398, ".input.spin", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 395, "(1)" + line 417, ".input.spin", state 425, "(1)" + line 539, ".input.spin", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 398, ".input.spin", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 70, "(1)" + line 417, ".input.spin", state 100, "(1)" + line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 158, "(1)" + line 417, ".input.spin", state 188, "(1)" + line 398, ".input.spin", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 247, "(1)" + line 417, ".input.spin", state 277, "(1)" + line 398, ".input.spin", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 359, "(1)" + line 417, ".input.spin", state 389, "(1)" + line 613, ".input.spin", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 59, "(1)" + line 412, ".input.spin", state 72, "(1)" + line 417, ".input.spin", state 89, "(1)" + line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 153, "(1)" + line 412, ".input.spin", state 166, "(1)" + line 651, ".input.spin", state 199, "(1)" + line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 240, "(1)" + line 163, ".input.spin", state 248, "(1)" + line 167, ".input.spin", state 260, "(1)" + line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 370, "(1)" + line 163, ".input.spin", state 378, "(1)" + line 167, ".input.spin", state 390, "(1)" + line 398, ".input.spin", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 449, "(1)" + line 412, ".input.spin", state 462, "(1)" + line 417, ".input.spin", state 479, "(1)" + line 398, ".input.spin", state 498, "(1)" + line 402, ".input.spin", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 554, "(1)" + line 417, ".input.spin", state 571, "(1)" + line 402, ".input.spin", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 647, "(1)" + line 417, ".input.spin", state 664, "(1)" + line 178, ".input.spin", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 710, "(1)" + line 163, ".input.spin", state 718, "(1)" + line 167, ".input.spin", state 730, "(1)" + line 174, ".input.spin", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 840, "(1)" + line 163, ".input.spin", state 848, "(1)" + line 167, ".input.spin", state 860, "(1)" + line 398, ".input.spin", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 884, "(1)" + line 398, ".input.spin", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 885, "else" + line 398, ".input.spin", state 888, "(1)" + line 402, ".input.spin", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 898, "(1)" + line 402, ".input.spin", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 899, "else" + line 402, ".input.spin", state 902, "(1)" + line 402, ".input.spin", state 903, "(1)" + line 402, ".input.spin", state 903, "(1)" + line 400, ".input.spin", state 908, "((i<1))" + line 400, ".input.spin", state 908, "((i>=1))" + line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 927, "(1)" + line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, ".input.spin", state 928, "else" + line 408, ".input.spin", state 931, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 412, ".input.spin", state 940, "(1)" + line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, ".input.spin", state 941, "else" + line 412, ".input.spin", state 944, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 410, ".input.spin", state 950, "((i<1))" + line 410, ".input.spin", state 950, "((i>=1))" + line 417, ".input.spin", state 957, "(1)" + line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, ".input.spin", state 958, "else" + line 417, ".input.spin", state 961, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1040, "(1)" + line 417, ".input.spin", state 1057, "(1)" + line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1130, "(1)" + line 417, ".input.spin", state 1147, "(1)" + line 398, ".input.spin", state 1166, "(1)" + line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1222, "(1)" + line 417, ".input.spin", state 1239, "(1)" + line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1315, "(1)" + line 417, ".input.spin", state 1332, "(1)" + line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1378, "(1)" + line 163, ".input.spin", state 1386, "(1)" + line 167, ".input.spin", state 1398, "(1)" + line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1508, "(1)" + line 163, ".input.spin", state 1516, "(1)" + line 167, ".input.spin", state 1528, "(1)" + line 398, ".input.spin", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 1552, "(1)" + line 398, ".input.spin", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 1553, "else" + line 398, ".input.spin", state 1556, "(1)" + line 402, ".input.spin", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 1566, "(1)" + line 402, ".input.spin", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 1567, "else" + line 402, ".input.spin", state 1570, "(1)" + line 402, ".input.spin", state 1571, "(1)" + line 402, ".input.spin", state 1571, "(1)" + line 400, ".input.spin", state 1576, "((i<1))" + line 400, ".input.spin", state 1576, "((i>=1))" + line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 1595, "(1)" + line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, ".input.spin", state 1596, "else" + line 408, ".input.spin", state 1599, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 412, ".input.spin", state 1608, "(1)" + line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, ".input.spin", state 1609, "else" + line 412, ".input.spin", state 1612, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 410, ".input.spin", state 1618, "((i<1))" + line 410, ".input.spin", state 1618, "((i>=1))" + line 417, ".input.spin", state 1625, "(1)" + line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, ".input.spin", state 1626, "else" + line 417, ".input.spin", state 1629, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1681, "(1)" + line 163, ".input.spin", state 1689, "(1)" + line 167, ".input.spin", state 1701, "(1)" + line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1811, "(1)" + line 163, ".input.spin", state 1819, "(1)" + line 167, ".input.spin", state 1831, "(1)" + line 701, ".input.spin", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) + +pan: elapsed time 384 seconds +pan: rate 114968.77 states/second +pan: avg transition delay 7.2389e-07 usec +cp .input.spin asserts.spin.input +cp .input.spin.trail asserts.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/asserts.spin.input b/urcu-nosched-model/result-signal-over-reader/asserts.spin.input new file mode 100644 index 0000000..2d7f62d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/asserts.spin.input @@ -0,0 +1,722 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/asserts.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu-nosched-model/result-signal-over-reader/references.txt b/urcu-nosched-model/result-signal-over-reader/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-nosched-model/result-signal-over-reader/urcu.sh b/urcu-nosched-model/result-signal-over-reader/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-nosched-model/result-signal-over-reader/urcu.spin b/urcu-nosched-model/result-signal-over-reader/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free.log b/urcu-nosched-model/result-signal-over-reader/urcu_free.log new file mode 100644 index 0000000..a6ab537 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free.log @@ -0,0 +1,326 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) +Depth= 6837 States= 1e+06 Transitions= 9.03e+06 Memory= 534.904 t= 7.74 R= 1e+05 +Depth= 8887 States= 2e+06 Transitions= 1.88e+07 Memory= 603.557 t= 16.6 R= 1e+05 +Depth= 8887 States= 3e+06 Transitions= 3.14e+07 Memory= 672.209 t= 28 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 8887 States= 4e+06 Transitions= 4.33e+07 Memory= 771.885 t= 39.1 R= 1e+05 +Depth= 8887 States= 5e+06 Transitions= 5.65e+07 Memory= 840.635 t= 50.7 R= 1e+05 +Depth= 8887 States= 6e+06 Transitions= 6.79e+07 Memory= 909.287 t= 61 R= 1e+05 +Depth= 8887 States= 7e+06 Transitions= 8.08e+07 Memory= 977.940 t= 72.6 R= 1e+05 +Depth= 8887 States= 8e+06 Transitions= 9.5e+07 Memory= 1046.592 t= 85.5 R= 9e+04 +Depth= 8887 States= 9e+06 Transitions= 1.07e+08 Memory= 1115.342 t= 96.7 R= 9e+04 +pan: resizing hashtable to -w24.. done +Depth= 8887 States= 1e+07 Transitions= 1.18e+08 Memory= 1308.088 t= 108 R= 9e+04 +Depth= 8887 States= 1.1e+07 Transitions= 1.3e+08 Memory= 1376.740 t= 119 R= 9e+04 +Depth= 8887 States= 1.2e+07 Transitions= 1.41e+08 Memory= 1445.393 t= 128 R= 9e+04 +Depth= 8887 States= 1.3e+07 Transitions= 1.51e+08 Memory= 1514.045 t= 138 R= 9e+04 +Depth= 8887 States= 1.4e+07 Transitions= 1.64e+08 Memory= 1582.795 t= 149 R= 9e+04 +Depth= 8887 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1651.447 t= 160 R= 9e+04 +Depth= 8887 States= 1.6e+07 Transitions= 1.9e+08 Memory= 1720.100 t= 172 R= 9e+04 +Depth= 8887 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1788.752 t= 183 R= 9e+04 +Depth= 8887 States= 1.8e+07 Transitions= 2.15e+08 Memory= 1857.502 t= 194 R= 9e+04 +Depth= 8887 States= 1.9e+07 Transitions= 2.29e+08 Memory= 1926.154 t= 207 R= 9e+04 +Depth= 8887 States= 2e+07 Transitions= 2.4e+08 Memory= 1994.807 t= 217 R= 9e+04 +Depth= 8887 States= 2.1e+07 Transitions= 2.51e+08 Memory= 2063.459 t= 227 R= 9e+04 +Depth= 8887 States= 2.2e+07 Transitions= 2.63e+08 Memory= 2132.209 t= 238 R= 9e+04 +Depth= 8887 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2200.861 t= 248 R= 9e+04 +Depth= 8887 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2269.514 t= 259 R= 9e+04 +Depth= 8887 States= 2.5e+07 Transitions= 2.98e+08 Memory= 2338.166 t= 270 R= 9e+04 +Depth= 8887 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2406.916 t= 281 R= 9e+04 +Depth= 8887 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2475.568 t= 294 R= 9e+04 +Depth= 8887 States= 2.8e+07 Transitions= 3.36e+08 Memory= 2544.221 t= 305 R= 9e+04 +Depth= 8887 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2612.873 t= 317 R= 9e+04 +Depth= 8887 States= 3e+07 Transitions= 3.63e+08 Memory= 2681.526 t= 329 R= 9e+04 +Depth= 8887 States= 3.1e+07 Transitions= 3.73e+08 Memory= 2750.276 t= 339 R= 9e+04 +Depth= 8887 States= 3.2e+07 Transitions= 3.85e+08 Memory= 2818.928 t= 351 R= 9e+04 +Depth= 8887 States= 3.3e+07 Transitions= 3.97e+08 Memory= 2887.580 t= 362 R= 9e+04 +Depth= 8887 States= 3.4e+07 Transitions= 4.08e+08 Memory= 2956.233 t= 373 R= 9e+04 +pan: resizing hashtable to -w26.. done +Depth= 8887 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3520.967 t= 391 R= 9e+04 +Depth= 8887 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3589.619 t= 402 R= 9e+04 +Depth= 8887 States= 3.7e+07 Transitions= 4.44e+08 Memory= 3658.272 t= 413 R= 9e+04 +Depth= 8887 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3727.022 t= 425 R= 9e+04 +Depth= 8887 States= 3.9e+07 Transitions= 4.7e+08 Memory= 3795.674 t= 435 R= 9e+04 +Depth= 8887 States= 4e+07 Transitions= 4.83e+08 Memory= 3864.326 t= 447 R= 9e+04 +Depth= 8887 States= 4.1e+07 Transitions= 4.97e+08 Memory= 3932.979 t= 459 R= 9e+04 +Depth= 8887 States= 4.2e+07 Transitions= 5.07e+08 Memory= 4001.729 t= 468 R= 9e+04 +Depth= 8887 States= 4.3e+07 Transitions= 5.19e+08 Memory= 4070.381 t= 479 R= 9e+04 +Depth= 8887 States= 4.4e+07 Transitions= 5.31e+08 Memory= 4139.033 t= 489 R= 9e+04 +Depth= 8887 States= 4.5e+07 Transitions= 5.42e+08 Memory= 4207.686 t= 499 R= 9e+04 +Depth= 8887 States= 4.6e+07 Transitions= 5.54e+08 Memory= 4276.338 t= 510 R= 9e+04 +Depth= 8887 States= 4.7e+07 Transitions= 5.67e+08 Memory= 4345.088 t= 521 R= 9e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 8887, errors: 0 + 47143033 states, stored +5.2129161e+08 states, matched +5.6843464e+08 transitions (= stored+matched) +1.9783052e+09 atomic steps +hash conflicts: 3.1395137e+08 (resolved) + +Stats on memory usage (in Megabytes): + 4136.237 equivalent memory usage for states (stored*(State-vector + overhead)) + 3385.741 actual memory usage for states (compression: 81.86%) + state-vector as stored = 47 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 4354.854 total actual memory usage + +unreached in proctype urcu_reader + line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 61, "(1)" + line 417, "pan.___", state 91, "(1)" + line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 158, "(1)" + line 417, "pan.___", state 188, "(1)" + line 398, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 256, "(1)" + line 417, "pan.___", state 286, "(1)" + line 398, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 395, "(1)" + line 417, "pan.___", state 425, "(1)" + line 539, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 398, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 70, "(1)" + line 417, "pan.___", state 100, "(1)" + line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 158, "(1)" + line 417, "pan.___", state 188, "(1)" + line 398, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 247, "(1)" + line 417, "pan.___", state 277, "(1)" + line 398, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 359, "(1)" + line 417, "pan.___", state 389, "(1)" + line 613, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 59, "(1)" + line 412, "pan.___", state 72, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 153, "(1)" + line 412, "pan.___", state 166, "(1)" + line 651, "pan.___", state 199, "(1)" + line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 240, "(1)" + line 163, "pan.___", state 248, "(1)" + line 167, "pan.___", state 260, "(1)" + line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 370, "(1)" + line 163, "pan.___", state 378, "(1)" + line 167, "pan.___", state 390, "(1)" + line 398, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 449, "(1)" + line 412, "pan.___", state 462, "(1)" + line 417, "pan.___", state 479, "(1)" + line 398, "pan.___", state 498, "(1)" + line 402, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 554, "(1)" + line 417, "pan.___", state 571, "(1)" + line 402, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 647, "(1)" + line 417, "pan.___", state 664, "(1)" + line 178, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 710, "(1)" + line 163, "pan.___", state 718, "(1)" + line 167, "pan.___", state 730, "(1)" + line 174, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 840, "(1)" + line 163, "pan.___", state 848, "(1)" + line 167, "pan.___", state 860, "(1)" + line 398, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 884, "(1)" + line 398, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 885, "else" + line 398, "pan.___", state 888, "(1)" + line 402, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 898, "(1)" + line 402, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 899, "else" + line 402, "pan.___", state 902, "(1)" + line 402, "pan.___", state 903, "(1)" + line 402, "pan.___", state 903, "(1)" + line 400, "pan.___", state 908, "((i<1))" + line 400, "pan.___", state 908, "((i>=1))" + line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 927, "(1)" + line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, "pan.___", state 928, "else" + line 408, "pan.___", state 931, "(1)" + line 408, "pan.___", state 932, "(1)" + line 408, "pan.___", state 932, "(1)" + line 412, "pan.___", state 940, "(1)" + line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, "pan.___", state 941, "else" + line 412, "pan.___", state 944, "(1)" + line 412, "pan.___", state 945, "(1)" + line 412, "pan.___", state 945, "(1)" + line 410, "pan.___", state 950, "((i<1))" + line 410, "pan.___", state 950, "((i>=1))" + line 417, "pan.___", state 957, "(1)" + line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, "pan.___", state 958, "else" + line 417, "pan.___", state 961, "(1)" + line 417, "pan.___", state 962, "(1)" + line 417, "pan.___", state 962, "(1)" + line 419, "pan.___", state 965, "(1)" + line 419, "pan.___", state 965, "(1)" + line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1040, "(1)" + line 417, "pan.___", state 1057, "(1)" + line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1130, "(1)" + line 417, "pan.___", state 1147, "(1)" + line 398, "pan.___", state 1166, "(1)" + line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1222, "(1)" + line 417, "pan.___", state 1239, "(1)" + line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1315, "(1)" + line 417, "pan.___", state 1332, "(1)" + line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1378, "(1)" + line 163, "pan.___", state 1386, "(1)" + line 167, "pan.___", state 1398, "(1)" + line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1508, "(1)" + line 163, "pan.___", state 1516, "(1)" + line 167, "pan.___", state 1528, "(1)" + line 398, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 1552, "(1)" + line 398, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 1553, "else" + line 398, "pan.___", state 1556, "(1)" + line 402, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 1566, "(1)" + line 402, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 1567, "else" + line 402, "pan.___", state 1570, "(1)" + line 402, "pan.___", state 1571, "(1)" + line 402, "pan.___", state 1571, "(1)" + line 400, "pan.___", state 1576, "((i<1))" + line 400, "pan.___", state 1576, "((i>=1))" + line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1595, "(1)" + line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, "pan.___", state 1596, "else" + line 408, "pan.___", state 1599, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 412, "pan.___", state 1608, "(1)" + line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, "pan.___", state 1609, "else" + line 412, "pan.___", state 1612, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 410, "pan.___", state 1618, "((i<1))" + line 410, "pan.___", state 1618, "((i>=1))" + line 417, "pan.___", state 1625, "(1)" + line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, "pan.___", state 1626, "else" + line 417, "pan.___", state 1629, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1681, "(1)" + line 163, "pan.___", state 1689, "(1)" + line 167, "pan.___", state 1701, "(1)" + line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1811, "(1)" + line 163, "pan.___", state 1819, "(1)" + line 167, "pan.___", state 1831, "(1)" + line 701, "pan.___", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 748, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 523 seconds +pan: rate 90149.985 states/second +pan: avg transition delay 9.1997e-07 usec +cp .input.spin urcu_free.spin.input +cp .input.spin.trail urcu_free.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free.ltl b/urcu-nosched-model/result-signal-over-reader/urcu_free.ltl new file mode 100644 index 0000000..1954414 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free.ltl @@ -0,0 +1 @@ +[] (read_free -> !read_free_race) diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input new file mode 100644 index 0000000..2d7f62d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input @@ -0,0 +1,722 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input.trail new file mode 100644 index 0000000..837f3d9 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free.spin.input.trail @@ -0,0 +1,15043 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 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a/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.log b/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.log new file mode 100644 index 0000000..d503334 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.log @@ -0,0 +1,20 @@ +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_nested.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) +Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.48 R= 1e+05 +Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.6 R= 1e+05 +Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.3 R= 1e+05 diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input new file mode 100644 index 0000000..c94928c --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input @@ -0,0 +1,696 @@ +#define READER_NEST_LEVEL 1 + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE +#define get_pid() ((_pid < 1) -> 0 : 1) +#elif defined(TEST_SIGNAL_ON_READ) +#define get_pid() ((_pid < 2) -> 0 : 1) +#else +#define get_pid() (_pid) +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + dispatch_sighand_read_exec(); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 1; + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input.trail new file mode 100644 index 0000000..6f29ad2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_nested.spin.input.trail @@ -0,0 +1,11161 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 +25:4:4362 +26:0:4365 +27:3:2331 +28:0:4365 +29:3:2337 +30:0:4365 +31:3:2338 +32:0:4365 +33:3:2339 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/dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.log b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.log new file mode 100644 index 0000000..3afaead --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.log @@ -0,0 +1,303 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +Depth= 6009 States= 1e+06 Transitions= 1.08e+07 Memory= 534.904 t= 9.22 R= 1e+05 +Depth= 6009 States= 2e+06 Transitions= 3.4e+07 Memory= 603.557 t= 31.1 R= 6e+04 +Depth= 7527 States= 3e+06 Transitions= 4.91e+07 Memory= 672.209 t= 45.6 R= 7e+04 +pan: resizing hashtable to -w22.. done +Depth= 68651 States= 4e+06 Transitions= 6.74e+07 Memory= 772.080 t= 62.9 R= 6e+04 +Depth= 68651 States= 5e+06 Transitions= 8.62e+07 Memory= 840.733 t= 80.2 R= 6e+04 +Depth= 68651 States= 6e+06 Transitions= 1.03e+08 Memory= 909.385 t= 95.7 R= 6e+04 +Depth= 68651 States= 7e+06 Transitions= 1.21e+08 Memory= 978.037 t= 112 R= 6e+04 +Depth= 68651 States= 8e+06 Transitions= 1.37e+08 Memory= 1046.690 t= 128 R= 6e+04 +Depth= 68651 States= 9e+06 Transitions= 1.52e+08 Memory= 1115.440 t= 143 R= 6e+04 +pan: resizing hashtable to -w24.. done +Depth= 68651 States= 1e+07 Transitions= 1.72e+08 Memory= 1308.186 t= 163 R= 6e+04 +Depth= 68651 States= 1.1e+07 Transitions= 1.89e+08 Memory= 1376.838 t= 178 R= 6e+04 +Depth= 68651 States= 1.2e+07 Transitions= 2.05e+08 Memory= 1445.490 t= 193 R= 6e+04 +Depth= 68651 States= 1.3e+07 Transitions= 2.22e+08 Memory= 1514.143 t= 208 R= 6e+04 +Depth= 68651 States= 1.4e+07 Transitions= 2.39e+08 Memory= 1582.893 t= 224 R= 6e+04 +pan: claim violated! (at depth 2141) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 68651, errors: 1 + 14155711 states, stored +2.2815817e+08 states, matched +2.4231388e+08 transitions (= stored+matched) +8.5461256e+08 atomic steps +hash conflicts: 1.1483359e+08 (resolved) + +Stats on memory usage (in Megabytes): + 1565.993 equivalent memory usage for states (stored*(State-vector + overhead)) + 1008.042 actual memory usage for states (compression: 64.37%) + state-vector as stored = 47 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1593.537 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 227, "(1)" + line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 256, "(1)" + line 419, "pan.___", state 286, "(1)" + line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 366, "(1)" + line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 395, "(1)" + line 419, "pan.___", state 425, "(1)" + line 541, "pan.___", state 456, "-end-" + (19 of 456 states) +unreached in proctype urcu_reader_sig + line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 70, "(1)" + line 419, "pan.___", state 100, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 247, "(1)" + line 419, "pan.___", state 277, "(1)" + line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 330, "(1)" + line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 359, "(1)" + line 419, "pan.___", state 389, "(1)" + line 615, "pan.___", state 411, "-end-" + (18 of 411 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 421, "pan.___", state 97, "(1)" + line 421, "pan.___", state 97, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 410, "pan.___", state 153, "(1)" + line 414, "pan.___", state 166, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 653, "pan.___", state 199, "(1)" + line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 254, "(1)" + line 414, "pan.___", state 267, "(1)" + line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 345, "(1)" + line 414, "pan.___", state 358, "(1)" + line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 440, "(1)" + line 414, "pan.___", state 453, "(1)" + line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 533, "(1)" + line 414, "pan.___", state 546, "(1)" + line 400, "pan.___", state 582, "(1)" + line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 638, "(1)" + line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 731, "(1)" + line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 821, "(1)" + line 419, "pan.___", state 838, "(1)" + line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 912, "(1)" + line 419, "pan.___", state 929, "(1)" + line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1007, "(1)" + line 419, "pan.___", state 1024, "(1)" + line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1053, "else" + line 400, "pan.___", state 1056, "(1)" + line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1066, "(1)" + line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1067, "else" + line 404, "pan.___", state 1070, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 402, "pan.___", state 1076, "((i<1))" + line 402, "pan.___", state 1076, "((i>=1))" + line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1095, "(1)" + line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1096, "else" + line 410, "pan.___", state 1099, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 414, "pan.___", state 1108, "(1)" + line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1109, "else" + line 414, "pan.___", state 1112, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 412, "pan.___", state 1118, "((i<1))" + line 412, "pan.___", state 1118, "((i>=1))" + line 419, "pan.___", state 1125, "(1)" + line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1126, "else" + line 419, "pan.___", state 1129, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1208, "(1)" + line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1298, "(1)" + line 400, "pan.___", state 1334, "(1)" + line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1390, "(1)" + line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1483, "(1)" + line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1573, "(1)" + line 419, "pan.___", state 1590, "(1)" + line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1664, "(1)" + line 419, "pan.___", state 1681, "(1)" + line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1759, "(1)" + line 419, "pan.___", state 1776, "(1)" + line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1804, "(1)" + line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1805, "else" + line 400, "pan.___", state 1808, "(1)" + line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1818, "(1)" + line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1819, "else" + line 404, "pan.___", state 1822, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 402, "pan.___", state 1828, "((i<1))" + line 402, "pan.___", state 1828, "((i>=1))" + line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1847, "(1)" + line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1848, "else" + line 410, "pan.___", state 1851, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 414, "pan.___", state 1860, "(1)" + line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1861, "else" + line 414, "pan.___", state 1864, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 412, "pan.___", state 1870, "((i<1))" + line 412, "pan.___", state 1870, "((i>=1))" + line 419, "pan.___", state 1877, "(1)" + line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1878, "else" + line 419, "pan.___", state 1881, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1960, "(1)" + line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 2051, "(1)" + line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 2146, "(1)" + line 703, "pan.___", state 2192, "-end-" + (144 of 2192 states) +unreached in proctype :init: + line 710, "pan.___", state 9, "((j<2))" + line 710, "pan.___", state 9, "((j>=2))" + line 711, "pan.___", state 20, "((j<2))" + line 711, "pan.___", state 20, "((j>=2))" + line 716, "pan.___", state 33, "((j<2))" + line 716, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 750, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 227 seconds +pan: rate 62472.797 states/second +pan: avg transition delay 9.3511e-07 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..5de16b8 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input @@ -0,0 +1,724 @@ +#define NO_RMB +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..d437aad --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2144 @@ +-2:4:-2 +-4:-4:-4 +1:0:3107 +2:4:3059 +3:4:3062 +4:4:3062 +5:4:3065 +6:4:3073 +7:4:3073 +8:4:3076 +9:4:3082 +10:4:3086 +11:4:3086 +12:4:3089 +13:4:3097 +14:4:3101 +15:4:3102 +16:0:3107 +17:4:3104 +18:0:3107 +19:3:869 +20:0:3107 +21:3:875 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+2119:0:3107 +2120:3:3052 +2121:0:3107 +2122:2:741 +2123:0:3107 +2124:3:3053 +2125:0:3107 +2126:2:750 +2127:0:3107 +2128:3:3052 +2129:0:3107 +2130:2:753 +2131:0:3107 +2132:3:3053 +2133:0:3107 +2134:2:758 +2135:0:3107 +2136:3:3052 +2137:0:3107 +2138:2:759 +2139:0:3105 +2140:3:3053 +2141:0:3111 +2142:2:647 diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.define b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.log b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.log new file mode 100644 index 0000000..5bcef22 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.log @@ -0,0 +1,300 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 5678 States= 1e+06 Transitions= 8.21e+06 Memory= 534.904 t= 6.72 R= 1e+05 +Depth= 5678 States= 2e+06 Transitions= 1.6e+07 Memory= 603.557 t= 13.4 R= 1e+05 +Depth= 16003 States= 3e+06 Transitions= 2.49e+07 Memory= 672.209 t= 21.5 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 31043 States= 4e+06 Transitions= 3.44e+07 Memory= 771.983 t= 30.1 R= 1e+05 +Depth= 31043 States= 5e+06 Transitions= 4.41e+07 Memory= 840.635 t= 38.4 R= 1e+05 +Depth= 31043 States= 6e+06 Transitions= 5.25e+07 Memory= 909.287 t= 45.7 R= 1e+05 +Depth= 31043 States= 7e+06 Transitions= 6.12e+07 Memory= 977.940 t= 53.4 R= 1e+05 +Depth= 31043 States= 8e+06 Transitions= 6.95e+07 Memory= 1046.690 t= 60.8 R= 1e+05 +Depth= 31043 States= 9e+06 Transitions= 7.78e+07 Memory= 1115.342 t= 68.5 R= 1e+05 +pan: resizing hashtable to -w24.. done +Depth= 31043 States= 1e+07 Transitions= 8.68e+07 Memory= 1308.088 t= 77.9 R= 1e+05 +Depth= 31043 States= 1.1e+07 Transitions= 1.01e+08 Memory= 1376.740 t= 90.1 R= 1e+05 +Depth= 31043 States= 1.2e+07 Transitions= 1.13e+08 Memory= 1445.393 t= 101 R= 1e+05 +Depth= 31043 States= 1.3e+07 Transitions= 1.25e+08 Memory= 1514.045 t= 111 R= 1e+05 +Depth= 31043 States= 1.4e+07 Transitions= 1.38e+08 Memory= 1582.795 t= 122 R= 1e+05 +pan: claim violated! (at depth 1774) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 31043, errors: 1 + 14288659 states, stored +1.2755714e+08 states, matched +1.418458e+08 transitions (= stored+matched) +4.6616273e+08 atomic steps +hash conflicts: 65726574 (resolved) + +Stats on memory usage (in Megabytes): + 1253.659 equivalent memory usage for states (stored*(State-vector + overhead)) + 1017.191 actual memory usage for states (compression: 81.14%) + state-vector as stored = 47 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1602.619 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 291, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 304, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 320, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 334, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 352, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 365, "(1)" + line 413, "pan.___", state 378, "(1)" + line 418, "pan.___", state 395, "(1)" + line 399, "pan.___", state 414, "(1)" + line 403, "pan.___", state 426, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 444, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 470, "(1)" + line 418, "pan.___", state 487, "(1)" + line 403, "pan.___", state 519, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 537, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 563, "(1)" + line 418, "pan.___", state 580, "(1)" + line 179, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 629, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 677, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 690, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 714, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 716, "(1)" + line 399, "pan.___", state 717, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 717, "else" + line 399, "pan.___", state 720, "(1)" + line 403, "pan.___", state 728, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 730, "(1)" + line 403, "pan.___", state 731, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 731, "else" + line 403, "pan.___", state 734, "(1)" + line 403, "pan.___", state 735, "(1)" + line 403, "pan.___", state 735, "(1)" + line 401, "pan.___", state 740, "((i<1))" + line 401, "pan.___", state 740, "((i>=1))" + line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 759, "(1)" + line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 760, "else" + line 409, "pan.___", state 763, "(1)" + line 409, "pan.___", state 764, "(1)" + line 409, "pan.___", state 764, "(1)" + line 413, "pan.___", state 772, "(1)" + line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 773, "else" + line 413, "pan.___", state 776, "(1)" + line 413, "pan.___", state 777, "(1)" + line 413, "pan.___", state 777, "(1)" + line 411, "pan.___", state 782, "((i<1))" + line 411, "pan.___", state 782, "((i>=1))" + line 418, "pan.___", state 789, "(1)" + line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 790, "else" + line 418, "pan.___", state 793, "(1)" + line 418, "pan.___", state 794, "(1)" + line 418, "pan.___", state 794, "(1)" + line 420, "pan.___", state 797, "(1)" + line 420, "pan.___", state 797, "(1)" + line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 872, "(1)" + line 418, "pan.___", state 889, "(1)" + line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 962, "(1)" + line 418, "pan.___", state 979, "(1)" + line 399, "pan.___", state 998, "(1)" + line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1054, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1147, "(1)" + line 418, "pan.___", state 1164, "(1)" + line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1261, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1300, "(1)" + line 399, "pan.___", state 1301, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1301, "else" + line 399, "pan.___", state 1304, "(1)" + line 403, "pan.___", state 1312, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1314, "(1)" + line 403, "pan.___", state 1315, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1315, "else" + line 403, "pan.___", state 1318, "(1)" + line 403, "pan.___", state 1319, "(1)" + line 403, "pan.___", state 1319, "(1)" + line 401, "pan.___", state 1324, "((i<1))" + line 401, "pan.___", state 1324, "((i>=1))" + line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1343, "(1)" + line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1344, "else" + line 409, "pan.___", state 1347, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 413, "pan.___", state 1356, "(1)" + line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1357, "else" + line 413, "pan.___", state 1360, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 411, "pan.___", state 1366, "((i<1))" + line 411, "pan.___", state 1366, "((i>=1))" + line 418, "pan.___", state 1373, "(1)" + line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1374, "else" + line 418, "pan.___", state 1377, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1480, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1493, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 702, "pan.___", state 1520, "-end-" + (144 of 1520 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 125 seconds +pan: rate 114108.44 states/second +pan: avg transition delay 8.8279e-07 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..ccf5f5c --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input @@ -0,0 +1,723 @@ +#define NO_RMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..1e5e132 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1777 @@ +-2:4:-2 +-4:-4:-4 +1:0:2435 +2:4:2387 +3:4:2390 +4:4:2390 +5:4:2393 +6:4:2401 +7:4:2401 +8:4:2404 +9:4:2410 +10:4:2414 +11:4:2414 +12:4:2417 +13:4:2425 +14:4:2429 +15:4:2430 +16:0:2435 +17:4:2432 +18:0:2435 +19:3:869 +20:0:2435 +21:3:875 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+1735:2:659 +1736:2:667 +1737:2:668 +1738:2:672 +1739:2:673 +1740:2:681 +1741:2:686 +1742:2:690 +1743:2:691 +1744:2:698 +1745:2:699 +1746:2:710 +1747:2:711 +1748:2:712 +1749:2:723 +1750:2:735 +1751:2:736 +1752:0:2435 +1753:3:2380 +1754:0:2435 +1755:2:741 +1756:0:2435 +1757:3:2381 +1758:0:2435 +1759:2:750 +1760:0:2435 +1761:3:2380 +1762:0:2435 +1763:2:753 +1764:0:2435 +1765:3:2381 +1766:0:2435 +1767:2:758 +1768:0:2435 +1769:3:2380 +1770:0:2435 +1771:2:759 +1772:0:2433 +1773:3:2381 +1774:0:2439 +1775:0:2435 diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.define b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.log b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.log new file mode 100644 index 0000000..0423ec5 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.log @@ -0,0 +1,320 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 10656 States= 1e+06 Transitions= 8.86e+06 Memory= 534.807 t= 7.38 R= 1e+05 +Depth= 35214 States= 2e+06 Transitions= 1.82e+07 Memory= 603.557 t= 15.5 R= 1e+05 +Depth= 35214 States= 3e+06 Transitions= 2.73e+07 Memory= 672.209 t= 23.8 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 35214 States= 4e+06 Transitions= 4.08e+07 Memory= 771.885 t= 35.9 R= 1e+05 +pan: claim violated! (at depth 1650) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 35214, errors: 1 + 4154272 states, stored + 38595853 states, matched + 42750125 transitions (= stored+matched) +1.4058824e+08 atomic steps +hash conflicts: 21492325 (resolved) + +Stats on memory usage (in Megabytes): + 364.488 equivalent memory usage for states (stored*(State-vector + overhead)) + 292.863 actual memory usage for states (compression: 80.35%) + state-vector as stored = 46 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 782.529 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 227, "(1)" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 366, "(1)" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (19 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 330, "(1)" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (18 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 401, "pan.___", state 134, "((i<1))" + line 401, "pan.___", state 134, "((i>=1))" + line 409, "pan.___", state 153, "(1)" + line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 154, "else" + line 409, "pan.___", state 157, "(1)" + line 409, "pan.___", state 158, "(1)" + line 409, "pan.___", state 158, "(1)" + line 413, "pan.___", state 166, "(1)" + line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 167, "else" + line 413, "pan.___", state 170, "(1)" + line 413, "pan.___", state 171, "(1)" + line 413, "pan.___", state 171, "(1)" + line 411, "pan.___", state 176, "((i<1))" + line 411, "pan.___", state 176, "((i>=1))" + line 418, "pan.___", state 183, "(1)" + line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 184, "else" + line 418, "pan.___", state 187, "(1)" + line 418, "pan.___", state 188, "(1)" + line 418, "pan.___", state 188, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 369, "pan.___", state 193, "(1)" + line 652, "pan.___", state 199, "(1)" + line 646, "pan.___", state 202, "((write_lock==0))" + line 646, "pan.___", state 202, "else" + line 644, "pan.___", state 203, "(1)" + line 160, "pan.___", state 209, "(1)" + line 164, "pan.___", state 217, "(1)" + line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 164, "pan.___", state 218, "else" + line 162, "pan.___", state 223, "((j<1))" + line 162, "pan.___", state 223, "((j>=1))" + line 168, "pan.___", state 229, "(1)" + line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 168, "pan.___", state 230, "else" + line 160, "pan.___", state 241, "(1)" + line 168, "pan.___", state 261, "(1)" + line 160, "pan.___", state 277, "(1)" + line 164, "pan.___", state 285, "(1)" + line 168, "pan.___", state 297, "(1)" + line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 356, "(1)" + line 413, "pan.___", state 369, "(1)" + line 418, "pan.___", state 386, "(1)" + line 399, "pan.___", state 405, "(1)" + line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 461, "(1)" + line 418, "pan.___", state 478, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 164, "pan.___", state 594, "(1)" + line 168, "pan.___", state 606, "(1)" + line 160, "pan.___", state 618, "(1)" + line 168, "pan.___", state 638, "(1)" + line 164, "pan.___", state 662, "(1)" + line 168, "pan.___", state 674, "(1)" + line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 698, "(1)" + line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 699, "else" + line 399, "pan.___", state 702, "(1)" + line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 712, "(1)" + line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 713, "else" + line 403, "pan.___", state 716, "(1)" + line 403, "pan.___", state 717, "(1)" + line 403, "pan.___", state 717, "(1)" + line 401, "pan.___", state 722, "((i<1))" + line 401, "pan.___", state 722, "((i>=1))" + line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 741, "(1)" + line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 742, "else" + line 409, "pan.___", state 745, "(1)" + line 409, "pan.___", state 746, "(1)" + line 409, "pan.___", state 746, "(1)" + line 413, "pan.___", state 754, "(1)" + line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 755, "else" + line 413, "pan.___", state 758, "(1)" + line 413, "pan.___", state 759, "(1)" + line 413, "pan.___", state 759, "(1)" + line 411, "pan.___", state 764, "((i<1))" + line 411, "pan.___", state 764, "((i>=1))" + line 418, "pan.___", state 771, "(1)" + line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 772, "else" + line 418, "pan.___", state 775, "(1)" + line 418, "pan.___", state 776, "(1)" + line 418, "pan.___", state 776, "(1)" + line 420, "pan.___", state 779, "(1)" + line 420, "pan.___", state 779, "(1)" + line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 854, "(1)" + line 418, "pan.___", state 871, "(1)" + line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 944, "(1)" + line 418, "pan.___", state 961, "(1)" + line 399, "pan.___", state 980, "(1)" + line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1036, "(1)" + line 418, "pan.___", state 1053, "(1)" + line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1129, "(1)" + line 418, "pan.___", state 1146, "(1)" + line 164, "pan.___", state 1169, "(1)" + line 168, "pan.___", state 1181, "(1)" + line 160, "pan.___", state 1193, "(1)" + line 168, "pan.___", state 1213, "(1)" + line 164, "pan.___", state 1237, "(1)" + line 168, "pan.___", state 1249, "(1)" + line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1273, "(1)" + line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1274, "else" + line 399, "pan.___", state 1277, "(1)" + line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1287, "(1)" + line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1288, "else" + line 403, "pan.___", state 1291, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 401, "pan.___", state 1297, "((i<1))" + line 401, "pan.___", state 1297, "((i>=1))" + line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1316, "(1)" + line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1317, "else" + line 409, "pan.___", state 1320, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 413, "pan.___", state 1329, "(1)" + line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1330, "else" + line 413, "pan.___", state 1333, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 411, "pan.___", state 1339, "((i<1))" + line 411, "pan.___", state 1339, "((i>=1))" + line 418, "pan.___", state 1346, "(1)" + line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1347, "else" + line 418, "pan.___", state 1350, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 164, "pan.___", state 1379, "(1)" + line 168, "pan.___", state 1391, "(1)" + line 160, "pan.___", state 1403, "(1)" + line 168, "pan.___", state 1423, "(1)" + line 164, "pan.___", state 1447, "(1)" + line 168, "pan.___", state 1459, "(1)" + line 702, "pan.___", state 1484, "-end-" + (160 of 1484 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 37.6 seconds +pan: rate 110515.35 states/second +pan: avg transition delay 8.793e-07 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..d5d174d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input @@ -0,0 +1,723 @@ +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..f2ce974 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1653 @@ +-2:4:-2 +-4:-4:-4 +1:0:2399 +2:4:2351 +3:4:2354 +4:4:2354 +5:4:2357 +6:4:2365 +7:4:2365 +8:4:2368 +9:4:2374 +10:4:2378 +11:4:2378 +12:4:2381 +13:4:2389 +14:4:2393 +15:4:2394 +16:0:2399 +17:4:2396 +18:0:2399 +19:3:869 +20:0:2399 +21:3:875 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b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.log b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.log new file mode 100644 index 0000000..5d7d35c --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.log @@ -0,0 +1,217 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 8352 States= 1e+06 Transitions= 1.05e+07 Memory= 534.807 t= 8.93 R= 1e+05 +pan: claim violated! (at depth 1352) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 8352, errors: 1 + 1456373 states, stored + 13442538 states, matched + 14898911 transitions (= stored+matched) + 50580660 atomic steps +hash conflicts: 5166006 (resolved) + +Stats on memory usage (in Megabytes): + 127.779 equivalent memory usage for states (stored*(State-vector + overhead)) + 100.443 actual memory usage for states (compression: 78.61%) + state-vector as stored = 44 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 566.154 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 370, "(1)" + line 164, "pan.___", state 378, "(1)" + line 168, "pan.___", state 390, "(1)" + line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 449, "(1)" + line 413, "pan.___", state 462, "(1)" + line 418, "pan.___", state 479, "(1)" + line 399, "pan.___", state 498, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 647, "(1)" + line 418, "pan.___", state 664, "(1)" + line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 710, "(1)" + line 164, "pan.___", state 718, "(1)" + line 168, "pan.___", state 730, "(1)" + line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 840, "(1)" + line 164, "pan.___", state 848, "(1)" + line 168, "pan.___", state 860, "(1)" + line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 884, "(1)" + line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 885, "else" + line 399, "pan.___", state 888, "(1)" + line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 898, "(1)" + line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 899, "else" + line 403, "pan.___", state 902, "(1)" + line 403, "pan.___", state 903, "(1)" + line 403, "pan.___", state 903, "(1)" + line 401, "pan.___", state 908, "((i<1))" + line 401, "pan.___", state 908, "((i>=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1013, "(1)" + line 164, "pan.___", state 1021, "(1)" + line 168, "pan.___", state 1033, "(1)" + line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1133, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1143, "(1)" + line 164, "pan.___", state 1151, "(1)" + line 168, "pan.___", state 1163, "(1)" + line 702, "pan.___", state 1188, "-end-" + (100 of 1188 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 12.8 seconds +pan: rate 113424.69 states/second +pan: avg transition delay 8.6181e-07 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..103464e --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input @@ -0,0 +1,723 @@ +#define SINGLE_FLIP + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..e81c46c --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1355 @@ +-2:4:-2 +-4:-4:-4 +1:0:2103 +2:4:2055 +3:4:2058 +4:4:2058 +5:4:2061 +6:4:2069 +7:4:2069 +8:4:2072 +9:4:2078 +10:4:2082 +11:4:2082 +12:4:2085 +13:4:2093 +14:4:2097 +15:4:2098 +16:0:2103 +17:4:2100 +18:0:2103 +19:3:869 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+1348:0:2103 +1349:2:759 +1350:0:2101 +1351:3:2049 +1352:0:2107 +1353:3:1181 diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress.ltl b/urcu-nosched-model/result-signal-over-reader/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.define b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.log b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.log new file mode 100644 index 0000000..e3ec127 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.log @@ -0,0 +1,506 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 1803: Claim reached state 9 (line 748) +Depth= 5838 States= 1e+06 Transitions= 1.06e+07 Memory= 494.865 t= 9.24 R= 1e+05 +Depth= 5838 States= 2e+06 Transitions= 1.97e+07 Memory= 532.658 t= 17.7 R= 1e+05 +Depth= 5838 States= 3e+06 Transitions= 3.15e+07 Memory= 555.315 t= 28.4 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 6855 States= 4e+06 Transitions= 4.32e+07 Memory= 613.096 t= 39.1 R= 1e+05 +Depth= 9059 States= 5e+06 Transitions= 5.48e+07 Memory= 642.295 t= 49.5 R= 1e+05 +Depth= 9059 States= 6e+06 Transitions= 6.91e+07 Memory= 672.178 t= 62.5 R= 1e+05 +Depth= 9059 States= 7e+06 Transitions= 7.99e+07 Memory= 706.455 t= 72.5 R= 1e+05 +Depth= 9059 States= 8e+06 Transitions= 9.23e+07 Memory= 735.752 t= 84 R= 1e+05 +Depth= 9059 States= 9e+06 Transitions= 1.04e+08 Memory= 766.318 t= 94.5 R= 1e+05 +pan: resizing hashtable to -w24.. done +Depth= 9059 States= 1e+07 Transitions= 1.16e+08 Memory= 920.002 t= 106 R= 9e+04 +Depth= 9059 States= 1.1e+07 Transitions= 1.3e+08 Memory= 945.002 t= 119 R= 9e+04 +Depth= 9059 States= 1.2e+07 Transitions= 1.54e+08 Memory= 967.756 t= 140 R= 9e+04 +Depth= 9059 States= 1.3e+07 Transitions= 1.72e+08 Memory= 995.002 t= 157 R= 8e+04 +Depth= 9059 States= 1.4e+07 Transitions= 1.92e+08 Memory= 1022.736 t= 175 R= 8e+04 +Depth= 9059 States= 1.5e+07 Transitions= 2.1e+08 Memory= 1050.080 t= 191 R= 8e+04 +Depth= 9059 States= 1.6e+07 Transitions= 2.22e+08 Memory= 1082.502 t= 203 R= 8e+04 +Depth= 9059 States= 1.7e+07 Transitions= 2.41e+08 Memory= 1108.479 t= 219 R= 8e+04 +Depth= 9059 States= 1.8e+07 Transitions= 2.58e+08 Memory= 1134.455 t= 235 R= 8e+04 +Depth= 9059 States= 1.9e+07 Transitions= 2.7e+08 Memory= 1164.533 t= 246 R= 8e+04 +Depth= 9059 States= 2e+07 Transitions= 2.83e+08 Memory= 1193.830 t= 258 R= 8e+04 +Depth= 9059 States= 2.1e+07 Transitions= 3.03e+08 Memory= 1219.026 t= 276 R= 8e+04 +Depth= 9059 States= 2.2e+07 Transitions= 3.19e+08 Memory= 1248.420 t= 291 R= 8e+04 +Depth= 9059 States= 2.3e+07 Transitions= 3.42e+08 Memory= 1271.858 t= 312 R= 7e+04 +Depth= 9059 States= 2.4e+07 Transitions= 3.6e+08 Memory= 1298.908 t= 328 R= 7e+04 +Depth= 9059 States= 2.5e+07 Transitions= 3.84e+08 Memory= 1323.127 t= 350 R= 7e+04 +Depth= 9059 States= 2.6e+07 Transitions= 4e+08 Memory= 1348.518 t= 365 R= 7e+04 +Depth= 9059 States= 2.7e+07 Transitions= 4.16e+08 Memory= 1379.865 t= 380 R= 7e+04 +Depth= 9059 States= 2.8e+07 Transitions= 4.26e+08 Memory= 1411.115 t= 389 R= 7e+04 +Depth= 9059 States= 2.9e+07 Transitions= 4.42e+08 Memory= 1439.631 t= 404 R= 7e+04 +Depth= 9059 States= 3e+07 Transitions= 4.64e+08 Memory= 1462.385 t= 423 R= 7e+04 +Depth= 9059 States= 3.1e+07 Transitions= 4.82e+08 Memory= 1490.998 t= 439 R= 7e+04 +Depth= 9059 States= 3.2e+07 Transitions= 4.99e+08 Memory= 1519.514 t= 456 R= 7e+04 +Depth= 9059 States= 3.3e+07 Transitions= 5.18e+08 Memory= 1545.393 t= 473 R= 7e+04 +Depth= 9059 States= 3.4e+07 Transitions= 5.33e+08 Memory= 1578.108 t= 486 R= 7e+04 +pan: resizing hashtable to -w26.. done +Depth= 9059 States= 3.5e+07 Transitions= 5.49e+08 Memory= 2098.994 t= 504 R= 7e+04 +Depth= 9059 States= 3.6e+07 Transitions= 5.74e+08 Memory= 2121.651 t= 528 R= 7e+04 +Depth= 9059 States= 3.7e+07 Transitions= 5.96e+08 Memory= 2147.334 t= 547 R= 7e+04 +Depth= 9059 States= 3.8e+07 Transitions= 6.17e+08 Memory= 2170.186 t= 567 R= 7e+04 +Depth= 9059 States= 3.9e+07 Transitions= 6.3e+08 Memory= 2199.776 t= 578 R= 7e+04 +Depth= 9059 States= 4e+07 Transitions= 6.53e+08 Memory= 2225.459 t= 599 R= 7e+04 +Depth= 9059 States= 4.1e+07 Transitions= 6.69e+08 Memory= 2250.361 t= 614 R= 7e+04 +Depth= 9059 States= 4.2e+07 Transitions= 6.85e+08 Memory= 2279.268 t= 628 R= 7e+04 +Depth= 9059 States= 4.3e+07 Transitions= 7.03e+08 Memory= 2304.463 t= 644 R= 7e+04 +Depth= 9059 States= 4.4e+07 Transitions= 7.13e+08 Memory= 2338.252 t= 654 R= 7e+04 +Depth= 9059 States= 4.5e+07 Transitions= 7.25e+08 Memory= 2366.768 t= 665 R= 7e+04 +Depth= 9059 States= 4.6e+07 Transitions= 7.41e+08 Memory= 2393.330 t= 679 R= 7e+04 +Depth= 9059 States= 4.7e+07 Transitions= 7.57e+08 Memory= 2420.381 t= 694 R= 7e+04 +Depth= 9059 States= 4.8e+07 Transitions= 7.72e+08 Memory= 2447.041 t= 708 R= 7e+04 +Depth= 9059 States= 4.9e+07 Transitions= 7.88e+08 Memory= 2476.143 t= 722 R= 7e+04 +Depth= 9059 States= 5e+07 Transitions= 8.04e+08 Memory= 2501.045 t= 737 R= 7e+04 +Depth= 9059 States= 5.1e+07 Transitions= 8.2e+08 Memory= 2530.440 t= 752 R= 7e+04 +Depth= 9059 States= 5.2e+07 Transitions= 8.37e+08 Memory= 2554.854 t= 766 R= 7e+04 +Depth= 9059 States= 5.3e+07 Transitions= 8.5e+08 Memory= 2583.467 t= 779 R= 7e+04 +Depth= 9059 States= 5.4e+07 Transitions= 8.66e+08 Memory= 2611.299 t= 794 R= 7e+04 +Depth= 9059 States= 5.5e+07 Transitions= 8.79e+08 Memory= 2640.791 t= 805 R= 7e+04 +Depth= 9059 States= 5.6e+07 Transitions= 8.9e+08 Memory= 2672.139 t= 815 R= 7e+04 +Depth= 9059 States= 5.7e+07 Transitions= 9.05e+08 Memory= 2702.705 t= 829 R= 7e+04 +Depth= 9059 States= 5.8e+07 Transitions= 9.22e+08 Memory= 2727.998 t= 845 R= 7e+04 +Depth= 9059 States= 5.9e+07 Transitions= 9.38e+08 Memory= 2754.463 t= 859 R= 7e+04 +Depth= 9059 States= 6e+07 Transitions= 9.49e+08 Memory= 2789.717 t= 870 R= 7e+04 +Depth= 9059 States= 6.1e+07 Transitions= 9.62e+08 Memory= 2817.744 t= 881 R= 7e+04 +Depth= 9059 States= 6.2e+07 Transitions= 9.79e+08 Memory= 2838.447 t= 896 R= 7e+04 +Depth= 9059 States= 6.3e+07 Transitions= 1e+09 Memory= 2863.154 t= 919 R= 7e+04 +Depth= 9059 States= 6.4e+07 Transitions= 1.02e+09 Memory= 2889.131 t= 936 R= 7e+04 +Depth= 9059 States= 6.5e+07 Transitions= 1.04e+09 Memory= 2919.502 t= 952 R= 7e+04 +Depth= 9059 States= 6.6e+07 Transitions= 1.06e+09 Memory= 2943.916 t= 968 R= 7e+04 +Depth= 9059 States= 6.7e+07 Transitions= 1.07e+09 Memory= 2978.975 t= 979 R= 7e+04 +Depth= 9059 States= 6.8e+07 Transitions= 1.09e+09 Memory= 3003.877 t= 996 R= 7e+04 +Depth= 9059 States= 6.9e+07 Transitions= 1.11e+09 Memory= 3028.584 t= 1.01e+03 R= 7e+04 +Depth= 9059 States= 7e+07 Transitions= 1.12e+09 Memory= 3058.174 t= 1.02e+03 R= 7e+04 +Depth= 9059 States= 7.1e+07 Transitions= 1.13e+09 Memory= 3088.350 t= 1.04e+03 R= 7e+04 +Depth= 9059 States= 7.2e+07 Transitions= 1.15e+09 Memory= 3113.350 t= 1.05e+03 R= 7e+04 +Depth= 9059 States= 7.3e+07 Transitions= 1.17e+09 Memory= 3142.158 t= 1.07e+03 R= 7e+04 +Depth= 9059 States= 7.4e+07 Transitions= 1.19e+09 Memory= 3166.279 t= 1.09e+03 R= 7e+04 +Depth= 9059 States= 7.5e+07 Transitions= 1.21e+09 Memory= 3192.744 t= 1.11e+03 R= 7e+04 +Depth= 9059 States= 7.6e+07 Transitions= 1.23e+09 Memory= 3217.256 t= 1.13e+03 R= 7e+04 +Depth= 9059 States= 7.7e+07 Transitions= 1.25e+09 Memory= 3242.549 t= 1.14e+03 R= 7e+04 +Depth= 9059 States= 7.8e+07 Transitions= 1.26e+09 Memory= 3273.115 t= 1.16e+03 R= 7e+04 +Depth= 9059 States= 7.9e+07 Transitions= 1.27e+09 Memory= 3303.975 t= 1.17e+03 R= 7e+04 +Depth= 9059 States= 8e+07 Transitions= 1.29e+09 Memory= 3334.541 t= 1.18e+03 R= 7e+04 +Depth= 9059 States= 8.1e+07 Transitions= 1.31e+09 Memory= 3356.221 t= 1.2e+03 R= 7e+04 +Depth= 9059 States= 8.2e+07 Transitions= 1.33e+09 Memory= 3385.127 t= 1.22e+03 R= 7e+04 +Depth= 9059 States= 8.3e+07 Transitions= 1.35e+09 Memory= 3412.959 t= 1.23e+03 R= 7e+04 +Depth= 9059 States= 8.4e+07 Transitions= 1.37e+09 Memory= 3438.936 t= 1.25e+03 R= 7e+04 +Depth= 9059 States= 8.5e+07 Transitions= 1.38e+09 Memory= 3471.455 t= 1.26e+03 R= 7e+04 +Depth= 9059 States= 8.6e+07 Transitions= 1.4e+09 Memory= 3498.115 t= 1.28e+03 R= 7e+04 +Depth= 9059 States= 8.7e+07 Transitions= 1.42e+09 Memory= 3519.014 t= 1.3e+03 R= 7e+04 +Depth= 9059 States= 8.8e+07 Transitions= 1.44e+09 Memory= 3546.162 t= 1.32e+03 R= 7e+04 +Depth= 9059 States= 8.9e+07 Transitions= 1.46e+09 Memory= 3567.842 t= 1.34e+03 R= 7e+04 +Depth= 9059 States= 9e+07 Transitions= 1.48e+09 Memory= 3598.799 t= 1.35e+03 R= 7e+04 +Depth= 9059 States= 9.1e+07 Transitions= 1.5e+09 Memory= 3622.920 t= 1.37e+03 R= 7e+04 +Depth= 9059 States= 9.2e+07 Transitions= 1.52e+09 Memory= 3648.701 t= 1.39e+03 R= 7e+04 +Depth= 9059 States= 9.3e+07 Transitions= 1.53e+09 Memory= 3676.045 t= 1.4e+03 R= 7e+04 +Depth= 9059 States= 9.4e+07 Transitions= 1.55e+09 Memory= 3702.412 t= 1.42e+03 R= 7e+04 +Depth= 9059 States= 9.5e+07 Transitions= 1.56e+09 Memory= 3735.713 t= 1.43e+03 R= 7e+04 +Depth= 9059 States= 9.6e+07 Transitions= 1.57e+09 Memory= 3764.522 t= 1.44e+03 R= 7e+04 +Depth= 9059 States= 9.7e+07 Transitions= 1.59e+09 Memory= 3790.693 t= 1.45e+03 R= 7e+04 +Depth= 9059 States= 9.8e+07 Transitions= 1.61e+09 Memory= 3817.940 t= 1.47e+03 R= 7e+04 +Depth= 9059 States= 9.9e+07 Transitions= 1.62e+09 Memory= 3845.283 t= 1.48e+03 R= 7e+04 +Depth= 9059 States= 1e+08 Transitions= 1.64e+09 Memory= 3873.213 t= 1.5e+03 R= 7e+04 +Depth= 9059 States= 1.01e+08 Transitions= 1.65e+09 Memory= 3897.920 t= 1.51e+03 R= 7e+04 +Depth= 9059 States= 1.02e+08 Transitions= 1.67e+09 Memory= 3926.631 t= 1.53e+03 R= 7e+04 +Depth= 9059 States= 1.03e+08 Transitions= 1.68e+09 Memory= 3952.315 t= 1.54e+03 R= 7e+04 +Depth= 9059 States= 1.04e+08 Transitions= 1.7e+09 Memory= 3981.026 t= 1.56e+03 R= 7e+04 +Depth= 9059 States= 1.05e+08 Transitions= 1.71e+09 Memory= 4010.029 t= 1.57e+03 R= 7e+04 +Depth= 9059 States= 1.06e+08 Transitions= 1.73e+09 Memory= 4038.838 t= 1.58e+03 R= 7e+04 +Depth= 9059 States= 1.07e+08 Transitions= 1.74e+09 Memory= 4070.381 t= 1.59e+03 R= 7e+04 +Depth= 9059 States= 1.08e+08 Transitions= 1.75e+09 Memory= 4099.385 t= 1.61e+03 R= 7e+04 +Depth= 9059 States= 1.09e+08 Transitions= 1.77e+09 Memory= 4126.338 t= 1.62e+03 R= 7e+04 +Depth= 9059 States= 1.1e+08 Transitions= 1.79e+09 Memory= 4151.924 t= 1.64e+03 R= 7e+04 +Depth= 9059 States= 1.11e+08 Transitions= 1.8e+09 Memory= 4187.276 t= 1.65e+03 R= 7e+04 +Depth= 9059 States= 1.12e+08 Transitions= 1.81e+09 Memory= 4214.326 t= 1.66e+03 R= 7e+04 +Depth= 9059 States= 1.13e+08 Transitions= 1.83e+09 Memory= 4237.471 t= 1.67e+03 R= 7e+04 +Depth= 9059 States= 1.14e+08 Transitions= 1.85e+09 Memory= 4261.104 t= 1.7e+03 R= 7e+04 +Depth= 9059 States= 1.15e+08 Transitions= 1.87e+09 Memory= 4286.690 t= 1.71e+03 R= 7e+04 +Depth= 9059 States= 1.16e+08 Transitions= 1.89e+09 Memory= 4314.619 t= 1.73e+03 R= 7e+04 +Depth= 9059 States= 1.17e+08 Transitions= 1.91e+09 Memory= 4341.768 t= 1.75e+03 R= 7e+04 +Depth= 9059 States= 1.18e+08 Transitions= 1.92e+09 Memory= 4375.166 t= 1.76e+03 R= 7e+04 +Depth= 9059 States= 1.19e+08 Transitions= 1.94e+09 Memory= 4401.338 t= 1.78e+03 R= 7e+04 +Depth= 9059 States= 1.2e+08 Transitions= 1.95e+09 Memory= 4426.436 t= 1.79e+03 R= 7e+04 +Depth= 9059 States= 1.21e+08 Transitions= 1.97e+09 Memory= 4456.807 t= 1.8e+03 R= 7e+04 +Depth= 9059 States= 1.22e+08 Transitions= 1.98e+09 Memory= 4486.592 t= 1.82e+03 R= 7e+04 +Depth= 9059 States= 1.23e+08 Transitions= 2e+09 Memory= 4511.787 t= 1.83e+03 R= 7e+04 +Depth= 9059 States= 1.24e+08 Transitions= 2.02e+09 Memory= 4540.108 t= 1.85e+03 R= 7e+04 +Depth= 9059 States= 1.25e+08 Transitions= 2.04e+09 Memory= 4564.033 t= 1.87e+03 R= 7e+04 +Depth= 9059 States= 1.26e+08 Transitions= 2.06e+09 Memory= 4591.865 t= 1.89e+03 R= 7e+04 +Depth= 9059 States= 1.27e+08 Transitions= 2.08e+09 Memory= 4615.889 t= 1.91e+03 R= 7e+04 +Depth= 9059 States= 1.28e+08 Transitions= 2.1e+09 Memory= 4640.303 t= 1.92e+03 R= 7e+04 +Depth= 9059 States= 1.29e+08 Transitions= 2.11e+09 Memory= 4670.479 t= 1.94e+03 R= 7e+04 +Depth= 9059 States= 1.3e+08 Transitions= 2.12e+09 Memory= 4702.998 t= 1.95e+03 R= 7e+04 +Depth= 9059 States= 1.31e+08 Transitions= 2.14e+09 Memory= 4732.393 t= 1.96e+03 R= 7e+04 +Depth= 9059 States= 1.32e+08 Transitions= 2.16e+09 Memory= 4754.756 t= 1.98e+03 R= 7e+04 +Depth= 9059 States= 1.33e+08 Transitions= 2.18e+09 Memory= 4783.174 t= 2e+03 R= 7e+04 +Depth= 9059 States= 1.34e+08 Transitions= 2.19e+09 Memory= 4810.518 t= 2.01e+03 R= 7e+04 +Depth= 9059 States= 1.35e+08 Transitions= 2.21e+09 Memory= 4837.568 t= 2.03e+03 R= 7e+04 +pan: resizing hashtable to -w28.. done +Depth= 9059 States= 1.36e+08 Transitions= 2.23e+09 Memory= 6885.568 t= 2.06e+03 R= 7e+04 +Depth= 9059 States= 1.37e+08 Transitions= 2.24e+09 Memory= 6885.568 t= 2.08e+03 R= 7e+04 +Depth= 9059 States= 1.38e+08 Transitions= 2.27e+09 Memory= 6900.412 t= 2.1e+03 R= 7e+04 +Depth= 9059 States= 1.39e+08 Transitions= 2.29e+09 Memory= 6927.658 t= 2.12e+03 R= 7e+04 +Depth= 9059 States= 1.4e+08 Transitions= 2.31e+09 Memory= 6950.315 t= 2.14e+03 R= 7e+04 +Depth= 9059 States= 1.41e+08 Transitions= 2.33e+09 Memory= 6981.858 t= 2.15e+03 R= 7e+04 +Depth= 9059 States= 1.42e+08 Transitions= 2.35e+09 Memory= 7005.295 t= 2.17e+03 R= 7e+04 +Depth= 9059 States= 1.43e+08 Transitions= 2.36e+09 Memory= 7031.076 t= 2.18e+03 R= 7e+04 +Depth= 9059 States= 1.44e+08 Transitions= 2.38e+09 Memory= 7056.955 t= 2.2e+03 R= 7e+04 +Depth= 9059 States= 1.45e+08 Transitions= 2.4e+09 Memory= 7084.494 t= 2.22e+03 R= 7e+04 +Depth= 9059 States= 1.46e+08 Transitions= 2.41e+09 Memory= 7115.744 t= 2.23e+03 R= 7e+04 +Depth= 9059 States= 1.47e+08 Transitions= 2.42e+09 Memory= 7146.604 t= 2.24e+03 R= 7e+04 +Depth= 9059 States= 1.48e+08 Transitions= 2.44e+09 Memory= 7172.287 t= 2.25e+03 R= 7e+04 +Depth= 9059 States= 1.49e+08 Transitions= 2.45e+09 Memory= 7200.315 t= 2.26e+03 R= 7e+04 +Depth= 9059 States= 1.5e+08 Transitions= 2.47e+09 Memory= 7226.389 t= 2.28e+03 R= 7e+04 +Depth= 9059 States= 1.51e+08 Transitions= 2.48e+09 Memory= 7253.733 t= 2.29e+03 R= 7e+04 +Depth= 9059 States= 1.52e+08 Transitions= 2.5e+09 Memory= 7279.709 t= 2.31e+03 R= 7e+04 +Depth= 9059 States= 1.53e+08 Transitions= 2.52e+09 Memory= 7309.104 t= 2.32e+03 R= 7e+04 +Depth= 9059 States= 1.54e+08 Transitions= 2.53e+09 Memory= 7334.592 t= 2.34e+03 R= 7e+04 +Depth= 9059 States= 1.55e+08 Transitions= 2.55e+09 Memory= 7362.229 t= 2.35e+03 R= 7e+04 +Depth= 9059 States= 1.56e+08 Transitions= 2.56e+09 Memory= 7391.135 t= 2.36e+03 R= 7e+04 +Depth= 9059 States= 1.57e+08 Transitions= 2.57e+09 Memory= 7420.822 t= 2.38e+03 R= 7e+04 +Depth= 9059 States= 1.58e+08 Transitions= 2.59e+09 Memory= 7452.854 t= 2.39e+03 R= 7e+04 +Depth= 9059 States= 1.59e+08 Transitions= 2.6e+09 Memory= 7481.760 t= 2.4e+03 R= 7e+04 +Depth= 9059 States= 1.6e+08 Transitions= 2.62e+09 Memory= 7509.299 t= 2.41e+03 R= 7e+04 +Depth= 9059 States= 1.61e+08 Transitions= 2.63e+09 Memory= 7534.201 t= 2.43e+03 R= 7e+04 +Depth= 9059 States= 1.62e+08 Transitions= 2.65e+09 Memory= 7567.600 t= 2.44e+03 R= 7e+04 +Depth= 9059 States= 1.63e+08 Transitions= 2.66e+09 Memory= 7594.846 t= 2.45e+03 R= 7e+04 +Depth= 9059 States= 1.64e+08 Transitions= 2.67e+09 Memory= 7619.455 t= 2.47e+03 R= 7e+04 +Depth= 9059 States= 1.65e+08 Transitions= 2.7e+09 Memory= 7642.502 t= 2.49e+03 R= 7e+04 +Depth= 9059 States= 1.66e+08 Transitions= 2.72e+09 Memory= 7669.260 t= 2.51e+03 R= 7e+04 +Depth= 9059 States= 1.67e+08 Transitions= 2.73e+09 Memory= 7696.799 t= 2.52e+03 R= 7e+04 +Depth= 9059 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7723.850 t= 2.54e+03 R= 7e+04 +Depth= 9059 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7757.053 t= 2.55e+03 R= 7e+04 +Depth= 9059 States= 1.7e+08 Transitions= 2.78e+09 Memory= 7782.346 t= 2.57e+03 R= 7e+04 +Depth= 9059 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7808.908 t= 2.58e+03 R= 7e+04 +Depth= 9059 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7838.791 t= 2.59e+03 R= 7e+04 +Depth= 9059 States= 1.73e+08 Transitions= 2.83e+09 Memory= 7867.893 t= 2.61e+03 R= 7e+04 +Depth= 9059 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7892.990 t= 2.62e+03 R= 7e+04 +Depth= 9059 States= 1.75e+08 Transitions= 2.86e+09 Memory= 7922.190 t= 2.64e+03 R= 7e+04 +Depth= 9059 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7945.627 t= 2.66e+03 R= 7e+04 +Depth= 9059 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7973.947 t= 2.68e+03 R= 7e+04 +Depth= 9059 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7997.483 t= 2.7e+03 R= 7e+04 +Depth= 9059 States= 1.79e+08 Transitions= 2.94e+09 Memory= 8020.920 t= 2.71e+03 R= 7e+04 +Depth= 9059 States= 1.8e+08 Transitions= 2.96e+09 Memory= 8050.412 t= 2.73e+03 R= 7e+04 +Depth= 9059 States= 1.81e+08 Transitions= 2.97e+09 Memory= 8085.666 t= 2.74e+03 R= 7e+04 +Depth= 9059 States= 1.82e+08 Transitions= 2.98e+09 Memory= 8114.279 t= 2.75e+03 R= 7e+04 +Depth= 9059 States= 1.83e+08 Transitions= 3e+09 Memory= 8137.131 t= 2.77e+03 R= 7e+04 +Depth= 9059 States= 1.84e+08 Transitions= 3.02e+09 Memory= 8165.451 t= 2.79e+03 R= 7e+04 +Depth= 9059 States= 1.85e+08 Transitions= 3.04e+09 Memory= 8193.186 t= 2.8e+03 R= 7e+04 +Depth= 9059 States= 1.86e+08 Transitions= 3.06e+09 Memory= 8218.674 t= 2.82e+03 R= 7e+04 +Depth= 9059 States= 1.87e+08 Transitions= 3.08e+09 Memory= 8255.100 t= 2.83e+03 R= 7e+04 +Depth= 9059 States= 1.88e+08 Transitions= 3.09e+09 Memory= 8279.221 t= 2.85e+03 R= 7e+04 +Depth= 9059 States= 1.89e+08 Transitions= 3.12e+09 Memory= 8298.264 t= 2.87e+03 R= 7e+04 +Depth= 9059 States= 1.9e+08 Transitions= 3.14e+09 Memory= 8325.998 t= 2.89e+03 R= 7e+04 +Depth= 9059 States= 1.91e+08 Transitions= 3.16e+09 Memory= 8349.338 t= 2.91e+03 R= 7e+04 +Depth= 9059 States= 1.92e+08 Transitions= 3.17e+09 Memory= 8379.221 t= 2.92e+03 R= 7e+04 +Depth= 9059 States= 1.93e+08 Transitions= 3.19e+09 Memory= 8403.440 t= 2.94e+03 R= 7e+04 +Depth= 9059 States= 1.94e+08 Transitions= 3.21e+09 Memory= 8430.100 t= 2.96e+03 R= 7e+04 +Depth= 9059 States= 1.95e+08 Transitions= 3.23e+09 Memory= 8455.295 t= 2.97e+03 R= 7e+04 +Depth= 9059 States= 1.96e+08 Transitions= 3.25e+09 Memory= 8482.932 t= 2.99e+03 R= 7e+04 +Depth= 9059 States= 1.97e+08 Transitions= 3.26e+09 Memory= 8515.256 t= 3e+03 R= 7e+04 +Depth= 9059 States= 1.98e+08 Transitions= 3.27e+09 Memory= 8542.502 t= 3.01e+03 R= 7e+04 +Depth= 9059 States= 1.99e+08 Transitions= 3.29e+09 Memory= 8569.260 t= 3.02e+03 R= 7e+04 +Depth= 9059 States= 2e+08 Transitions= 3.3e+09 Memory= 8598.459 t= 3.04e+03 R= 7e+04 +Depth= 9059 States= 2.01e+08 Transitions= 3.32e+09 Memory= 8624.631 t= 3.05e+03 R= 7e+04 +Depth= 9059 States= 2.02e+08 Transitions= 3.33e+09 Memory= 8652.365 t= 3.07e+03 R= 7e+04 +Depth= 9059 States= 2.03e+08 Transitions= 3.35e+09 Memory= 8678.440 t= 3.08e+03 R= 7e+04 +Depth= 9059 States= 2.04e+08 Transitions= 3.36e+09 Memory= 8706.369 t= 3.1e+03 R= 7e+04 +Depth= 9059 States= 2.05e+08 Transitions= 3.38e+09 Memory= 8732.932 t= 3.11e+03 R= 7e+04 +Depth= 9059 States= 2.06e+08 Transitions= 3.39e+09 Memory= 8760.276 t= 3.12e+03 R= 7e+04 +Depth= 9059 States= 2.07e+08 Transitions= 3.41e+09 Memory= 8789.475 t= 3.14e+03 R= 7e+04 +Depth= 9059 States= 2.08e+08 Transitions= 3.42e+09 Memory= 8819.455 t= 3.15e+03 R= 7e+04 +Depth= 9059 States= 2.09e+08 Transitions= 3.43e+09 Memory= 8851.779 t= 3.16e+03 R= 7e+04 +Depth= 9059 States= 2.1e+08 Transitions= 3.45e+09 Memory= 8880.100 t= 3.17e+03 R= 7e+04 +Depth= 9059 States= 2.11e+08 Transitions= 3.46e+09 Memory= 8907.053 t= 3.19e+03 R= 7e+04 +Depth= 9059 States= 2.12e+08 Transitions= 3.48e+09 Memory= 8932.639 t= 3.2e+03 R= 7e+04 +Depth= 9059 States= 2.13e+08 Transitions= 3.49e+09 Memory= 8964.572 t= 3.22e+03 R= 7e+04 +Depth= 9059 States= 2.14e+08 Transitions= 3.51e+09 Memory= 8991.526 t= 3.23e+03 R= 7e+04 +Depth= 9059 States= 2.15e+08 Transitions= 3.52e+09 Memory= 9018.088 t= 3.24e+03 R= 7e+04 +Depth= 9059 States= 2.16e+08 Transitions= 3.54e+09 Memory= 9039.865 t= 3.26e+03 R= 7e+04 +Depth= 9059 States= 2.17e+08 Transitions= 3.56e+09 Memory= 9067.600 t= 3.28e+03 R= 7e+04 +Depth= 9059 States= 2.18e+08 Transitions= 3.58e+09 Memory= 9094.260 t= 3.3e+03 R= 7e+04 +Depth= 9059 States= 2.19e+08 Transitions= 3.6e+09 Memory= 9122.483 t= 3.31e+03 R= 7e+04 +Depth= 9059 States= 2.2e+08 Transitions= 3.61e+09 Memory= 9153.635 t= 3.32e+03 R= 7e+04 +Depth= 9059 States= 2.21e+08 Transitions= 3.63e+09 Memory= 9181.272 t= 3.34e+03 R= 7e+04 +Depth= 9059 States= 2.22e+08 Transitions= 3.65e+09 Memory= 9207.639 t= 3.36e+03 R= 7e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 9059, errors: 0 + 88961904 states, stored (2.22145e+08 visited) +3.4291111e+09 states, matched +3.6512561e+09 transitions (= visited+matched) +1.2885947e+10 atomic steps +hash conflicts: 7.2188776e+08 (resolved) + +Stats on memory usage (in Megabytes): + 7805.343 equivalent memory usage for states (stored*(State-vector + overhead)) + 6706.219 actual memory usage for states (compression: 85.92%) + state-vector as stored = 51 byte + 28 byte overhead + 2048.000 memory used for hash table (-w28) + 457.764 memory used for DFS stack (-m10000000) + 1.122 memory lost to fragmentation + 9210.861 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 370, "(1)" + line 164, "pan.___", state 378, "(1)" + line 168, "pan.___", state 390, "(1)" + line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 449, "(1)" + line 413, "pan.___", state 462, "(1)" + line 418, "pan.___", state 479, "(1)" + line 399, "pan.___", state 498, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 647, "(1)" + line 418, "pan.___", state 664, "(1)" + line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 710, "(1)" + line 164, "pan.___", state 718, "(1)" + line 168, "pan.___", state 730, "(1)" + line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 840, "(1)" + line 164, "pan.___", state 848, "(1)" + line 168, "pan.___", state 860, "(1)" + line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 884, "(1)" + line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 885, "else" + line 399, "pan.___", state 888, "(1)" + line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 898, "(1)" + line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 899, "else" + line 403, "pan.___", state 902, "(1)" + line 403, "pan.___", state 903, "(1)" + line 403, "pan.___", state 903, "(1)" + line 401, "pan.___", state 908, "((i<1))" + line 401, "pan.___", state 908, "((i>=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1508, "(1)" + line 164, "pan.___", state 1516, "(1)" + line 168, "pan.___", state 1528, "(1)" + line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1552, "(1)" + line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1553, "else" + line 399, "pan.___", state 1556, "(1)" + line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1566, "(1)" + line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1567, "else" + line 403, "pan.___", state 1570, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 401, "pan.___", state 1576, "((i<1))" + line 401, "pan.___", state 1576, "((i>=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1811, "(1)" + line 164, "pan.___", state 1819, "(1)" + line 168, "pan.___", state 1831, "(1)" + line 702, "pan.___", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 751, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 3.36e+03 seconds +pan: rate 66138.803 states/second +pan: avg transition delay 9.1989e-07 usec +cp .input.spin urcu_progress_reader.spin.input +cp .input.spin.trail urcu_progress_reader.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input new file mode 100644 index 0000000..91b1126 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input @@ -0,0 +1,723 @@ +#define READER_PROGRESS + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..7c42af1 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_reader.spin.input.trail @@ -0,0 +1,1270 @@ +-2:4:-2 +-4:-4:-4 +1:0:4401 +2:4:4353 +3:4:4356 +4:4:4356 +5:4:4359 +6:4:4367 +7:4:4367 +8:4:4370 +9:4:4376 +10:4:4380 +11:4:4380 +12:4:4383 +13:4:4391 +14:4:4395 +15:4:4396 +16:0:4401 +17:4:4398 +18:0:4401 +19:3:2479 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+1255:3:4347 +1256:0:4405 +1257:3:4346 +1258:0:4405 +1259:2:1348 +1260:0:4405 +1261:3:4347 +1262:0:4405 +1263:2:1347 +1264:0:4405 +1265:3:4346 +1266:0:4405 +1267:1:104 diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.define b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.log b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.log new file mode 100644 index 0000000..fc83245 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.log @@ -0,0 +1,524 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 1194: Claim reached state 9 (line 748) +Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.64 R= 1e+05 +Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.6 R= 1e+05 +Depth= 3253 States= 3e+06 Transitions= 3.44e+07 Memory= 516.252 t= 31.6 R= 9e+04 +pan: resizing hashtable to -w22.. done +Depth= 7995 States= 4e+06 Transitions= 4.66e+07 Memory= 563.486 t= 42.8 R= 9e+04 +Depth= 7995 States= 5e+06 Transitions= 6.05e+07 Memory= 580.674 t= 55.6 R= 9e+04 +Depth= 7995 States= 6e+06 Transitions= 7.12e+07 Memory= 599.229 t= 65.5 R= 9e+04 +Depth= 7995 States= 7e+06 Transitions= 8.58e+07 Memory= 613.975 t= 78.9 R= 9e+04 +Depth= 7995 States= 8e+06 Transitions= 9.62e+07 Memory= 631.846 t= 88.7 R= 9e+04 +Depth= 7995 States= 9e+06 Transitions= 1.1e+08 Memory= 646.592 t= 101 R= 9e+04 +pan: resizing hashtable to -w24.. done +Depth= 7995 States= 1e+07 Transitions= 1.32e+08 Memory= 783.869 t= 122 R= 8e+04 +Depth= 7995 States= 1.1e+07 Transitions= 1.52e+08 Memory= 799.104 t= 140 R= 8e+04 +Depth= 7995 States= 1.2e+07 Transitions= 1.71e+08 Memory= 814.533 t= 157 R= 8e+04 +Depth= 7995 States= 1.3e+07 Transitions= 1.9e+08 Memory= 829.670 t= 174 R= 7e+04 +Depth= 7995 States= 1.4e+07 Transitions= 2.01e+08 Memory= 848.029 t= 185 R= 8e+04 +Depth= 7995 States= 1.5e+07 Transitions= 2.21e+08 Memory= 862.287 t= 203 R= 7e+04 +Depth= 7995 States= 1.6e+07 Transitions= 2.35e+08 Memory= 877.815 t= 215 R= 7e+04 +Depth= 7995 States= 1.7e+07 Transitions= 2.44e+08 Memory= 897.736 t= 223 R= 8e+04 +Depth= 7995 States= 1.8e+07 Transitions= 2.57e+08 Memory= 911.115 t= 235 R= 8e+04 +Depth= 7995 States= 1.9e+07 Transitions= 2.69e+08 Memory= 927.033 t= 246 R= 8e+04 +Depth= 8341 States= 2e+07 Transitions= 2.83e+08 Memory= 943.440 t= 259 R= 8e+04 +Depth= 8341 States= 2.1e+07 Transitions= 2.96e+08 Memory= 961.604 t= 271 R= 8e+04 +Depth= 8341 States= 2.2e+07 Transitions= 3.07e+08 Memory= 978.791 t= 281 R= 8e+04 +Depth= 8341 States= 2.3e+07 Transitions= 3.2e+08 Memory= 996.369 t= 293 R= 8e+04 +Depth= 8341 States= 2.4e+07 Transitions= 3.32e+08 Memory= 1013.264 t= 304 R= 8e+04 +Depth= 8341 States= 2.5e+07 Transitions= 3.48e+08 Memory= 1024.885 t= 319 R= 8e+04 +Depth= 8341 States= 2.6e+07 Transitions= 3.72e+08 Memory= 1038.947 t= 341 R= 8e+04 +Depth= 8341 States= 2.7e+07 Transitions= 3.91e+08 Memory= 1055.158 t= 358 R= 8e+04 +Depth= 8341 States= 2.8e+07 Transitions= 4.09e+08 Memory= 1069.904 t= 374 R= 7e+04 +Depth= 8341 States= 2.9e+07 Transitions= 4.25e+08 Memory= 1086.701 t= 389 R= 7e+04 +Depth= 8341 States= 3e+07 Transitions= 4.43e+08 Memory= 1102.131 t= 405 R= 7e+04 +Depth= 8341 States= 3.1e+07 Transitions= 4.58e+08 Memory= 1117.268 t= 419 R= 7e+04 +Depth= 8341 States= 3.2e+07 Transitions= 4.68e+08 Memory= 1136.213 t= 429 R= 7e+04 +Depth= 8341 States= 3.3e+07 Transitions= 4.8e+08 Memory= 1151.154 t= 440 R= 8e+04 +Depth= 8341 States= 3.4e+07 Transitions= 4.92e+08 Memory= 1166.779 t= 451 R= 8e+04 +pan: resizing hashtable to -w26.. done +Depth= 8687 States= 3.5e+07 Transitions= 5.05e+08 Memory= 1679.658 t= 464 R= 8e+04 +Depth= 8687 States= 3.6e+07 Transitions= 5.18e+08 Memory= 1697.432 t= 477 R= 8e+04 +Depth= 8687 States= 3.7e+07 Transitions= 5.29e+08 Memory= 1714.326 t= 487 R= 8e+04 +Depth= 8687 States= 3.8e+07 Transitions= 5.44e+08 Memory= 1730.244 t= 500 R= 8e+04 +Depth= 8687 States= 3.9e+07 Transitions= 5.55e+08 Memory= 1747.920 t= 511 R= 8e+04 +Depth= 8687 States= 4e+07 Transitions= 5.69e+08 Memory= 1761.885 t= 523 R= 8e+04 +Depth= 8687 States= 4.1e+07 Transitions= 5.92e+08 Memory= 1775.850 t= 544 R= 8e+04 +Depth= 8687 States= 4.2e+07 Transitions= 6.12e+08 Memory= 1790.498 t= 562 R= 7e+04 +Depth= 8687 States= 4.3e+07 Transitions= 6.29e+08 Memory= 1807.783 t= 578 R= 7e+04 +Depth= 8687 States= 4.4e+07 Transitions= 6.48e+08 Memory= 1822.432 t= 595 R= 7e+04 +Depth= 8687 States= 4.5e+07 Transitions= 6.61e+08 Memory= 1838.838 t= 606 R= 7e+04 +Depth= 8687 States= 4.6e+07 Transitions= 6.81e+08 Memory= 1853.291 t= 625 R= 7e+04 +Depth= 8687 States= 4.7e+07 Transitions= 6.93e+08 Memory= 1870.772 t= 635 R= 7e+04 +Depth= 8687 States= 4.8e+07 Transitions= 7.02e+08 Memory= 1889.912 t= 644 R= 7e+04 +Depth= 8687 States= 4.9e+07 Transitions= 7.15e+08 Memory= 1902.998 t= 656 R= 7e+04 +Depth= 8687 States= 5e+07 Transitions= 7.27e+08 Memory= 1919.600 t= 667 R= 7e+04 +Depth= 9033 States= 5.1e+07 Transitions= 7.42e+08 Memory= 1935.518 t= 681 R= 7e+04 +Depth= 9033 States= 5.2e+07 Transitions= 7.53e+08 Memory= 1954.170 t= 691 R= 8e+04 +Depth= 9033 States= 5.3e+07 Transitions= 7.66e+08 Memory= 1969.990 t= 703 R= 8e+04 +Depth= 9033 States= 5.4e+07 Transitions= 7.77e+08 Memory= 1988.545 t= 713 R= 8e+04 +Depth= 9033 States= 5.5e+07 Transitions= 7.9e+08 Memory= 2004.756 t= 725 R= 8e+04 +Depth= 9033 States= 5.6e+07 Transitions= 8.1e+08 Memory= 2016.084 t= 743 R= 8e+04 +Depth= 9033 States= 5.7e+07 Transitions= 8.32e+08 Memory= 2030.440 t= 763 R= 7e+04 +Depth= 9033 States= 5.8e+07 Transitions= 8.51e+08 Memory= 2046.260 t= 781 R= 7e+04 +Depth= 9033 States= 5.9e+07 Transitions= 8.7e+08 Memory= 2061.592 t= 797 R= 7e+04 +Depth= 9033 States= 6e+07 Transitions= 8.83e+08 Memory= 2078.779 t= 809 R= 7e+04 +Depth= 9033 States= 6.1e+07 Transitions= 9.01e+08 Memory= 2094.014 t= 826 R= 7e+04 +Depth= 9033 States= 6.2e+07 Transitions= 9.16e+08 Memory= 2108.467 t= 840 R= 7e+04 +Depth= 9033 States= 6.3e+07 Transitions= 9.26e+08 Memory= 2126.924 t= 849 R= 7e+04 +Depth= 9033 States= 6.4e+07 Transitions= 9.38e+08 Memory= 2142.158 t= 860 R= 7e+04 +Depth= 9033 States= 6.5e+07 Transitions= 9.51e+08 Memory= 2157.295 t= 871 R= 7e+04 +Depth= 9379 States= 6.6e+07 Transitions= 9.63e+08 Memory= 2173.115 t= 883 R= 7e+04 +Depth= 9379 States= 6.7e+07 Transitions= 9.77e+08 Memory= 2190.401 t= 895 R= 7e+04 +Depth= 9379 States= 6.8e+07 Transitions= 9.88e+08 Memory= 2208.955 t= 905 R= 8e+04 +Depth= 9379 States= 6.9e+07 Transitions= 1e+09 Memory= 2223.311 t= 919 R= 8e+04 +Depth= 9379 States= 7e+07 Transitions= 1.01e+09 Memory= 2242.256 t= 928 R= 8e+04 +Depth= 9379 States= 7.1e+07 Transitions= 1.03e+09 Memory= 2257.295 t= 940 R= 8e+04 +Depth= 9379 States= 7.2e+07 Transitions= 1.05e+09 Memory= 2269.307 t= 960 R= 8e+04 +Depth= 9379 States= 7.3e+07 Transitions= 1.07e+09 Memory= 2283.760 t= 979 R= 7e+04 +Depth= 9379 States= 7.4e+07 Transitions= 1.09e+09 Memory= 2299.385 t= 996 R= 7e+04 +Depth= 9379 States= 7.5e+07 Transitions= 1.11e+09 Memory= 2314.619 t= 1.01e+03 R= 7e+04 +Depth= 9379 States= 7.6e+07 Transitions= 1.12e+09 Memory= 2333.369 t= 1.02e+03 R= 7e+04 +Depth= 9379 States= 7.7e+07 Transitions= 1.14e+09 Memory= 2347.139 t= 1.04e+03 R= 7e+04 +Depth= 9379 States= 7.8e+07 Transitions= 1.15e+09 Memory= 2385.029 t= 1.06e+03 R= 7e+04 +Depth= 9379 States= 7.9e+07 Transitions= 1.17e+09 Memory= 2453.682 t= 1.07e+03 R= 7e+04 +Depth= 9379 States= 8e+07 Transitions= 1.18e+09 Memory= 2522.236 t= 1.08e+03 R= 7e+04 +Depth= 9379 States= 8.1e+07 Transitions= 1.2e+09 Memory= 2590.889 t= 1.1e+03 R= 7e+04 +Depth= 9379 States= 8.2e+07 Transitions= 1.22e+09 Memory= 2624.287 t= 1.12e+03 R= 7e+04 +Depth= 9379 States= 8.3e+07 Transitions= 1.23e+09 Memory= 2640.303 t= 1.13e+03 R= 7e+04 +Depth= 9379 States= 8.4e+07 Transitions= 1.25e+09 Memory= 2654.170 t= 1.15e+03 R= 7e+04 +Depth= 9379 States= 8.5e+07 Transitions= 1.27e+09 Memory= 2669.111 t= 1.16e+03 R= 7e+04 +Depth= 9379 States= 8.6e+07 Transitions= 1.29e+09 Memory= 2684.053 t= 1.18e+03 R= 7e+04 +Depth= 9379 States= 8.7e+07 Transitions= 1.31e+09 Memory= 2698.604 t= 1.2e+03 R= 7e+04 +Depth= 9379 States= 8.8e+07 Transitions= 1.33e+09 Memory= 2719.697 t= 1.22e+03 R= 7e+04 +Depth= 9379 States= 8.9e+07 Transitions= 1.35e+09 Memory= 2788.350 t= 1.24e+03 R= 7e+04 +Depth= 9379 States= 9e+07 Transitions= 1.37e+09 Memory= 2819.990 t= 1.26e+03 R= 7e+04 +Depth= 9379 States= 9.1e+07 Transitions= 1.39e+09 Memory= 2846.553 t= 1.27e+03 R= 7e+04 +Depth= 9379 States= 9.2e+07 Transitions= 1.4e+09 Memory= 2864.912 t= 1.28e+03 R= 7e+04 +Depth= 9379 States= 9.3e+07 Transitions= 1.41e+09 Memory= 2877.901 t= 1.3e+03 R= 7e+04 +Depth= 9379 States= 9.4e+07 Transitions= 1.44e+09 Memory= 2892.842 t= 1.31e+03 R= 7e+04 +Depth= 9379 States= 9.5e+07 Transitions= 1.45e+09 Memory= 2908.076 t= 1.33e+03 R= 7e+04 +Depth= 9379 States= 9.6e+07 Transitions= 1.47e+09 Memory= 2922.627 t= 1.35e+03 R= 7e+04 +Depth= 9379 States= 9.7e+07 Transitions= 1.49e+09 Memory= 2940.693 t= 1.36e+03 R= 7e+04 +Depth= 9379 States= 9.8e+07 Transitions= 1.51e+09 Memory= 2953.291 t= 1.38e+03 R= 7e+04 +Depth= 9379 States= 9.9e+07 Transitions= 1.53e+09 Memory= 2968.526 t= 1.4e+03 R= 7e+04 +Depth= 9379 States= 1e+08 Transitions= 1.56e+09 Memory= 2981.709 t= 1.42e+03 R= 7e+04 +Depth= 9379 States= 1.01e+08 Transitions= 1.57e+09 Memory= 2997.236 t= 1.44e+03 R= 7e+04 +Depth= 9379 States= 1.02e+08 Transitions= 1.59e+09 Memory= 3011.592 t= 1.46e+03 R= 7e+04 +Depth= 9379 States= 1.03e+08 Transitions= 1.61e+09 Memory= 3037.861 t= 1.47e+03 R= 7e+04 +Depth= 9379 States= 1.04e+08 Transitions= 1.63e+09 Memory= 3106.514 t= 1.49e+03 R= 7e+04 +Depth= 9379 States= 1.05e+08 Transitions= 1.65e+09 Memory= 3175.166 t= 1.51e+03 R= 7e+04 +Depth= 9379 States= 1.06e+08 Transitions= 1.67e+09 Memory= 3223.897 t= 1.52e+03 R= 7e+04 +Depth= 9379 States= 1.07e+08 Transitions= 1.68e+09 Memory= 3246.846 t= 1.54e+03 R= 7e+04 +Depth= 9379 States= 1.08e+08 Transitions= 1.7e+09 Memory= 3283.467 t= 1.56e+03 R= 7e+04 +Depth= 9379 States= 1.09e+08 Transitions= 1.72e+09 Memory= 3316.670 t= 1.57e+03 R= 7e+04 +Depth= 9379 States= 1.1e+08 Transitions= 1.73e+09 Memory= 3344.209 t= 1.59e+03 R= 7e+04 +Depth= 9379 States= 1.11e+08 Transitions= 1.75e+09 Memory= 3376.338 t= 1.6e+03 R= 7e+04 +Depth= 9379 States= 1.12e+08 Transitions= 1.76e+09 Memory= 3396.943 t= 1.62e+03 R= 7e+04 +Depth= 9379 States= 1.13e+08 Transitions= 1.78e+09 Memory= 3426.143 t= 1.63e+03 R= 7e+04 +Depth= 9379 States= 1.14e+08 Transitions= 1.8e+09 Memory= 3452.705 t= 1.65e+03 R= 7e+04 +Depth= 9379 States= 1.15e+08 Transitions= 1.81e+09 Memory= 3493.818 t= 1.66e+03 R= 7e+04 +Depth= 9379 States= 1.16e+08 Transitions= 1.83e+09 Memory= 3533.369 t= 1.67e+03 R= 7e+04 +Depth= 9379 States= 1.17e+08 Transitions= 1.84e+09 Memory= 3566.182 t= 1.69e+03 R= 7e+04 +Depth= 9379 States= 1.18e+08 Transitions= 1.86e+09 Memory= 3582.881 t= 1.7e+03 R= 7e+04 +Depth= 9379 States= 1.19e+08 Transitions= 1.88e+09 Memory= 3630.830 t= 1.72e+03 R= 7e+04 +Depth= 9379 States= 1.2e+08 Transitions= 1.89e+09 Memory= 3692.744 t= 1.74e+03 R= 7e+04 +Depth= 9379 States= 1.21e+08 Transitions= 1.91e+09 Memory= 3750.361 t= 1.75e+03 R= 7e+04 +Depth= 9379 States= 1.22e+08 Transitions= 1.92e+09 Memory= 3767.354 t= 1.76e+03 R= 7e+04 +Depth= 9379 States= 1.23e+08 Transitions= 1.94e+09 Memory= 3781.904 t= 1.78e+03 R= 7e+04 +Depth= 9379 States= 1.24e+08 Transitions= 1.96e+09 Memory= 3797.529 t= 1.8e+03 R= 7e+04 +Depth= 9379 States= 1.25e+08 Transitions= 1.98e+09 Memory= 3810.908 t= 1.82e+03 R= 7e+04 +Depth= 9379 States= 1.26e+08 Transitions= 2e+09 Memory= 3826.143 t= 1.83e+03 R= 7e+04 +Depth= 9379 States= 1.27e+08 Transitions= 2.02e+09 Memory= 3839.717 t= 1.86e+03 R= 7e+04 +Depth= 9379 States= 1.28e+08 Transitions= 2.04e+09 Memory= 3881.709 t= 1.87e+03 R= 7e+04 +Depth= 9379 States= 1.29e+08 Transitions= 2.06e+09 Memory= 3946.553 t= 1.89e+03 R= 7e+04 +Depth= 9379 States= 1.3e+08 Transitions= 2.08e+09 Memory= 3970.479 t= 1.91e+03 R= 7e+04 +Depth= 9379 States= 1.31e+08 Transitions= 2.09e+09 Memory= 3991.768 t= 1.92e+03 R= 7e+04 +Depth= 9379 States= 1.32e+08 Transitions= 2.1e+09 Memory= 4007.490 t= 1.93e+03 R= 7e+04 +Depth= 9379 States= 1.33e+08 Transitions= 2.13e+09 Memory= 4020.772 t= 1.95e+03 R= 7e+04 +Depth= 9379 States= 1.34e+08 Transitions= 2.14e+09 Memory= 4036.201 t= 1.97e+03 R= 7e+04 +Depth= 9379 States= 1.35e+08 Transitions= 2.16e+09 Memory= 4051.924 t= 1.98e+03 R= 7e+04 +pan: resizing hashtable to -w28.. done +Depth= 9379 States= 1.36e+08 Transitions= 2.18e+09 Memory= 6099.924 t= 2.02e+03 R= 7e+04 +Depth= 9379 States= 1.37e+08 Transitions= 2.2e+09 Memory= 6099.924 t= 2.03e+03 R= 7e+04 +Depth= 9379 States= 1.38e+08 Transitions= 2.22e+09 Memory= 6099.924 t= 2.05e+03 R= 7e+04 +Depth= 9379 States= 1.39e+08 Transitions= 2.24e+09 Memory= 6099.924 t= 2.07e+03 R= 7e+04 +Depth= 9379 States= 1.4e+08 Transitions= 2.26e+09 Memory= 6108.518 t= 2.09e+03 R= 7e+04 +Depth= 9379 States= 1.41e+08 Transitions= 2.28e+09 Memory= 6124.729 t= 2.1e+03 R= 7e+04 +Depth= 9379 States= 1.42e+08 Transitions= 2.3e+09 Memory= 6138.889 t= 2.12e+03 R= 7e+04 +Depth= 9379 States= 1.43e+08 Transitions= 2.31e+09 Memory= 6178.928 t= 2.13e+03 R= 7e+04 +Depth= 9379 States= 1.44e+08 Transitions= 2.33e+09 Memory= 6247.483 t= 2.15e+03 R= 7e+04 +Depth= 9379 States= 1.45e+08 Transitions= 2.35e+09 Memory= 6316.135 t= 2.17e+03 R= 7e+04 +Depth= 9379 States= 1.46e+08 Transitions= 2.37e+09 Memory= 6353.440 t= 2.19e+03 R= 7e+04 +Depth= 9379 States= 1.47e+08 Transitions= 2.39e+09 Memory= 6381.662 t= 2.21e+03 R= 7e+04 +Depth= 9379 States= 1.48e+08 Transitions= 2.41e+09 Memory= 6422.190 t= 2.22e+03 R= 7e+04 +Depth= 9379 States= 1.49e+08 Transitions= 2.42e+09 Memory= 6449.143 t= 2.23e+03 R= 7e+04 +Depth= 9379 States= 1.5e+08 Transitions= 2.44e+09 Memory= 6472.580 t= 2.25e+03 R= 7e+04 +Depth= 9379 States= 1.51e+08 Transitions= 2.45e+09 Memory= 6503.733 t= 2.26e+03 R= 7e+04 +Depth= 9379 States= 1.52e+08 Transitions= 2.47e+09 Memory= 6531.369 t= 2.28e+03 R= 7e+04 +Depth= 9379 States= 1.53e+08 Transitions= 2.49e+09 Memory= 6554.123 t= 2.29e+03 R= 7e+04 +Depth= 9379 States= 1.54e+08 Transitions= 2.5e+09 Memory= 6585.373 t= 2.31e+03 R= 7e+04 +Depth= 9379 States= 1.55e+08 Transitions= 2.52e+09 Memory= 6622.776 t= 2.32e+03 R= 7e+04 +Depth= 9379 States= 1.56e+08 Transitions= 2.54e+09 Memory= 6671.213 t= 2.34e+03 R= 7e+04 +Depth= 9379 States= 1.57e+08 Transitions= 2.55e+09 Memory= 6696.115 t= 2.35e+03 R= 7e+04 +Depth= 9379 States= 1.58e+08 Transitions= 2.57e+09 Memory= 6722.776 t= 2.37e+03 R= 7e+04 +Depth= 9379 States= 1.59e+08 Transitions= 2.58e+09 Memory= 6764.572 t= 2.38e+03 R= 7e+04 +Depth= 9379 States= 1.6e+08 Transitions= 2.6e+09 Memory= 6830.490 t= 2.4e+03 R= 7e+04 +Depth= 9379 States= 1.61e+08 Transitions= 2.62e+09 Memory= 6879.026 t= 2.41e+03 R= 7e+04 +Depth= 9379 States= 1.62e+08 Transitions= 2.63e+09 Memory= 6895.432 t= 2.42e+03 R= 7e+04 +Depth= 9379 States= 1.63e+08 Transitions= 2.65e+09 Memory= 6909.787 t= 2.44e+03 R= 7e+04 +Depth= 9379 States= 1.64e+08 Transitions= 2.67e+09 Memory= 6925.217 t= 2.46e+03 R= 7e+04 +Depth= 9379 States= 1.65e+08 Transitions= 2.69e+09 Memory= 6938.986 t= 2.48e+03 R= 7e+04 +Depth= 9379 States= 1.66e+08 Transitions= 2.71e+09 Memory= 6953.537 t= 2.5e+03 R= 7e+04 +Depth= 9379 States= 1.67e+08 Transitions= 2.73e+09 Memory= 6967.893 t= 2.52e+03 R= 7e+04 +Depth= 9379 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7022.190 t= 2.53e+03 R= 7e+04 +Depth= 9379 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7076.779 t= 2.55e+03 R= 7e+04 +Depth= 9379 States= 1.7e+08 Transitions= 2.79e+09 Memory= 7102.365 t= 2.57e+03 R= 7e+04 +Depth= 9379 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7119.162 t= 2.58e+03 R= 7e+04 +Depth= 9379 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7135.178 t= 2.59e+03 R= 7e+04 +Depth= 9379 States= 1.73e+08 Transitions= 2.84e+09 Memory= 7150.022 t= 2.61e+03 R= 7e+04 +Depth= 9379 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7164.475 t= 2.63e+03 R= 7e+04 +Depth= 9379 States= 1.75e+08 Transitions= 2.87e+09 Memory= 7180.295 t= 2.64e+03 R= 7e+04 +Depth= 9379 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7198.264 t= 2.66e+03 R= 7e+04 +Depth= 9379 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7211.447 t= 2.67e+03 R= 7e+04 +Depth= 9379 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7224.338 t= 2.7e+03 R= 7e+04 +Depth= 9379 States= 1.79e+08 Transitions= 2.95e+09 Memory= 7239.084 t= 2.72e+03 R= 7e+04 +Depth= 9379 States= 1.8e+08 Transitions= 2.97e+09 Memory= 7253.342 t= 2.74e+03 R= 7e+04 +Depth= 9379 States= 1.81e+08 Transitions= 2.99e+09 Memory= 7268.283 t= 2.75e+03 R= 7e+04 +Depth= 9379 States= 1.82e+08 Transitions= 3.01e+09 Memory= 7283.615 t= 2.77e+03 R= 7e+04 +Depth= 9379 States= 1.83e+08 Transitions= 3.02e+09 Memory= 7335.276 t= 2.78e+03 R= 7e+04 +Depth= 9379 States= 1.84e+08 Transitions= 3.04e+09 Memory= 7403.928 t= 2.8e+03 R= 7e+04 +Depth= 9379 States= 1.85e+08 Transitions= 3.06e+09 Memory= 7472.580 t= 2.82e+03 R= 7e+04 +Depth= 9379 States= 1.86e+08 Transitions= 3.08e+09 Memory= 7501.877 t= 2.84e+03 R= 7e+04 +Depth= 9379 States= 1.87e+08 Transitions= 3.1e+09 Memory= 7528.147 t= 2.85e+03 R= 7e+04 +Depth= 9379 States= 1.88e+08 Transitions= 3.11e+09 Memory= 7566.135 t= 2.87e+03 R= 7e+04 +Depth= 9379 States= 1.89e+08 Transitions= 3.13e+09 Memory= 7593.479 t= 2.88e+03 R= 7e+04 +Depth= 9379 States= 1.9e+08 Transitions= 3.15e+09 Memory= 7625.119 t= 2.9e+03 R= 7e+04 +Depth= 9379 States= 1.91e+08 Transitions= 3.16e+09 Memory= 7647.483 t= 2.91e+03 R= 7e+04 +Depth= 9379 States= 1.92e+08 Transitions= 3.18e+09 Memory= 7677.951 t= 2.93e+03 R= 7e+04 +Depth= 9379 States= 1.93e+08 Transitions= 3.2e+09 Memory= 7698.947 t= 2.94e+03 R= 7e+04 +Depth= 9379 States= 1.94e+08 Transitions= 3.21e+09 Memory= 7732.443 t= 2.96e+03 R= 7e+04 +Depth= 9379 States= 1.95e+08 Transitions= 3.23e+09 Memory= 7772.092 t= 2.97e+03 R= 7e+04 +Depth= 9379 States= 1.96e+08 Transitions= 3.24e+09 Memory= 7815.451 t= 2.98e+03 R= 7e+04 +Depth= 9379 States= 1.97e+08 Transitions= 3.26e+09 Memory= 7839.865 t= 3e+03 R= 7e+04 +Depth= 9379 States= 1.98e+08 Transitions= 3.28e+09 Memory= 7869.651 t= 3.01e+03 R= 7e+04 +Depth= 9379 States= 1.99e+08 Transitions= 3.29e+09 Memory= 7921.018 t= 3.03e+03 R= 7e+04 +Depth= 9379 States= 2e+08 Transitions= 3.31e+09 Memory= 7986.740 t= 3.05e+03 R= 7e+04 +Depth= 9379 States= 2.01e+08 Transitions= 3.33e+09 Memory= 8023.752 t= 3.06e+03 R= 7e+04 +Depth= 9379 States= 2.02e+08 Transitions= 3.34e+09 Memory= 8039.768 t= 3.07e+03 R= 7e+04 +Depth= 9379 States= 2.03e+08 Transitions= 3.36e+09 Memory= 8053.830 t= 3.09e+03 R= 7e+04 +Depth= 9379 States= 2.04e+08 Transitions= 3.38e+09 Memory= 8068.772 t= 3.11e+03 R= 7e+04 +Depth= 9379 States= 2.05e+08 Transitions= 3.4e+09 Memory= 8083.127 t= 3.13e+03 R= 7e+04 +Depth= 9379 States= 2.06e+08 Transitions= 3.42e+09 Memory= 8098.068 t= 3.15e+03 R= 7e+04 +Depth= 9379 States= 2.07e+08 Transitions= 3.44e+09 Memory= 8115.744 t= 3.16e+03 R= 7e+04 +Depth= 9379 States= 2.08e+08 Transitions= 3.46e+09 Memory= 8178.537 t= 3.18e+03 R= 7e+04 +Depth= 9379 States= 2.09e+08 Transitions= 3.48e+09 Memory= 8220.627 t= 3.2e+03 R= 7e+04 +Depth= 9379 States= 2.1e+08 Transitions= 3.49e+09 Memory= 8246.799 t= 3.21e+03 R= 7e+04 +Depth= 9379 States= 2.11e+08 Transitions= 3.5e+09 Memory= 8263.791 t= 3.22e+03 R= 7e+04 +Depth= 9379 States= 2.12e+08 Transitions= 3.52e+09 Memory= 8279.514 t= 3.24e+03 R= 7e+04 +Depth= 9379 States= 2.13e+08 Transitions= 3.54e+09 Memory= 8293.772 t= 3.26e+03 R= 7e+04 +Depth= 9379 States= 2.14e+08 Transitions= 3.56e+09 Memory= 8309.201 t= 3.28e+03 R= 7e+04 +Depth= 9379 States= 2.15e+08 Transitions= 3.58e+09 Memory= 8323.752 t= 3.29e+03 R= 7e+04 +Depth= 9379 States= 2.16e+08 Transitions= 3.6e+09 Memory= 8342.990 t= 3.31e+03 R= 7e+04 +Depth= 9379 States= 2.17e+08 Transitions= 3.61e+09 Memory= 8355.197 t= 3.32e+03 R= 7e+04 +Depth= 9379 States= 2.18e+08 Transitions= 3.64e+09 Memory= 8368.674 t= 3.35e+03 R= 7e+04 +Depth= 9379 States= 2.19e+08 Transitions= 3.66e+09 Memory= 8382.932 t= 3.37e+03 R= 7e+04 +Depth= 9379 States= 2.2e+08 Transitions= 3.68e+09 Memory= 8398.459 t= 3.38e+03 R= 7e+04 +Depth= 9379 States= 2.21e+08 Transitions= 3.7e+09 Memory= 8412.912 t= 3.4e+03 R= 6e+04 +Depth= 9379 States= 2.22e+08 Transitions= 3.71e+09 Memory= 8428.244 t= 3.42e+03 R= 6e+04 +Depth= 9379 States= 2.23e+08 Transitions= 3.73e+09 Memory= 8491.721 t= 3.43e+03 R= 6e+04 +Depth= 9379 States= 2.24e+08 Transitions= 3.75e+09 Memory= 8560.373 t= 3.45e+03 R= 6e+04 +Depth= 9379 States= 2.25e+08 Transitions= 3.77e+09 Memory= 8621.604 t= 3.47e+03 R= 6e+04 +Depth= 9379 States= 2.26e+08 Transitions= 3.79e+09 Memory= 8648.850 t= 3.48e+03 R= 6e+04 +Depth= 9379 States= 2.27e+08 Transitions= 3.81e+09 Memory= 8671.994 t= 3.5e+03 R= 6e+04 +Depth= 9379 States= 2.28e+08 Transitions= 3.82e+09 Memory= 8710.861 t= 3.51e+03 R= 6e+04 +Depth= 9379 States= 2.29e+08 Transitions= 3.84e+09 Memory= 8742.893 t= 3.53e+03 R= 6e+04 +Depth= 9379 States= 2.3e+08 Transitions= 3.85e+09 Memory= 8771.799 t= 3.54e+03 R= 6e+04 +Depth= 9379 States= 2.31e+08 Transitions= 3.87e+09 Memory= 8792.600 t= 3.56e+03 R= 6e+04 +Depth= 9379 States= 2.32e+08 Transitions= 3.89e+09 Memory= 8828.733 t= 3.57e+03 R= 6e+04 +Depth= 9379 States= 2.33e+08 Transitions= 3.9e+09 Memory= 8843.869 t= 3.59e+03 R= 6e+04 +Depth= 9379 States= 2.34e+08 Transitions= 3.92e+09 Memory= 8884.787 t= 3.6e+03 R= 6e+04 +Depth= 9379 States= 2.35e+08 Transitions= 3.93e+09 Memory= 8924.240 t= 3.62e+03 R= 6e+04 +Depth= 9379 States= 2.36e+08 Transitions= 3.95e+09 Memory= 8960.276 t= 3.63e+03 R= 6e+04 +Depth= 9379 States= 2.37e+08 Transitions= 3.97e+09 Memory= 8984.494 t= 3.65e+03 R= 6e+04 +Depth= 9379 States= 2.38e+08 Transitions= 3.98e+09 Memory= 9016.428 t= 3.66e+03 R= 6e+04 +Depth= 9379 States= 2.39e+08 Transitions= 4e+09 Memory= 9077.365 t= 3.68e+03 R= 6e+04 +Depth= 9379 States= 2.4e+08 Transitions= 4.02e+09 Memory= 9143.088 t= 3.7e+03 R= 6e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 9379, errors: 0 + 88114592 states, stored (2.40192e+08 visited) +3.782223e+09 states, matched +4.0224152e+09 transitions (= visited+matched) +1.4282782e+10 atomic steps +hash conflicts: 5.384059e+08 (resolved) + +Stats on memory usage (in Megabytes): + 7731.001 equivalent memory usage for states (stored*(State-vector + overhead)) + 6648.180 actual memory usage for states (compression: 85.99%) + state-vector as stored = 51 byte + 28 byte overhead + 2048.000 memory used for hash table (-w28) + 457.764 memory used for DFS stack (-m10000000) + 1.188 memory lost to fragmentation + 9152.756 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 370, "(1)" + line 164, "pan.___", state 378, "(1)" + line 168, "pan.___", state 390, "(1)" + line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 449, "(1)" + line 413, "pan.___", state 462, "(1)" + line 418, "pan.___", state 479, "(1)" + line 399, "pan.___", state 498, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 647, "(1)" + line 418, "pan.___", state 664, "(1)" + line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 710, "(1)" + line 164, "pan.___", state 718, "(1)" + line 168, "pan.___", state 730, "(1)" + line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 840, "(1)" + line 164, "pan.___", state 848, "(1)" + line 168, "pan.___", state 860, "(1)" + line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 884, "(1)" + line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 885, "else" + line 399, "pan.___", state 888, "(1)" + line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 898, "(1)" + line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 899, "else" + line 403, "pan.___", state 902, "(1)" + line 403, "pan.___", state 903, "(1)" + line 403, "pan.___", state 903, "(1)" + line 401, "pan.___", state 908, "((i<1))" + line 401, "pan.___", state 908, "((i>=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1508, "(1)" + line 164, "pan.___", state 1516, "(1)" + line 168, "pan.___", state 1528, "(1)" + line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1552, "(1)" + line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1553, "else" + line 399, "pan.___", state 1556, "(1)" + line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1566, "(1)" + line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1567, "else" + line 403, "pan.___", state 1570, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 401, "pan.___", state 1576, "((i<1))" + line 401, "pan.___", state 1576, "((i>=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1811, "(1)" + line 164, "pan.___", state 1819, "(1)" + line 168, "pan.___", state 1831, "(1)" + line 702, "pan.___", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 751, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 3.7e+03 seconds +pan: rate 64918.749 states/second +pan: avg transition delay 9.1982e-07 usec +cp .input.spin urcu_progress_writer.spin.input +cp .input.spin.trail urcu_progress_writer.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input new file mode 100644 index 0000000..43221e7 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input @@ -0,0 +1,723 @@ +#define WRITER_PROGRESS + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.define b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.log b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.log new file mode 100644 index 0000000..f870a6e --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.log @@ -0,0 +1,535 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +depth 15: Claim reached state 9 (line 750) +depth 1194: Claim reached state 9 (line 749) +Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.57 R= 1e+05 +Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.5 R= 1e+05 +pan: acceptance cycle (at depth 1938) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 23684, errors: 1 + 682672 states, stored (2.81536e+06 visited) + 30226122 states, matched + 33041487 transitions (= visited+matched) +1.1631626e+08 atomic steps +hash conflicts: 6056013 (resolved) + +Stats on memory usage (in Megabytes): + 59.896 equivalent memory usage for states (stored*(State-vector + overhead)) + 47.456 actual memory usage for states (compression: 79.23%) + state-vector as stored = 45 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 513.127 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 256, "(1)" + line 419, "pan.___", state 286, "(1)" + line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 395, "(1)" + line 419, "pan.___", state 425, "(1)" + line 541, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 70, "(1)" + line 419, "pan.___", state 100, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 247, "(1)" + line 419, "pan.___", state 277, "(1)" + line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 359, "(1)" + line 419, "pan.___", state 389, "(1)" + line 615, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 402, "pan.___", state 134, "((i<1))" + line 402, "pan.___", state 134, "((i>=1))" + line 410, "pan.___", state 153, "(1)" + line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 154, "else" + line 410, "pan.___", state 157, "(1)" + line 410, "pan.___", state 158, "(1)" + line 410, "pan.___", state 158, "(1)" + line 414, "pan.___", state 166, "(1)" + line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 167, "else" + line 414, "pan.___", state 170, "(1)" + line 414, "pan.___", state 171, "(1)" + line 414, "pan.___", state 171, "(1)" + line 412, "pan.___", state 176, "((i<1))" + line 412, "pan.___", state 176, "((i>=1))" + line 419, "pan.___", state 183, "(1)" + line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 184, "else" + line 419, "pan.___", state 187, "(1)" + line 419, "pan.___", state 188, "(1)" + line 419, "pan.___", state 188, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 370, "pan.___", state 193, "(1)" + line 653, "pan.___", state 199, "(1)" + line 647, "pan.___", state 202, "((write_lock==0))" + line 647, "pan.___", state 202, "else" + line 645, "pan.___", state 203, "(1)" + line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, "pan.___", state 225, "((j<1))" + line 178, "pan.___", state 225, "((j>=1))" + line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 240, "(1)" + line 165, "pan.___", state 248, "(1)" + line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 165, "pan.___", state 249, "else" + line 163, "pan.___", state 254, "((j<1))" + line 163, "pan.___", state 254, "((j>=1))" + line 169, "pan.___", state 260, "(1)" + line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 169, "pan.___", state 261, "else" + line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 171, "pan.___", state 264, "else" + line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 169, "pan.___", state 323, "(1)" + line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, "pan.___", state 355, "((j<1))" + line 178, "pan.___", state 355, "((j>=1))" + line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 370, "(1)" + line 165, "pan.___", state 378, "(1)" + line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 165, "pan.___", state 379, "else" + line 163, "pan.___", state 384, "((j<1))" + line 163, "pan.___", state 384, "((j>=1))" + line 169, "pan.___", state 390, "(1)" + line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 169, "pan.___", state 391, "else" + line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 171, "pan.___", state 394, "else" + line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 410, "(1)" + line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 424, "(1)" + line 404, "pan.___", state 425, "(1)" + line 404, "pan.___", state 425, "(1)" + line 402, "pan.___", state 430, "((i<1))" + line 402, "pan.___", state 430, "((i>=1))" + line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 449, "(1)" + line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 450, "else" + line 410, "pan.___", state 453, "(1)" + line 410, "pan.___", state 454, "(1)" + line 410, "pan.___", state 454, "(1)" + line 414, "pan.___", state 462, "(1)" + line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 463, "else" + line 414, "pan.___", state 466, "(1)" + line 414, "pan.___", state 467, "(1)" + line 414, "pan.___", state 467, "(1)" + line 412, "pan.___", state 472, "((i<1))" + line 412, "pan.___", state 472, "((i>=1))" + line 419, "pan.___", state 479, "(1)" + line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 480, "else" + line 419, "pan.___", state 483, "(1)" + line 419, "pan.___", state 484, "(1)" + line 419, "pan.___", state 484, "(1)" + line 421, "pan.___", state 487, "(1)" + line 421, "pan.___", state 487, "(1)" + line 370, "pan.___", state 489, "(1)" + line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )] = (tmp^(1<<7))" + line 400, "pan.___", state 498, "(1)" + line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 499, "else" + line 400, "pan.___", state 502, "(1)" + line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 516, "(1)" + line 404, "pan.___", state 517, "(1)" + line 404, "pan.___", state 517, "(1)" + line 402, "pan.___", state 522, "((i<1))" + line 402, "pan.___", state 522, "((i>=1))" + line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 541, "(1)" + line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 542, "else" + line 410, "pan.___", state 545, "(1)" + line 410, "pan.___", state 546, "(1)" + line 410, "pan.___", state 546, "(1)" + line 414, "pan.___", state 554, "(1)" + line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 555, "else" + line 414, "pan.___", state 558, "(1)" + line 414, "pan.___", state 559, "(1)" + line 414, "pan.___", state 559, "(1)" + line 412, "pan.___", state 564, "((i<1))" + line 412, "pan.___", state 564, "((i>=1))" + line 419, "pan.___", state 571, "(1)" + line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 572, "else" + line 419, "pan.___", state 575, "(1)" + line 419, "pan.___", state 576, "(1)" + line 419, "pan.___", state 576, "(1)" + line 421, "pan.___", state 579, "(1)" + line 421, "pan.___", state 579, "(1)" + line 370, "pan.___", state 581, "(1)" + line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 595, "(1)" + line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 609, "(1)" + line 404, "pan.___", state 610, "(1)" + line 404, "pan.___", state 610, "(1)" + line 402, "pan.___", state 615, "((i<1))" + line 402, "pan.___", state 615, "((i>=1))" + line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 634, "(1)" + line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 635, "else" + line 410, "pan.___", state 638, "(1)" + line 410, "pan.___", state 639, "(1)" + line 410, "pan.___", state 639, "(1)" + line 414, "pan.___", state 647, "(1)" + line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 648, "else" + line 414, "pan.___", state 651, "(1)" + line 414, "pan.___", state 652, "(1)" + line 414, "pan.___", state 652, "(1)" + line 412, "pan.___", state 657, "((i<1))" + line 412, "pan.___", state 657, "((i>=1))" + line 419, "pan.___", state 664, "(1)" + line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 665, "else" + line 419, "pan.___", state 668, "(1)" + line 419, "pan.___", state 669, "(1)" + line 419, "pan.___", state 669, "(1)" + line 421, "pan.___", state 672, "(1)" + line 421, "pan.___", state 672, "(1)" + line 370, "pan.___", state 674, "(1)" + line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 681, "(1)" + line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 682, "else" + line 400, "pan.___", state 685, "(1)" + line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 695, "(1)" + line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 696, "else" + line 404, "pan.___", state 699, "(1)" + line 404, "pan.___", state 700, "(1)" + line 404, "pan.___", state 700, "(1)" + line 402, "pan.___", state 705, "((i<1))" + line 402, "pan.___", state 705, "((i>=1))" + line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 724, "(1)" + line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 725, "else" + line 410, "pan.___", state 728, "(1)" + line 410, "pan.___", state 729, "(1)" + line 410, "pan.___", state 729, "(1)" + line 414, "pan.___", state 737, "(1)" + line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 738, "else" + line 414, "pan.___", state 741, "(1)" + line 414, "pan.___", state 742, "(1)" + line 414, "pan.___", state 742, "(1)" + line 412, "pan.___", state 747, "((i<1))" + line 412, "pan.___", state 747, "((i>=1))" + line 419, "pan.___", state 754, "(1)" + line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 755, "else" + line 419, "pan.___", state 758, "(1)" + line 419, "pan.___", state 759, "(1)" + line 419, "pan.___", state 759, "(1)" + line 421, "pan.___", state 762, "(1)" + line 421, "pan.___", state 762, "(1)" + line 370, "pan.___", state 764, "(1)" + line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )])&(1<<7))))" + line 430, "pan.___", state 767, "else" + line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 779, "(1)" + line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 780, "else" + line 400, "pan.___", state 783, "(1)" + line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 793, "(1)" + line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 794, "else" + line 404, "pan.___", state 797, "(1)" + line 404, "pan.___", state 798, "(1)" + line 404, "pan.___", state 798, "(1)" + line 402, "pan.___", state 803, "((i<1))" + line 402, "pan.___", state 803, "((i>=1))" + line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 822, "(1)" + line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 823, "else" + line 410, "pan.___", state 826, "(1)" + line 410, "pan.___", state 827, "(1)" + line 410, "pan.___", state 827, "(1)" + line 414, "pan.___", state 835, "(1)" + line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 836, "else" + line 414, "pan.___", state 839, "(1)" + line 414, "pan.___", state 840, "(1)" + line 414, "pan.___", state 840, "(1)" + line 412, "pan.___", state 845, "((i<1))" + line 412, "pan.___", state 845, "((i>=1))" + line 419, "pan.___", state 852, "(1)" + line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 853, "else" + line 419, "pan.___", state 856, "(1)" + line 419, "pan.___", state 857, "(1)" + line 419, "pan.___", state 857, "(1)" + line 421, "pan.___", state 860, "(1)" + line 421, "pan.___", state 860, "(1)" + line 370, "pan.___", state 862, "(1)" + line 449, "pan.___", state 870, "((tmp<1))" + line 449, "pan.___", state 870, "((tmp>=1))" + line 462, "pan.___", state 873, "tmp = 0" + line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 883, "(1)" + line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 897, "(1)" + line 404, "pan.___", state 898, "(1)" + line 404, "pan.___", state 898, "(1)" + line 402, "pan.___", state 903, "((i<1))" + line 402, "pan.___", state 903, "((i>=1))" + line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 922, "(1)" + line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 923, "else" + line 410, "pan.___", state 926, "(1)" + line 410, "pan.___", state 927, "(1)" + line 410, "pan.___", state 927, "(1)" + line 414, "pan.___", state 935, "(1)" + line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 936, "else" + line 414, "pan.___", state 939, "(1)" + line 414, "pan.___", state 940, "(1)" + line 414, "pan.___", state 940, "(1)" + line 412, "pan.___", state 945, "((i<1))" + line 412, "pan.___", state 945, "((i>=1))" + line 419, "pan.___", state 952, "(1)" + line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 953, "else" + line 419, "pan.___", state 956, "(1)" + line 419, "pan.___", state 957, "(1)" + line 419, "pan.___", state 957, "(1)" + line 421, "pan.___", state 960, "(1)" + line 421, "pan.___", state 960, "(1)" + line 370, "pan.___", state 962, "(1)" + line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )]" + line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 973, "(1)" + line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 987, "(1)" + line 404, "pan.___", state 988, "(1)" + line 404, "pan.___", state 988, "(1)" + line 402, "pan.___", state 993, "((i<1))" + line 402, "pan.___", state 993, "((i>=1))" + line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1012, "(1)" + line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1013, "else" + line 410, "pan.___", state 1016, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 414, "pan.___", state 1025, "(1)" + line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1026, "else" + line 414, "pan.___", state 1029, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 412, "pan.___", state 1035, "((i<1))" + line 412, "pan.___", state 1035, "((i>=1))" + line 419, "pan.___", state 1042, "(1)" + line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1043, "else" + line 419, "pan.___", state 1046, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 370, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1061, "(1)" + line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1117, "(1)" + line 419, "pan.___", state 1134, "(1)" + line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1210, "(1)" + line 419, "pan.___", state 1227, "(1)" + line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1287, "(1)" + line 414, "pan.___", state 1300, "(1)" + line 419, "pan.___", state 1317, "(1)" + line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1342, "(1)" + line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1343, "else" + line 400, "pan.___", state 1346, "(1)" + line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1356, "(1)" + line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1357, "else" + line 404, "pan.___", state 1360, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 402, "pan.___", state 1366, "((i<1))" + line 402, "pan.___", state 1366, "((i>=1))" + line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1385, "(1)" + line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1386, "else" + line 410, "pan.___", state 1389, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 414, "pan.___", state 1398, "(1)" + line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1399, "else" + line 414, "pan.___", state 1402, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 412, "pan.___", state 1408, "((i<1))" + line 412, "pan.___", state 1408, "((i>=1))" + line 419, "pan.___", state 1415, "(1)" + line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1416, "else" + line 419, "pan.___", state 1419, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 1471, "(1)" + line 165, "pan.___", state 1479, "(1)" + line 169, "pan.___", state 1491, "(1)" + line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 180, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 184, "pan.___", state 1591, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 1601, "(1)" + line 165, "pan.___", state 1609, "(1)" + line 169, "pan.___", state 1621, "(1)" + line 370, "pan.___", state 1642, "(1)" + line 696, "pan.___", state 1643, "(1)" + line 703, "pan.___", state 1646, "-end-" + (308 of 1646 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 752, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 30.2 seconds +pan: rate 93347.646 states/second +pan: avg transition delay 9.1279e-07 usec +cp .input.spin urcu_progress_writer_error.spin.input +cp .input.spin.trail urcu_progress_writer_error.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..eb1d4e6 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input @@ -0,0 +1,724 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..c5a6fbf --- /dev/null +++ b/urcu-nosched-model/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,23572 @@ +-2:4:-2 +-4:-4:-4 +1:0:2561 +2:4:2513 +3:4:2516 +4:4:2516 +5:4:2519 +6:4:2527 +7:4:2527 +8:4:2530 +9:4:2536 +10:4:2540 +11:4:2540 +12:4:2543 +13:4:2551 +14:4:2555 +15:4:2556 +16:0:2561 +17:4:2558 +18:0:2561 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+23559:3:2174 +23560:3:2179 +23561:3:2180 +23562:0:2565 +23563:3:2192 +23564:0:2565 +23565:3:2013 +23566:0:2565 +23567:3:2014 +23568:0:2565 +23569:1:206 diff --git a/urcu-nosched-model/result-signal-over-writer/DEFINES b/urcu-nosched-model/result-signal-over-writer/DEFINES new file mode 100644 index 0000000..ec600f0 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/DEFINES @@ -0,0 +1,16 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu-nosched-model/result-signal-over-writer/Makefile b/urcu-nosched-model/result-signal-over-writer/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-nosched-model/result-signal-over-writer/asserts.log b/urcu-nosched-model/result-signal-over-writer/asserts.log new file mode 100644 index 0000000..c102ffb --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/asserts.log @@ -0,0 +1,334 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 40 byte, depth reached 7872, errors: 0 + 20128 states, stored + 191477 states, matched + 211605 transitions (= stored+matched) + 712166 atomic steps +hash conflicts: 942 (resolved) + +Stats on memory usage (in Megabytes): + 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.467 actual memory usage for states (unsuccessful compression: 112.36%) + state-vector as stored = 48 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.229 total actual memory usage + +unreached in proctype urcu_reader_sig + line 401, ".input.spin", state 330, "(1)" + line 612, ".input.spin", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 59, "(1)" + line 416, ".input.spin", state 89, "(1)" + line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 160, "(1)" + line 650, ".input.spin", state 213, "(1)" + line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 177, ".input.spin", state 233, "(1)" + line 158, ".input.spin", state 254, "(1)" + line 162, ".input.spin", state 262, "(1)" + line 166, ".input.spin", state 274, "(1)" + line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 752, "(1)" + line 162, ".input.spin", state 760, "(1)" + line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 761, "else" + line 160, ".input.spin", state 766, "((j<1))" + line 160, ".input.spin", state 766, "((j>=1))" + line 166, ".input.spin", state 772, "(1)" + line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 773, "else" + line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 776, "else" + line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 835, "(1)" + line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 852, "(1)" + line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 861, "(1)" + line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 862, "else" + line 175, ".input.spin", state 867, "((j<1))" + line 175, ".input.spin", state 867, "((j>=1))" + line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 882, "(1)" + line 162, ".input.spin", state 890, "(1)" + line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 891, "else" + line 160, ".input.spin", state 896, "((j<1))" + line 160, ".input.spin", state 896, "((j>=1))" + line 166, ".input.spin", state 902, "(1)" + line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 903, "else" + line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 906, "else" + line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 908, "else" + line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 909, "else" + line 354, ".input.spin", state 915, "((sighand_exec==1))" + line 354, ".input.spin", state 915, "else" + line 360, ".input.spin", state 918, "sighand_exec = 1" + line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 933, "(1)" + line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 934, "else" + line 397, ".input.spin", state 937, "(1)" + line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 947, "(1)" + line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 948, "else" + line 401, ".input.spin", state 951, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 399, ".input.spin", state 957, "((i<1))" + line 399, ".input.spin", state 957, "((i>=1))" + line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 976, "(1)" + line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 977, "else" + line 407, ".input.spin", state 980, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 411, ".input.spin", state 989, "(1)" + line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 990, "else" + line 411, ".input.spin", state 993, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 409, ".input.spin", state 999, "((i<1))" + line 409, ".input.spin", state 999, "((i>=1))" + line 416, ".input.spin", state 1006, "(1)" + line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1007, "else" + line 416, ".input.spin", state 1010, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 360, ".input.spin", state 1023, "sighand_exec = 1" + line 401, ".input.spin", state 1054, "(1)" + line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1113, "(1)" + line 401, ".input.spin", state 1151, "(1)" + line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1210, "(1)" + line 397, ".input.spin", state 1236, "(1)" + line 401, ".input.spin", state 1250, "(1)" + line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1309, "(1)" + line 401, ".input.spin", state 1350, "(1)" + line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1409, "(1)" + line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1432, "(1)" + line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1441, "(1)" + line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1442, "else" + line 175, ".input.spin", state 1447, "((j<1))" + line 175, ".input.spin", state 1447, "((j>=1))" + line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1462, "(1)" + line 162, ".input.spin", state 1470, "(1)" + line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1471, "else" + line 160, ".input.spin", state 1476, "((j<1))" + line 160, ".input.spin", state 1476, "((j>=1))" + line 166, ".input.spin", state 1482, "(1)" + line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1483, "else" + line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1486, "else" + line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 1545, "(1)" + line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1562, "(1)" + line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1571, "(1)" + line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1572, "else" + line 175, ".input.spin", state 1577, "((j<1))" + line 175, ".input.spin", state 1577, "((j>=1))" + line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1592, "(1)" + line 162, ".input.spin", state 1600, "(1)" + line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1601, "else" + line 160, ".input.spin", state 1606, "((j<1))" + line 160, ".input.spin", state 1606, "((j>=1))" + line 166, ".input.spin", state 1612, "(1)" + line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1613, "else" + line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1616, "else" + line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 1618, "else" + line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 1619, "else" + line 354, ".input.spin", state 1625, "((sighand_exec==1))" + line 354, ".input.spin", state 1625, "else" + line 360, ".input.spin", state 1628, "sighand_exec = 1" + line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 1643, "(1)" + line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 1644, "else" + line 397, ".input.spin", state 1647, "(1)" + line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 1657, "(1)" + line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 1658, "else" + line 401, ".input.spin", state 1661, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 399, ".input.spin", state 1667, "((i<1))" + line 399, ".input.spin", state 1667, "((i>=1))" + line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 1686, "(1)" + line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 1687, "else" + line 407, ".input.spin", state 1690, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 411, ".input.spin", state 1699, "(1)" + line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 1700, "else" + line 411, ".input.spin", state 1703, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 409, ".input.spin", state 1709, "((i<1))" + line 409, ".input.spin", state 1709, "((i>=1))" + line 416, ".input.spin", state 1716, "(1)" + line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1717, "else" + line 416, ".input.spin", state 1720, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 360, ".input.spin", state 1733, "sighand_exec = 1" + line 177, ".input.spin", state 1758, "(1)" + line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1779, "(1)" + line 162, ".input.spin", state 1787, "(1)" + line 166, ".input.spin", state 1799, "(1)" + line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/asserts.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu-nosched-model/result-signal-over-writer/references.txt b/urcu-nosched-model/result-signal-over-writer/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/DEFINES b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/DEFINES new file mode 100644 index 0000000..ec600f0 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/DEFINES @@ -0,0 +1,16 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/Makefile b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.log b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.log new file mode 100644 index 0000000..c102ffb --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.log @@ -0,0 +1,334 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 40 byte, depth reached 7872, errors: 0 + 20128 states, stored + 191477 states, matched + 211605 transitions (= stored+matched) + 712166 atomic steps +hash conflicts: 942 (resolved) + +Stats on memory usage (in Megabytes): + 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.467 actual memory usage for states (unsuccessful compression: 112.36%) + state-vector as stored = 48 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.229 total actual memory usage + +unreached in proctype urcu_reader_sig + line 401, ".input.spin", state 330, "(1)" + line 612, ".input.spin", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 59, "(1)" + line 416, ".input.spin", state 89, "(1)" + line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 160, "(1)" + line 650, ".input.spin", state 213, "(1)" + line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 177, ".input.spin", state 233, "(1)" + line 158, ".input.spin", state 254, "(1)" + line 162, ".input.spin", state 262, "(1)" + line 166, ".input.spin", state 274, "(1)" + line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 752, "(1)" + line 162, ".input.spin", state 760, "(1)" + line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 761, "else" + line 160, ".input.spin", state 766, "((j<1))" + line 160, ".input.spin", state 766, "((j>=1))" + line 166, ".input.spin", state 772, "(1)" + line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 773, "else" + line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 776, "else" + line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 835, "(1)" + line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 852, "(1)" + line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 861, "(1)" + line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 862, "else" + line 175, ".input.spin", state 867, "((j<1))" + line 175, ".input.spin", state 867, "((j>=1))" + line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 882, "(1)" + line 162, ".input.spin", state 890, "(1)" + line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 891, "else" + line 160, ".input.spin", state 896, "((j<1))" + line 160, ".input.spin", state 896, "((j>=1))" + line 166, ".input.spin", state 902, "(1)" + line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 903, "else" + line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 906, "else" + line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 908, "else" + line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 909, "else" + line 354, ".input.spin", state 915, "((sighand_exec==1))" + line 354, ".input.spin", state 915, "else" + line 360, ".input.spin", state 918, "sighand_exec = 1" + line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 933, "(1)" + line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 934, "else" + line 397, ".input.spin", state 937, "(1)" + line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 947, "(1)" + line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 948, "else" + line 401, ".input.spin", state 951, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 399, ".input.spin", state 957, "((i<1))" + line 399, ".input.spin", state 957, "((i>=1))" + line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 976, "(1)" + line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 977, "else" + line 407, ".input.spin", state 980, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 411, ".input.spin", state 989, "(1)" + line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 990, "else" + line 411, ".input.spin", state 993, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 409, ".input.spin", state 999, "((i<1))" + line 409, ".input.spin", state 999, "((i>=1))" + line 416, ".input.spin", state 1006, "(1)" + line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1007, "else" + line 416, ".input.spin", state 1010, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 360, ".input.spin", state 1023, "sighand_exec = 1" + line 401, ".input.spin", state 1054, "(1)" + line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1113, "(1)" + line 401, ".input.spin", state 1151, "(1)" + line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1210, "(1)" + line 397, ".input.spin", state 1236, "(1)" + line 401, ".input.spin", state 1250, "(1)" + line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1309, "(1)" + line 401, ".input.spin", state 1350, "(1)" + line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1409, "(1)" + line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1432, "(1)" + line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1441, "(1)" + line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1442, "else" + line 175, ".input.spin", state 1447, "((j<1))" + line 175, ".input.spin", state 1447, "((j>=1))" + line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1462, "(1)" + line 162, ".input.spin", state 1470, "(1)" + line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1471, "else" + line 160, ".input.spin", state 1476, "((j<1))" + line 160, ".input.spin", state 1476, "((j>=1))" + line 166, ".input.spin", state 1482, "(1)" + line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1483, "else" + line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1486, "else" + line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 1545, "(1)" + line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1562, "(1)" + line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1571, "(1)" + line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1572, "else" + line 175, ".input.spin", state 1577, "((j<1))" + line 175, ".input.spin", state 1577, "((j>=1))" + line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1592, "(1)" + line 162, ".input.spin", state 1600, "(1)" + line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1601, "else" + line 160, ".input.spin", state 1606, "((j<1))" + line 160, ".input.spin", state 1606, "((j>=1))" + line 166, ".input.spin", state 1612, "(1)" + line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1613, "else" + line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1616, "else" + line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 1618, "else" + line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 1619, "else" + line 354, ".input.spin", state 1625, "((sighand_exec==1))" + line 354, ".input.spin", state 1625, "else" + line 360, ".input.spin", state 1628, "sighand_exec = 1" + line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 1643, "(1)" + line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 1644, "else" + line 397, ".input.spin", state 1647, "(1)" + line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 1657, "(1)" + line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 1658, "else" + line 401, ".input.spin", state 1661, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 399, ".input.spin", state 1667, "((i<1))" + line 399, ".input.spin", state 1667, "((i>=1))" + line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 1686, "(1)" + line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 1687, "else" + line 407, ".input.spin", state 1690, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 411, ".input.spin", state 1699, "(1)" + line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 1700, "else" + line 411, ".input.spin", state 1703, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 409, ".input.spin", state 1709, "((i<1))" + line 409, ".input.spin", state 1709, "((i>=1))" + line 416, ".input.spin", state 1716, "(1)" + line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1717, "else" + line 416, ".input.spin", state 1720, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 360, ".input.spin", state 1733, "sighand_exec = 1" + line 177, ".input.spin", state 1758, "(1)" + line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1779, "(1)" + line 162, ".input.spin", state 1787, "(1)" + line 166, ".input.spin", state 1799, "(1)" + line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/references.txt b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/result-signal-over-writer/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/.input.define b/urcu-nosched-model/result-signal-over-writer/testmerge/.input.define new file mode 100644 index 0000000..e69de29 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/.input.spin b/urcu-nosched-model/result-signal-over-writer/testmerge/.input.spin new file mode 100644 index 0000000..f2737c4 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/.input.spin @@ -0,0 +1,531 @@ + +#define NR_READERS 2 +#define NR_WRITERS 1 + +#define NR_PROCS 3 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/DEFINES b/urcu-nosched-model/result-signal-over-writer/testmerge/DEFINES new file mode 100644 index 0000000..12c751b --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/DEFINES @@ -0,0 +1,31 @@ + +#define NR_READERS 2 +#define NR_WRITERS 1 + +#define NR_PROCS 3 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/Makefile b/urcu-nosched-model/result-signal-over-writer/testmerge/Makefile new file mode 100644 index 0000000..ca932b7 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/Makefile @@ -0,0 +1,165 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.log b/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.log new file mode 100644 index 0000000..75f2427 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.log @@ -0,0 +1,10 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +spin: line 295 replacement value: tmp +spin: line 295 ".input.spin", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' +spin: 1 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input new file mode 100644 index 0000000..b06898a --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input @@ -0,0 +1,409 @@ +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/references.txt b/urcu-nosched-model/result-signal-over-writer/testmerge/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.sh b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin new file mode 100644 index 0000000..61d9052 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin @@ -0,0 +1,500 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp2 b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp2 new file mode 100644 index 0000000..b1c8311 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp2 @@ -0,0 +1,395 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_WRITERS 1 +#define NR_READERS 3 + +/* Number of reader and writer processes */ +#define NR_PROCS 5 + +/* Includes reader, writer and init process */ +#define MAX_NR_PROCS 5 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif + skip; + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif + skip; + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_writerid() (get_pid()) +#define get_readerid() (get_writerrid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + skip; +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2, nest) +{ + nest_i = 0; + do + :: nest_i < nest -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + ooo_mem(i); + smp_mb(i); + nest_i++; + :: nest_i >= nest -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < nest -> + ooo_mem(i); + smp_mb(i); + ooo_mem(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= nest -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [2] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2, 2); + od; +} + +/* Model the RCU update process. */ + +active [1] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + ooo_mem(i); + smp_mb(i); + ooo_mem(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp5 b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp5 new file mode 100644 index 0000000..324ee39 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu.spin.bkp5 @@ -0,0 +1,398 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.log new file mode 100644 index 0000000..6a04aba --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.log @@ -0,0 +1,414 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 566) +Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.3 R= 3e+04 +Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.9 R= 3e+04 +Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 97 R= 3e+04 +pan: resizing hashtable to -w22.. done +Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4234, errors: 0 + 4027146 states, stored + 66145121 states, matched + 70172267 transitions (= stored+matched) +2.6437688e+08 atomic steps +hash conflicts: 47318190 (resolved) + +Stats on memory usage (in Megabytes): + 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) + 253.418 actual memory usage for states (compression: 78.55%) + state-vector as stored = 38 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 743.076 total actual memory usage + +unreached in proctype urcu_reader + line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 61, "(1)" + line 307, "pan.___", state 91, "(1)" + line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 149, "(1)" + line 307, "pan.___", state 179, "(1)" + line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 238, "(1)" + line 307, "pan.___", state 268, "(1)" + line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 291, "(1)" + line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 300, "(1)" + line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 301, "else" + line 160, "pan.___", state 306, "((j<1))" + line 160, "pan.___", state 306, "((j>=1))" + line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 321, "(1)" + line 147, "pan.___", state 329, "(1)" + line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 330, "else" + line 145, "pan.___", state 335, "((j<1))" + line 145, "pan.___", state 335, "((j>=1))" + line 151, "pan.___", state 341, "(1)" + line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 342, "else" + line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 345, "else" + line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 347, "else" + line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 404, "(1)" + line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 421, "(1)" + line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 430, "(1)" + line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 431, "else" + line 160, "pan.___", state 436, "((j<1))" + line 160, "pan.___", state 436, "((j>=1))" + line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 451, "(1)" + line 147, "pan.___", state 459, "(1)" + line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 460, "else" + line 145, "pan.___", state 465, "((j<1))" + line 145, "pan.___", state 465, "((j>=1))" + line 151, "pan.___", state 471, "(1)" + line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 472, "else" + line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 475, "else" + line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 477, "else" + line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 537, "(1)" + line 307, "pan.___", state 567, "(1)" + line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 625, "(1)" + line 307, "pan.___", state 655, "(1)" + line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 713, "(1)" + line 307, "pan.___", state 743, "(1)" + line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 760, "(1)" + line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 769, "(1)" + line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 770, "else" + line 160, "pan.___", state 775, "((j<1))" + line 160, "pan.___", state 775, "((j>=1))" + line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 790, "(1)" + line 147, "pan.___", state 798, "(1)" + line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 799, "else" + line 145, "pan.___", state 804, "((j<1))" + line 145, "pan.___", state 804, "((j>=1))" + line 151, "pan.___", state 810, "(1)" + line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 811, "else" + line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 814, "else" + line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 816, "else" + line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 873, "(1)" + line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 890, "(1)" + line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 899, "(1)" + line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 900, "else" + line 160, "pan.___", state 905, "((j<1))" + line 160, "pan.___", state 905, "((j>=1))" + line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 920, "(1)" + line 147, "pan.___", state 928, "(1)" + line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 929, "else" + line 145, "pan.___", state 934, "((j<1))" + line 145, "pan.___", state 934, "((j>=1))" + line 151, "pan.___", state 940, "(1)" + line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 941, "else" + line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 944, "else" + line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 946, "else" + line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1001, "(1)" + line 307, "pan.___", state 1031, "(1)" + line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1097, "(1)" + line 307, "pan.___", state 1127, "(1)" + line 433, "pan.___", state 1140, "-end-" + (125 of 1140 states) +unreached in proctype urcu_writer + line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 59, "(1)" + line 302, "pan.___", state 72, "(1)" + line 307, "pan.___", state 89, "(1)" + line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 151, "(1)" + line 302, "pan.___", state 164, "(1)" + line 467, "pan.___", state 195, "(1)" + line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 237, "(1)" + line 147, "pan.___", state 245, "(1)" + line 151, "pan.___", state 257, "(1)" + line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 923, "(1)" + line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 924, "else" + line 298, "pan.___", state 927, "(1)" + line 298, "pan.___", state 928, "(1)" + line 298, "pan.___", state 928, "(1)" + line 302, "pan.___", state 936, "(1)" + line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 937, "else" + line 302, "pan.___", state 940, "(1)" + line 302, "pan.___", state 941, "(1)" + line 302, "pan.___", state 941, "(1)" + line 300, "pan.___", state 946, "((i<1))" + line 300, "pan.___", state 946, "((i>=1))" + line 307, "pan.___", state 953, "(1)" + line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 954, "else" + line 307, "pan.___", state 957, "(1)" + line 307, "pan.___", state 958, "(1)" + line 307, "pan.___", state 958, "(1)" + line 309, "pan.___", state 961, "(1)" + line 309, "pan.___", state 961, "(1)" + line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1034, "(1)" + line 307, "pan.___", state 1051, "(1)" + line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1122, "(1)" + line 307, "pan.___", state 1139, "(1)" + line 288, "pan.___", state 1156, "(1)" + line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1212, "(1)" + line 307, "pan.___", state 1229, "(1)" + line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1303, "(1)" + line 307, "pan.___", state 1320, "(1)" + line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1365, "(1)" + line 147, "pan.___", state 1373, "(1)" + line 151, "pan.___", state 1385, "(1)" + line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1584, "(1)" + line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 1585, "else" + line 298, "pan.___", state 1588, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 302, "pan.___", state 1597, "(1)" + line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 1598, "else" + line 302, "pan.___", state 1601, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 300, "pan.___", state 1607, "((i<1))" + line 300, "pan.___", state 1607, "((i>=1))" + line 307, "pan.___", state 1614, "(1)" + line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 1615, "else" + line 307, "pan.___", state 1618, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1669, "(1)" + line 147, "pan.___", state 1677, "(1)" + line 151, "pan.___", state 1689, "(1)" + line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input new file mode 100644 index 0000000..18f99c4 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input @@ -0,0 +1,531 @@ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input.trail new file mode 100644 index 0000000..0d22946 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free.spin.input.trail @@ -0,0 +1,1902 @@ +-2:3:-2 +-4:-4:-4 +1:0:3013 +2:2:1132 +3:0:3013 +4:1:0 +5:0:3013 +6:1:1 +7:0:3013 +8:1:2 +9:0:3013 +10:1:3 +11:0:3013 +12:3:2969 +13:0:3013 +14:3:2970 +15:0:3013 +16:3:2971 +17:0:3013 +18:3:2972 +19:0:3013 +20:3:2973 +21:0:3013 +22:3:2974 +23:0:3013 +24:3:2971 +25:0:3013 +26:3:2972 +27:0:3013 +28:3:2973 +29:0:3013 +30:3:2974 +31:0:3013 +32:3:2975 +33:0:3013 +34:3:2980 +35:0:3013 +36:3:2981 +37:0:3013 +38:3:2982 +39:0:3013 +40:3:2983 +41:0:3013 +42:3:2984 +43:0:3013 +44:3:2985 +45:0:3013 +46:3:2982 +47:0:3013 +48:3:2983 +49:0:3013 +50:3:2984 +51:0:3013 +52:3:2985 +53:0:3013 +54:3:2986 +55:0:3013 +56:3:2992 +57:0:3013 +58:3:2993 +59:0:3013 +60:3:2994 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100644 index 0000000..e69de29 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.log new file mode 100644 index 0000000..708dee2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.log @@ -0,0 +1,415 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_nested.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 566) +Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.2 R= 3e+04 +Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.7 R= 3e+04 +Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 96.8 R= 3e+04 +pan: resizing hashtable to -w22.. done +Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4234, errors: 0 + 4027146 states, stored + 66145121 states, matched + 70172267 transitions (= stored+matched) +2.6437688e+08 atomic steps +hash conflicts: 47318190 (resolved) + +Stats on memory usage (in Megabytes): + 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) + 253.418 actual memory usage for states (compression: 78.55%) + state-vector as stored = 38 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 743.076 total actual memory usage + +unreached in proctype urcu_reader + line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 61, "(1)" + line 307, "pan.___", state 91, "(1)" + line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 149, "(1)" + line 307, "pan.___", state 179, "(1)" + line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 238, "(1)" + line 307, "pan.___", state 268, "(1)" + line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 291, "(1)" + line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 300, "(1)" + line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 301, "else" + line 160, "pan.___", state 306, "((j<1))" + line 160, "pan.___", state 306, "((j>=1))" + line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 321, "(1)" + line 147, "pan.___", state 329, "(1)" + line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 330, "else" + line 145, "pan.___", state 335, "((j<1))" + line 145, "pan.___", state 335, "((j>=1))" + line 151, "pan.___", state 341, "(1)" + line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 342, "else" + line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 345, "else" + line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 347, "else" + line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 404, "(1)" + line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 421, "(1)" + line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 430, "(1)" + line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 431, "else" + line 160, "pan.___", state 436, "((j<1))" + line 160, "pan.___", state 436, "((j>=1))" + line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 451, "(1)" + line 147, "pan.___", state 459, "(1)" + line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 460, "else" + line 145, "pan.___", state 465, "((j<1))" + line 145, "pan.___", state 465, "((j>=1))" + line 151, "pan.___", state 471, "(1)" + line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 472, "else" + line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 475, "else" + line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 477, "else" + line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 537, "(1)" + line 307, "pan.___", state 567, "(1)" + line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 625, "(1)" + line 307, "pan.___", state 655, "(1)" + line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 713, "(1)" + line 307, "pan.___", state 743, "(1)" + line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 760, "(1)" + line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 769, "(1)" + line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 770, "else" + line 160, "pan.___", state 775, "((j<1))" + line 160, "pan.___", state 775, "((j>=1))" + line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 790, "(1)" + line 147, "pan.___", state 798, "(1)" + line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 799, "else" + line 145, "pan.___", state 804, "((j<1))" + line 145, "pan.___", state 804, "((j>=1))" + line 151, "pan.___", state 810, "(1)" + line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 811, "else" + line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 814, "else" + line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 816, "else" + line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 873, "(1)" + line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 890, "(1)" + line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 899, "(1)" + line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 900, "else" + line 160, "pan.___", state 905, "((j<1))" + line 160, "pan.___", state 905, "((j>=1))" + line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 920, "(1)" + line 147, "pan.___", state 928, "(1)" + line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 929, "else" + line 145, "pan.___", state 934, "((j<1))" + line 145, "pan.___", state 934, "((j>=1))" + line 151, "pan.___", state 940, "(1)" + line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 941, "else" + line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 944, "else" + line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 946, "else" + line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1001, "(1)" + line 307, "pan.___", state 1031, "(1)" + line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1097, "(1)" + line 307, "pan.___", state 1127, "(1)" + line 433, "pan.___", state 1140, "-end-" + (125 of 1140 states) +unreached in proctype urcu_writer + line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 59, "(1)" + line 302, "pan.___", state 72, "(1)" + line 307, "pan.___", state 89, "(1)" + line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 151, "(1)" + line 302, "pan.___", state 164, "(1)" + line 467, "pan.___", state 195, "(1)" + line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 237, "(1)" + line 147, "pan.___", state 245, "(1)" + line 151, "pan.___", state 257, "(1)" + line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 923, "(1)" + line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 924, "else" + line 298, "pan.___", state 927, "(1)" + line 298, "pan.___", state 928, "(1)" + line 298, "pan.___", state 928, "(1)" + line 302, "pan.___", state 936, "(1)" + line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 937, "else" + line 302, "pan.___", state 940, "(1)" + line 302, "pan.___", state 941, "(1)" + line 302, "pan.___", state 941, "(1)" + line 300, "pan.___", state 946, "((i<1))" + line 300, "pan.___", state 946, "((i>=1))" + line 307, "pan.___", state 953, "(1)" + line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 954, "else" + line 307, "pan.___", state 957, "(1)" + line 307, "pan.___", state 958, "(1)" + line 307, "pan.___", state 958, "(1)" + line 309, "pan.___", state 961, "(1)" + line 309, "pan.___", state 961, "(1)" + line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1034, "(1)" + line 307, "pan.___", state 1051, "(1)" + line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1122, "(1)" + line 307, "pan.___", state 1139, "(1)" + line 288, "pan.___", state 1156, "(1)" + line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1212, "(1)" + line 307, "pan.___", state 1229, "(1)" + line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1303, "(1)" + line 307, "pan.___", state 1320, "(1)" + line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1365, "(1)" + line 147, "pan.___", state 1373, "(1)" + line 151, "pan.___", state 1385, "(1)" + line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1584, "(1)" + line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 1585, "else" + line 298, "pan.___", state 1588, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 302, "pan.___", state 1597, "(1)" + line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 1598, "else" + line 302, "pan.___", state 1601, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 300, "pan.___", state 1607, "((i<1))" + line 300, "pan.___", state 1607, "((i>=1))" + line 307, "pan.___", state 1614, "(1)" + line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 1615, "else" + line 307, "pan.___", state 1618, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1669, "(1)" + line 147, "pan.___", state 1677, "(1)" + line 151, "pan.___", state 1689, "(1)" + line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail new file mode 100644 index 0000000..2cefe6b --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail @@ -0,0 +1,7 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:0:2679 +5:3:1129 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.define b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.define new file mode 100644 index 0000000..136ef67 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.log new file mode 100644 index 0000000..c722840 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.log @@ -0,0 +1,16 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +spin: line 291 "pan.___", Error: syntax error saw 'operator: =' +spin: line 291 "pan.___", Error: syntax error saw 'operator: =' +spin: 2 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..1346c4e --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input @@ -0,0 +1,533 @@ +#define NO_RMB +#define NO_WMB + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git 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+2067:1:716 +2068:1:717 +2069:1:718 +2070:1:729 +2071:1:734 +2072:1:735 +2073:0:3537 +2074:2:3483 +2075:0:3537 +2076:1:747 +2077:0:3535 +2078:2:3484 +2079:0:3541 +2080:1:1280 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.define b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.log new file mode 100644 index 0000000..6a46f80 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.log @@ -0,0 +1,369 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 567) +Depth= 5645 States= 1e+06 Transitions= 1.47e+07 Memory= 527.287 t= 27.1 R= 4e+04 +pan: claim violated! (at depth 1736) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 5645, errors: 1 + 1039881 states, stored + 14441478 states, matched + 15481359 transitions (= stored+matched) + 57000435 atomic steps +hash conflicts: 2892596 (resolved) + +Stats on memory usage (in Megabytes): + 83.303 equivalent memory usage for states (stored*(State-vector + overhead)) + 64.050 actual memory usage for states (compression: 76.89%) + state-vector as stored = 37 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 529.729 total actual memory usage + +unreached in proctype urcu_reader + line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 61, "(1)" + line 308, "pan.___", state 91, "(1)" + line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 149, "(1)" + line 308, "pan.___", state 179, "(1)" + line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 238, "(1)" + line 308, "pan.___", state 268, "(1)" + line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 291, "(1)" + line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 300, "(1)" + line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 301, "else" + line 161, "pan.___", state 306, "((j<1))" + line 161, "pan.___", state 306, "((j>=1))" + line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 313, "(1)" + line 167, "pan.___", state 314, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 314, "else" + line 177, "pan.___", state 319, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 319, "else" + line 159, "pan.___", state 324, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 159, "pan.___", state 363, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 365, "(1)" + line 163, "pan.___", state 372, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 374, "(1)" + line 163, "pan.___", state 375, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 375, "else" + line 161, "pan.___", state 380, "((j<1))" + line 161, "pan.___", state 380, "((j>=1))" + line 167, "pan.___", state 385, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 387, "(1)" + line 167, "pan.___", state 388, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 388, "else" + line 177, "pan.___", state 393, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 393, "else" + line 289, "pan.___", state 408, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 440, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 453, "(1)" + line 308, "pan.___", state 483, "(1)" + line 289, "pan.___", state 496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 541, "(1)" + line 308, "pan.___", state 571, "(1)" + line 289, "pan.___", state 584, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 629, "(1)" + line 308, "pan.___", state 659, "(1)" + line 159, "pan.___", state 674, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 676, "(1)" + line 163, "pan.___", state 683, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 685, "(1)" + line 163, "pan.___", state 686, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 686, "else" + line 161, "pan.___", state 691, "((j<1))" + line 161, "pan.___", state 691, "((j>=1))" + line 167, "pan.___", state 696, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 698, "(1)" + line 167, "pan.___", state 699, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 699, "else" + line 177, "pan.___", state 704, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 704, "else" + line 159, "pan.___", state 709, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 731, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 159, "pan.___", state 748, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 750, "(1)" + line 163, "pan.___", state 757, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 759, "(1)" + line 163, "pan.___", state 760, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 760, "else" + line 161, "pan.___", state 765, "((j<1))" + line 161, "pan.___", state 765, "((j>=1))" + line 167, "pan.___", state 770, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 773, "else" + line 177, "pan.___", state 778, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 778, "else" + line 289, "pan.___", state 788, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 820, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 833, "(1)" + line 308, "pan.___", state 863, "(1)" + line 289, "pan.___", state 884, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 916, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 929, "(1)" + line 308, "pan.___", state 959, "(1)" + line 434, "pan.___", state 972, "-end-" + (95 of 972 states) +unreached in proctype urcu_writer + line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 20, "(1)" + line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 34, "(1)" + line 293, "pan.___", state 35, "(1)" + line 293, "pan.___", state 35, "(1)" + line 291, "pan.___", state 40, "((i<1))" + line 291, "pan.___", state 40, "((i>=1))" + line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 59, "(1)" + line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 60, "else" + line 299, "pan.___", state 63, "(1)" + line 299, "pan.___", state 64, "(1)" + line 299, "pan.___", state 64, "(1)" + line 303, "pan.___", state 72, "(1)" + line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 73, "else" + line 303, "pan.___", state 76, "(1)" + line 303, "pan.___", state 77, "(1)" + line 303, "pan.___", state 77, "(1)" + line 301, "pan.___", state 82, "((i<1))" + line 301, "pan.___", state 82, "((i>=1))" + line 308, "pan.___", state 89, "(1)" + line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 90, "else" + line 308, "pan.___", state 93, "(1)" + line 308, "pan.___", state 94, "(1)" + line 308, "pan.___", state 94, "(1)" + line 310, "pan.___", state 97, "(1)" + line 310, "pan.___", state 97, "(1)" + line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" + line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 112, "(1)" + line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 126, "(1)" + line 293, "pan.___", state 127, "(1)" + line 293, "pan.___", state 127, "(1)" + line 299, "pan.___", state 151, "(1)" + line 303, "pan.___", state 164, "(1)" + line 310, "pan.___", state 189, "(1)" + line 310, "pan.___", state 189, "(1)" + line 468, "pan.___", state 195, "(1)" + line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 240, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 298, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 755, "(1)" + line 299, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 756, "else" + line 299, "pan.___", state 759, "(1)" + line 299, "pan.___", state 760, "(1)" + line 299, "pan.___", state 760, "(1)" + line 303, "pan.___", state 768, "(1)" + line 303, "pan.___", state 769, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 769, "else" + line 303, "pan.___", state 772, "(1)" + line 303, "pan.___", state 773, "(1)" + line 303, "pan.___", state 773, "(1)" + line 301, "pan.___", state 778, "((i<1))" + line 301, "pan.___", state 778, "((i>=1))" + line 308, "pan.___", state 785, "(1)" + line 308, "pan.___", state 786, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 786, "else" + line 308, "pan.___", state 789, "(1)" + line 308, "pan.___", state 790, "(1)" + line 308, "pan.___", state 790, "(1)" + line 310, "pan.___", state 793, "(1)" + line 310, "pan.___", state 793, "(1)" + line 293, "pan.___", state 822, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 840, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 866, "(1)" + line 308, "pan.___", state 883, "(1)" + line 293, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 954, "(1)" + line 308, "pan.___", state 971, "(1)" + line 289, "pan.___", state 988, "(1)" + line 293, "pan.___", state 1000, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1018, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1044, "(1)" + line 308, "pan.___", state 1061, "(1)" + line 293, "pan.___", state 1091, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1109, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1135, "(1)" + line 308, "pan.___", state 1152, "(1)" + line 163, "pan.___", state 1174, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 1187, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1200, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 298, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1332, "(1)" + line 299, "pan.___", state 1333, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 1333, "else" + line 299, "pan.___", state 1336, "(1)" + line 299, "pan.___", state 1337, "(1)" + line 299, "pan.___", state 1337, "(1)" + line 303, "pan.___", state 1345, "(1)" + line 303, "pan.___", state 1346, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 1346, "else" + line 303, "pan.___", state 1349, "(1)" + line 303, "pan.___", state 1350, "(1)" + line 303, "pan.___", state 1350, "(1)" + line 301, "pan.___", state 1355, "((i<1))" + line 301, "pan.___", state 1355, "((i>=1))" + line 308, "pan.___", state 1362, "(1)" + line 308, "pan.___", state 1363, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 1363, "else" + line 308, "pan.___", state 1366, "(1)" + line 308, "pan.___", state 1367, "(1)" + line 308, "pan.___", state 1367, "(1)" + line 310, "pan.___", state 1370, "(1)" + line 310, "pan.___", state 1370, "(1)" + line 163, "pan.___", state 1394, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 1407, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1420, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 519, "pan.___", state 20, "((j<2))" + line 519, "pan.___", state 20, "((j>=2))" + line 524, "pan.___", state 33, "((j<2))" + line 524, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 572, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 28.5 seconds +pan: rate 36487.053 states/second +pan: avg transition delay 1.8409e-06 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..899fdb4 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input @@ -0,0 +1,532 @@ +#define NO_RMB + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..0aacf1a --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1739 @@ +-2:3:-2 +-4:-4:-4 +1:0:2529 +2:3:2481 +3:3:2484 +4:3:2484 +5:3:2487 +6:3:2495 +7:3:2495 +8:3:2498 +9:3:2504 +10:3:2508 +11:3:2508 +12:3:2511 +13:3:2519 +14:3:2523 +15:3:2524 +16:0:2529 +17:3:2526 +18:0:2529 +19:2:974 +20:0:2529 +21:2:980 +22:0:2529 +23:2:981 +24:0:2529 +25:2:982 +26:2:986 +27:2:987 +28:2:995 +29:2:996 +30:2:1000 +31:2:1001 +32:2:1009 +33:2:1014 +34:2:1018 +35:2:1019 +36:2:1026 +37:2:1027 +38:2:1038 +39:2:1039 +40:2:1040 +41:2:1051 +42:2:1056 +43:2:1057 +44:0:2529 +45:2:1069 +46:2:1070 +47:0:2529 +48:2:1074 +49:2:1078 +50:2:1079 +51:2:1087 +52:2:1088 +53:2:1092 +54:2:1093 +55:2:1101 +56:2:1106 +57:2:1107 +58:2:1118 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b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.log new file mode 100644 index 0000000..477c85d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.log @@ -0,0 +1,381 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 567) +pan: claim violated! (at depth 1889) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 6646, errors: 1 + 377244 states, stored + 5291719 states, matched + 5668963 transitions (= stored+matched) + 20822372 atomic steps +hash conflicts: 405371 (resolved) + +Stats on memory usage (in Megabytes): + 30.221 equivalent memory usage for states (stored*(State-vector + overhead)) + 23.526 actual memory usage for states (compression: 77.85%) + state-vector as stored = 37 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 489.201 total actual memory usage + +unreached in proctype urcu_reader + line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 61, "(1)" + line 308, "pan.___", state 91, "(1)" + line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 149, "(1)" + line 308, "pan.___", state 179, "(1)" + line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 238, "(1)" + line 308, "pan.___", state 268, "(1)" + line 144, "pan.___", state 290, "(1)" + line 148, "pan.___", state 298, "(1)" + line 148, "pan.___", state 299, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 299, "else" + line 146, "pan.___", state 304, "((j<1))" + line 146, "pan.___", state 304, "((j>=1))" + line 152, "pan.___", state 310, "(1)" + line 152, "pan.___", state 311, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 311, "else" + line 186, "pan.___", state 316, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 316, "else" + line 144, "pan.___", state 322, "(1)" + line 148, "pan.___", state 330, "(1)" + line 148, "pan.___", state 331, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 152, "pan.___", state 342, "(1)" + line 152, "pan.___", state 343, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 144, "pan.___", state 358, "(1)" + line 148, "pan.___", state 366, "(1)" + line 148, "pan.___", state 367, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 367, "else" + line 146, "pan.___", state 372, "((j<1))" + line 146, "pan.___", state 372, "((j>=1))" + line 152, "pan.___", state 378, "(1)" + line 152, "pan.___", state 379, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 379, "else" + line 186, "pan.___", state 384, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 384, "else" + line 289, "pan.___", state 399, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 415, "(1)" + line 298, "pan.___", state 431, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 444, "(1)" + line 308, "pan.___", state 474, "(1)" + line 289, "pan.___", state 487, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 519, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 532, "(1)" + line 308, "pan.___", state 562, "(1)" + line 289, "pan.___", state 575, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 607, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 620, "(1)" + line 308, "pan.___", state 650, "(1)" + line 144, "pan.___", state 666, "(1)" + line 148, "pan.___", state 674, "(1)" + line 148, "pan.___", state 675, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 675, "else" + line 146, "pan.___", state 680, "((j<1))" + line 146, "pan.___", state 680, "((j>=1))" + line 152, "pan.___", state 686, "(1)" + line 152, "pan.___", state 687, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 687, "else" + line 186, "pan.___", state 692, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 692, "else" + line 144, "pan.___", state 698, "(1)" + line 148, "pan.___", state 706, "(1)" + line 148, "pan.___", state 707, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 152, "pan.___", state 718, "(1)" + line 152, "pan.___", state 719, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 144, "pan.___", state 734, "(1)" + line 148, "pan.___", state 742, "(1)" + line 148, "pan.___", state 743, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 743, "else" + line 146, "pan.___", state 748, "((j<1))" + line 146, "pan.___", state 748, "((j>=1))" + line 152, "pan.___", state 754, "(1)" + line 152, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 755, "else" + line 186, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 760, "else" + line 289, "pan.___", state 770, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 802, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 815, "(1)" + line 308, "pan.___", state 845, "(1)" + line 289, "pan.___", state 866, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 882, "(1)" + line 298, "pan.___", state 898, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 911, "(1)" + line 308, "pan.___", state 941, "(1)" + line 434, "pan.___", state 954, "-end-" + (79 of 954 states) +unreached in proctype urcu_writer + line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 20, "(1)" + line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 34, "(1)" + line 293, "pan.___", state 35, "(1)" + line 293, "pan.___", state 35, "(1)" + line 291, "pan.___", state 40, "((i<1))" + line 291, "pan.___", state 40, "((i>=1))" + line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 59, "(1)" + line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 60, "else" + line 299, "pan.___", state 63, "(1)" + line 299, "pan.___", state 64, "(1)" + line 299, "pan.___", state 64, "(1)" + line 303, "pan.___", state 72, "(1)" + line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 73, "else" + line 303, "pan.___", state 76, "(1)" + line 303, "pan.___", state 77, "(1)" + line 303, "pan.___", state 77, "(1)" + line 301, "pan.___", state 82, "((i<1))" + line 301, "pan.___", state 82, "((i>=1))" + line 308, "pan.___", state 89, "(1)" + line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 90, "else" + line 308, "pan.___", state 93, "(1)" + line 308, "pan.___", state 94, "(1)" + line 308, "pan.___", state 94, "(1)" + line 310, "pan.___", state 97, "(1)" + line 310, "pan.___", state 97, "(1)" + line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" + line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 112, "(1)" + line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 126, "(1)" + line 293, "pan.___", state 127, "(1)" + line 293, "pan.___", state 127, "(1)" + line 291, "pan.___", state 132, "((i<1))" + line 291, "pan.___", state 132, "((i>=1))" + line 299, "pan.___", state 151, "(1)" + line 299, "pan.___", state 152, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 152, "else" + line 299, "pan.___", state 155, "(1)" + line 299, "pan.___", state 156, "(1)" + line 299, "pan.___", state 156, "(1)" + line 303, "pan.___", state 164, "(1)" + line 303, "pan.___", state 165, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 165, "else" + line 303, "pan.___", state 168, "(1)" + line 303, "pan.___", state 169, "(1)" + line 303, "pan.___", state 169, "(1)" + line 301, "pan.___", state 174, "((i<1))" + line 301, "pan.___", state 174, "((i>=1))" + line 308, "pan.___", state 181, "(1)" + line 308, "pan.___", state 182, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 182, "else" + line 308, "pan.___", state 185, "(1)" + line 308, "pan.___", state 186, "(1)" + line 308, "pan.___", state 186, "(1)" + line 310, "pan.___", state 189, "(1)" + line 310, "pan.___", state 189, "(1)" + line 468, "pan.___", state 195, "(1)" + line 462, "pan.___", state 198, "((write_lock==0))" + line 462, "pan.___", state 198, "else" + line 460, "pan.___", state 199, "(1)" + line 144, "pan.___", state 206, "(1)" + line 148, "pan.___", state 214, "(1)" + line 148, "pan.___", state 215, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 215, "else" + line 146, "pan.___", state 220, "((j<1))" + line 146, "pan.___", state 220, "((j>=1))" + line 152, "pan.___", state 226, "(1)" + line 152, "pan.___", state 227, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 227, "else" + line 186, "pan.___", state 232, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 232, "else" + line 144, "pan.___", state 238, "(1)" + line 152, "pan.___", state 258, "(1)" + line 144, "pan.___", state 274, "(1)" + line 148, "pan.___", state 282, "(1)" + line 152, "pan.___", state 294, "(1)" + line 289, "pan.___", state 310, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 342, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 355, "(1)" + line 303, "pan.___", state 368, "(1)" + line 308, "pan.___", state 385, "(1)" + line 289, "pan.___", state 402, "(1)" + line 293, "pan.___", state 414, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 432, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 458, "(1)" + line 308, "pan.___", state 475, "(1)" + line 293, "pan.___", state 505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 523, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 549, "(1)" + line 308, "pan.___", state 566, "(1)" + line 148, "pan.___", state 588, "(1)" + line 152, "pan.___", state 600, "(1)" + line 144, "pan.___", state 612, "(1)" + line 152, "pan.___", state 632, "(1)" + line 148, "pan.___", state 656, "(1)" + line 152, "pan.___", state 668, "(1)" + line 289, "pan.___", state 692, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 694, "(1)" + line 289, "pan.___", state 695, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 289, "pan.___", state 695, "else" + line 289, "pan.___", state 698, "(1)" + line 293, "pan.___", state 706, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 708, "(1)" + line 293, "pan.___", state 709, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 293, "pan.___", state 709, "else" + line 293, "pan.___", state 712, "(1)" + line 293, "pan.___", state 713, "(1)" + line 293, "pan.___", state 713, "(1)" + line 291, "pan.___", state 718, "((i<1))" + line 291, "pan.___", state 718, "((i>=1))" + line 298, "pan.___", state 724, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 737, "(1)" + line 299, "pan.___", state 738, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 738, "else" + line 299, "pan.___", state 741, "(1)" + line 299, "pan.___", state 742, "(1)" + line 299, "pan.___", state 742, "(1)" + line 303, "pan.___", state 750, "(1)" + line 303, "pan.___", state 751, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 751, "else" + line 303, "pan.___", state 754, "(1)" + line 303, "pan.___", state 755, "(1)" + line 303, "pan.___", state 755, "(1)" + line 301, "pan.___", state 760, "((i<1))" + line 301, "pan.___", state 760, "((i>=1))" + line 308, "pan.___", state 767, "(1)" + line 308, "pan.___", state 768, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 768, "else" + line 308, "pan.___", state 771, "(1)" + line 308, "pan.___", state 772, "(1)" + line 308, "pan.___", state 772, "(1)" + line 310, "pan.___", state 775, "(1)" + line 310, "pan.___", state 775, "(1)" + line 293, "pan.___", state 804, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 822, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 848, "(1)" + line 308, "pan.___", state 865, "(1)" + line 293, "pan.___", state 892, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 936, "(1)" + line 308, "pan.___", state 953, "(1)" + line 289, "pan.___", state 970, "(1)" + line 293, "pan.___", state 982, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1000, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1026, "(1)" + line 308, "pan.___", state 1043, "(1)" + line 293, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1117, "(1)" + line 308, "pan.___", state 1134, "(1)" + line 148, "pan.___", state 1156, "(1)" + line 152, "pan.___", state 1168, "(1)" + line 144, "pan.___", state 1180, "(1)" + line 152, "pan.___", state 1200, "(1)" + line 148, "pan.___", state 1224, "(1)" + line 152, "pan.___", state 1236, "(1)" + line 289, "pan.___", state 1260, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 1262, "(1)" + line 289, "pan.___", state 1263, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 289, "pan.___", state 1263, "else" + line 289, "pan.___", state 1266, "(1)" + line 293, "pan.___", state 1274, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 1276, "(1)" + line 293, "pan.___", state 1277, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 293, "pan.___", state 1277, "else" + line 293, "pan.___", state 1280, "(1)" + line 293, "pan.___", state 1281, "(1)" + line 293, "pan.___", state 1281, "(1)" + line 291, "pan.___", state 1286, "((i<1))" + line 291, "pan.___", state 1286, "((i>=1))" + line 298, "pan.___", state 1292, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1305, "(1)" + line 299, "pan.___", state 1306, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 1306, "else" + line 299, "pan.___", state 1309, "(1)" + line 299, "pan.___", state 1310, "(1)" + line 299, "pan.___", state 1310, "(1)" + line 303, "pan.___", state 1318, "(1)" + line 303, "pan.___", state 1319, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 1319, "else" + line 303, "pan.___", state 1322, "(1)" + line 303, "pan.___", state 1323, "(1)" + line 303, "pan.___", state 1323, "(1)" + line 301, "pan.___", state 1328, "((i<1))" + line 301, "pan.___", state 1328, "((i>=1))" + line 308, "pan.___", state 1335, "(1)" + line 308, "pan.___", state 1336, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 1336, "else" + line 308, "pan.___", state 1339, "(1)" + line 308, "pan.___", state 1340, "(1)" + line 308, "pan.___", state 1340, "(1)" + line 310, "pan.___", state 1343, "(1)" + line 310, "pan.___", state 1343, "(1)" + line 148, "pan.___", state 1367, "(1)" + line 152, "pan.___", state 1379, "(1)" + line 144, "pan.___", state 1391, "(1)" + line 152, "pan.___", state 1411, "(1)" + line 148, "pan.___", state 1435, "(1)" + line 152, "pan.___", state 1447, "(1)" + line 511, "pan.___", state 1473, "-end-" + (159 of 1473 states) +unreached in proctype :init: + line 518, "pan.___", state 9, "((j<2))" + line 518, "pan.___", state 9, "((j>=2))" + line 519, "pan.___", state 20, "((j<2))" + line 519, "pan.___", state 20, "((j>=2))" + line 524, "pan.___", state 33, "((j<2))" + line 524, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 572, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 10.4 seconds +pan: rate 36378.399 states/second +pan: avg transition delay 1.8293e-06 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..12cde50 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input @@ -0,0 +1,532 @@ +#define NO_WMB + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git 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+1861:2:2416 +1862:0:2475 +1863:2:2421 +1864:0:2475 +1865:1:483 +1866:1:487 +1867:1:488 +1868:1:496 +1869:1:497 +1870:1:498 +1871:1:510 +1872:1:515 +1873:1:519 +1874:1:520 +1875:1:527 +1876:1:528 +1877:1:539 +1878:1:540 +1879:1:541 +1880:1:552 +1881:1:557 +1882:1:558 +1883:0:2475 +1884:2:2422 +1885:0:2475 +1886:1:570 +1887:0:2473 +1888:2:2421 +1889:0:2479 +1890:1:151 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.define b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.log new file mode 100644 index 0000000..6a9d040 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.log @@ -0,0 +1,349 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 567) +pan: claim violated! (at depth 1353) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3705, errors: 1 + 216253 states, stored + 2924019 states, matched + 3140272 transitions (= stored+matched) + 11791015 atomic steps +hash conflicts: 155585 (resolved) + +Stats on memory usage (in Megabytes): + 17.324 equivalent memory usage for states (stored*(State-vector + overhead)) + 13.576 actual memory usage for states (compression: 78.37%) + state-vector as stored = 38 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 479.338 total actual memory usage + +unreached in proctype urcu_reader + line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 61, "(1)" + line 308, "pan.___", state 91, "(1)" + line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 149, "(1)" + line 308, "pan.___", state 179, "(1)" + line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 238, "(1)" + line 308, "pan.___", state 268, "(1)" + line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 291, "(1)" + line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 300, "(1)" + line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 301, "else" + line 161, "pan.___", state 306, "((j<1))" + line 161, "pan.___", state 306, "((j>=1))" + line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 321, "(1)" + line 148, "pan.___", state 329, "(1)" + line 148, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 330, "else" + line 146, "pan.___", state 335, "((j<1))" + line 146, "pan.___", state 335, "((j>=1))" + line 152, "pan.___", state 341, "(1)" + line 152, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 342, "else" + line 154, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 345, "else" + line 186, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 347, "else" + line 159, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 152, "pan.___", state 404, "(1)" + line 152, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 421, "(1)" + line 163, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 430, "(1)" + line 163, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 431, "else" + line 161, "pan.___", state 436, "((j<1))" + line 161, "pan.___", state 436, "((j>=1))" + line 167, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 451, "(1)" + line 148, "pan.___", state 459, "(1)" + line 148, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 460, "else" + line 146, "pan.___", state 465, "((j<1))" + line 146, "pan.___", state 465, "((j>=1))" + line 152, "pan.___", state 471, "(1)" + line 152, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 472, "else" + line 154, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 475, "else" + line 186, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 477, "else" + line 289, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 537, "(1)" + line 308, "pan.___", state 567, "(1)" + line 289, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 625, "(1)" + line 308, "pan.___", state 655, "(1)" + line 289, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 713, "(1)" + line 308, "pan.___", state 743, "(1)" + line 159, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 760, "(1)" + line 163, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 769, "(1)" + line 163, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 770, "else" + line 161, "pan.___", state 775, "((j<1))" + line 161, "pan.___", state 775, "((j>=1))" + line 167, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 790, "(1)" + line 148, "pan.___", state 798, "(1)" + line 148, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 799, "else" + line 146, "pan.___", state 804, "((j<1))" + line 146, "pan.___", state 804, "((j>=1))" + line 152, "pan.___", state 810, "(1)" + line 152, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 811, "else" + line 154, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 814, "else" + line 186, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 816, "else" + line 159, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 152, "pan.___", state 873, "(1)" + line 152, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 890, "(1)" + line 163, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 899, "(1)" + line 163, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 900, "else" + line 161, "pan.___", state 905, "((j<1))" + line 161, "pan.___", state 905, "((j>=1))" + line 167, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 920, "(1)" + line 148, "pan.___", state 928, "(1)" + line 148, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 929, "else" + line 146, "pan.___", state 934, "((j<1))" + line 146, "pan.___", state 934, "((j>=1))" + line 152, "pan.___", state 940, "(1)" + line 152, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 941, "else" + line 154, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 944, "else" + line 186, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 946, "else" + line 289, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1001, "(1)" + line 308, "pan.___", state 1031, "(1)" + line 289, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1097, "(1)" + line 308, "pan.___", state 1127, "(1)" + line 434, "pan.___", state 1140, "-end-" + (125 of 1140 states) +unreached in proctype urcu_writer + line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 59, "(1)" + line 303, "pan.___", state 72, "(1)" + line 308, "pan.___", state 89, "(1)" + line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 151, "(1)" + line 303, "pan.___", state 164, "(1)" + line 468, "pan.___", state 195, "(1)" + line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 237, "(1)" + line 148, "pan.___", state 245, "(1)" + line 152, "pan.___", state 257, "(1)" + line 159, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 923, "(1)" + line 299, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 924, "else" + line 299, "pan.___", state 927, "(1)" + line 299, "pan.___", state 928, "(1)" + line 299, "pan.___", state 928, "(1)" + line 303, "pan.___", state 936, "(1)" + line 303, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 937, "else" + line 303, "pan.___", state 940, "(1)" + line 303, "pan.___", state 941, "(1)" + line 303, "pan.___", state 941, "(1)" + line 301, "pan.___", state 946, "((i<1))" + line 301, "pan.___", state 946, "((i>=1))" + line 308, "pan.___", state 953, "(1)" + line 308, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 954, "else" + line 308, "pan.___", state 957, "(1)" + line 308, "pan.___", state 958, "(1)" + line 308, "pan.___", state 958, "(1)" + line 310, "pan.___", state 961, "(1)" + line 310, "pan.___", state 961, "(1)" + line 163, "pan.___", state 985, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 998, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 1008, "(1)" + line 148, "pan.___", state 1016, "(1)" + line 152, "pan.___", state 1028, "(1)" + line 159, "pan.___", state 1039, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 519, "pan.___", state 20, "((j<2))" + line 519, "pan.___", state 20, "((j>=2))" + line 524, "pan.___", state 33, "((j<2))" + line 524, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 572, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 5.58 seconds +pan: rate 38755.018 states/second +pan: avg transition delay 1.7769e-06 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..244a7b2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input @@ -0,0 +1,532 @@ +#define SINGLE_FLIP + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..363553e --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1356 @@ +-2:3:-2 +-4:-4:-4 +1:0:2372 +2:3:2324 +3:3:2327 +4:3:2327 +5:3:2330 +6:3:2338 +7:3:2338 +8:3:2341 +9:3:2347 +10:3:2351 +11:3:2351 +12:3:2354 +13:3:2362 +14:3:2366 +15:3:2367 +16:0:2372 +17:3:2369 +18:0:2372 +19:2:1142 +20:0:2372 +21:2:1148 +22:0:2372 +23:2:1149 +24:0:2372 +25:2:1150 +26:2:1154 +27:2:1155 +28:2:1163 +29:2:1164 +30:2:1168 +31:2:1169 +32:2:1177 +33:2:1182 +34:2:1186 +35:2:1187 +36:2:1194 +37:2:1195 +38:2:1206 +39:2:1207 +40:2:1208 +41:2:1219 +42:2:1224 +43:2:1225 +44:0:2372 +45:2:1237 +46:2:1238 +47:0:2372 +48:2:1242 +49:2:1246 +50:2:1247 +51:2:1255 +52:2:1256 +53:2:1260 +54:2:1261 +55:2:1269 +56:2:1274 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b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.define b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.log new file mode 100644 index 0000000..ceb438f --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.log @@ -0,0 +1,16 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +spin: line 296 replacement value: tmp +spin: line 296 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' +spin: 1 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input new file mode 100644 index 0000000..cc55960 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input @@ -0,0 +1,410 @@ +#define READER_PROGRESS +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.define b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.log new file mode 100644 index 0000000..985f839 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.log @@ -0,0 +1,14 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input new file mode 100644 index 0000000..28f1299 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input @@ -0,0 +1,410 @@ +#define WRITER_PROGRESS +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.define b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.log b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.log new file mode 100644 index 0000000..26b6236 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.log @@ -0,0 +1,16 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +spin: line 297 replacement value: tmp +spin: line 297 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' +spin: 1 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..43e979c --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input @@ -0,0 +1,411 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..ff6f1c5 --- /dev/null +++ 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+4563:2:1931 +4564:2:1932 +4565:2:1949 +4566:2:1950 +4567:2:1953 +4568:2:1954 +4569:0:2227 +4570:2:1821 +4571:0:2227 +4572:2:1822 +4573:0:2227 +4574:1:4 +4575:1:8 +4576:1:9 +4577:1:16 +4578:1:17 +4579:1:28 +4580:1:32 +4581:1:33 +4582:1:40 +4583:1:41 +4584:1:51 +4585:1:52 +4586:1:62 +4587:1:63 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu.sh b/urcu-nosched-model/result-signal-over-writer/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu.spin b/urcu-nosched-model/result-signal-over-writer/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free.log b/urcu-nosched-model/result-signal-over-writer/urcu_free.log new file mode 100644 index 0000000..9a22c47 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free.log @@ -0,0 +1,345 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 741) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10669, errors: 0 + 20146 states, stored + 191615 states, matched + 211761 transitions (= stored+matched) + 712676 atomic steps +hash conflicts: 1523 (resolved) + +Stats on memory usage (in Megabytes): + 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.661 actual memory usage for states (unsuccessful compression: 102.92%) + state-vector as stored = 58 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.326 total actual memory usage + +unreached in proctype urcu_reader_sig + line 401, "pan.___", state 330, "(1)" + line 612, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 397, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 406, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, "pan.___", state 59, "(1)" + line 416, "pan.___", state 89, "(1)" + line 397, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 160, "(1)" + line 650, "pan.___", state 213, "(1)" + line 173, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 177, "pan.___", state 233, "(1)" + line 158, "pan.___", state 254, "(1)" + line 162, "pan.___", state 262, "(1)" + line 166, "pan.___", state 274, "(1)" + line 173, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 752, "(1)" + line 162, "pan.___", state 760, "(1)" + line 162, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 761, "else" + line 160, "pan.___", state 766, "((j<1))" + line 160, "pan.___", state 766, "((j>=1))" + line 166, "pan.___", state 772, "(1)" + line 166, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 773, "else" + line 168, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 776, "else" + line 173, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, "pan.___", state 835, "(1)" + line 166, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, "pan.___", state 852, "(1)" + line 177, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, "pan.___", state 861, "(1)" + line 177, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, "pan.___", state 862, "else" + line 175, "pan.___", state 867, "((j<1))" + line 175, "pan.___", state 867, "((j>=1))" + line 181, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 882, "(1)" + line 162, "pan.___", state 890, "(1)" + line 162, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 891, "else" + line 160, "pan.___", state 896, "((j<1))" + line 160, "pan.___", state 896, "((j>=1))" + line 166, "pan.___", state 902, "(1)" + line 166, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 903, "else" + line 168, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 906, "else" + line 200, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, "pan.___", state 908, "else" + line 219, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, "pan.___", state 909, "else" + line 354, "pan.___", state 915, "((sighand_exec==1))" + line 354, "pan.___", state 915, "else" + line 360, "pan.___", state 918, "sighand_exec = 1" + line 397, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, "pan.___", state 933, "(1)" + line 397, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, "pan.___", state 934, "else" + line 397, "pan.___", state 937, "(1)" + line 401, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, "pan.___", state 947, "(1)" + line 401, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, "pan.___", state 948, "else" + line 401, "pan.___", state 951, "(1)" + line 401, "pan.___", state 952, "(1)" + line 401, "pan.___", state 952, "(1)" + line 399, "pan.___", state 957, "((i<1))" + line 399, "pan.___", state 957, "((i>=1))" + line 406, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, "pan.___", state 976, "(1)" + line 407, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, "pan.___", state 977, "else" + line 407, "pan.___", state 980, "(1)" + line 407, "pan.___", state 981, "(1)" + line 407, "pan.___", state 981, "(1)" + line 411, "pan.___", state 989, "(1)" + line 411, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, "pan.___", state 990, "else" + line 411, "pan.___", state 993, "(1)" + line 411, "pan.___", state 994, "(1)" + line 411, "pan.___", state 994, "(1)" + line 409, "pan.___", state 999, "((i<1))" + line 409, "pan.___", state 999, "((i>=1))" + line 416, "pan.___", state 1006, "(1)" + line 416, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, "pan.___", state 1007, "else" + line 416, "pan.___", state 1010, "(1)" + line 416, "pan.___", state 1011, "(1)" + line 416, "pan.___", state 1011, "(1)" + line 418, "pan.___", state 1014, "(1)" + line 418, "pan.___", state 1014, "(1)" + line 360, "pan.___", state 1023, "sighand_exec = 1" + line 401, "pan.___", state 1054, "(1)" + line 406, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1113, "(1)" + line 401, "pan.___", state 1151, "(1)" + line 406, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1210, "(1)" + line 397, "pan.___", state 1236, "(1)" + line 401, "pan.___", state 1250, "(1)" + line 406, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1309, "(1)" + line 401, "pan.___", state 1350, "(1)" + line 406, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1409, "(1)" + line 173, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, "pan.___", state 1432, "(1)" + line 177, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, "pan.___", state 1441, "(1)" + line 177, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, "pan.___", state 1442, "else" + line 175, "pan.___", state 1447, "((j<1))" + line 175, "pan.___", state 1447, "((j>=1))" + line 181, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 1462, "(1)" + line 162, "pan.___", state 1470, "(1)" + line 162, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 1471, "else" + line 160, "pan.___", state 1476, "((j<1))" + line 160, "pan.___", state 1476, "((j>=1))" + line 166, "pan.___", state 1482, "(1)" + line 166, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 1483, "else" + line 168, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 1486, "else" + line 173, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, "pan.___", state 1545, "(1)" + line 166, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, "pan.___", state 1562, "(1)" + line 177, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, "pan.___", state 1571, "(1)" + line 177, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, "pan.___", state 1572, "else" + line 175, "pan.___", state 1577, "((j<1))" + line 175, "pan.___", state 1577, "((j>=1))" + line 181, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 1592, "(1)" + line 162, "pan.___", state 1600, "(1)" + line 162, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 1601, "else" + line 160, "pan.___", state 1606, "((j<1))" + line 160, "pan.___", state 1606, "((j>=1))" + line 166, "pan.___", state 1612, "(1)" + line 166, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 1613, "else" + line 168, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 1616, "else" + line 200, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, "pan.___", state 1618, "else" + line 219, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, "pan.___", state 1619, "else" + line 354, "pan.___", state 1625, "((sighand_exec==1))" + line 354, "pan.___", state 1625, "else" + line 360, "pan.___", state 1628, "sighand_exec = 1" + line 397, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, "pan.___", state 1643, "(1)" + line 397, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, "pan.___", state 1644, "else" + line 397, "pan.___", state 1647, "(1)" + line 401, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, "pan.___", state 1657, "(1)" + line 401, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, "pan.___", state 1658, "else" + line 401, "pan.___", state 1661, "(1)" + line 401, "pan.___", state 1662, "(1)" + line 401, "pan.___", state 1662, "(1)" + line 399, "pan.___", state 1667, "((i<1))" + line 399, "pan.___", state 1667, "((i>=1))" + line 406, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, "pan.___", state 1686, "(1)" + line 407, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, "pan.___", state 1687, "else" + line 407, "pan.___", state 1690, "(1)" + line 407, "pan.___", state 1691, "(1)" + line 407, "pan.___", state 1691, "(1)" + line 411, "pan.___", state 1699, "(1)" + line 411, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, "pan.___", state 1700, "else" + line 411, "pan.___", state 1703, "(1)" + line 411, "pan.___", state 1704, "(1)" + line 411, "pan.___", state 1704, "(1)" + line 409, "pan.___", state 1709, "((i<1))" + line 409, "pan.___", state 1709, "((i>=1))" + line 416, "pan.___", state 1716, "(1)" + line 416, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, "pan.___", state 1717, "else" + line 416, "pan.___", state 1720, "(1)" + line 416, "pan.___", state 1721, "(1)" + line 416, "pan.___", state 1721, "(1)" + line 418, "pan.___", state 1724, "(1)" + line 418, "pan.___", state 1724, "(1)" + line 360, "pan.___", state 1733, "sighand_exec = 1" + line 177, "pan.___", state 1758, "(1)" + line 181, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 1779, "(1)" + line 162, "pan.___", state 1787, "(1)" + line 166, "pan.___", state 1799, "(1)" + line 173, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input b/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input new file mode 100644 index 0000000..953115f --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input @@ -0,0 +1,721 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input.trail new file mode 100644 index 0000000..837f3d9 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free.spin.input.trail @@ -0,0 +1,15043 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 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a/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.log b/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.log new file mode 100644 index 0000000..1bc5996 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.log @@ -0,0 +1,232 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_nested.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 715) +Depth= 22961 States= 1e+06 Transitions= 8.79e+06 Memory= 535.002 t= 17.2 R= 6e+04 +Depth= 22961 States= 2e+06 Transitions= 1.79e+07 Memory= 603.654 t= 34.7 R= 6e+04 +Depth= 25030 States= 3e+06 Transitions= 2.69e+07 Memory= 672.404 t= 52.6 R= 6e+04 +pan: resizing hashtable to -w22.. done +Depth= 25030 States= 4e+06 Transitions= 3.73e+07 Memory= 772.080 t= 74.4 R= 5e+04 +Depth= 25030 States= 5e+06 Transitions= 4.77e+07 Memory= 840.830 t= 96.2 R= 5e+04 +Depth= 25030 States= 6e+06 Transitions= 5.45e+07 Memory= 909.483 t= 110 R= 5e+04 +Depth= 25030 States= 7e+06 Transitions= 6.05e+07 Memory= 978.135 t= 122 R= 6e+04 +Depth= 25030 States= 8e+06 Transitions= 6.68e+07 Memory= 1046.787 t= 135 R= 6e+04 +Depth= 25030 States= 9e+06 Transitions= 7.29e+07 Memory= 1115.537 t= 148 R= 6e+04 +pan: resizing hashtable to -w24.. done +Depth= 25030 States= 1e+07 Transitions= 7.91e+07 Memory= 1308.283 t= 162 R= 6e+04 +Depth= 25030 States= 1.1e+07 Transitions= 8.5e+07 Memory= 1376.936 t= 174 R= 6e+04 +Depth= 25030 States= 1.2e+07 Transitions= 9.12e+07 Memory= 1445.588 t= 186 R= 6e+04 +Depth= 25030 States= 1.3e+07 Transitions= 9.79e+07 Memory= 1514.240 t= 200 R= 7e+04 +Depth= 25030 States= 1.4e+07 Transitions= 1.09e+08 Memory= 1582.990 t= 222 R= 6e+04 +Depth= 25030 States= 1.5e+07 Transitions= 1.18e+08 Memory= 1651.643 t= 240 R= 6e+04 +Depth= 25030 States= 1.6e+07 Transitions= 1.27e+08 Memory= 1720.295 t= 258 R= 6e+04 +Depth= 25030 States= 1.7e+07 Transitions= 1.36e+08 Memory= 1788.947 t= 276 R= 6e+04 +Depth= 25030 States= 1.8e+07 Transitions= 1.44e+08 Memory= 1857.697 t= 292 R= 6e+04 +Depth= 25030 States= 1.9e+07 Transitions= 1.54e+08 Memory= 1926.350 t= 313 R= 6e+04 +Depth= 25030 States= 2e+07 Transitions= 1.64e+08 Memory= 1995.002 t= 333 R= 6e+04 +Depth= 25104 States= 2.1e+07 Transitions= 1.73e+08 Memory= 2063.654 t= 350 R= 6e+04 +Depth= 25104 States= 2.2e+07 Transitions= 1.83e+08 Memory= 2132.404 t= 370 R= 6e+04 +Depth= 25104 States= 2.3e+07 Transitions= 1.89e+08 Memory= 2201.057 t= 384 R= 6e+04 +Depth= 25152 States= 2.4e+07 Transitions= 1.98e+08 Memory= 2269.709 t= 402 R= 6e+04 +Depth= 25152 States= 2.5e+07 Transitions= 2.08e+08 Memory= 2338.361 t= 421 R= 6e+04 +Depth= 25152 States= 2.6e+07 Transitions= 2.15e+08 Memory= 2407.111 t= 436 R= 6e+04 +Depth= 25152 States= 2.7e+07 Transitions= 2.24e+08 Memory= 2475.764 t= 454 R= 6e+04 +Depth= 25152 States= 2.8e+07 Transitions= 2.33e+08 Memory= 2544.416 t= 471 R= 6e+04 +Depth= 25152 States= 2.9e+07 Transitions= 2.42e+08 Memory= 2613.068 t= 490 R= 6e+04 +Depth= 32255 States= 3e+07 Transitions= 2.5e+08 Memory= 2681.818 t= 506 R= 6e+04 +Depth= 33413 States= 3.1e+07 Transitions= 2.61e+08 Memory= 2750.471 t= 530 R= 6e+04 +Depth= 33413 States= 3.2e+07 Transitions= 2.73e+08 Memory= 2819.123 t= 555 R= 6e+04 +Depth= 33413 States= 3.3e+07 Transitions= 2.83e+08 Memory= 2887.873 t= 576 R= 6e+04 +Depth= 33413 States= 3.4e+07 Transitions= 2.94e+08 Memory= 2956.526 t= 598 R= 6e+04 +pan: resizing hashtable to -w26.. done +Depth= 33413 States= 3.5e+07 Transitions= 3.03e+08 Memory= 3521.260 t= 624 R= 6e+04 +Depth= 33413 States= 3.6e+07 Transitions= 3.15e+08 Memory= 3589.912 t= 648 R= 6e+04 +Depth= 33413 States= 3.7e+07 Transitions= 3.25e+08 Memory= 3658.565 t= 667 R= 6e+04 +Depth= 33413 States= 3.8e+07 Transitions= 3.34e+08 Memory= 3727.315 t= 687 R= 6e+04 +Depth= 33413 States= 3.9e+07 Transitions= 3.4e+08 Memory= 3795.967 t= 699 R= 6e+04 +Depth= 33413 States= 4e+07 Transitions= 3.48e+08 Memory= 3864.619 t= 715 R= 6e+04 +Depth= 33413 States= 4.1e+07 Transitions= 3.58e+08 Memory= 3933.272 t= 735 R= 6e+04 +Depth= 33413 States= 4.2e+07 Transitions= 3.64e+08 Memory= 4002.022 t= 747 R= 6e+04 +Depth= 33413 States= 4.3e+07 Transitions= 3.72e+08 Memory= 4070.674 t= 762 R= 6e+04 +Depth= 33413 States= 4.4e+07 Transitions= 3.82e+08 Memory= 4139.326 t= 783 R= 6e+04 +Depth= 33413 States= 4.5e+07 Transitions= 3.89e+08 Memory= 4207.979 t= 799 R= 6e+04 +Depth= 33413 States= 4.6e+07 Transitions= 3.95e+08 Memory= 4276.631 t= 810 R= 6e+04 +Depth= 33413 States= 4.7e+07 Transitions= 4.01e+08 Memory= 4345.381 t= 823 R= 6e+04 +Depth= 33413 States= 4.8e+07 Transitions= 4.07e+08 Memory= 4414.033 t= 835 R= 6e+04 +Depth= 33413 States= 4.9e+07 Transitions= 4.16e+08 Memory= 4482.686 t= 852 R= 6e+04 +Depth= 33413 States= 5e+07 Transitions= 4.25e+08 Memory= 4551.338 t= 871 R= 6e+04 +Depth= 33413 States= 5.1e+07 Transitions= 4.31e+08 Memory= 4620.088 t= 883 R= 6e+04 +Depth= 33413 States= 5.2e+07 Transitions= 4.37e+08 Memory= 4688.740 t= 896 R= 6e+04 +Depth= 33413 States= 5.3e+07 Transitions= 4.43e+08 Memory= 4757.393 t= 907 R= 6e+04 +Depth= 33413 States= 5.4e+07 Transitions= 4.5e+08 Memory= 4826.045 t= 922 R= 6e+04 +Depth= 33413 States= 5.5e+07 Transitions= 4.62e+08 Memory= 4894.795 t= 947 R= 6e+04 +Depth= 33413 States= 5.6e+07 Transitions= 4.71e+08 Memory= 4963.447 t= 966 R= 6e+04 +Depth= 33413 States= 5.7e+07 Transitions= 4.81e+08 Memory= 5032.100 t= 987 R= 6e+04 +Depth= 33413 States= 5.8e+07 Transitions= 4.92e+08 Memory= 5100.752 t= 1.01e+03 R= 6e+04 +Depth= 33413 States= 5.9e+07 Transitions= 5.05e+08 Memory= 5169.502 t= 1.03e+03 R= 6e+04 +Depth= 33413 States= 6e+07 Transitions= 5.18e+08 Memory= 5238.154 t= 1.06e+03 R= 6e+04 +Depth= 33413 States= 6.1e+07 Transitions= 5.27e+08 Memory= 5306.807 t= 1.08e+03 R= 6e+04 +Depth= 33413 States= 6.2e+07 Transitions= 5.37e+08 Memory= 5375.459 t= 1.1e+03 R= 6e+04 +Depth= 33413 States= 6.3e+07 Transitions= 5.47e+08 Memory= 5444.111 t= 1.12e+03 R= 6e+04 +Depth= 33413 States= 6.4e+07 Transitions= 5.54e+08 Memory= 5512.861 t= 1.13e+03 R= 6e+04 +Depth= 33413 States= 6.5e+07 Transitions= 5.6e+08 Memory= 5581.514 t= 1.14e+03 R= 6e+04 +Depth= 33413 States= 6.6e+07 Transitions= 5.66e+08 Memory= 5650.166 t= 1.16e+03 R= 6e+04 +Depth= 33413 States= 6.7e+07 Transitions= 5.73e+08 Memory= 5718.818 t= 1.17e+03 R= 6e+04 +Depth= 33413 States= 6.8e+07 Transitions= 5.82e+08 Memory= 5787.568 t= 1.19e+03 R= 6e+04 +Depth= 33413 States= 6.9e+07 Transitions= 5.9e+08 Memory= 5856.221 t= 1.21e+03 R= 6e+04 +Depth= 33413 States= 7e+07 Transitions= 5.99e+08 Memory= 5924.873 t= 1.22e+03 R= 6e+04 +Depth= 33413 States= 7.1e+07 Transitions= 6.08e+08 Memory= 5993.526 t= 1.24e+03 R= 6e+04 +Depth= 33413 States= 7.2e+07 Transitions= 6.18e+08 Memory= 6062.276 t= 1.26e+03 R= 6e+04 +Depth= 33413 States= 7.3e+07 Transitions= 6.27e+08 Memory= 6130.928 t= 1.28e+03 R= 6e+04 +Depth= 33413 States= 7.4e+07 Transitions= 6.33e+08 Memory= 6199.580 t= 1.29e+03 R= 6e+04 +Depth= 33413 States= 7.5e+07 Transitions= 6.39e+08 Memory= 6268.233 t= 1.31e+03 R= 6e+04 +Depth= 33413 States= 7.6e+07 Transitions= 6.45e+08 Memory= 6336.983 t= 1.32e+03 R= 6e+04 +Depth= 33413 States= 7.7e+07 Transitions= 6.55e+08 Memory= 6405.635 t= 1.34e+03 R= 6e+04 +Depth= 33413 States= 7.8e+07 Transitions= 6.61e+08 Memory= 6474.287 t= 1.35e+03 R= 6e+04 +Depth= 33413 States= 7.9e+07 Transitions= 6.71e+08 Memory= 6542.940 t= 1.37e+03 R= 6e+04 +Depth= 33413 States= 8e+07 Transitions= 6.77e+08 Memory= 6611.592 t= 1.38e+03 R= 6e+04 +Depth= 33413 States= 8.1e+07 Transitions= 6.83e+08 Memory= 6680.342 t= 1.4e+03 R= 6e+04 +Depth= 33413 States= 8.2e+07 Transitions= 6.91e+08 Memory= 6748.994 t= 1.41e+03 R= 6e+04 +Depth= 33413 States= 8.3e+07 Transitions= 6.97e+08 Memory= 6817.647 t= 1.43e+03 R= 6e+04 +Depth= 33413 States= 8.4e+07 Transitions= 7.06e+08 Memory= 6886.299 t= 1.44e+03 R= 6e+04 +Depth= 33413 States= 8.5e+07 Transitions= 7.15e+08 Memory= 6955.049 t= 1.46e+03 R= 6e+04 +Depth= 33413 States= 8.6e+07 Transitions= 7.24e+08 Memory= 7023.701 t= 1.48e+03 R= 6e+04 +Depth= 33413 States= 8.7e+07 Transitions= 7.35e+08 Memory= 7092.354 t= 1.5e+03 R= 6e+04 +Depth= 33413 States= 8.8e+07 Transitions= 7.46e+08 Memory= 7161.006 t= 1.52e+03 R= 6e+04 +Depth= 33413 States= 8.9e+07 Transitions= 7.61e+08 Memory= 7229.756 t= 1.56e+03 R= 6e+04 +Depth= 33413 States= 9e+07 Transitions= 7.83e+08 Memory= 7298.408 t= 1.6e+03 R= 6e+04 +Depth= 33413 States= 9.1e+07 Transitions= 7.97e+08 Memory= 7367.061 t= 1.63e+03 R= 6e+04 +Depth= 33413 States= 9.2e+07 Transitions= 8.12e+08 Memory= 7435.713 t= 1.66e+03 R= 6e+04 +Depth= 33413 States= 9.3e+07 Transitions= 8.24e+08 Memory= 7504.463 t= 1.68e+03 R= 6e+04 +Depth= 33413 States= 9.4e+07 Transitions= 8.32e+08 Memory= 7573.115 t= 1.7e+03 R= 6e+04 +Depth= 33413 States= 9.5e+07 Transitions= 8.46e+08 Memory= 7641.768 t= 1.73e+03 R= 5e+04 +Depth= 33413 States= 9.6e+07 Transitions= 8.57e+08 Memory= 7710.420 t= 1.75e+03 R= 5e+04 +Depth= 33413 States= 9.7e+07 Transitions= 8.71e+08 Memory= 7779.072 t= 1.78e+03 R= 5e+04 +Depth= 33413 States= 9.8e+07 Transitions= 8.84e+08 Memory= 7847.822 t= 1.81e+03 R= 5e+04 +Depth= 33413 States= 9.9e+07 Transitions= 8.97e+08 Memory= 7916.475 t= 1.83e+03 R= 5e+04 +Depth= 33413 States= 1e+08 Transitions= 9.08e+08 Memory= 7985.127 t= 1.85e+03 R= 5e+04 +Depth= 33413 States= 1.01e+08 Transitions= 9.22e+08 Memory= 8053.779 t= 1.88e+03 R= 5e+04 +Depth= 33413 States= 1.02e+08 Transitions= 9.35e+08 Memory= 8122.529 t= 1.91e+03 R= 5e+04 +Depth= 33413 States= 1.03e+08 Transitions= 9.47e+08 Memory= 8191.182 t= 1.93e+03 R= 5e+04 +Depth= 33413 States= 1.04e+08 Transitions= 9.59e+08 Memory= 8259.834 t= 1.96e+03 R= 5e+04 +Depth= 33413 States= 1.05e+08 Transitions= 9.68e+08 Memory= 8328.486 t= 1.97e+03 R= 5e+04 +Depth= 33413 States= 1.06e+08 Transitions= 9.78e+08 Memory= 8397.236 t= 2e+03 R= 5e+04 +Depth= 33413 States= 1.07e+08 Transitions= 9.97e+08 Memory= 8465.889 t= 2.04e+03 R= 5e+04 +Depth= 33413 States= 1.08e+08 Transitions= 1.01e+09 Memory= 8534.541 t= 2.06e+03 R= 5e+04 +Depth= 33413 States= 1.09e+08 Transitions= 1.02e+09 Memory= 8603.193 t= 2.09e+03 R= 5e+04 +Depth= 33413 States= 1.1e+08 Transitions= 1.03e+09 Memory= 8671.846 t= 2.1e+03 R= 5e+04 +Depth= 33413 States= 1.11e+08 Transitions= 1.05e+09 Memory= 8740.596 t= 2.13e+03 R= 5e+04 +Depth= 33413 States= 1.12e+08 Transitions= 1.06e+09 Memory= 8809.248 t= 2.17e+03 R= 5e+04 +Depth= 33413 States= 1.13e+08 Transitions= 1.08e+09 Memory= 8877.901 t= 2.19e+03 R= 5e+04 +Depth= 33413 States= 1.14e+08 Transitions= 1.09e+09 Memory= 8946.553 t= 2.22e+03 R= 5e+04 +Depth= 33413 States= 1.15e+08 Transitions= 1.1e+09 Memory= 9015.303 t= 2.24e+03 R= 5e+04 +Depth= 33413 States= 1.16e+08 Transitions= 1.11e+09 Memory= 9083.955 t= 2.26e+03 R= 5e+04 +Depth= 33413 States= 1.17e+08 Transitions= 1.11e+09 Memory= 9152.608 t= 2.27e+03 R= 5e+04 +Depth= 33413 States= 1.18e+08 Transitions= 1.12e+09 Memory= 9221.260 t= 2.29e+03 R= 5e+04 +Depth= 33413 States= 1.19e+08 Transitions= 1.13e+09 Memory= 9290.010 t= 2.3e+03 R= 5e+04 +Depth= 33413 States= 1.2e+08 Transitions= 1.14e+09 Memory= 9358.662 t= 2.32e+03 R= 5e+04 +Depth= 33413 States= 1.21e+08 Transitions= 1.15e+09 Memory= 9427.315 t= 2.34e+03 R= 5e+04 +Depth= 33413 States= 1.22e+08 Transitions= 1.17e+09 Memory= 9495.967 t= 2.38e+03 R= 5e+04 +Depth= 33413 States= 1.23e+08 Transitions= 1.18e+09 Memory= 9564.717 t= 2.41e+03 R= 5e+04 +Depth= 33413 States= 1.24e+08 Transitions= 1.19e+09 Memory= 9633.369 t= 2.43e+03 R= 5e+04 +Depth= 33413 States= 1.25e+08 Transitions= 1.2e+09 Memory= 9702.022 t= 2.46e+03 R= 5e+04 +Depth= 33413 States= 1.26e+08 Transitions= 1.22e+09 Memory= 9770.674 t= 2.48e+03 R= 5e+04 +Depth= 33413 States= 1.27e+08 Transitions= 1.23e+09 Memory= 9839.326 t= 2.51e+03 R= 5e+04 +Depth= 33413 States= 1.28e+08 Transitions= 1.24e+09 Memory= 9908.076 t= 2.54e+03 R= 5e+04 +Depth= 33413 States= 1.29e+08 Transitions= 1.25e+09 Memory= 9976.729 t= 2.56e+03 R= 5e+04 +Depth= 33413 States= 1.3e+08 Transitions= 1.26e+09 Memory= 10045.381 t= 2.58e+03 R= 5e+04 +Depth= 33413 States= 1.31e+08 Transitions= 1.27e+09 Memory= 10114.033 t= 2.61e+03 R= 5e+04 +Depth= 33413 States= 1.32e+08 Transitions= 1.28e+09 Memory= 10182.783 t= 2.62e+03 R= 5e+04 +Depth= 33413 States= 1.33e+08 Transitions= 1.29e+09 Memory= 10251.436 t= 2.64e+03 R= 5e+04 +Depth= 33413 States= 1.34e+08 Transitions= 1.3e+09 Memory= 10320.088 t= 2.66e+03 R= 5e+04 +Depth= 33413 States= 1.35e+08 Transitions= 1.31e+09 Memory= 10388.740 t= 2.68e+03 R= 5e+04 +pan: resizing hashtable to -w28.. done +Depth= 33413 States= 1.36e+08 Transitions= 1.32e+09 Memory= 12441.428 t= 2.73e+03 R= 5e+04 +Depth= 33413 States= 1.37e+08 Transitions= 1.32e+09 Memory= 12510.178 t= 2.75e+03 R= 5e+04 +Depth= 33413 States= 1.38e+08 Transitions= 1.33e+09 Memory= 12578.830 t= 2.77e+03 R= 5e+04 +Depth= 33413 States= 1.39e+08 Transitions= 1.35e+09 Memory= 12647.483 t= 2.79e+03 R= 5e+04 +Depth= 33413 States= 1.4e+08 Transitions= 1.36e+09 Memory= 12716.135 t= 2.82e+03 R= 5e+04 +Depth= 33413 States= 1.41e+08 Transitions= 1.37e+09 Memory= 12784.787 t= 2.84e+03 R= 5e+04 +Depth= 33413 States= 1.42e+08 Transitions= 1.38e+09 Memory= 12853.537 t= 2.86e+03 R= 5e+04 +Depth= 33413 States= 1.43e+08 Transitions= 1.4e+09 Memory= 12922.190 t= 2.9e+03 R= 5e+04 +Depth= 33413 States= 1.44e+08 Transitions= 1.41e+09 Memory= 12990.842 t= 2.91e+03 R= 5e+04 +Depth= 33413 States= 1.45e+08 Transitions= 1.42e+09 Memory= 13059.494 t= 2.93e+03 R= 5e+04 +Depth= 33413 States= 1.46e+08 Transitions= 1.43e+09 Memory= 13128.244 t= 2.96e+03 R= 5e+04 +Depth= 33413 States= 1.47e+08 Transitions= 1.45e+09 Memory= 13196.897 t= 3e+03 R= 5e+04 +Depth= 33413 States= 1.48e+08 Transitions= 1.47e+09 Memory= 13265.549 t= 3.03e+03 R= 5e+04 +Depth= 33413 States= 1.49e+08 Transitions= 1.48e+09 Memory= 13334.201 t= 3.06e+03 R= 5e+04 +Depth= 33413 States= 1.5e+08 Transitions= 1.5e+09 Memory= 13402.951 t= 3.09e+03 R= 5e+04 +Depth= 33413 States= 1.51e+08 Transitions= 1.5e+09 Memory= 13471.604 t= 3.11e+03 R= 5e+04 +Depth= 33413 States= 1.52e+08 Transitions= 1.52e+09 Memory= 13540.256 t= 3.13e+03 R= 5e+04 +Depth= 33413 States= 1.53e+08 Transitions= 1.53e+09 Memory= 13608.908 t= 3.15e+03 R= 5e+04 +Depth= 33413 States= 1.54e+08 Transitions= 1.55e+09 Memory= 13677.658 t= 3.19e+03 R= 5e+04 +Depth= 33413 States= 1.55e+08 Transitions= 1.56e+09 Memory= 13746.311 t= 3.22e+03 R= 5e+04 +Depth= 33413 States= 1.56e+08 Transitions= 1.58e+09 Memory= 13814.963 t= 3.25e+03 R= 5e+04 +Depth= 33413 States= 1.57e+08 Transitions= 1.59e+09 Memory= 13883.615 t= 3.29e+03 R= 5e+04 +Depth= 33413 States= 1.58e+08 Transitions= 1.6e+09 Memory= 13952.268 t= 3.31e+03 R= 5e+04 +Depth= 33413 States= 1.59e+08 Transitions= 1.61e+09 Memory= 14021.018 t= 3.33e+03 R= 5e+04 +Depth= 33413 States= 1.6e+08 Transitions= 1.63e+09 Memory= 14089.670 t= 3.36e+03 R= 5e+04 +Depth= 33413 States= 1.61e+08 Transitions= 1.64e+09 Memory= 14158.322 t= 3.39e+03 R= 5e+04 +Depth= 33413 States= 1.62e+08 Transitions= 1.66e+09 Memory= 14226.975 t= 3.42e+03 R= 5e+04 +Depth= 33413 States= 1.63e+08 Transitions= 1.67e+09 Memory= 14295.725 t= 3.45e+03 R= 5e+04 +Depth= 33413 States= 1.64e+08 Transitions= 1.69e+09 Memory= 14364.377 t= 3.48e+03 R= 5e+04 +Depth= 33413 States= 1.65e+08 Transitions= 1.7e+09 Memory= 14433.029 t= 3.5e+03 R= 5e+04 +Depth= 33413 States= 1.66e+08 Transitions= 1.71e+09 Memory= 14501.682 t= 3.52e+03 R= 5e+04 +Depth= 33413 States= 1.67e+08 Transitions= 1.72e+09 Memory= 14570.432 t= 3.55e+03 R= 5e+04 +Depth= 33413 States= 1.68e+08 Transitions= 1.73e+09 Memory= 14639.084 t= 3.57e+03 R= 5e+04 +Depth= 33413 States= 1.69e+08 Transitions= 1.74e+09 Memory= 14707.736 t= 3.59e+03 R= 5e+04 +Depth= 33413 States= 1.7e+08 Transitions= 1.76e+09 Memory= 14776.389 t= 3.62e+03 R= 5e+04 +Depth= 33413 States= 1.71e+08 Transitions= 1.77e+09 Memory= 14845.041 t= 3.64e+03 R= 5e+04 +Depth= 33413 States= 1.72e+08 Transitions= 1.77e+09 Memory= 14913.791 t= 3.65e+03 R= 5e+04 +Depth= 33413 States= 1.73e+08 Transitions= 1.78e+09 Memory= 14982.443 t= 3.66e+03 R= 5e+04 +Depth= 33413 States= 1.74e+08 Transitions= 1.79e+09 Memory= 15051.096 t= 3.68e+03 R= 5e+04 +Depth= 33413 States= 1.75e+08 Transitions= 1.79e+09 Memory= 15119.748 t= 3.69e+03 R= 5e+04 +Depth= 33413 States= 1.76e+08 Transitions= 1.8e+09 Memory= 15188.498 t= 3.71e+03 R= 5e+04 +Depth= 33413 States= 1.77e+08 Transitions= 1.8e+09 Memory= 15257.151 t= 3.72e+03 R= 5e+04 +Depth= 33413 States= 1.78e+08 Transitions= 1.81e+09 Memory= 15325.803 t= 3.73e+03 R= 5e+04 +Depth= 33413 States= 1.79e+08 Transitions= 1.82e+09 Memory= 15394.455 t= 3.75e+03 R= 5e+04 +Depth= 33413 States= 1.8e+08 Transitions= 1.83e+09 Memory= 15463.205 t= 3.76e+03 R= 5e+04 +Depth= 33413 States= 1.81e+08 Transitions= 1.83e+09 Memory= 15531.858 t= 3.77e+03 R= 5e+04 +Depth= 33413 States= 1.82e+08 Transitions= 1.84e+09 Memory= 15600.510 t= 3.79e+03 R= 5e+04 +Depth= 33413 States= 1.83e+08 Transitions= 1.85e+09 Memory= 15669.162 t= 3.8e+03 R= 5e+04 +Depth= 33413 States= 1.84e+08 Transitions= 1.86e+09 Memory= 15737.912 t= 3.82e+03 R= 5e+04 +Depth= 33413 States= 1.85e+08 Transitions= 1.87e+09 Memory= 15806.565 t= 3.84e+03 R= 5e+04 +Depth= 33413 States= 1.86e+08 Transitions= 1.88e+09 Memory= 15875.217 t= 3.87e+03 R= 5e+04 +Depth= 33413 States= 1.87e+08 Transitions= 1.89e+09 Memory= 15943.869 t= 3.89e+03 R= 5e+04 +Depth= 33413 States= 1.88e+08 Transitions= 1.9e+09 Memory= 16012.522 t= 3.91e+03 R= 5e+04 +Depth= 33413 States= 1.89e+08 Transitions= 1.91e+09 Memory= 16081.272 t= 3.94e+03 R= 5e+04 +Depth= 33413 States= 1.9e+08 Transitions= 1.92e+09 Memory= 16149.924 t= 3.96e+03 R= 5e+04 +Depth= 33413 States= 1.91e+08 Transitions= 1.94e+09 Memory= 16218.576 t= 3.98e+03 R= 5e+04 +Depth= 33413 States= 1.92e+08 Transitions= 1.95e+09 Memory= 16287.229 t= 4.02e+03 R= 5e+04 +Depth= 33413 States= 1.93e+08 Transitions= 1.96e+09 Memory= 16355.979 t= 4.05e+03 R= 5e+04 +Depth= 33413 States= 1.94e+08 Transitions= 1.97e+09 Memory= 16424.631 t= 4.09e+03 R= 5e+04 +Depth= 33413 States= 1.95e+08 Transitions= 1.99e+09 Memory= 16493.283 t= 4.17e+03 R= 5e+04 +Depth= 33413 States= 1.96e+08 Transitions= 2e+09 Memory= 16561.936 t= 4.26e+03 R= 5e+04 +Depth= 33413 States= 1.97e+08 Transitions= 2.02e+09 Memory= 16630.686 t= 4.36e+03 R= 5e+04 +Depth= 33413 States= 1.98e+08 Transitions= 2.04e+09 Memory= 16699.338 t= 4.45e+03 R= 4e+04 +Depth= 33413 States= 1.99e+08 Transitions= 2.05e+09 Memory= 16767.990 t= 4.53e+03 R= 4e+04 +Depth= 33413 States= 2e+08 Transitions= 2.06e+09 Memory= 16836.643 t= 4.59e+03 R= 4e+04 +Depth= 33413 States= 2.01e+08 Transitions= 2.07e+09 Memory= 16905.393 t= 4.64e+03 R= 4e+04 +Depth= 33413 States= 2.02e+08 Transitions= 2.07e+09 Memory= 16974.045 t= 4.7e+03 R= 4e+04 +Depth= 33413 States= 2.03e+08 Transitions= 2.08e+09 Memory= 17042.697 t= 4.78e+03 R= 4e+04 +Depth= 33413 States= 2.04e+08 Transitions= 2.1e+09 Memory= 17111.350 t= 4.9e+03 R= 4e+04 +Depth= 33413 States= 2.05e+08 Transitions= 2.11e+09 Memory= 17180.002 t= 5.05e+03 R= 4e+04 +Depth= 33413 States= 2.06e+08 Transitions= 2.13e+09 Memory= 17248.752 t= 5.25e+03 R= 4e+04 +Depth= 33413 States= 2.07e+08 Transitions= 2.14e+09 Memory= 17317.404 t= 5.45e+03 R= 4e+04 +Depth= 33413 States= 2.08e+08 Transitions= 2.15e+09 Memory= 17386.057 t= 5.65e+03 R= 4e+04 +Depth= 33413 States= 2.09e+08 Transitions= 2.16e+09 Memory= 17454.709 t= 5.86e+03 R= 4e+04 +Depth= 33413 States= 2.1e+08 Transitions= 2.17e+09 Memory= 17523.459 t= 6.1e+03 R= 3e+04 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input b/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input new file mode 100644 index 0000000..c94928c --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input @@ -0,0 +1,696 @@ +#define READER_NEST_LEVEL 1 + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE +#define get_pid() ((_pid < 1) -> 0 : 1) +#elif defined(TEST_SIGNAL_ON_READ) +#define get_pid() ((_pid < 2) -> 0 : 1) +#else +#define get_pid() (_pid) +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + dispatch_sighand_read_exec(); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 1; + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input.trail new file mode 100644 index 0000000..6f29ad2 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_nested.spin.input.trail @@ -0,0 +1,11161 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 +25:4:4362 +26:0:4365 +27:3:2331 +28:0:4365 +29:3:2337 +30:0:4365 +31:3:2338 +32:0:4365 +33:3:2339 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/dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.log b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.log new file mode 100644 index 0000000..4cee7dc --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.log @@ -0,0 +1,382 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 72 byte, depth reached 10856, errors: 0 + 161519 states, stored + 1724866 states, matched + 1886385 transitions (= stored+matched) + 6692565 atomic steps +hash conflicts: 84009 (resolved) + +Stats on memory usage (in Megabytes): + 15.404 equivalent memory usage for states (stored*(State-vector + overhead)) + 10.421 actual memory usage for states (compression: 67.65%) + state-vector as stored = 40 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 476.115 total actual memory usage + +unreached in proctype urcu_reader_sig + line 403, "pan.___", state 330, "(1)" + line 614, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 652, "pan.___", state 213, "(1)" + line 403, "pan.___", state 239, "(1)" + line 403, "pan.___", state 525, "(1)" + line 399, "pan.___", state 610, "(1)" + line 403, "pan.___", state 624, "(1)" + line 403, "pan.___", state 724, "(1)" + line 399, "pan.___", state 805, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 807, "(1)" + line 399, "pan.___", state 808, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 808, "else" + line 399, "pan.___", state 811, "(1)" + line 403, "pan.___", state 819, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 821, "(1)" + line 403, "pan.___", state 822, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 822, "else" + line 403, "pan.___", state 825, "(1)" + line 403, "pan.___", state 826, "(1)" + line 403, "pan.___", state 826, "(1)" + line 401, "pan.___", state 831, "((j<1))" + line 401, "pan.___", state 831, "((j>=1))" + line 408, "pan.___", state 837, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 850, "(1)" + line 409, "pan.___", state 851, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 851, "else" + line 409, "pan.___", state 854, "(1)" + line 409, "pan.___", state 855, "(1)" + line 409, "pan.___", state 855, "(1)" + line 413, "pan.___", state 863, "(1)" + line 413, "pan.___", state 864, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 864, "else" + line 413, "pan.___", state 867, "(1)" + line 413, "pan.___", state 868, "(1)" + line 413, "pan.___", state 868, "(1)" + line 411, "pan.___", state 873, "((j<1))" + line 411, "pan.___", state 873, "((j>=1))" + line 418, "pan.___", state 880, "(1)" + line 418, "pan.___", state 881, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 881, "else" + line 418, "pan.___", state 884, "(1)" + line 418, "pan.___", state 885, "(1)" + line 418, "pan.___", state 885, "(1)" + line 399, "pan.___", state 896, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 898, "(1)" + line 399, "pan.___", state 899, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 899, "else" + line 399, "pan.___", state 902, "(1)" + line 403, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 912, "(1)" + line 403, "pan.___", state 913, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 913, "else" + line 403, "pan.___", state 916, "(1)" + line 403, "pan.___", state 917, "(1)" + line 403, "pan.___", state 917, "(1)" + line 401, "pan.___", state 922, "((j<1))" + line 401, "pan.___", state 922, "((j>=1))" + line 408, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 941, "(1)" + line 409, "pan.___", state 942, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 942, "else" + line 409, "pan.___", state 945, "(1)" + line 409, "pan.___", state 946, "(1)" + line 409, "pan.___", state 946, "(1)" + line 413, "pan.___", state 954, "(1)" + line 413, "pan.___", state 955, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 955, "else" + line 413, "pan.___", state 958, "(1)" + line 413, "pan.___", state 959, "(1)" + line 413, "pan.___", state 959, "(1)" + line 411, "pan.___", state 964, "((j<1))" + line 411, "pan.___", state 964, "((j>=1))" + line 418, "pan.___", state 971, "(1)" + line 418, "pan.___", state 972, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 972, "else" + line 418, "pan.___", state 975, "(1)" + line 418, "pan.___", state 976, "(1)" + line 418, "pan.___", state 976, "(1)" + line 194, "pan.___", state 981, "(1)" + line 194, "pan.___", state 981, "(1)" + line 214, "pan.___", state 985, "((i<1))" + line 214, "pan.___", state 985, "((i>=1))" + line 399, "pan.___", state 991, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 993, "(1)" + line 399, "pan.___", state 994, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 994, "else" + line 399, "pan.___", state 997, "(1)" + line 403, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1007, "(1)" + line 403, "pan.___", state 1008, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1008, "else" + line 403, "pan.___", state 1011, "(1)" + line 403, "pan.___", state 1012, "(1)" + line 403, "pan.___", state 1012, "(1)" + line 401, "pan.___", state 1017, "((j<1))" + line 401, "pan.___", state 1017, "((j>=1))" + line 408, "pan.___", state 1023, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1036, "(1)" + line 409, "pan.___", state 1037, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1037, "else" + line 409, "pan.___", state 1040, "(1)" + line 409, "pan.___", state 1041, "(1)" + line 409, "pan.___", state 1041, "(1)" + line 413, "pan.___", state 1049, "(1)" + line 413, "pan.___", state 1050, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1050, "else" + line 413, "pan.___", state 1053, "(1)" + line 413, "pan.___", state 1054, "(1)" + line 413, "pan.___", state 1054, "(1)" + line 411, "pan.___", state 1059, "((j<1))" + line 411, "pan.___", state 1059, "((j>=1))" + line 418, "pan.___", state 1066, "(1)" + line 418, "pan.___", state 1067, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1067, "else" + line 418, "pan.___", state 1070, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 194, "pan.___", state 1076, "(1)" + line 194, "pan.___", state 1076, "(1)" + line 221, "pan.___", state 1077, "(1)" + line 221, "pan.___", state 1077, "(1)" + line 356, "pan.___", state 1083, "((sighand_exec==1))" + line 356, "pan.___", state 1083, "else" + line 362, "pan.___", state 1086, "sighand_exec = 1" + line 399, "pan.___", state 1099, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1101, "(1)" + line 399, "pan.___", state 1102, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1102, "else" + line 399, "pan.___", state 1105, "(1)" + line 403, "pan.___", state 1113, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1115, "(1)" + line 403, "pan.___", state 1116, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1116, "else" + line 403, "pan.___", state 1119, "(1)" + line 403, "pan.___", state 1120, "(1)" + line 403, "pan.___", state 1120, "(1)" + line 401, "pan.___", state 1125, "((i<1))" + line 401, "pan.___", state 1125, "((i>=1))" + line 408, "pan.___", state 1131, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1144, "(1)" + line 409, "pan.___", state 1145, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1145, "else" + line 409, "pan.___", state 1148, "(1)" + line 409, "pan.___", state 1149, "(1)" + line 409, "pan.___", state 1149, "(1)" + line 413, "pan.___", state 1157, "(1)" + line 413, "pan.___", state 1158, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1158, "else" + line 413, "pan.___", state 1161, "(1)" + line 413, "pan.___", state 1162, "(1)" + line 413, "pan.___", state 1162, "(1)" + line 411, "pan.___", state 1167, "((i<1))" + line 411, "pan.___", state 1167, "((i>=1))" + line 418, "pan.___", state 1174, "(1)" + line 418, "pan.___", state 1175, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1175, "else" + line 418, "pan.___", state 1178, "(1)" + line 418, "pan.___", state 1179, "(1)" + line 418, "pan.___", state 1179, "(1)" + line 420, "pan.___", state 1182, "(1)" + line 420, "pan.___", state 1182, "(1)" + line 362, "pan.___", state 1191, "sighand_exec = 1" + line 403, "pan.___", state 1222, "(1)" + line 403, "pan.___", state 1319, "(1)" + line 399, "pan.___", state 1404, "(1)" + line 403, "pan.___", state 1418, "(1)" + line 403, "pan.___", state 1518, "(1)" + line 399, "pan.___", state 1599, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1601, "(1)" + line 399, "pan.___", state 1602, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1602, "else" + line 399, "pan.___", state 1605, "(1)" + line 403, "pan.___", state 1613, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1615, "(1)" + line 403, "pan.___", state 1616, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1616, "else" + line 403, "pan.___", state 1619, "(1)" + line 403, "pan.___", state 1620, "(1)" + line 403, "pan.___", state 1620, "(1)" + line 401, "pan.___", state 1625, "((j<1))" + line 401, "pan.___", state 1625, "((j>=1))" + line 408, "pan.___", state 1631, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1644, "(1)" + line 409, "pan.___", state 1645, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1645, "else" + line 409, "pan.___", state 1648, "(1)" + line 409, "pan.___", state 1649, "(1)" + line 409, "pan.___", state 1649, "(1)" + line 413, "pan.___", state 1657, "(1)" + line 413, "pan.___", state 1658, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1658, "else" + line 413, "pan.___", state 1661, "(1)" + line 413, "pan.___", state 1662, "(1)" + line 413, "pan.___", state 1662, "(1)" + line 411, "pan.___", state 1667, "((j<1))" + line 411, "pan.___", state 1667, "((j>=1))" + line 418, "pan.___", state 1674, "(1)" + line 418, "pan.___", state 1675, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1675, "else" + line 418, "pan.___", state 1678, "(1)" + line 418, "pan.___", state 1679, "(1)" + line 418, "pan.___", state 1679, "(1)" + line 399, "pan.___", state 1690, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1692, "(1)" + line 399, "pan.___", state 1693, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1693, "else" + line 399, "pan.___", state 1696, "(1)" + line 403, "pan.___", state 1704, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1706, "(1)" + line 403, "pan.___", state 1707, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1707, "else" + line 403, "pan.___", state 1710, "(1)" + line 403, "pan.___", state 1711, "(1)" + line 403, "pan.___", state 1711, "(1)" + line 401, "pan.___", state 1716, "((j<1))" + line 401, "pan.___", state 1716, "((j>=1))" + line 408, "pan.___", state 1722, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1735, "(1)" + line 409, "pan.___", state 1736, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1736, "else" + line 409, "pan.___", state 1739, "(1)" + line 409, "pan.___", state 1740, "(1)" + line 409, "pan.___", state 1740, "(1)" + line 413, "pan.___", state 1748, "(1)" + line 413, "pan.___", state 1749, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1749, "else" + line 413, "pan.___", state 1752, "(1)" + line 413, "pan.___", state 1753, "(1)" + line 413, "pan.___", state 1753, "(1)" + line 411, "pan.___", state 1758, "((j<1))" + line 411, "pan.___", state 1758, "((j>=1))" + line 418, "pan.___", state 1765, "(1)" + line 418, "pan.___", state 1766, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1766, "else" + line 418, "pan.___", state 1769, "(1)" + line 418, "pan.___", state 1770, "(1)" + line 418, "pan.___", state 1770, "(1)" + line 194, "pan.___", state 1775, "(1)" + line 194, "pan.___", state 1775, "(1)" + line 214, "pan.___", state 1779, "((i<1))" + line 214, "pan.___", state 1779, "((i>=1))" + line 399, "pan.___", state 1785, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1787, "(1)" + line 399, "pan.___", state 1788, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1788, "else" + line 399, "pan.___", state 1791, "(1)" + line 403, "pan.___", state 1799, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1801, "(1)" + line 403, "pan.___", state 1802, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1802, "else" + line 403, "pan.___", state 1805, "(1)" + line 403, "pan.___", state 1806, "(1)" + line 403, "pan.___", state 1806, "(1)" + line 401, "pan.___", state 1811, "((j<1))" + line 401, "pan.___", state 1811, "((j>=1))" + line 408, "pan.___", state 1817, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1830, "(1)" + line 409, "pan.___", state 1831, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1831, "else" + line 409, "pan.___", state 1834, "(1)" + line 409, "pan.___", state 1835, "(1)" + line 409, "pan.___", state 1835, "(1)" + line 413, "pan.___", state 1843, "(1)" + line 413, "pan.___", state 1844, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1844, "else" + line 413, "pan.___", state 1847, "(1)" + line 413, "pan.___", state 1848, "(1)" + line 413, "pan.___", state 1848, "(1)" + line 411, "pan.___", state 1853, "((j<1))" + line 411, "pan.___", state 1853, "((j>=1))" + line 418, "pan.___", state 1860, "(1)" + line 418, "pan.___", state 1861, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1861, "else" + line 418, "pan.___", state 1864, "(1)" + line 418, "pan.___", state 1865, "(1)" + line 418, "pan.___", state 1865, "(1)" + line 194, "pan.___", state 1870, "(1)" + line 194, "pan.___", state 1870, "(1)" + line 221, "pan.___", state 1871, "(1)" + line 221, "pan.___", state 1871, "(1)" + line 356, "pan.___", state 1877, "((sighand_exec==1))" + line 356, "pan.___", state 1877, "else" + line 362, "pan.___", state 1880, "sighand_exec = 1" + line 399, "pan.___", state 1893, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1895, "(1)" + line 399, "pan.___", state 1896, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1896, "else" + line 399, "pan.___", state 1899, "(1)" + line 403, "pan.___", state 1907, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1909, "(1)" + line 403, "pan.___", state 1910, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1910, "else" + line 403, "pan.___", state 1913, "(1)" + line 403, "pan.___", state 1914, "(1)" + line 403, "pan.___", state 1914, "(1)" + line 401, "pan.___", state 1919, "((i<1))" + line 401, "pan.___", state 1919, "((i>=1))" + line 408, "pan.___", state 1925, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1938, "(1)" + line 409, "pan.___", state 1939, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1939, "else" + line 409, "pan.___", state 1942, "(1)" + line 409, "pan.___", state 1943, "(1)" + line 409, "pan.___", state 1943, "(1)" + line 413, "pan.___", state 1951, "(1)" + line 413, "pan.___", state 1952, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1952, "else" + line 413, "pan.___", state 1955, "(1)" + line 413, "pan.___", state 1956, "(1)" + line 413, "pan.___", state 1956, "(1)" + line 411, "pan.___", state 1961, "((i<1))" + line 411, "pan.___", state 1961, "((i>=1))" + line 418, "pan.___", state 1968, "(1)" + line 418, "pan.___", state 1969, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1969, "else" + line 418, "pan.___", state 1972, "(1)" + line 418, "pan.___", state 1973, "(1)" + line 418, "pan.___", state 1973, "(1)" + line 420, "pan.___", state 1976, "(1)" + line 420, "pan.___", state 1976, "(1)" + line 362, "pan.___", state 1985, "sighand_exec = 1" + line 403, "pan.___", state 2016, "(1)" + line 702, "pan.___", state 2304, "-end-" + (221 of 2304 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 748, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.47 seconds +pan: rate 109876.87 states/second +pan: avg transition delay 7.7927e-07 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..48411ec --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input @@ -0,0 +1,723 @@ +#define NO_RMB +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..00fba51 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2172 @@ +-2:4:-2 +-4:-4:-4 +1:0:4249 +2:4:4201 +3:4:4204 +4:4:4204 +5:4:4207 +6:4:4215 +7:4:4215 +8:4:4218 +9:4:4224 +10:4:4228 +11:4:4228 +12:4:4231 +13:4:4239 +14:4:4243 +15:4:4244 +16:0:4249 +17:4:4246 +18:0:4249 +19:3:1991 +20:0:4249 +21:3:1997 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b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.log b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.log new file mode 100644 index 0000000..5eb694e --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.log @@ -0,0 +1,280 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10519, errors: 0 + 20146 states, stored + 191615 states, matched + 211761 transitions (= stored+matched) + 711676 atomic steps +hash conflicts: 1222 (resolved) + +Stats on memory usage (in Megabytes): + 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.509 actual memory usage for states (compression: 93.51%) + state-vector as stored = 51 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.229 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 174, "pan.___", state 257, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 658, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 660, "(1)" + line 182, "pan.___", state 661, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 661, "else" + line 174, "pan.___", state 671, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 693, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 174, "pan.___", state 710, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 712, "(1)" + line 178, "pan.___", state 719, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 721, "(1)" + line 178, "pan.___", state 722, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 722, "else" + line 176, "pan.___", state 727, "((j<1))" + line 176, "pan.___", state 727, "((j>=1))" + line 182, "pan.___", state 732, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 734, "(1)" + line 182, "pan.___", state 735, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 735, "else" + line 192, "pan.___", state 740, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 192, "pan.___", state 740, "else" + line 220, "pan.___", state 741, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 741, "else" + line 355, "pan.___", state 747, "((sighand_exec==1))" + line 355, "pan.___", state 747, "else" + line 361, "pan.___", state 750, "sighand_exec = 1" + line 398, "pan.___", state 763, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 765, "(1)" + line 398, "pan.___", state 766, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 766, "else" + line 398, "pan.___", state 769, "(1)" + line 402, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 779, "(1)" + line 402, "pan.___", state 780, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 780, "else" + line 402, "pan.___", state 783, "(1)" + line 402, "pan.___", state 784, "(1)" + line 402, "pan.___", state 784, "(1)" + line 400, "pan.___", state 789, "((i<1))" + line 400, "pan.___", state 789, "((i>=1))" + line 407, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 808, "(1)" + line 408, "pan.___", state 809, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 809, "else" + line 408, "pan.___", state 812, "(1)" + line 408, "pan.___", state 813, "(1)" + line 408, "pan.___", state 813, "(1)" + line 412, "pan.___", state 821, "(1)" + line 412, "pan.___", state 822, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 822, "else" + line 412, "pan.___", state 825, "(1)" + line 412, "pan.___", state 826, "(1)" + line 412, "pan.___", state 826, "(1)" + line 410, "pan.___", state 831, "((i<1))" + line 410, "pan.___", state 831, "((i>=1))" + line 417, "pan.___", state 838, "(1)" + line 417, "pan.___", state 839, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 839, "else" + line 417, "pan.___", state 842, "(1)" + line 417, "pan.___", state 843, "(1)" + line 417, "pan.___", state 843, "(1)" + line 419, "pan.___", state 846, "(1)" + line 419, "pan.___", state 846, "(1)" + line 361, "pan.___", state 855, "sighand_exec = 1" + line 402, "pan.___", state 886, "(1)" + line 407, "pan.___", state 902, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 945, "(1)" + line 402, "pan.___", state 983, "(1)" + line 407, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1042, "(1)" + line 398, "pan.___", state 1068, "(1)" + line 402, "pan.___", state 1082, "(1)" + line 407, "pan.___", state 1098, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1141, "(1)" + line 402, "pan.___", state 1182, "(1)" + line 407, "pan.___", state 1198, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1241, "(1)" + line 174, "pan.___", state 1262, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1264, "(1)" + line 178, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1273, "(1)" + line 178, "pan.___", state 1274, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1274, "else" + line 176, "pan.___", state 1279, "((j<1))" + line 176, "pan.___", state 1279, "((j>=1))" + line 182, "pan.___", state 1284, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 1286, "(1)" + line 182, "pan.___", state 1287, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 1287, "else" + line 174, "pan.___", state 1297, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 174, "pan.___", state 1336, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1338, "(1)" + line 178, "pan.___", state 1345, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1347, "(1)" + line 178, "pan.___", state 1348, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1348, "else" + line 176, "pan.___", state 1353, "((j<1))" + line 176, "pan.___", state 1353, "((j>=1))" + line 182, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 1360, "(1)" + line 182, "pan.___", state 1361, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 1361, "else" + line 192, "pan.___", state 1366, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 192, "pan.___", state 1366, "else" + line 220, "pan.___", state 1367, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 1367, "else" + line 355, "pan.___", state 1373, "((sighand_exec==1))" + line 355, "pan.___", state 1373, "else" + line 361, "pan.___", state 1376, "sighand_exec = 1" + line 398, "pan.___", state 1389, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1391, "(1)" + line 398, "pan.___", state 1392, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1392, "else" + line 398, "pan.___", state 1395, "(1)" + line 402, "pan.___", state 1403, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1405, "(1)" + line 402, "pan.___", state 1406, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1406, "else" + line 402, "pan.___", state 1409, "(1)" + line 402, "pan.___", state 1410, "(1)" + line 402, "pan.___", state 1410, "(1)" + line 400, "pan.___", state 1415, "((i<1))" + line 400, "pan.___", state 1415, "((i>=1))" + line 407, "pan.___", state 1421, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1434, "(1)" + line 408, "pan.___", state 1435, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1435, "else" + line 408, "pan.___", state 1438, "(1)" + line 408, "pan.___", state 1439, "(1)" + line 408, "pan.___", state 1439, "(1)" + line 412, "pan.___", state 1447, "(1)" + line 412, "pan.___", state 1448, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1448, "else" + line 412, "pan.___", state 1451, "(1)" + line 412, "pan.___", state 1452, "(1)" + line 412, "pan.___", state 1452, "(1)" + line 410, "pan.___", state 1457, "((i<1))" + line 410, "pan.___", state 1457, "((i>=1))" + line 417, "pan.___", state 1464, "(1)" + line 417, "pan.___", state 1465, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1465, "else" + line 417, "pan.___", state 1468, "(1)" + line 417, "pan.___", state 1469, "(1)" + line 417, "pan.___", state 1469, "(1)" + line 419, "pan.___", state 1472, "(1)" + line 419, "pan.___", state 1472, "(1)" + line 361, "pan.___", state 1481, "sighand_exec = 1" + line 178, "pan.___", state 1506, "(1)" + line 182, "pan.___", state 1517, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1530, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..8219815 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1805 @@ +-2:4:-2 +-4:-4:-4 +1:0:2905 +2:4:2857 +3:4:2860 +4:4:2860 +5:4:2863 +6:4:2871 +7:4:2871 +8:4:2874 +9:4:2880 +10:4:2884 +11:4:2884 +12:4:2887 +13:4:2895 +14:4:2899 +15:4:2900 +16:0:2905 +17:4:2902 +18:0:2905 +19:3:1319 +20:0:2905 +21:3:1325 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+1801:3:2851 +1802:0:2909 +1803:3:1630 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.define b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.log b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.log new file mode 100644 index 0000000..a346ed9 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.log @@ -0,0 +1,224 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10499, errors: 0 + 159431 states, stored + 1505398 states, matched + 1664829 transitions (= stored+matched) + 5794809 atomic steps +hash conflicts: 62144 (resolved) + +Stats on memory usage (in Megabytes): + 12.772 equivalent memory usage for states (stored*(State-vector + overhead)) + 8.936 actual memory usage for states (compression: 69.96%) + state-vector as stored = 31 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 474.651 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 651, "pan.___", state 213, "(1)" + line 402, "pan.___", state 348, "(1)" + line 398, "pan.___", state 433, "(1)" + line 402, "pan.___", state 447, "(1)" + line 402, "pan.___", state 547, "(1)" + line 159, "pan.___", state 628, "(1)" + line 163, "pan.___", state 636, "(1)" + line 163, "pan.___", state 637, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 637, "else" + line 161, "pan.___", state 642, "((j<1))" + line 161, "pan.___", state 642, "((j>=1))" + line 167, "pan.___", state 648, "(1)" + line 167, "pan.___", state 649, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 649, "else" + line 159, "pan.___", state 660, "(1)" + line 163, "pan.___", state 668, "(1)" + line 163, "pan.___", state 669, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 167, "pan.___", state 680, "(1)" + line 167, "pan.___", state 681, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 696, "(1)" + line 163, "pan.___", state 704, "(1)" + line 163, "pan.___", state 705, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 705, "else" + line 161, "pan.___", state 710, "((j<1))" + line 161, "pan.___", state 710, "((j>=1))" + line 167, "pan.___", state 716, "(1)" + line 167, "pan.___", state 717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 717, "else" + line 201, "pan.___", state 722, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 201, "pan.___", state 722, "else" + line 220, "pan.___", state 723, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 220, "pan.___", state 723, "else" + line 355, "pan.___", state 729, "((sighand_exec==1))" + line 355, "pan.___", state 729, "else" + line 361, "pan.___", state 732, "sighand_exec = 1" + line 398, "pan.___", state 745, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 747, "(1)" + line 398, "pan.___", state 748, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 748, "else" + line 398, "pan.___", state 751, "(1)" + line 402, "pan.___", state 759, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 761, "(1)" + line 402, "pan.___", state 762, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 762, "else" + line 402, "pan.___", state 765, "(1)" + line 402, "pan.___", state 766, "(1)" + line 402, "pan.___", state 766, "(1)" + line 400, "pan.___", state 771, "((i<1))" + line 400, "pan.___", state 771, "((i>=1))" + line 407, "pan.___", state 777, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 790, "(1)" + line 408, "pan.___", state 791, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 791, "else" + line 408, "pan.___", state 794, "(1)" + line 408, "pan.___", state 795, "(1)" + line 408, "pan.___", state 795, "(1)" + line 412, "pan.___", state 803, "(1)" + line 412, "pan.___", state 804, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 804, "else" + line 412, "pan.___", state 807, "(1)" + line 412, "pan.___", state 808, "(1)" + line 412, "pan.___", state 808, "(1)" + line 410, "pan.___", state 813, "((i<1))" + line 410, "pan.___", state 813, "((i>=1))" + line 417, "pan.___", state 820, "(1)" + line 417, "pan.___", state 821, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 821, "else" + line 417, "pan.___", state 824, "(1)" + line 417, "pan.___", state 825, "(1)" + line 417, "pan.___", state 825, "(1)" + line 419, "pan.___", state 828, "(1)" + line 419, "pan.___", state 828, "(1)" + line 361, "pan.___", state 837, "sighand_exec = 1" + line 402, "pan.___", state 868, "(1)" + line 402, "pan.___", state 965, "(1)" + line 398, "pan.___", state 1050, "(1)" + line 402, "pan.___", state 1064, "(1)" + line 402, "pan.___", state 1164, "(1)" + line 159, "pan.___", state 1245, "(1)" + line 163, "pan.___", state 1253, "(1)" + line 163, "pan.___", state 1254, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1254, "else" + line 161, "pan.___", state 1259, "((j<1))" + line 161, "pan.___", state 1259, "((j>=1))" + line 167, "pan.___", state 1265, "(1)" + line 167, "pan.___", state 1266, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1266, "else" + line 159, "pan.___", state 1277, "(1)" + line 163, "pan.___", state 1285, "(1)" + line 163, "pan.___", state 1286, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 167, "pan.___", state 1297, "(1)" + line 167, "pan.___", state 1298, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 1313, "(1)" + line 163, "pan.___", state 1321, "(1)" + line 163, "pan.___", state 1322, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1322, "else" + line 161, "pan.___", state 1327, "((j<1))" + line 161, "pan.___", state 1327, "((j>=1))" + line 167, "pan.___", state 1333, "(1)" + line 167, "pan.___", state 1334, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1334, "else" + line 201, "pan.___", state 1339, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 201, "pan.___", state 1339, "else" + line 220, "pan.___", state 1340, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 220, "pan.___", state 1340, "else" + line 355, "pan.___", state 1346, "((sighand_exec==1))" + line 355, "pan.___", state 1346, "else" + line 361, "pan.___", state 1349, "sighand_exec = 1" + line 398, "pan.___", state 1362, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1364, "(1)" + line 398, "pan.___", state 1365, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1365, "else" + line 398, "pan.___", state 1368, "(1)" + line 402, "pan.___", state 1376, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1378, "(1)" + line 402, "pan.___", state 1379, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1379, "else" + line 402, "pan.___", state 1382, "(1)" + line 402, "pan.___", state 1383, "(1)" + line 402, "pan.___", state 1383, "(1)" + line 400, "pan.___", state 1388, "((i<1))" + line 400, "pan.___", state 1388, "((i>=1))" + line 407, "pan.___", state 1394, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1407, "(1)" + line 408, "pan.___", state 1408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1408, "else" + line 408, "pan.___", state 1411, "(1)" + line 408, "pan.___", state 1412, "(1)" + line 408, "pan.___", state 1412, "(1)" + line 412, "pan.___", state 1420, "(1)" + line 412, "pan.___", state 1421, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1421, "else" + line 412, "pan.___", state 1424, "(1)" + line 412, "pan.___", state 1425, "(1)" + line 412, "pan.___", state 1425, "(1)" + line 410, "pan.___", state 1430, "((i<1))" + line 410, "pan.___", state 1430, "((i>=1))" + line 417, "pan.___", state 1437, "(1)" + line 417, "pan.___", state 1438, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1438, "else" + line 417, "pan.___", state 1441, "(1)" + line 417, "pan.___", state 1442, "(1)" + line 417, "pan.___", state 1442, "(1)" + line 419, "pan.___", state 1445, "(1)" + line 419, "pan.___", state 1445, "(1)" + line 361, "pan.___", state 1454, "sighand_exec = 1" + line 701, "pan.___", state 1596, "-end-" + (111 of 1596 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 747, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.23 seconds +pan: rate 129618.7 states/second +pan: avg transition delay 7.3881e-07 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..808154e --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input @@ -0,0 +1,722 @@ +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..522df0a --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1677 @@ +-2:4:-2 +-4:-4:-4 +1:0:2833 +2:4:2785 +3:4:2788 +4:4:2788 +5:4:2791 +6:4:2799 +7:4:2799 +8:4:2802 +9:4:2808 +10:4:2812 +11:4:2812 +12:4:2815 +13:4:2823 +14:4:2827 +15:4:2828 +16:0:2833 +17:4:2830 +18:0:2833 +19:3:1283 +20:0:2833 +21:3:1289 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+1646:3:2696 +1647:3:2703 +1648:3:2706 +1649:3:2707 +1650:3:2711 +1651:3:2716 +1652:0:2833 +1653:3:2727 +1654:0:2833 +1655:3:2732 +1656:3:2739 +1657:3:2740 +1658:3:2747 +1659:3:2752 +1660:0:2833 +1661:3:2767 +1662:0:2833 +1663:3:2769 +1664:0:2833 +1665:3:2770 +1666:0:2833 +1667:3:2773 +1668:0:2833 +1669:3:2778 +1670:0:2833 +1671:2:1071 +1672:0:2831 +1673:3:2779 +1674:0:2837 +1675:1:288 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.define b/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.log b/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.log new file mode 100644 index 0000000..f854175 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.log @@ -0,0 +1,224 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 6934, errors: 0 + 7626 states, stored + 67235 states, matched + 74861 transitions (= stored+matched) + 248896 atomic steps +hash conflicts: 113 (resolved) + +Stats on memory usage (in Megabytes): + 0.611 equivalent memory usage for states (stored*(State-vector + overhead)) + 0.867 actual memory usage for states (unsuccessful compression: 141.88%) + state-vector as stored = 91 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 466.545 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 159, "pan.___", state 254, "(1)" + line 163, "pan.___", state 262, "(1)" + line 167, "pan.___", state 274, "(1)" + line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 752, "(1)" + line 163, "pan.___", state 760, "(1)" + line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 761, "else" + line 161, "pan.___", state 766, "((j<1))" + line 161, "pan.___", state 766, "((j>=1))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 773, "else" + line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 776, "else" + line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 835, "(1)" + line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 852, "(1)" + line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 861, "(1)" + line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 862, "else" + line 176, "pan.___", state 867, "((j<1))" + line 176, "pan.___", state 867, "((j>=1))" + line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 882, "(1)" + line 163, "pan.___", state 890, "(1)" + line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 891, "else" + line 161, "pan.___", state 896, "((j<1))" + line 161, "pan.___", state 896, "((j>=1))" + line 167, "pan.___", state 902, "(1)" + line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 903, "else" + line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 906, "else" + line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 908, "else" + line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 909, "else" + line 355, "pan.___", state 915, "((sighand_exec==1))" + line 355, "pan.___", state 915, "else" + line 361, "pan.___", state 918, "sighand_exec = 1" + line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 933, "(1)" + line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 934, "else" + line 398, "pan.___", state 937, "(1)" + line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 947, "(1)" + line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 948, "else" + line 402, "pan.___", state 951, "(1)" + line 402, "pan.___", state 952, "(1)" + line 402, "pan.___", state 952, "(1)" + line 400, "pan.___", state 957, "((i<1))" + line 400, "pan.___", state 957, "((i>=1))" + line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 976, "(1)" + line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 977, "else" + line 408, "pan.___", state 980, "(1)" + line 408, "pan.___", state 981, "(1)" + line 408, "pan.___", state 981, "(1)" + line 412, "pan.___", state 989, "(1)" + line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 990, "else" + line 412, "pan.___", state 993, "(1)" + line 412, "pan.___", state 994, "(1)" + line 412, "pan.___", state 994, "(1)" + line 410, "pan.___", state 999, "((i<1))" + line 410, "pan.___", state 999, "((i>=1))" + line 417, "pan.___", state 1006, "(1)" + line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1007, "else" + line 417, "pan.___", state 1010, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 361, "pan.___", state 1023, "sighand_exec = 1" + line 178, "pan.___", state 1048, "(1)" + line 182, "pan.___", state 1059, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1069, "(1)" + line 163, "pan.___", state 1077, "(1)" + line 167, "pan.___", state 1089, "(1)" + line 174, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..84cf653 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1379 @@ +-2:4:-2 +-4:-4:-4 +1:0:2904 +2:4:2856 +3:4:2859 +4:4:2859 +5:4:2862 +6:4:2870 +7:4:2870 +8:4:2873 +9:4:2879 +10:4:2883 +11:4:2883 +12:4:2886 +13:4:2894 +14:4:2898 +15:4:2899 +16:0:2904 +17:4:2901 +18:0:2904 +19:3:1655 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+1336:3:2717 +1337:3:2718 +1338:3:2722 +1339:3:2730 +1340:3:2731 +1341:3:2736 +1342:3:2743 +1343:3:2744 +1344:3:2751 +1345:3:2756 +1346:0:2904 +1347:3:2767 +1348:0:2904 +1349:3:2775 +1350:3:2776 +1351:3:2780 +1352:3:2784 +1353:3:2785 +1354:3:2789 +1355:3:2797 +1356:3:2798 +1357:3:2803 +1358:3:2810 +1359:3:2811 +1360:3:2818 +1361:3:2823 +1362:0:2904 +1363:3:2838 +1364:0:2904 +1365:3:2840 +1366:0:2904 +1367:3:2841 +1368:0:2904 +1369:3:2844 +1370:0:2904 +1371:3:2849 +1372:0:2904 +1373:2:1350 +1374:0:2902 +1375:3:2850 +1376:0:2908 +1377:1:296 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress.ltl b/urcu-nosched-model/result-signal-over-writer/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.define b/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.log b/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.log new file mode 100644 index 0000000..a1a6122 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.log @@ -0,0 +1,348 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) +depth 12: Claim reached state 9 (line 747) +depth 86: Claim reached state 9 (line 746) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10679, errors: 0 + 38182 states, stored (88898 visited) + 997091 states, matched + 1085989 transitions (= visited+matched) + 3694897 atomic steps +hash conflicts: 9602 (resolved) + +Stats on memory usage (in Megabytes): + 3.059 equivalent memory usage for states (stored*(State-vector + overhead)) + 2.930 actual memory usage for states (compression: 95.79%) + state-vector as stored = 52 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 468.596 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 159, "pan.___", state 254, "(1)" + line 163, "pan.___", state 262, "(1)" + line 167, "pan.___", state 274, "(1)" + line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 752, "(1)" + line 163, "pan.___", state 760, "(1)" + line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 761, "else" + line 161, "pan.___", state 766, "((j<1))" + line 161, "pan.___", state 766, "((j>=1))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 773, "else" + line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 776, "else" + line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 835, "(1)" + line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 852, "(1)" + line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 861, "(1)" + line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 862, "else" + line 176, "pan.___", state 867, "((j<1))" + line 176, "pan.___", state 867, "((j>=1))" + line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 882, "(1)" + line 163, "pan.___", state 890, "(1)" + line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 891, "else" + line 161, "pan.___", state 896, "((j<1))" + line 161, "pan.___", state 896, "((j>=1))" + line 167, "pan.___", state 902, "(1)" + line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 903, "else" + line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 906, "else" + line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 908, "else" + line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 909, "else" + line 355, "pan.___", state 915, "((sighand_exec==1))" + line 355, "pan.___", state 915, "else" + line 361, "pan.___", state 918, "sighand_exec = 1" + line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 933, "(1)" + line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 934, "else" + line 398, "pan.___", state 937, "(1)" + line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 947, "(1)" + line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 948, "else" + line 402, "pan.___", state 951, "(1)" + line 402, "pan.___", state 952, "(1)" + line 402, "pan.___", state 952, "(1)" + line 400, "pan.___", state 957, "((i<1))" + line 400, "pan.___", state 957, "((i>=1))" + line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 976, "(1)" + line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 977, "else" + line 408, "pan.___", state 980, "(1)" + line 408, "pan.___", state 981, "(1)" + line 408, "pan.___", state 981, "(1)" + line 412, "pan.___", state 989, "(1)" + line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 990, "else" + line 412, "pan.___", state 993, "(1)" + line 412, "pan.___", state 994, "(1)" + line 412, "pan.___", state 994, "(1)" + line 410, "pan.___", state 999, "((i<1))" + line 410, "pan.___", state 999, "((i>=1))" + line 417, "pan.___", state 1006, "(1)" + line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1007, "else" + line 417, "pan.___", state 1010, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 361, "pan.___", state 1023, "sighand_exec = 1" + line 402, "pan.___", state 1054, "(1)" + line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1113, "(1)" + line 402, "pan.___", state 1151, "(1)" + line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1210, "(1)" + line 398, "pan.___", state 1236, "(1)" + line 402, "pan.___", state 1250, "(1)" + line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1309, "(1)" + line 402, "pan.___", state 1350, "(1)" + line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1409, "(1)" + line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1432, "(1)" + line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1441, "(1)" + line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1442, "else" + line 176, "pan.___", state 1447, "((j<1))" + line 176, "pan.___", state 1447, "((j>=1))" + line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1462, "(1)" + line 163, "pan.___", state 1470, "(1)" + line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1471, "else" + line 161, "pan.___", state 1476, "((j<1))" + line 161, "pan.___", state 1476, "((j>=1))" + line 167, "pan.___", state 1482, "(1)" + line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1483, "else" + line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1486, "else" + line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 1545, "(1)" + line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1562, "(1)" + line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1571, "(1)" + line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1572, "else" + line 176, "pan.___", state 1577, "((j<1))" + line 176, "pan.___", state 1577, "((j>=1))" + line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1592, "(1)" + line 163, "pan.___", state 1600, "(1)" + line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1601, "else" + line 161, "pan.___", state 1606, "((j<1))" + line 161, "pan.___", state 1606, "((j>=1))" + line 167, "pan.___", state 1612, "(1)" + line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1613, "else" + line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1616, "else" + line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 1618, "else" + line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 1619, "else" + line 355, "pan.___", state 1625, "((sighand_exec==1))" + line 355, "pan.___", state 1625, "else" + line 361, "pan.___", state 1628, "sighand_exec = 1" + line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1643, "(1)" + line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1644, "else" + line 398, "pan.___", state 1647, "(1)" + line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1657, "(1)" + line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1658, "else" + line 402, "pan.___", state 1661, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 400, "pan.___", state 1667, "((i<1))" + line 400, "pan.___", state 1667, "((i>=1))" + line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1686, "(1)" + line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1687, "else" + line 408, "pan.___", state 1690, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 412, "pan.___", state 1699, "(1)" + line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1700, "else" + line 412, "pan.___", state 1703, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 410, "pan.___", state 1709, "((i<1))" + line 410, "pan.___", state 1709, "((i>=1))" + line 417, "pan.___", state 1716, "(1)" + line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1717, "else" + line 417, "pan.___", state 1720, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 361, "pan.___", state 1733, "sighand_exec = 1" + line 178, "pan.___", state 1758, "(1)" + line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1779, "(1)" + line 163, "pan.___", state 1787, "(1)" + line 167, "pan.___", state 1799, "(1)" + line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..7c42af1 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_reader.spin.input.trail @@ -0,0 +1,1270 @@ +-2:4:-2 +-4:-4:-4 +1:0:4401 +2:4:4353 +3:4:4356 +4:4:4356 +5:4:4359 +6:4:4367 +7:4:4367 +8:4:4370 +9:4:4376 +10:4:4380 +11:4:4380 +12:4:4383 +13:4:4391 +14:4:4395 +15:4:4396 +16:0:4401 +17:4:4398 +18:0:4401 +19:3:2479 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+1255:3:4347 +1256:0:4405 +1257:3:4346 +1258:0:4405 +1259:2:1348 +1260:0:4405 +1261:3:4347 +1262:0:4405 +1263:2:1347 +1264:0:4405 +1265:3:4346 +1266:0:4405 +1267:1:104 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.define b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.log b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.log new file mode 100644 index 0000000..02c53cf --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.log @@ -0,0 +1,348 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) +depth 12: Claim reached state 9 (line 747) +depth 28: Claim reached state 9 (line 746) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10679, errors: 0 + 38555 states, stored (92500 visited) + 1044204 states, matched + 1136704 transitions (= visited+matched) + 3867169 atomic steps +hash conflicts: 8572 (resolved) + +Stats on memory usage (in Megabytes): + 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) + 2.930 actual memory usage for states (compression: 94.87%) + state-vector as stored = 52 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 468.596 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 159, "pan.___", state 254, "(1)" + line 163, "pan.___", state 262, "(1)" + line 167, "pan.___", state 274, "(1)" + line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 752, "(1)" + line 163, "pan.___", state 760, "(1)" + line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 761, "else" + line 161, "pan.___", state 766, "((j<1))" + line 161, "pan.___", state 766, "((j>=1))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 773, "else" + line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 776, "else" + line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 835, "(1)" + line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 852, "(1)" + line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 861, "(1)" + line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 862, "else" + line 176, "pan.___", state 867, "((j<1))" + line 176, "pan.___", state 867, "((j>=1))" + line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 882, "(1)" + line 163, "pan.___", state 890, "(1)" + line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 891, "else" + line 161, "pan.___", state 896, "((j<1))" + line 161, "pan.___", state 896, "((j>=1))" + line 167, "pan.___", state 902, "(1)" + line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 903, "else" + line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 906, "else" + line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 908, "else" + line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 909, "else" + line 355, "pan.___", state 915, "((sighand_exec==1))" + line 355, "pan.___", state 915, "else" + line 361, "pan.___", state 918, "sighand_exec = 1" + line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 933, "(1)" + line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 934, "else" + line 398, "pan.___", state 937, "(1)" + line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 947, "(1)" + line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 948, "else" + line 402, "pan.___", state 951, "(1)" + line 402, "pan.___", state 952, "(1)" + line 402, "pan.___", state 952, "(1)" + line 400, "pan.___", state 957, "((i<1))" + line 400, "pan.___", state 957, "((i>=1))" + line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 976, "(1)" + line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 977, "else" + line 408, "pan.___", state 980, "(1)" + line 408, "pan.___", state 981, "(1)" + line 408, "pan.___", state 981, "(1)" + line 412, "pan.___", state 989, "(1)" + line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 990, "else" + line 412, "pan.___", state 993, "(1)" + line 412, "pan.___", state 994, "(1)" + line 412, "pan.___", state 994, "(1)" + line 410, "pan.___", state 999, "((i<1))" + line 410, "pan.___", state 999, "((i>=1))" + line 417, "pan.___", state 1006, "(1)" + line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1007, "else" + line 417, "pan.___", state 1010, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 361, "pan.___", state 1023, "sighand_exec = 1" + line 402, "pan.___", state 1054, "(1)" + line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1113, "(1)" + line 402, "pan.___", state 1151, "(1)" + line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1210, "(1)" + line 398, "pan.___", state 1236, "(1)" + line 402, "pan.___", state 1250, "(1)" + line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1309, "(1)" + line 402, "pan.___", state 1350, "(1)" + line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1409, "(1)" + line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1432, "(1)" + line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1441, "(1)" + line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1442, "else" + line 176, "pan.___", state 1447, "((j<1))" + line 176, "pan.___", state 1447, "((j>=1))" + line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1462, "(1)" + line 163, "pan.___", state 1470, "(1)" + line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1471, "else" + line 161, "pan.___", state 1476, "((j<1))" + line 161, "pan.___", state 1476, "((j>=1))" + line 167, "pan.___", state 1482, "(1)" + line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1483, "else" + line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1486, "else" + line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 1545, "(1)" + line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1562, "(1)" + line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1571, "(1)" + line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1572, "else" + line 176, "pan.___", state 1577, "((j<1))" + line 176, "pan.___", state 1577, "((j>=1))" + line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1592, "(1)" + line 163, "pan.___", state 1600, "(1)" + line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1601, "else" + line 161, "pan.___", state 1606, "((j<1))" + line 161, "pan.___", state 1606, "((j>=1))" + line 167, "pan.___", state 1612, "(1)" + line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1613, "else" + line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1616, "else" + line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 1618, "else" + line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 1619, "else" + line 355, "pan.___", state 1625, "((sighand_exec==1))" + line 355, "pan.___", state 1625, "else" + line 361, "pan.___", state 1628, "sighand_exec = 1" + line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1643, "(1)" + line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1644, "else" + line 398, "pan.___", state 1647, "(1)" + line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1657, "(1)" + line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1658, "else" + line 402, "pan.___", state 1661, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 400, "pan.___", state 1667, "((i<1))" + line 400, "pan.___", state 1667, "((i>=1))" + line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1686, "(1)" + line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1687, "else" + line 408, "pan.___", state 1690, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 412, "pan.___", state 1699, "(1)" + line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1700, "else" + line 412, "pan.___", state 1703, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 410, "pan.___", state 1709, "((i<1))" + line 410, "pan.___", state 1709, "((i>=1))" + line 417, "pan.___", state 1716, "(1)" + line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1717, "else" + line 417, "pan.___", state 1720, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 361, "pan.___", state 1733, "sighand_exec = 1" + line 178, "pan.___", state 1758, "(1)" + line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1779, "(1)" + line 163, "pan.___", state 1787, "(1)" + line 167, "pan.___", state 1799, "(1)" + line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.define b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.log b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.log new file mode 100644 index 0000000..cd4e32b --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.log @@ -0,0 +1,286 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) +depth 12: Claim reached state 9 (line 748) +depth 28: Claim reached state 9 (line 747) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10679, errors: 0 + 38555 states, stored (92500 visited) + 1044204 states, matched + 1136704 transitions (= visited+matched) + 3867169 atomic steps +hash conflicts: 6390 (resolved) + +Stats on memory usage (in Megabytes): + 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) + 2.767 actual memory usage for states (compression: 89.58%) + state-vector as stored = 47 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 468.498 total actual memory usage + +unreached in proctype urcu_reader_sig + line 403, "pan.___", state 330, "(1)" + line 614, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 59, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 409, "pan.___", state 160, "(1)" + line 652, "pan.___", state 213, "(1)" + line 175, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 179, "pan.___", state 233, "(1)" + line 160, "pan.___", state 254, "(1)" + line 164, "pan.___", state 262, "(1)" + line 168, "pan.___", state 274, "(1)" + line 175, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 753, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 766, "(1)" + line 409, "pan.___", state 767, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 767, "else" + line 409, "pan.___", state 770, "(1)" + line 409, "pan.___", state 771, "(1)" + line 409, "pan.___", state 771, "(1)" + line 413, "pan.___", state 779, "(1)" + line 413, "pan.___", state 780, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 780, "else" + line 413, "pan.___", state 783, "(1)" + line 413, "pan.___", state 784, "(1)" + line 413, "pan.___", state 784, "(1)" + line 411, "pan.___", state 789, "((i<1))" + line 411, "pan.___", state 789, "((i>=1))" + line 418, "pan.___", state 796, "(1)" + line 418, "pan.___", state 797, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 797, "else" + line 418, "pan.___", state 800, "(1)" + line 418, "pan.___", state 801, "(1)" + line 418, "pan.___", state 801, "(1)" + line 420, "pan.___", state 804, "(1)" + line 420, "pan.___", state 804, "(1)" + line 356, "pan.___", state 810, "((sighand_exec==1))" + line 356, "pan.___", state 810, "else" + line 362, "pan.___", state 813, "sighand_exec = 1" + line 399, "pan.___", state 826, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 828, "(1)" + line 399, "pan.___", state 829, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 829, "else" + line 399, "pan.___", state 832, "(1)" + line 403, "pan.___", state 840, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 842, "(1)" + line 403, "pan.___", state 843, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 843, "else" + line 403, "pan.___", state 846, "(1)" + line 403, "pan.___", state 847, "(1)" + line 403, "pan.___", state 847, "(1)" + line 401, "pan.___", state 852, "((i<1))" + line 401, "pan.___", state 852, "((i>=1))" + line 408, "pan.___", state 858, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 871, "(1)" + line 409, "pan.___", state 872, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 872, "else" + line 409, "pan.___", state 875, "(1)" + line 409, "pan.___", state 876, "(1)" + line 409, "pan.___", state 876, "(1)" + line 413, "pan.___", state 884, "(1)" + line 413, "pan.___", state 885, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 885, "else" + line 413, "pan.___", state 888, "(1)" + line 413, "pan.___", state 889, "(1)" + line 413, "pan.___", state 889, "(1)" + line 411, "pan.___", state 894, "((i<1))" + line 411, "pan.___", state 894, "((i>=1))" + line 418, "pan.___", state 901, "(1)" + line 418, "pan.___", state 902, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 902, "else" + line 418, "pan.___", state 905, "(1)" + line 418, "pan.___", state 906, "(1)" + line 418, "pan.___", state 906, "(1)" + line 420, "pan.___", state 909, "(1)" + line 420, "pan.___", state 909, "(1)" + line 362, "pan.___", state 918, "sighand_exec = 1" + line 403, "pan.___", state 949, "(1)" + line 408, "pan.___", state 965, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1008, "(1)" + line 403, "pan.___", state 1046, "(1)" + line 408, "pan.___", state 1062, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1105, "(1)" + line 399, "pan.___", state 1131, "(1)" + line 403, "pan.___", state 1145, "(1)" + line 408, "pan.___", state 1161, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1204, "(1)" + line 403, "pan.___", state 1245, "(1)" + line 408, "pan.___", state 1261, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1304, "(1)" + line 399, "pan.___", state 1326, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1328, "(1)" + line 399, "pan.___", state 1329, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1329, "else" + line 399, "pan.___", state 1332, "(1)" + line 403, "pan.___", state 1340, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1342, "(1)" + line 403, "pan.___", state 1343, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1343, "else" + line 403, "pan.___", state 1346, "(1)" + line 403, "pan.___", state 1347, "(1)" + line 403, "pan.___", state 1347, "(1)" + line 401, "pan.___", state 1352, "((i<1))" + line 401, "pan.___", state 1352, "((i>=1))" + line 408, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1371, "(1)" + line 409, "pan.___", state 1372, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1372, "else" + line 409, "pan.___", state 1375, "(1)" + line 409, "pan.___", state 1376, "(1)" + line 409, "pan.___", state 1376, "(1)" + line 413, "pan.___", state 1384, "(1)" + line 413, "pan.___", state 1385, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1385, "else" + line 413, "pan.___", state 1388, "(1)" + line 413, "pan.___", state 1389, "(1)" + line 413, "pan.___", state 1389, "(1)" + line 411, "pan.___", state 1394, "((i<1))" + line 411, "pan.___", state 1394, "((i>=1))" + line 418, "pan.___", state 1401, "(1)" + line 418, "pan.___", state 1402, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1402, "else" + line 418, "pan.___", state 1405, "(1)" + line 418, "pan.___", state 1406, "(1)" + line 418, "pan.___", state 1406, "(1)" + line 420, "pan.___", state 1409, "(1)" + line 420, "pan.___", state 1409, "(1)" + line 356, "pan.___", state 1415, "((sighand_exec==1))" + line 356, "pan.___", state 1415, "else" + line 362, "pan.___", state 1418, "sighand_exec = 1" + line 399, "pan.___", state 1431, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1433, "(1)" + line 399, "pan.___", state 1434, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1434, "else" + line 399, "pan.___", state 1437, "(1)" + line 403, "pan.___", state 1445, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1447, "(1)" + line 403, "pan.___", state 1448, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1448, "else" + line 403, "pan.___", state 1451, "(1)" + line 403, "pan.___", state 1452, "(1)" + line 403, "pan.___", state 1452, "(1)" + line 401, "pan.___", state 1457, "((i<1))" + line 401, "pan.___", state 1457, "((i>=1))" + line 408, "pan.___", state 1463, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1476, "(1)" + line 409, "pan.___", state 1477, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1477, "else" + line 409, "pan.___", state 1480, "(1)" + line 409, "pan.___", state 1481, "(1)" + line 409, "pan.___", state 1481, "(1)" + line 413, "pan.___", state 1489, "(1)" + line 413, "pan.___", state 1490, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1490, "else" + line 413, "pan.___", state 1493, "(1)" + line 413, "pan.___", state 1494, "(1)" + line 413, "pan.___", state 1494, "(1)" + line 411, "pan.___", state 1499, "((i<1))" + line 411, "pan.___", state 1499, "((i>=1))" + line 418, "pan.___", state 1506, "(1)" + line 418, "pan.___", state 1507, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1507, "else" + line 418, "pan.___", state 1510, "(1)" + line 418, "pan.___", state 1511, "(1)" + line 418, "pan.___", state 1511, "(1)" + line 420, "pan.___", state 1514, "(1)" + line 420, "pan.___", state 1514, "(1)" + line 362, "pan.___", state 1523, "sighand_exec = 1" + line 179, "pan.___", state 1548, "(1)" + line 183, "pan.___", state 1559, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 160, "pan.___", state 1569, "(1)" + line 164, "pan.___", state 1577, "(1)" + line 168, "pan.___", state 1589, "(1)" + line 175, "pan.___", state 1600, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..5b0eadd --- /dev/null +++ b/urcu-nosched-model/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,4231 @@ +-2:3:-2 +-4:-4:-4 +1:0:2965 +2:3:2917 +3:3:2920 +4:3:2920 +5:3:2920 +6:3:2923 +7:3:2931 +8:3:2931 +9:3:2931 +10:3:2934 +11:3:2940 +12:3:2944 +13:3:2944 +14:3:2944 +15:3:2947 +16:3:2955 +17:3:2959 +18:3:2960 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+#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu-nosched-model/result-standard-execution-nest/Makefile b/urcu-nosched-model/result-standard-execution-nest/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu-nosched-model/result-standard-execution-nest/asserts.log b/urcu-nosched-model/result-standard-execution-nest/asserts.log new file mode 100644 index 0000000..51f1ac0 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/asserts.log @@ -0,0 +1,250 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 3212 States= 1e+06 Transitions= 1.17e+07 Memory= 519.572 t= 7.66 R= 1e+05 +Depth= 3212 States= 2e+06 Transitions= 2.38e+07 Memory= 572.990 t= 16 R= 1e+05 +Depth= 3212 States= 3e+06 Transitions= 3.62e+07 Memory= 626.408 t= 24.9 R= 1e+05 +pan: resizing hashtable to -w22.. done + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 48 byte, depth reached 3212, errors: 0 + 3539988 states, stored + 39085459 states, matched + 42625447 transitions (= stored+matched) +1.5602888e+08 atomic steps +hash conflicts: 28971442 (resolved) + +Stats on memory usage (in Megabytes): + 256.576 equivalent memory usage for states (stored*(State-vector + overhead)) + 196.718 actual memory usage for states (compression: 76.67%) + state-vector as stored = 30 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 686.338 total actual memory usage + +unreached in proctype urcu_reader + line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 61, "(1)" + line 417, ".input.spin", state 91, "(1)" + line 398, ".input.spin", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 151, "(1)" + line 417, ".input.spin", state 181, "(1)" + line 398, ".input.spin", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 242, "(1)" + line 417, ".input.spin", state 272, "(1)" + line 398, ".input.spin", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 360, "(1)" + line 417, ".input.spin", state 390, "(1)" + line 539, ".input.spin", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 59, "(1)" + line 412, ".input.spin", state 72, "(1)" + line 417, ".input.spin", state 89, "(1)" + line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 153, "(1)" + line 412, ".input.spin", state 166, "(1)" + line 651, ".input.spin", state 199, "(1)" + line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 240, "(1)" + line 163, ".input.spin", state 248, "(1)" + line 167, ".input.spin", state 260, "(1)" + line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 927, "(1)" + line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, ".input.spin", state 928, "else" + line 408, ".input.spin", state 931, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 412, ".input.spin", state 940, "(1)" + line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, ".input.spin", state 941, "else" + line 412, ".input.spin", state 944, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 410, ".input.spin", state 950, "((i<1))" + line 410, ".input.spin", state 950, "((i>=1))" + line 417, ".input.spin", state 957, "(1)" + line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, ".input.spin", state 958, "else" + line 417, ".input.spin", state 961, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1040, "(1)" + line 417, ".input.spin", state 1057, "(1)" + line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1130, "(1)" + line 417, ".input.spin", state 1147, "(1)" + line 398, ".input.spin", state 1166, "(1)" + line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1222, "(1)" + line 417, ".input.spin", state 1239, "(1)" + line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1315, "(1)" + line 417, ".input.spin", state 1332, "(1)" + line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 1378, "(1)" + line 163, ".input.spin", state 1386, "(1)" + line 167, ".input.spin", state 1398, "(1)" + line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 1595, "(1)" + line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, ".input.spin", state 1596, "else" + line 408, ".input.spin", state 1599, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 412, ".input.spin", state 1608, "(1)" + line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, ".input.spin", state 1609, "else" + line 412, ".input.spin", state 1612, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 410, ".input.spin", state 1618, "((i<1))" + line 410, ".input.spin", state 1618, "((i>=1))" + line 417, ".input.spin", state 1625, "(1)" + line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, ".input.spin", state 1626, "else" + line 417, ".input.spin", state 1629, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 1681, "(1)" + line 163, ".input.spin", state 1689, "(1)" + line 167, ".input.spin", state 1701, "(1)" + line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/asserts.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu-nosched-model/result-standard-execution-nest/references.txt b/urcu-nosched-model/result-standard-execution-nest/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu.sh b/urcu-nosched-model/result-standard-execution-nest/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu.spin b/urcu-nosched-model/result-standard-execution-nest/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free.log b/urcu-nosched-model/result-standard-execution-nest/urcu_free.log new file mode 100644 index 0000000..884b15e --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free.log @@ -0,0 +1,262 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) +Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.53 R= 1e+05 +Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.8 R= 1e+05 +Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.5 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 3880 States= 4e+06 Transitions= 4.84e+07 Memory= 741.318 t= 41.1 R= 1e+05 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3880, errors: 0 + 4015564 states, stored + 44539121 states, matched + 48554685 transitions (= stored+matched) +1.7777933e+08 atomic steps +hash conflicts: 33629695 (resolved) + +Stats on memory usage (in Megabytes): + 321.681 equivalent memory usage for states (stored*(State-vector + overhead)) + 252.629 actual memory usage for states (compression: 78.53%) + state-vector as stored = 38 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 742.295 total actual memory usage + +unreached in proctype urcu_reader + line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 61, "(1)" + line 417, "pan.___", state 91, "(1)" + line 398, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 151, "(1)" + line 417, "pan.___", state 181, "(1)" + line 398, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 242, "(1)" + line 417, "pan.___", state 272, "(1)" + line 398, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 360, "(1)" + line 417, "pan.___", state 390, "(1)" + line 539, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 59, "(1)" + line 412, "pan.___", state 72, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 153, "(1)" + line 412, "pan.___", state 166, "(1)" + line 651, "pan.___", state 199, "(1)" + line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 240, "(1)" + line 163, "pan.___", state 248, "(1)" + line 167, "pan.___", state 260, "(1)" + line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 927, "(1)" + line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, "pan.___", state 928, "else" + line 408, "pan.___", state 931, "(1)" + line 408, "pan.___", state 932, "(1)" + line 408, "pan.___", state 932, "(1)" + line 412, "pan.___", state 940, "(1)" + line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, "pan.___", state 941, "else" + line 412, "pan.___", state 944, "(1)" + line 412, "pan.___", state 945, "(1)" + line 412, "pan.___", state 945, "(1)" + line 410, "pan.___", state 950, "((i<1))" + line 410, "pan.___", state 950, "((i>=1))" + line 417, "pan.___", state 957, "(1)" + line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, "pan.___", state 958, "else" + line 417, "pan.___", state 961, "(1)" + line 417, "pan.___", state 962, "(1)" + line 417, "pan.___", state 962, "(1)" + line 419, "pan.___", state 965, "(1)" + line 419, "pan.___", state 965, "(1)" + line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1040, "(1)" + line 417, "pan.___", state 1057, "(1)" + line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1130, "(1)" + line 417, "pan.___", state 1147, "(1)" + line 398, "pan.___", state 1166, "(1)" + line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1222, "(1)" + line 417, "pan.___", state 1239, "(1)" + line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1315, "(1)" + line 417, "pan.___", state 1332, "(1)" + line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1378, "(1)" + line 163, "pan.___", state 1386, "(1)" + line 167, "pan.___", state 1398, "(1)" + line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1595, "(1)" + line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, "pan.___", state 1596, "else" + line 408, "pan.___", state 1599, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 412, "pan.___", state 1608, "(1)" + line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, "pan.___", state 1609, "else" + line 412, "pan.___", state 1612, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 410, "pan.___", state 1618, "((i<1))" + line 410, "pan.___", state 1618, "((i>=1))" + line 417, "pan.___", state 1625, "(1)" + line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, "pan.___", state 1626, "else" + line 417, "pan.___", state 1629, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1681, "(1)" + line 163, "pan.___", state 1689, "(1)" + line 167, "pan.___", state 1701, "(1)" + line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input b/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input new file mode 100644 index 0000000..f2f00e4 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input @@ -0,0 +1,722 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input.trail new file mode 100644 index 0000000..837f3d9 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free.spin.input.trail @@ -0,0 +1,15043 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 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a/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.log b/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.log new file mode 100644 index 0000000..d503334 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.log @@ -0,0 +1,20 @@ +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_nested.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) +Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.48 R= 1e+05 +Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.6 R= 1e+05 +Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.3 R= 1e+05 diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input b/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input new file mode 100644 index 0000000..c94928c --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input @@ -0,0 +1,696 @@ +#define READER_NEST_LEVEL 1 + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE +#define get_pid() ((_pid < 1) -> 0 : 1) +#elif defined(TEST_SIGNAL_ON_READ) +#define get_pid() ((_pid < 2) -> 0 : 1) +#else +#define get_pid() (_pid) +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + dispatch_sighand_read_exec(); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 1; + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input.trail new file mode 100644 index 0000000..6f29ad2 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_nested.spin.input.trail @@ -0,0 +1,11161 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 +25:4:4362 +26:0:4365 +27:3:2331 +28:0:4365 +29:3:2337 +30:0:4365 +31:3:2338 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0000000..136ef67 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.log b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.log new file mode 100644 index 0000000..27a963a --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.log @@ -0,0 +1,267 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +Depth= 11386 States= 1e+06 Transitions= 1.56e+07 Memory= 527.287 t= 12.8 R= 8e+04 +pan: claim violated! (at depth 2146) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 72 byte, depth reached 11386, errors: 1 + 1223588 states, stored + 17987399 states, matched + 19210987 transitions (= stored+matched) + 70012127 atomic steps +hash conflicts: 4173157 (resolved) + +Stats on memory usage (in Megabytes): + 116.690 equivalent memory usage for states (stored*(State-vector + overhead)) + 75.177 actual memory usage for states (compression: 64.42%) + state-vector as stored = 36 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 540.861 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 151, "(1)" + line 419, "pan.___", state 181, "(1)" + line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 242, "(1)" + line 419, "pan.___", state 272, "(1)" + line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 331, "(1)" + line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 360, "(1)" + line 419, "pan.___", state 390, "(1)" + line 541, "pan.___", state 414, "-end-" + (18 of 414 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 421, "pan.___", state 97, "(1)" + line 421, "pan.___", state 97, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 410, "pan.___", state 153, "(1)" + line 414, "pan.___", state 166, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 653, "pan.___", state 199, "(1)" + line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 254, "(1)" + line 414, "pan.___", state 267, "(1)" + line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 345, "(1)" + line 414, "pan.___", state 358, "(1)" + line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 440, "(1)" + line 414, "pan.___", state 453, "(1)" + line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 533, "(1)" + line 414, "pan.___", state 546, "(1)" + line 400, "pan.___", state 582, "(1)" + line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 638, "(1)" + line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 731, "(1)" + line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 821, "(1)" + line 419, "pan.___", state 838, "(1)" + line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 912, "(1)" + line 419, "pan.___", state 929, "(1)" + line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1007, "(1)" + line 419, "pan.___", state 1024, "(1)" + line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1053, "else" + line 400, "pan.___", state 1056, "(1)" + line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1066, "(1)" + line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1067, "else" + line 404, "pan.___", state 1070, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 402, "pan.___", state 1076, "((i<1))" + line 402, "pan.___", state 1076, "((i>=1))" + line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1095, "(1)" + line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1096, "else" + line 410, "pan.___", state 1099, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 414, "pan.___", state 1108, "(1)" + line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1109, "else" + line 414, "pan.___", state 1112, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 412, "pan.___", state 1118, "((i<1))" + line 412, "pan.___", state 1118, "((i>=1))" + line 419, "pan.___", state 1125, "(1)" + line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1126, "else" + line 419, "pan.___", state 1129, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1208, "(1)" + line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1298, "(1)" + line 400, "pan.___", state 1334, "(1)" + line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1390, "(1)" + line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1483, "(1)" + line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1573, "(1)" + line 419, "pan.___", state 1590, "(1)" + line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1664, "(1)" + line 419, "pan.___", state 1681, "(1)" + line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1759, "(1)" + line 419, "pan.___", state 1776, "(1)" + line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1804, "(1)" + line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1805, "else" + line 400, "pan.___", state 1808, "(1)" + line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1818, "(1)" + line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1819, "else" + line 404, "pan.___", state 1822, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 402, "pan.___", state 1828, "((i<1))" + line 402, "pan.___", state 1828, "((i>=1))" + line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1847, "(1)" + line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1848, "else" + line 410, "pan.___", state 1851, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 414, "pan.___", state 1860, "(1)" + line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1861, "else" + line 414, "pan.___", state 1864, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 412, "pan.___", state 1870, "((i<1))" + line 412, "pan.___", state 1870, "((i>=1))" + line 419, "pan.___", state 1877, "(1)" + line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1878, "else" + line 419, "pan.___", state 1881, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1960, "(1)" + line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2051, "(1)" + line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2146, "(1)" + line 703, "pan.___", state 2192, "-end-" + (144 of 2192 states) +unreached in proctype :init: + line 710, "pan.___", state 9, "((j<2))" + line 710, "pan.___", state 9, "((j>=2))" + line 711, "pan.___", state 20, "((j<2))" + line 711, "pan.___", state 20, "((j>=2))" + line 716, "pan.___", state 33, "((j<2))" + line 716, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 750, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 15.9 seconds +pan: rate 77100.693 states/second +pan: avg transition delay 8.2609e-07 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..927df3f --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input @@ -0,0 +1,724 @@ +#define NO_RMB +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..04e7425 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2149 @@ +-2:3:-2 +-4:-4:-4 +1:0:2654 +2:3:2606 +3:3:2609 +4:3:2609 +5:3:2612 +6:3:2620 +7:3:2620 +8:3:2623 +9:3:2629 +10:3:2633 +11:3:2633 +12:3:2636 +13:3:2644 +14:3:2648 +15:3:2649 +16:0:2654 +17:3:2651 +18:0:2654 +19:2:416 +20:0:2654 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b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.log b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.log new file mode 100644 index 0000000..b7f3b80 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.log @@ -0,0 +1,266 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 5439 States= 1e+06 Transitions= 1.03e+07 Memory= 527.190 t= 8.16 R= 1e+05 +pan: claim violated! (at depth 1801) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 5439, errors: 1 + 1006552 states, stored + 9396280 states, matched + 10402832 transitions (= stored+matched) + 36844262 atomic steps +hash conflicts: 1832712 (resolved) + +Stats on memory usage (in Megabytes): + 80.634 equivalent memory usage for states (stored*(State-vector + overhead)) + 61.871 actual memory usage for states (compression: 76.73%) + state-vector as stored = 36 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 527.580 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 759, "(1)" + line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 760, "else" + line 409, "pan.___", state 763, "(1)" + line 409, "pan.___", state 764, "(1)" + line 409, "pan.___", state 764, "(1)" + line 413, "pan.___", state 772, "(1)" + line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 773, "else" + line 413, "pan.___", state 776, "(1)" + line 413, "pan.___", state 777, "(1)" + line 413, "pan.___", state 777, "(1)" + line 411, "pan.___", state 782, "((i<1))" + line 411, "pan.___", state 782, "((i>=1))" + line 418, "pan.___", state 789, "(1)" + line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 790, "else" + line 418, "pan.___", state 793, "(1)" + line 418, "pan.___", state 794, "(1)" + line 418, "pan.___", state 794, "(1)" + line 420, "pan.___", state 797, "(1)" + line 420, "pan.___", state 797, "(1)" + line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 872, "(1)" + line 418, "pan.___", state 889, "(1)" + line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 962, "(1)" + line 418, "pan.___", state 979, "(1)" + line 399, "pan.___", state 998, "(1)" + line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1054, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1147, "(1)" + line 418, "pan.___", state 1164, "(1)" + line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1343, "(1)" + line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1344, "else" + line 409, "pan.___", state 1347, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 413, "pan.___", state 1356, "(1)" + line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1357, "else" + line 413, "pan.___", state 1360, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 411, "pan.___", state 1366, "((i<1))" + line 411, "pan.___", state 1366, "((i>=1))" + line 418, "pan.___", state 1373, "(1)" + line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1374, "else" + line 418, "pan.___", state 1377, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 8.24 seconds +pan: rate 122154.37 states/second +pan: avg transition delay 7.9209e-07 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..6dea6e1 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input @@ -0,0 +1,723 @@ +#define NO_RMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..071a19e --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1804 @@ +-2:3:-2 +-4:-4:-4 +1:0:1982 +2:3:1934 +3:3:1937 +4:3:1937 +5:3:1940 +6:3:1948 +7:3:1948 +8:3:1951 +9:3:1957 +10:3:1961 +11:3:1961 +12:3:1964 +13:3:1972 +14:3:1976 +15:3:1977 +16:0:1982 +17:3:1979 +18:0:1982 +19:2:416 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+1775:0:1982 +1776:2:1928 +1777:0:1982 +1778:1:286 +1779:0:1982 +1780:2:1927 +1781:0:1982 +1782:1:291 +1783:0:1982 +1784:2:1928 +1785:0:1982 +1786:1:293 +1787:0:1982 +1788:2:1927 +1789:0:1982 +1790:1:296 +1791:0:1982 +1792:2:1928 +1793:0:1982 +1794:1:301 +1795:0:1982 +1796:2:1927 +1797:0:1982 +1798:1:302 +1799:0:1980 +1800:2:1928 +1801:0:1986 +1802:1:124 diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.define b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.log b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.log new file mode 100644 index 0000000..4dd3892 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.log @@ -0,0 +1,294 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +pan: claim violated! (at depth 1882) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4174, errors: 1 + 367189 states, stored + 3431533 states, matched + 3798722 transitions (= stored+matched) + 13407384 atomic steps +hash conflicts: 253700 (resolved) + +Stats on memory usage (in Megabytes): + 29.415 equivalent memory usage for states (stored*(State-vector + overhead)) + 22.811 actual memory usage for states (compression: 77.55%) + state-vector as stored = 37 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 488.518 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 331, "(1)" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (18 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 401, "pan.___", state 134, "((i<1))" + line 401, "pan.___", state 134, "((i>=1))" + line 409, "pan.___", state 153, "(1)" + line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 154, "else" + line 409, "pan.___", state 157, "(1)" + line 409, "pan.___", state 158, "(1)" + line 409, "pan.___", state 158, "(1)" + line 413, "pan.___", state 166, "(1)" + line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 167, "else" + line 413, "pan.___", state 170, "(1)" + line 413, "pan.___", state 171, "(1)" + line 413, "pan.___", state 171, "(1)" + line 411, "pan.___", state 176, "((i<1))" + line 411, "pan.___", state 176, "((i>=1))" + line 418, "pan.___", state 183, "(1)" + line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 184, "else" + line 418, "pan.___", state 187, "(1)" + line 418, "pan.___", state 188, "(1)" + line 418, "pan.___", state 188, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 369, "pan.___", state 193, "(1)" + line 652, "pan.___", state 199, "(1)" + line 646, "pan.___", state 202, "((write_lock==0))" + line 646, "pan.___", state 202, "else" + line 644, "pan.___", state 203, "(1)" + line 160, "pan.___", state 209, "(1)" + line 164, "pan.___", state 217, "(1)" + line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 164, "pan.___", state 218, "else" + line 162, "pan.___", state 223, "((j<1))" + line 162, "pan.___", state 223, "((j>=1))" + line 168, "pan.___", state 229, "(1)" + line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 168, "pan.___", state 230, "else" + line 160, "pan.___", state 241, "(1)" + line 168, "pan.___", state 261, "(1)" + line 160, "pan.___", state 277, "(1)" + line 164, "pan.___", state 285, "(1)" + line 168, "pan.___", state 297, "(1)" + line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 356, "(1)" + line 413, "pan.___", state 369, "(1)" + line 418, "pan.___", state 386, "(1)" + line 399, "pan.___", state 405, "(1)" + line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 461, "(1)" + line 418, "pan.___", state 478, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 164, "pan.___", state 594, "(1)" + line 168, "pan.___", state 606, "(1)" + line 160, "pan.___", state 618, "(1)" + line 168, "pan.___", state 638, "(1)" + line 164, "pan.___", state 662, "(1)" + line 168, "pan.___", state 674, "(1)" + line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 698, "(1)" + line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 399, "pan.___", state 699, "else" + line 399, "pan.___", state 702, "(1)" + line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 712, "(1)" + line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 403, "pan.___", state 713, "else" + line 403, "pan.___", state 716, "(1)" + line 403, "pan.___", state 717, "(1)" + line 403, "pan.___", state 717, "(1)" + line 401, "pan.___", state 722, "((i<1))" + line 401, "pan.___", state 722, "((i>=1))" + line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 741, "(1)" + line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 742, "else" + line 409, "pan.___", state 745, "(1)" + line 409, "pan.___", state 746, "(1)" + line 409, "pan.___", state 746, "(1)" + line 413, "pan.___", state 754, "(1)" + line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 755, "else" + line 413, "pan.___", state 758, "(1)" + line 413, "pan.___", state 759, "(1)" + line 413, "pan.___", state 759, "(1)" + line 411, "pan.___", state 764, "((i<1))" + line 411, "pan.___", state 764, "((i>=1))" + line 418, "pan.___", state 771, "(1)" + line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 772, "else" + line 418, "pan.___", state 775, "(1)" + line 418, "pan.___", state 776, "(1)" + line 418, "pan.___", state 776, "(1)" + line 420, "pan.___", state 779, "(1)" + line 420, "pan.___", state 779, "(1)" + line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 854, "(1)" + line 418, "pan.___", state 871, "(1)" + line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 944, "(1)" + line 418, "pan.___", state 961, "(1)" + line 399, "pan.___", state 980, "(1)" + line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1036, "(1)" + line 418, "pan.___", state 1053, "(1)" + line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1129, "(1)" + line 418, "pan.___", state 1146, "(1)" + line 164, "pan.___", state 1169, "(1)" + line 168, "pan.___", state 1181, "(1)" + line 160, "pan.___", state 1193, "(1)" + line 168, "pan.___", state 1213, "(1)" + line 164, "pan.___", state 1237, "(1)" + line 168, "pan.___", state 1249, "(1)" + line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 1273, "(1)" + line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 399, "pan.___", state 1274, "else" + line 399, "pan.___", state 1277, "(1)" + line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 1287, "(1)" + line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 403, "pan.___", state 1288, "else" + line 403, "pan.___", state 1291, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 401, "pan.___", state 1297, "((i<1))" + line 401, "pan.___", state 1297, "((i>=1))" + line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1316, "(1)" + line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1317, "else" + line 409, "pan.___", state 1320, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 413, "pan.___", state 1329, "(1)" + line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1330, "else" + line 413, "pan.___", state 1333, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 411, "pan.___", state 1339, "((i<1))" + line 411, "pan.___", state 1339, "((i>=1))" + line 418, "pan.___", state 1346, "(1)" + line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1347, "else" + line 418, "pan.___", state 1350, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 164, "pan.___", state 1379, "(1)" + line 168, "pan.___", state 1391, "(1)" + line 160, "pan.___", state 1403, "(1)" + line 168, "pan.___", state 1423, "(1)" + line 164, "pan.___", state 1447, "(1)" + line 168, "pan.___", state 1459, "(1)" + line 702, "pan.___", state 1484, "-end-" + (160 of 1484 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 2.96 seconds +pan: rate 124050.34 states/second +pan: avg transition delay 7.7921e-07 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..f4d8acb --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input @@ -0,0 +1,723 @@ +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..f73a838 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1885 @@ +-2:3:-2 +-4:-4:-4 +1:0:1946 +2:3:1898 +3:3:1901 +4:3:1901 +5:3:1904 +6:3:1912 +7:3:1912 +8:3:1915 +9:3:1921 +10:3:1925 +11:3:1925 +12:3:1928 +13:3:1936 +14:3:1940 +15:3:1941 +16:0:1946 +17:3:1943 +18:0:1946 +19:2:416 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+1866:2:1864 +1867:2:1869 +1868:0:1946 +1869:2:1880 +1870:0:1946 +1871:2:1882 +1872:0:1946 +1873:2:1883 +1874:0:1946 +1875:2:1886 +1876:0:1946 +1877:2:1891 +1878:0:1946 +1879:1:302 +1880:0:1944 +1881:2:1892 +1882:0:1950 +1883:1:143 diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.define b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.log b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.log new file mode 100644 index 0000000..2a80112 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.log @@ -0,0 +1,197 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +pan: claim violated! (at depth 1371) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3387, errors: 1 + 206295 states, stored + 1902753 states, matched + 2109048 transitions (= stored+matched) + 7663223 atomic steps +hash conflicts: 101109 (resolved) + +Stats on memory usage (in Megabytes): + 16.526 equivalent memory usage for states (stored*(State-vector + overhead)) + 13.080 actual memory usage for states (compression: 79.15%) + state-vector as stored = 38 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 478.752 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1013, "(1)" + line 164, "pan.___", state 1021, "(1)" + line 168, "pan.___", state 1033, "(1)" + line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.66 seconds +pan: rate 124274.1 states/second +pan: avg transition delay 7.8708e-07 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..93aae44 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input @@ -0,0 +1,723 @@ +#define SINGLE_FLIP + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..73c1400 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1374 @@ +-2:3:-2 +-4:-4:-4 +1:0:1650 +2:3:1602 +3:3:1605 +4:3:1605 +5:3:1608 +6:3:1616 +7:3:1616 +8:3:1619 +9:3:1625 +10:3:1629 +11:3:1629 +12:3:1632 +13:3:1640 +14:3:1644 +15:3:1645 +16:0:1650 +17:3:1647 +18:0:1650 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b/urcu-nosched-model/result-standard-execution-nest/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.define b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.log b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.log new file mode 100644 index 0000000..9e98b9f --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.log @@ -0,0 +1,275 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 1767: Claim reached state 9 (line 748) +Depth= 3880 States= 1e+06 Transitions= 1.71e+07 Memory= 499.651 t= 14.5 R= 7e+04 +Depth= 3880 States= 2e+06 Transitions= 3.79e+07 Memory= 532.365 t= 32.3 R= 6e+04 +Depth= 3880 States= 3e+06 Transitions= 5.83e+07 Memory= 564.983 t= 50.2 R= 6e+04 +pan: resizing hashtable to -w22.. done +Depth= 3880 States= 4e+06 Transitions= 7.76e+07 Memory= 629.307 t= 67 R= 6e+04 +Depth= 3880 States= 5e+06 Transitions= 9.78e+07 Memory= 662.315 t= 84.2 R= 6e+04 +Depth= 3880 States= 6e+06 Transitions= 1.19e+08 Memory= 694.736 t= 102 R= 6e+04 +Depth= 3880 States= 7e+06 Transitions= 1.38e+08 Memory= 727.842 t= 119 R= 6e+04 +Depth= 3880 States= 8e+06 Transitions= 1.59e+08 Memory= 760.752 t= 137 R= 6e+04 +Depth= 3880 States= 9e+06 Transitions= 1.79e+08 Memory= 793.174 t= 155 R= 6e+04 +pan: resizing hashtable to -w24.. done +Depth= 3880 States= 1e+07 Transitions= 1.98e+08 Memory= 950.568 t= 172 R= 6e+04 +Depth= 3880 States= 1.1e+07 Transitions= 2.19e+08 Memory= 983.479 t= 189 R= 6e+04 +Depth= 3880 States= 1.2e+07 Transitions= 2.4e+08 Memory= 1015.901 t= 207 R= 6e+04 +Depth= 3880 States= 1.3e+07 Transitions= 2.58e+08 Memory= 1049.397 t= 223 R= 6e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3880, errors: 0 + 7197860 states, stored (1.33457e+07 visited) +2.5266654e+08 states, matched +2.6601223e+08 transitions (= visited+matched) +9.9067284e+08 atomic steps +hash conflicts: 87783920 (resolved) + +Stats on memory usage (in Megabytes): + 576.611 equivalent memory usage for states (stored*(State-vector + overhead)) + 474.839 actual memory usage for states (compression: 82.35%) + state-vector as stored = 41 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1060.529 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..7c42af1 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_reader.spin.input.trail @@ -0,0 +1,1270 @@ +-2:4:-2 +-4:-4:-4 +1:0:4401 +2:4:4353 +3:4:4356 +4:4:4356 +5:4:4359 +6:4:4367 +7:4:4367 +8:4:4370 +9:4:4376 +10:4:4380 +11:4:4380 +12:4:4383 +13:4:4391 +14:4:4395 +15:4:4396 +16:0:4401 +17:4:4398 +18:0:4401 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+1254:0:4405 +1255:3:4347 +1256:0:4405 +1257:3:4346 +1258:0:4405 +1259:2:1348 +1260:0:4405 +1261:3:4347 +1262:0:4405 +1263:2:1347 +1264:0:4405 +1265:3:4346 +1266:0:4405 +1267:1:104 diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.define b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.log b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.log new file mode 100644 index 0000000..434151a --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.log @@ -0,0 +1,275 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 291: Claim reached state 9 (line 748) +Depth= 2677 States= 1e+06 Transitions= 1.57e+07 Memory= 487.932 t= 13.4 R= 7e+04 +Depth= 3023 States= 2e+06 Transitions= 3.19e+07 Memory= 509.709 t= 27.3 R= 7e+04 +Depth= 3610 States= 3e+06 Transitions= 4.84e+07 Memory= 531.486 t= 41.6 R= 7e+04 +pan: resizing hashtable to -w22.. done +Depth= 3956 States= 4e+06 Transitions= 6.63e+07 Memory= 595.029 t= 57 R= 7e+04 +Depth= 3956 States= 5e+06 Transitions= 8.67e+07 Memory= 617.783 t= 74.5 R= 7e+04 +Depth= 3956 States= 6e+06 Transitions= 1.08e+08 Memory= 660.850 t= 93 R= 6e+04 +Depth= 3956 States= 7e+06 Transitions= 1.28e+08 Memory= 690.928 t= 110 R= 6e+04 +Depth= 3956 States= 8e+06 Transitions= 1.51e+08 Memory= 729.600 t= 129 R= 6e+04 +Depth= 3956 States= 9e+06 Transitions= 1.7e+08 Memory= 765.830 t= 146 R= 6e+04 +pan: resizing hashtable to -w24.. done +Depth= 3956 States= 1e+07 Transitions= 1.92e+08 Memory= 919.611 t= 166 R= 6e+04 +Depth= 3956 States= 1.1e+07 Transitions= 2.13e+08 Memory= 958.576 t= 183 R= 6e+04 +Depth= 3956 States= 1.2e+07 Transitions= 2.33e+08 Memory= 985.627 t= 201 R= 6e+04 +Depth= 3956 States= 1.3e+07 Transitions= 2.55e+08 Memory= 1027.033 t= 220 R= 6e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3956, errors: 0 + 7045896 states, stored (1.35792e+07 visited) +2.5326206e+08 states, matched +2.668413e+08 transitions (= visited+matched) +9.9425626e+08 atomic steps +hash conflicts: 65494104 (resolved) + +Stats on memory usage (in Megabytes): + 564.437 equivalent memory usage for states (stored*(State-vector + overhead)) + 465.758 actual memory usage for states (compression: 82.52%) + state-vector as stored = 41 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1051.350 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.define b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.log b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.log new file mode 100644 index 0000000..7fafb9e --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.log @@ -0,0 +1,514 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +depth 15: Claim reached state 9 (line 750) +depth 291: Claim reached state 9 (line 749) +pan: acceptance cycle (at depth 4308) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4820, errors: 1 + 62091 states, stored (169917 visited) + 2179326 states, matched + 2349243 transitions (= visited+matched) + 8805349 atomic steps +hash conflicts: 50953 (resolved) + +Stats on memory usage (in Megabytes): + 4.974 equivalent memory usage for states (stored*(State-vector + overhead)) + 4.145 actual memory usage for states (compression: 83.33%) + state-vector as stored = 42 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 469.865 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 151, "(1)" + line 419, "pan.___", state 181, "(1)" + line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 242, "(1)" + line 419, "pan.___", state 272, "(1)" + line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 360, "(1)" + line 419, "pan.___", state 390, "(1)" + line 541, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 402, "pan.___", state 134, "((i<1))" + line 402, "pan.___", state 134, "((i>=1))" + line 410, "pan.___", state 153, "(1)" + line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 154, "else" + line 410, "pan.___", state 157, "(1)" + line 410, "pan.___", state 158, "(1)" + line 410, "pan.___", state 158, "(1)" + line 414, "pan.___", state 166, "(1)" + line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 167, "else" + line 414, "pan.___", state 170, "(1)" + line 414, "pan.___", state 171, "(1)" + line 414, "pan.___", state 171, "(1)" + line 412, "pan.___", state 176, "((i<1))" + line 412, "pan.___", state 176, "((i>=1))" + line 419, "pan.___", state 183, "(1)" + line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 184, "else" + line 419, "pan.___", state 187, "(1)" + line 419, "pan.___", state 188, "(1)" + line 419, "pan.___", state 188, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 370, "pan.___", state 193, "(1)" + line 653, "pan.___", state 199, "(1)" + line 647, "pan.___", state 202, "((write_lock==0))" + line 647, "pan.___", state 202, "else" + line 645, "pan.___", state 203, "(1)" + line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 225, "((j<1))" + line 178, "pan.___", state 225, "((j>=1))" + line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 240, "(1)" + line 165, "pan.___", state 248, "(1)" + line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 165, "pan.___", state 249, "else" + line 163, "pan.___", state 254, "((j<1))" + line 163, "pan.___", state 254, "((j>=1))" + line 169, "pan.___", state 260, "(1)" + line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 169, "pan.___", state 261, "else" + line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 171, "pan.___", state 264, "else" + line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 169, "pan.___", state 323, "(1)" + line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 355, "((j<1))" + line 178, "pan.___", state 355, "((j>=1))" + line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 370, "(1)" + line 165, "pan.___", state 378, "(1)" + line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 165, "pan.___", state 379, "else" + line 163, "pan.___", state 384, "((j<1))" + line 163, "pan.___", state 384, "((j>=1))" + line 169, "pan.___", state 390, "(1)" + line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 169, "pan.___", state 391, "else" + line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 171, "pan.___", state 394, "else" + line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 410, "(1)" + line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 424, "(1)" + line 404, "pan.___", state 425, "(1)" + line 404, "pan.___", state 425, "(1)" + line 402, "pan.___", state 430, "((i<1))" + line 402, "pan.___", state 430, "((i>=1))" + line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 449, "(1)" + line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 450, "else" + line 410, "pan.___", state 453, "(1)" + line 410, "pan.___", state 454, "(1)" + line 410, "pan.___", state 454, "(1)" + line 414, "pan.___", state 462, "(1)" + line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 463, "else" + line 414, "pan.___", state 466, "(1)" + line 414, "pan.___", state 467, "(1)" + line 414, "pan.___", state 467, "(1)" + line 412, "pan.___", state 472, "((i<1))" + line 412, "pan.___", state 472, "((i>=1))" + line 419, "pan.___", state 479, "(1)" + line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 480, "else" + line 419, "pan.___", state 483, "(1)" + line 419, "pan.___", state 484, "(1)" + line 419, "pan.___", state 484, "(1)" + line 421, "pan.___", state 487, "(1)" + line 421, "pan.___", state 487, "(1)" + line 370, "pan.___", state 489, "(1)" + line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[_pid] = (tmp^(1<<7))" + line 400, "pan.___", state 498, "(1)" + line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 499, "else" + line 400, "pan.___", state 502, "(1)" + line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 516, "(1)" + line 404, "pan.___", state 517, "(1)" + line 404, "pan.___", state 517, "(1)" + line 402, "pan.___", state 522, "((i<1))" + line 402, "pan.___", state 522, "((i>=1))" + line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 541, "(1)" + line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 542, "else" + line 410, "pan.___", state 545, "(1)" + line 410, "pan.___", state 546, "(1)" + line 410, "pan.___", state 546, "(1)" + line 414, "pan.___", state 554, "(1)" + line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 555, "else" + line 414, "pan.___", state 558, "(1)" + line 414, "pan.___", state 559, "(1)" + line 414, "pan.___", state 559, "(1)" + line 412, "pan.___", state 564, "((i<1))" + line 412, "pan.___", state 564, "((i>=1))" + line 419, "pan.___", state 571, "(1)" + line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 572, "else" + line 419, "pan.___", state 575, "(1)" + line 419, "pan.___", state 576, "(1)" + line 419, "pan.___", state 576, "(1)" + line 421, "pan.___", state 579, "(1)" + line 421, "pan.___", state 579, "(1)" + line 370, "pan.___", state 581, "(1)" + line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 595, "(1)" + line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 609, "(1)" + line 404, "pan.___", state 610, "(1)" + line 404, "pan.___", state 610, "(1)" + line 402, "pan.___", state 615, "((i<1))" + line 402, "pan.___", state 615, "((i>=1))" + line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 634, "(1)" + line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 635, "else" + line 410, "pan.___", state 638, "(1)" + line 410, "pan.___", state 639, "(1)" + line 410, "pan.___", state 639, "(1)" + line 414, "pan.___", state 647, "(1)" + line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 648, "else" + line 414, "pan.___", state 651, "(1)" + line 414, "pan.___", state 652, "(1)" + line 414, "pan.___", state 652, "(1)" + line 412, "pan.___", state 657, "((i<1))" + line 412, "pan.___", state 657, "((i>=1))" + line 419, "pan.___", state 664, "(1)" + line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 665, "else" + line 419, "pan.___", state 668, "(1)" + line 419, "pan.___", state 669, "(1)" + line 419, "pan.___", state 669, "(1)" + line 421, "pan.___", state 672, "(1)" + line 421, "pan.___", state 672, "(1)" + line 370, "pan.___", state 674, "(1)" + line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 681, "(1)" + line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 682, "else" + line 400, "pan.___", state 685, "(1)" + line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 695, "(1)" + line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 696, "else" + line 404, "pan.___", state 699, "(1)" + line 404, "pan.___", state 700, "(1)" + line 404, "pan.___", state 700, "(1)" + line 402, "pan.___", state 705, "((i<1))" + line 402, "pan.___", state 705, "((i>=1))" + line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 724, "(1)" + line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 725, "else" + line 410, "pan.___", state 728, "(1)" + line 410, "pan.___", state 729, "(1)" + line 410, "pan.___", state 729, "(1)" + line 414, "pan.___", state 737, "(1)" + line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 738, "else" + line 414, "pan.___", state 741, "(1)" + line 414, "pan.___", state 742, "(1)" + line 414, "pan.___", state 742, "(1)" + line 412, "pan.___", state 747, "((i<1))" + line 412, "pan.___", state 747, "((i>=1))" + line 419, "pan.___", state 754, "(1)" + line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 755, "else" + line 419, "pan.___", state 758, "(1)" + line 419, "pan.___", state 759, "(1)" + line 419, "pan.___", state 759, "(1)" + line 421, "pan.___", state 762, "(1)" + line 421, "pan.___", state 762, "(1)" + line 370, "pan.___", state 764, "(1)" + line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[_pid])&(1<<7))))" + line 430, "pan.___", state 767, "else" + line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 779, "(1)" + line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 780, "else" + line 400, "pan.___", state 783, "(1)" + line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 793, "(1)" + line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 794, "else" + line 404, "pan.___", state 797, "(1)" + line 404, "pan.___", state 798, "(1)" + line 404, "pan.___", state 798, "(1)" + line 402, "pan.___", state 803, "((i<1))" + line 402, "pan.___", state 803, "((i>=1))" + line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 822, "(1)" + line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 823, "else" + line 410, "pan.___", state 826, "(1)" + line 410, "pan.___", state 827, "(1)" + line 410, "pan.___", state 827, "(1)" + line 414, "pan.___", state 835, "(1)" + line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 836, "else" + line 414, "pan.___", state 839, "(1)" + line 414, "pan.___", state 840, "(1)" + line 414, "pan.___", state 840, "(1)" + line 412, "pan.___", state 845, "((i<1))" + line 412, "pan.___", state 845, "((i>=1))" + line 419, "pan.___", state 852, "(1)" + line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 853, "else" + line 419, "pan.___", state 856, "(1)" + line 419, "pan.___", state 857, "(1)" + line 419, "pan.___", state 857, "(1)" + line 421, "pan.___", state 860, "(1)" + line 421, "pan.___", state 860, "(1)" + line 370, "pan.___", state 862, "(1)" + line 449, "pan.___", state 870, "((tmp<1))" + line 449, "pan.___", state 870, "((tmp>=1))" + line 462, "pan.___", state 873, "tmp = 0" + line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 883, "(1)" + line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 897, "(1)" + line 404, "pan.___", state 898, "(1)" + line 404, "pan.___", state 898, "(1)" + line 402, "pan.___", state 903, "((i<1))" + line 402, "pan.___", state 903, "((i>=1))" + line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 922, "(1)" + line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 923, "else" + line 410, "pan.___", state 926, "(1)" + line 410, "pan.___", state 927, "(1)" + line 410, "pan.___", state 927, "(1)" + line 414, "pan.___", state 935, "(1)" + line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 936, "else" + line 414, "pan.___", state 939, "(1)" + line 414, "pan.___", state 940, "(1)" + line 414, "pan.___", state 940, "(1)" + line 412, "pan.___", state 945, "((i<1))" + line 412, "pan.___", state 945, "((i>=1))" + line 419, "pan.___", state 952, "(1)" + line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 953, "else" + line 419, "pan.___", state 956, "(1)" + line 419, "pan.___", state 957, "(1)" + line 419, "pan.___", state 957, "(1)" + line 421, "pan.___", state 960, "(1)" + line 421, "pan.___", state 960, "(1)" + line 370, "pan.___", state 962, "(1)" + line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[_pid]" + line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 973, "(1)" + line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 987, "(1)" + line 404, "pan.___", state 988, "(1)" + line 404, "pan.___", state 988, "(1)" + line 402, "pan.___", state 993, "((i<1))" + line 402, "pan.___", state 993, "((i>=1))" + line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1012, "(1)" + line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1013, "else" + line 410, "pan.___", state 1016, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 414, "pan.___", state 1025, "(1)" + line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1026, "else" + line 414, "pan.___", state 1029, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 412, "pan.___", state 1035, "((i<1))" + line 412, "pan.___", state 1035, "((i>=1))" + line 419, "pan.___", state 1042, "(1)" + line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1043, "else" + line 419, "pan.___", state 1046, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 370, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1061, "(1)" + line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1117, "(1)" + line 419, "pan.___", state 1134, "(1)" + line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1210, "(1)" + line 419, "pan.___", state 1227, "(1)" + line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1287, "(1)" + line 414, "pan.___", state 1300, "(1)" + line 419, "pan.___", state 1317, "(1)" + line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1342, "(1)" + line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1343, "else" + line 400, "pan.___", state 1346, "(1)" + line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1356, "(1)" + line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1357, "else" + line 404, "pan.___", state 1360, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 402, "pan.___", state 1366, "((i<1))" + line 402, "pan.___", state 1366, "((i>=1))" + line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1385, "(1)" + line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1386, "else" + line 410, "pan.___", state 1389, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 414, "pan.___", state 1398, "(1)" + line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1399, "else" + line 414, "pan.___", state 1402, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 412, "pan.___", state 1408, "((i<1))" + line 412, "pan.___", state 1408, "((i>=1))" + line 419, "pan.___", state 1415, "(1)" + line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1416, "else" + line 419, "pan.___", state 1419, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 1471, "(1)" + line 165, "pan.___", state 1479, "(1)" + line 169, "pan.___", state 1491, "(1)" + line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..5bb8316 --- /dev/null +++ b/urcu-nosched-model/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,4823 @@ +-2:3:-2 +-4:-4:-4 +1:0:2108 +2:3:2060 +3:3:2063 +4:3:2063 +5:3:2066 +6:3:2074 +7:3:2074 +8:3:2077 +9:3:2083 +10:3:2087 +11:3:2087 +12:3:2090 +13:3:2098 +14:3:2102 +15:3:2103 +16:0:2108 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+4811:1:48 +4812:1:49 +4813:1:56 +4814:1:57 +4815:1:68 +4816:1:69 +4817:1:70 +4818:1:81 +4819:1:86 +4820:1:87 diff --git a/urcu-paulmck/.gitignore b/urcu-paulmck/.gitignore new file mode 100644 index 0000000..d62f4bb --- /dev/null +++ b/urcu-paulmck/.gitignore @@ -0,0 +1,2 @@ +pan* +*.trail diff --git a/urcu-paulmck/urcu-paulmck.spin b/urcu-paulmck/urcu-paulmck.spin new file mode 100644 index 0000000..15338de --- /dev/null +++ b/urcu-paulmck/urcu-paulmck.spin @@ -0,0 +1,375 @@ +/* + * urcu_mbmin.spin: Promela code to validate urcu. See commit number + * 3a9e6e9df706b8d39af94d2f027210e2e7d4106e of Mathieu Desnoyer's + * git archive at git://lttng.org/userspace-rcu.git, but with + * memory barriers removed. + * + * This validates a single reader against a single updater. The + * updater is assumed to have smp_mb() barriers between each pair + * of operations, and this model validates that a signal-mediated + * broadcast barrier is required only at the beginning and end of + * the synchronize_rcu(). + * + * Note that the second half of a prior synchronize_rcu() is modelled + * as well as the current synchronize_rcu(). + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Paul E. McKenney, IBM Corporation. + */ + +/* Promela validation variables. */ + +bit removed = 0; /* Has RCU removal happened, e.g., list_del_rcu()? */ +bit free = 0; /* Has RCU reclamation happened, e.g., kfree()? */ +bit need_mb = 0; /* =1 says need reader mb, =0 for reader response. */ +byte reader_progress[4]; /* Count of read-side statement executions. */ +bit reader_done = 0; /* =0 says reader still running, =1 says done. */ +bit updater_done = 0; /* =0 says updater still running, =1 says done. */ + +/* Broadcast memory barriers to enable, prior synchronize_rcu() instance. */ + +/* #define MB_A */ /* Not required for correctness. */ +/* #define MB_B */ /* Not required for correctness. */ +/* #define MB_C */ /* Not required for correctness. */ + +/* Broadcast memory barriers to enable, current synchronize_rcu() instance. */ + +#define MB_D /* First broadcast barrier in synchronize_rcu(). */ +/* #define MB_E */ /* Not required for correctness. */ +/* #define MB_F */ /* Not required for correctness. */ +#define MB_G /* Last broadcast barrier in synchronize_rcu(). */ + +/* urcu definitions and variables, taken straight from the algorithm. */ + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +byte urcu_gp_ctr = 1; +byte urcu_active_readers = 0; + +/* Model the RCU read-side critical section. */ + +proctype urcu_reader() +{ + bit done = 0; + bit mbok; + byte tmp; + byte tmp_removed; + byte tmp_free; + + /* Absorb any early requests for memory barriers. */ + do + :: need_mb == 1 -> + need_mb = 0; + :: 1 -> break; + od; + + /* + * Each pass through this loop executes one read-side statement + * from the following code fragment: + * + * rcu_read_lock(); [0a] + * rcu_read_lock(); [0b] + * p = rcu_dereference(global_p); [1] + * x = p->data; [2] + * rcu_read_unlock(); [3b] + * rcu_read_unlock(); [3a] + * + * Because we are modeling a weak-memory machine, these statements + * can be seen in any order, the only restriction being that + * rcu_read_unlock() cannot precede the corresponding rcu_read_lock(). + * The placement of the inner rcu_read_lock() and rcu_read_unlock() + * is non-deterministic, the above is but one possible placement. + * Intestingly enough, this model validates all possible placements + * of the inner rcu_read_lock() and rcu_read_unlock() statements, + * with the only constraint being that the rcu_read_lock() must + * precede the rcu_read_unlock(). + * + * We also respond to memory-barrier requests, but only if our + * execution happens to be ordered. If the current state is + * misordered, we ignore memory-barrier requests. + */ + do + :: 1 -> + if + :: reader_progress[0] < 2 -> /* [0a and 0b] */ + tmp = urcu_active_readers; + if + :: (tmp & RCU_GP_CTR_NEST_MASK) == 0 -> + tmp = urcu_gp_ctr; + do + :: (reader_progress[1] + + reader_progress[2] + + reader_progress[3] == 0) && need_mb == 1 -> + need_mb = 0; + :: need_mb == 0 && !updater_done -> skip; + :: 1 -> break; + od; + urcu_active_readers = tmp; + :: else -> + urcu_active_readers = tmp + 1; + fi; + reader_progress[0] = reader_progress[0] + 1; + :: reader_progress[1] == 0 -> /* [1] */ + tmp_removed = removed; + reader_progress[1] = 1; + :: reader_progress[2] == 0 -> /* [2] */ + tmp_free = free; + reader_progress[2] = 1; + :: ((reader_progress[0] > reader_progress[3]) && + (reader_progress[3] < 2)) -> /* [3a and 3b] */ + tmp = urcu_active_readers - 1; + urcu_active_readers = tmp; + reader_progress[3] = reader_progress[3] + 1; + :: else -> break; + fi; + + /* Process memory-barrier requests, if it is safe to do so. */ + atomic { + mbok = 0; + tmp = 0; + do + :: tmp < 4 && reader_progress[tmp] == 0 -> + tmp = tmp + 1; + break; + :: tmp < 4 && reader_progress[tmp] != 0 -> + tmp = tmp + 1; + :: tmp >= 4 && + reader_progress[0] == reader_progress[3] -> + done = 1; + break; + :: tmp >= 4 && + reader_progress[0] != reader_progress[3] -> + break; + od; + do + :: tmp < 4 && reader_progress[tmp] == 0 -> + tmp = tmp + 1; + :: tmp < 4 && reader_progress[tmp] != 0 -> + break; + :: tmp >= 4 -> + mbok = 1; + break; + od + + } + + if + :: mbok == 1 -> + /* We get here if mb processing is safe. */ + do + :: need_mb == 1 -> + need_mb = 0; + :: 1 -> break; + od; + :: else -> skip; + fi; + + /* + * Check to see if we have modeled the entire RCU read-side + * critical section, and leave if so. + */ + if + :: done == 1 -> break; + :: else -> skip; + fi + od; + assert((tmp_free == 0) || (tmp_removed == 1)); + + /* Reader has completed. */ + reader_done = 1; + + /* + * Process any late-arriving memory-barrier requests, and + * in addition create a progress cycle. + */ + reader_done = 1; + + do + :: need_mb == 1 -> + need_mb = 0; + :: 1 -> +progress_reader: + skip; + :: 1 -> break; + od; +} + +/* Model the RCU update process. */ + +proctype urcu_updater() +{ + byte tmp; + + /* + * ---------------------------------------------------------------- + * prior synchronize_rcu(). + */ + + /* prior synchronize_rcu(), second counter flip. */ +#ifdef MB_A + need_mb = 1; /* mb() A (analogous to omitted barrier between E and F) */ + do + :: need_mb == 1 && !reader_done -> skip; + :: need_mb == 0 || reader_done -> break; + od; +#endif /* #ifdef MB_A */ + urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; +#ifdef MB_B + need_mb = 1; /* mb() B (analogous to F) */ + do + :: need_mb == 1 && !reader_done -> skip; + :: need_mb == 0 || reader_done -> break; + od; +#endif /* #ifdef MB_B */ + do + :: 1 -> + if + :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && + (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != + (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> + skip; + :: else -> break; + fi + od; +#ifdef MB_C + need_mb = 1; /* mb() C absolutely required by analogy with G */ + do + :: need_mb == 1 && !reader_done -> skip; + :: need_mb == 0 || reader_done -> break; + od; +#endif /* #ifdef MB_C */ + + /* Removal statement, e.g., list_del_rcu(). */ + removed = 1; + + /* + * prior synchronize_rcu(). + * ---------------------------------------------------------------- + */ + + /* + * ---------------------------------------------------------------- + * current synchronize_rcu(). + */ + + /* current synchronize_rcu(), first counter flip. */ +#ifdef MB_D + need_mb = 1; /* mb() D suggested */ + do + :: need_mb == 1 && !reader_done -> skip; + :: need_mb == 0 || reader_done -> break; + od; +#endif /* #ifdef MB_D */ + urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; +#ifdef MB_E + need_mb = 1; /* mb() E required if D not present */ + do + :: need_mb == 1 && !reader_done -> skip; + :: need_mb == 0 || reader_done -> break; + od; +#endif /* #ifdef MB_E */ + + /* current synchronize_rcu(), first-flip check plus second flip. */ + if + :: 1 -> + do + :: 1 -> + if + :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && + (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != + (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> + skip; + :: else -> break; + fi; + od; + urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; + :: 1 -> + tmp = urcu_gp_ctr; + urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; + do + :: 1 -> + if + :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && + (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != + (tmp & ~RCU_GP_CTR_NEST_MASK) -> + skip; + :: else -> break; + fi; + od; + fi; + + /* current synchronize_rcu(), second counter flip check. */ +#ifdef MB_F + need_mb = 1; /* mb() F not required */ + do + :: need_mb == 1 && !reader_done -> skip; + :: need_mb == 0 || reader_done -> break; + od; +#endif /* #ifdef MB_F */ + do + :: 1 -> + if + :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && + (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != + (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> + skip; + :: else -> break; + fi; + od; +#ifdef MB_G + need_mb = 1; /* mb() G absolutely required */ + do + :: need_mb == 1 && !reader_done -> skip; + :: need_mb == 0 || reader_done -> break; + od; +#endif /* #ifdef MB_G */ + + /* + * current synchronize_rcu(). + * ---------------------------------------------------------------- + */ + + /* free-up step, e.g., kfree(). */ + free = 1; + + /* We are done, so kill all the infinite loops in the reader. */ + updater_done = 1; + + /* Create a progress cycle. Correctness requires we get here. */ + do + :: 1 -> +progress_updater: + skip; + :: 1 -> break; + od; +} + +/* + * Initialize the array, spawn a reader and an updater. Because readers + * are independent of each other, only one reader is needed. + */ + +init { + atomic { + reader_progress[0] = 0; + reader_progress[1] = 0; + reader_progress[2] = 0; + reader_progress[3] = 0; + run urcu_reader(); + run urcu_updater(); + } +} diff --git a/urcu-paulmck/urcu.sh b/urcu-paulmck/urcu.sh new file mode 100644 index 0000000..0c5e492 --- /dev/null +++ b/urcu-paulmck/urcu.sh @@ -0,0 +1,3 @@ +spin -a urcu-paulmck.spin +cc -DNP -o pan pan.c +./pan -f -l diff --git a/urcu.sh b/urcu.sh new file mode 100644 index 0000000..b76c764 --- /dev/null +++ b/urcu.sh @@ -0,0 +1,3 @@ +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan diff --git a/urcu.spin b/urcu.spin new file mode 100644 index 0000000..3e18457 --- /dev/null +++ b/urcu.spin @@ -0,0 +1,301 @@ +/* + * urcu.spin: Promela code to validate urcu. See commit number + * 3a9e6e9df706b8d39af94d2f027210e2e7d4106e of Mathieu Desnoyer's + * git archive at git://lttng.org/userspace-rcu.git + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Paul E. McKenney, IBM Corporation. + */ + +/* Promela validation variables. */ + +bit removed = 0; /* Has RCU removal happened, e.g., list_del_rcu()? */ +bit free = 0; /* Has RCU reclamation happened, e.g., kfree()? */ +bit need_mb = 0; /* =1 says need reader mb, =0 for reader response. */ +byte reader_progress[4]; + /* Count of read-side statement executions. */ +bit reader_done = 0; + /* =0 says reader still running, =1 says done. */ +bit updater_done = 0; + /* =0 says updater still running, =1 says done. */ + +/* urcu definitions and variables, taken straight from the algorithm. */ + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +byte urcu_gp_ctr = 1; +byte urcu_active_readers = 0; + +/* Model the RCU read-side critical section. */ + +proctype urcu_reader() +{ + bit done = 0; + bit mbok; + byte tmp; + byte tmp_removed; + byte tmp_free; + + /* Absorb any early requests for memory barriers. */ + do + :: need_mb == 1 -> + need_mb = 0; + :: !updater_done -> skip; + :: 1 -> break; + od; + + /* + * Each pass through this loop executes one read-side statement + * from the following code fragment: + * + * rcu_read_lock(); [0a] + * rcu_read_lock(); [0b] + * p = rcu_dereference(global_p); [1] + * x = p->data; [2] + * rcu_read_unlock(); [3b] + * rcu_read_unlock(); [3a] + * + * Because we are modeling a weak-memory machine, these statements + * can be seen in any order, the only restriction being that + * rcu_read_unlock() cannot precede the corresponding rcu_read_lock(). + * The placement of the inner rcu_read_lock() and rcu_read_unlock() + * is non-deterministic, the above is but one possible placement. + * Intestingly enough, this model validates all possible placements + * of the inner rcu_read_lock() and rcu_read_unlock() statements, + * with the only constraint being that the rcu_read_lock() must + * precede the rcu_read_unlock(). + * + * We also respond to memory-barrier requests, but only if our + * execution happens to be ordered. If the current state is + * misordered, we ignore memory-barrier requests. + */ + do + :: 1 -> + if + :: reader_progress[0] < 2 -> /* [0a and 0b] */ + tmp = urcu_active_readers; + if + :: (tmp & RCU_GP_CTR_NEST_MASK) == 0 -> + tmp = urcu_gp_ctr; + do + :: (reader_progress[1] + + reader_progress[2] + + reader_progress[3] == 0) && need_mb == 1 -> + need_mb = 0; + :: !updater_done -> skip; + :: 1 -> break; + od; + urcu_active_readers = tmp; + :: else -> + urcu_active_readers = tmp + 1; + fi; + reader_progress[0] = reader_progress[0] + 1; + :: reader_progress[1] == 0 -> /* [1] */ + tmp_removed = removed; + reader_progress[1] = 1; + :: reader_progress[2] == 0 -> /* [2] */ + tmp_free = free; + reader_progress[2] = 1; + :: ((reader_progress[0] > reader_progress[3]) && + (reader_progress[3] < 2)) -> /* [3a and 3b] */ + tmp = urcu_active_readers - 1; + urcu_active_readers = tmp; + reader_progress[3] = reader_progress[3] + 1; + :: else -> break; + fi; + + /* Process memory-barrier requests, if it is safe to do so. */ + atomic { + mbok = 0; + tmp = 0; + do + :: tmp < 4 && reader_progress[tmp] == 0 -> + tmp = tmp + 1; + break; + :: tmp < 4 && reader_progress[tmp] != 0 -> + tmp = tmp + 1; + :: tmp >= 4 && + reader_progress[0] == reader_progress[3] -> + done = 1; + break; + :: tmp >= 4 && + reader_progress[0] != reader_progress[3] -> + break; + od; + do + :: tmp < 4 && reader_progress[tmp] == 0 -> + tmp = tmp + 1; + :: tmp < 4 && reader_progress[tmp] != 0 -> + break; + :: tmp >= 4 -> + mbok = 1; + break; + od + + } + + if + :: mbok == 1 -> + /* We get here if mb processing is safe. */ + do + :: need_mb == 1 -> + need_mb = 0; + :: !updater_done -> skip; + :: 1 -> break; + od; + :: else -> skip; + fi; + + /* + * Check to see if we have modeled the entire RCU read-side + * critical section, and leave if so. + */ + if + :: done == 1 -> break; + :: else -> skip; + fi + od; + assert((tmp_free == 0) || (tmp_removed == 1)); + + /* Reader has completed. */ + reader_done = 1; + + /* Process any late-arriving memory-barrier requests. */ + do + :: need_mb == 1 -> + need_mb = 0; + :: !updater_done -> skip; + :: 1 -> break; + od; +} + +/* Model the RCU update process. */ + +proctype urcu_updater() +{ + /* prior synchronize_rcu(), second counter flip. */ + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + do + :: 1 -> + if + :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && + (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != + (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> + skip; + :: else -> break; + fi; + od; + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + + /* Removal statement, e.g., list_del_rcu(). */ + removed = 1; + + /* current synchronize_rcu(), first counter flip. */ + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + do + :: 1 -> + if + :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && + (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != + (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> + skip; + :: else -> break; + fi; + od; + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + + /* current synchronize_rcu(), second counter flip. */ + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + urcu_gp_ctr = urcu_gp_ctr + RCU_GP_CTR_BIT; + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + do + :: 1 -> + if + :: (urcu_active_readers & RCU_GP_CTR_NEST_MASK) != 0 && + (urcu_active_readers & ~RCU_GP_CTR_NEST_MASK) != + (urcu_gp_ctr & ~RCU_GP_CTR_NEST_MASK) -> + skip; + :: else -> break; + fi; + od; + need_mb = 1; + do + :: need_mb == 1 -> skip; + :: need_mb == 0 -> break; + od; + + /* free-up step, e.g., kfree(). */ + free = 1; + + /* + * Signal updater done, ending any otherwise-infinite loops + * in the reading process. + */ + updater_done = 1; +} + +/* + * Initialize the array, spawn a reader and an updater. Because readers + * are independent of each other, only one reader is needed. + */ + +init { + atomic { + reader_progress[0] = 0; + reader_progress[1] = 0; + reader_progress[2] = 0; + reader_progress[3] = 0; + run urcu_reader(); + run urcu_updater(); + } +} diff --git a/urcu/DEFINES b/urcu/DEFINES new file mode 100644 index 0000000..5d5147e --- /dev/null +++ b/urcu/DEFINES @@ -0,0 +1,17 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu/Makefile b/urcu/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu/references.txt b/urcu/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu/result-signal-over-reader/DEFINES b/urcu/result-signal-over-reader/DEFINES new file mode 100644 index 0000000..2fcb038 --- /dev/null +++ b/urcu/result-signal-over-reader/DEFINES @@ -0,0 +1,17 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu/result-signal-over-reader/Makefile b/urcu/result-signal-over-reader/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu/result-signal-over-reader/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu/result-signal-over-reader/asserts.log b/urcu/result-signal-over-reader/asserts.log new file mode 100644 index 0000000..d317f57 --- /dev/null +++ b/urcu/result-signal-over-reader/asserts.log @@ -0,0 +1,312 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 4926 States= 1e+06 Transitions= 9.03e+06 Memory= 527.287 t= 5.98 R= 2e+05 +Depth= 7228 States= 2e+06 Transitions= 1.88e+07 Memory= 588.322 t= 12.9 R= 2e+05 +Depth= 7228 States= 3e+06 Transitions= 3.14e+07 Memory= 649.358 t= 21.9 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 7228 States= 4e+06 Transitions= 4.3e+07 Memory= 741.416 t= 30.3 R= 1e+05 +Depth= 7228 States= 5e+06 Transitions= 5.65e+07 Memory= 802.451 t= 39.6 R= 1e+05 +Depth= 7228 States= 6e+06 Transitions= 6.78e+07 Memory= 863.486 t= 47.5 R= 1e+05 +Depth= 7228 States= 7e+06 Transitions= 8.05e+07 Memory= 924.522 t= 56.5 R= 1e+05 +Depth= 7228 States= 8e+06 Transitions= 9.49e+07 Memory= 985.557 t= 66.8 R= 1e+05 +Depth= 7228 States= 9e+06 Transitions= 1.06e+08 Memory= 1046.592 t= 74.7 R= 1e+05 +pan: resizing hashtable to -w24.. done +Depth= 7228 States= 1e+07 Transitions= 1.18e+08 Memory= 1231.721 t= 84.9 R= 1e+05 +Depth= 7228 States= 1.1e+07 Transitions= 1.29e+08 Memory= 1292.756 t= 92.8 R= 1e+05 +Depth= 7228 States= 1.2e+07 Transitions= 1.4e+08 Memory= 1353.791 t= 100 R= 1e+05 +Depth= 7228 States= 1.3e+07 Transitions= 1.53e+08 Memory= 1414.826 t= 109 R= 1e+05 +Depth= 7228 States= 1.4e+07 Transitions= 1.65e+08 Memory= 1475.861 t= 117 R= 1e+05 +Depth= 7228 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1536.897 t= 126 R= 1e+05 +Depth= 7228 States= 1.6e+07 Transitions= 1.89e+08 Memory= 1597.932 t= 134 R= 1e+05 +Depth= 7228 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1658.967 t= 143 R= 1e+05 +Depth= 7228 States= 1.8e+07 Transitions= 2.16e+08 Memory= 1720.002 t= 153 R= 1e+05 +Depth= 7228 States= 1.9e+07 Transitions= 2.27e+08 Memory= 1781.037 t= 160 R= 1e+05 +Depth= 7228 States= 2e+07 Transitions= 2.39e+08 Memory= 1842.072 t= 169 R= 1e+05 +Depth= 7228 States= 2.1e+07 Transitions= 2.51e+08 Memory= 1903.108 t= 177 R= 1e+05 +Depth= 7228 States= 2.2e+07 Transitions= 2.62e+08 Memory= 1964.143 t= 185 R= 1e+05 +Depth= 7228 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2025.178 t= 194 R= 1e+05 +Depth= 7228 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2086.213 t= 203 R= 1e+05 +Depth= 7228 States= 2.5e+07 Transitions= 2.99e+08 Memory= 2147.248 t= 212 R= 1e+05 +Depth= 7228 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2208.283 t= 220 R= 1e+05 +Depth= 7228 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2269.318 t= 230 R= 1e+05 +Depth= 7228 States= 2.8e+07 Transitions= 3.37e+08 Memory= 2330.354 t= 239 R= 1e+05 +Depth= 7228 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2391.389 t= 248 R= 1e+05 +Depth= 7228 States= 3e+07 Transitions= 3.6e+08 Memory= 2452.424 t= 256 R= 1e+05 +Depth= 7228 States= 3.1e+07 Transitions= 3.72e+08 Memory= 2513.459 t= 265 R= 1e+05 +Depth= 7228 States= 3.2e+07 Transitions= 3.83e+08 Memory= 2574.494 t= 273 R= 1e+05 +Depth= 7228 States= 3.3e+07 Transitions= 3.95e+08 Memory= 2635.529 t= 282 R= 1e+05 +Depth= 7228 States= 3.4e+07 Transitions= 4.07e+08 Memory= 2696.565 t= 291 R= 1e+05 +pan: resizing hashtable to -w26.. done +Depth= 7228 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3253.682 t= 308 R= 1e+05 +Depth= 7228 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3314.717 t= 316 R= 1e+05 +Depth= 7228 States= 3.7e+07 Transitions= 4.45e+08 Memory= 3375.752 t= 325 R= 1e+05 +Depth= 7228 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3436.787 t= 334 R= 1e+05 +Depth= 7228 States= 3.9e+07 Transitions= 4.71e+08 Memory= 3497.822 t= 343 R= 1e+05 +Depth= 7228 States= 4e+07 Transitions= 4.82e+08 Memory= 3558.858 t= 350 R= 1e+05 +Depth= 7228 States= 4.1e+07 Transitions= 4.94e+08 Memory= 3619.893 t= 359 R= 1e+05 +Depth= 7228 States= 4.2e+07 Transitions= 5.04e+08 Memory= 3680.928 t= 366 R= 1e+05 +Depth= 7228 States= 4.3e+07 Transitions= 5.16e+08 Memory= 3741.963 t= 374 R= 1e+05 +Depth= 7228 States= 4.4e+07 Transitions= 5.29e+08 Memory= 3802.998 t= 383 R= 1e+05 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 56 byte, depth reached 7228, errors: 0 + 44157204 states, stored +4.8641845e+08 states, matched +5.3057565e+08 transitions (= stored+matched) +1.8453582e+09 atomic steps +hash conflicts: 2.8837553e+08 (resolved) + +Stats on memory usage (in Megabytes): + 3537.374 equivalent memory usage for states (stored*(State-vector + overhead)) + 2843.050 actual memory usage for states (compression: 80.37%) + state-vector as stored = 40 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 3812.568 total actual memory usage + +unreached in proctype urcu_reader + line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 61, "(1)" + line 417, ".input.spin", state 91, "(1)" + line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 158, "(1)" + line 417, ".input.spin", state 188, "(1)" + line 398, ".input.spin", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 256, "(1)" + line 417, ".input.spin", state 286, "(1)" + line 398, ".input.spin", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 395, "(1)" + line 417, ".input.spin", state 425, "(1)" + line 539, ".input.spin", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 398, ".input.spin", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 70, "(1)" + line 417, ".input.spin", state 100, "(1)" + line 398, ".input.spin", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 158, "(1)" + line 417, ".input.spin", state 188, "(1)" + line 398, ".input.spin", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 247, "(1)" + line 417, ".input.spin", state 277, "(1)" + line 398, ".input.spin", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 359, "(1)" + line 417, ".input.spin", state 389, "(1)" + line 613, ".input.spin", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 59, "(1)" + line 412, ".input.spin", state 72, "(1)" + line 417, ".input.spin", state 89, "(1)" + line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 153, "(1)" + line 412, ".input.spin", state 166, "(1)" + line 651, ".input.spin", state 199, "(1)" + line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 240, "(1)" + line 163, ".input.spin", state 248, "(1)" + line 167, ".input.spin", state 260, "(1)" + line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 370, "(1)" + line 163, ".input.spin", state 378, "(1)" + line 167, ".input.spin", state 390, "(1)" + line 398, ".input.spin", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 449, "(1)" + line 412, ".input.spin", state 462, "(1)" + line 417, ".input.spin", state 479, "(1)" + line 398, ".input.spin", state 498, "(1)" + line 402, ".input.spin", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 554, "(1)" + line 417, ".input.spin", state 571, "(1)" + line 402, ".input.spin", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 647, "(1)" + line 417, ".input.spin", state 664, "(1)" + line 178, ".input.spin", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 710, "(1)" + line 163, ".input.spin", state 718, "(1)" + line 167, ".input.spin", state 730, "(1)" + line 174, ".input.spin", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 840, "(1)" + line 163, ".input.spin", state 848, "(1)" + line 167, ".input.spin", state 860, "(1)" + line 398, ".input.spin", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 884, "(1)" + line 398, ".input.spin", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 885, "else" + line 398, ".input.spin", state 888, "(1)" + line 402, ".input.spin", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 898, "(1)" + line 402, ".input.spin", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 899, "else" + line 402, ".input.spin", state 902, "(1)" + line 402, ".input.spin", state 903, "(1)" + line 402, ".input.spin", state 903, "(1)" + line 400, ".input.spin", state 908, "((i<1))" + line 400, ".input.spin", state 908, "((i>=1))" + line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 927, "(1)" + line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, ".input.spin", state 928, "else" + line 408, ".input.spin", state 931, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 412, ".input.spin", state 940, "(1)" + line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, ".input.spin", state 941, "else" + line 412, ".input.spin", state 944, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 410, ".input.spin", state 950, "((i<1))" + line 410, ".input.spin", state 950, "((i>=1))" + line 417, ".input.spin", state 957, "(1)" + line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, ".input.spin", state 958, "else" + line 417, ".input.spin", state 961, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1040, "(1)" + line 417, ".input.spin", state 1057, "(1)" + line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1130, "(1)" + line 417, ".input.spin", state 1147, "(1)" + line 398, ".input.spin", state 1166, "(1)" + line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1222, "(1)" + line 417, ".input.spin", state 1239, "(1)" + line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, ".input.spin", state 1315, "(1)" + line 417, ".input.spin", state 1332, "(1)" + line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1378, "(1)" + line 163, ".input.spin", state 1386, "(1)" + line 167, ".input.spin", state 1398, "(1)" + line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1508, "(1)" + line 163, ".input.spin", state 1516, "(1)" + line 167, ".input.spin", state 1528, "(1)" + line 398, ".input.spin", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 1552, "(1)" + line 398, ".input.spin", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, ".input.spin", state 1553, "else" + line 398, ".input.spin", state 1556, "(1)" + line 402, ".input.spin", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 1566, "(1)" + line 402, ".input.spin", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, ".input.spin", state 1567, "else" + line 402, ".input.spin", state 1570, "(1)" + line 402, ".input.spin", state 1571, "(1)" + line 402, ".input.spin", state 1571, "(1)" + line 400, ".input.spin", state 1576, "((i<1))" + line 400, ".input.spin", state 1576, "((i>=1))" + line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, ".input.spin", state 1595, "(1)" + line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, ".input.spin", state 1596, "else" + line 408, ".input.spin", state 1599, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 412, ".input.spin", state 1608, "(1)" + line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, ".input.spin", state 1609, "else" + line 412, ".input.spin", state 1612, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 410, ".input.spin", state 1618, "((i<1))" + line 410, ".input.spin", state 1618, "((i>=1))" + line 417, ".input.spin", state 1625, "(1)" + line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, ".input.spin", state 1626, "else" + line 417, ".input.spin", state 1629, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1681, "(1)" + line 163, ".input.spin", state 1689, "(1)" + line 167, ".input.spin", state 1701, "(1)" + line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, ".input.spin", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, ".input.spin", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, ".input.spin", state 1811, "(1)" + line 163, ".input.spin", state 1819, "(1)" + line 167, ".input.spin", state 1831, "(1)" + line 701, ".input.spin", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) + +pan: elapsed time 384 seconds +pan: rate 114968.77 states/second +pan: avg transition delay 7.2389e-07 usec +cp .input.spin asserts.spin.input +cp .input.spin.trail asserts.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/asserts.spin.input b/urcu/result-signal-over-reader/asserts.spin.input new file mode 100644 index 0000000..2d7f62d --- /dev/null +++ b/urcu/result-signal-over-reader/asserts.spin.input @@ -0,0 +1,722 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/asserts.spin.input.trail b/urcu/result-signal-over-reader/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu/result-signal-over-reader/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu/result-signal-over-reader/urcu.sh b/urcu/result-signal-over-reader/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu/result-signal-over-reader/urcu.spin b/urcu/result-signal-over-reader/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_free.log b/urcu/result-signal-over-reader/urcu_free.log new file mode 100644 index 0000000..a6ab537 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free.log @@ -0,0 +1,326 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) +Depth= 6837 States= 1e+06 Transitions= 9.03e+06 Memory= 534.904 t= 7.74 R= 1e+05 +Depth= 8887 States= 2e+06 Transitions= 1.88e+07 Memory= 603.557 t= 16.6 R= 1e+05 +Depth= 8887 States= 3e+06 Transitions= 3.14e+07 Memory= 672.209 t= 28 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 8887 States= 4e+06 Transitions= 4.33e+07 Memory= 771.885 t= 39.1 R= 1e+05 +Depth= 8887 States= 5e+06 Transitions= 5.65e+07 Memory= 840.635 t= 50.7 R= 1e+05 +Depth= 8887 States= 6e+06 Transitions= 6.79e+07 Memory= 909.287 t= 61 R= 1e+05 +Depth= 8887 States= 7e+06 Transitions= 8.08e+07 Memory= 977.940 t= 72.6 R= 1e+05 +Depth= 8887 States= 8e+06 Transitions= 9.5e+07 Memory= 1046.592 t= 85.5 R= 9e+04 +Depth= 8887 States= 9e+06 Transitions= 1.07e+08 Memory= 1115.342 t= 96.7 R= 9e+04 +pan: resizing hashtable to -w24.. done +Depth= 8887 States= 1e+07 Transitions= 1.18e+08 Memory= 1308.088 t= 108 R= 9e+04 +Depth= 8887 States= 1.1e+07 Transitions= 1.3e+08 Memory= 1376.740 t= 119 R= 9e+04 +Depth= 8887 States= 1.2e+07 Transitions= 1.41e+08 Memory= 1445.393 t= 128 R= 9e+04 +Depth= 8887 States= 1.3e+07 Transitions= 1.51e+08 Memory= 1514.045 t= 138 R= 9e+04 +Depth= 8887 States= 1.4e+07 Transitions= 1.64e+08 Memory= 1582.795 t= 149 R= 9e+04 +Depth= 8887 States= 1.5e+07 Transitions= 1.77e+08 Memory= 1651.447 t= 160 R= 9e+04 +Depth= 8887 States= 1.6e+07 Transitions= 1.9e+08 Memory= 1720.100 t= 172 R= 9e+04 +Depth= 8887 States= 1.7e+07 Transitions= 2.02e+08 Memory= 1788.752 t= 183 R= 9e+04 +Depth= 8887 States= 1.8e+07 Transitions= 2.15e+08 Memory= 1857.502 t= 194 R= 9e+04 +Depth= 8887 States= 1.9e+07 Transitions= 2.29e+08 Memory= 1926.154 t= 207 R= 9e+04 +Depth= 8887 States= 2e+07 Transitions= 2.4e+08 Memory= 1994.807 t= 217 R= 9e+04 +Depth= 8887 States= 2.1e+07 Transitions= 2.51e+08 Memory= 2063.459 t= 227 R= 9e+04 +Depth= 8887 States= 2.2e+07 Transitions= 2.63e+08 Memory= 2132.209 t= 238 R= 9e+04 +Depth= 8887 States= 2.3e+07 Transitions= 2.74e+08 Memory= 2200.861 t= 248 R= 9e+04 +Depth= 8887 States= 2.4e+07 Transitions= 2.86e+08 Memory= 2269.514 t= 259 R= 9e+04 +Depth= 8887 States= 2.5e+07 Transitions= 2.98e+08 Memory= 2338.166 t= 270 R= 9e+04 +Depth= 8887 States= 2.6e+07 Transitions= 3.1e+08 Memory= 2406.916 t= 281 R= 9e+04 +Depth= 8887 States= 2.7e+07 Transitions= 3.24e+08 Memory= 2475.568 t= 294 R= 9e+04 +Depth= 8887 States= 2.8e+07 Transitions= 3.36e+08 Memory= 2544.221 t= 305 R= 9e+04 +Depth= 8887 States= 2.9e+07 Transitions= 3.49e+08 Memory= 2612.873 t= 317 R= 9e+04 +Depth= 8887 States= 3e+07 Transitions= 3.63e+08 Memory= 2681.526 t= 329 R= 9e+04 +Depth= 8887 States= 3.1e+07 Transitions= 3.73e+08 Memory= 2750.276 t= 339 R= 9e+04 +Depth= 8887 States= 3.2e+07 Transitions= 3.85e+08 Memory= 2818.928 t= 351 R= 9e+04 +Depth= 8887 States= 3.3e+07 Transitions= 3.97e+08 Memory= 2887.580 t= 362 R= 9e+04 +Depth= 8887 States= 3.4e+07 Transitions= 4.08e+08 Memory= 2956.233 t= 373 R= 9e+04 +pan: resizing hashtable to -w26.. done +Depth= 8887 States= 3.5e+07 Transitions= 4.2e+08 Memory= 3520.967 t= 391 R= 9e+04 +Depth= 8887 States= 3.6e+07 Transitions= 4.32e+08 Memory= 3589.619 t= 402 R= 9e+04 +Depth= 8887 States= 3.7e+07 Transitions= 4.44e+08 Memory= 3658.272 t= 413 R= 9e+04 +Depth= 8887 States= 3.8e+07 Transitions= 4.58e+08 Memory= 3727.022 t= 425 R= 9e+04 +Depth= 8887 States= 3.9e+07 Transitions= 4.7e+08 Memory= 3795.674 t= 435 R= 9e+04 +Depth= 8887 States= 4e+07 Transitions= 4.83e+08 Memory= 3864.326 t= 447 R= 9e+04 +Depth= 8887 States= 4.1e+07 Transitions= 4.97e+08 Memory= 3932.979 t= 459 R= 9e+04 +Depth= 8887 States= 4.2e+07 Transitions= 5.07e+08 Memory= 4001.729 t= 468 R= 9e+04 +Depth= 8887 States= 4.3e+07 Transitions= 5.19e+08 Memory= 4070.381 t= 479 R= 9e+04 +Depth= 8887 States= 4.4e+07 Transitions= 5.31e+08 Memory= 4139.033 t= 489 R= 9e+04 +Depth= 8887 States= 4.5e+07 Transitions= 5.42e+08 Memory= 4207.686 t= 499 R= 9e+04 +Depth= 8887 States= 4.6e+07 Transitions= 5.54e+08 Memory= 4276.338 t= 510 R= 9e+04 +Depth= 8887 States= 4.7e+07 Transitions= 5.67e+08 Memory= 4345.088 t= 521 R= 9e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 8887, errors: 0 + 47143033 states, stored +5.2129161e+08 states, matched +5.6843464e+08 transitions (= stored+matched) +1.9783052e+09 atomic steps +hash conflicts: 3.1395137e+08 (resolved) + +Stats on memory usage (in Megabytes): + 4136.237 equivalent memory usage for states (stored*(State-vector + overhead)) + 3385.741 actual memory usage for states (compression: 81.86%) + state-vector as stored = 47 byte + 28 byte overhead + 512.000 memory used for hash table (-w26) + 457.764 memory used for DFS stack (-m10000000) + 4354.854 total actual memory usage + +unreached in proctype urcu_reader + line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 61, "(1)" + line 417, "pan.___", state 91, "(1)" + line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 158, "(1)" + line 417, "pan.___", state 188, "(1)" + line 398, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 256, "(1)" + line 417, "pan.___", state 286, "(1)" + line 398, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 395, "(1)" + line 417, "pan.___", state 425, "(1)" + line 539, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 398, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 70, "(1)" + line 417, "pan.___", state 100, "(1)" + line 398, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 158, "(1)" + line 417, "pan.___", state 188, "(1)" + line 398, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 247, "(1)" + line 417, "pan.___", state 277, "(1)" + line 398, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 359, "(1)" + line 417, "pan.___", state 389, "(1)" + line 613, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 59, "(1)" + line 412, "pan.___", state 72, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 153, "(1)" + line 412, "pan.___", state 166, "(1)" + line 651, "pan.___", state 199, "(1)" + line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 240, "(1)" + line 163, "pan.___", state 248, "(1)" + line 167, "pan.___", state 260, "(1)" + line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 370, "(1)" + line 163, "pan.___", state 378, "(1)" + line 167, "pan.___", state 390, "(1)" + line 398, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 449, "(1)" + line 412, "pan.___", state 462, "(1)" + line 417, "pan.___", state 479, "(1)" + line 398, "pan.___", state 498, "(1)" + line 402, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 554, "(1)" + line 417, "pan.___", state 571, "(1)" + line 402, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 647, "(1)" + line 417, "pan.___", state 664, "(1)" + line 178, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 710, "(1)" + line 163, "pan.___", state 718, "(1)" + line 167, "pan.___", state 730, "(1)" + line 174, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 840, "(1)" + line 163, "pan.___", state 848, "(1)" + line 167, "pan.___", state 860, "(1)" + line 398, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 884, "(1)" + line 398, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 885, "else" + line 398, "pan.___", state 888, "(1)" + line 402, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 898, "(1)" + line 402, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 899, "else" + line 402, "pan.___", state 902, "(1)" + line 402, "pan.___", state 903, "(1)" + line 402, "pan.___", state 903, "(1)" + line 400, "pan.___", state 908, "((i<1))" + line 400, "pan.___", state 908, "((i>=1))" + line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 927, "(1)" + line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, "pan.___", state 928, "else" + line 408, "pan.___", state 931, "(1)" + line 408, "pan.___", state 932, "(1)" + line 408, "pan.___", state 932, "(1)" + line 412, "pan.___", state 940, "(1)" + line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, "pan.___", state 941, "else" + line 412, "pan.___", state 944, "(1)" + line 412, "pan.___", state 945, "(1)" + line 412, "pan.___", state 945, "(1)" + line 410, "pan.___", state 950, "((i<1))" + line 410, "pan.___", state 950, "((i>=1))" + line 417, "pan.___", state 957, "(1)" + line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, "pan.___", state 958, "else" + line 417, "pan.___", state 961, "(1)" + line 417, "pan.___", state 962, "(1)" + line 417, "pan.___", state 962, "(1)" + line 419, "pan.___", state 965, "(1)" + line 419, "pan.___", state 965, "(1)" + line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1040, "(1)" + line 417, "pan.___", state 1057, "(1)" + line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1130, "(1)" + line 417, "pan.___", state 1147, "(1)" + line 398, "pan.___", state 1166, "(1)" + line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1222, "(1)" + line 417, "pan.___", state 1239, "(1)" + line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 412, "pan.___", state 1315, "(1)" + line 417, "pan.___", state 1332, "(1)" + line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1378, "(1)" + line 163, "pan.___", state 1386, "(1)" + line 167, "pan.___", state 1398, "(1)" + line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1508, "(1)" + line 163, "pan.___", state 1516, "(1)" + line 167, "pan.___", state 1528, "(1)" + line 398, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 1552, "(1)" + line 398, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 398, "pan.___", state 1553, "else" + line 398, "pan.___", state 1556, "(1)" + line 402, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 1566, "(1)" + line 402, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 402, "pan.___", state 1567, "else" + line 402, "pan.___", state 1570, "(1)" + line 402, "pan.___", state 1571, "(1)" + line 402, "pan.___", state 1571, "(1)" + line 400, "pan.___", state 1576, "((i<1))" + line 400, "pan.___", state 1576, "((i>=1))" + line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1595, "(1)" + line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 408, "pan.___", state 1596, "else" + line 408, "pan.___", state 1599, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 412, "pan.___", state 1608, "(1)" + line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 412, "pan.___", state 1609, "else" + line 412, "pan.___", state 1612, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 410, "pan.___", state 1618, "((i<1))" + line 410, "pan.___", state 1618, "((i>=1))" + line 417, "pan.___", state 1625, "(1)" + line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 417, "pan.___", state 1626, "else" + line 417, "pan.___", state 1629, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1681, "(1)" + line 163, "pan.___", state 1689, "(1)" + line 167, "pan.___", state 1701, "(1)" + line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 178, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 182, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 159, "pan.___", state 1811, "(1)" + line 163, "pan.___", state 1819, "(1)" + line 167, "pan.___", state 1831, "(1)" + line 701, "pan.___", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 748, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 523 seconds +pan: rate 90149.985 states/second +pan: avg transition delay 9.1997e-07 usec +cp .input.spin urcu_free.spin.input +cp .input.spin.trail urcu_free.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_free.ltl b/urcu/result-signal-over-reader/urcu_free.ltl new file mode 100644 index 0000000..1954414 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free.ltl @@ -0,0 +1 @@ +[] (read_free -> !read_free_race) diff --git a/urcu/result-signal-over-reader/urcu_free.spin.input b/urcu/result-signal-over-reader/urcu_free.spin.input new file mode 100644 index 0000000..2d7f62d --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free.spin.input @@ -0,0 +1,722 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_free.spin.input.trail b/urcu/result-signal-over-reader/urcu_free.spin.input.trail new file mode 100644 index 0000000..837f3d9 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free.spin.input.trail @@ -0,0 +1,15043 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 +25:4:4362 +26:0:4365 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/dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_mb.log @@ -0,0 +1,303 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +Depth= 6009 States= 1e+06 Transitions= 1.08e+07 Memory= 534.904 t= 9.22 R= 1e+05 +Depth= 6009 States= 2e+06 Transitions= 3.4e+07 Memory= 603.557 t= 31.1 R= 6e+04 +Depth= 7527 States= 3e+06 Transitions= 4.91e+07 Memory= 672.209 t= 45.6 R= 7e+04 +pan: resizing hashtable to -w22.. done +Depth= 68651 States= 4e+06 Transitions= 6.74e+07 Memory= 772.080 t= 62.9 R= 6e+04 +Depth= 68651 States= 5e+06 Transitions= 8.62e+07 Memory= 840.733 t= 80.2 R= 6e+04 +Depth= 68651 States= 6e+06 Transitions= 1.03e+08 Memory= 909.385 t= 95.7 R= 6e+04 +Depth= 68651 States= 7e+06 Transitions= 1.21e+08 Memory= 978.037 t= 112 R= 6e+04 +Depth= 68651 States= 8e+06 Transitions= 1.37e+08 Memory= 1046.690 t= 128 R= 6e+04 +Depth= 68651 States= 9e+06 Transitions= 1.52e+08 Memory= 1115.440 t= 143 R= 6e+04 +pan: resizing hashtable to -w24.. done +Depth= 68651 States= 1e+07 Transitions= 1.72e+08 Memory= 1308.186 t= 163 R= 6e+04 +Depth= 68651 States= 1.1e+07 Transitions= 1.89e+08 Memory= 1376.838 t= 178 R= 6e+04 +Depth= 68651 States= 1.2e+07 Transitions= 2.05e+08 Memory= 1445.490 t= 193 R= 6e+04 +Depth= 68651 States= 1.3e+07 Transitions= 2.22e+08 Memory= 1514.143 t= 208 R= 6e+04 +Depth= 68651 States= 1.4e+07 Transitions= 2.39e+08 Memory= 1582.893 t= 224 R= 6e+04 +pan: claim violated! (at depth 2141) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 88 byte, depth reached 68651, errors: 1 + 14155711 states, stored +2.2815817e+08 states, matched +2.4231388e+08 transitions (= stored+matched) +8.5461256e+08 atomic steps +hash conflicts: 1.1483359e+08 (resolved) + +Stats on memory usage (in Megabytes): + 1565.993 equivalent memory usage for states (stored*(State-vector + overhead)) + 1008.042 actual memory usage for states (compression: 64.37%) + state-vector as stored = 47 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1593.537 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 227, "(1)" + line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 256, "(1)" + line 419, "pan.___", state 286, "(1)" + line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 366, "(1)" + line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 395, "(1)" + line 419, "pan.___", state 425, "(1)" + line 541, "pan.___", state 456, "-end-" + (19 of 456 states) +unreached in proctype urcu_reader_sig + line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 70, "(1)" + line 419, "pan.___", state 100, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 247, "(1)" + line 419, "pan.___", state 277, "(1)" + line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 330, "(1)" + line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 359, "(1)" + line 419, "pan.___", state 389, "(1)" + line 615, "pan.___", state 411, "-end-" + (18 of 411 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 421, "pan.___", state 97, "(1)" + line 421, "pan.___", state 97, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 410, "pan.___", state 153, "(1)" + line 414, "pan.___", state 166, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 653, "pan.___", state 199, "(1)" + line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 254, "(1)" + line 414, "pan.___", state 267, "(1)" + line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 345, "(1)" + line 414, "pan.___", state 358, "(1)" + line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 440, "(1)" + line 414, "pan.___", state 453, "(1)" + line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 533, "(1)" + line 414, "pan.___", state 546, "(1)" + line 400, "pan.___", state 582, "(1)" + line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 638, "(1)" + line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 731, "(1)" + line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 821, "(1)" + line 419, "pan.___", state 838, "(1)" + line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 912, "(1)" + line 419, "pan.___", state 929, "(1)" + line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1007, "(1)" + line 419, "pan.___", state 1024, "(1)" + line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1053, "else" + line 400, "pan.___", state 1056, "(1)" + line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1066, "(1)" + line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1067, "else" + line 404, "pan.___", state 1070, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 402, "pan.___", state 1076, "((i<1))" + line 402, "pan.___", state 1076, "((i>=1))" + line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1095, "(1)" + line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1096, "else" + line 410, "pan.___", state 1099, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 414, "pan.___", state 1108, "(1)" + line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1109, "else" + line 414, "pan.___", state 1112, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 412, "pan.___", state 1118, "((i<1))" + line 412, "pan.___", state 1118, "((i>=1))" + line 419, "pan.___", state 1125, "(1)" + line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1126, "else" + line 419, "pan.___", state 1129, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1208, "(1)" + line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1298, "(1)" + line 400, "pan.___", state 1334, "(1)" + line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1390, "(1)" + line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1483, "(1)" + line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1573, "(1)" + line 419, "pan.___", state 1590, "(1)" + line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1664, "(1)" + line 419, "pan.___", state 1681, "(1)" + line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1759, "(1)" + line 419, "pan.___", state 1776, "(1)" + line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1804, "(1)" + line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1805, "else" + line 400, "pan.___", state 1808, "(1)" + line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1818, "(1)" + line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1819, "else" + line 404, "pan.___", state 1822, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 402, "pan.___", state 1828, "((i<1))" + line 402, "pan.___", state 1828, "((i>=1))" + line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1847, "(1)" + line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1848, "else" + line 410, "pan.___", state 1851, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 414, "pan.___", state 1860, "(1)" + line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1861, "else" + line 414, "pan.___", state 1864, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 412, "pan.___", state 1870, "((i<1))" + line 412, "pan.___", state 1870, "((i>=1))" + line 419, "pan.___", state 1877, "(1)" + line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1878, "else" + line 419, "pan.___", state 1881, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1960, "(1)" + line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 2051, "(1)" + line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 2146, "(1)" + line 703, "pan.___", state 2192, "-end-" + (144 of 2192 states) +unreached in proctype :init: + line 710, "pan.___", state 9, "((j<2))" + line 710, "pan.___", state 9, "((j>=2))" + line 711, "pan.___", state 20, "((j<2))" + line 711, "pan.___", state 20, "((j>=2))" + line 716, "pan.___", state 33, "((j<2))" + line 716, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 750, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 227 seconds +pan: rate 62472.797 states/second +pan: avg transition delay 9.3511e-07 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input b/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..5de16b8 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input @@ -0,0 +1,724 @@ +#define NO_RMB +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input.trail b/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..d437aad --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2144 @@ +-2:4:-2 +-4:-4:-4 +1:0:3107 +2:4:3059 +3:4:3062 +4:4:3062 +5:4:3065 +6:4:3073 +7:4:3073 +8:4:3076 +9:4:3082 +10:4:3086 +11:4:3086 +12:4:3089 +13:4:3097 +14:4:3101 +15:4:3102 +16:0:3107 +17:4:3104 +18:0:3107 +19:3:869 +20:0:3107 +21:3:875 +22:0:3107 +23:3:876 +24:0:3107 +25:3:877 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+2122:2:741 +2123:0:3107 +2124:3:3053 +2125:0:3107 +2126:2:750 +2127:0:3107 +2128:3:3052 +2129:0:3107 +2130:2:753 +2131:0:3107 +2132:3:3053 +2133:0:3107 +2134:2:758 +2135:0:3107 +2136:3:3052 +2137:0:3107 +2138:2:759 +2139:0:3105 +2140:3:3053 +2141:0:3111 +2142:2:647 diff --git a/urcu/result-signal-over-reader/urcu_free_no_rmb.define b/urcu/result-signal-over-reader/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu/result-signal-over-reader/urcu_free_no_rmb.log b/urcu/result-signal-over-reader/urcu_free_no_rmb.log new file mode 100644 index 0000000..5bcef22 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_rmb.log @@ -0,0 +1,300 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 5678 States= 1e+06 Transitions= 8.21e+06 Memory= 534.904 t= 6.72 R= 1e+05 +Depth= 5678 States= 2e+06 Transitions= 1.6e+07 Memory= 603.557 t= 13.4 R= 1e+05 +Depth= 16003 States= 3e+06 Transitions= 2.49e+07 Memory= 672.209 t= 21.5 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 31043 States= 4e+06 Transitions= 3.44e+07 Memory= 771.983 t= 30.1 R= 1e+05 +Depth= 31043 States= 5e+06 Transitions= 4.41e+07 Memory= 840.635 t= 38.4 R= 1e+05 +Depth= 31043 States= 6e+06 Transitions= 5.25e+07 Memory= 909.287 t= 45.7 R= 1e+05 +Depth= 31043 States= 7e+06 Transitions= 6.12e+07 Memory= 977.940 t= 53.4 R= 1e+05 +Depth= 31043 States= 8e+06 Transitions= 6.95e+07 Memory= 1046.690 t= 60.8 R= 1e+05 +Depth= 31043 States= 9e+06 Transitions= 7.78e+07 Memory= 1115.342 t= 68.5 R= 1e+05 +pan: resizing hashtable to -w24.. done +Depth= 31043 States= 1e+07 Transitions= 8.68e+07 Memory= 1308.088 t= 77.9 R= 1e+05 +Depth= 31043 States= 1.1e+07 Transitions= 1.01e+08 Memory= 1376.740 t= 90.1 R= 1e+05 +Depth= 31043 States= 1.2e+07 Transitions= 1.13e+08 Memory= 1445.393 t= 101 R= 1e+05 +Depth= 31043 States= 1.3e+07 Transitions= 1.25e+08 Memory= 1514.045 t= 111 R= 1e+05 +Depth= 31043 States= 1.4e+07 Transitions= 1.38e+08 Memory= 1582.795 t= 122 R= 1e+05 +pan: claim violated! (at depth 1774) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 31043, errors: 1 + 14288659 states, stored +1.2755714e+08 states, matched +1.418458e+08 transitions (= stored+matched) +4.6616273e+08 atomic steps +hash conflicts: 65726574 (resolved) + +Stats on memory usage (in Megabytes): + 1253.659 equivalent memory usage for states (stored*(State-vector + overhead)) + 1017.191 actual memory usage for states (compression: 81.14%) + state-vector as stored = 47 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1602.619 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 291, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 304, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 320, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 334, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 352, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 365, "(1)" + line 413, "pan.___", state 378, "(1)" + line 418, "pan.___", state 395, "(1)" + line 399, "pan.___", state 414, "(1)" + line 403, "pan.___", state 426, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 444, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 470, "(1)" + line 418, "pan.___", state 487, "(1)" + line 403, "pan.___", state 519, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 537, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 563, "(1)" + line 418, "pan.___", state 580, "(1)" + line 179, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 629, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 677, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 690, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 714, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 716, "(1)" + line 399, "pan.___", state 717, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 717, "else" + line 399, "pan.___", state 720, "(1)" + line 403, "pan.___", state 728, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 730, "(1)" + line 403, "pan.___", state 731, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 731, "else" + line 403, "pan.___", state 734, "(1)" + line 403, "pan.___", state 735, "(1)" + line 403, "pan.___", state 735, "(1)" + line 401, "pan.___", state 740, "((i<1))" + line 401, "pan.___", state 740, "((i>=1))" + line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 759, "(1)" + line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 760, "else" + line 409, "pan.___", state 763, "(1)" + line 409, "pan.___", state 764, "(1)" + line 409, "pan.___", state 764, "(1)" + line 413, "pan.___", state 772, "(1)" + line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 773, "else" + line 413, "pan.___", state 776, "(1)" + line 413, "pan.___", state 777, "(1)" + line 413, "pan.___", state 777, "(1)" + line 411, "pan.___", state 782, "((i<1))" + line 411, "pan.___", state 782, "((i>=1))" + line 418, "pan.___", state 789, "(1)" + line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 790, "else" + line 418, "pan.___", state 793, "(1)" + line 418, "pan.___", state 794, "(1)" + line 418, "pan.___", state 794, "(1)" + line 420, "pan.___", state 797, "(1)" + line 420, "pan.___", state 797, "(1)" + line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 872, "(1)" + line 418, "pan.___", state 889, "(1)" + line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 962, "(1)" + line 418, "pan.___", state 979, "(1)" + line 399, "pan.___", state 998, "(1)" + line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1054, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1147, "(1)" + line 418, "pan.___", state 1164, "(1)" + line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1261, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1298, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1300, "(1)" + line 399, "pan.___", state 1301, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1301, "else" + line 399, "pan.___", state 1304, "(1)" + line 403, "pan.___", state 1312, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1314, "(1)" + line 403, "pan.___", state 1315, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1315, "else" + line 403, "pan.___", state 1318, "(1)" + line 403, "pan.___", state 1319, "(1)" + line 403, "pan.___", state 1319, "(1)" + line 401, "pan.___", state 1324, "((i<1))" + line 401, "pan.___", state 1324, "((i>=1))" + line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1343, "(1)" + line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1344, "else" + line 409, "pan.___", state 1347, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 413, "pan.___", state 1356, "(1)" + line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1357, "else" + line 413, "pan.___", state 1360, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 411, "pan.___", state 1366, "((i<1))" + line 411, "pan.___", state 1366, "((i>=1))" + line 418, "pan.___", state 1373, "(1)" + line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1374, "else" + line 418, "pan.___", state 1377, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1480, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1493, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 702, "pan.___", state 1520, "-end-" + (144 of 1520 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 125 seconds +pan: rate 114108.44 states/second +pan: avg transition delay 8.8279e-07 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input b/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..ccf5f5c --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input @@ -0,0 +1,723 @@ +#define NO_RMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail b/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..1e5e132 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1777 @@ +-2:4:-2 +-4:-4:-4 +1:0:2435 +2:4:2387 +3:4:2390 +4:4:2390 +5:4:2393 +6:4:2401 +7:4:2401 +8:4:2404 +9:4:2410 +10:4:2414 +11:4:2414 +12:4:2417 +13:4:2425 +14:4:2429 +15:4:2430 +16:0:2435 +17:4:2432 +18:0:2435 +19:3:869 +20:0:2435 +21:3:875 +22:0:2435 +23:3:876 +24:0:2435 +25:3:877 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+1738:2:672 +1739:2:673 +1740:2:681 +1741:2:686 +1742:2:690 +1743:2:691 +1744:2:698 +1745:2:699 +1746:2:710 +1747:2:711 +1748:2:712 +1749:2:723 +1750:2:735 +1751:2:736 +1752:0:2435 +1753:3:2380 +1754:0:2435 +1755:2:741 +1756:0:2435 +1757:3:2381 +1758:0:2435 +1759:2:750 +1760:0:2435 +1761:3:2380 +1762:0:2435 +1763:2:753 +1764:0:2435 +1765:3:2381 +1766:0:2435 +1767:2:758 +1768:0:2435 +1769:3:2380 +1770:0:2435 +1771:2:759 +1772:0:2433 +1773:3:2381 +1774:0:2439 +1775:0:2435 diff --git a/urcu/result-signal-over-reader/urcu_free_no_wmb.define b/urcu/result-signal-over-reader/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu/result-signal-over-reader/urcu_free_no_wmb.log b/urcu/result-signal-over-reader/urcu_free_no_wmb.log new file mode 100644 index 0000000..0423ec5 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_wmb.log @@ -0,0 +1,320 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 10656 States= 1e+06 Transitions= 8.86e+06 Memory= 534.807 t= 7.38 R= 1e+05 +Depth= 35214 States= 2e+06 Transitions= 1.82e+07 Memory= 603.557 t= 15.5 R= 1e+05 +Depth= 35214 States= 3e+06 Transitions= 2.73e+07 Memory= 672.209 t= 23.8 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 35214 States= 4e+06 Transitions= 4.08e+07 Memory= 771.885 t= 35.9 R= 1e+05 +pan: claim violated! (at depth 1650) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 35214, errors: 1 + 4154272 states, stored + 38595853 states, matched + 42750125 transitions (= stored+matched) +1.4058824e+08 atomic steps +hash conflicts: 21492325 (resolved) + +Stats on memory usage (in Megabytes): + 364.488 equivalent memory usage for states (stored*(State-vector + overhead)) + 292.863 actual memory usage for states (compression: 80.35%) + state-vector as stored = 46 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 782.529 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 227, "(1)" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 366, "(1)" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (19 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 330, "(1)" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (18 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 401, "pan.___", state 134, "((i<1))" + line 401, "pan.___", state 134, "((i>=1))" + line 409, "pan.___", state 153, "(1)" + line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 154, "else" + line 409, "pan.___", state 157, "(1)" + line 409, "pan.___", state 158, "(1)" + line 409, "pan.___", state 158, "(1)" + line 413, "pan.___", state 166, "(1)" + line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 167, "else" + line 413, "pan.___", state 170, "(1)" + line 413, "pan.___", state 171, "(1)" + line 413, "pan.___", state 171, "(1)" + line 411, "pan.___", state 176, "((i<1))" + line 411, "pan.___", state 176, "((i>=1))" + line 418, "pan.___", state 183, "(1)" + line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 184, "else" + line 418, "pan.___", state 187, "(1)" + line 418, "pan.___", state 188, "(1)" + line 418, "pan.___", state 188, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 369, "pan.___", state 193, "(1)" + line 652, "pan.___", state 199, "(1)" + line 646, "pan.___", state 202, "((write_lock==0))" + line 646, "pan.___", state 202, "else" + line 644, "pan.___", state 203, "(1)" + line 160, "pan.___", state 209, "(1)" + line 164, "pan.___", state 217, "(1)" + line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 164, "pan.___", state 218, "else" + line 162, "pan.___", state 223, "((j<1))" + line 162, "pan.___", state 223, "((j>=1))" + line 168, "pan.___", state 229, "(1)" + line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 168, "pan.___", state 230, "else" + line 160, "pan.___", state 241, "(1)" + line 168, "pan.___", state 261, "(1)" + line 160, "pan.___", state 277, "(1)" + line 164, "pan.___", state 285, "(1)" + line 168, "pan.___", state 297, "(1)" + line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 356, "(1)" + line 413, "pan.___", state 369, "(1)" + line 418, "pan.___", state 386, "(1)" + line 399, "pan.___", state 405, "(1)" + line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 461, "(1)" + line 418, "pan.___", state 478, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 164, "pan.___", state 594, "(1)" + line 168, "pan.___", state 606, "(1)" + line 160, "pan.___", state 618, "(1)" + line 168, "pan.___", state 638, "(1)" + line 164, "pan.___", state 662, "(1)" + line 168, "pan.___", state 674, "(1)" + line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 698, "(1)" + line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 699, "else" + line 399, "pan.___", state 702, "(1)" + line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 712, "(1)" + line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 713, "else" + line 403, "pan.___", state 716, "(1)" + line 403, "pan.___", state 717, "(1)" + line 403, "pan.___", state 717, "(1)" + line 401, "pan.___", state 722, "((i<1))" + line 401, "pan.___", state 722, "((i>=1))" + line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 741, "(1)" + line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 742, "else" + line 409, "pan.___", state 745, "(1)" + line 409, "pan.___", state 746, "(1)" + line 409, "pan.___", state 746, "(1)" + line 413, "pan.___", state 754, "(1)" + line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 755, "else" + line 413, "pan.___", state 758, "(1)" + line 413, "pan.___", state 759, "(1)" + line 413, "pan.___", state 759, "(1)" + line 411, "pan.___", state 764, "((i<1))" + line 411, "pan.___", state 764, "((i>=1))" + line 418, "pan.___", state 771, "(1)" + line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 772, "else" + line 418, "pan.___", state 775, "(1)" + line 418, "pan.___", state 776, "(1)" + line 418, "pan.___", state 776, "(1)" + line 420, "pan.___", state 779, "(1)" + line 420, "pan.___", state 779, "(1)" + line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 854, "(1)" + line 418, "pan.___", state 871, "(1)" + line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 944, "(1)" + line 418, "pan.___", state 961, "(1)" + line 399, "pan.___", state 980, "(1)" + line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1036, "(1)" + line 418, "pan.___", state 1053, "(1)" + line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1129, "(1)" + line 418, "pan.___", state 1146, "(1)" + line 164, "pan.___", state 1169, "(1)" + line 168, "pan.___", state 1181, "(1)" + line 160, "pan.___", state 1193, "(1)" + line 168, "pan.___", state 1213, "(1)" + line 164, "pan.___", state 1237, "(1)" + line 168, "pan.___", state 1249, "(1)" + line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1273, "(1)" + line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1274, "else" + line 399, "pan.___", state 1277, "(1)" + line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1287, "(1)" + line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1288, "else" + line 403, "pan.___", state 1291, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 401, "pan.___", state 1297, "((i<1))" + line 401, "pan.___", state 1297, "((i>=1))" + line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1316, "(1)" + line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1317, "else" + line 409, "pan.___", state 1320, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 413, "pan.___", state 1329, "(1)" + line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1330, "else" + line 413, "pan.___", state 1333, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 411, "pan.___", state 1339, "((i<1))" + line 411, "pan.___", state 1339, "((i>=1))" + line 418, "pan.___", state 1346, "(1)" + line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1347, "else" + line 418, "pan.___", state 1350, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 164, "pan.___", state 1379, "(1)" + line 168, "pan.___", state 1391, "(1)" + line 160, "pan.___", state 1403, "(1)" + line 168, "pan.___", state 1423, "(1)" + line 164, "pan.___", state 1447, "(1)" + line 168, "pan.___", state 1459, "(1)" + line 702, "pan.___", state 1484, "-end-" + (160 of 1484 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 37.6 seconds +pan: rate 110515.35 states/second +pan: avg transition delay 8.793e-07 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input b/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..d5d174d --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input @@ -0,0 +1,723 @@ +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail b/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..f2ce974 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1653 @@ +-2:4:-2 +-4:-4:-4 +1:0:2399 +2:4:2351 +3:4:2354 +4:4:2354 +5:4:2357 +6:4:2365 +7:4:2365 +8:4:2368 +9:4:2374 +10:4:2378 +11:4:2378 +12:4:2381 +13:4:2389 +14:4:2393 +15:4:2394 +16:0:2399 +17:4:2396 +18:0:2399 +19:3:869 +20:0:2399 +21:3:875 +22:0:2399 +23:3:876 +24:0:2399 +25:3:877 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index 0000000..5e642ef --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu/result-signal-over-reader/urcu_free_single_flip.log b/urcu/result-signal-over-reader/urcu_free_single_flip.log new file mode 100644 index 0000000..5d7d35c --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_single_flip.log @@ -0,0 +1,217 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 8352 States= 1e+06 Transitions= 1.05e+07 Memory= 534.807 t= 8.93 R= 1e+05 +pan: claim violated! (at depth 1352) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 8352, errors: 1 + 1456373 states, stored + 13442538 states, matched + 14898911 transitions (= stored+matched) + 50580660 atomic steps +hash conflicts: 5166006 (resolved) + +Stats on memory usage (in Megabytes): + 127.779 equivalent memory usage for states (stored*(State-vector + overhead)) + 100.443 actual memory usage for states (compression: 78.61%) + state-vector as stored = 44 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 566.154 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 370, "(1)" + line 164, "pan.___", state 378, "(1)" + line 168, "pan.___", state 390, "(1)" + line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 449, "(1)" + line 413, "pan.___", state 462, "(1)" + line 418, "pan.___", state 479, "(1)" + line 399, "pan.___", state 498, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 647, "(1)" + line 418, "pan.___", state 664, "(1)" + line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 710, "(1)" + line 164, "pan.___", state 718, "(1)" + line 168, "pan.___", state 730, "(1)" + line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 840, "(1)" + line 164, "pan.___", state 848, "(1)" + line 168, "pan.___", state 860, "(1)" + line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 884, "(1)" + line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 885, "else" + line 399, "pan.___", state 888, "(1)" + line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 898, "(1)" + line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 899, "else" + line 403, "pan.___", state 902, "(1)" + line 403, "pan.___", state 903, "(1)" + line 403, "pan.___", state 903, "(1)" + line 401, "pan.___", state 908, "((i<1))" + line 401, "pan.___", state 908, "((i>=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1013, "(1)" + line 164, "pan.___", state 1021, "(1)" + line 168, "pan.___", state 1033, "(1)" + line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1133, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1143, "(1)" + line 164, "pan.___", state 1151, "(1)" + line 168, "pan.___", state 1163, "(1)" + line 702, "pan.___", state 1188, "-end-" + (100 of 1188 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 12.8 seconds +pan: rate 113424.69 states/second +pan: avg transition delay 8.6181e-07 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input b/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..103464e --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input @@ -0,0 +1,723 @@ +#define SINGLE_FLIP + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input.trail b/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..e81c46c --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1355 @@ +-2:4:-2 +-4:-4:-4 +1:0:2103 +2:4:2055 +3:4:2058 +4:4:2058 +5:4:2061 +6:4:2069 +7:4:2069 +8:4:2072 +9:4:2078 +10:4:2082 +11:4:2082 +12:4:2085 +13:4:2093 +14:4:2097 +15:4:2098 +16:0:2103 +17:4:2100 +18:0:2103 +19:3:869 +20:0:2103 +21:3:875 +22:0:2103 +23:3:876 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diff --git a/urcu/result-signal-over-reader/urcu_progress.ltl b/urcu/result-signal-over-reader/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu/result-signal-over-reader/urcu_progress_reader.define b/urcu/result-signal-over-reader/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu/result-signal-over-reader/urcu_progress_reader.log b/urcu/result-signal-over-reader/urcu_progress_reader.log new file mode 100644 index 0000000..e3ec127 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_reader.log @@ -0,0 +1,506 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 1803: Claim reached state 9 (line 748) +Depth= 5838 States= 1e+06 Transitions= 1.06e+07 Memory= 494.865 t= 9.24 R= 1e+05 +Depth= 5838 States= 2e+06 Transitions= 1.97e+07 Memory= 532.658 t= 17.7 R= 1e+05 +Depth= 5838 States= 3e+06 Transitions= 3.15e+07 Memory= 555.315 t= 28.4 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 6855 States= 4e+06 Transitions= 4.32e+07 Memory= 613.096 t= 39.1 R= 1e+05 +Depth= 9059 States= 5e+06 Transitions= 5.48e+07 Memory= 642.295 t= 49.5 R= 1e+05 +Depth= 9059 States= 6e+06 Transitions= 6.91e+07 Memory= 672.178 t= 62.5 R= 1e+05 +Depth= 9059 States= 7e+06 Transitions= 7.99e+07 Memory= 706.455 t= 72.5 R= 1e+05 +Depth= 9059 States= 8e+06 Transitions= 9.23e+07 Memory= 735.752 t= 84 R= 1e+05 +Depth= 9059 States= 9e+06 Transitions= 1.04e+08 Memory= 766.318 t= 94.5 R= 1e+05 +pan: resizing hashtable to -w24.. done +Depth= 9059 States= 1e+07 Transitions= 1.16e+08 Memory= 920.002 t= 106 R= 9e+04 +Depth= 9059 States= 1.1e+07 Transitions= 1.3e+08 Memory= 945.002 t= 119 R= 9e+04 +Depth= 9059 States= 1.2e+07 Transitions= 1.54e+08 Memory= 967.756 t= 140 R= 9e+04 +Depth= 9059 States= 1.3e+07 Transitions= 1.72e+08 Memory= 995.002 t= 157 R= 8e+04 +Depth= 9059 States= 1.4e+07 Transitions= 1.92e+08 Memory= 1022.736 t= 175 R= 8e+04 +Depth= 9059 States= 1.5e+07 Transitions= 2.1e+08 Memory= 1050.080 t= 191 R= 8e+04 +Depth= 9059 States= 1.6e+07 Transitions= 2.22e+08 Memory= 1082.502 t= 203 R= 8e+04 +Depth= 9059 States= 1.7e+07 Transitions= 2.41e+08 Memory= 1108.479 t= 219 R= 8e+04 +Depth= 9059 States= 1.8e+07 Transitions= 2.58e+08 Memory= 1134.455 t= 235 R= 8e+04 +Depth= 9059 States= 1.9e+07 Transitions= 2.7e+08 Memory= 1164.533 t= 246 R= 8e+04 +Depth= 9059 States= 2e+07 Transitions= 2.83e+08 Memory= 1193.830 t= 258 R= 8e+04 +Depth= 9059 States= 2.1e+07 Transitions= 3.03e+08 Memory= 1219.026 t= 276 R= 8e+04 +Depth= 9059 States= 2.2e+07 Transitions= 3.19e+08 Memory= 1248.420 t= 291 R= 8e+04 +Depth= 9059 States= 2.3e+07 Transitions= 3.42e+08 Memory= 1271.858 t= 312 R= 7e+04 +Depth= 9059 States= 2.4e+07 Transitions= 3.6e+08 Memory= 1298.908 t= 328 R= 7e+04 +Depth= 9059 States= 2.5e+07 Transitions= 3.84e+08 Memory= 1323.127 t= 350 R= 7e+04 +Depth= 9059 States= 2.6e+07 Transitions= 4e+08 Memory= 1348.518 t= 365 R= 7e+04 +Depth= 9059 States= 2.7e+07 Transitions= 4.16e+08 Memory= 1379.865 t= 380 R= 7e+04 +Depth= 9059 States= 2.8e+07 Transitions= 4.26e+08 Memory= 1411.115 t= 389 R= 7e+04 +Depth= 9059 States= 2.9e+07 Transitions= 4.42e+08 Memory= 1439.631 t= 404 R= 7e+04 +Depth= 9059 States= 3e+07 Transitions= 4.64e+08 Memory= 1462.385 t= 423 R= 7e+04 +Depth= 9059 States= 3.1e+07 Transitions= 4.82e+08 Memory= 1490.998 t= 439 R= 7e+04 +Depth= 9059 States= 3.2e+07 Transitions= 4.99e+08 Memory= 1519.514 t= 456 R= 7e+04 +Depth= 9059 States= 3.3e+07 Transitions= 5.18e+08 Memory= 1545.393 t= 473 R= 7e+04 +Depth= 9059 States= 3.4e+07 Transitions= 5.33e+08 Memory= 1578.108 t= 486 R= 7e+04 +pan: resizing hashtable to -w26.. done +Depth= 9059 States= 3.5e+07 Transitions= 5.49e+08 Memory= 2098.994 t= 504 R= 7e+04 +Depth= 9059 States= 3.6e+07 Transitions= 5.74e+08 Memory= 2121.651 t= 528 R= 7e+04 +Depth= 9059 States= 3.7e+07 Transitions= 5.96e+08 Memory= 2147.334 t= 547 R= 7e+04 +Depth= 9059 States= 3.8e+07 Transitions= 6.17e+08 Memory= 2170.186 t= 567 R= 7e+04 +Depth= 9059 States= 3.9e+07 Transitions= 6.3e+08 Memory= 2199.776 t= 578 R= 7e+04 +Depth= 9059 States= 4e+07 Transitions= 6.53e+08 Memory= 2225.459 t= 599 R= 7e+04 +Depth= 9059 States= 4.1e+07 Transitions= 6.69e+08 Memory= 2250.361 t= 614 R= 7e+04 +Depth= 9059 States= 4.2e+07 Transitions= 6.85e+08 Memory= 2279.268 t= 628 R= 7e+04 +Depth= 9059 States= 4.3e+07 Transitions= 7.03e+08 Memory= 2304.463 t= 644 R= 7e+04 +Depth= 9059 States= 4.4e+07 Transitions= 7.13e+08 Memory= 2338.252 t= 654 R= 7e+04 +Depth= 9059 States= 4.5e+07 Transitions= 7.25e+08 Memory= 2366.768 t= 665 R= 7e+04 +Depth= 9059 States= 4.6e+07 Transitions= 7.41e+08 Memory= 2393.330 t= 679 R= 7e+04 +Depth= 9059 States= 4.7e+07 Transitions= 7.57e+08 Memory= 2420.381 t= 694 R= 7e+04 +Depth= 9059 States= 4.8e+07 Transitions= 7.72e+08 Memory= 2447.041 t= 708 R= 7e+04 +Depth= 9059 States= 4.9e+07 Transitions= 7.88e+08 Memory= 2476.143 t= 722 R= 7e+04 +Depth= 9059 States= 5e+07 Transitions= 8.04e+08 Memory= 2501.045 t= 737 R= 7e+04 +Depth= 9059 States= 5.1e+07 Transitions= 8.2e+08 Memory= 2530.440 t= 752 R= 7e+04 +Depth= 9059 States= 5.2e+07 Transitions= 8.37e+08 Memory= 2554.854 t= 766 R= 7e+04 +Depth= 9059 States= 5.3e+07 Transitions= 8.5e+08 Memory= 2583.467 t= 779 R= 7e+04 +Depth= 9059 States= 5.4e+07 Transitions= 8.66e+08 Memory= 2611.299 t= 794 R= 7e+04 +Depth= 9059 States= 5.5e+07 Transitions= 8.79e+08 Memory= 2640.791 t= 805 R= 7e+04 +Depth= 9059 States= 5.6e+07 Transitions= 8.9e+08 Memory= 2672.139 t= 815 R= 7e+04 +Depth= 9059 States= 5.7e+07 Transitions= 9.05e+08 Memory= 2702.705 t= 829 R= 7e+04 +Depth= 9059 States= 5.8e+07 Transitions= 9.22e+08 Memory= 2727.998 t= 845 R= 7e+04 +Depth= 9059 States= 5.9e+07 Transitions= 9.38e+08 Memory= 2754.463 t= 859 R= 7e+04 +Depth= 9059 States= 6e+07 Transitions= 9.49e+08 Memory= 2789.717 t= 870 R= 7e+04 +Depth= 9059 States= 6.1e+07 Transitions= 9.62e+08 Memory= 2817.744 t= 881 R= 7e+04 +Depth= 9059 States= 6.2e+07 Transitions= 9.79e+08 Memory= 2838.447 t= 896 R= 7e+04 +Depth= 9059 States= 6.3e+07 Transitions= 1e+09 Memory= 2863.154 t= 919 R= 7e+04 +Depth= 9059 States= 6.4e+07 Transitions= 1.02e+09 Memory= 2889.131 t= 936 R= 7e+04 +Depth= 9059 States= 6.5e+07 Transitions= 1.04e+09 Memory= 2919.502 t= 952 R= 7e+04 +Depth= 9059 States= 6.6e+07 Transitions= 1.06e+09 Memory= 2943.916 t= 968 R= 7e+04 +Depth= 9059 States= 6.7e+07 Transitions= 1.07e+09 Memory= 2978.975 t= 979 R= 7e+04 +Depth= 9059 States= 6.8e+07 Transitions= 1.09e+09 Memory= 3003.877 t= 996 R= 7e+04 +Depth= 9059 States= 6.9e+07 Transitions= 1.11e+09 Memory= 3028.584 t= 1.01e+03 R= 7e+04 +Depth= 9059 States= 7e+07 Transitions= 1.12e+09 Memory= 3058.174 t= 1.02e+03 R= 7e+04 +Depth= 9059 States= 7.1e+07 Transitions= 1.13e+09 Memory= 3088.350 t= 1.04e+03 R= 7e+04 +Depth= 9059 States= 7.2e+07 Transitions= 1.15e+09 Memory= 3113.350 t= 1.05e+03 R= 7e+04 +Depth= 9059 States= 7.3e+07 Transitions= 1.17e+09 Memory= 3142.158 t= 1.07e+03 R= 7e+04 +Depth= 9059 States= 7.4e+07 Transitions= 1.19e+09 Memory= 3166.279 t= 1.09e+03 R= 7e+04 +Depth= 9059 States= 7.5e+07 Transitions= 1.21e+09 Memory= 3192.744 t= 1.11e+03 R= 7e+04 +Depth= 9059 States= 7.6e+07 Transitions= 1.23e+09 Memory= 3217.256 t= 1.13e+03 R= 7e+04 +Depth= 9059 States= 7.7e+07 Transitions= 1.25e+09 Memory= 3242.549 t= 1.14e+03 R= 7e+04 +Depth= 9059 States= 7.8e+07 Transitions= 1.26e+09 Memory= 3273.115 t= 1.16e+03 R= 7e+04 +Depth= 9059 States= 7.9e+07 Transitions= 1.27e+09 Memory= 3303.975 t= 1.17e+03 R= 7e+04 +Depth= 9059 States= 8e+07 Transitions= 1.29e+09 Memory= 3334.541 t= 1.18e+03 R= 7e+04 +Depth= 9059 States= 8.1e+07 Transitions= 1.31e+09 Memory= 3356.221 t= 1.2e+03 R= 7e+04 +Depth= 9059 States= 8.2e+07 Transitions= 1.33e+09 Memory= 3385.127 t= 1.22e+03 R= 7e+04 +Depth= 9059 States= 8.3e+07 Transitions= 1.35e+09 Memory= 3412.959 t= 1.23e+03 R= 7e+04 +Depth= 9059 States= 8.4e+07 Transitions= 1.37e+09 Memory= 3438.936 t= 1.25e+03 R= 7e+04 +Depth= 9059 States= 8.5e+07 Transitions= 1.38e+09 Memory= 3471.455 t= 1.26e+03 R= 7e+04 +Depth= 9059 States= 8.6e+07 Transitions= 1.4e+09 Memory= 3498.115 t= 1.28e+03 R= 7e+04 +Depth= 9059 States= 8.7e+07 Transitions= 1.42e+09 Memory= 3519.014 t= 1.3e+03 R= 7e+04 +Depth= 9059 States= 8.8e+07 Transitions= 1.44e+09 Memory= 3546.162 t= 1.32e+03 R= 7e+04 +Depth= 9059 States= 8.9e+07 Transitions= 1.46e+09 Memory= 3567.842 t= 1.34e+03 R= 7e+04 +Depth= 9059 States= 9e+07 Transitions= 1.48e+09 Memory= 3598.799 t= 1.35e+03 R= 7e+04 +Depth= 9059 States= 9.1e+07 Transitions= 1.5e+09 Memory= 3622.920 t= 1.37e+03 R= 7e+04 +Depth= 9059 States= 9.2e+07 Transitions= 1.52e+09 Memory= 3648.701 t= 1.39e+03 R= 7e+04 +Depth= 9059 States= 9.3e+07 Transitions= 1.53e+09 Memory= 3676.045 t= 1.4e+03 R= 7e+04 +Depth= 9059 States= 9.4e+07 Transitions= 1.55e+09 Memory= 3702.412 t= 1.42e+03 R= 7e+04 +Depth= 9059 States= 9.5e+07 Transitions= 1.56e+09 Memory= 3735.713 t= 1.43e+03 R= 7e+04 +Depth= 9059 States= 9.6e+07 Transitions= 1.57e+09 Memory= 3764.522 t= 1.44e+03 R= 7e+04 +Depth= 9059 States= 9.7e+07 Transitions= 1.59e+09 Memory= 3790.693 t= 1.45e+03 R= 7e+04 +Depth= 9059 States= 9.8e+07 Transitions= 1.61e+09 Memory= 3817.940 t= 1.47e+03 R= 7e+04 +Depth= 9059 States= 9.9e+07 Transitions= 1.62e+09 Memory= 3845.283 t= 1.48e+03 R= 7e+04 +Depth= 9059 States= 1e+08 Transitions= 1.64e+09 Memory= 3873.213 t= 1.5e+03 R= 7e+04 +Depth= 9059 States= 1.01e+08 Transitions= 1.65e+09 Memory= 3897.920 t= 1.51e+03 R= 7e+04 +Depth= 9059 States= 1.02e+08 Transitions= 1.67e+09 Memory= 3926.631 t= 1.53e+03 R= 7e+04 +Depth= 9059 States= 1.03e+08 Transitions= 1.68e+09 Memory= 3952.315 t= 1.54e+03 R= 7e+04 +Depth= 9059 States= 1.04e+08 Transitions= 1.7e+09 Memory= 3981.026 t= 1.56e+03 R= 7e+04 +Depth= 9059 States= 1.05e+08 Transitions= 1.71e+09 Memory= 4010.029 t= 1.57e+03 R= 7e+04 +Depth= 9059 States= 1.06e+08 Transitions= 1.73e+09 Memory= 4038.838 t= 1.58e+03 R= 7e+04 +Depth= 9059 States= 1.07e+08 Transitions= 1.74e+09 Memory= 4070.381 t= 1.59e+03 R= 7e+04 +Depth= 9059 States= 1.08e+08 Transitions= 1.75e+09 Memory= 4099.385 t= 1.61e+03 R= 7e+04 +Depth= 9059 States= 1.09e+08 Transitions= 1.77e+09 Memory= 4126.338 t= 1.62e+03 R= 7e+04 +Depth= 9059 States= 1.1e+08 Transitions= 1.79e+09 Memory= 4151.924 t= 1.64e+03 R= 7e+04 +Depth= 9059 States= 1.11e+08 Transitions= 1.8e+09 Memory= 4187.276 t= 1.65e+03 R= 7e+04 +Depth= 9059 States= 1.12e+08 Transitions= 1.81e+09 Memory= 4214.326 t= 1.66e+03 R= 7e+04 +Depth= 9059 States= 1.13e+08 Transitions= 1.83e+09 Memory= 4237.471 t= 1.67e+03 R= 7e+04 +Depth= 9059 States= 1.14e+08 Transitions= 1.85e+09 Memory= 4261.104 t= 1.7e+03 R= 7e+04 +Depth= 9059 States= 1.15e+08 Transitions= 1.87e+09 Memory= 4286.690 t= 1.71e+03 R= 7e+04 +Depth= 9059 States= 1.16e+08 Transitions= 1.89e+09 Memory= 4314.619 t= 1.73e+03 R= 7e+04 +Depth= 9059 States= 1.17e+08 Transitions= 1.91e+09 Memory= 4341.768 t= 1.75e+03 R= 7e+04 +Depth= 9059 States= 1.18e+08 Transitions= 1.92e+09 Memory= 4375.166 t= 1.76e+03 R= 7e+04 +Depth= 9059 States= 1.19e+08 Transitions= 1.94e+09 Memory= 4401.338 t= 1.78e+03 R= 7e+04 +Depth= 9059 States= 1.2e+08 Transitions= 1.95e+09 Memory= 4426.436 t= 1.79e+03 R= 7e+04 +Depth= 9059 States= 1.21e+08 Transitions= 1.97e+09 Memory= 4456.807 t= 1.8e+03 R= 7e+04 +Depth= 9059 States= 1.22e+08 Transitions= 1.98e+09 Memory= 4486.592 t= 1.82e+03 R= 7e+04 +Depth= 9059 States= 1.23e+08 Transitions= 2e+09 Memory= 4511.787 t= 1.83e+03 R= 7e+04 +Depth= 9059 States= 1.24e+08 Transitions= 2.02e+09 Memory= 4540.108 t= 1.85e+03 R= 7e+04 +Depth= 9059 States= 1.25e+08 Transitions= 2.04e+09 Memory= 4564.033 t= 1.87e+03 R= 7e+04 +Depth= 9059 States= 1.26e+08 Transitions= 2.06e+09 Memory= 4591.865 t= 1.89e+03 R= 7e+04 +Depth= 9059 States= 1.27e+08 Transitions= 2.08e+09 Memory= 4615.889 t= 1.91e+03 R= 7e+04 +Depth= 9059 States= 1.28e+08 Transitions= 2.1e+09 Memory= 4640.303 t= 1.92e+03 R= 7e+04 +Depth= 9059 States= 1.29e+08 Transitions= 2.11e+09 Memory= 4670.479 t= 1.94e+03 R= 7e+04 +Depth= 9059 States= 1.3e+08 Transitions= 2.12e+09 Memory= 4702.998 t= 1.95e+03 R= 7e+04 +Depth= 9059 States= 1.31e+08 Transitions= 2.14e+09 Memory= 4732.393 t= 1.96e+03 R= 7e+04 +Depth= 9059 States= 1.32e+08 Transitions= 2.16e+09 Memory= 4754.756 t= 1.98e+03 R= 7e+04 +Depth= 9059 States= 1.33e+08 Transitions= 2.18e+09 Memory= 4783.174 t= 2e+03 R= 7e+04 +Depth= 9059 States= 1.34e+08 Transitions= 2.19e+09 Memory= 4810.518 t= 2.01e+03 R= 7e+04 +Depth= 9059 States= 1.35e+08 Transitions= 2.21e+09 Memory= 4837.568 t= 2.03e+03 R= 7e+04 +pan: resizing hashtable to -w28.. done +Depth= 9059 States= 1.36e+08 Transitions= 2.23e+09 Memory= 6885.568 t= 2.06e+03 R= 7e+04 +Depth= 9059 States= 1.37e+08 Transitions= 2.24e+09 Memory= 6885.568 t= 2.08e+03 R= 7e+04 +Depth= 9059 States= 1.38e+08 Transitions= 2.27e+09 Memory= 6900.412 t= 2.1e+03 R= 7e+04 +Depth= 9059 States= 1.39e+08 Transitions= 2.29e+09 Memory= 6927.658 t= 2.12e+03 R= 7e+04 +Depth= 9059 States= 1.4e+08 Transitions= 2.31e+09 Memory= 6950.315 t= 2.14e+03 R= 7e+04 +Depth= 9059 States= 1.41e+08 Transitions= 2.33e+09 Memory= 6981.858 t= 2.15e+03 R= 7e+04 +Depth= 9059 States= 1.42e+08 Transitions= 2.35e+09 Memory= 7005.295 t= 2.17e+03 R= 7e+04 +Depth= 9059 States= 1.43e+08 Transitions= 2.36e+09 Memory= 7031.076 t= 2.18e+03 R= 7e+04 +Depth= 9059 States= 1.44e+08 Transitions= 2.38e+09 Memory= 7056.955 t= 2.2e+03 R= 7e+04 +Depth= 9059 States= 1.45e+08 Transitions= 2.4e+09 Memory= 7084.494 t= 2.22e+03 R= 7e+04 +Depth= 9059 States= 1.46e+08 Transitions= 2.41e+09 Memory= 7115.744 t= 2.23e+03 R= 7e+04 +Depth= 9059 States= 1.47e+08 Transitions= 2.42e+09 Memory= 7146.604 t= 2.24e+03 R= 7e+04 +Depth= 9059 States= 1.48e+08 Transitions= 2.44e+09 Memory= 7172.287 t= 2.25e+03 R= 7e+04 +Depth= 9059 States= 1.49e+08 Transitions= 2.45e+09 Memory= 7200.315 t= 2.26e+03 R= 7e+04 +Depth= 9059 States= 1.5e+08 Transitions= 2.47e+09 Memory= 7226.389 t= 2.28e+03 R= 7e+04 +Depth= 9059 States= 1.51e+08 Transitions= 2.48e+09 Memory= 7253.733 t= 2.29e+03 R= 7e+04 +Depth= 9059 States= 1.52e+08 Transitions= 2.5e+09 Memory= 7279.709 t= 2.31e+03 R= 7e+04 +Depth= 9059 States= 1.53e+08 Transitions= 2.52e+09 Memory= 7309.104 t= 2.32e+03 R= 7e+04 +Depth= 9059 States= 1.54e+08 Transitions= 2.53e+09 Memory= 7334.592 t= 2.34e+03 R= 7e+04 +Depth= 9059 States= 1.55e+08 Transitions= 2.55e+09 Memory= 7362.229 t= 2.35e+03 R= 7e+04 +Depth= 9059 States= 1.56e+08 Transitions= 2.56e+09 Memory= 7391.135 t= 2.36e+03 R= 7e+04 +Depth= 9059 States= 1.57e+08 Transitions= 2.57e+09 Memory= 7420.822 t= 2.38e+03 R= 7e+04 +Depth= 9059 States= 1.58e+08 Transitions= 2.59e+09 Memory= 7452.854 t= 2.39e+03 R= 7e+04 +Depth= 9059 States= 1.59e+08 Transitions= 2.6e+09 Memory= 7481.760 t= 2.4e+03 R= 7e+04 +Depth= 9059 States= 1.6e+08 Transitions= 2.62e+09 Memory= 7509.299 t= 2.41e+03 R= 7e+04 +Depth= 9059 States= 1.61e+08 Transitions= 2.63e+09 Memory= 7534.201 t= 2.43e+03 R= 7e+04 +Depth= 9059 States= 1.62e+08 Transitions= 2.65e+09 Memory= 7567.600 t= 2.44e+03 R= 7e+04 +Depth= 9059 States= 1.63e+08 Transitions= 2.66e+09 Memory= 7594.846 t= 2.45e+03 R= 7e+04 +Depth= 9059 States= 1.64e+08 Transitions= 2.67e+09 Memory= 7619.455 t= 2.47e+03 R= 7e+04 +Depth= 9059 States= 1.65e+08 Transitions= 2.7e+09 Memory= 7642.502 t= 2.49e+03 R= 7e+04 +Depth= 9059 States= 1.66e+08 Transitions= 2.72e+09 Memory= 7669.260 t= 2.51e+03 R= 7e+04 +Depth= 9059 States= 1.67e+08 Transitions= 2.73e+09 Memory= 7696.799 t= 2.52e+03 R= 7e+04 +Depth= 9059 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7723.850 t= 2.54e+03 R= 7e+04 +Depth= 9059 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7757.053 t= 2.55e+03 R= 7e+04 +Depth= 9059 States= 1.7e+08 Transitions= 2.78e+09 Memory= 7782.346 t= 2.57e+03 R= 7e+04 +Depth= 9059 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7808.908 t= 2.58e+03 R= 7e+04 +Depth= 9059 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7838.791 t= 2.59e+03 R= 7e+04 +Depth= 9059 States= 1.73e+08 Transitions= 2.83e+09 Memory= 7867.893 t= 2.61e+03 R= 7e+04 +Depth= 9059 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7892.990 t= 2.62e+03 R= 7e+04 +Depth= 9059 States= 1.75e+08 Transitions= 2.86e+09 Memory= 7922.190 t= 2.64e+03 R= 7e+04 +Depth= 9059 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7945.627 t= 2.66e+03 R= 7e+04 +Depth= 9059 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7973.947 t= 2.68e+03 R= 7e+04 +Depth= 9059 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7997.483 t= 2.7e+03 R= 7e+04 +Depth= 9059 States= 1.79e+08 Transitions= 2.94e+09 Memory= 8020.920 t= 2.71e+03 R= 7e+04 +Depth= 9059 States= 1.8e+08 Transitions= 2.96e+09 Memory= 8050.412 t= 2.73e+03 R= 7e+04 +Depth= 9059 States= 1.81e+08 Transitions= 2.97e+09 Memory= 8085.666 t= 2.74e+03 R= 7e+04 +Depth= 9059 States= 1.82e+08 Transitions= 2.98e+09 Memory= 8114.279 t= 2.75e+03 R= 7e+04 +Depth= 9059 States= 1.83e+08 Transitions= 3e+09 Memory= 8137.131 t= 2.77e+03 R= 7e+04 +Depth= 9059 States= 1.84e+08 Transitions= 3.02e+09 Memory= 8165.451 t= 2.79e+03 R= 7e+04 +Depth= 9059 States= 1.85e+08 Transitions= 3.04e+09 Memory= 8193.186 t= 2.8e+03 R= 7e+04 +Depth= 9059 States= 1.86e+08 Transitions= 3.06e+09 Memory= 8218.674 t= 2.82e+03 R= 7e+04 +Depth= 9059 States= 1.87e+08 Transitions= 3.08e+09 Memory= 8255.100 t= 2.83e+03 R= 7e+04 +Depth= 9059 States= 1.88e+08 Transitions= 3.09e+09 Memory= 8279.221 t= 2.85e+03 R= 7e+04 +Depth= 9059 States= 1.89e+08 Transitions= 3.12e+09 Memory= 8298.264 t= 2.87e+03 R= 7e+04 +Depth= 9059 States= 1.9e+08 Transitions= 3.14e+09 Memory= 8325.998 t= 2.89e+03 R= 7e+04 +Depth= 9059 States= 1.91e+08 Transitions= 3.16e+09 Memory= 8349.338 t= 2.91e+03 R= 7e+04 +Depth= 9059 States= 1.92e+08 Transitions= 3.17e+09 Memory= 8379.221 t= 2.92e+03 R= 7e+04 +Depth= 9059 States= 1.93e+08 Transitions= 3.19e+09 Memory= 8403.440 t= 2.94e+03 R= 7e+04 +Depth= 9059 States= 1.94e+08 Transitions= 3.21e+09 Memory= 8430.100 t= 2.96e+03 R= 7e+04 +Depth= 9059 States= 1.95e+08 Transitions= 3.23e+09 Memory= 8455.295 t= 2.97e+03 R= 7e+04 +Depth= 9059 States= 1.96e+08 Transitions= 3.25e+09 Memory= 8482.932 t= 2.99e+03 R= 7e+04 +Depth= 9059 States= 1.97e+08 Transitions= 3.26e+09 Memory= 8515.256 t= 3e+03 R= 7e+04 +Depth= 9059 States= 1.98e+08 Transitions= 3.27e+09 Memory= 8542.502 t= 3.01e+03 R= 7e+04 +Depth= 9059 States= 1.99e+08 Transitions= 3.29e+09 Memory= 8569.260 t= 3.02e+03 R= 7e+04 +Depth= 9059 States= 2e+08 Transitions= 3.3e+09 Memory= 8598.459 t= 3.04e+03 R= 7e+04 +Depth= 9059 States= 2.01e+08 Transitions= 3.32e+09 Memory= 8624.631 t= 3.05e+03 R= 7e+04 +Depth= 9059 States= 2.02e+08 Transitions= 3.33e+09 Memory= 8652.365 t= 3.07e+03 R= 7e+04 +Depth= 9059 States= 2.03e+08 Transitions= 3.35e+09 Memory= 8678.440 t= 3.08e+03 R= 7e+04 +Depth= 9059 States= 2.04e+08 Transitions= 3.36e+09 Memory= 8706.369 t= 3.1e+03 R= 7e+04 +Depth= 9059 States= 2.05e+08 Transitions= 3.38e+09 Memory= 8732.932 t= 3.11e+03 R= 7e+04 +Depth= 9059 States= 2.06e+08 Transitions= 3.39e+09 Memory= 8760.276 t= 3.12e+03 R= 7e+04 +Depth= 9059 States= 2.07e+08 Transitions= 3.41e+09 Memory= 8789.475 t= 3.14e+03 R= 7e+04 +Depth= 9059 States= 2.08e+08 Transitions= 3.42e+09 Memory= 8819.455 t= 3.15e+03 R= 7e+04 +Depth= 9059 States= 2.09e+08 Transitions= 3.43e+09 Memory= 8851.779 t= 3.16e+03 R= 7e+04 +Depth= 9059 States= 2.1e+08 Transitions= 3.45e+09 Memory= 8880.100 t= 3.17e+03 R= 7e+04 +Depth= 9059 States= 2.11e+08 Transitions= 3.46e+09 Memory= 8907.053 t= 3.19e+03 R= 7e+04 +Depth= 9059 States= 2.12e+08 Transitions= 3.48e+09 Memory= 8932.639 t= 3.2e+03 R= 7e+04 +Depth= 9059 States= 2.13e+08 Transitions= 3.49e+09 Memory= 8964.572 t= 3.22e+03 R= 7e+04 +Depth= 9059 States= 2.14e+08 Transitions= 3.51e+09 Memory= 8991.526 t= 3.23e+03 R= 7e+04 +Depth= 9059 States= 2.15e+08 Transitions= 3.52e+09 Memory= 9018.088 t= 3.24e+03 R= 7e+04 +Depth= 9059 States= 2.16e+08 Transitions= 3.54e+09 Memory= 9039.865 t= 3.26e+03 R= 7e+04 +Depth= 9059 States= 2.17e+08 Transitions= 3.56e+09 Memory= 9067.600 t= 3.28e+03 R= 7e+04 +Depth= 9059 States= 2.18e+08 Transitions= 3.58e+09 Memory= 9094.260 t= 3.3e+03 R= 7e+04 +Depth= 9059 States= 2.19e+08 Transitions= 3.6e+09 Memory= 9122.483 t= 3.31e+03 R= 7e+04 +Depth= 9059 States= 2.2e+08 Transitions= 3.61e+09 Memory= 9153.635 t= 3.32e+03 R= 7e+04 +Depth= 9059 States= 2.21e+08 Transitions= 3.63e+09 Memory= 9181.272 t= 3.34e+03 R= 7e+04 +Depth= 9059 States= 2.22e+08 Transitions= 3.65e+09 Memory= 9207.639 t= 3.36e+03 R= 7e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 9059, errors: 0 + 88961904 states, stored (2.22145e+08 visited) +3.4291111e+09 states, matched +3.6512561e+09 transitions (= visited+matched) +1.2885947e+10 atomic steps +hash conflicts: 7.2188776e+08 (resolved) + +Stats on memory usage (in Megabytes): + 7805.343 equivalent memory usage for states (stored*(State-vector + overhead)) + 6706.219 actual memory usage for states (compression: 85.92%) + state-vector as stored = 51 byte + 28 byte overhead + 2048.000 memory used for hash table (-w28) + 457.764 memory used for DFS stack (-m10000000) + 1.122 memory lost to fragmentation + 9210.861 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 370, "(1)" + line 164, "pan.___", state 378, "(1)" + line 168, "pan.___", state 390, "(1)" + line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 449, "(1)" + line 413, "pan.___", state 462, "(1)" + line 418, "pan.___", state 479, "(1)" + line 399, "pan.___", state 498, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 647, "(1)" + line 418, "pan.___", state 664, "(1)" + line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 710, "(1)" + line 164, "pan.___", state 718, "(1)" + line 168, "pan.___", state 730, "(1)" + line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 840, "(1)" + line 164, "pan.___", state 848, "(1)" + line 168, "pan.___", state 860, "(1)" + line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 884, "(1)" + line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 885, "else" + line 399, "pan.___", state 888, "(1)" + line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 898, "(1)" + line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 899, "else" + line 403, "pan.___", state 902, "(1)" + line 403, "pan.___", state 903, "(1)" + line 403, "pan.___", state 903, "(1)" + line 401, "pan.___", state 908, "((i<1))" + line 401, "pan.___", state 908, "((i>=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1508, "(1)" + line 164, "pan.___", state 1516, "(1)" + line 168, "pan.___", state 1528, "(1)" + line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1552, "(1)" + line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1553, "else" + line 399, "pan.___", state 1556, "(1)" + line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1566, "(1)" + line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1567, "else" + line 403, "pan.___", state 1570, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 401, "pan.___", state 1576, "((i<1))" + line 401, "pan.___", state 1576, "((i>=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1811, "(1)" + line 164, "pan.___", state 1819, "(1)" + line 168, "pan.___", state 1831, "(1)" + line 702, "pan.___", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 751, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 3.36e+03 seconds +pan: rate 66138.803 states/second +pan: avg transition delay 9.1989e-07 usec +cp .input.spin urcu_progress_reader.spin.input +cp .input.spin.trail urcu_progress_reader.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_progress_reader.spin.input b/urcu/result-signal-over-reader/urcu_progress_reader.spin.input new file mode 100644 index 0000000..91b1126 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_reader.spin.input @@ -0,0 +1,723 @@ +#define READER_PROGRESS + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_progress_reader.spin.input.trail b/urcu/result-signal-over-reader/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..7c42af1 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_reader.spin.input.trail @@ -0,0 +1,1270 @@ +-2:4:-2 +-4:-4:-4 +1:0:4401 +2:4:4353 +3:4:4356 +4:4:4356 +5:4:4359 +6:4:4367 +7:4:4367 +8:4:4370 +9:4:4376 +10:4:4380 +11:4:4380 +12:4:4383 +13:4:4391 +14:4:4395 +15:4:4396 +16:0:4401 +17:4:4398 +18:0:4401 +19:3:2479 +20:0:4401 +21:3:2485 +22:0:4401 +23:3:2486 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+1258:0:4405 +1259:2:1348 +1260:0:4405 +1261:3:4347 +1262:0:4405 +1263:2:1347 +1264:0:4405 +1265:3:4346 +1266:0:4405 +1267:1:104 diff --git a/urcu/result-signal-over-reader/urcu_progress_writer.define b/urcu/result-signal-over-reader/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu/result-signal-over-reader/urcu_progress_writer.log b/urcu/result-signal-over-reader/urcu_progress_writer.log new file mode 100644 index 0000000..fc83245 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer.log @@ -0,0 +1,524 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 1194: Claim reached state 9 (line 748) +Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.64 R= 1e+05 +Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.6 R= 1e+05 +Depth= 3253 States= 3e+06 Transitions= 3.44e+07 Memory= 516.252 t= 31.6 R= 9e+04 +pan: resizing hashtable to -w22.. done +Depth= 7995 States= 4e+06 Transitions= 4.66e+07 Memory= 563.486 t= 42.8 R= 9e+04 +Depth= 7995 States= 5e+06 Transitions= 6.05e+07 Memory= 580.674 t= 55.6 R= 9e+04 +Depth= 7995 States= 6e+06 Transitions= 7.12e+07 Memory= 599.229 t= 65.5 R= 9e+04 +Depth= 7995 States= 7e+06 Transitions= 8.58e+07 Memory= 613.975 t= 78.9 R= 9e+04 +Depth= 7995 States= 8e+06 Transitions= 9.62e+07 Memory= 631.846 t= 88.7 R= 9e+04 +Depth= 7995 States= 9e+06 Transitions= 1.1e+08 Memory= 646.592 t= 101 R= 9e+04 +pan: resizing hashtable to -w24.. done +Depth= 7995 States= 1e+07 Transitions= 1.32e+08 Memory= 783.869 t= 122 R= 8e+04 +Depth= 7995 States= 1.1e+07 Transitions= 1.52e+08 Memory= 799.104 t= 140 R= 8e+04 +Depth= 7995 States= 1.2e+07 Transitions= 1.71e+08 Memory= 814.533 t= 157 R= 8e+04 +Depth= 7995 States= 1.3e+07 Transitions= 1.9e+08 Memory= 829.670 t= 174 R= 7e+04 +Depth= 7995 States= 1.4e+07 Transitions= 2.01e+08 Memory= 848.029 t= 185 R= 8e+04 +Depth= 7995 States= 1.5e+07 Transitions= 2.21e+08 Memory= 862.287 t= 203 R= 7e+04 +Depth= 7995 States= 1.6e+07 Transitions= 2.35e+08 Memory= 877.815 t= 215 R= 7e+04 +Depth= 7995 States= 1.7e+07 Transitions= 2.44e+08 Memory= 897.736 t= 223 R= 8e+04 +Depth= 7995 States= 1.8e+07 Transitions= 2.57e+08 Memory= 911.115 t= 235 R= 8e+04 +Depth= 7995 States= 1.9e+07 Transitions= 2.69e+08 Memory= 927.033 t= 246 R= 8e+04 +Depth= 8341 States= 2e+07 Transitions= 2.83e+08 Memory= 943.440 t= 259 R= 8e+04 +Depth= 8341 States= 2.1e+07 Transitions= 2.96e+08 Memory= 961.604 t= 271 R= 8e+04 +Depth= 8341 States= 2.2e+07 Transitions= 3.07e+08 Memory= 978.791 t= 281 R= 8e+04 +Depth= 8341 States= 2.3e+07 Transitions= 3.2e+08 Memory= 996.369 t= 293 R= 8e+04 +Depth= 8341 States= 2.4e+07 Transitions= 3.32e+08 Memory= 1013.264 t= 304 R= 8e+04 +Depth= 8341 States= 2.5e+07 Transitions= 3.48e+08 Memory= 1024.885 t= 319 R= 8e+04 +Depth= 8341 States= 2.6e+07 Transitions= 3.72e+08 Memory= 1038.947 t= 341 R= 8e+04 +Depth= 8341 States= 2.7e+07 Transitions= 3.91e+08 Memory= 1055.158 t= 358 R= 8e+04 +Depth= 8341 States= 2.8e+07 Transitions= 4.09e+08 Memory= 1069.904 t= 374 R= 7e+04 +Depth= 8341 States= 2.9e+07 Transitions= 4.25e+08 Memory= 1086.701 t= 389 R= 7e+04 +Depth= 8341 States= 3e+07 Transitions= 4.43e+08 Memory= 1102.131 t= 405 R= 7e+04 +Depth= 8341 States= 3.1e+07 Transitions= 4.58e+08 Memory= 1117.268 t= 419 R= 7e+04 +Depth= 8341 States= 3.2e+07 Transitions= 4.68e+08 Memory= 1136.213 t= 429 R= 7e+04 +Depth= 8341 States= 3.3e+07 Transitions= 4.8e+08 Memory= 1151.154 t= 440 R= 8e+04 +Depth= 8341 States= 3.4e+07 Transitions= 4.92e+08 Memory= 1166.779 t= 451 R= 8e+04 +pan: resizing hashtable to -w26.. done +Depth= 8687 States= 3.5e+07 Transitions= 5.05e+08 Memory= 1679.658 t= 464 R= 8e+04 +Depth= 8687 States= 3.6e+07 Transitions= 5.18e+08 Memory= 1697.432 t= 477 R= 8e+04 +Depth= 8687 States= 3.7e+07 Transitions= 5.29e+08 Memory= 1714.326 t= 487 R= 8e+04 +Depth= 8687 States= 3.8e+07 Transitions= 5.44e+08 Memory= 1730.244 t= 500 R= 8e+04 +Depth= 8687 States= 3.9e+07 Transitions= 5.55e+08 Memory= 1747.920 t= 511 R= 8e+04 +Depth= 8687 States= 4e+07 Transitions= 5.69e+08 Memory= 1761.885 t= 523 R= 8e+04 +Depth= 8687 States= 4.1e+07 Transitions= 5.92e+08 Memory= 1775.850 t= 544 R= 8e+04 +Depth= 8687 States= 4.2e+07 Transitions= 6.12e+08 Memory= 1790.498 t= 562 R= 7e+04 +Depth= 8687 States= 4.3e+07 Transitions= 6.29e+08 Memory= 1807.783 t= 578 R= 7e+04 +Depth= 8687 States= 4.4e+07 Transitions= 6.48e+08 Memory= 1822.432 t= 595 R= 7e+04 +Depth= 8687 States= 4.5e+07 Transitions= 6.61e+08 Memory= 1838.838 t= 606 R= 7e+04 +Depth= 8687 States= 4.6e+07 Transitions= 6.81e+08 Memory= 1853.291 t= 625 R= 7e+04 +Depth= 8687 States= 4.7e+07 Transitions= 6.93e+08 Memory= 1870.772 t= 635 R= 7e+04 +Depth= 8687 States= 4.8e+07 Transitions= 7.02e+08 Memory= 1889.912 t= 644 R= 7e+04 +Depth= 8687 States= 4.9e+07 Transitions= 7.15e+08 Memory= 1902.998 t= 656 R= 7e+04 +Depth= 8687 States= 5e+07 Transitions= 7.27e+08 Memory= 1919.600 t= 667 R= 7e+04 +Depth= 9033 States= 5.1e+07 Transitions= 7.42e+08 Memory= 1935.518 t= 681 R= 7e+04 +Depth= 9033 States= 5.2e+07 Transitions= 7.53e+08 Memory= 1954.170 t= 691 R= 8e+04 +Depth= 9033 States= 5.3e+07 Transitions= 7.66e+08 Memory= 1969.990 t= 703 R= 8e+04 +Depth= 9033 States= 5.4e+07 Transitions= 7.77e+08 Memory= 1988.545 t= 713 R= 8e+04 +Depth= 9033 States= 5.5e+07 Transitions= 7.9e+08 Memory= 2004.756 t= 725 R= 8e+04 +Depth= 9033 States= 5.6e+07 Transitions= 8.1e+08 Memory= 2016.084 t= 743 R= 8e+04 +Depth= 9033 States= 5.7e+07 Transitions= 8.32e+08 Memory= 2030.440 t= 763 R= 7e+04 +Depth= 9033 States= 5.8e+07 Transitions= 8.51e+08 Memory= 2046.260 t= 781 R= 7e+04 +Depth= 9033 States= 5.9e+07 Transitions= 8.7e+08 Memory= 2061.592 t= 797 R= 7e+04 +Depth= 9033 States= 6e+07 Transitions= 8.83e+08 Memory= 2078.779 t= 809 R= 7e+04 +Depth= 9033 States= 6.1e+07 Transitions= 9.01e+08 Memory= 2094.014 t= 826 R= 7e+04 +Depth= 9033 States= 6.2e+07 Transitions= 9.16e+08 Memory= 2108.467 t= 840 R= 7e+04 +Depth= 9033 States= 6.3e+07 Transitions= 9.26e+08 Memory= 2126.924 t= 849 R= 7e+04 +Depth= 9033 States= 6.4e+07 Transitions= 9.38e+08 Memory= 2142.158 t= 860 R= 7e+04 +Depth= 9033 States= 6.5e+07 Transitions= 9.51e+08 Memory= 2157.295 t= 871 R= 7e+04 +Depth= 9379 States= 6.6e+07 Transitions= 9.63e+08 Memory= 2173.115 t= 883 R= 7e+04 +Depth= 9379 States= 6.7e+07 Transitions= 9.77e+08 Memory= 2190.401 t= 895 R= 7e+04 +Depth= 9379 States= 6.8e+07 Transitions= 9.88e+08 Memory= 2208.955 t= 905 R= 8e+04 +Depth= 9379 States= 6.9e+07 Transitions= 1e+09 Memory= 2223.311 t= 919 R= 8e+04 +Depth= 9379 States= 7e+07 Transitions= 1.01e+09 Memory= 2242.256 t= 928 R= 8e+04 +Depth= 9379 States= 7.1e+07 Transitions= 1.03e+09 Memory= 2257.295 t= 940 R= 8e+04 +Depth= 9379 States= 7.2e+07 Transitions= 1.05e+09 Memory= 2269.307 t= 960 R= 8e+04 +Depth= 9379 States= 7.3e+07 Transitions= 1.07e+09 Memory= 2283.760 t= 979 R= 7e+04 +Depth= 9379 States= 7.4e+07 Transitions= 1.09e+09 Memory= 2299.385 t= 996 R= 7e+04 +Depth= 9379 States= 7.5e+07 Transitions= 1.11e+09 Memory= 2314.619 t= 1.01e+03 R= 7e+04 +Depth= 9379 States= 7.6e+07 Transitions= 1.12e+09 Memory= 2333.369 t= 1.02e+03 R= 7e+04 +Depth= 9379 States= 7.7e+07 Transitions= 1.14e+09 Memory= 2347.139 t= 1.04e+03 R= 7e+04 +Depth= 9379 States= 7.8e+07 Transitions= 1.15e+09 Memory= 2385.029 t= 1.06e+03 R= 7e+04 +Depth= 9379 States= 7.9e+07 Transitions= 1.17e+09 Memory= 2453.682 t= 1.07e+03 R= 7e+04 +Depth= 9379 States= 8e+07 Transitions= 1.18e+09 Memory= 2522.236 t= 1.08e+03 R= 7e+04 +Depth= 9379 States= 8.1e+07 Transitions= 1.2e+09 Memory= 2590.889 t= 1.1e+03 R= 7e+04 +Depth= 9379 States= 8.2e+07 Transitions= 1.22e+09 Memory= 2624.287 t= 1.12e+03 R= 7e+04 +Depth= 9379 States= 8.3e+07 Transitions= 1.23e+09 Memory= 2640.303 t= 1.13e+03 R= 7e+04 +Depth= 9379 States= 8.4e+07 Transitions= 1.25e+09 Memory= 2654.170 t= 1.15e+03 R= 7e+04 +Depth= 9379 States= 8.5e+07 Transitions= 1.27e+09 Memory= 2669.111 t= 1.16e+03 R= 7e+04 +Depth= 9379 States= 8.6e+07 Transitions= 1.29e+09 Memory= 2684.053 t= 1.18e+03 R= 7e+04 +Depth= 9379 States= 8.7e+07 Transitions= 1.31e+09 Memory= 2698.604 t= 1.2e+03 R= 7e+04 +Depth= 9379 States= 8.8e+07 Transitions= 1.33e+09 Memory= 2719.697 t= 1.22e+03 R= 7e+04 +Depth= 9379 States= 8.9e+07 Transitions= 1.35e+09 Memory= 2788.350 t= 1.24e+03 R= 7e+04 +Depth= 9379 States= 9e+07 Transitions= 1.37e+09 Memory= 2819.990 t= 1.26e+03 R= 7e+04 +Depth= 9379 States= 9.1e+07 Transitions= 1.39e+09 Memory= 2846.553 t= 1.27e+03 R= 7e+04 +Depth= 9379 States= 9.2e+07 Transitions= 1.4e+09 Memory= 2864.912 t= 1.28e+03 R= 7e+04 +Depth= 9379 States= 9.3e+07 Transitions= 1.41e+09 Memory= 2877.901 t= 1.3e+03 R= 7e+04 +Depth= 9379 States= 9.4e+07 Transitions= 1.44e+09 Memory= 2892.842 t= 1.31e+03 R= 7e+04 +Depth= 9379 States= 9.5e+07 Transitions= 1.45e+09 Memory= 2908.076 t= 1.33e+03 R= 7e+04 +Depth= 9379 States= 9.6e+07 Transitions= 1.47e+09 Memory= 2922.627 t= 1.35e+03 R= 7e+04 +Depth= 9379 States= 9.7e+07 Transitions= 1.49e+09 Memory= 2940.693 t= 1.36e+03 R= 7e+04 +Depth= 9379 States= 9.8e+07 Transitions= 1.51e+09 Memory= 2953.291 t= 1.38e+03 R= 7e+04 +Depth= 9379 States= 9.9e+07 Transitions= 1.53e+09 Memory= 2968.526 t= 1.4e+03 R= 7e+04 +Depth= 9379 States= 1e+08 Transitions= 1.56e+09 Memory= 2981.709 t= 1.42e+03 R= 7e+04 +Depth= 9379 States= 1.01e+08 Transitions= 1.57e+09 Memory= 2997.236 t= 1.44e+03 R= 7e+04 +Depth= 9379 States= 1.02e+08 Transitions= 1.59e+09 Memory= 3011.592 t= 1.46e+03 R= 7e+04 +Depth= 9379 States= 1.03e+08 Transitions= 1.61e+09 Memory= 3037.861 t= 1.47e+03 R= 7e+04 +Depth= 9379 States= 1.04e+08 Transitions= 1.63e+09 Memory= 3106.514 t= 1.49e+03 R= 7e+04 +Depth= 9379 States= 1.05e+08 Transitions= 1.65e+09 Memory= 3175.166 t= 1.51e+03 R= 7e+04 +Depth= 9379 States= 1.06e+08 Transitions= 1.67e+09 Memory= 3223.897 t= 1.52e+03 R= 7e+04 +Depth= 9379 States= 1.07e+08 Transitions= 1.68e+09 Memory= 3246.846 t= 1.54e+03 R= 7e+04 +Depth= 9379 States= 1.08e+08 Transitions= 1.7e+09 Memory= 3283.467 t= 1.56e+03 R= 7e+04 +Depth= 9379 States= 1.09e+08 Transitions= 1.72e+09 Memory= 3316.670 t= 1.57e+03 R= 7e+04 +Depth= 9379 States= 1.1e+08 Transitions= 1.73e+09 Memory= 3344.209 t= 1.59e+03 R= 7e+04 +Depth= 9379 States= 1.11e+08 Transitions= 1.75e+09 Memory= 3376.338 t= 1.6e+03 R= 7e+04 +Depth= 9379 States= 1.12e+08 Transitions= 1.76e+09 Memory= 3396.943 t= 1.62e+03 R= 7e+04 +Depth= 9379 States= 1.13e+08 Transitions= 1.78e+09 Memory= 3426.143 t= 1.63e+03 R= 7e+04 +Depth= 9379 States= 1.14e+08 Transitions= 1.8e+09 Memory= 3452.705 t= 1.65e+03 R= 7e+04 +Depth= 9379 States= 1.15e+08 Transitions= 1.81e+09 Memory= 3493.818 t= 1.66e+03 R= 7e+04 +Depth= 9379 States= 1.16e+08 Transitions= 1.83e+09 Memory= 3533.369 t= 1.67e+03 R= 7e+04 +Depth= 9379 States= 1.17e+08 Transitions= 1.84e+09 Memory= 3566.182 t= 1.69e+03 R= 7e+04 +Depth= 9379 States= 1.18e+08 Transitions= 1.86e+09 Memory= 3582.881 t= 1.7e+03 R= 7e+04 +Depth= 9379 States= 1.19e+08 Transitions= 1.88e+09 Memory= 3630.830 t= 1.72e+03 R= 7e+04 +Depth= 9379 States= 1.2e+08 Transitions= 1.89e+09 Memory= 3692.744 t= 1.74e+03 R= 7e+04 +Depth= 9379 States= 1.21e+08 Transitions= 1.91e+09 Memory= 3750.361 t= 1.75e+03 R= 7e+04 +Depth= 9379 States= 1.22e+08 Transitions= 1.92e+09 Memory= 3767.354 t= 1.76e+03 R= 7e+04 +Depth= 9379 States= 1.23e+08 Transitions= 1.94e+09 Memory= 3781.904 t= 1.78e+03 R= 7e+04 +Depth= 9379 States= 1.24e+08 Transitions= 1.96e+09 Memory= 3797.529 t= 1.8e+03 R= 7e+04 +Depth= 9379 States= 1.25e+08 Transitions= 1.98e+09 Memory= 3810.908 t= 1.82e+03 R= 7e+04 +Depth= 9379 States= 1.26e+08 Transitions= 2e+09 Memory= 3826.143 t= 1.83e+03 R= 7e+04 +Depth= 9379 States= 1.27e+08 Transitions= 2.02e+09 Memory= 3839.717 t= 1.86e+03 R= 7e+04 +Depth= 9379 States= 1.28e+08 Transitions= 2.04e+09 Memory= 3881.709 t= 1.87e+03 R= 7e+04 +Depth= 9379 States= 1.29e+08 Transitions= 2.06e+09 Memory= 3946.553 t= 1.89e+03 R= 7e+04 +Depth= 9379 States= 1.3e+08 Transitions= 2.08e+09 Memory= 3970.479 t= 1.91e+03 R= 7e+04 +Depth= 9379 States= 1.31e+08 Transitions= 2.09e+09 Memory= 3991.768 t= 1.92e+03 R= 7e+04 +Depth= 9379 States= 1.32e+08 Transitions= 2.1e+09 Memory= 4007.490 t= 1.93e+03 R= 7e+04 +Depth= 9379 States= 1.33e+08 Transitions= 2.13e+09 Memory= 4020.772 t= 1.95e+03 R= 7e+04 +Depth= 9379 States= 1.34e+08 Transitions= 2.14e+09 Memory= 4036.201 t= 1.97e+03 R= 7e+04 +Depth= 9379 States= 1.35e+08 Transitions= 2.16e+09 Memory= 4051.924 t= 1.98e+03 R= 7e+04 +pan: resizing hashtable to -w28.. done +Depth= 9379 States= 1.36e+08 Transitions= 2.18e+09 Memory= 6099.924 t= 2.02e+03 R= 7e+04 +Depth= 9379 States= 1.37e+08 Transitions= 2.2e+09 Memory= 6099.924 t= 2.03e+03 R= 7e+04 +Depth= 9379 States= 1.38e+08 Transitions= 2.22e+09 Memory= 6099.924 t= 2.05e+03 R= 7e+04 +Depth= 9379 States= 1.39e+08 Transitions= 2.24e+09 Memory= 6099.924 t= 2.07e+03 R= 7e+04 +Depth= 9379 States= 1.4e+08 Transitions= 2.26e+09 Memory= 6108.518 t= 2.09e+03 R= 7e+04 +Depth= 9379 States= 1.41e+08 Transitions= 2.28e+09 Memory= 6124.729 t= 2.1e+03 R= 7e+04 +Depth= 9379 States= 1.42e+08 Transitions= 2.3e+09 Memory= 6138.889 t= 2.12e+03 R= 7e+04 +Depth= 9379 States= 1.43e+08 Transitions= 2.31e+09 Memory= 6178.928 t= 2.13e+03 R= 7e+04 +Depth= 9379 States= 1.44e+08 Transitions= 2.33e+09 Memory= 6247.483 t= 2.15e+03 R= 7e+04 +Depth= 9379 States= 1.45e+08 Transitions= 2.35e+09 Memory= 6316.135 t= 2.17e+03 R= 7e+04 +Depth= 9379 States= 1.46e+08 Transitions= 2.37e+09 Memory= 6353.440 t= 2.19e+03 R= 7e+04 +Depth= 9379 States= 1.47e+08 Transitions= 2.39e+09 Memory= 6381.662 t= 2.21e+03 R= 7e+04 +Depth= 9379 States= 1.48e+08 Transitions= 2.41e+09 Memory= 6422.190 t= 2.22e+03 R= 7e+04 +Depth= 9379 States= 1.49e+08 Transitions= 2.42e+09 Memory= 6449.143 t= 2.23e+03 R= 7e+04 +Depth= 9379 States= 1.5e+08 Transitions= 2.44e+09 Memory= 6472.580 t= 2.25e+03 R= 7e+04 +Depth= 9379 States= 1.51e+08 Transitions= 2.45e+09 Memory= 6503.733 t= 2.26e+03 R= 7e+04 +Depth= 9379 States= 1.52e+08 Transitions= 2.47e+09 Memory= 6531.369 t= 2.28e+03 R= 7e+04 +Depth= 9379 States= 1.53e+08 Transitions= 2.49e+09 Memory= 6554.123 t= 2.29e+03 R= 7e+04 +Depth= 9379 States= 1.54e+08 Transitions= 2.5e+09 Memory= 6585.373 t= 2.31e+03 R= 7e+04 +Depth= 9379 States= 1.55e+08 Transitions= 2.52e+09 Memory= 6622.776 t= 2.32e+03 R= 7e+04 +Depth= 9379 States= 1.56e+08 Transitions= 2.54e+09 Memory= 6671.213 t= 2.34e+03 R= 7e+04 +Depth= 9379 States= 1.57e+08 Transitions= 2.55e+09 Memory= 6696.115 t= 2.35e+03 R= 7e+04 +Depth= 9379 States= 1.58e+08 Transitions= 2.57e+09 Memory= 6722.776 t= 2.37e+03 R= 7e+04 +Depth= 9379 States= 1.59e+08 Transitions= 2.58e+09 Memory= 6764.572 t= 2.38e+03 R= 7e+04 +Depth= 9379 States= 1.6e+08 Transitions= 2.6e+09 Memory= 6830.490 t= 2.4e+03 R= 7e+04 +Depth= 9379 States= 1.61e+08 Transitions= 2.62e+09 Memory= 6879.026 t= 2.41e+03 R= 7e+04 +Depth= 9379 States= 1.62e+08 Transitions= 2.63e+09 Memory= 6895.432 t= 2.42e+03 R= 7e+04 +Depth= 9379 States= 1.63e+08 Transitions= 2.65e+09 Memory= 6909.787 t= 2.44e+03 R= 7e+04 +Depth= 9379 States= 1.64e+08 Transitions= 2.67e+09 Memory= 6925.217 t= 2.46e+03 R= 7e+04 +Depth= 9379 States= 1.65e+08 Transitions= 2.69e+09 Memory= 6938.986 t= 2.48e+03 R= 7e+04 +Depth= 9379 States= 1.66e+08 Transitions= 2.71e+09 Memory= 6953.537 t= 2.5e+03 R= 7e+04 +Depth= 9379 States= 1.67e+08 Transitions= 2.73e+09 Memory= 6967.893 t= 2.52e+03 R= 7e+04 +Depth= 9379 States= 1.68e+08 Transitions= 2.75e+09 Memory= 7022.190 t= 2.53e+03 R= 7e+04 +Depth= 9379 States= 1.69e+08 Transitions= 2.77e+09 Memory= 7076.779 t= 2.55e+03 R= 7e+04 +Depth= 9379 States= 1.7e+08 Transitions= 2.79e+09 Memory= 7102.365 t= 2.57e+03 R= 7e+04 +Depth= 9379 States= 1.71e+08 Transitions= 2.8e+09 Memory= 7119.162 t= 2.58e+03 R= 7e+04 +Depth= 9379 States= 1.72e+08 Transitions= 2.81e+09 Memory= 7135.178 t= 2.59e+03 R= 7e+04 +Depth= 9379 States= 1.73e+08 Transitions= 2.84e+09 Memory= 7150.022 t= 2.61e+03 R= 7e+04 +Depth= 9379 States= 1.74e+08 Transitions= 2.85e+09 Memory= 7164.475 t= 2.63e+03 R= 7e+04 +Depth= 9379 States= 1.75e+08 Transitions= 2.87e+09 Memory= 7180.295 t= 2.64e+03 R= 7e+04 +Depth= 9379 States= 1.76e+08 Transitions= 2.89e+09 Memory= 7198.264 t= 2.66e+03 R= 7e+04 +Depth= 9379 States= 1.77e+08 Transitions= 2.9e+09 Memory= 7211.447 t= 2.67e+03 R= 7e+04 +Depth= 9379 States= 1.78e+08 Transitions= 2.93e+09 Memory= 7224.338 t= 2.7e+03 R= 7e+04 +Depth= 9379 States= 1.79e+08 Transitions= 2.95e+09 Memory= 7239.084 t= 2.72e+03 R= 7e+04 +Depth= 9379 States= 1.8e+08 Transitions= 2.97e+09 Memory= 7253.342 t= 2.74e+03 R= 7e+04 +Depth= 9379 States= 1.81e+08 Transitions= 2.99e+09 Memory= 7268.283 t= 2.75e+03 R= 7e+04 +Depth= 9379 States= 1.82e+08 Transitions= 3.01e+09 Memory= 7283.615 t= 2.77e+03 R= 7e+04 +Depth= 9379 States= 1.83e+08 Transitions= 3.02e+09 Memory= 7335.276 t= 2.78e+03 R= 7e+04 +Depth= 9379 States= 1.84e+08 Transitions= 3.04e+09 Memory= 7403.928 t= 2.8e+03 R= 7e+04 +Depth= 9379 States= 1.85e+08 Transitions= 3.06e+09 Memory= 7472.580 t= 2.82e+03 R= 7e+04 +Depth= 9379 States= 1.86e+08 Transitions= 3.08e+09 Memory= 7501.877 t= 2.84e+03 R= 7e+04 +Depth= 9379 States= 1.87e+08 Transitions= 3.1e+09 Memory= 7528.147 t= 2.85e+03 R= 7e+04 +Depth= 9379 States= 1.88e+08 Transitions= 3.11e+09 Memory= 7566.135 t= 2.87e+03 R= 7e+04 +Depth= 9379 States= 1.89e+08 Transitions= 3.13e+09 Memory= 7593.479 t= 2.88e+03 R= 7e+04 +Depth= 9379 States= 1.9e+08 Transitions= 3.15e+09 Memory= 7625.119 t= 2.9e+03 R= 7e+04 +Depth= 9379 States= 1.91e+08 Transitions= 3.16e+09 Memory= 7647.483 t= 2.91e+03 R= 7e+04 +Depth= 9379 States= 1.92e+08 Transitions= 3.18e+09 Memory= 7677.951 t= 2.93e+03 R= 7e+04 +Depth= 9379 States= 1.93e+08 Transitions= 3.2e+09 Memory= 7698.947 t= 2.94e+03 R= 7e+04 +Depth= 9379 States= 1.94e+08 Transitions= 3.21e+09 Memory= 7732.443 t= 2.96e+03 R= 7e+04 +Depth= 9379 States= 1.95e+08 Transitions= 3.23e+09 Memory= 7772.092 t= 2.97e+03 R= 7e+04 +Depth= 9379 States= 1.96e+08 Transitions= 3.24e+09 Memory= 7815.451 t= 2.98e+03 R= 7e+04 +Depth= 9379 States= 1.97e+08 Transitions= 3.26e+09 Memory= 7839.865 t= 3e+03 R= 7e+04 +Depth= 9379 States= 1.98e+08 Transitions= 3.28e+09 Memory= 7869.651 t= 3.01e+03 R= 7e+04 +Depth= 9379 States= 1.99e+08 Transitions= 3.29e+09 Memory= 7921.018 t= 3.03e+03 R= 7e+04 +Depth= 9379 States= 2e+08 Transitions= 3.31e+09 Memory= 7986.740 t= 3.05e+03 R= 7e+04 +Depth= 9379 States= 2.01e+08 Transitions= 3.33e+09 Memory= 8023.752 t= 3.06e+03 R= 7e+04 +Depth= 9379 States= 2.02e+08 Transitions= 3.34e+09 Memory= 8039.768 t= 3.07e+03 R= 7e+04 +Depth= 9379 States= 2.03e+08 Transitions= 3.36e+09 Memory= 8053.830 t= 3.09e+03 R= 7e+04 +Depth= 9379 States= 2.04e+08 Transitions= 3.38e+09 Memory= 8068.772 t= 3.11e+03 R= 7e+04 +Depth= 9379 States= 2.05e+08 Transitions= 3.4e+09 Memory= 8083.127 t= 3.13e+03 R= 7e+04 +Depth= 9379 States= 2.06e+08 Transitions= 3.42e+09 Memory= 8098.068 t= 3.15e+03 R= 7e+04 +Depth= 9379 States= 2.07e+08 Transitions= 3.44e+09 Memory= 8115.744 t= 3.16e+03 R= 7e+04 +Depth= 9379 States= 2.08e+08 Transitions= 3.46e+09 Memory= 8178.537 t= 3.18e+03 R= 7e+04 +Depth= 9379 States= 2.09e+08 Transitions= 3.48e+09 Memory= 8220.627 t= 3.2e+03 R= 7e+04 +Depth= 9379 States= 2.1e+08 Transitions= 3.49e+09 Memory= 8246.799 t= 3.21e+03 R= 7e+04 +Depth= 9379 States= 2.11e+08 Transitions= 3.5e+09 Memory= 8263.791 t= 3.22e+03 R= 7e+04 +Depth= 9379 States= 2.12e+08 Transitions= 3.52e+09 Memory= 8279.514 t= 3.24e+03 R= 7e+04 +Depth= 9379 States= 2.13e+08 Transitions= 3.54e+09 Memory= 8293.772 t= 3.26e+03 R= 7e+04 +Depth= 9379 States= 2.14e+08 Transitions= 3.56e+09 Memory= 8309.201 t= 3.28e+03 R= 7e+04 +Depth= 9379 States= 2.15e+08 Transitions= 3.58e+09 Memory= 8323.752 t= 3.29e+03 R= 7e+04 +Depth= 9379 States= 2.16e+08 Transitions= 3.6e+09 Memory= 8342.990 t= 3.31e+03 R= 7e+04 +Depth= 9379 States= 2.17e+08 Transitions= 3.61e+09 Memory= 8355.197 t= 3.32e+03 R= 7e+04 +Depth= 9379 States= 2.18e+08 Transitions= 3.64e+09 Memory= 8368.674 t= 3.35e+03 R= 7e+04 +Depth= 9379 States= 2.19e+08 Transitions= 3.66e+09 Memory= 8382.932 t= 3.37e+03 R= 7e+04 +Depth= 9379 States= 2.2e+08 Transitions= 3.68e+09 Memory= 8398.459 t= 3.38e+03 R= 7e+04 +Depth= 9379 States= 2.21e+08 Transitions= 3.7e+09 Memory= 8412.912 t= 3.4e+03 R= 6e+04 +Depth= 9379 States= 2.22e+08 Transitions= 3.71e+09 Memory= 8428.244 t= 3.42e+03 R= 6e+04 +Depth= 9379 States= 2.23e+08 Transitions= 3.73e+09 Memory= 8491.721 t= 3.43e+03 R= 6e+04 +Depth= 9379 States= 2.24e+08 Transitions= 3.75e+09 Memory= 8560.373 t= 3.45e+03 R= 6e+04 +Depth= 9379 States= 2.25e+08 Transitions= 3.77e+09 Memory= 8621.604 t= 3.47e+03 R= 6e+04 +Depth= 9379 States= 2.26e+08 Transitions= 3.79e+09 Memory= 8648.850 t= 3.48e+03 R= 6e+04 +Depth= 9379 States= 2.27e+08 Transitions= 3.81e+09 Memory= 8671.994 t= 3.5e+03 R= 6e+04 +Depth= 9379 States= 2.28e+08 Transitions= 3.82e+09 Memory= 8710.861 t= 3.51e+03 R= 6e+04 +Depth= 9379 States= 2.29e+08 Transitions= 3.84e+09 Memory= 8742.893 t= 3.53e+03 R= 6e+04 +Depth= 9379 States= 2.3e+08 Transitions= 3.85e+09 Memory= 8771.799 t= 3.54e+03 R= 6e+04 +Depth= 9379 States= 2.31e+08 Transitions= 3.87e+09 Memory= 8792.600 t= 3.56e+03 R= 6e+04 +Depth= 9379 States= 2.32e+08 Transitions= 3.89e+09 Memory= 8828.733 t= 3.57e+03 R= 6e+04 +Depth= 9379 States= 2.33e+08 Transitions= 3.9e+09 Memory= 8843.869 t= 3.59e+03 R= 6e+04 +Depth= 9379 States= 2.34e+08 Transitions= 3.92e+09 Memory= 8884.787 t= 3.6e+03 R= 6e+04 +Depth= 9379 States= 2.35e+08 Transitions= 3.93e+09 Memory= 8924.240 t= 3.62e+03 R= 6e+04 +Depth= 9379 States= 2.36e+08 Transitions= 3.95e+09 Memory= 8960.276 t= 3.63e+03 R= 6e+04 +Depth= 9379 States= 2.37e+08 Transitions= 3.97e+09 Memory= 8984.494 t= 3.65e+03 R= 6e+04 +Depth= 9379 States= 2.38e+08 Transitions= 3.98e+09 Memory= 9016.428 t= 3.66e+03 R= 6e+04 +Depth= 9379 States= 2.39e+08 Transitions= 4e+09 Memory= 9077.365 t= 3.68e+03 R= 6e+04 +Depth= 9379 States= 2.4e+08 Transitions= 4.02e+09 Memory= 9143.088 t= 3.7e+03 R= 6e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 9379, errors: 0 + 88114592 states, stored (2.40192e+08 visited) +3.782223e+09 states, matched +4.0224152e+09 transitions (= visited+matched) +1.4282782e+10 atomic steps +hash conflicts: 5.384059e+08 (resolved) + +Stats on memory usage (in Megabytes): + 7731.001 equivalent memory usage for states (stored*(State-vector + overhead)) + 6648.180 actual memory usage for states (compression: 85.99%) + state-vector as stored = 51 byte + 28 byte overhead + 2048.000 memory used for hash table (-w28) + 457.764 memory used for DFS stack (-m10000000) + 1.188 memory lost to fragmentation + 9152.756 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 256, "(1)" + line 418, "pan.___", state 286, "(1)" + line 399, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 395, "(1)" + line 418, "pan.___", state 425, "(1)" + line 540, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 399, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 70, "(1)" + line 418, "pan.___", state 100, "(1)" + line 399, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 158, "(1)" + line 418, "pan.___", state 188, "(1)" + line 399, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 247, "(1)" + line 418, "pan.___", state 277, "(1)" + line 399, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 359, "(1)" + line 418, "pan.___", state 389, "(1)" + line 614, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 370, "(1)" + line 164, "pan.___", state 378, "(1)" + line 168, "pan.___", state 390, "(1)" + line 399, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 449, "(1)" + line 413, "pan.___", state 462, "(1)" + line 418, "pan.___", state 479, "(1)" + line 399, "pan.___", state 498, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 403, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 647, "(1)" + line 418, "pan.___", state 664, "(1)" + line 179, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 710, "(1)" + line 164, "pan.___", state 718, "(1)" + line 168, "pan.___", state 730, "(1)" + line 175, "pan.___", state 741, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 817, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 830, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 840, "(1)" + line 164, "pan.___", state 848, "(1)" + line 168, "pan.___", state 860, "(1)" + line 399, "pan.___", state 882, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 884, "(1)" + line 399, "pan.___", state 885, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 885, "else" + line 399, "pan.___", state 888, "(1)" + line 403, "pan.___", state 896, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 898, "(1)" + line 403, "pan.___", state 899, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 899, "else" + line 403, "pan.___", state 902, "(1)" + line 403, "pan.___", state 903, "(1)" + line 403, "pan.___", state 903, "(1)" + line 401, "pan.___", state 908, "((i<1))" + line 401, "pan.___", state 908, "((i>=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1485, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1498, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1508, "(1)" + line 164, "pan.___", state 1516, "(1)" + line 168, "pan.___", state 1528, "(1)" + line 399, "pan.___", state 1550, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1552, "(1)" + line 399, "pan.___", state 1553, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 399, "pan.___", state 1553, "else" + line 399, "pan.___", state 1556, "(1)" + line 403, "pan.___", state 1564, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1566, "(1)" + line 403, "pan.___", state 1567, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 403, "pan.___", state 1567, "else" + line 403, "pan.___", state 1570, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 403, "pan.___", state 1571, "(1)" + line 401, "pan.___", state 1576, "((i<1))" + line 401, "pan.___", state 1576, "((i>=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 179, "pan.___", state 1788, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 183, "pan.___", state 1801, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 160, "pan.___", state 1811, "(1)" + line 164, "pan.___", state 1819, "(1)" + line 168, "pan.___", state 1831, "(1)" + line 702, "pan.___", state 1856, "-end-" + (158 of 1856 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 751, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 3.7e+03 seconds +pan: rate 64918.749 states/second +pan: avg transition delay 9.1982e-07 usec +cp .input.spin urcu_progress_writer.spin.input +cp .input.spin.trail urcu_progress_writer.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_progress_writer.spin.input b/urcu/result-signal-over-reader/urcu_progress_writer.spin.input new file mode 100644 index 0000000..43221e7 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer.spin.input @@ -0,0 +1,723 @@ +#define WRITER_PROGRESS + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_progress_writer.spin.input.trail b/urcu/result-signal-over-reader/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu/result-signal-over-reader/urcu_progress_writer_error.define b/urcu/result-signal-over-reader/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu/result-signal-over-reader/urcu_progress_writer_error.log b/urcu/result-signal-over-reader/urcu_progress_writer_error.log new file mode 100644 index 0000000..f870a6e --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer_error.log @@ -0,0 +1,535 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +depth 15: Claim reached state 9 (line 750) +depth 1194: Claim reached state 9 (line 749) +Depth= 3253 States= 1e+06 Transitions= 1.06e+07 Memory= 484.416 t= 9.57 R= 1e+05 +Depth= 3253 States= 2e+06 Transitions= 2.04e+07 Memory= 501.311 t= 18.5 R= 1e+05 +pan: acceptance cycle (at depth 1938) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 64 byte, depth reached 23684, errors: 1 + 682672 states, stored (2.81536e+06 visited) + 30226122 states, matched + 33041487 transitions (= visited+matched) +1.1631626e+08 atomic steps +hash conflicts: 6056013 (resolved) + +Stats on memory usage (in Megabytes): + 59.896 equivalent memory usage for states (stored*(State-vector + overhead)) + 47.456 actual memory usage for states (compression: 79.23%) + state-vector as stored = 45 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 513.127 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 211, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 243, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 256, "(1)" + line 419, "pan.___", state 286, "(1)" + line 400, "pan.___", state 350, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 382, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 395, "(1)" + line 419, "pan.___", state 425, "(1)" + line 541, "pan.___", state 456, "-end-" + (17 of 456 states) +unreached in proctype urcu_reader_sig + line 400, "pan.___", state 25, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 57, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 70, "(1)" + line 419, "pan.___", state 100, "(1)" + line 400, "pan.___", state 113, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 145, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 158, "(1)" + line 419, "pan.___", state 188, "(1)" + line 400, "pan.___", state 202, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 234, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 247, "(1)" + line 419, "pan.___", state 277, "(1)" + line 400, "pan.___", state 314, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 359, "(1)" + line 419, "pan.___", state 389, "(1)" + line 615, "pan.___", state 411, "-end-" + (17 of 411 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[( ((_pid<2)) ? (0) : (1) )]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 402, "pan.___", state 134, "((i<1))" + line 402, "pan.___", state 134, "((i>=1))" + line 410, "pan.___", state 153, "(1)" + line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 154, "else" + line 410, "pan.___", state 157, "(1)" + line 410, "pan.___", state 158, "(1)" + line 410, "pan.___", state 158, "(1)" + line 414, "pan.___", state 166, "(1)" + line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 167, "else" + line 414, "pan.___", state 170, "(1)" + line 414, "pan.___", state 171, "(1)" + line 414, "pan.___", state 171, "(1)" + line 412, "pan.___", state 176, "((i<1))" + line 412, "pan.___", state 176, "((i>=1))" + line 419, "pan.___", state 183, "(1)" + line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 184, "else" + line 419, "pan.___", state 187, "(1)" + line 419, "pan.___", state 188, "(1)" + line 419, "pan.___", state 188, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 370, "pan.___", state 193, "(1)" + line 653, "pan.___", state 199, "(1)" + line 647, "pan.___", state 202, "((write_lock==0))" + line 647, "pan.___", state 202, "else" + line 645, "pan.___", state 203, "(1)" + line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, "pan.___", state 225, "((j<1))" + line 178, "pan.___", state 225, "((j>=1))" + line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 240, "(1)" + line 165, "pan.___", state 248, "(1)" + line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 165, "pan.___", state 249, "else" + line 163, "pan.___", state 254, "((j<1))" + line 163, "pan.___", state 254, "((j>=1))" + line 169, "pan.___", state 260, "(1)" + line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 169, "pan.___", state 261, "else" + line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 171, "pan.___", state 264, "else" + line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 169, "pan.___", state 323, "(1)" + line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 178, "pan.___", state 355, "((j<1))" + line 178, "pan.___", state 355, "((j>=1))" + line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 370, "(1)" + line 165, "pan.___", state 378, "(1)" + line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 165, "pan.___", state 379, "else" + line 163, "pan.___", state 384, "((j<1))" + line 163, "pan.___", state 384, "((j>=1))" + line 169, "pan.___", state 390, "(1)" + line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 169, "pan.___", state 391, "else" + line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 171, "pan.___", state 394, "else" + line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 410, "(1)" + line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 424, "(1)" + line 404, "pan.___", state 425, "(1)" + line 404, "pan.___", state 425, "(1)" + line 402, "pan.___", state 430, "((i<1))" + line 402, "pan.___", state 430, "((i>=1))" + line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 449, "(1)" + line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 450, "else" + line 410, "pan.___", state 453, "(1)" + line 410, "pan.___", state 454, "(1)" + line 410, "pan.___", state 454, "(1)" + line 414, "pan.___", state 462, "(1)" + line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 463, "else" + line 414, "pan.___", state 466, "(1)" + line 414, "pan.___", state 467, "(1)" + line 414, "pan.___", state 467, "(1)" + line 412, "pan.___", state 472, "((i<1))" + line 412, "pan.___", state 472, "((i>=1))" + line 419, "pan.___", state 479, "(1)" + line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 480, "else" + line 419, "pan.___", state 483, "(1)" + line 419, "pan.___", state 484, "(1)" + line 419, "pan.___", state 484, "(1)" + line 421, "pan.___", state 487, "(1)" + line 421, "pan.___", state 487, "(1)" + line 370, "pan.___", state 489, "(1)" + line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )] = (tmp^(1<<7))" + line 400, "pan.___", state 498, "(1)" + line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 499, "else" + line 400, "pan.___", state 502, "(1)" + line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 516, "(1)" + line 404, "pan.___", state 517, "(1)" + line 404, "pan.___", state 517, "(1)" + line 402, "pan.___", state 522, "((i<1))" + line 402, "pan.___", state 522, "((i>=1))" + line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 541, "(1)" + line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 542, "else" + line 410, "pan.___", state 545, "(1)" + line 410, "pan.___", state 546, "(1)" + line 410, "pan.___", state 546, "(1)" + line 414, "pan.___", state 554, "(1)" + line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 555, "else" + line 414, "pan.___", state 558, "(1)" + line 414, "pan.___", state 559, "(1)" + line 414, "pan.___", state 559, "(1)" + line 412, "pan.___", state 564, "((i<1))" + line 412, "pan.___", state 564, "((i>=1))" + line 419, "pan.___", state 571, "(1)" + line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 572, "else" + line 419, "pan.___", state 575, "(1)" + line 419, "pan.___", state 576, "(1)" + line 419, "pan.___", state 576, "(1)" + line 421, "pan.___", state 579, "(1)" + line 421, "pan.___", state 579, "(1)" + line 370, "pan.___", state 581, "(1)" + line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 595, "(1)" + line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 609, "(1)" + line 404, "pan.___", state 610, "(1)" + line 404, "pan.___", state 610, "(1)" + line 402, "pan.___", state 615, "((i<1))" + line 402, "pan.___", state 615, "((i>=1))" + line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 634, "(1)" + line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 635, "else" + line 410, "pan.___", state 638, "(1)" + line 410, "pan.___", state 639, "(1)" + line 410, "pan.___", state 639, "(1)" + line 414, "pan.___", state 647, "(1)" + line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 648, "else" + line 414, "pan.___", state 651, "(1)" + line 414, "pan.___", state 652, "(1)" + line 414, "pan.___", state 652, "(1)" + line 412, "pan.___", state 657, "((i<1))" + line 412, "pan.___", state 657, "((i>=1))" + line 419, "pan.___", state 664, "(1)" + line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 665, "else" + line 419, "pan.___", state 668, "(1)" + line 419, "pan.___", state 669, "(1)" + line 419, "pan.___", state 669, "(1)" + line 421, "pan.___", state 672, "(1)" + line 421, "pan.___", state 672, "(1)" + line 370, "pan.___", state 674, "(1)" + line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 681, "(1)" + line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 682, "else" + line 400, "pan.___", state 685, "(1)" + line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 695, "(1)" + line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 696, "else" + line 404, "pan.___", state 699, "(1)" + line 404, "pan.___", state 700, "(1)" + line 404, "pan.___", state 700, "(1)" + line 402, "pan.___", state 705, "((i<1))" + line 402, "pan.___", state 705, "((i>=1))" + line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 724, "(1)" + line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 725, "else" + line 410, "pan.___", state 728, "(1)" + line 410, "pan.___", state 729, "(1)" + line 410, "pan.___", state 729, "(1)" + line 414, "pan.___", state 737, "(1)" + line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 738, "else" + line 414, "pan.___", state 741, "(1)" + line 414, "pan.___", state 742, "(1)" + line 414, "pan.___", state 742, "(1)" + line 412, "pan.___", state 747, "((i<1))" + line 412, "pan.___", state 747, "((i>=1))" + line 419, "pan.___", state 754, "(1)" + line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 755, "else" + line 419, "pan.___", state 758, "(1)" + line 419, "pan.___", state 759, "(1)" + line 419, "pan.___", state 759, "(1)" + line 421, "pan.___", state 762, "(1)" + line 421, "pan.___", state 762, "(1)" + line 370, "pan.___", state 764, "(1)" + line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )])&(1<<7))))" + line 430, "pan.___", state 767, "else" + line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 779, "(1)" + line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 780, "else" + line 400, "pan.___", state 783, "(1)" + line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 793, "(1)" + line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 794, "else" + line 404, "pan.___", state 797, "(1)" + line 404, "pan.___", state 798, "(1)" + line 404, "pan.___", state 798, "(1)" + line 402, "pan.___", state 803, "((i<1))" + line 402, "pan.___", state 803, "((i>=1))" + line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 822, "(1)" + line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 823, "else" + line 410, "pan.___", state 826, "(1)" + line 410, "pan.___", state 827, "(1)" + line 410, "pan.___", state 827, "(1)" + line 414, "pan.___", state 835, "(1)" + line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 836, "else" + line 414, "pan.___", state 839, "(1)" + line 414, "pan.___", state 840, "(1)" + line 414, "pan.___", state 840, "(1)" + line 412, "pan.___", state 845, "((i<1))" + line 412, "pan.___", state 845, "((i>=1))" + line 419, "pan.___", state 852, "(1)" + line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 853, "else" + line 419, "pan.___", state 856, "(1)" + line 419, "pan.___", state 857, "(1)" + line 419, "pan.___", state 857, "(1)" + line 421, "pan.___", state 860, "(1)" + line 421, "pan.___", state 860, "(1)" + line 370, "pan.___", state 862, "(1)" + line 449, "pan.___", state 870, "((tmp<1))" + line 449, "pan.___", state 870, "((tmp>=1))" + line 462, "pan.___", state 873, "tmp = 0" + line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 883, "(1)" + line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 897, "(1)" + line 404, "pan.___", state 898, "(1)" + line 404, "pan.___", state 898, "(1)" + line 402, "pan.___", state 903, "((i<1))" + line 402, "pan.___", state 903, "((i>=1))" + line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 922, "(1)" + line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 923, "else" + line 410, "pan.___", state 926, "(1)" + line 410, "pan.___", state 927, "(1)" + line 410, "pan.___", state 927, "(1)" + line 414, "pan.___", state 935, "(1)" + line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 936, "else" + line 414, "pan.___", state 939, "(1)" + line 414, "pan.___", state 940, "(1)" + line 414, "pan.___", state 940, "(1)" + line 412, "pan.___", state 945, "((i<1))" + line 412, "pan.___", state 945, "((i>=1))" + line 419, "pan.___", state 952, "(1)" + line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 953, "else" + line 419, "pan.___", state 956, "(1)" + line 419, "pan.___", state 957, "(1)" + line 419, "pan.___", state 957, "(1)" + line 421, "pan.___", state 960, "(1)" + line 421, "pan.___", state 960, "(1)" + line 370, "pan.___", state 962, "(1)" + line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[( ((_pid<2)) ? (0) : (1) )]" + line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 973, "(1)" + line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 987, "(1)" + line 404, "pan.___", state 988, "(1)" + line 404, "pan.___", state 988, "(1)" + line 402, "pan.___", state 993, "((i<1))" + line 402, "pan.___", state 993, "((i>=1))" + line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1012, "(1)" + line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1013, "else" + line 410, "pan.___", state 1016, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 414, "pan.___", state 1025, "(1)" + line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1026, "else" + line 414, "pan.___", state 1029, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 412, "pan.___", state 1035, "((i<1))" + line 412, "pan.___", state 1035, "((i>=1))" + line 419, "pan.___", state 1042, "(1)" + line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1043, "else" + line 419, "pan.___", state 1046, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 370, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1061, "(1)" + line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1117, "(1)" + line 419, "pan.___", state 1134, "(1)" + line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 414, "pan.___", state 1210, "(1)" + line 419, "pan.___", state 1227, "(1)" + line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1287, "(1)" + line 414, "pan.___", state 1300, "(1)" + line 419, "pan.___", state 1317, "(1)" + line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1342, "(1)" + line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 400, "pan.___", state 1343, "else" + line 400, "pan.___", state 1346, "(1)" + line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1356, "(1)" + line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) ))))" + line 404, "pan.___", state 1357, "else" + line 404, "pan.___", state 1360, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 402, "pan.___", state 1366, "((i<1))" + line 402, "pan.___", state 1366, "((i>=1))" + line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 410, "pan.___", state 1385, "(1)" + line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 410, "pan.___", state 1386, "else" + line 410, "pan.___", state 1389, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 414, "pan.___", state 1398, "(1)" + line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 414, "pan.___", state 1399, "else" + line 414, "pan.___", state 1402, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 412, "pan.___", state 1408, "((i<1))" + line 412, "pan.___", state 1408, "((i>=1))" + line 419, "pan.___", state 1415, "(1)" + line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<( ((_pid<2)) -> (0) : (1) )))))" + line 419, "pan.___", state 1416, "else" + line 419, "pan.___", state 1419, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 1471, "(1)" + line 165, "pan.___", state 1479, "(1)" + line 169, "pan.___", state 1491, "(1)" + line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< (0) : (1) ))))" + line 180, "pan.___", state 1578, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 184, "pan.___", state 1591, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<( ((_pid<2)) -> (0) : (1) ))))" + line 161, "pan.___", state 1601, "(1)" + line 165, "pan.___", state 1609, "(1)" + line 169, "pan.___", state 1621, "(1)" + line 370, "pan.___", state 1642, "(1)" + line 696, "pan.___", state 1643, "(1)" + line 703, "pan.___", state 1646, "-end-" + (308 of 1646 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 752, "pan.___", state 11, "-end-" + (1 of 11 states) + +pan: elapsed time 30.2 seconds +pan: rate 93347.646 states/second +pan: avg transition delay 9.1279e-07 usec +cp .input.spin urcu_progress_writer_error.spin.input +cp .input.spin.trail urcu_progress_writer_error.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input b/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..eb1d4e6 --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input @@ -0,0 +1,724 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail b/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..c5a6fbf --- /dev/null +++ b/urcu/result-signal-over-reader/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,23572 @@ +-2:4:-2 +-4:-4:-4 +1:0:2561 +2:4:2513 +3:4:2516 +4:4:2516 +5:4:2519 +6:4:2527 +7:4:2527 +8:4:2530 +9:4:2536 +10:4:2540 +11:4:2540 +12:4:2543 +13:4:2551 +14:4:2555 +15:4:2556 +16:0:2561 +17:4:2558 +18:0:2561 +19:3:869 +20:0:2561 +21:3:875 +22:0:2561 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+23561:3:2180 +23562:0:2565 +23563:3:2192 +23564:0:2565 +23565:3:2013 +23566:0:2565 +23567:3:2014 +23568:0:2565 +23569:1:206 diff --git a/urcu/result-signal-over-writer/DEFINES b/urcu/result-signal-over-writer/DEFINES new file mode 100644 index 0000000..ec600f0 --- /dev/null +++ b/urcu/result-signal-over-writer/DEFINES @@ -0,0 +1,16 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu/result-signal-over-writer/Makefile b/urcu/result-signal-over-writer/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu/result-signal-over-writer/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu/result-signal-over-writer/asserts.log b/urcu/result-signal-over-writer/asserts.log new file mode 100644 index 0000000..c102ffb --- /dev/null +++ b/urcu/result-signal-over-writer/asserts.log @@ -0,0 +1,334 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 40 byte, depth reached 7872, errors: 0 + 20128 states, stored + 191477 states, matched + 211605 transitions (= stored+matched) + 712166 atomic steps +hash conflicts: 942 (resolved) + +Stats on memory usage (in Megabytes): + 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.467 actual memory usage for states (unsuccessful compression: 112.36%) + state-vector as stored = 48 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.229 total actual memory usage + +unreached in proctype urcu_reader_sig + line 401, ".input.spin", state 330, "(1)" + line 612, ".input.spin", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 59, "(1)" + line 416, ".input.spin", state 89, "(1)" + line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 160, "(1)" + line 650, ".input.spin", state 213, "(1)" + line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 177, ".input.spin", state 233, "(1)" + line 158, ".input.spin", state 254, "(1)" + line 162, ".input.spin", state 262, "(1)" + line 166, ".input.spin", state 274, "(1)" + line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 752, "(1)" + line 162, ".input.spin", state 760, "(1)" + line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 761, "else" + line 160, ".input.spin", state 766, "((j<1))" + line 160, ".input.spin", state 766, "((j>=1))" + line 166, ".input.spin", state 772, "(1)" + line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 773, "else" + line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 776, "else" + line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 835, "(1)" + line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 852, "(1)" + line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 861, "(1)" + line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 862, "else" + line 175, ".input.spin", state 867, "((j<1))" + line 175, ".input.spin", state 867, "((j>=1))" + line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 882, "(1)" + line 162, ".input.spin", state 890, "(1)" + line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 891, "else" + line 160, ".input.spin", state 896, "((j<1))" + line 160, ".input.spin", state 896, "((j>=1))" + line 166, ".input.spin", state 902, "(1)" + line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 903, "else" + line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 906, "else" + line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 908, "else" + line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 909, "else" + line 354, ".input.spin", state 915, "((sighand_exec==1))" + line 354, ".input.spin", state 915, "else" + line 360, ".input.spin", state 918, "sighand_exec = 1" + line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 933, "(1)" + line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 934, "else" + line 397, ".input.spin", state 937, "(1)" + line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 947, "(1)" + line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 948, "else" + line 401, ".input.spin", state 951, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 399, ".input.spin", state 957, "((i<1))" + line 399, ".input.spin", state 957, "((i>=1))" + line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 976, "(1)" + line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 977, "else" + line 407, ".input.spin", state 980, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 411, ".input.spin", state 989, "(1)" + line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 990, "else" + line 411, ".input.spin", state 993, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 409, ".input.spin", state 999, "((i<1))" + line 409, ".input.spin", state 999, "((i>=1))" + line 416, ".input.spin", state 1006, "(1)" + line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1007, "else" + line 416, ".input.spin", state 1010, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 360, ".input.spin", state 1023, "sighand_exec = 1" + line 401, ".input.spin", state 1054, "(1)" + line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1113, "(1)" + line 401, ".input.spin", state 1151, "(1)" + line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1210, "(1)" + line 397, ".input.spin", state 1236, "(1)" + line 401, ".input.spin", state 1250, "(1)" + line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1309, "(1)" + line 401, ".input.spin", state 1350, "(1)" + line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1409, "(1)" + line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1432, "(1)" + line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1441, "(1)" + line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1442, "else" + line 175, ".input.spin", state 1447, "((j<1))" + line 175, ".input.spin", state 1447, "((j>=1))" + line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1462, "(1)" + line 162, ".input.spin", state 1470, "(1)" + line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1471, "else" + line 160, ".input.spin", state 1476, "((j<1))" + line 160, ".input.spin", state 1476, "((j>=1))" + line 166, ".input.spin", state 1482, "(1)" + line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1483, "else" + line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1486, "else" + line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 1545, "(1)" + line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1562, "(1)" + line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1571, "(1)" + line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1572, "else" + line 175, ".input.spin", state 1577, "((j<1))" + line 175, ".input.spin", state 1577, "((j>=1))" + line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1592, "(1)" + line 162, ".input.spin", state 1600, "(1)" + line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1601, "else" + line 160, ".input.spin", state 1606, "((j<1))" + line 160, ".input.spin", state 1606, "((j>=1))" + line 166, ".input.spin", state 1612, "(1)" + line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1613, "else" + line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1616, "else" + line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 1618, "else" + line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 1619, "else" + line 354, ".input.spin", state 1625, "((sighand_exec==1))" + line 354, ".input.spin", state 1625, "else" + line 360, ".input.spin", state 1628, "sighand_exec = 1" + line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 1643, "(1)" + line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 1644, "else" + line 397, ".input.spin", state 1647, "(1)" + line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 1657, "(1)" + line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 1658, "else" + line 401, ".input.spin", state 1661, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 399, ".input.spin", state 1667, "((i<1))" + line 399, ".input.spin", state 1667, "((i>=1))" + line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 1686, "(1)" + line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 1687, "else" + line 407, ".input.spin", state 1690, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 411, ".input.spin", state 1699, "(1)" + line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 1700, "else" + line 411, ".input.spin", state 1703, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 409, ".input.spin", state 1709, "((i<1))" + line 409, ".input.spin", state 1709, "((i>=1))" + line 416, ".input.spin", state 1716, "(1)" + line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1717, "else" + line 416, ".input.spin", state 1720, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 360, ".input.spin", state 1733, "sighand_exec = 1" + line 177, ".input.spin", state 1758, "(1)" + line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1779, "(1)" + line 162, ".input.spin", state 1787, "(1)" + line 166, ".input.spin", state 1799, "(1)" + line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/asserts.spin.input.trail b/urcu/result-signal-over-writer/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu/result-signal-over-writer/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu/result-signal-over-writer/result-signal-over-writer/DEFINES b/urcu/result-signal-over-writer/result-signal-over-writer/DEFINES new file mode 100644 index 0000000..ec600f0 --- /dev/null +++ b/urcu/result-signal-over-writer/result-signal-over-writer/DEFINES @@ -0,0 +1,16 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu/result-signal-over-writer/result-signal-over-writer/Makefile b/urcu/result-signal-over-writer/result-signal-over-writer/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu/result-signal-over-writer/result-signal-over-writer/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu/result-signal-over-writer/result-signal-over-writer/asserts.log b/urcu/result-signal-over-writer/result-signal-over-writer/asserts.log new file mode 100644 index 0000000..c102ffb --- /dev/null +++ b/urcu/result-signal-over-writer/result-signal-over-writer/asserts.log @@ -0,0 +1,334 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 40 byte, depth reached 7872, errors: 0 + 20128 states, stored + 191477 states, matched + 211605 transitions (= stored+matched) + 712166 atomic steps +hash conflicts: 942 (resolved) + +Stats on memory usage (in Megabytes): + 1.305 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.467 actual memory usage for states (unsuccessful compression: 112.36%) + state-vector as stored = 48 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.229 total actual memory usage + +unreached in proctype urcu_reader_sig + line 401, ".input.spin", state 330, "(1)" + line 612, ".input.spin", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 397, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 406, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 59, "(1)" + line 416, ".input.spin", state 89, "(1)" + line 397, ".input.spin", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 160, "(1)" + line 650, ".input.spin", state 213, "(1)" + line 173, ".input.spin", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 177, ".input.spin", state 233, "(1)" + line 158, ".input.spin", state 254, "(1)" + line 162, ".input.spin", state 262, "(1)" + line 166, ".input.spin", state 274, "(1)" + line 173, ".input.spin", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 752, "(1)" + line 162, ".input.spin", state 760, "(1)" + line 162, ".input.spin", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 761, "else" + line 160, ".input.spin", state 766, "((j<1))" + line 160, ".input.spin", state 766, "((j>=1))" + line 166, ".input.spin", state 772, "(1)" + line 166, ".input.spin", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 773, "else" + line 168, ".input.spin", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 776, "else" + line 173, ".input.spin", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 835, "(1)" + line 166, ".input.spin", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 852, "(1)" + line 177, ".input.spin", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 861, "(1)" + line 177, ".input.spin", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 862, "else" + line 175, ".input.spin", state 867, "((j<1))" + line 175, ".input.spin", state 867, "((j>=1))" + line 181, ".input.spin", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 882, "(1)" + line 162, ".input.spin", state 890, "(1)" + line 162, ".input.spin", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 891, "else" + line 160, ".input.spin", state 896, "((j<1))" + line 160, ".input.spin", state 896, "((j>=1))" + line 166, ".input.spin", state 902, "(1)" + line 166, ".input.spin", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 903, "else" + line 168, ".input.spin", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 906, "else" + line 200, ".input.spin", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 908, "else" + line 219, ".input.spin", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 909, "else" + line 354, ".input.spin", state 915, "((sighand_exec==1))" + line 354, ".input.spin", state 915, "else" + line 360, ".input.spin", state 918, "sighand_exec = 1" + line 397, ".input.spin", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 933, "(1)" + line 397, ".input.spin", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 934, "else" + line 397, ".input.spin", state 937, "(1)" + line 401, ".input.spin", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 947, "(1)" + line 401, ".input.spin", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 948, "else" + line 401, ".input.spin", state 951, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 401, ".input.spin", state 952, "(1)" + line 399, ".input.spin", state 957, "((i<1))" + line 399, ".input.spin", state 957, "((i>=1))" + line 406, ".input.spin", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 976, "(1)" + line 407, ".input.spin", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 977, "else" + line 407, ".input.spin", state 980, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 407, ".input.spin", state 981, "(1)" + line 411, ".input.spin", state 989, "(1)" + line 411, ".input.spin", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 990, "else" + line 411, ".input.spin", state 993, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 411, ".input.spin", state 994, "(1)" + line 409, ".input.spin", state 999, "((i<1))" + line 409, ".input.spin", state 999, "((i>=1))" + line 416, ".input.spin", state 1006, "(1)" + line 416, ".input.spin", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1007, "else" + line 416, ".input.spin", state 1010, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 416, ".input.spin", state 1011, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 418, ".input.spin", state 1014, "(1)" + line 360, ".input.spin", state 1023, "sighand_exec = 1" + line 401, ".input.spin", state 1054, "(1)" + line 406, ".input.spin", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1113, "(1)" + line 401, ".input.spin", state 1151, "(1)" + line 406, ".input.spin", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1210, "(1)" + line 397, ".input.spin", state 1236, "(1)" + line 401, ".input.spin", state 1250, "(1)" + line 406, ".input.spin", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1309, "(1)" + line 401, ".input.spin", state 1350, "(1)" + line 406, ".input.spin", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, ".input.spin", state 1409, "(1)" + line 173, ".input.spin", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1432, "(1)" + line 177, ".input.spin", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1441, "(1)" + line 177, ".input.spin", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1442, "else" + line 175, ".input.spin", state 1447, "((j<1))" + line 175, ".input.spin", state 1447, "((j>=1))" + line 181, ".input.spin", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1462, "(1)" + line 162, ".input.spin", state 1470, "(1)" + line 162, ".input.spin", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1471, "else" + line 160, ".input.spin", state 1476, "((j<1))" + line 160, ".input.spin", state 1476, "((j>=1))" + line 166, ".input.spin", state 1482, "(1)" + line 166, ".input.spin", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1483, "else" + line 168, ".input.spin", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1486, "else" + line 173, ".input.spin", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, ".input.spin", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, ".input.spin", state 1545, "(1)" + line 166, ".input.spin", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, ".input.spin", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, ".input.spin", state 1562, "(1)" + line 177, ".input.spin", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, ".input.spin", state 1571, "(1)" + line 177, ".input.spin", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, ".input.spin", state 1572, "else" + line 175, ".input.spin", state 1577, "((j<1))" + line 175, ".input.spin", state 1577, "((j>=1))" + line 181, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1592, "(1)" + line 162, ".input.spin", state 1600, "(1)" + line 162, ".input.spin", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, ".input.spin", state 1601, "else" + line 160, ".input.spin", state 1606, "((j<1))" + line 160, ".input.spin", state 1606, "((j>=1))" + line 166, ".input.spin", state 1612, "(1)" + line 166, ".input.spin", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, ".input.spin", state 1613, "else" + line 168, ".input.spin", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, ".input.spin", state 1616, "else" + line 200, ".input.spin", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, ".input.spin", state 1618, "else" + line 219, ".input.spin", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, ".input.spin", state 1619, "else" + line 354, ".input.spin", state 1625, "((sighand_exec==1))" + line 354, ".input.spin", state 1625, "else" + line 360, ".input.spin", state 1628, "sighand_exec = 1" + line 397, ".input.spin", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, ".input.spin", state 1643, "(1)" + line 397, ".input.spin", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, ".input.spin", state 1644, "else" + line 397, ".input.spin", state 1647, "(1)" + line 401, ".input.spin", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, ".input.spin", state 1657, "(1)" + line 401, ".input.spin", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, ".input.spin", state 1658, "else" + line 401, ".input.spin", state 1661, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 401, ".input.spin", state 1662, "(1)" + line 399, ".input.spin", state 1667, "((i<1))" + line 399, ".input.spin", state 1667, "((i>=1))" + line 406, ".input.spin", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, ".input.spin", state 1686, "(1)" + line 407, ".input.spin", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, ".input.spin", state 1687, "else" + line 407, ".input.spin", state 1690, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 407, ".input.spin", state 1691, "(1)" + line 411, ".input.spin", state 1699, "(1)" + line 411, ".input.spin", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, ".input.spin", state 1700, "else" + line 411, ".input.spin", state 1703, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 411, ".input.spin", state 1704, "(1)" + line 409, ".input.spin", state 1709, "((i<1))" + line 409, ".input.spin", state 1709, "((i>=1))" + line 416, ".input.spin", state 1716, "(1)" + line 416, ".input.spin", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, ".input.spin", state 1717, "else" + line 416, ".input.spin", state 1720, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 416, ".input.spin", state 1721, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 418, ".input.spin", state 1724, "(1)" + line 360, ".input.spin", state 1733, "sighand_exec = 1" + line 177, ".input.spin", state 1758, "(1)" + line 181, ".input.spin", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, ".input.spin", state 1779, "(1)" + line 162, ".input.spin", state 1787, "(1)" + line 166, ".input.spin", state 1799, "(1)" + line 173, ".input.spin", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail b/urcu/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu/result-signal-over-writer/result-signal-over-writer/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu/result-signal-over-writer/result-signal-over-writer/references.txt b/urcu/result-signal-over-writer/result-signal-over-writer/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu/result-signal-over-writer/result-signal-over-writer/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu/result-signal-over-writer/testmerge/.input.define b/urcu/result-signal-over-writer/testmerge/.input.define new file mode 100644 index 0000000..e69de29 diff --git a/urcu/result-signal-over-writer/testmerge/.input.spin b/urcu/result-signal-over-writer/testmerge/.input.spin new file mode 100644 index 0000000..f2737c4 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/.input.spin @@ -0,0 +1,531 @@ + +#define NR_READERS 2 +#define NR_WRITERS 1 + +#define NR_PROCS 3 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/testmerge/DEFINES b/urcu/result-signal-over-writer/testmerge/DEFINES new file mode 100644 index 0000000..12c751b --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/DEFINES @@ -0,0 +1,31 @@ + +#define NR_READERS 2 +#define NR_WRITERS 1 + +#define NR_PROCS 3 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu/result-signal-over-writer/testmerge/Makefile b/urcu/result-signal-over-writer/testmerge/Makefile new file mode 100644 index 0000000..ca932b7 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/Makefile @@ -0,0 +1,165 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu/result-signal-over-writer/testmerge/asserts.log b/urcu/result-signal-over-writer/testmerge/asserts.log new file mode 100644 index 0000000..75f2427 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/asserts.log @@ -0,0 +1,10 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +spin: line 295 replacement value: tmp +spin: line 295 ".input.spin", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' +spin: 1 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu/result-signal-over-writer/testmerge/asserts.spin.input b/urcu/result-signal-over-writer/testmerge/asserts.spin.input new file mode 100644 index 0000000..b06898a --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/asserts.spin.input @@ -0,0 +1,409 @@ +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu/result-signal-over-writer/testmerge/asserts.spin.input.trail b/urcu/result-signal-over-writer/testmerge/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu/result-signal-over-writer/testmerge/references.txt b/urcu/result-signal-over-writer/testmerge/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu/result-signal-over-writer/testmerge/urcu.sh b/urcu/result-signal-over-writer/testmerge/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu/result-signal-over-writer/testmerge/urcu.spin b/urcu/result-signal-over-writer/testmerge/urcu.spin new file mode 100644 index 0000000..61d9052 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu.spin @@ -0,0 +1,500 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp2 b/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp2 new file mode 100644 index 0000000..b1c8311 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp2 @@ -0,0 +1,395 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_WRITERS 1 +#define NR_READERS 3 + +/* Number of reader and writer processes */ +#define NR_PROCS 5 + +/* Includes reader, writer and init process */ +#define MAX_NR_PROCS 5 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif + skip; + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif + skip; + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_writerid() (get_pid()) +#define get_readerid() (get_writerrid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + skip; +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2, nest) +{ + nest_i = 0; + do + :: nest_i < nest -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + ooo_mem(i); + smp_mb(i); + nest_i++; + :: nest_i >= nest -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < nest -> + ooo_mem(i); + smp_mb(i); + ooo_mem(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= nest -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [2] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2, 2); + od; +} + +/* Model the RCU update process. */ + +active [1] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + ooo_mem(i); + smp_mb(i); + ooo_mem(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp5 b/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp5 new file mode 100644 index 0000000..324ee39 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu.spin.bkp5 @@ -0,0 +1,398 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free.log b/urcu/result-signal-over-writer/testmerge/urcu_free.log new file mode 100644 index 0000000..6a04aba --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free.log @@ -0,0 +1,414 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 566) +Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.3 R= 3e+04 +Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.9 R= 3e+04 +Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 97 R= 3e+04 +pan: resizing hashtable to -w22.. done +Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4234, errors: 0 + 4027146 states, stored + 66145121 states, matched + 70172267 transitions (= stored+matched) +2.6437688e+08 atomic steps +hash conflicts: 47318190 (resolved) + +Stats on memory usage (in Megabytes): + 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) + 253.418 actual memory usage for states (compression: 78.55%) + state-vector as stored = 38 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 743.076 total actual memory usage + +unreached in proctype urcu_reader + line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 61, "(1)" + line 307, "pan.___", state 91, "(1)" + line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 149, "(1)" + line 307, "pan.___", state 179, "(1)" + line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 238, "(1)" + line 307, "pan.___", state 268, "(1)" + line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 291, "(1)" + line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 300, "(1)" + line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 301, "else" + line 160, "pan.___", state 306, "((j<1))" + line 160, "pan.___", state 306, "((j>=1))" + line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 321, "(1)" + line 147, "pan.___", state 329, "(1)" + line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 330, "else" + line 145, "pan.___", state 335, "((j<1))" + line 145, "pan.___", state 335, "((j>=1))" + line 151, "pan.___", state 341, "(1)" + line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 342, "else" + line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 345, "else" + line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 347, "else" + line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 404, "(1)" + line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 421, "(1)" + line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 430, "(1)" + line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 431, "else" + line 160, "pan.___", state 436, "((j<1))" + line 160, "pan.___", state 436, "((j>=1))" + line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 451, "(1)" + line 147, "pan.___", state 459, "(1)" + line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 460, "else" + line 145, "pan.___", state 465, "((j<1))" + line 145, "pan.___", state 465, "((j>=1))" + line 151, "pan.___", state 471, "(1)" + line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 472, "else" + line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 475, "else" + line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 477, "else" + line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 537, "(1)" + line 307, "pan.___", state 567, "(1)" + line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 625, "(1)" + line 307, "pan.___", state 655, "(1)" + line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 713, "(1)" + line 307, "pan.___", state 743, "(1)" + line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 760, "(1)" + line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 769, "(1)" + line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 770, "else" + line 160, "pan.___", state 775, "((j<1))" + line 160, "pan.___", state 775, "((j>=1))" + line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 790, "(1)" + line 147, "pan.___", state 798, "(1)" + line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 799, "else" + line 145, "pan.___", state 804, "((j<1))" + line 145, "pan.___", state 804, "((j>=1))" + line 151, "pan.___", state 810, "(1)" + line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 811, "else" + line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 814, "else" + line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 816, "else" + line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 873, "(1)" + line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 890, "(1)" + line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 899, "(1)" + line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 900, "else" + line 160, "pan.___", state 905, "((j<1))" + line 160, "pan.___", state 905, "((j>=1))" + line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 920, "(1)" + line 147, "pan.___", state 928, "(1)" + line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 929, "else" + line 145, "pan.___", state 934, "((j<1))" + line 145, "pan.___", state 934, "((j>=1))" + line 151, "pan.___", state 940, "(1)" + line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 941, "else" + line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 944, "else" + line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 946, "else" + line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1001, "(1)" + line 307, "pan.___", state 1031, "(1)" + line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1097, "(1)" + line 307, "pan.___", state 1127, "(1)" + line 433, "pan.___", state 1140, "-end-" + (125 of 1140 states) +unreached in proctype urcu_writer + line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 59, "(1)" + line 302, "pan.___", state 72, "(1)" + line 307, "pan.___", state 89, "(1)" + line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 151, "(1)" + line 302, "pan.___", state 164, "(1)" + line 467, "pan.___", state 195, "(1)" + line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 237, "(1)" + line 147, "pan.___", state 245, "(1)" + line 151, "pan.___", state 257, "(1)" + line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 923, "(1)" + line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 924, "else" + line 298, "pan.___", state 927, "(1)" + line 298, "pan.___", state 928, "(1)" + line 298, "pan.___", state 928, "(1)" + line 302, "pan.___", state 936, "(1)" + line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 937, "else" + line 302, "pan.___", state 940, "(1)" + line 302, "pan.___", state 941, "(1)" + line 302, "pan.___", state 941, "(1)" + line 300, "pan.___", state 946, "((i<1))" + line 300, "pan.___", state 946, "((i>=1))" + line 307, "pan.___", state 953, "(1)" + line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 954, "else" + line 307, "pan.___", state 957, "(1)" + line 307, "pan.___", state 958, "(1)" + line 307, "pan.___", state 958, "(1)" + line 309, "pan.___", state 961, "(1)" + line 309, "pan.___", state 961, "(1)" + line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1034, "(1)" + line 307, "pan.___", state 1051, "(1)" + line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1122, "(1)" + line 307, "pan.___", state 1139, "(1)" + line 288, "pan.___", state 1156, "(1)" + line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1212, "(1)" + line 307, "pan.___", state 1229, "(1)" + line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1303, "(1)" + line 307, "pan.___", state 1320, "(1)" + line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1365, "(1)" + line 147, "pan.___", state 1373, "(1)" + line 151, "pan.___", state 1385, "(1)" + line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1584, "(1)" + line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 1585, "else" + line 298, "pan.___", state 1588, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 302, "pan.___", state 1597, "(1)" + line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 1598, "else" + line 302, "pan.___", state 1601, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 300, "pan.___", state 1607, "((i<1))" + line 300, "pan.___", state 1607, "((i>=1))" + line 307, "pan.___", state 1614, "(1)" + line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 1615, "else" + line 307, "pan.___", state 1618, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1669, "(1)" + line 147, "pan.___", state 1677, "(1)" + line 151, "pan.___", state 1689, "(1)" + line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input new file mode 100644 index 0000000..18f99c4 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free.spin.input @@ -0,0 +1,531 @@ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git 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a/urcu/result-signal-over-writer/testmerge/urcu_free_nested.log b/urcu/result-signal-over-writer/testmerge/urcu_free_nested.log new file mode 100644 index 0000000..708dee2 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_nested.log @@ -0,0 +1,415 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_nested.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 566) +Depth= 4234 States= 1e+06 Transitions= 1.7e+07 Memory= 527.287 t= 31.2 R= 3e+04 +Depth= 4234 States= 2e+06 Transitions= 3.44e+07 Memory= 588.322 t= 63.7 R= 3e+04 +Depth= 4234 States= 3e+06 Transitions= 5.2e+07 Memory= 649.358 t= 96.8 R= 3e+04 +pan: resizing hashtable to -w22.. done +Depth= 4234 States= 4e+06 Transitions= 6.97e+07 Memory= 741.416 t= 130 R= 3e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4234, errors: 0 + 4027146 states, stored + 66145121 states, matched + 70172267 transitions (= stored+matched) +2.6437688e+08 atomic steps +hash conflicts: 47318190 (resolved) + +Stats on memory usage (in Megabytes): + 322.609 equivalent memory usage for states (stored*(State-vector + overhead)) + 253.418 actual memory usage for states (compression: 78.55%) + state-vector as stored = 38 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 743.076 total actual memory usage + +unreached in proctype urcu_reader + line 288, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 61, "(1)" + line 307, "pan.___", state 91, "(1)" + line 288, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 149, "(1)" + line 307, "pan.___", state 179, "(1)" + line 288, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 238, "(1)" + line 307, "pan.___", state 268, "(1)" + line 158, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 291, "(1)" + line 162, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 300, "(1)" + line 162, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 301, "else" + line 160, "pan.___", state 306, "((j<1))" + line 160, "pan.___", state 306, "((j>=1))" + line 166, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 321, "(1)" + line 147, "pan.___", state 329, "(1)" + line 147, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 330, "else" + line 145, "pan.___", state 335, "((j<1))" + line 145, "pan.___", state 335, "((j>=1))" + line 151, "pan.___", state 341, "(1)" + line 151, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 342, "else" + line 153, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 345, "else" + line 185, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 347, "else" + line 158, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 404, "(1)" + line 151, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 421, "(1)" + line 162, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 430, "(1)" + line 162, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 431, "else" + line 160, "pan.___", state 436, "((j<1))" + line 160, "pan.___", state 436, "((j>=1))" + line 166, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 451, "(1)" + line 147, "pan.___", state 459, "(1)" + line 147, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 460, "else" + line 145, "pan.___", state 465, "((j<1))" + line 145, "pan.___", state 465, "((j>=1))" + line 151, "pan.___", state 471, "(1)" + line 151, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 472, "else" + line 153, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 475, "else" + line 185, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 477, "else" + line 288, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 537, "(1)" + line 307, "pan.___", state 567, "(1)" + line 288, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 625, "(1)" + line 307, "pan.___", state 655, "(1)" + line 288, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 713, "(1)" + line 307, "pan.___", state 743, "(1)" + line 158, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 760, "(1)" + line 162, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 769, "(1)" + line 162, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 770, "else" + line 160, "pan.___", state 775, "((j<1))" + line 160, "pan.___", state 775, "((j>=1))" + line 166, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 790, "(1)" + line 147, "pan.___", state 798, "(1)" + line 147, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 799, "else" + line 145, "pan.___", state 804, "((j<1))" + line 145, "pan.___", state 804, "((j>=1))" + line 151, "pan.___", state 810, "(1)" + line 151, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 811, "else" + line 153, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 814, "else" + line 185, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 816, "else" + line 158, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 166, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 151, "pan.___", state 873, "(1)" + line 151, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 158, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 158, "pan.___", state 890, "(1)" + line 162, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 899, "(1)" + line 162, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 162, "pan.___", state 900, "else" + line 160, "pan.___", state 905, "((j<1))" + line 160, "pan.___", state 905, "((j>=1))" + line 166, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 920, "(1)" + line 147, "pan.___", state 928, "(1)" + line 147, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 147, "pan.___", state 929, "else" + line 145, "pan.___", state 934, "((j<1))" + line 145, "pan.___", state 934, "((j>=1))" + line 151, "pan.___", state 940, "(1)" + line 151, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 151, "pan.___", state 941, "else" + line 153, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 153, "pan.___", state 944, "else" + line 185, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 185, "pan.___", state 946, "else" + line 288, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1001, "(1)" + line 307, "pan.___", state 1031, "(1)" + line 288, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1097, "(1)" + line 307, "pan.___", state 1127, "(1)" + line 433, "pan.___", state 1140, "-end-" + (125 of 1140 states) +unreached in proctype urcu_writer + line 288, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 59, "(1)" + line 302, "pan.___", state 72, "(1)" + line 307, "pan.___", state 89, "(1)" + line 288, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 292, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 151, "(1)" + line 302, "pan.___", state 164, "(1)" + line 467, "pan.___", state 195, "(1)" + line 158, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 162, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 237, "(1)" + line 147, "pan.___", state 245, "(1)" + line 151, "pan.___", state 257, "(1)" + line 158, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 923, "(1)" + line 298, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 924, "else" + line 298, "pan.___", state 927, "(1)" + line 298, "pan.___", state 928, "(1)" + line 298, "pan.___", state 928, "(1)" + line 302, "pan.___", state 936, "(1)" + line 302, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 937, "else" + line 302, "pan.___", state 940, "(1)" + line 302, "pan.___", state 941, "(1)" + line 302, "pan.___", state 941, "(1)" + line 300, "pan.___", state 946, "((i<1))" + line 300, "pan.___", state 946, "((i>=1))" + line 307, "pan.___", state 953, "(1)" + line 307, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 954, "else" + line 307, "pan.___", state 957, "(1)" + line 307, "pan.___", state 958, "(1)" + line 307, "pan.___", state 958, "(1)" + line 309, "pan.___", state 961, "(1)" + line 309, "pan.___", state 961, "(1)" + line 292, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1008, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1034, "(1)" + line 307, "pan.___", state 1051, "(1)" + line 292, "pan.___", state 1078, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1096, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1122, "(1)" + line 307, "pan.___", state 1139, "(1)" + line 288, "pan.___", state 1156, "(1)" + line 292, "pan.___", state 1168, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1186, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1212, "(1)" + line 307, "pan.___", state 1229, "(1)" + line 292, "pan.___", state 1259, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 297, "pan.___", state 1277, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 302, "pan.___", state 1303, "(1)" + line 307, "pan.___", state 1320, "(1)" + line 162, "pan.___", state 1342, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1355, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1365, "(1)" + line 147, "pan.___", state 1373, "(1)" + line 151, "pan.___", state 1385, "(1)" + line 158, "pan.___", state 1396, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 297, "pan.___", state 1571, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1584, "(1)" + line 298, "pan.___", state 1585, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 298, "pan.___", state 1585, "else" + line 298, "pan.___", state 1588, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 298, "pan.___", state 1589, "(1)" + line 302, "pan.___", state 1597, "(1)" + line 302, "pan.___", state 1598, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 302, "pan.___", state 1598, "else" + line 302, "pan.___", state 1601, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 302, "pan.___", state 1602, "(1)" + line 300, "pan.___", state 1607, "((i<1))" + line 300, "pan.___", state 1607, "((i>=1))" + line 307, "pan.___", state 1614, "(1)" + line 307, "pan.___", state 1615, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 307, "pan.___", state 1615, "else" + line 307, "pan.___", state 1618, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 307, "pan.___", state 1619, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 309, "pan.___", state 1622, "(1)" + line 162, "pan.___", state 1646, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 166, "pan.___", state 1659, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 143, "pan.___", state 1669, "(1)" + line 147, "pan.___", state 1677, "(1)" + line 151, "pan.___", state 1689, "(1)" + line 158, "pan.___", state 1700, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail b/urcu/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail new file mode 100644 index 0000000..2cefe6b --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_nested.spin.input.trail @@ -0,0 +1,7 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:0:2679 +5:3:1129 diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.define b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.define new file mode 100644 index 0000000..136ef67 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.log b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.log new file mode 100644 index 0000000..c722840 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.log @@ -0,0 +1,16 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +spin: line 291 "pan.___", Error: syntax error saw 'operator: =' +spin: line 291 "pan.___", Error: syntax error saw 'operator: =' +spin: 2 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..1346c4e --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input @@ -0,0 +1,533 @@ +#define NO_RMB +#define NO_WMB + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..3d2a95e --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2082 @@ +-2:3:-2 +-4:-4:-4 +1:0:3537 +2:3:3489 +3:3:3492 +4:3:3492 +5:3:3495 +6:3:3503 +7:3:3503 +8:3:3506 +9:3:3512 +10:3:3516 +11:3:3516 +12:3:3519 +13:3:3527 +14:3:3531 +15:3:3532 +16:0:3537 +17:3:3534 +18:0:3537 +19:2:1310 +20:0:3537 +21:2:1316 +22:0:3537 +23:2:1317 +24:0:3537 +25:2:1318 +26:2:1322 +27:2:1323 +28:2:1331 +29:2:1332 +30:2:1336 +31:2:1337 +32:2:1345 +33:2:1350 +34:2:1354 +35:2:1355 +36:2:1362 +37:2:1363 +38:2:1374 +39:2:1375 +40:2:1376 +41:2:1387 +42:2:1392 +43:2:1393 +44:0:3537 +45:2:1405 +46:2:1406 +47:0:3537 +48:2:1410 +49:2:1414 +50:2:1415 +51:2:1423 +52:2:1424 +53:2:1428 +54:2:1429 +55:2:1437 +56:2:1442 +57:2:1443 +58:2:1454 +59:2:1455 +60:2:1466 +61:2:1467 +62:2:1468 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+2072:1:735 +2073:0:3537 +2074:2:3483 +2075:0:3537 +2076:1:747 +2077:0:3535 +2078:2:3484 +2079:0:3541 +2080:1:1280 diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.define b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.log b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.log new file mode 100644 index 0000000..6a46f80 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.log @@ -0,0 +1,369 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 567) +Depth= 5645 States= 1e+06 Transitions= 1.47e+07 Memory= 527.287 t= 27.1 R= 4e+04 +pan: claim violated! (at depth 1736) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 5645, errors: 1 + 1039881 states, stored + 14441478 states, matched + 15481359 transitions (= stored+matched) + 57000435 atomic steps +hash conflicts: 2892596 (resolved) + +Stats on memory usage (in Megabytes): + 83.303 equivalent memory usage for states (stored*(State-vector + overhead)) + 64.050 actual memory usage for states (compression: 76.89%) + state-vector as stored = 37 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 529.729 total actual memory usage + +unreached in proctype urcu_reader + line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 61, "(1)" + line 308, "pan.___", state 91, "(1)" + line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 149, "(1)" + line 308, "pan.___", state 179, "(1)" + line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 238, "(1)" + line 308, "pan.___", state 268, "(1)" + line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 291, "(1)" + line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 300, "(1)" + line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 301, "else" + line 161, "pan.___", state 306, "((j<1))" + line 161, "pan.___", state 306, "((j>=1))" + line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 313, "(1)" + line 167, "pan.___", state 314, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 314, "else" + line 177, "pan.___", state 319, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 319, "else" + line 159, "pan.___", state 324, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 346, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 159, "pan.___", state 363, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 365, "(1)" + line 163, "pan.___", state 372, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 374, "(1)" + line 163, "pan.___", state 375, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 375, "else" + line 161, "pan.___", state 380, "((j<1))" + line 161, "pan.___", state 380, "((j>=1))" + line 167, "pan.___", state 385, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 387, "(1)" + line 167, "pan.___", state 388, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 388, "else" + line 177, "pan.___", state 393, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 393, "else" + line 289, "pan.___", state 408, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 440, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 453, "(1)" + line 308, "pan.___", state 483, "(1)" + line 289, "pan.___", state 496, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 541, "(1)" + line 308, "pan.___", state 571, "(1)" + line 289, "pan.___", state 584, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 616, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 629, "(1)" + line 308, "pan.___", state 659, "(1)" + line 159, "pan.___", state 674, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 676, "(1)" + line 163, "pan.___", state 683, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 685, "(1)" + line 163, "pan.___", state 686, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 686, "else" + line 161, "pan.___", state 691, "((j<1))" + line 161, "pan.___", state 691, "((j>=1))" + line 167, "pan.___", state 696, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 698, "(1)" + line 167, "pan.___", state 699, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 699, "else" + line 177, "pan.___", state 704, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 704, "else" + line 159, "pan.___", state 709, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 731, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 159, "pan.___", state 748, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 750, "(1)" + line 163, "pan.___", state 757, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 759, "(1)" + line 163, "pan.___", state 760, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 760, "else" + line 161, "pan.___", state 765, "((j<1))" + line 161, "pan.___", state 765, "((j>=1))" + line 167, "pan.___", state 770, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "((cache_dirty_generation_ptr.bitfield&(1<<_pid)))" + line 167, "pan.___", state 773, "else" + line 177, "pan.___", state 778, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 177, "pan.___", state 778, "else" + line 289, "pan.___", state 788, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 820, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 833, "(1)" + line 308, "pan.___", state 863, "(1)" + line 289, "pan.___", state 884, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 916, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 929, "(1)" + line 308, "pan.___", state 959, "(1)" + line 434, "pan.___", state 972, "-end-" + (95 of 972 states) +unreached in proctype urcu_writer + line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 20, "(1)" + line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 34, "(1)" + line 293, "pan.___", state 35, "(1)" + line 293, "pan.___", state 35, "(1)" + line 291, "pan.___", state 40, "((i<1))" + line 291, "pan.___", state 40, "((i>=1))" + line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 59, "(1)" + line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 60, "else" + line 299, "pan.___", state 63, "(1)" + line 299, "pan.___", state 64, "(1)" + line 299, "pan.___", state 64, "(1)" + line 303, "pan.___", state 72, "(1)" + line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 73, "else" + line 303, "pan.___", state 76, "(1)" + line 303, "pan.___", state 77, "(1)" + line 303, "pan.___", state 77, "(1)" + line 301, "pan.___", state 82, "((i<1))" + line 301, "pan.___", state 82, "((i>=1))" + line 308, "pan.___", state 89, "(1)" + line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 90, "else" + line 308, "pan.___", state 93, "(1)" + line 308, "pan.___", state 94, "(1)" + line 308, "pan.___", state 94, "(1)" + line 310, "pan.___", state 97, "(1)" + line 310, "pan.___", state 97, "(1)" + line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" + line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 112, "(1)" + line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 126, "(1)" + line 293, "pan.___", state 127, "(1)" + line 293, "pan.___", state 127, "(1)" + line 299, "pan.___", state 151, "(1)" + line 303, "pan.___", state 164, "(1)" + line 310, "pan.___", state 189, "(1)" + line 310, "pan.___", state 189, "(1)" + line 468, "pan.___", state 195, "(1)" + line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 240, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 298, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 755, "(1)" + line 299, "pan.___", state 756, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 756, "else" + line 299, "pan.___", state 759, "(1)" + line 299, "pan.___", state 760, "(1)" + line 299, "pan.___", state 760, "(1)" + line 303, "pan.___", state 768, "(1)" + line 303, "pan.___", state 769, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 769, "else" + line 303, "pan.___", state 772, "(1)" + line 303, "pan.___", state 773, "(1)" + line 303, "pan.___", state 773, "(1)" + line 301, "pan.___", state 778, "((i<1))" + line 301, "pan.___", state 778, "((i>=1))" + line 308, "pan.___", state 785, "(1)" + line 308, "pan.___", state 786, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 786, "else" + line 308, "pan.___", state 789, "(1)" + line 308, "pan.___", state 790, "(1)" + line 308, "pan.___", state 790, "(1)" + line 310, "pan.___", state 793, "(1)" + line 310, "pan.___", state 793, "(1)" + line 293, "pan.___", state 822, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 840, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 866, "(1)" + line 308, "pan.___", state 883, "(1)" + line 293, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 954, "(1)" + line 308, "pan.___", state 971, "(1)" + line 289, "pan.___", state 988, "(1)" + line 293, "pan.___", state 1000, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1018, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1044, "(1)" + line 308, "pan.___", state 1061, "(1)" + line 293, "pan.___", state 1091, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1109, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1135, "(1)" + line 308, "pan.___", state 1152, "(1)" + line 163, "pan.___", state 1174, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 1187, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1200, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 298, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1332, "(1)" + line 299, "pan.___", state 1333, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 1333, "else" + line 299, "pan.___", state 1336, "(1)" + line 299, "pan.___", state 1337, "(1)" + line 299, "pan.___", state 1337, "(1)" + line 303, "pan.___", state 1345, "(1)" + line 303, "pan.___", state 1346, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 1346, "else" + line 303, "pan.___", state 1349, "(1)" + line 303, "pan.___", state 1350, "(1)" + line 303, "pan.___", state 1350, "(1)" + line 301, "pan.___", state 1355, "((i<1))" + line 301, "pan.___", state 1355, "((i>=1))" + line 308, "pan.___", state 1362, "(1)" + line 308, "pan.___", state 1363, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 1363, "else" + line 308, "pan.___", state 1366, "(1)" + line 308, "pan.___", state 1367, "(1)" + line 308, "pan.___", state 1367, "(1)" + line 310, "pan.___", state 1370, "(1)" + line 310, "pan.___", state 1370, "(1)" + line 163, "pan.___", state 1394, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 1407, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1420, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 519, "pan.___", state 20, "((j<2))" + line 519, "pan.___", state 20, "((j>=2))" + line 524, "pan.___", state 33, "((j<2))" + line 524, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 572, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 28.5 seconds +pan: rate 36487.053 states/second +pan: avg transition delay 1.8409e-06 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..899fdb4 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input @@ -0,0 +1,532 @@ +#define NO_RMB + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..0aacf1a --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1739 @@ +-2:3:-2 +-4:-4:-4 +1:0:2529 +2:3:2481 +3:3:2484 +4:3:2484 +5:3:2487 +6:3:2495 +7:3:2495 +8:3:2498 +9:3:2504 +10:3:2508 +11:3:2508 +12:3:2511 +13:3:2519 +14:3:2523 +15:3:2524 +16:0:2529 +17:3:2526 +18:0:2529 +19:2:974 +20:0:2529 +21:2:980 +22:0:2529 +23:2:981 +24:0:2529 +25:2:982 +26:2:986 +27:2:987 +28:2:995 +29:2:996 +30:2:1000 +31:2:1001 +32:2:1009 +33:2:1014 +34:2:1018 +35:2:1019 +36:2:1026 +37:2:1027 +38:2:1038 +39:2:1039 +40:2:1040 +41:2:1051 +42:2:1056 +43:2:1057 +44:0:2529 +45:2:1069 +46:2:1070 +47:0:2529 +48:2:1074 +49:2:1078 +50:2:1079 +51:2:1087 +52:2:1088 +53:2:1092 +54:2:1093 +55:2:1101 +56:2:1106 +57:2:1107 +58:2:1118 +59:2:1119 +60:2:1130 +61:2:1131 +62:2:1132 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a/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.log b/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.log new file mode 100644 index 0000000..477c85d --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.log @@ -0,0 +1,381 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 567) +pan: claim violated! (at depth 1889) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 6646, errors: 1 + 377244 states, stored + 5291719 states, matched + 5668963 transitions (= stored+matched) + 20822372 atomic steps +hash conflicts: 405371 (resolved) + +Stats on memory usage (in Megabytes): + 30.221 equivalent memory usage for states (stored*(State-vector + overhead)) + 23.526 actual memory usage for states (compression: 77.85%) + state-vector as stored = 37 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 489.201 total actual memory usage + +unreached in proctype urcu_reader + line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 61, "(1)" + line 308, "pan.___", state 91, "(1)" + line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 149, "(1)" + line 308, "pan.___", state 179, "(1)" + line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 238, "(1)" + line 308, "pan.___", state 268, "(1)" + line 144, "pan.___", state 290, "(1)" + line 148, "pan.___", state 298, "(1)" + line 148, "pan.___", state 299, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 299, "else" + line 146, "pan.___", state 304, "((j<1))" + line 146, "pan.___", state 304, "((j>=1))" + line 152, "pan.___", state 310, "(1)" + line 152, "pan.___", state 311, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 311, "else" + line 186, "pan.___", state 316, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 316, "else" + line 144, "pan.___", state 322, "(1)" + line 148, "pan.___", state 330, "(1)" + line 148, "pan.___", state 331, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 152, "pan.___", state 342, "(1)" + line 152, "pan.___", state 343, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 144, "pan.___", state 358, "(1)" + line 148, "pan.___", state 366, "(1)" + line 148, "pan.___", state 367, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 367, "else" + line 146, "pan.___", state 372, "((j<1))" + line 146, "pan.___", state 372, "((j>=1))" + line 152, "pan.___", state 378, "(1)" + line 152, "pan.___", state 379, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 379, "else" + line 186, "pan.___", state 384, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 384, "else" + line 289, "pan.___", state 399, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 415, "(1)" + line 298, "pan.___", state 431, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 444, "(1)" + line 308, "pan.___", state 474, "(1)" + line 289, "pan.___", state 487, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 519, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 532, "(1)" + line 308, "pan.___", state 562, "(1)" + line 289, "pan.___", state 575, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 607, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 620, "(1)" + line 308, "pan.___", state 650, "(1)" + line 144, "pan.___", state 666, "(1)" + line 148, "pan.___", state 674, "(1)" + line 148, "pan.___", state 675, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 675, "else" + line 146, "pan.___", state 680, "((j<1))" + line 146, "pan.___", state 680, "((j>=1))" + line 152, "pan.___", state 686, "(1)" + line 152, "pan.___", state 687, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 687, "else" + line 186, "pan.___", state 692, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 692, "else" + line 144, "pan.___", state 698, "(1)" + line 148, "pan.___", state 706, "(1)" + line 148, "pan.___", state 707, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 152, "pan.___", state 718, "(1)" + line 152, "pan.___", state 719, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 144, "pan.___", state 734, "(1)" + line 148, "pan.___", state 742, "(1)" + line 148, "pan.___", state 743, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 743, "else" + line 146, "pan.___", state 748, "((j<1))" + line 146, "pan.___", state 748, "((j>=1))" + line 152, "pan.___", state 754, "(1)" + line 152, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 755, "else" + line 186, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 760, "else" + line 289, "pan.___", state 770, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 802, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 815, "(1)" + line 308, "pan.___", state 845, "(1)" + line 289, "pan.___", state 866, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 882, "(1)" + line 298, "pan.___", state 898, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 911, "(1)" + line 308, "pan.___", state 941, "(1)" + line 434, "pan.___", state 954, "-end-" + (79 of 954 states) +unreached in proctype urcu_writer + line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 20, "(1)" + line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 34, "(1)" + line 293, "pan.___", state 35, "(1)" + line 293, "pan.___", state 35, "(1)" + line 291, "pan.___", state 40, "((i<1))" + line 291, "pan.___", state 40, "((i>=1))" + line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 59, "(1)" + line 299, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 60, "else" + line 299, "pan.___", state 63, "(1)" + line 299, "pan.___", state 64, "(1)" + line 299, "pan.___", state 64, "(1)" + line 303, "pan.___", state 72, "(1)" + line 303, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 73, "else" + line 303, "pan.___", state 76, "(1)" + line 303, "pan.___", state 77, "(1)" + line 303, "pan.___", state 77, "(1)" + line 301, "pan.___", state 82, "((i<1))" + line 301, "pan.___", state 82, "((i>=1))" + line 308, "pan.___", state 89, "(1)" + line 308, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 90, "else" + line 308, "pan.___", state 93, "(1)" + line 308, "pan.___", state 94, "(1)" + line 308, "pan.___", state 94, "(1)" + line 310, "pan.___", state 97, "(1)" + line 310, "pan.___", state 97, "(1)" + line 456, "pan.___", state 101, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 454, "pan.___", state 102, "old_gen = cached_generation_ptr.val[_pid]" + line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 112, "(1)" + line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 126, "(1)" + line 293, "pan.___", state 127, "(1)" + line 293, "pan.___", state 127, "(1)" + line 291, "pan.___", state 132, "((i<1))" + line 291, "pan.___", state 132, "((i>=1))" + line 299, "pan.___", state 151, "(1)" + line 299, "pan.___", state 152, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 152, "else" + line 299, "pan.___", state 155, "(1)" + line 299, "pan.___", state 156, "(1)" + line 299, "pan.___", state 156, "(1)" + line 303, "pan.___", state 164, "(1)" + line 303, "pan.___", state 165, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 165, "else" + line 303, "pan.___", state 168, "(1)" + line 303, "pan.___", state 169, "(1)" + line 303, "pan.___", state 169, "(1)" + line 301, "pan.___", state 174, "((i<1))" + line 301, "pan.___", state 174, "((i>=1))" + line 308, "pan.___", state 181, "(1)" + line 308, "pan.___", state 182, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 182, "else" + line 308, "pan.___", state 185, "(1)" + line 308, "pan.___", state 186, "(1)" + line 308, "pan.___", state 186, "(1)" + line 310, "pan.___", state 189, "(1)" + line 310, "pan.___", state 189, "(1)" + line 468, "pan.___", state 195, "(1)" + line 462, "pan.___", state 198, "((write_lock==0))" + line 462, "pan.___", state 198, "else" + line 460, "pan.___", state 199, "(1)" + line 144, "pan.___", state 206, "(1)" + line 148, "pan.___", state 214, "(1)" + line 148, "pan.___", state 215, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 215, "else" + line 146, "pan.___", state 220, "((j<1))" + line 146, "pan.___", state 220, "((j>=1))" + line 152, "pan.___", state 226, "(1)" + line 152, "pan.___", state 227, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 227, "else" + line 186, "pan.___", state 232, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 186, "pan.___", state 232, "else" + line 144, "pan.___", state 238, "(1)" + line 152, "pan.___", state 258, "(1)" + line 144, "pan.___", state 274, "(1)" + line 148, "pan.___", state 282, "(1)" + line 152, "pan.___", state 294, "(1)" + line 289, "pan.___", state 310, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 324, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 342, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 355, "(1)" + line 303, "pan.___", state 368, "(1)" + line 308, "pan.___", state 385, "(1)" + line 289, "pan.___", state 402, "(1)" + line 293, "pan.___", state 414, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 432, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 458, "(1)" + line 308, "pan.___", state 475, "(1)" + line 293, "pan.___", state 505, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 523, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 549, "(1)" + line 308, "pan.___", state 566, "(1)" + line 148, "pan.___", state 588, "(1)" + line 152, "pan.___", state 600, "(1)" + line 144, "pan.___", state 612, "(1)" + line 152, "pan.___", state 632, "(1)" + line 148, "pan.___", state 656, "(1)" + line 152, "pan.___", state 668, "(1)" + line 289, "pan.___", state 692, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 694, "(1)" + line 289, "pan.___", state 695, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 289, "pan.___", state 695, "else" + line 289, "pan.___", state 698, "(1)" + line 293, "pan.___", state 706, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 708, "(1)" + line 293, "pan.___", state 709, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 293, "pan.___", state 709, "else" + line 293, "pan.___", state 712, "(1)" + line 293, "pan.___", state 713, "(1)" + line 293, "pan.___", state 713, "(1)" + line 291, "pan.___", state 718, "((i<1))" + line 291, "pan.___", state 718, "((i>=1))" + line 298, "pan.___", state 724, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 737, "(1)" + line 299, "pan.___", state 738, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 738, "else" + line 299, "pan.___", state 741, "(1)" + line 299, "pan.___", state 742, "(1)" + line 299, "pan.___", state 742, "(1)" + line 303, "pan.___", state 750, "(1)" + line 303, "pan.___", state 751, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 751, "else" + line 303, "pan.___", state 754, "(1)" + line 303, "pan.___", state 755, "(1)" + line 303, "pan.___", state 755, "(1)" + line 301, "pan.___", state 760, "((i<1))" + line 301, "pan.___", state 760, "((i>=1))" + line 308, "pan.___", state 767, "(1)" + line 308, "pan.___", state 768, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 768, "else" + line 308, "pan.___", state 771, "(1)" + line 308, "pan.___", state 772, "(1)" + line 308, "pan.___", state 772, "(1)" + line 310, "pan.___", state 775, "(1)" + line 310, "pan.___", state 775, "(1)" + line 293, "pan.___", state 804, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 822, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 848, "(1)" + line 308, "pan.___", state 865, "(1)" + line 293, "pan.___", state 892, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 936, "(1)" + line 308, "pan.___", state 953, "(1)" + line 289, "pan.___", state 970, "(1)" + line 293, "pan.___", state 982, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1000, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1026, "(1)" + line 308, "pan.___", state 1043, "(1)" + line 293, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 303, "pan.___", state 1117, "(1)" + line 308, "pan.___", state 1134, "(1)" + line 148, "pan.___", state 1156, "(1)" + line 152, "pan.___", state 1168, "(1)" + line 144, "pan.___", state 1180, "(1)" + line 152, "pan.___", state 1200, "(1)" + line 148, "pan.___", state 1224, "(1)" + line 152, "pan.___", state 1236, "(1)" + line 289, "pan.___", state 1260, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 289, "pan.___", state 1262, "(1)" + line 289, "pan.___", state 1263, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 289, "pan.___", state 1263, "else" + line 289, "pan.___", state 1266, "(1)" + line 293, "pan.___", state 1274, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 1276, "(1)" + line 293, "pan.___", state 1277, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 293, "pan.___", state 1277, "else" + line 293, "pan.___", state 1280, "(1)" + line 293, "pan.___", state 1281, "(1)" + line 293, "pan.___", state 1281, "(1)" + line 291, "pan.___", state 1286, "((i<1))" + line 291, "pan.___", state 1286, "((i>=1))" + line 298, "pan.___", state 1292, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1305, "(1)" + line 299, "pan.___", state 1306, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 1306, "else" + line 299, "pan.___", state 1309, "(1)" + line 299, "pan.___", state 1310, "(1)" + line 299, "pan.___", state 1310, "(1)" + line 303, "pan.___", state 1318, "(1)" + line 303, "pan.___", state 1319, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 1319, "else" + line 303, "pan.___", state 1322, "(1)" + line 303, "pan.___", state 1323, "(1)" + line 303, "pan.___", state 1323, "(1)" + line 301, "pan.___", state 1328, "((i<1))" + line 301, "pan.___", state 1328, "((i>=1))" + line 308, "pan.___", state 1335, "(1)" + line 308, "pan.___", state 1336, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 1336, "else" + line 308, "pan.___", state 1339, "(1)" + line 308, "pan.___", state 1340, "(1)" + line 308, "pan.___", state 1340, "(1)" + line 310, "pan.___", state 1343, "(1)" + line 310, "pan.___", state 1343, "(1)" + line 148, "pan.___", state 1367, "(1)" + line 152, "pan.___", state 1379, "(1)" + line 144, "pan.___", state 1391, "(1)" + line 152, "pan.___", state 1411, "(1)" + line 148, "pan.___", state 1435, "(1)" + line 152, "pan.___", state 1447, "(1)" + line 511, "pan.___", state 1473, "-end-" + (159 of 1473 states) +unreached in proctype :init: + line 518, "pan.___", state 9, "((j<2))" + line 518, "pan.___", state 9, "((j>=2))" + line 519, "pan.___", state 20, "((j<2))" + line 519, "pan.___", state 20, "((j>=2))" + line 524, "pan.___", state 33, "((j<2))" + line 524, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 572, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 10.4 seconds +pan: rate 36378.399 states/second +pan: avg transition delay 1.8293e-06 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..12cde50 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_no_wmb.spin.input @@ -0,0 +1,532 @@ +#define NO_WMB + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git 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+1864:0:2475 +1865:1:483 +1866:1:487 +1867:1:488 +1868:1:496 +1869:1:497 +1870:1:498 +1871:1:510 +1872:1:515 +1873:1:519 +1874:1:520 +1875:1:527 +1876:1:528 +1877:1:539 +1878:1:540 +1879:1:541 +1880:1:552 +1881:1:557 +1882:1:558 +1883:0:2475 +1884:2:2422 +1885:0:2475 +1886:1:570 +1887:0:2473 +1888:2:2421 +1889:0:2479 +1890:1:151 diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.define b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.log b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.log new file mode 100644 index 0000000..6a9d040 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.log @@ -0,0 +1,349 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 567) +pan: claim violated! (at depth 1353) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3705, errors: 1 + 216253 states, stored + 2924019 states, matched + 3140272 transitions (= stored+matched) + 11791015 atomic steps +hash conflicts: 155585 (resolved) + +Stats on memory usage (in Megabytes): + 17.324 equivalent memory usage for states (stored*(State-vector + overhead)) + 13.576 actual memory usage for states (compression: 78.37%) + state-vector as stored = 38 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 479.338 total actual memory usage + +unreached in proctype urcu_reader + line 289, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 61, "(1)" + line 308, "pan.___", state 91, "(1)" + line 289, "pan.___", state 104, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 136, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 149, "(1)" + line 308, "pan.___", state 179, "(1)" + line 289, "pan.___", state 193, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 225, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 238, "(1)" + line 308, "pan.___", state 268, "(1)" + line 159, "pan.___", state 289, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 291, "(1)" + line 163, "pan.___", state 298, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 300, "(1)" + line 163, "pan.___", state 301, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 301, "else" + line 161, "pan.___", state 306, "((j<1))" + line 161, "pan.___", state 306, "((j>=1))" + line 167, "pan.___", state 311, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 321, "(1)" + line 148, "pan.___", state 329, "(1)" + line 148, "pan.___", state 330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 330, "else" + line 146, "pan.___", state 335, "((j<1))" + line 146, "pan.___", state 335, "((j>=1))" + line 152, "pan.___", state 341, "(1)" + line 152, "pan.___", state 342, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 342, "else" + line 154, "pan.___", state 345, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 345, "else" + line 186, "pan.___", state 347, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 347, "else" + line 159, "pan.___", state 352, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 374, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 152, "pan.___", state 404, "(1)" + line 152, "pan.___", state 405, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 419, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 421, "(1)" + line 163, "pan.___", state 428, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 430, "(1)" + line 163, "pan.___", state 431, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 431, "else" + line 161, "pan.___", state 436, "((j<1))" + line 161, "pan.___", state 436, "((j>=1))" + line 167, "pan.___", state 441, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 451, "(1)" + line 148, "pan.___", state 459, "(1)" + line 148, "pan.___", state 460, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 460, "else" + line 146, "pan.___", state 465, "((j<1))" + line 146, "pan.___", state 465, "((j>=1))" + line 152, "pan.___", state 471, "(1)" + line 152, "pan.___", state 472, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 472, "else" + line 154, "pan.___", state 475, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 475, "else" + line 186, "pan.___", state 477, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 477, "else" + line 289, "pan.___", state 492, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 524, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 537, "(1)" + line 308, "pan.___", state 567, "(1)" + line 289, "pan.___", state 580, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 612, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 625, "(1)" + line 308, "pan.___", state 655, "(1)" + line 289, "pan.___", state 668, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 700, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 713, "(1)" + line 308, "pan.___", state 743, "(1)" + line 159, "pan.___", state 758, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 760, "(1)" + line 163, "pan.___", state 767, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 769, "(1)" + line 163, "pan.___", state 770, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 770, "else" + line 161, "pan.___", state 775, "((j<1))" + line 161, "pan.___", state 775, "((j>=1))" + line 167, "pan.___", state 780, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 790, "(1)" + line 148, "pan.___", state 798, "(1)" + line 148, "pan.___", state 799, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 799, "else" + line 146, "pan.___", state 804, "((j<1))" + line 146, "pan.___", state 804, "((j>=1))" + line 152, "pan.___", state 810, "(1)" + line 152, "pan.___", state 811, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 811, "else" + line 154, "pan.___", state 814, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 814, "else" + line 186, "pan.___", state 816, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 816, "else" + line 159, "pan.___", state 821, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 167, "pan.___", state 843, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 152, "pan.___", state 873, "(1)" + line 152, "pan.___", state 874, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 888, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 890, "(1)" + line 163, "pan.___", state 897, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 899, "(1)" + line 163, "pan.___", state 900, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 163, "pan.___", state 900, "else" + line 161, "pan.___", state 905, "((j<1))" + line 161, "pan.___", state 905, "((j>=1))" + line 167, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 920, "(1)" + line 148, "pan.___", state 928, "(1)" + line 148, "pan.___", state 929, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 148, "pan.___", state 929, "else" + line 146, "pan.___", state 934, "((j<1))" + line 146, "pan.___", state 934, "((j>=1))" + line 152, "pan.___", state 940, "(1)" + line 152, "pan.___", state 941, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 152, "pan.___", state 941, "else" + line 154, "pan.___", state 944, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 154, "pan.___", state 944, "else" + line 186, "pan.___", state 946, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 186, "pan.___", state 946, "else" + line 289, "pan.___", state 956, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 988, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1001, "(1)" + line 308, "pan.___", state 1031, "(1)" + line 289, "pan.___", state 1052, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 1084, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 1097, "(1)" + line 308, "pan.___", state 1127, "(1)" + line 434, "pan.___", state 1140, "-end-" + (125 of 1140 states) +unreached in proctype urcu_writer + line 289, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 298, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 59, "(1)" + line 303, "pan.___", state 72, "(1)" + line 308, "pan.___", state 89, "(1)" + line 289, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 293, "pan.___", state 120, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 151, "(1)" + line 303, "pan.___", state 164, "(1)" + line 468, "pan.___", state 195, "(1)" + line 159, "pan.___", state 205, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 163, "pan.___", state 214, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 237, "(1)" + line 148, "pan.___", state 245, "(1)" + line 152, "pan.___", state 257, "(1)" + line 159, "pan.___", state 268, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 298, "pan.___", state 910, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 299, "pan.___", state 923, "(1)" + line 299, "pan.___", state 924, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 299, "pan.___", state 924, "else" + line 299, "pan.___", state 927, "(1)" + line 299, "pan.___", state 928, "(1)" + line 299, "pan.___", state 928, "(1)" + line 303, "pan.___", state 936, "(1)" + line 303, "pan.___", state 937, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 303, "pan.___", state 937, "else" + line 303, "pan.___", state 940, "(1)" + line 303, "pan.___", state 941, "(1)" + line 303, "pan.___", state 941, "(1)" + line 301, "pan.___", state 946, "((i<1))" + line 301, "pan.___", state 946, "((i>=1))" + line 308, "pan.___", state 953, "(1)" + line 308, "pan.___", state 954, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 308, "pan.___", state 954, "else" + line 308, "pan.___", state 957, "(1)" + line 308, "pan.___", state 958, "(1)" + line 308, "pan.___", state 958, "(1)" + line 310, "pan.___", state 961, "(1)" + line 310, "pan.___", state 961, "(1)" + line 163, "pan.___", state 985, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 167, "pan.___", state 998, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 144, "pan.___", state 1008, "(1)" + line 148, "pan.___", state 1016, "(1)" + line 152, "pan.___", state 1028, "(1)" + line 159, "pan.___", state 1039, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 519, "pan.___", state 20, "((j<2))" + line 519, "pan.___", state 20, "((j>=2))" + line 524, "pan.___", state 33, "((j<2))" + line 524, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 572, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 5.58 seconds +pan: rate 38755.018 states/second +pan: avg transition delay 1.7769e-06 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..244a7b2 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input @@ -0,0 +1,532 @@ +#define SINGLE_FLIP + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + + +#if (NR_READERS == 1) + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#elif (NR_READERS == 2) + +#define read_free_race (read_generation[0] == last_free_gen || read_generation[1] == last_free_gen) +#define read_free (free_done && (data_access[0] || data_access[1])) + +#else + +#error "Too many readers" + +#endif + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + atomic { + if + :: get_readerid() == 0 -> +progress_reader: + skip; + :: else -> + skip; + fi; + } +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..363553e --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1356 @@ +-2:3:-2 +-4:-4:-4 +1:0:2372 +2:3:2324 +3:3:2327 +4:3:2327 +5:3:2330 +6:3:2338 +7:3:2338 +8:3:2341 +9:3:2347 +10:3:2351 +11:3:2351 +12:3:2354 +13:3:2362 +14:3:2366 +15:3:2367 +16:0:2372 +17:3:2369 +18:0:2372 +19:2:1142 +20:0:2372 +21:2:1148 +22:0:2372 +23:2:1149 +24:0:2372 +25:2:1150 +26:2:1154 +27:2:1155 +28:2:1163 +29:2:1164 +30:2:1168 +31:2:1169 +32:2:1177 +33:2:1182 +34:2:1186 +35:2:1187 +36:2:1194 +37:2:1195 +38:2:1206 +39:2:1207 +40:2:1208 +41:2:1219 +42:2:1224 +43:2:1225 +44:0:2372 +45:2:1237 +46:2:1238 +47:0:2372 +48:2:1242 +49:2:1246 +50:2:1247 +51:2:1255 +52:2:1256 +53:2:1260 +54:2:1261 +55:2:1269 +56:2:1274 +57:2:1275 +58:2:1286 +59:2:1287 +60:2:1298 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--git a/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.define b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.log b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.log new file mode 100644 index 0000000..ceb438f --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.log @@ -0,0 +1,16 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +spin: line 296 replacement value: tmp +spin: line 296 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' +spin: 1 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input new file mode 100644 index 0000000..cc55960 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input @@ -0,0 +1,410 @@ +#define READER_PROGRESS +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_reader.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.define b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.log b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.log new file mode 100644 index 0000000..985f839 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.log @@ -0,0 +1,14 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -w -DHASH64 -o pan pan.c diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input new file mode 100644 index 0000000..28f1299 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input @@ -0,0 +1,410 @@ +#define WRITER_PROGRESS +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.define b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.log b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.log new file mode 100644 index 0000000..26b6236 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.log @@ -0,0 +1,16 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +spin: line 297 replacement value: tmp +spin: line 297 "pan.___", Error: formal par of wait_for_quiescent_state contains replacement value saw '-2'' near 'readerid' +spin: 1 error(s) - aborting +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu/testmerge' diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input new file mode 100644 index 0000000..43e979c --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input @@ -0,0 +1,411 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#define read_free_race (read_generation == last_free_gen) +#define read_free (free_done && data_access) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define get_pid() (_pid) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), wmb_mb forces + * both. + */ + +#define DECLARE_CACHED_VAR(type, x, v) \ + type mem_##x = v; \ + type cached_##x[NR_PROCS] = v; \ + bit cache_dirty_##x[NR_PROCS] = 0 + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x[id]) + +#define READ_CACHED_VAR(x) (cached_##x[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x[get_pid()] = v; \ + cache_dirty_##x[get_pid()] = 1; \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x[id]; \ + cache_dirty_##x[id] = 0; \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + CACHE_READ_FROM_MEM(urcu_active_readers_one, i); + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, i); + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i); +#endif +#ifndef NO_RMB + smp_rmb_pid(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid()); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid()); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + CACHE_READ_FROM_MEM(urcu_active_readers_one, get_pid()); + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + CACHE_WRITE_TO_MEM(urcu_active_readers_one, get_pid()); + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i); +#endif +#ifndef NO_RMB + smp_rmb(i); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb and ooo_mem */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr, 1); +/* Note ! currently only one reader */ +DECLARE_CACHED_VAR(byte, urcu_active_readers_one, 0); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr, 0); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation = 1; +bit data_access = 0; + +bit write_lock = 0; + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers_one, + get_pid()); + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, id, i) +{ + do + :: 1 -> + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (tmp & RCU_GP_CTR_NEST_MASK) + && ((tmp ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i); +#else + ooo_mem(i); +#endif + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, i, j) +{ + i = 0; + do + :: i < NR_READERS -> + wait_for_reader(tmp, i, j); + if + :: (NR_READERS > 1) && (i < NR_READERS - 1) + -> ooo_mem(j); + :: else + -> skip; + fi; + i++ + :: i >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers_one, + tmp + 1); + fi; + smp_mb(i); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access = 1; + ooo_mem(i); + data_access = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i); + tmp2 = READ_CACHED_VAR(urcu_active_readers_one); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers_one, tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active [NR_READERS] proctype urcu_reader() +{ + byte i, nest_i; + byte tmp, tmp2; + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, nest_i, tmp, tmp2); + od; +} + +/* Model the RCU update process. */ + +active [NR_WRITERS] proctype urcu_writer() +{ + byte i, j; + byte tmp; + byte old_gen; + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + //smp_mc(i); + wait_for_quiescent_state(tmp, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + wait_for_quiescent_state(tmp, i, j); +#endif + smp_mb(i); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + skip; + od; +} diff --git a/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..ff6f1c5 --- /dev/null +++ b/urcu/result-signal-over-writer/testmerge/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,4590 @@ +-2:2:-2 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+4572:2:1822 +4573:0:2227 +4574:1:4 +4575:1:8 +4576:1:9 +4577:1:16 +4578:1:17 +4579:1:28 +4580:1:32 +4581:1:33 +4582:1:40 +4583:1:41 +4584:1:51 +4585:1:52 +4586:1:62 +4587:1:63 diff --git a/urcu/result-signal-over-writer/urcu.sh b/urcu/result-signal-over-writer/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu/result-signal-over-writer/urcu.spin b/urcu/result-signal-over-writer/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_free.log b/urcu/result-signal-over-writer/urcu_free.log new file mode 100644 index 0000000..9a22c47 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free.log @@ -0,0 +1,345 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 741) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10669, errors: 0 + 20146 states, stored + 191615 states, matched + 211761 transitions (= stored+matched) + 712676 atomic steps +hash conflicts: 1523 (resolved) + +Stats on memory usage (in Megabytes): + 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.661 actual memory usage for states (unsuccessful compression: 102.92%) + state-vector as stored = 58 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.326 total actual memory usage + +unreached in proctype urcu_reader_sig + line 401, "pan.___", state 330, "(1)" + line 612, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 397, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 406, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, "pan.___", state 59, "(1)" + line 416, "pan.___", state 89, "(1)" + line 397, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 160, "(1)" + line 650, "pan.___", state 213, "(1)" + line 173, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 177, "pan.___", state 233, "(1)" + line 158, "pan.___", state 254, "(1)" + line 162, "pan.___", state 262, "(1)" + line 166, "pan.___", state 274, "(1)" + line 173, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 752, "(1)" + line 162, "pan.___", state 760, "(1)" + line 162, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 761, "else" + line 160, "pan.___", state 766, "((j<1))" + line 160, "pan.___", state 766, "((j>=1))" + line 166, "pan.___", state 772, "(1)" + line 166, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 773, "else" + line 168, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 776, "else" + line 173, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, "pan.___", state 835, "(1)" + line 166, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, "pan.___", state 852, "(1)" + line 177, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, "pan.___", state 861, "(1)" + line 177, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, "pan.___", state 862, "else" + line 175, "pan.___", state 867, "((j<1))" + line 175, "pan.___", state 867, "((j>=1))" + line 181, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 882, "(1)" + line 162, "pan.___", state 890, "(1)" + line 162, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 891, "else" + line 160, "pan.___", state 896, "((j<1))" + line 160, "pan.___", state 896, "((j>=1))" + line 166, "pan.___", state 902, "(1)" + line 166, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 903, "else" + line 168, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 906, "else" + line 200, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, "pan.___", state 908, "else" + line 219, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, "pan.___", state 909, "else" + line 354, "pan.___", state 915, "((sighand_exec==1))" + line 354, "pan.___", state 915, "else" + line 360, "pan.___", state 918, "sighand_exec = 1" + line 397, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, "pan.___", state 933, "(1)" + line 397, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, "pan.___", state 934, "else" + line 397, "pan.___", state 937, "(1)" + line 401, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, "pan.___", state 947, "(1)" + line 401, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, "pan.___", state 948, "else" + line 401, "pan.___", state 951, "(1)" + line 401, "pan.___", state 952, "(1)" + line 401, "pan.___", state 952, "(1)" + line 399, "pan.___", state 957, "((i<1))" + line 399, "pan.___", state 957, "((i>=1))" + line 406, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, "pan.___", state 976, "(1)" + line 407, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, "pan.___", state 977, "else" + line 407, "pan.___", state 980, "(1)" + line 407, "pan.___", state 981, "(1)" + line 407, "pan.___", state 981, "(1)" + line 411, "pan.___", state 989, "(1)" + line 411, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, "pan.___", state 990, "else" + line 411, "pan.___", state 993, "(1)" + line 411, "pan.___", state 994, "(1)" + line 411, "pan.___", state 994, "(1)" + line 409, "pan.___", state 999, "((i<1))" + line 409, "pan.___", state 999, "((i>=1))" + line 416, "pan.___", state 1006, "(1)" + line 416, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, "pan.___", state 1007, "else" + line 416, "pan.___", state 1010, "(1)" + line 416, "pan.___", state 1011, "(1)" + line 416, "pan.___", state 1011, "(1)" + line 418, "pan.___", state 1014, "(1)" + line 418, "pan.___", state 1014, "(1)" + line 360, "pan.___", state 1023, "sighand_exec = 1" + line 401, "pan.___", state 1054, "(1)" + line 406, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1113, "(1)" + line 401, "pan.___", state 1151, "(1)" + line 406, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1210, "(1)" + line 397, "pan.___", state 1236, "(1)" + line 401, "pan.___", state 1250, "(1)" + line 406, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1309, "(1)" + line 401, "pan.___", state 1350, "(1)" + line 406, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 416, "pan.___", state 1409, "(1)" + line 173, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, "pan.___", state 1432, "(1)" + line 177, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, "pan.___", state 1441, "(1)" + line 177, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, "pan.___", state 1442, "else" + line 175, "pan.___", state 1447, "((j<1))" + line 175, "pan.___", state 1447, "((j>=1))" + line 181, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 1462, "(1)" + line 162, "pan.___", state 1470, "(1)" + line 162, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 1471, "else" + line 160, "pan.___", state 1476, "((j<1))" + line 160, "pan.___", state 1476, "((j>=1))" + line 166, "pan.___", state 1482, "(1)" + line 166, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 1483, "else" + line 168, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 1486, "else" + line 173, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 181, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 166, "pan.___", state 1545, "(1)" + line 166, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 173, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 173, "pan.___", state 1562, "(1)" + line 177, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 177, "pan.___", state 1571, "(1)" + line 177, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 177, "pan.___", state 1572, "else" + line 175, "pan.___", state 1577, "((j<1))" + line 175, "pan.___", state 1577, "((j>=1))" + line 181, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 1592, "(1)" + line 162, "pan.___", state 1600, "(1)" + line 162, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 162, "pan.___", state 1601, "else" + line 160, "pan.___", state 1606, "((j<1))" + line 160, "pan.___", state 1606, "((j>=1))" + line 166, "pan.___", state 1612, "(1)" + line 166, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 166, "pan.___", state 1613, "else" + line 168, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 168, "pan.___", state 1616, "else" + line 200, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 200, "pan.___", state 1618, "else" + line 219, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 219, "pan.___", state 1619, "else" + line 354, "pan.___", state 1625, "((sighand_exec==1))" + line 354, "pan.___", state 1625, "else" + line 360, "pan.___", state 1628, "sighand_exec = 1" + line 397, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 397, "pan.___", state 1643, "(1)" + line 397, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 397, "pan.___", state 1644, "else" + line 397, "pan.___", state 1647, "(1)" + line 401, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 401, "pan.___", state 1657, "(1)" + line 401, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 401, "pan.___", state 1658, "else" + line 401, "pan.___", state 1661, "(1)" + line 401, "pan.___", state 1662, "(1)" + line 401, "pan.___", state 1662, "(1)" + line 399, "pan.___", state 1667, "((i<1))" + line 399, "pan.___", state 1667, "((i>=1))" + line 406, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 407, "pan.___", state 1686, "(1)" + line 407, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 407, "pan.___", state 1687, "else" + line 407, "pan.___", state 1690, "(1)" + line 407, "pan.___", state 1691, "(1)" + line 407, "pan.___", state 1691, "(1)" + line 411, "pan.___", state 1699, "(1)" + line 411, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 411, "pan.___", state 1700, "else" + line 411, "pan.___", state 1703, "(1)" + line 411, "pan.___", state 1704, "(1)" + line 411, "pan.___", state 1704, "(1)" + line 409, "pan.___", state 1709, "((i<1))" + line 409, "pan.___", state 1709, "((i>=1))" + line 416, "pan.___", state 1716, "(1)" + line 416, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 416, "pan.___", state 1717, "else" + line 416, "pan.___", state 1720, "(1)" + line 416, "pan.___", state 1721, "(1)" + line 416, "pan.___", state 1721, "(1)" + line 418, "pan.___", state 1724, "(1)" + line 418, "pan.___", state 1724, "(1)" + line 360, "pan.___", state 1733, "sighand_exec = 1" + line 177, "pan.___", state 1758, "(1)" + line 181, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 158, "pan.___", state 1779, "(1)" + line 162, "pan.___", state 1787, "(1)" + line 166, "pan.___", state 1799, "(1)" + line 173, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/urcu/result-signal-over-writer/urcu_free.spin.input b/urcu/result-signal-over-writer/urcu_free.spin.input new file mode 100644 index 0000000..953115f --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free.spin.input @@ -0,0 +1,721 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_free.spin.input.trail b/urcu/result-signal-over-writer/urcu_free.spin.input.trail new file mode 100644 index 0000000..837f3d9 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free.spin.input.trail @@ -0,0 +1,15043 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 +25:4:4362 +26:0:4365 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/dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_mb.log @@ -0,0 +1,382 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 72 byte, depth reached 10856, errors: 0 + 161519 states, stored + 1724866 states, matched + 1886385 transitions (= stored+matched) + 6692565 atomic steps +hash conflicts: 84009 (resolved) + +Stats on memory usage (in Megabytes): + 15.404 equivalent memory usage for states (stored*(State-vector + overhead)) + 10.421 actual memory usage for states (compression: 67.65%) + state-vector as stored = 40 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 476.115 total actual memory usage + +unreached in proctype urcu_reader_sig + line 403, "pan.___", state 330, "(1)" + line 614, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 652, "pan.___", state 213, "(1)" + line 403, "pan.___", state 239, "(1)" + line 403, "pan.___", state 525, "(1)" + line 399, "pan.___", state 610, "(1)" + line 403, "pan.___", state 624, "(1)" + line 403, "pan.___", state 724, "(1)" + line 399, "pan.___", state 805, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 807, "(1)" + line 399, "pan.___", state 808, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 808, "else" + line 399, "pan.___", state 811, "(1)" + line 403, "pan.___", state 819, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 821, "(1)" + line 403, "pan.___", state 822, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 822, "else" + line 403, "pan.___", state 825, "(1)" + line 403, "pan.___", state 826, "(1)" + line 403, "pan.___", state 826, "(1)" + line 401, "pan.___", state 831, "((j<1))" + line 401, "pan.___", state 831, "((j>=1))" + line 408, "pan.___", state 837, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 850, "(1)" + line 409, "pan.___", state 851, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 851, "else" + line 409, "pan.___", state 854, "(1)" + line 409, "pan.___", state 855, "(1)" + line 409, "pan.___", state 855, "(1)" + line 413, "pan.___", state 863, "(1)" + line 413, "pan.___", state 864, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 864, "else" + line 413, "pan.___", state 867, "(1)" + line 413, "pan.___", state 868, "(1)" + line 413, "pan.___", state 868, "(1)" + line 411, "pan.___", state 873, "((j<1))" + line 411, "pan.___", state 873, "((j>=1))" + line 418, "pan.___", state 880, "(1)" + line 418, "pan.___", state 881, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 881, "else" + line 418, "pan.___", state 884, "(1)" + line 418, "pan.___", state 885, "(1)" + line 418, "pan.___", state 885, "(1)" + line 399, "pan.___", state 896, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 898, "(1)" + line 399, "pan.___", state 899, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 899, "else" + line 399, "pan.___", state 902, "(1)" + line 403, "pan.___", state 910, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 912, "(1)" + line 403, "pan.___", state 913, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 913, "else" + line 403, "pan.___", state 916, "(1)" + line 403, "pan.___", state 917, "(1)" + line 403, "pan.___", state 917, "(1)" + line 401, "pan.___", state 922, "((j<1))" + line 401, "pan.___", state 922, "((j>=1))" + line 408, "pan.___", state 928, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 941, "(1)" + line 409, "pan.___", state 942, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 942, "else" + line 409, "pan.___", state 945, "(1)" + line 409, "pan.___", state 946, "(1)" + line 409, "pan.___", state 946, "(1)" + line 413, "pan.___", state 954, "(1)" + line 413, "pan.___", state 955, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 955, "else" + line 413, "pan.___", state 958, "(1)" + line 413, "pan.___", state 959, "(1)" + line 413, "pan.___", state 959, "(1)" + line 411, "pan.___", state 964, "((j<1))" + line 411, "pan.___", state 964, "((j>=1))" + line 418, "pan.___", state 971, "(1)" + line 418, "pan.___", state 972, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 972, "else" + line 418, "pan.___", state 975, "(1)" + line 418, "pan.___", state 976, "(1)" + line 418, "pan.___", state 976, "(1)" + line 194, "pan.___", state 981, "(1)" + line 194, "pan.___", state 981, "(1)" + line 214, "pan.___", state 985, "((i<1))" + line 214, "pan.___", state 985, "((i>=1))" + line 399, "pan.___", state 991, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 993, "(1)" + line 399, "pan.___", state 994, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 994, "else" + line 399, "pan.___", state 997, "(1)" + line 403, "pan.___", state 1005, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1007, "(1)" + line 403, "pan.___", state 1008, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1008, "else" + line 403, "pan.___", state 1011, "(1)" + line 403, "pan.___", state 1012, "(1)" + line 403, "pan.___", state 1012, "(1)" + line 401, "pan.___", state 1017, "((j<1))" + line 401, "pan.___", state 1017, "((j>=1))" + line 408, "pan.___", state 1023, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1036, "(1)" + line 409, "pan.___", state 1037, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1037, "else" + line 409, "pan.___", state 1040, "(1)" + line 409, "pan.___", state 1041, "(1)" + line 409, "pan.___", state 1041, "(1)" + line 413, "pan.___", state 1049, "(1)" + line 413, "pan.___", state 1050, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1050, "else" + line 413, "pan.___", state 1053, "(1)" + line 413, "pan.___", state 1054, "(1)" + line 413, "pan.___", state 1054, "(1)" + line 411, "pan.___", state 1059, "((j<1))" + line 411, "pan.___", state 1059, "((j>=1))" + line 418, "pan.___", state 1066, "(1)" + line 418, "pan.___", state 1067, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1067, "else" + line 418, "pan.___", state 1070, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 194, "pan.___", state 1076, "(1)" + line 194, "pan.___", state 1076, "(1)" + line 221, "pan.___", state 1077, "(1)" + line 221, "pan.___", state 1077, "(1)" + line 356, "pan.___", state 1083, "((sighand_exec==1))" + line 356, "pan.___", state 1083, "else" + line 362, "pan.___", state 1086, "sighand_exec = 1" + line 399, "pan.___", state 1099, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1101, "(1)" + line 399, "pan.___", state 1102, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1102, "else" + line 399, "pan.___", state 1105, "(1)" + line 403, "pan.___", state 1113, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1115, "(1)" + line 403, "pan.___", state 1116, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1116, "else" + line 403, "pan.___", state 1119, "(1)" + line 403, "pan.___", state 1120, "(1)" + line 403, "pan.___", state 1120, "(1)" + line 401, "pan.___", state 1125, "((i<1))" + line 401, "pan.___", state 1125, "((i>=1))" + line 408, "pan.___", state 1131, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1144, "(1)" + line 409, "pan.___", state 1145, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1145, "else" + line 409, "pan.___", state 1148, "(1)" + line 409, "pan.___", state 1149, "(1)" + line 409, "pan.___", state 1149, "(1)" + line 413, "pan.___", state 1157, "(1)" + line 413, "pan.___", state 1158, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1158, "else" + line 413, "pan.___", state 1161, "(1)" + line 413, "pan.___", state 1162, "(1)" + line 413, "pan.___", state 1162, "(1)" + line 411, "pan.___", state 1167, "((i<1))" + line 411, "pan.___", state 1167, "((i>=1))" + line 418, "pan.___", state 1174, "(1)" + line 418, "pan.___", state 1175, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1175, "else" + line 418, "pan.___", state 1178, "(1)" + line 418, "pan.___", state 1179, "(1)" + line 418, "pan.___", state 1179, "(1)" + line 420, "pan.___", state 1182, "(1)" + line 420, "pan.___", state 1182, "(1)" + line 362, "pan.___", state 1191, "sighand_exec = 1" + line 403, "pan.___", state 1222, "(1)" + line 403, "pan.___", state 1319, "(1)" + line 399, "pan.___", state 1404, "(1)" + line 403, "pan.___", state 1418, "(1)" + line 403, "pan.___", state 1518, "(1)" + line 399, "pan.___", state 1599, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1601, "(1)" + line 399, "pan.___", state 1602, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1602, "else" + line 399, "pan.___", state 1605, "(1)" + line 403, "pan.___", state 1613, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1615, "(1)" + line 403, "pan.___", state 1616, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1616, "else" + line 403, "pan.___", state 1619, "(1)" + line 403, "pan.___", state 1620, "(1)" + line 403, "pan.___", state 1620, "(1)" + line 401, "pan.___", state 1625, "((j<1))" + line 401, "pan.___", state 1625, "((j>=1))" + line 408, "pan.___", state 1631, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1644, "(1)" + line 409, "pan.___", state 1645, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1645, "else" + line 409, "pan.___", state 1648, "(1)" + line 409, "pan.___", state 1649, "(1)" + line 409, "pan.___", state 1649, "(1)" + line 413, "pan.___", state 1657, "(1)" + line 413, "pan.___", state 1658, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1658, "else" + line 413, "pan.___", state 1661, "(1)" + line 413, "pan.___", state 1662, "(1)" + line 413, "pan.___", state 1662, "(1)" + line 411, "pan.___", state 1667, "((j<1))" + line 411, "pan.___", state 1667, "((j>=1))" + line 418, "pan.___", state 1674, "(1)" + line 418, "pan.___", state 1675, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1675, "else" + line 418, "pan.___", state 1678, "(1)" + line 418, "pan.___", state 1679, "(1)" + line 418, "pan.___", state 1679, "(1)" + line 399, "pan.___", state 1690, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1692, "(1)" + line 399, "pan.___", state 1693, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1693, "else" + line 399, "pan.___", state 1696, "(1)" + line 403, "pan.___", state 1704, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1706, "(1)" + line 403, "pan.___", state 1707, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1707, "else" + line 403, "pan.___", state 1710, "(1)" + line 403, "pan.___", state 1711, "(1)" + line 403, "pan.___", state 1711, "(1)" + line 401, "pan.___", state 1716, "((j<1))" + line 401, "pan.___", state 1716, "((j>=1))" + line 408, "pan.___", state 1722, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1735, "(1)" + line 409, "pan.___", state 1736, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1736, "else" + line 409, "pan.___", state 1739, "(1)" + line 409, "pan.___", state 1740, "(1)" + line 409, "pan.___", state 1740, "(1)" + line 413, "pan.___", state 1748, "(1)" + line 413, "pan.___", state 1749, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1749, "else" + line 413, "pan.___", state 1752, "(1)" + line 413, "pan.___", state 1753, "(1)" + line 413, "pan.___", state 1753, "(1)" + line 411, "pan.___", state 1758, "((j<1))" + line 411, "pan.___", state 1758, "((j>=1))" + line 418, "pan.___", state 1765, "(1)" + line 418, "pan.___", state 1766, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1766, "else" + line 418, "pan.___", state 1769, "(1)" + line 418, "pan.___", state 1770, "(1)" + line 418, "pan.___", state 1770, "(1)" + line 194, "pan.___", state 1775, "(1)" + line 194, "pan.___", state 1775, "(1)" + line 214, "pan.___", state 1779, "((i<1))" + line 214, "pan.___", state 1779, "((i>=1))" + line 399, "pan.___", state 1785, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1787, "(1)" + line 399, "pan.___", state 1788, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1788, "else" + line 399, "pan.___", state 1791, "(1)" + line 403, "pan.___", state 1799, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1801, "(1)" + line 403, "pan.___", state 1802, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1802, "else" + line 403, "pan.___", state 1805, "(1)" + line 403, "pan.___", state 1806, "(1)" + line 403, "pan.___", state 1806, "(1)" + line 401, "pan.___", state 1811, "((j<1))" + line 401, "pan.___", state 1811, "((j>=1))" + line 408, "pan.___", state 1817, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1830, "(1)" + line 409, "pan.___", state 1831, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1831, "else" + line 409, "pan.___", state 1834, "(1)" + line 409, "pan.___", state 1835, "(1)" + line 409, "pan.___", state 1835, "(1)" + line 413, "pan.___", state 1843, "(1)" + line 413, "pan.___", state 1844, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1844, "else" + line 413, "pan.___", state 1847, "(1)" + line 413, "pan.___", state 1848, "(1)" + line 413, "pan.___", state 1848, "(1)" + line 411, "pan.___", state 1853, "((j<1))" + line 411, "pan.___", state 1853, "((j>=1))" + line 418, "pan.___", state 1860, "(1)" + line 418, "pan.___", state 1861, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1861, "else" + line 418, "pan.___", state 1864, "(1)" + line 418, "pan.___", state 1865, "(1)" + line 418, "pan.___", state 1865, "(1)" + line 194, "pan.___", state 1870, "(1)" + line 194, "pan.___", state 1870, "(1)" + line 221, "pan.___", state 1871, "(1)" + line 221, "pan.___", state 1871, "(1)" + line 356, "pan.___", state 1877, "((sighand_exec==1))" + line 356, "pan.___", state 1877, "else" + line 362, "pan.___", state 1880, "sighand_exec = 1" + line 399, "pan.___", state 1893, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1895, "(1)" + line 399, "pan.___", state 1896, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1896, "else" + line 399, "pan.___", state 1899, "(1)" + line 403, "pan.___", state 1907, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1909, "(1)" + line 403, "pan.___", state 1910, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1910, "else" + line 403, "pan.___", state 1913, "(1)" + line 403, "pan.___", state 1914, "(1)" + line 403, "pan.___", state 1914, "(1)" + line 401, "pan.___", state 1919, "((i<1))" + line 401, "pan.___", state 1919, "((i>=1))" + line 408, "pan.___", state 1925, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1938, "(1)" + line 409, "pan.___", state 1939, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1939, "else" + line 409, "pan.___", state 1942, "(1)" + line 409, "pan.___", state 1943, "(1)" + line 409, "pan.___", state 1943, "(1)" + line 413, "pan.___", state 1951, "(1)" + line 413, "pan.___", state 1952, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1952, "else" + line 413, "pan.___", state 1955, "(1)" + line 413, "pan.___", state 1956, "(1)" + line 413, "pan.___", state 1956, "(1)" + line 411, "pan.___", state 1961, "((i<1))" + line 411, "pan.___", state 1961, "((i>=1))" + line 418, "pan.___", state 1968, "(1)" + line 418, "pan.___", state 1969, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1969, "else" + line 418, "pan.___", state 1972, "(1)" + line 418, "pan.___", state 1973, "(1)" + line 418, "pan.___", state 1973, "(1)" + line 420, "pan.___", state 1976, "(1)" + line 420, "pan.___", state 1976, "(1)" + line 362, "pan.___", state 1985, "sighand_exec = 1" + line 403, "pan.___", state 2016, "(1)" + line 702, "pan.___", state 2304, "-end-" + (221 of 2304 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 748, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.47 seconds +pan: rate 109876.87 states/second +pan: avg transition delay 7.7927e-07 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input b/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..48411ec --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input @@ -0,0 +1,723 @@ +#define NO_RMB +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input.trail b/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..00fba51 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2172 @@ +-2:4:-2 +-4:-4:-4 +1:0:4249 +2:4:4201 +3:4:4204 +4:4:4204 +5:4:4207 +6:4:4215 +7:4:4215 +8:4:4218 +9:4:4224 +10:4:4228 +11:4:4228 +12:4:4231 +13:4:4239 +14:4:4243 +15:4:4244 +16:0:4249 +17:4:4246 +18:0:4249 +19:3:1991 +20:0:4249 +21:3:1997 +22:0:4249 +23:3:1998 +24:0:4249 +25:3:1999 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--- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu/result-signal-over-writer/urcu_free_no_rmb.log b/urcu/result-signal-over-writer/urcu_free_no_rmb.log new file mode 100644 index 0000000..5eb694e --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_rmb.log @@ -0,0 +1,280 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10519, errors: 0 + 20146 states, stored + 191615 states, matched + 211761 transitions (= stored+matched) + 711676 atomic steps +hash conflicts: 1222 (resolved) + +Stats on memory usage (in Megabytes): + 1.614 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.509 actual memory usage for states (compression: 93.51%) + state-vector as stored = 51 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.229 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 174, "pan.___", state 257, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 658, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 660, "(1)" + line 182, "pan.___", state 661, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 661, "else" + line 174, "pan.___", state 671, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 693, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 174, "pan.___", state 710, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 712, "(1)" + line 178, "pan.___", state 719, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 721, "(1)" + line 178, "pan.___", state 722, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 722, "else" + line 176, "pan.___", state 727, "((j<1))" + line 176, "pan.___", state 727, "((j>=1))" + line 182, "pan.___", state 732, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 734, "(1)" + line 182, "pan.___", state 735, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 735, "else" + line 192, "pan.___", state 740, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 192, "pan.___", state 740, "else" + line 220, "pan.___", state 741, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 741, "else" + line 355, "pan.___", state 747, "((sighand_exec==1))" + line 355, "pan.___", state 747, "else" + line 361, "pan.___", state 750, "sighand_exec = 1" + line 398, "pan.___", state 763, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 765, "(1)" + line 398, "pan.___", state 766, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 766, "else" + line 398, "pan.___", state 769, "(1)" + line 402, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 779, "(1)" + line 402, "pan.___", state 780, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 780, "else" + line 402, "pan.___", state 783, "(1)" + line 402, "pan.___", state 784, "(1)" + line 402, "pan.___", state 784, "(1)" + line 400, "pan.___", state 789, "((i<1))" + line 400, "pan.___", state 789, "((i>=1))" + line 407, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 808, "(1)" + line 408, "pan.___", state 809, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 809, "else" + line 408, "pan.___", state 812, "(1)" + line 408, "pan.___", state 813, "(1)" + line 408, "pan.___", state 813, "(1)" + line 412, "pan.___", state 821, "(1)" + line 412, "pan.___", state 822, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 822, "else" + line 412, "pan.___", state 825, "(1)" + line 412, "pan.___", state 826, "(1)" + line 412, "pan.___", state 826, "(1)" + line 410, "pan.___", state 831, "((i<1))" + line 410, "pan.___", state 831, "((i>=1))" + line 417, "pan.___", state 838, "(1)" + line 417, "pan.___", state 839, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 839, "else" + line 417, "pan.___", state 842, "(1)" + line 417, "pan.___", state 843, "(1)" + line 417, "pan.___", state 843, "(1)" + line 419, "pan.___", state 846, "(1)" + line 419, "pan.___", state 846, "(1)" + line 361, "pan.___", state 855, "sighand_exec = 1" + line 402, "pan.___", state 886, "(1)" + line 407, "pan.___", state 902, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 945, "(1)" + line 402, "pan.___", state 983, "(1)" + line 407, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1042, "(1)" + line 398, "pan.___", state 1068, "(1)" + line 402, "pan.___", state 1082, "(1)" + line 407, "pan.___", state 1098, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1141, "(1)" + line 402, "pan.___", state 1182, "(1)" + line 407, "pan.___", state 1198, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1241, "(1)" + line 174, "pan.___", state 1262, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1264, "(1)" + line 178, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1273, "(1)" + line 178, "pan.___", state 1274, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1274, "else" + line 176, "pan.___", state 1279, "((j<1))" + line 176, "pan.___", state 1279, "((j>=1))" + line 182, "pan.___", state 1284, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 1286, "(1)" + line 182, "pan.___", state 1287, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 1287, "else" + line 174, "pan.___", state 1297, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 1319, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 174, "pan.___", state 1336, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1338, "(1)" + line 178, "pan.___", state 1345, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1347, "(1)" + line 178, "pan.___", state 1348, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1348, "else" + line 176, "pan.___", state 1353, "((j<1))" + line 176, "pan.___", state 1353, "((j>=1))" + line 182, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 182, "pan.___", state 1360, "(1)" + line 182, "pan.___", state 1361, "((cache_dirty_generation_ptr.bitfield&(1<<0)))" + line 182, "pan.___", state 1361, "else" + line 192, "pan.___", state 1366, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 192, "pan.___", state 1366, "else" + line 220, "pan.___", state 1367, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 1367, "else" + line 355, "pan.___", state 1373, "((sighand_exec==1))" + line 355, "pan.___", state 1373, "else" + line 361, "pan.___", state 1376, "sighand_exec = 1" + line 398, "pan.___", state 1389, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1391, "(1)" + line 398, "pan.___", state 1392, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1392, "else" + line 398, "pan.___", state 1395, "(1)" + line 402, "pan.___", state 1403, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1405, "(1)" + line 402, "pan.___", state 1406, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1406, "else" + line 402, "pan.___", state 1409, "(1)" + line 402, "pan.___", state 1410, "(1)" + line 402, "pan.___", state 1410, "(1)" + line 400, "pan.___", state 1415, "((i<1))" + line 400, "pan.___", state 1415, "((i>=1))" + line 407, "pan.___", state 1421, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1434, "(1)" + line 408, "pan.___", state 1435, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1435, "else" + line 408, "pan.___", state 1438, "(1)" + line 408, "pan.___", state 1439, "(1)" + line 408, "pan.___", state 1439, "(1)" + line 412, "pan.___", state 1447, "(1)" + line 412, "pan.___", state 1448, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1448, "else" + line 412, "pan.___", state 1451, "(1)" + line 412, "pan.___", state 1452, "(1)" + line 412, "pan.___", state 1452, "(1)" + line 410, "pan.___", state 1457, "((i<1))" + line 410, "pan.___", state 1457, "((i>=1))" + line 417, "pan.___", state 1464, "(1)" + line 417, "pan.___", state 1465, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1465, "else" + line 417, "pan.___", state 1468, "(1)" + line 417, "pan.___", state 1469, "(1)" + line 417, "pan.___", state 1469, "(1)" + line 419, "pan.___", state 1472, "(1)" + line 419, "pan.___", state 1472, "(1)" + line 361, "pan.___", state 1481, "sighand_exec = 1" + line 178, "pan.___", state 1506, "(1)" + line 182, "pan.___", state 1517, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1530, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail b/urcu/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..8219815 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1805 @@ +-2:4:-2 +-4:-4:-4 +1:0:2905 +2:4:2857 +3:4:2860 +4:4:2860 +5:4:2863 +6:4:2871 +7:4:2871 +8:4:2874 +9:4:2880 +10:4:2884 +11:4:2884 +12:4:2887 +13:4:2895 +14:4:2899 +15:4:2900 +16:0:2905 +17:4:2902 +18:0:2905 +19:3:1319 +20:0:2905 +21:3:1325 +22:0:2905 +23:3:1326 +24:0:2905 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diff --git a/urcu/result-signal-over-writer/urcu_free_no_wmb.define b/urcu/result-signal-over-writer/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu/result-signal-over-writer/urcu_free_no_wmb.log b/urcu/result-signal-over-writer/urcu_free_no_wmb.log new file mode 100644 index 0000000..a346ed9 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_wmb.log @@ -0,0 +1,224 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10499, errors: 0 + 159431 states, stored + 1505398 states, matched + 1664829 transitions (= stored+matched) + 5794809 atomic steps +hash conflicts: 62144 (resolved) + +Stats on memory usage (in Megabytes): + 12.772 equivalent memory usage for states (stored*(State-vector + overhead)) + 8.936 actual memory usage for states (compression: 69.96%) + state-vector as stored = 31 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 474.651 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 651, "pan.___", state 213, "(1)" + line 402, "pan.___", state 348, "(1)" + line 398, "pan.___", state 433, "(1)" + line 402, "pan.___", state 447, "(1)" + line 402, "pan.___", state 547, "(1)" + line 159, "pan.___", state 628, "(1)" + line 163, "pan.___", state 636, "(1)" + line 163, "pan.___", state 637, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 637, "else" + line 161, "pan.___", state 642, "((j<1))" + line 161, "pan.___", state 642, "((j>=1))" + line 167, "pan.___", state 648, "(1)" + line 167, "pan.___", state 649, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 649, "else" + line 159, "pan.___", state 660, "(1)" + line 163, "pan.___", state 668, "(1)" + line 163, "pan.___", state 669, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 167, "pan.___", state 680, "(1)" + line 167, "pan.___", state 681, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 696, "(1)" + line 163, "pan.___", state 704, "(1)" + line 163, "pan.___", state 705, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 705, "else" + line 161, "pan.___", state 710, "((j<1))" + line 161, "pan.___", state 710, "((j>=1))" + line 167, "pan.___", state 716, "(1)" + line 167, "pan.___", state 717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 717, "else" + line 201, "pan.___", state 722, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 201, "pan.___", state 722, "else" + line 220, "pan.___", state 723, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 220, "pan.___", state 723, "else" + line 355, "pan.___", state 729, "((sighand_exec==1))" + line 355, "pan.___", state 729, "else" + line 361, "pan.___", state 732, "sighand_exec = 1" + line 398, "pan.___", state 745, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 747, "(1)" + line 398, "pan.___", state 748, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 748, "else" + line 398, "pan.___", state 751, "(1)" + line 402, "pan.___", state 759, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 761, "(1)" + line 402, "pan.___", state 762, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 762, "else" + line 402, "pan.___", state 765, "(1)" + line 402, "pan.___", state 766, "(1)" + line 402, "pan.___", state 766, "(1)" + line 400, "pan.___", state 771, "((i<1))" + line 400, "pan.___", state 771, "((i>=1))" + line 407, "pan.___", state 777, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 790, "(1)" + line 408, "pan.___", state 791, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 791, "else" + line 408, "pan.___", state 794, "(1)" + line 408, "pan.___", state 795, "(1)" + line 408, "pan.___", state 795, "(1)" + line 412, "pan.___", state 803, "(1)" + line 412, "pan.___", state 804, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 804, "else" + line 412, "pan.___", state 807, "(1)" + line 412, "pan.___", state 808, "(1)" + line 412, "pan.___", state 808, "(1)" + line 410, "pan.___", state 813, "((i<1))" + line 410, "pan.___", state 813, "((i>=1))" + line 417, "pan.___", state 820, "(1)" + line 417, "pan.___", state 821, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 821, "else" + line 417, "pan.___", state 824, "(1)" + line 417, "pan.___", state 825, "(1)" + line 417, "pan.___", state 825, "(1)" + line 419, "pan.___", state 828, "(1)" + line 419, "pan.___", state 828, "(1)" + line 361, "pan.___", state 837, "sighand_exec = 1" + line 402, "pan.___", state 868, "(1)" + line 402, "pan.___", state 965, "(1)" + line 398, "pan.___", state 1050, "(1)" + line 402, "pan.___", state 1064, "(1)" + line 402, "pan.___", state 1164, "(1)" + line 159, "pan.___", state 1245, "(1)" + line 163, "pan.___", state 1253, "(1)" + line 163, "pan.___", state 1254, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1254, "else" + line 161, "pan.___", state 1259, "((j<1))" + line 161, "pan.___", state 1259, "((j>=1))" + line 167, "pan.___", state 1265, "(1)" + line 167, "pan.___", state 1266, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1266, "else" + line 159, "pan.___", state 1277, "(1)" + line 163, "pan.___", state 1285, "(1)" + line 163, "pan.___", state 1286, "(!((cache_dirty_urcu_active_readers.bitfield&(1<=1))" + line 167, "pan.___", state 1297, "(1)" + line 167, "pan.___", state 1298, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 159, "pan.___", state 1313, "(1)" + line 163, "pan.___", state 1321, "(1)" + line 163, "pan.___", state 1322, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1322, "else" + line 161, "pan.___", state 1327, "((j<1))" + line 161, "pan.___", state 1327, "((j>=1))" + line 167, "pan.___", state 1333, "(1)" + line 167, "pan.___", state 1334, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1334, "else" + line 201, "pan.___", state 1339, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 201, "pan.___", state 1339, "else" + line 220, "pan.___", state 1340, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 220, "pan.___", state 1340, "else" + line 355, "pan.___", state 1346, "((sighand_exec==1))" + line 355, "pan.___", state 1346, "else" + line 361, "pan.___", state 1349, "sighand_exec = 1" + line 398, "pan.___", state 1362, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1364, "(1)" + line 398, "pan.___", state 1365, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1365, "else" + line 398, "pan.___", state 1368, "(1)" + line 402, "pan.___", state 1376, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1378, "(1)" + line 402, "pan.___", state 1379, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1379, "else" + line 402, "pan.___", state 1382, "(1)" + line 402, "pan.___", state 1383, "(1)" + line 402, "pan.___", state 1383, "(1)" + line 400, "pan.___", state 1388, "((i<1))" + line 400, "pan.___", state 1388, "((i>=1))" + line 407, "pan.___", state 1394, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1407, "(1)" + line 408, "pan.___", state 1408, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1408, "else" + line 408, "pan.___", state 1411, "(1)" + line 408, "pan.___", state 1412, "(1)" + line 408, "pan.___", state 1412, "(1)" + line 412, "pan.___", state 1420, "(1)" + line 412, "pan.___", state 1421, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1421, "else" + line 412, "pan.___", state 1424, "(1)" + line 412, "pan.___", state 1425, "(1)" + line 412, "pan.___", state 1425, "(1)" + line 410, "pan.___", state 1430, "((i<1))" + line 410, "pan.___", state 1430, "((i>=1))" + line 417, "pan.___", state 1437, "(1)" + line 417, "pan.___", state 1438, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1438, "else" + line 417, "pan.___", state 1441, "(1)" + line 417, "pan.___", state 1442, "(1)" + line 417, "pan.___", state 1442, "(1)" + line 419, "pan.___", state 1445, "(1)" + line 419, "pan.___", state 1445, "(1)" + line 361, "pan.___", state 1454, "sighand_exec = 1" + line 701, "pan.___", state 1596, "-end-" + (111 of 1596 states) +unreached in proctype :init: + (0 of 46 states) +unreached in proctype :never: + line 747, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.23 seconds +pan: rate 129618.7 states/second +pan: avg transition delay 7.3881e-07 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input b/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..808154e --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input @@ -0,0 +1,722 @@ +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail b/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..522df0a --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1677 @@ +-2:4:-2 +-4:-4:-4 +1:0:2833 +2:4:2785 +3:4:2788 +4:4:2788 +5:4:2791 +6:4:2799 +7:4:2799 +8:4:2802 +9:4:2808 +10:4:2812 +11:4:2812 +12:4:2815 +13:4:2823 +14:4:2827 +15:4:2828 +16:0:2833 +17:4:2830 +18:0:2833 +19:3:1283 +20:0:2833 +21:3:1289 +22:0:2833 +23:3:1290 +24:0:2833 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+1650:3:2711 +1651:3:2716 +1652:0:2833 +1653:3:2727 +1654:0:2833 +1655:3:2732 +1656:3:2739 +1657:3:2740 +1658:3:2747 +1659:3:2752 +1660:0:2833 +1661:3:2767 +1662:0:2833 +1663:3:2769 +1664:0:2833 +1665:3:2770 +1666:0:2833 +1667:3:2773 +1668:0:2833 +1669:3:2778 +1670:0:2833 +1671:2:1071 +1672:0:2831 +1673:3:2779 +1674:0:2837 +1675:1:288 diff --git a/urcu/result-signal-over-writer/urcu_free_single_flip.define b/urcu/result-signal-over-writer/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu/result-signal-over-writer/urcu_free_single_flip.log b/urcu/result-signal-over-writer/urcu_free_single_flip.log new file mode 100644 index 0000000..f854175 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_single_flip.log @@ -0,0 +1,224 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 6934, errors: 0 + 7626 states, stored + 67235 states, matched + 74861 transitions (= stored+matched) + 248896 atomic steps +hash conflicts: 113 (resolved) + +Stats on memory usage (in Megabytes): + 0.611 equivalent memory usage for states (stored*(State-vector + overhead)) + 0.867 actual memory usage for states (unsuccessful compression: 141.88%) + state-vector as stored = 91 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 466.545 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 159, "pan.___", state 254, "(1)" + line 163, "pan.___", state 262, "(1)" + line 167, "pan.___", state 274, "(1)" + line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 752, "(1)" + line 163, "pan.___", state 760, "(1)" + line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 761, "else" + line 161, "pan.___", state 766, "((j<1))" + line 161, "pan.___", state 766, "((j>=1))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 773, "else" + line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 776, "else" + line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 835, "(1)" + line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 852, "(1)" + line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 861, "(1)" + line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 862, "else" + line 176, "pan.___", state 867, "((j<1))" + line 176, "pan.___", state 867, "((j>=1))" + line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 882, "(1)" + line 163, "pan.___", state 890, "(1)" + line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 891, "else" + line 161, "pan.___", state 896, "((j<1))" + line 161, "pan.___", state 896, "((j>=1))" + line 167, "pan.___", state 902, "(1)" + line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 903, "else" + line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 906, "else" + line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 908, "else" + line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 909, "else" + line 355, "pan.___", state 915, "((sighand_exec==1))" + line 355, "pan.___", state 915, "else" + line 361, "pan.___", state 918, "sighand_exec = 1" + line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 933, "(1)" + line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 934, "else" + line 398, "pan.___", state 937, "(1)" + line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 947, "(1)" + line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 948, "else" + line 402, "pan.___", state 951, "(1)" + line 402, "pan.___", state 952, "(1)" + line 402, "pan.___", state 952, "(1)" + line 400, "pan.___", state 957, "((i<1))" + line 400, "pan.___", state 957, "((i>=1))" + line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 976, "(1)" + line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 977, "else" + line 408, "pan.___", state 980, "(1)" + line 408, "pan.___", state 981, "(1)" + line 408, "pan.___", state 981, "(1)" + line 412, "pan.___", state 989, "(1)" + line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 990, "else" + line 412, "pan.___", state 993, "(1)" + line 412, "pan.___", state 994, "(1)" + line 412, "pan.___", state 994, "(1)" + line 410, "pan.___", state 999, "((i<1))" + line 410, "pan.___", state 999, "((i>=1))" + line 417, "pan.___", state 1006, "(1)" + line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1007, "else" + line 417, "pan.___", state 1010, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 361, "pan.___", state 1023, "sighand_exec = 1" + line 178, "pan.___", state 1048, "(1)" + line 182, "pan.___", state 1059, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1069, "(1)" + line 163, "pan.___", state 1077, "(1)" + line 167, "pan.___", state 1089, "(1)" + line 174, "pan.___", state 1100, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_free_single_flip.spin.input.trail b/urcu/result-signal-over-writer/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..84cf653 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1379 @@ +-2:4:-2 +-4:-4:-4 +1:0:2904 +2:4:2856 +3:4:2859 +4:4:2859 +5:4:2862 +6:4:2870 +7:4:2870 +8:4:2873 +9:4:2879 +10:4:2883 +11:4:2883 +12:4:2886 +13:4:2894 +14:4:2898 +15:4:2899 +16:0:2904 +17:4:2901 +18:0:2904 +19:3:1655 +20:0:2904 +21:3:1661 +22:0:2904 +23:3:1662 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+1339:3:2730 +1340:3:2731 +1341:3:2736 +1342:3:2743 +1343:3:2744 +1344:3:2751 +1345:3:2756 +1346:0:2904 +1347:3:2767 +1348:0:2904 +1349:3:2775 +1350:3:2776 +1351:3:2780 +1352:3:2784 +1353:3:2785 +1354:3:2789 +1355:3:2797 +1356:3:2798 +1357:3:2803 +1358:3:2810 +1359:3:2811 +1360:3:2818 +1361:3:2823 +1362:0:2904 +1363:3:2838 +1364:0:2904 +1365:3:2840 +1366:0:2904 +1367:3:2841 +1368:0:2904 +1369:3:2844 +1370:0:2904 +1371:3:2849 +1372:0:2904 +1373:2:1350 +1374:0:2902 +1375:3:2850 +1376:0:2908 +1377:1:296 diff --git a/urcu/result-signal-over-writer/urcu_progress.ltl b/urcu/result-signal-over-writer/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu/result-signal-over-writer/urcu_progress_reader.define b/urcu/result-signal-over-writer/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu/result-signal-over-writer/urcu_progress_reader.log b/urcu/result-signal-over-writer/urcu_progress_reader.log new file mode 100644 index 0000000..a1a6122 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_reader.log @@ -0,0 +1,348 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) +depth 12: Claim reached state 9 (line 747) +depth 86: Claim reached state 9 (line 746) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10679, errors: 0 + 38182 states, stored (88898 visited) + 997091 states, matched + 1085989 transitions (= visited+matched) + 3694897 atomic steps +hash conflicts: 9602 (resolved) + +Stats on memory usage (in Megabytes): + 3.059 equivalent memory usage for states (stored*(State-vector + overhead)) + 2.930 actual memory usage for states (compression: 95.79%) + state-vector as stored = 52 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 468.596 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 159, "pan.___", state 254, "(1)" + line 163, "pan.___", state 262, "(1)" + line 167, "pan.___", state 274, "(1)" + line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 752, "(1)" + line 163, "pan.___", state 760, "(1)" + line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 761, "else" + line 161, "pan.___", state 766, "((j<1))" + line 161, "pan.___", state 766, "((j>=1))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 773, "else" + line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 776, "else" + line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 835, "(1)" + line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 852, "(1)" + line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 861, "(1)" + line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 862, "else" + line 176, "pan.___", state 867, "((j<1))" + line 176, "pan.___", state 867, "((j>=1))" + line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 882, "(1)" + line 163, "pan.___", state 890, "(1)" + line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 891, "else" + line 161, "pan.___", state 896, "((j<1))" + line 161, "pan.___", state 896, "((j>=1))" + line 167, "pan.___", state 902, "(1)" + line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 903, "else" + line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 906, "else" + line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 908, "else" + line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 909, "else" + line 355, "pan.___", state 915, "((sighand_exec==1))" + line 355, "pan.___", state 915, "else" + line 361, "pan.___", state 918, "sighand_exec = 1" + line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 933, "(1)" + line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 934, "else" + line 398, "pan.___", state 937, "(1)" + line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 947, "(1)" + line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 948, "else" + line 402, "pan.___", state 951, "(1)" + line 402, "pan.___", state 952, "(1)" + line 402, "pan.___", state 952, "(1)" + line 400, "pan.___", state 957, "((i<1))" + line 400, "pan.___", state 957, "((i>=1))" + line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 976, "(1)" + line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 977, "else" + line 408, "pan.___", state 980, "(1)" + line 408, "pan.___", state 981, "(1)" + line 408, "pan.___", state 981, "(1)" + line 412, "pan.___", state 989, "(1)" + line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 990, "else" + line 412, "pan.___", state 993, "(1)" + line 412, "pan.___", state 994, "(1)" + line 412, "pan.___", state 994, "(1)" + line 410, "pan.___", state 999, "((i<1))" + line 410, "pan.___", state 999, "((i>=1))" + line 417, "pan.___", state 1006, "(1)" + line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1007, "else" + line 417, "pan.___", state 1010, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 361, "pan.___", state 1023, "sighand_exec = 1" + line 402, "pan.___", state 1054, "(1)" + line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1113, "(1)" + line 402, "pan.___", state 1151, "(1)" + line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1210, "(1)" + line 398, "pan.___", state 1236, "(1)" + line 402, "pan.___", state 1250, "(1)" + line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1309, "(1)" + line 402, "pan.___", state 1350, "(1)" + line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1409, "(1)" + line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1432, "(1)" + line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1441, "(1)" + line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1442, "else" + line 176, "pan.___", state 1447, "((j<1))" + line 176, "pan.___", state 1447, "((j>=1))" + line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1462, "(1)" + line 163, "pan.___", state 1470, "(1)" + line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1471, "else" + line 161, "pan.___", state 1476, "((j<1))" + line 161, "pan.___", state 1476, "((j>=1))" + line 167, "pan.___", state 1482, "(1)" + line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1483, "else" + line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1486, "else" + line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 1545, "(1)" + line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1562, "(1)" + line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1571, "(1)" + line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1572, "else" + line 176, "pan.___", state 1577, "((j<1))" + line 176, "pan.___", state 1577, "((j>=1))" + line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1592, "(1)" + line 163, "pan.___", state 1600, "(1)" + line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1601, "else" + line 161, "pan.___", state 1606, "((j<1))" + line 161, "pan.___", state 1606, "((j>=1))" + line 167, "pan.___", state 1612, "(1)" + line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1613, "else" + line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1616, "else" + line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 1618, "else" + line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 1619, "else" + line 355, "pan.___", state 1625, "((sighand_exec==1))" + line 355, "pan.___", state 1625, "else" + line 361, "pan.___", state 1628, "sighand_exec = 1" + line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1643, "(1)" + line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1644, "else" + line 398, "pan.___", state 1647, "(1)" + line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1657, "(1)" + line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1658, "else" + line 402, "pan.___", state 1661, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 400, "pan.___", state 1667, "((i<1))" + line 400, "pan.___", state 1667, "((i>=1))" + line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1686, "(1)" + line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1687, "else" + line 408, "pan.___", state 1690, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 412, "pan.___", state 1699, "(1)" + line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1700, "else" + line 412, "pan.___", state 1703, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 410, "pan.___", state 1709, "((i<1))" + line 410, "pan.___", state 1709, "((i>=1))" + line 417, "pan.___", state 1716, "(1)" + line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1717, "else" + line 417, "pan.___", state 1720, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 361, "pan.___", state 1733, "sighand_exec = 1" + line 178, "pan.___", state 1758, "(1)" + line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1779, "(1)" + line 163, "pan.___", state 1787, "(1)" + line 167, "pan.___", state 1799, "(1)" + line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_progress_reader.spin.input.trail b/urcu/result-signal-over-writer/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..7c42af1 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_reader.spin.input.trail @@ -0,0 +1,1270 @@ +-2:4:-2 +-4:-4:-4 +1:0:4401 +2:4:4353 +3:4:4356 +4:4:4356 +5:4:4359 +6:4:4367 +7:4:4367 +8:4:4370 +9:4:4376 +10:4:4380 +11:4:4380 +12:4:4383 +13:4:4391 +14:4:4395 +15:4:4396 +16:0:4401 +17:4:4398 +18:0:4401 +19:3:2479 +20:0:4401 +21:3:2485 +22:0:4401 +23:3:2486 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+1258:0:4405 +1259:2:1348 +1260:0:4405 +1261:3:4347 +1262:0:4405 +1263:2:1347 +1264:0:4405 +1265:3:4346 +1266:0:4405 +1267:1:104 diff --git a/urcu/result-signal-over-writer/urcu_progress_writer.define b/urcu/result-signal-over-writer/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu/result-signal-over-writer/urcu_progress_writer.log b/urcu/result-signal-over-writer/urcu_progress_writer.log new file mode 100644 index 0000000..02c53cf --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_writer.log @@ -0,0 +1,348 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) +depth 12: Claim reached state 9 (line 747) +depth 28: Claim reached state 9 (line 746) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10679, errors: 0 + 38555 states, stored (92500 visited) + 1044204 states, matched + 1136704 transitions (= visited+matched) + 3867169 atomic steps +hash conflicts: 8572 (resolved) + +Stats on memory usage (in Megabytes): + 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) + 2.930 actual memory usage for states (compression: 94.87%) + state-vector as stored = 52 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 468.596 total actual memory usage + +unreached in proctype urcu_reader_sig + line 402, "pan.___", state 330, "(1)" + line 613, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 59, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 160, "(1)" + line 651, "pan.___", state 213, "(1)" + line 174, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 178, "pan.___", state 233, "(1)" + line 159, "pan.___", state 254, "(1)" + line 163, "pan.___", state 262, "(1)" + line 167, "pan.___", state 274, "(1)" + line 174, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 742, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 752, "(1)" + line 163, "pan.___", state 760, "(1)" + line 163, "pan.___", state 761, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 761, "else" + line 161, "pan.___", state 766, "((j<1))" + line 161, "pan.___", state 766, "((j>=1))" + line 167, "pan.___", state 772, "(1)" + line 167, "pan.___", state 773, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 773, "else" + line 169, "pan.___", state 776, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 776, "else" + line 174, "pan.___", state 783, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 805, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 835, "(1)" + line 167, "pan.___", state 836, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 850, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 852, "(1)" + line 178, "pan.___", state 859, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 861, "(1)" + line 178, "pan.___", state 862, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 862, "else" + line 176, "pan.___", state 867, "((j<1))" + line 176, "pan.___", state 867, "((j>=1))" + line 182, "pan.___", state 872, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 882, "(1)" + line 163, "pan.___", state 890, "(1)" + line 163, "pan.___", state 891, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 891, "else" + line 161, "pan.___", state 896, "((j<1))" + line 161, "pan.___", state 896, "((j>=1))" + line 167, "pan.___", state 902, "(1)" + line 167, "pan.___", state 903, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 903, "else" + line 169, "pan.___", state 906, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 906, "else" + line 201, "pan.___", state 908, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 908, "else" + line 220, "pan.___", state 909, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 909, "else" + line 355, "pan.___", state 915, "((sighand_exec==1))" + line 355, "pan.___", state 915, "else" + line 361, "pan.___", state 918, "sighand_exec = 1" + line 398, "pan.___", state 931, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 933, "(1)" + line 398, "pan.___", state 934, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 934, "else" + line 398, "pan.___", state 937, "(1)" + line 402, "pan.___", state 945, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 947, "(1)" + line 402, "pan.___", state 948, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 948, "else" + line 402, "pan.___", state 951, "(1)" + line 402, "pan.___", state 952, "(1)" + line 402, "pan.___", state 952, "(1)" + line 400, "pan.___", state 957, "((i<1))" + line 400, "pan.___", state 957, "((i>=1))" + line 407, "pan.___", state 963, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 976, "(1)" + line 408, "pan.___", state 977, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 977, "else" + line 408, "pan.___", state 980, "(1)" + line 408, "pan.___", state 981, "(1)" + line 408, "pan.___", state 981, "(1)" + line 412, "pan.___", state 989, "(1)" + line 412, "pan.___", state 990, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 990, "else" + line 412, "pan.___", state 993, "(1)" + line 412, "pan.___", state 994, "(1)" + line 412, "pan.___", state 994, "(1)" + line 410, "pan.___", state 999, "((i<1))" + line 410, "pan.___", state 999, "((i>=1))" + line 417, "pan.___", state 1006, "(1)" + line 417, "pan.___", state 1007, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1007, "else" + line 417, "pan.___", state 1010, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 417, "pan.___", state 1011, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 419, "pan.___", state 1014, "(1)" + line 361, "pan.___", state 1023, "sighand_exec = 1" + line 402, "pan.___", state 1054, "(1)" + line 407, "pan.___", state 1070, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1113, "(1)" + line 402, "pan.___", state 1151, "(1)" + line 407, "pan.___", state 1167, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1210, "(1)" + line 398, "pan.___", state 1236, "(1)" + line 402, "pan.___", state 1250, "(1)" + line 407, "pan.___", state 1266, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1309, "(1)" + line 402, "pan.___", state 1350, "(1)" + line 407, "pan.___", state 1366, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 417, "pan.___", state 1409, "(1)" + line 174, "pan.___", state 1430, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1432, "(1)" + line 178, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1441, "(1)" + line 178, "pan.___", state 1442, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1442, "else" + line 176, "pan.___", state 1447, "((j<1))" + line 176, "pan.___", state 1447, "((j>=1))" + line 182, "pan.___", state 1452, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1462, "(1)" + line 163, "pan.___", state 1470, "(1)" + line 163, "pan.___", state 1471, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1471, "else" + line 161, "pan.___", state 1476, "((j<1))" + line 161, "pan.___", state 1476, "((j>=1))" + line 167, "pan.___", state 1482, "(1)" + line 167, "pan.___", state 1483, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1483, "else" + line 169, "pan.___", state 1486, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1486, "else" + line 174, "pan.___", state 1493, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 182, "pan.___", state 1515, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 167, "pan.___", state 1545, "(1)" + line 167, "pan.___", state 1546, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 174, "pan.___", state 1560, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 174, "pan.___", state 1562, "(1)" + line 178, "pan.___", state 1569, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 178, "pan.___", state 1571, "(1)" + line 178, "pan.___", state 1572, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 178, "pan.___", state 1572, "else" + line 176, "pan.___", state 1577, "((j<1))" + line 176, "pan.___", state 1577, "((j>=1))" + line 182, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1592, "(1)" + line 163, "pan.___", state 1600, "(1)" + line 163, "pan.___", state 1601, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 163, "pan.___", state 1601, "else" + line 161, "pan.___", state 1606, "((j<1))" + line 161, "pan.___", state 1606, "((j>=1))" + line 167, "pan.___", state 1612, "(1)" + line 167, "pan.___", state 1613, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 167, "pan.___", state 1613, "else" + line 169, "pan.___", state 1616, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 169, "pan.___", state 1616, "else" + line 201, "pan.___", state 1618, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 201, "pan.___", state 1618, "else" + line 220, "pan.___", state 1619, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 220, "pan.___", state 1619, "else" + line 355, "pan.___", state 1625, "((sighand_exec==1))" + line 355, "pan.___", state 1625, "else" + line 361, "pan.___", state 1628, "sighand_exec = 1" + line 398, "pan.___", state 1641, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 398, "pan.___", state 1643, "(1)" + line 398, "pan.___", state 1644, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 398, "pan.___", state 1644, "else" + line 398, "pan.___", state 1647, "(1)" + line 402, "pan.___", state 1655, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 402, "pan.___", state 1657, "(1)" + line 402, "pan.___", state 1658, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 402, "pan.___", state 1658, "else" + line 402, "pan.___", state 1661, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 402, "pan.___", state 1662, "(1)" + line 400, "pan.___", state 1667, "((i<1))" + line 400, "pan.___", state 1667, "((i>=1))" + line 407, "pan.___", state 1673, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 408, "pan.___", state 1686, "(1)" + line 408, "pan.___", state 1687, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 408, "pan.___", state 1687, "else" + line 408, "pan.___", state 1690, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 408, "pan.___", state 1691, "(1)" + line 412, "pan.___", state 1699, "(1)" + line 412, "pan.___", state 1700, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 412, "pan.___", state 1700, "else" + line 412, "pan.___", state 1703, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 412, "pan.___", state 1704, "(1)" + line 410, "pan.___", state 1709, "((i<1))" + line 410, "pan.___", state 1709, "((i>=1))" + line 417, "pan.___", state 1716, "(1)" + line 417, "pan.___", state 1717, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 417, "pan.___", state 1717, "else" + line 417, "pan.___", state 1720, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 417, "pan.___", state 1721, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 419, "pan.___", state 1724, "(1)" + line 361, "pan.___", state 1733, "sighand_exec = 1" + line 178, "pan.___", state 1758, "(1)" + line 182, "pan.___", state 1769, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 159, "pan.___", state 1779, "(1)" + line 163, "pan.___", state 1787, "(1)" + line 167, "pan.___", state 1799, "(1)" + line 174, "pan.___", state 1810, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_progress_writer.spin.input.trail b/urcu/result-signal-over-writer/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu/result-signal-over-writer/urcu_progress_writer_error.define b/urcu/result-signal-over-writer/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu/result-signal-over-writer/urcu_progress_writer_error.log b/urcu/result-signal-over-writer/urcu_progress_writer_error.log new file mode 100644 index 0000000..cd4e32b --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_writer_error.log @@ -0,0 +1,286 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) +depth 12: Claim reached state 9 (line 748) +depth 28: Claim reached state 9 (line 747) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 10679, errors: 0 + 38555 states, stored (92500 visited) + 1044204 states, matched + 1136704 transitions (= visited+matched) + 3867169 atomic steps +hash conflicts: 6390 (resolved) + +Stats on memory usage (in Megabytes): + 3.089 equivalent memory usage for states (stored*(State-vector + overhead)) + 2.767 actual memory usage for states (compression: 89.58%) + state-vector as stored = 47 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 468.498 total actual memory usage + +unreached in proctype urcu_reader_sig + line 403, "pan.___", state 330, "(1)" + line 614, "pan.___", state 411, "-end-" + (2 of 411 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 59, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 115, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 409, "pan.___", state 160, "(1)" + line 652, "pan.___", state 213, "(1)" + line 175, "pan.___", state 222, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 179, "pan.___", state 233, "(1)" + line 160, "pan.___", state 254, "(1)" + line 164, "pan.___", state 262, "(1)" + line 168, "pan.___", state 274, "(1)" + line 175, "pan.___", state 285, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 753, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 766, "(1)" + line 409, "pan.___", state 767, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 767, "else" + line 409, "pan.___", state 770, "(1)" + line 409, "pan.___", state 771, "(1)" + line 409, "pan.___", state 771, "(1)" + line 413, "pan.___", state 779, "(1)" + line 413, "pan.___", state 780, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 780, "else" + line 413, "pan.___", state 783, "(1)" + line 413, "pan.___", state 784, "(1)" + line 413, "pan.___", state 784, "(1)" + line 411, "pan.___", state 789, "((i<1))" + line 411, "pan.___", state 789, "((i>=1))" + line 418, "pan.___", state 796, "(1)" + line 418, "pan.___", state 797, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 797, "else" + line 418, "pan.___", state 800, "(1)" + line 418, "pan.___", state 801, "(1)" + line 418, "pan.___", state 801, "(1)" + line 420, "pan.___", state 804, "(1)" + line 420, "pan.___", state 804, "(1)" + line 356, "pan.___", state 810, "((sighand_exec==1))" + line 356, "pan.___", state 810, "else" + line 362, "pan.___", state 813, "sighand_exec = 1" + line 399, "pan.___", state 826, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 828, "(1)" + line 399, "pan.___", state 829, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 829, "else" + line 399, "pan.___", state 832, "(1)" + line 403, "pan.___", state 840, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 842, "(1)" + line 403, "pan.___", state 843, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 843, "else" + line 403, "pan.___", state 846, "(1)" + line 403, "pan.___", state 847, "(1)" + line 403, "pan.___", state 847, "(1)" + line 401, "pan.___", state 852, "((i<1))" + line 401, "pan.___", state 852, "((i>=1))" + line 408, "pan.___", state 858, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 871, "(1)" + line 409, "pan.___", state 872, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 872, "else" + line 409, "pan.___", state 875, "(1)" + line 409, "pan.___", state 876, "(1)" + line 409, "pan.___", state 876, "(1)" + line 413, "pan.___", state 884, "(1)" + line 413, "pan.___", state 885, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 885, "else" + line 413, "pan.___", state 888, "(1)" + line 413, "pan.___", state 889, "(1)" + line 413, "pan.___", state 889, "(1)" + line 411, "pan.___", state 894, "((i<1))" + line 411, "pan.___", state 894, "((i>=1))" + line 418, "pan.___", state 901, "(1)" + line 418, "pan.___", state 902, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 902, "else" + line 418, "pan.___", state 905, "(1)" + line 418, "pan.___", state 906, "(1)" + line 418, "pan.___", state 906, "(1)" + line 420, "pan.___", state 909, "(1)" + line 420, "pan.___", state 909, "(1)" + line 362, "pan.___", state 918, "sighand_exec = 1" + line 403, "pan.___", state 949, "(1)" + line 408, "pan.___", state 965, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1008, "(1)" + line 403, "pan.___", state 1046, "(1)" + line 408, "pan.___", state 1062, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1105, "(1)" + line 399, "pan.___", state 1131, "(1)" + line 403, "pan.___", state 1145, "(1)" + line 408, "pan.___", state 1161, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1204, "(1)" + line 403, "pan.___", state 1245, "(1)" + line 408, "pan.___", state 1261, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 418, "pan.___", state 1304, "(1)" + line 399, "pan.___", state 1326, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1328, "(1)" + line 399, "pan.___", state 1329, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1329, "else" + line 399, "pan.___", state 1332, "(1)" + line 403, "pan.___", state 1340, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1342, "(1)" + line 403, "pan.___", state 1343, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1343, "else" + line 403, "pan.___", state 1346, "(1)" + line 403, "pan.___", state 1347, "(1)" + line 403, "pan.___", state 1347, "(1)" + line 401, "pan.___", state 1352, "((i<1))" + line 401, "pan.___", state 1352, "((i>=1))" + line 408, "pan.___", state 1358, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1371, "(1)" + line 409, "pan.___", state 1372, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1372, "else" + line 409, "pan.___", state 1375, "(1)" + line 409, "pan.___", state 1376, "(1)" + line 409, "pan.___", state 1376, "(1)" + line 413, "pan.___", state 1384, "(1)" + line 413, "pan.___", state 1385, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1385, "else" + line 413, "pan.___", state 1388, "(1)" + line 413, "pan.___", state 1389, "(1)" + line 413, "pan.___", state 1389, "(1)" + line 411, "pan.___", state 1394, "((i<1))" + line 411, "pan.___", state 1394, "((i>=1))" + line 418, "pan.___", state 1401, "(1)" + line 418, "pan.___", state 1402, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1402, "else" + line 418, "pan.___", state 1405, "(1)" + line 418, "pan.___", state 1406, "(1)" + line 418, "pan.___", state 1406, "(1)" + line 420, "pan.___", state 1409, "(1)" + line 420, "pan.___", state 1409, "(1)" + line 356, "pan.___", state 1415, "((sighand_exec==1))" + line 356, "pan.___", state 1415, "else" + line 362, "pan.___", state 1418, "sighand_exec = 1" + line 399, "pan.___", state 1431, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<0)))" + line 399, "pan.___", state 1433, "(1)" + line 399, "pan.___", state 1434, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<0)))" + line 399, "pan.___", state 1434, "else" + line 399, "pan.___", state 1437, "(1)" + line 403, "pan.___", state 1445, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<0)))" + line 403, "pan.___", state 1447, "(1)" + line 403, "pan.___", state 1448, "((cache_dirty_urcu_active_readers.bitfield&(1<<0)))" + line 403, "pan.___", state 1448, "else" + line 403, "pan.___", state 1451, "(1)" + line 403, "pan.___", state 1452, "(1)" + line 403, "pan.___", state 1452, "(1)" + line 401, "pan.___", state 1457, "((i<1))" + line 401, "pan.___", state 1457, "((i>=1))" + line 408, "pan.___", state 1463, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 409, "pan.___", state 1476, "(1)" + line 409, "pan.___", state 1477, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<0))))" + line 409, "pan.___", state 1477, "else" + line 409, "pan.___", state 1480, "(1)" + line 409, "pan.___", state 1481, "(1)" + line 409, "pan.___", state 1481, "(1)" + line 413, "pan.___", state 1489, "(1)" + line 413, "pan.___", state 1490, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<0))))" + line 413, "pan.___", state 1490, "else" + line 413, "pan.___", state 1493, "(1)" + line 413, "pan.___", state 1494, "(1)" + line 413, "pan.___", state 1494, "(1)" + line 411, "pan.___", state 1499, "((i<1))" + line 411, "pan.___", state 1499, "((i>=1))" + line 418, "pan.___", state 1506, "(1)" + line 418, "pan.___", state 1507, "(!((cache_dirty_generation_ptr.bitfield&(1<<0))))" + line 418, "pan.___", state 1507, "else" + line 418, "pan.___", state 1510, "(1)" + line 418, "pan.___", state 1511, "(1)" + line 418, "pan.___", state 1511, "(1)" + line 420, "pan.___", state 1514, "(1)" + line 420, "pan.___", state 1514, "(1)" + line 362, "pan.___", state 1523, "sighand_exec = 1" + line 179, "pan.___", state 1548, "(1)" + line 183, "pan.___", state 1559, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<0)))" + line 160, "pan.___", state 1569, "(1)" + line 164, "pan.___", state 1577, "(1)" + line 168, "pan.___", state 1589, "(1)" + line 175, "pan.___", state 1600, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail b/urcu/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..5b0eadd --- /dev/null +++ b/urcu/result-signal-over-writer/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,4231 @@ +-2:3:-2 +-4:-4:-4 +1:0:2965 +2:3:2917 +3:3:2920 +4:3:2920 +5:3:2920 +6:3:2923 +7:3:2931 +8:3:2931 +9:3:2931 +10:3:2934 +11:3:2940 +12:3:2944 +13:3:2944 +14:3:2944 +15:3:2947 +16:3:2955 +17:3:2959 +18:3:2960 +19:0:2965 +20:3:2962 +21:0:2965 +22:2:1151 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+4197:0:2969 +4198:2:2377 +4199:0:2969 +4200:1:12 +4201:0:2969 +4202:2:2378 +4203:0:2969 +4204:2:2379 +4205:2:2383 +4206:2:2384 +4207:2:2392 +4208:2:2393 +4209:2:2397 +4210:2:2398 +4211:2:2406 +4212:2:2411 +4213:2:2415 +4214:2:2416 +4215:2:2423 +4216:2:2424 +4217:2:2435 +4218:2:2443 +4219:2:2444 +4220:2:2448 +4221:2:2453 +4222:2:2454 +4223:0:2969 +4224:2:2466 +4225:0:2969 +4226:2:2467 +4227:0:2969 +4228:1:13 diff --git a/urcu/result-standard-execution-nest/DEFINES b/urcu/result-standard-execution-nest/DEFINES new file mode 100644 index 0000000..150a83c --- /dev/null +++ b/urcu/result-standard-execution-nest/DEFINES @@ -0,0 +1,17 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu/result-standard-execution-nest/Makefile b/urcu/result-standard-execution-nest/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu/result-standard-execution-nest/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu/result-standard-execution-nest/asserts.log b/urcu/result-standard-execution-nest/asserts.log new file mode 100644 index 0000000..51f1ac0 --- /dev/null +++ b/urcu/result-standard-execution-nest/asserts.log @@ -0,0 +1,250 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 +Depth= 3212 States= 1e+06 Transitions= 1.17e+07 Memory= 519.572 t= 7.66 R= 1e+05 +Depth= 3212 States= 2e+06 Transitions= 2.38e+07 Memory= 572.990 t= 16 R= 1e+05 +Depth= 3212 States= 3e+06 Transitions= 3.62e+07 Memory= 626.408 t= 24.9 R= 1e+05 +pan: resizing hashtable to -w22.. done + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 48 byte, depth reached 3212, errors: 0 + 3539988 states, stored + 39085459 states, matched + 42625447 transitions (= stored+matched) +1.5602888e+08 atomic steps +hash conflicts: 28971442 (resolved) + +Stats on memory usage (in Megabytes): + 256.576 equivalent memory usage for states (stored*(State-vector + overhead)) + 196.718 actual memory usage for states (compression: 76.67%) + state-vector as stored = 30 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 686.338 total actual memory usage + +unreached in proctype urcu_reader + line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 61, "(1)" + line 417, ".input.spin", state 91, "(1)" + line 398, ".input.spin", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 151, "(1)" + line 417, ".input.spin", state 181, "(1)" + line 398, ".input.spin", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 242, "(1)" + line 417, ".input.spin", state 272, "(1)" + line 398, ".input.spin", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 360, "(1)" + line 417, ".input.spin", state 390, "(1)" + line 539, ".input.spin", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 59, "(1)" + line 412, ".input.spin", state 72, "(1)" + line 417, ".input.spin", state 89, "(1)" + line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 153, "(1)" + line 412, ".input.spin", state 166, "(1)" + line 651, ".input.spin", state 199, "(1)" + line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 240, "(1)" + line 163, ".input.spin", state 248, "(1)" + line 167, ".input.spin", state 260, "(1)" + line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 927, "(1)" + line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, ".input.spin", state 928, "else" + line 408, ".input.spin", state 931, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 412, ".input.spin", state 940, "(1)" + line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, ".input.spin", state 941, "else" + line 412, ".input.spin", state 944, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 410, ".input.spin", state 950, "((i<1))" + line 410, ".input.spin", state 950, "((i>=1))" + line 417, ".input.spin", state 957, "(1)" + line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, ".input.spin", state 958, "else" + line 417, ".input.spin", state 961, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1040, "(1)" + line 417, ".input.spin", state 1057, "(1)" + line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1130, "(1)" + line 417, ".input.spin", state 1147, "(1)" + line 398, ".input.spin", state 1166, "(1)" + line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1222, "(1)" + line 417, ".input.spin", state 1239, "(1)" + line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1315, "(1)" + line 417, ".input.spin", state 1332, "(1)" + line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 1378, "(1)" + line 163, ".input.spin", state 1386, "(1)" + line 167, ".input.spin", state 1398, "(1)" + line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 1595, "(1)" + line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, ".input.spin", state 1596, "else" + line 408, ".input.spin", state 1599, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 412, ".input.spin", state 1608, "(1)" + line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, ".input.spin", state 1609, "else" + line 412, ".input.spin", state 1612, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 410, ".input.spin", state 1618, "((i<1))" + line 410, ".input.spin", state 1618, "((i>=1))" + line 417, ".input.spin", state 1625, "(1)" + line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, ".input.spin", state 1626, "else" + line 417, ".input.spin", state 1629, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 1681, "(1)" + line 163, ".input.spin", state 1689, "(1)" + line 167, ".input.spin", state 1701, "(1)" + line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/asserts.spin.input.trail b/urcu/result-standard-execution-nest/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu/result-standard-execution-nest/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu/result-standard-execution-nest/urcu.sh b/urcu/result-standard-execution-nest/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu/result-standard-execution-nest/urcu.spin b/urcu/result-standard-execution-nest/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_free.log b/urcu/result-standard-execution-nest/urcu_free.log new file mode 100644 index 0000000..884b15e --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free.log @@ -0,0 +1,262 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) +Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.53 R= 1e+05 +Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.8 R= 1e+05 +Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.5 R= 1e+05 +pan: resizing hashtable to -w22.. done +Depth= 3880 States= 4e+06 Transitions= 4.84e+07 Memory= 741.318 t= 41.1 R= 1e+05 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3880, errors: 0 + 4015564 states, stored + 44539121 states, matched + 48554685 transitions (= stored+matched) +1.7777933e+08 atomic steps +hash conflicts: 33629695 (resolved) + +Stats on memory usage (in Megabytes): + 321.681 equivalent memory usage for states (stored*(State-vector + overhead)) + 252.629 actual memory usage for states (compression: 78.53%) + state-vector as stored = 38 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 742.295 total actual memory usage + +unreached in proctype urcu_reader + line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 61, "(1)" + line 417, "pan.___", state 91, "(1)" + line 398, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 151, "(1)" + line 417, "pan.___", state 181, "(1)" + line 398, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 242, "(1)" + line 417, "pan.___", state 272, "(1)" + line 398, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 360, "(1)" + line 417, "pan.___", state 390, "(1)" + line 539, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 59, "(1)" + line 412, "pan.___", state 72, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 153, "(1)" + line 412, "pan.___", state 166, "(1)" + line 651, "pan.___", state 199, "(1)" + line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 240, "(1)" + line 163, "pan.___", state 248, "(1)" + line 167, "pan.___", state 260, "(1)" + line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 927, "(1)" + line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, "pan.___", state 928, "else" + line 408, "pan.___", state 931, "(1)" + line 408, "pan.___", state 932, "(1)" + line 408, "pan.___", state 932, "(1)" + line 412, "pan.___", state 940, "(1)" + line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, "pan.___", state 941, "else" + line 412, "pan.___", state 944, "(1)" + line 412, "pan.___", state 945, "(1)" + line 412, "pan.___", state 945, "(1)" + line 410, "pan.___", state 950, "((i<1))" + line 410, "pan.___", state 950, "((i>=1))" + line 417, "pan.___", state 957, "(1)" + line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, "pan.___", state 958, "else" + line 417, "pan.___", state 961, "(1)" + line 417, "pan.___", state 962, "(1)" + line 417, "pan.___", state 962, "(1)" + line 419, "pan.___", state 965, "(1)" + line 419, "pan.___", state 965, "(1)" + line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1040, "(1)" + line 417, "pan.___", state 1057, "(1)" + line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1130, "(1)" + line 417, "pan.___", state 1147, "(1)" + line 398, "pan.___", state 1166, "(1)" + line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1222, "(1)" + line 417, "pan.___", state 1239, "(1)" + line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1315, "(1)" + line 417, "pan.___", state 1332, "(1)" + line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1378, "(1)" + line 163, "pan.___", state 1386, "(1)" + line 167, "pan.___", state 1398, "(1)" + line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1595, "(1)" + line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, "pan.___", state 1596, "else" + line 408, "pan.___", state 1599, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 412, "pan.___", state 1608, "(1)" + line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, "pan.___", state 1609, "else" + line 412, "pan.___", state 1612, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 410, "pan.___", state 1618, "((i<1))" + line 410, "pan.___", state 1618, "((i>=1))" + line 417, "pan.___", state 1625, "(1)" + line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, "pan.___", state 1626, "else" + line 417, "pan.___", state 1629, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1681, "(1)" + line 163, "pan.___", state 1689, "(1)" + line 167, "pan.___", state 1701, "(1)" + line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/urcu/result-standard-execution-nest/urcu_free.spin.input b/urcu/result-standard-execution-nest/urcu_free.spin.input new file mode 100644 index 0000000..f2f00e4 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free.spin.input @@ -0,0 +1,722 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_free.spin.input.trail b/urcu/result-standard-execution-nest/urcu_free.spin.input.trail new file mode 100644 index 0000000..837f3d9 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free.spin.input.trail @@ -0,0 +1,15043 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 +25:4:4362 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+15002:0:4365 +15003:2:1754 +15004:0:4365 +15005:3:2428 +15006:0:4365 +15007:2:1755 +15008:2:1759 +15009:2:1760 +15010:2:1768 +15011:2:1769 +15012:2:1773 +15013:2:1774 +15014:2:1768 +15015:2:1769 +15016:2:1773 +15017:2:1774 +15018:2:1782 +15019:2:1787 +15020:2:1791 +15021:2:1792 +15022:2:1799 +15023:2:1800 +15024:2:1811 +15025:2:1812 +15026:2:1813 +15027:2:1811 +15028:2:1812 +15029:2:1813 +15030:2:1824 +15031:2:1829 +15032:2:1830 +15033:0:4365 +15034:2:1842 +15035:0:4365 +15036:3:2427 +15037:0:4365 +15038:2:1844 +15039:0:4363 +15040:3:2428 +15041:0:4369 diff --git a/urcu/result-standard-execution-nest/urcu_free_no_mb.define b/urcu/result-standard-execution-nest/urcu_free_no_mb.define new file mode 100644 index 0000000..136ef67 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu/result-standard-execution-nest/urcu_free_no_mb.log b/urcu/result-standard-execution-nest/urcu_free_no_mb.log new file mode 100644 index 0000000..27a963a --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_mb.log @@ -0,0 +1,267 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +Depth= 11386 States= 1e+06 Transitions= 1.56e+07 Memory= 527.287 t= 12.8 R= 8e+04 +pan: claim violated! (at depth 2146) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 72 byte, depth reached 11386, errors: 1 + 1223588 states, stored + 17987399 states, matched + 19210987 transitions (= stored+matched) + 70012127 atomic steps +hash conflicts: 4173157 (resolved) + +Stats on memory usage (in Megabytes): + 116.690 equivalent memory usage for states (stored*(State-vector + overhead)) + 75.177 actual memory usage for states (compression: 64.42%) + state-vector as stored = 36 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 540.861 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 151, "(1)" + line 419, "pan.___", state 181, "(1)" + line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 242, "(1)" + line 419, "pan.___", state 272, "(1)" + line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 331, "(1)" + line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 360, "(1)" + line 419, "pan.___", state 390, "(1)" + line 541, "pan.___", state 414, "-end-" + (18 of 414 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 421, "pan.___", state 97, "(1)" + line 421, "pan.___", state 97, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 410, "pan.___", state 153, "(1)" + line 414, "pan.___", state 166, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 653, "pan.___", state 199, "(1)" + line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 254, "(1)" + line 414, "pan.___", state 267, "(1)" + line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 345, "(1)" + line 414, "pan.___", state 358, "(1)" + line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 440, "(1)" + line 414, "pan.___", state 453, "(1)" + line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 533, "(1)" + line 414, "pan.___", state 546, "(1)" + line 400, "pan.___", state 582, "(1)" + line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 638, "(1)" + line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 731, "(1)" + line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 821, "(1)" + line 419, "pan.___", state 838, "(1)" + line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 912, "(1)" + line 419, "pan.___", state 929, "(1)" + line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1007, "(1)" + line 419, "pan.___", state 1024, "(1)" + line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1053, "else" + line 400, "pan.___", state 1056, "(1)" + line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1066, "(1)" + line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1067, "else" + line 404, "pan.___", state 1070, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 402, "pan.___", state 1076, "((i<1))" + line 402, "pan.___", state 1076, "((i>=1))" + line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1095, "(1)" + line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1096, "else" + line 410, "pan.___", state 1099, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 414, "pan.___", state 1108, "(1)" + line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1109, "else" + line 414, "pan.___", state 1112, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 412, "pan.___", state 1118, "((i<1))" + line 412, "pan.___", state 1118, "((i>=1))" + line 419, "pan.___", state 1125, "(1)" + line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1126, "else" + line 419, "pan.___", state 1129, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1208, "(1)" + line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1298, "(1)" + line 400, "pan.___", state 1334, "(1)" + line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1390, "(1)" + line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1483, "(1)" + line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1573, "(1)" + line 419, "pan.___", state 1590, "(1)" + line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1664, "(1)" + line 419, "pan.___", state 1681, "(1)" + line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1759, "(1)" + line 419, "pan.___", state 1776, "(1)" + line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1804, "(1)" + line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1805, "else" + line 400, "pan.___", state 1808, "(1)" + line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1818, "(1)" + line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1819, "else" + line 404, "pan.___", state 1822, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 402, "pan.___", state 1828, "((i<1))" + line 402, "pan.___", state 1828, "((i>=1))" + line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1847, "(1)" + line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1848, "else" + line 410, "pan.___", state 1851, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 414, "pan.___", state 1860, "(1)" + line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1861, "else" + line 414, "pan.___", state 1864, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 412, "pan.___", state 1870, "((i<1))" + line 412, "pan.___", state 1870, "((i>=1))" + line 419, "pan.___", state 1877, "(1)" + line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1878, "else" + line 419, "pan.___", state 1881, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1960, "(1)" + line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2051, "(1)" + line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2146, "(1)" + line 703, "pan.___", state 2192, "-end-" + (144 of 2192 states) +unreached in proctype :init: + line 710, "pan.___", state 9, "((j<2))" + line 710, "pan.___", state 9, "((j>=2))" + line 711, "pan.___", state 20, "((j<2))" + line 711, "pan.___", state 20, "((j>=2))" + line 716, "pan.___", state 33, "((j<2))" + line 716, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 750, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 15.9 seconds +pan: rate 77100.693 states/second +pan: avg transition delay 8.2609e-07 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input b/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..927df3f --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input @@ -0,0 +1,724 @@ +#define NO_RMB +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail b/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..04e7425 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2149 @@ +-2:3:-2 +-4:-4:-4 +1:0:2654 +2:3:2606 +3:3:2609 +4:3:2609 +5:3:2612 +6:3:2620 +7:3:2620 +8:3:2623 +9:3:2629 +10:3:2633 +11:3:2633 +12:3:2636 +13:3:2644 +14:3:2648 +15:3:2649 +16:0:2654 +17:3:2651 +18:0:2654 +19:2:416 +20:0:2654 +21:2:422 +22:0:2654 +23:2:423 +24:0:2654 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0000000..73e61a4 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu/result-standard-execution-nest/urcu_free_no_rmb.log b/urcu/result-standard-execution-nest/urcu_free_no_rmb.log new file mode 100644 index 0000000..b7f3b80 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_rmb.log @@ -0,0 +1,266 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +Depth= 5439 States= 1e+06 Transitions= 1.03e+07 Memory= 527.190 t= 8.16 R= 1e+05 +pan: claim violated! (at depth 1801) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 5439, errors: 1 + 1006552 states, stored + 9396280 states, matched + 10402832 transitions (= stored+matched) + 36844262 atomic steps +hash conflicts: 1832712 (resolved) + +Stats on memory usage (in Megabytes): + 80.634 equivalent memory usage for states (stored*(State-vector + overhead)) + 61.871 actual memory usage for states (compression: 76.73%) + state-vector as stored = 36 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 527.580 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 759, "(1)" + line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 760, "else" + line 409, "pan.___", state 763, "(1)" + line 409, "pan.___", state 764, "(1)" + line 409, "pan.___", state 764, "(1)" + line 413, "pan.___", state 772, "(1)" + line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 773, "else" + line 413, "pan.___", state 776, "(1)" + line 413, "pan.___", state 777, "(1)" + line 413, "pan.___", state 777, "(1)" + line 411, "pan.___", state 782, "((i<1))" + line 411, "pan.___", state 782, "((i>=1))" + line 418, "pan.___", state 789, "(1)" + line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 790, "else" + line 418, "pan.___", state 793, "(1)" + line 418, "pan.___", state 794, "(1)" + line 418, "pan.___", state 794, "(1)" + line 420, "pan.___", state 797, "(1)" + line 420, "pan.___", state 797, "(1)" + line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 872, "(1)" + line 418, "pan.___", state 889, "(1)" + line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 962, "(1)" + line 418, "pan.___", state 979, "(1)" + line 399, "pan.___", state 998, "(1)" + line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1054, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1147, "(1)" + line 418, "pan.___", state 1164, "(1)" + line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1343, "(1)" + line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1344, "else" + line 409, "pan.___", state 1347, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 413, "pan.___", state 1356, "(1)" + line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1357, "else" + line 413, "pan.___", state 1360, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 411, "pan.___", state 1366, "((i<1))" + line 411, "pan.___", state 1366, "((i>=1))" + line 418, "pan.___", state 1373, "(1)" + line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1374, "else" + line 418, "pan.___", state 1377, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 8.24 seconds +pan: rate 122154.37 states/second +pan: avg transition delay 7.9209e-07 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input b/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..6dea6e1 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input @@ -0,0 +1,723 @@ +#define NO_RMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail b/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..071a19e --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1804 @@ +-2:3:-2 +-4:-4:-4 +1:0:1982 +2:3:1934 +3:3:1937 +4:3:1937 +5:3:1940 +6:3:1948 +7:3:1948 +8:3:1951 +9:3:1957 +10:3:1961 +11:3:1961 +12:3:1964 +13:3:1972 +14:3:1976 +15:3:1977 +16:0:1982 +17:3:1979 +18:0:1982 +19:2:416 +20:0:1982 +21:2:422 +22:0:1982 +23:2:423 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.input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +pan: claim violated! (at depth 1882) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4174, errors: 1 + 367189 states, stored + 3431533 states, matched + 3798722 transitions (= stored+matched) + 13407384 atomic steps +hash conflicts: 253700 (resolved) + +Stats on memory usage (in Megabytes): + 29.415 equivalent memory usage for states (stored*(State-vector + overhead)) + 22.811 actual memory usage for states (compression: 77.55%) + state-vector as stored = 37 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 488.518 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 331, "(1)" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (18 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 401, "pan.___", state 134, "((i<1))" + line 401, "pan.___", state 134, "((i>=1))" + line 409, "pan.___", state 153, "(1)" + line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 154, "else" + line 409, "pan.___", state 157, "(1)" + line 409, "pan.___", state 158, "(1)" + line 409, "pan.___", state 158, "(1)" + line 413, "pan.___", state 166, "(1)" + line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 167, "else" + line 413, "pan.___", state 170, "(1)" + line 413, "pan.___", state 171, "(1)" + line 413, "pan.___", state 171, "(1)" + line 411, "pan.___", state 176, "((i<1))" + line 411, "pan.___", state 176, "((i>=1))" + line 418, "pan.___", state 183, "(1)" + line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 184, "else" + line 418, "pan.___", state 187, "(1)" + line 418, "pan.___", state 188, "(1)" + line 418, "pan.___", state 188, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 369, "pan.___", state 193, "(1)" + line 652, "pan.___", state 199, "(1)" + line 646, "pan.___", state 202, "((write_lock==0))" + line 646, "pan.___", state 202, "else" + line 644, "pan.___", state 203, "(1)" + line 160, "pan.___", state 209, "(1)" + line 164, "pan.___", state 217, "(1)" + line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 164, "pan.___", state 218, "else" + line 162, "pan.___", state 223, "((j<1))" + line 162, "pan.___", state 223, "((j>=1))" + line 168, "pan.___", state 229, "(1)" + line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 168, "pan.___", state 230, "else" + line 160, "pan.___", state 241, "(1)" + line 168, "pan.___", state 261, "(1)" + line 160, "pan.___", state 277, "(1)" + line 164, "pan.___", state 285, "(1)" + line 168, "pan.___", state 297, "(1)" + line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 356, "(1)" + line 413, "pan.___", state 369, "(1)" + line 418, "pan.___", state 386, "(1)" + line 399, "pan.___", state 405, "(1)" + line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 461, "(1)" + line 418, "pan.___", state 478, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 164, "pan.___", state 594, "(1)" + line 168, "pan.___", state 606, "(1)" + line 160, "pan.___", state 618, "(1)" + line 168, "pan.___", state 638, "(1)" + line 164, "pan.___", state 662, "(1)" + line 168, "pan.___", state 674, "(1)" + line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 698, "(1)" + line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 399, "pan.___", state 699, "else" + line 399, "pan.___", state 702, "(1)" + line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 712, "(1)" + line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 403, "pan.___", state 713, "else" + line 403, "pan.___", state 716, "(1)" + line 403, "pan.___", state 717, "(1)" + line 403, "pan.___", state 717, "(1)" + line 401, "pan.___", state 722, "((i<1))" + line 401, "pan.___", state 722, "((i>=1))" + line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 741, "(1)" + line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 742, "else" + line 409, "pan.___", state 745, "(1)" + line 409, "pan.___", state 746, "(1)" + line 409, "pan.___", state 746, "(1)" + line 413, "pan.___", state 754, "(1)" + line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 755, "else" + line 413, "pan.___", state 758, "(1)" + line 413, "pan.___", state 759, "(1)" + line 413, "pan.___", state 759, "(1)" + line 411, "pan.___", state 764, "((i<1))" + line 411, "pan.___", state 764, "((i>=1))" + line 418, "pan.___", state 771, "(1)" + line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 772, "else" + line 418, "pan.___", state 775, "(1)" + line 418, "pan.___", state 776, "(1)" + line 418, "pan.___", state 776, "(1)" + line 420, "pan.___", state 779, "(1)" + line 420, "pan.___", state 779, "(1)" + line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 854, "(1)" + line 418, "pan.___", state 871, "(1)" + line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 944, "(1)" + line 418, "pan.___", state 961, "(1)" + line 399, "pan.___", state 980, "(1)" + line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1036, "(1)" + line 418, "pan.___", state 1053, "(1)" + line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1129, "(1)" + line 418, "pan.___", state 1146, "(1)" + line 164, "pan.___", state 1169, "(1)" + line 168, "pan.___", state 1181, "(1)" + line 160, "pan.___", state 1193, "(1)" + line 168, "pan.___", state 1213, "(1)" + line 164, "pan.___", state 1237, "(1)" + line 168, "pan.___", state 1249, "(1)" + line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 1273, "(1)" + line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 399, "pan.___", state 1274, "else" + line 399, "pan.___", state 1277, "(1)" + line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 1287, "(1)" + line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 403, "pan.___", state 1288, "else" + line 403, "pan.___", state 1291, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 401, "pan.___", state 1297, "((i<1))" + line 401, "pan.___", state 1297, "((i>=1))" + line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1316, "(1)" + line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1317, "else" + line 409, "pan.___", state 1320, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 413, "pan.___", state 1329, "(1)" + line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1330, "else" + line 413, "pan.___", state 1333, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 411, "pan.___", state 1339, "((i<1))" + line 411, "pan.___", state 1339, "((i>=1))" + line 418, "pan.___", state 1346, "(1)" + line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1347, "else" + line 418, "pan.___", state 1350, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 164, "pan.___", state 1379, "(1)" + line 168, "pan.___", state 1391, "(1)" + line 160, "pan.___", state 1403, "(1)" + line 168, "pan.___", state 1423, "(1)" + line 164, "pan.___", state 1447, "(1)" + line 168, "pan.___", state 1459, "(1)" + line 702, "pan.___", state 1484, "-end-" + (160 of 1484 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 2.96 seconds +pan: rate 124050.34 states/second +pan: avg transition delay 7.7921e-07 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input b/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..f4d8acb --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input @@ -0,0 +1,723 @@ +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail b/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..f73a838 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1885 @@ +-2:3:-2 +-4:-4:-4 +1:0:1946 +2:3:1898 +3:3:1901 +4:3:1901 +5:3:1904 +6:3:1912 +7:3:1912 +8:3:1915 +9:3:1921 +10:3:1925 +11:3:1925 +12:3:1928 +13:3:1936 +14:3:1940 +15:3:1941 +16:0:1946 +17:3:1943 +18:0:1946 +19:2:416 +20:0:1946 +21:2:422 +22:0:1946 +23:2:423 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+1870:0:1946 +1871:2:1882 +1872:0:1946 +1873:2:1883 +1874:0:1946 +1875:2:1886 +1876:0:1946 +1877:2:1891 +1878:0:1946 +1879:1:302 +1880:0:1944 +1881:2:1892 +1882:0:1950 +1883:1:143 diff --git a/urcu/result-standard-execution-nest/urcu_free_single_flip.define b/urcu/result-standard-execution-nest/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu/result-standard-execution-nest/urcu_free_single_flip.log b/urcu/result-standard-execution-nest/urcu_free_single_flip.log new file mode 100644 index 0000000..2a80112 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_single_flip.log @@ -0,0 +1,197 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +pan: claim violated! (at depth 1371) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3387, errors: 1 + 206295 states, stored + 1902753 states, matched + 2109048 transitions (= stored+matched) + 7663223 atomic steps +hash conflicts: 101109 (resolved) + +Stats on memory usage (in Megabytes): + 16.526 equivalent memory usage for states (stored*(State-vector + overhead)) + 13.080 actual memory usage for states (compression: 79.15%) + state-vector as stored = 38 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 478.752 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1013, "(1)" + line 164, "pan.___", state 1021, "(1)" + line 168, "pan.___", state 1033, "(1)" + line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.66 seconds +pan: rate 124274.1 states/second +pan: avg transition delay 7.8708e-07 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input b/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..93aae44 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input @@ -0,0 +1,723 @@ +#define SINGLE_FLIP + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +//#define READER_NEST_LEVEL 1 +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail b/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..73c1400 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1374 @@ +-2:3:-2 +-4:-4:-4 +1:0:1650 +2:3:1602 +3:3:1605 +4:3:1605 +5:3:1608 +6:3:1616 +7:3:1616 +8:3:1619 +9:3:1625 +10:3:1629 +11:3:1629 +12:3:1632 +13:3:1640 +14:3:1644 +15:3:1645 +16:0:1650 +17:3:1647 +18:0:1650 +19:2:416 +20:0:1650 +21:2:422 +22:0:1650 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--git a/urcu/result-standard-execution-nest/urcu_progress_reader.define b/urcu/result-standard-execution-nest/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu/result-standard-execution-nest/urcu_progress_reader.log b/urcu/result-standard-execution-nest/urcu_progress_reader.log new file mode 100644 index 0000000..9e98b9f --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_reader.log @@ -0,0 +1,275 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 1767: Claim reached state 9 (line 748) +Depth= 3880 States= 1e+06 Transitions= 1.71e+07 Memory= 499.651 t= 14.5 R= 7e+04 +Depth= 3880 States= 2e+06 Transitions= 3.79e+07 Memory= 532.365 t= 32.3 R= 6e+04 +Depth= 3880 States= 3e+06 Transitions= 5.83e+07 Memory= 564.983 t= 50.2 R= 6e+04 +pan: resizing hashtable to -w22.. done +Depth= 3880 States= 4e+06 Transitions= 7.76e+07 Memory= 629.307 t= 67 R= 6e+04 +Depth= 3880 States= 5e+06 Transitions= 9.78e+07 Memory= 662.315 t= 84.2 R= 6e+04 +Depth= 3880 States= 6e+06 Transitions= 1.19e+08 Memory= 694.736 t= 102 R= 6e+04 +Depth= 3880 States= 7e+06 Transitions= 1.38e+08 Memory= 727.842 t= 119 R= 6e+04 +Depth= 3880 States= 8e+06 Transitions= 1.59e+08 Memory= 760.752 t= 137 R= 6e+04 +Depth= 3880 States= 9e+06 Transitions= 1.79e+08 Memory= 793.174 t= 155 R= 6e+04 +pan: resizing hashtable to -w24.. done +Depth= 3880 States= 1e+07 Transitions= 1.98e+08 Memory= 950.568 t= 172 R= 6e+04 +Depth= 3880 States= 1.1e+07 Transitions= 2.19e+08 Memory= 983.479 t= 189 R= 6e+04 +Depth= 3880 States= 1.2e+07 Transitions= 2.4e+08 Memory= 1015.901 t= 207 R= 6e+04 +Depth= 3880 States= 1.3e+07 Transitions= 2.58e+08 Memory= 1049.397 t= 223 R= 6e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3880, errors: 0 + 7197860 states, stored (1.33457e+07 visited) +2.5266654e+08 states, matched +2.6601223e+08 transitions (= visited+matched) +9.9067284e+08 atomic steps +hash conflicts: 87783920 (resolved) + +Stats on memory usage (in Megabytes): + 576.611 equivalent memory usage for states (stored*(State-vector + overhead)) + 474.839 actual memory usage for states (compression: 82.35%) + state-vector as stored = 41 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1060.529 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_progress_reader.spin.input.trail b/urcu/result-standard-execution-nest/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..7c42af1 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_reader.spin.input.trail @@ -0,0 +1,1270 @@ +-2:4:-2 +-4:-4:-4 +1:0:4401 +2:4:4353 +3:4:4356 +4:4:4356 +5:4:4359 +6:4:4367 +7:4:4367 +8:4:4370 +9:4:4376 +10:4:4380 +11:4:4380 +12:4:4383 +13:4:4391 +14:4:4395 +15:4:4396 +16:0:4401 +17:4:4398 +18:0:4401 +19:3:2479 +20:0:4401 +21:3:2485 +22:0:4401 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+1257:3:4346 +1258:0:4405 +1259:2:1348 +1260:0:4405 +1261:3:4347 +1262:0:4405 +1263:2:1347 +1264:0:4405 +1265:3:4346 +1266:0:4405 +1267:1:104 diff --git a/urcu/result-standard-execution-nest/urcu_progress_writer.define b/urcu/result-standard-execution-nest/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu/result-standard-execution-nest/urcu_progress_writer.log b/urcu/result-standard-execution-nest/urcu_progress_writer.log new file mode 100644 index 0000000..434151a --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_writer.log @@ -0,0 +1,275 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 291: Claim reached state 9 (line 748) +Depth= 2677 States= 1e+06 Transitions= 1.57e+07 Memory= 487.932 t= 13.4 R= 7e+04 +Depth= 3023 States= 2e+06 Transitions= 3.19e+07 Memory= 509.709 t= 27.3 R= 7e+04 +Depth= 3610 States= 3e+06 Transitions= 4.84e+07 Memory= 531.486 t= 41.6 R= 7e+04 +pan: resizing hashtable to -w22.. done +Depth= 3956 States= 4e+06 Transitions= 6.63e+07 Memory= 595.029 t= 57 R= 7e+04 +Depth= 3956 States= 5e+06 Transitions= 8.67e+07 Memory= 617.783 t= 74.5 R= 7e+04 +Depth= 3956 States= 6e+06 Transitions= 1.08e+08 Memory= 660.850 t= 93 R= 6e+04 +Depth= 3956 States= 7e+06 Transitions= 1.28e+08 Memory= 690.928 t= 110 R= 6e+04 +Depth= 3956 States= 8e+06 Transitions= 1.51e+08 Memory= 729.600 t= 129 R= 6e+04 +Depth= 3956 States= 9e+06 Transitions= 1.7e+08 Memory= 765.830 t= 146 R= 6e+04 +pan: resizing hashtable to -w24.. done +Depth= 3956 States= 1e+07 Transitions= 1.92e+08 Memory= 919.611 t= 166 R= 6e+04 +Depth= 3956 States= 1.1e+07 Transitions= 2.13e+08 Memory= 958.576 t= 183 R= 6e+04 +Depth= 3956 States= 1.2e+07 Transitions= 2.33e+08 Memory= 985.627 t= 201 R= 6e+04 +Depth= 3956 States= 1.3e+07 Transitions= 2.55e+08 Memory= 1027.033 t= 220 R= 6e+04 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3956, errors: 0 + 7045896 states, stored (1.35792e+07 visited) +2.5326206e+08 states, matched +2.668413e+08 transitions (= visited+matched) +9.9425626e+08 atomic steps +hash conflicts: 65494104 (resolved) + +Stats on memory usage (in Megabytes): + 564.437 equivalent memory usage for states (stored*(State-vector + overhead)) + 465.758 actual memory usage for states (compression: 82.52%) + state-vector as stored = 41 byte + 28 byte overhead + 128.000 memory used for hash table (-w24) + 457.764 memory used for DFS stack (-m10000000) + 1051.350 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_progress_writer.spin.input.trail b/urcu/result-standard-execution-nest/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu/result-standard-execution-nest/urcu_progress_writer_error.define b/urcu/result-standard-execution-nest/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu/result-standard-execution-nest/urcu_progress_writer_error.log b/urcu/result-standard-execution-nest/urcu_progress_writer_error.log new file mode 100644 index 0000000..7fafb9e --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_writer_error.log @@ -0,0 +1,514 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +depth 15: Claim reached state 9 (line 750) +depth 291: Claim reached state 9 (line 749) +pan: acceptance cycle (at depth 4308) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 4820, errors: 1 + 62091 states, stored (169917 visited) + 2179326 states, matched + 2349243 transitions (= visited+matched) + 8805349 atomic steps +hash conflicts: 50953 (resolved) + +Stats on memory usage (in Megabytes): + 4.974 equivalent memory usage for states (stored*(State-vector + overhead)) + 4.145 actual memory usage for states (compression: 83.33%) + state-vector as stored = 42 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 469.865 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 151, "(1)" + line 419, "pan.___", state 181, "(1)" + line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 242, "(1)" + line 419, "pan.___", state 272, "(1)" + line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 360, "(1)" + line 419, "pan.___", state 390, "(1)" + line 541, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 402, "pan.___", state 134, "((i<1))" + line 402, "pan.___", state 134, "((i>=1))" + line 410, "pan.___", state 153, "(1)" + line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 154, "else" + line 410, "pan.___", state 157, "(1)" + line 410, "pan.___", state 158, "(1)" + line 410, "pan.___", state 158, "(1)" + line 414, "pan.___", state 166, "(1)" + line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 167, "else" + line 414, "pan.___", state 170, "(1)" + line 414, "pan.___", state 171, "(1)" + line 414, "pan.___", state 171, "(1)" + line 412, "pan.___", state 176, "((i<1))" + line 412, "pan.___", state 176, "((i>=1))" + line 419, "pan.___", state 183, "(1)" + line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 184, "else" + line 419, "pan.___", state 187, "(1)" + line 419, "pan.___", state 188, "(1)" + line 419, "pan.___", state 188, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 370, "pan.___", state 193, "(1)" + line 653, "pan.___", state 199, "(1)" + line 647, "pan.___", state 202, "((write_lock==0))" + line 647, "pan.___", state 202, "else" + line 645, "pan.___", state 203, "(1)" + line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 225, "((j<1))" + line 178, "pan.___", state 225, "((j>=1))" + line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 240, "(1)" + line 165, "pan.___", state 248, "(1)" + line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 165, "pan.___", state 249, "else" + line 163, "pan.___", state 254, "((j<1))" + line 163, "pan.___", state 254, "((j>=1))" + line 169, "pan.___", state 260, "(1)" + line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 169, "pan.___", state 261, "else" + line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 171, "pan.___", state 264, "else" + line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 169, "pan.___", state 323, "(1)" + line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 355, "((j<1))" + line 178, "pan.___", state 355, "((j>=1))" + line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 370, "(1)" + line 165, "pan.___", state 378, "(1)" + line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 165, "pan.___", state 379, "else" + line 163, "pan.___", state 384, "((j<1))" + line 163, "pan.___", state 384, "((j>=1))" + line 169, "pan.___", state 390, "(1)" + line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 169, "pan.___", state 391, "else" + line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 171, "pan.___", state 394, "else" + line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 410, "(1)" + line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 424, "(1)" + line 404, "pan.___", state 425, "(1)" + line 404, "pan.___", state 425, "(1)" + line 402, "pan.___", state 430, "((i<1))" + line 402, "pan.___", state 430, "((i>=1))" + line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 449, "(1)" + line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 450, "else" + line 410, "pan.___", state 453, "(1)" + line 410, "pan.___", state 454, "(1)" + line 410, "pan.___", state 454, "(1)" + line 414, "pan.___", state 462, "(1)" + line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 463, "else" + line 414, "pan.___", state 466, "(1)" + line 414, "pan.___", state 467, "(1)" + line 414, "pan.___", state 467, "(1)" + line 412, "pan.___", state 472, "((i<1))" + line 412, "pan.___", state 472, "((i>=1))" + line 419, "pan.___", state 479, "(1)" + line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 480, "else" + line 419, "pan.___", state 483, "(1)" + line 419, "pan.___", state 484, "(1)" + line 419, "pan.___", state 484, "(1)" + line 421, "pan.___", state 487, "(1)" + line 421, "pan.___", state 487, "(1)" + line 370, "pan.___", state 489, "(1)" + line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[_pid] = (tmp^(1<<7))" + line 400, "pan.___", state 498, "(1)" + line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 499, "else" + line 400, "pan.___", state 502, "(1)" + line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 516, "(1)" + line 404, "pan.___", state 517, "(1)" + line 404, "pan.___", state 517, "(1)" + line 402, "pan.___", state 522, "((i<1))" + line 402, "pan.___", state 522, "((i>=1))" + line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 541, "(1)" + line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 542, "else" + line 410, "pan.___", state 545, "(1)" + line 410, "pan.___", state 546, "(1)" + line 410, "pan.___", state 546, "(1)" + line 414, "pan.___", state 554, "(1)" + line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 555, "else" + line 414, "pan.___", state 558, "(1)" + line 414, "pan.___", state 559, "(1)" + line 414, "pan.___", state 559, "(1)" + line 412, "pan.___", state 564, "((i<1))" + line 412, "pan.___", state 564, "((i>=1))" + line 419, "pan.___", state 571, "(1)" + line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 572, "else" + line 419, "pan.___", state 575, "(1)" + line 419, "pan.___", state 576, "(1)" + line 419, "pan.___", state 576, "(1)" + line 421, "pan.___", state 579, "(1)" + line 421, "pan.___", state 579, "(1)" + line 370, "pan.___", state 581, "(1)" + line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 595, "(1)" + line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 609, "(1)" + line 404, "pan.___", state 610, "(1)" + line 404, "pan.___", state 610, "(1)" + line 402, "pan.___", state 615, "((i<1))" + line 402, "pan.___", state 615, "((i>=1))" + line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 634, "(1)" + line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 635, "else" + line 410, "pan.___", state 638, "(1)" + line 410, "pan.___", state 639, "(1)" + line 410, "pan.___", state 639, "(1)" + line 414, "pan.___", state 647, "(1)" + line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 648, "else" + line 414, "pan.___", state 651, "(1)" + line 414, "pan.___", state 652, "(1)" + line 414, "pan.___", state 652, "(1)" + line 412, "pan.___", state 657, "((i<1))" + line 412, "pan.___", state 657, "((i>=1))" + line 419, "pan.___", state 664, "(1)" + line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 665, "else" + line 419, "pan.___", state 668, "(1)" + line 419, "pan.___", state 669, "(1)" + line 419, "pan.___", state 669, "(1)" + line 421, "pan.___", state 672, "(1)" + line 421, "pan.___", state 672, "(1)" + line 370, "pan.___", state 674, "(1)" + line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 681, "(1)" + line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 682, "else" + line 400, "pan.___", state 685, "(1)" + line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 695, "(1)" + line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 696, "else" + line 404, "pan.___", state 699, "(1)" + line 404, "pan.___", state 700, "(1)" + line 404, "pan.___", state 700, "(1)" + line 402, "pan.___", state 705, "((i<1))" + line 402, "pan.___", state 705, "((i>=1))" + line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 724, "(1)" + line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 725, "else" + line 410, "pan.___", state 728, "(1)" + line 410, "pan.___", state 729, "(1)" + line 410, "pan.___", state 729, "(1)" + line 414, "pan.___", state 737, "(1)" + line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 738, "else" + line 414, "pan.___", state 741, "(1)" + line 414, "pan.___", state 742, "(1)" + line 414, "pan.___", state 742, "(1)" + line 412, "pan.___", state 747, "((i<1))" + line 412, "pan.___", state 747, "((i>=1))" + line 419, "pan.___", state 754, "(1)" + line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 755, "else" + line 419, "pan.___", state 758, "(1)" + line 419, "pan.___", state 759, "(1)" + line 419, "pan.___", state 759, "(1)" + line 421, "pan.___", state 762, "(1)" + line 421, "pan.___", state 762, "(1)" + line 370, "pan.___", state 764, "(1)" + line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[_pid])&(1<<7))))" + line 430, "pan.___", state 767, "else" + line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 779, "(1)" + line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 780, "else" + line 400, "pan.___", state 783, "(1)" + line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 793, "(1)" + line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 794, "else" + line 404, "pan.___", state 797, "(1)" + line 404, "pan.___", state 798, "(1)" + line 404, "pan.___", state 798, "(1)" + line 402, "pan.___", state 803, "((i<1))" + line 402, "pan.___", state 803, "((i>=1))" + line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 822, "(1)" + line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 823, "else" + line 410, "pan.___", state 826, "(1)" + line 410, "pan.___", state 827, "(1)" + line 410, "pan.___", state 827, "(1)" + line 414, "pan.___", state 835, "(1)" + line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 836, "else" + line 414, "pan.___", state 839, "(1)" + line 414, "pan.___", state 840, "(1)" + line 414, "pan.___", state 840, "(1)" + line 412, "pan.___", state 845, "((i<1))" + line 412, "pan.___", state 845, "((i>=1))" + line 419, "pan.___", state 852, "(1)" + line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 853, "else" + line 419, "pan.___", state 856, "(1)" + line 419, "pan.___", state 857, "(1)" + line 419, "pan.___", state 857, "(1)" + line 421, "pan.___", state 860, "(1)" + line 421, "pan.___", state 860, "(1)" + line 370, "pan.___", state 862, "(1)" + line 449, "pan.___", state 870, "((tmp<1))" + line 449, "pan.___", state 870, "((tmp>=1))" + line 462, "pan.___", state 873, "tmp = 0" + line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 883, "(1)" + line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 897, "(1)" + line 404, "pan.___", state 898, "(1)" + line 404, "pan.___", state 898, "(1)" + line 402, "pan.___", state 903, "((i<1))" + line 402, "pan.___", state 903, "((i>=1))" + line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 922, "(1)" + line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 923, "else" + line 410, "pan.___", state 926, "(1)" + line 410, "pan.___", state 927, "(1)" + line 410, "pan.___", state 927, "(1)" + line 414, "pan.___", state 935, "(1)" + line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 936, "else" + line 414, "pan.___", state 939, "(1)" + line 414, "pan.___", state 940, "(1)" + line 414, "pan.___", state 940, "(1)" + line 412, "pan.___", state 945, "((i<1))" + line 412, "pan.___", state 945, "((i>=1))" + line 419, "pan.___", state 952, "(1)" + line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 953, "else" + line 419, "pan.___", state 956, "(1)" + line 419, "pan.___", state 957, "(1)" + line 419, "pan.___", state 957, "(1)" + line 421, "pan.___", state 960, "(1)" + line 421, "pan.___", state 960, "(1)" + line 370, "pan.___", state 962, "(1)" + line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[_pid]" + line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 973, "(1)" + line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 987, "(1)" + line 404, "pan.___", state 988, "(1)" + line 404, "pan.___", state 988, "(1)" + line 402, "pan.___", state 993, "((i<1))" + line 402, "pan.___", state 993, "((i>=1))" + line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1012, "(1)" + line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1013, "else" + line 410, "pan.___", state 1016, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 414, "pan.___", state 1025, "(1)" + line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1026, "else" + line 414, "pan.___", state 1029, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 412, "pan.___", state 1035, "((i<1))" + line 412, "pan.___", state 1035, "((i>=1))" + line 419, "pan.___", state 1042, "(1)" + line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1043, "else" + line 419, "pan.___", state 1046, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 370, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1061, "(1)" + line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1117, "(1)" + line 419, "pan.___", state 1134, "(1)" + line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1210, "(1)" + line 419, "pan.___", state 1227, "(1)" + line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1287, "(1)" + line 414, "pan.___", state 1300, "(1)" + line 419, "pan.___", state 1317, "(1)" + line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1342, "(1)" + line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1343, "else" + line 400, "pan.___", state 1346, "(1)" + line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1356, "(1)" + line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1357, "else" + line 404, "pan.___", state 1360, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 402, "pan.___", state 1366, "((i<1))" + line 402, "pan.___", state 1366, "((i>=1))" + line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1385, "(1)" + line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1386, "else" + line 410, "pan.___", state 1389, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 414, "pan.___", state 1398, "(1)" + line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1399, "else" + line 414, "pan.___", state 1402, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 412, "pan.___", state 1408, "((i<1))" + line 412, "pan.___", state 1408, "((i>=1))" + line 419, "pan.___", state 1415, "(1)" + line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1416, "else" + line 419, "pan.___", state 1419, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 1471, "(1)" + line 165, "pan.___", state 1479, "(1)" + line 169, "pan.___", state 1491, "(1)" + line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail b/urcu/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..5bb8316 --- /dev/null +++ b/urcu/result-standard-execution-nest/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,4823 @@ +-2:3:-2 +-4:-4:-4 +1:0:2108 +2:3:2060 +3:3:2063 +4:3:2063 +5:3:2066 +6:3:2074 +7:3:2074 +8:3:2077 +9:3:2083 +10:3:2087 +11:3:2087 +12:3:2090 +13:3:2098 +14:3:2102 +15:3:2103 +16:0:2108 +17:3:2105 +18:0:2108 +19:2:416 +20:0:2108 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+4811:1:48 +4812:1:49 +4813:1:56 +4814:1:57 +4815:1:68 +4816:1:69 +4817:1:70 +4818:1:81 +4819:1:86 +4820:1:87 diff --git a/urcu/result-standard-execution-nonest/DEFINES b/urcu/result-standard-execution-nonest/DEFINES new file mode 100644 index 0000000..5d5147e --- /dev/null +++ b/urcu/result-standard-execution-nonest/DEFINES @@ -0,0 +1,17 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS diff --git a/urcu/result-standard-execution-nonest/Makefile b/urcu/result-standard-execution-nonest/Makefile new file mode 100644 index 0000000..8af320d --- /dev/null +++ b/urcu/result-standard-execution-nonest/Makefile @@ -0,0 +1,172 @@ +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) Mathieu Desnoyers, 2009 +# +# Authors: Mathieu Desnoyers + +#CFLAGS=-DSAFETY +#for multi-core verif, 15.5GB shared mem, use files if full +#CFLAGS=-DHASH64 -DMEMLIM=15500 -DNCORE=2 +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 -DMEMLIM=15500 -DNCORE=8 + +#liveness +#CFLAGS=-DHASH64 -DCOLLAPSE -DMA=88 +CFLAGS=-DHASH64 + +SPINFILE=urcu.spin + +default: + make urcu_free | tee urcu_free.log + #nested useless with signal test. + #make urcu_free_nested | tee urcu_free_nested.log + make urcu_free_no_rmb | tee urcu_free_no_rmb.log + make urcu_free_no_wmb | tee urcu_free_no_wmb.log + make urcu_free_no_mb | tee urcu_free_no_mb.log + make urcu_free_single_flip | tee urcu_free_single_flip.log + make urcu_progress_writer | tee urcu_progress_writer.log + make urcu_progress_reader | tee urcu_progress_reader.log + make urcu_progress_writer_error | tee urcu_progress_writer_error.log + make asserts | tee asserts.log + make summary + +#show trail : spin -v -t -N pan.ltl input.spin +# after each individual make. + +summary: + @echo + @echo "Verification summary" + @grep errors: *.log + +asserts: clean + cat DEFINES > .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X .input.spin + gcc -O2 -w ${CFLAGS} -DSAFETY -o pan pan.c + ./pan -v -c1 -X -m10000000 -w20 + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free: clean urcu_free_ltl run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested: clean urcu_free_ltl urcu_free_nested_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_nested_define: + cp urcu_free_nested.define .input.define + +urcu_free_no_rmb: clean urcu_free_ltl urcu_free_no_rmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_rmb_define: + cp urcu_free_no_rmb.define .input.define + +urcu_free_no_wmb: clean urcu_free_ltl urcu_free_no_wmb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_wmb_define: + cp urcu_free_no_wmb.define .input.define + +urcu_free_no_mb: clean urcu_free_ltl urcu_free_no_mb_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_no_mb_define: + cp urcu_free_no_mb.define .input.define + +urcu_free_single_flip: clean urcu_free_ltl urcu_free_single_flip_define run + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_free_single_flip_define: + cp urcu_free_single_flip.define .input.define + +urcu_free_ltl: + touch .input.define + cat .input.define >> pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl + +# Progress checks + +urcu_progress_writer: clean urcu_progress_writer_ltl \ + urcu_progress_writer_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_define: + cp urcu_progress_writer.define .input.define + +urcu_progress_writer_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_reader: clean urcu_progress_reader_ltl \ + urcu_progress_reader_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_reader_define: + cp urcu_progress_reader.define .input.define + +urcu_progress_reader_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + +urcu_progress_writer_error: clean urcu_progress_writer_error_ltl \ + urcu_progress_writer_error_define run_weak_fair + cp .input.spin $@.spin.input + -cp .input.spin.trail $@.spin.input.trail + +urcu_progress_writer_error_define: + cp urcu_progress_writer_error.define .input.define + +urcu_progress_writer_error_ltl: + touch .input.define + cat .input.define > pan.ltl + cat DEFINES >> pan.ltl + spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl + + +run_weak_fair: pan + ./pan -a -f -v -c1 -X -m10000000 -w20 + +run: pan + ./pan -a -v -c1 -X -m10000000 -w20 + +pan: pan.c + gcc -O2 -w ${CFLAGS} -o pan pan.c + +pan.c: pan.ltl ${SPINFILE} + cat .input.define > .input.spin + cat DEFINES >> .input.spin + cat ${SPINFILE} >> .input.spin + rm -f .input.spin.trail + spin -a -X -N pan.ltl .input.spin + +.PHONY: clean default distclean summary +clean: + rm -f pan* trail.out .input.spin* *.spin.trail .input.define +distclean: + rm -f *.trail *.input *.log diff --git a/urcu/result-standard-execution-nonest/asserts.log b/urcu/result-standard-execution-nonest/asserts.log new file mode 100644 index 0000000..1071a7a --- /dev/null +++ b/urcu/result-standard-execution-nonest/asserts.log @@ -0,0 +1,246 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +cat DEFINES > .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w20 + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim - (none specified) + assertion violations + + cycle checks - (disabled by -DSAFETY) + invalid end states + + +State-vector 48 byte, depth reached 2084, errors: 0 + 847558 states, stored + 9221089 states, matched + 10068647 transitions (= stored+matched) + 36786866 atomic steps +hash conflicts: 2126850 (resolved) + +Stats on memory usage (in Megabytes): + 61.430 equivalent memory usage for states (stored*(State-vector + overhead)) + 45.632 actual memory usage for states (compression: 74.28%) + state-vector as stored = 28 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 511.369 total actual memory usage + +unreached in proctype urcu_reader + line 398, ".input.spin", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 61, "(1)" + line 417, ".input.spin", state 91, "(1)" + line 398, ".input.spin", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 151, "(1)" + line 417, ".input.spin", state 181, "(1)" + line 398, ".input.spin", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 242, "(1)" + line 417, ".input.spin", state 272, "(1)" + line 398, ".input.spin", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 360, "(1)" + line 417, ".input.spin", state 390, "(1)" + line 539, ".input.spin", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 398, ".input.spin", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, ".input.spin", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 59, "(1)" + line 412, ".input.spin", state 72, "(1)" + line 417, ".input.spin", state 89, "(1)" + line 398, ".input.spin", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, ".input.spin", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 153, "(1)" + line 412, ".input.spin", state 166, "(1)" + line 651, ".input.spin", state 199, "(1)" + line 174, ".input.spin", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 178, ".input.spin", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 240, "(1)" + line 163, ".input.spin", state 248, "(1)" + line 167, ".input.spin", state 260, "(1)" + line 174, ".input.spin", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, ".input.spin", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 927, "(1)" + line 408, ".input.spin", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, ".input.spin", state 928, "else" + line 408, ".input.spin", state 931, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 408, ".input.spin", state 932, "(1)" + line 412, ".input.spin", state 940, "(1)" + line 412, ".input.spin", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, ".input.spin", state 941, "else" + line 412, ".input.spin", state 944, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 412, ".input.spin", state 945, "(1)" + line 410, ".input.spin", state 950, "((i<1))" + line 410, ".input.spin", state 950, "((i>=1))" + line 417, ".input.spin", state 957, "(1)" + line 417, ".input.spin", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, ".input.spin", state 958, "else" + line 417, ".input.spin", state 961, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 417, ".input.spin", state 962, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 419, ".input.spin", state 965, "(1)" + line 402, ".input.spin", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1040, "(1)" + line 417, ".input.spin", state 1057, "(1)" + line 402, ".input.spin", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1130, "(1)" + line 417, ".input.spin", state 1147, "(1)" + line 398, ".input.spin", state 1166, "(1)" + line 402, ".input.spin", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1222, "(1)" + line 417, ".input.spin", state 1239, "(1)" + line 402, ".input.spin", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, ".input.spin", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, ".input.spin", state 1315, "(1)" + line 417, ".input.spin", state 1332, "(1)" + line 178, ".input.spin", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, ".input.spin", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 1378, "(1)" + line 163, ".input.spin", state 1386, "(1)" + line 167, ".input.spin", state 1398, "(1)" + line 174, ".input.spin", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, ".input.spin", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, ".input.spin", state 1595, "(1)" + line 408, ".input.spin", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, ".input.spin", state 1596, "else" + line 408, ".input.spin", state 1599, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 408, ".input.spin", state 1600, "(1)" + line 412, ".input.spin", state 1608, "(1)" + line 412, ".input.spin", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, ".input.spin", state 1609, "else" + line 412, ".input.spin", state 1612, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 412, ".input.spin", state 1613, "(1)" + line 410, ".input.spin", state 1618, "((i<1))" + line 410, ".input.spin", state 1618, "((i>=1))" + line 417, ".input.spin", state 1625, "(1)" + line 417, ".input.spin", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, ".input.spin", state 1626, "else" + line 417, ".input.spin", state 1629, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 417, ".input.spin", state 1630, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 419, ".input.spin", state 1633, "(1)" + line 178, ".input.spin", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, ".input.spin", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, ".input.spin", state 1681, "(1)" + line 163, ".input.spin", state 1689, "(1)" + line 167, ".input.spin", state 1701, "(1)" + line 174, ".input.spin", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/asserts.spin.input.trail b/urcu/result-standard-execution-nonest/asserts.spin.input.trail new file mode 100644 index 0000000..287e52a --- /dev/null +++ b/urcu/result-standard-execution-nonest/asserts.spin.input.trail @@ -0,0 +1,6 @@ +-4:-4:-4 +1:0:2673 +2:0:2674 +3:0:2675 +4:0:2676 +5:4:1129 diff --git a/urcu/result-standard-execution-nonest/references.txt b/urcu/result-standard-execution-nonest/references.txt new file mode 100644 index 0000000..72c67a2 --- /dev/null +++ b/urcu/result-standard-execution-nonest/references.txt @@ -0,0 +1,13 @@ +http://spinroot.com/spin/Man/ltl.html +http://en.wikipedia.org/wiki/Linear_temporal_logic +http://www.dcs.gla.ac.uk/~muffy/MRS4-2002/lect11.ppt + +http://www.lsv.ens-cachan.fr/~gastin/ltl2ba/index.php +http://spinroot.com/spin/Man/index.html +http://spinroot.com/spin/Man/promela.html + +LTL vs CTL : + +http://spinroot.com/spin/Doc/course/lecture12.pdf p. 9, p. 15, p. 18 +http://www-i2.informatik.rwth-aachen.de/i2/fileadmin/user_upload/documents/Introduction_to_Model_Checking/mc_lec18.pdf + (downloaded) diff --git a/urcu/result-standard-execution-nonest/urcu.sh b/urcu/result-standard-execution-nonest/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu/result-standard-execution-nonest/urcu.spin b/urcu/result-standard-execution-nonest/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_free.log b/urcu/result-standard-execution-nonest/urcu_free.log new file mode 100644 index 0000000..00b1f6c --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free.log @@ -0,0 +1,257 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 743) + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 2560, errors: 0 + 954166 states, stored + 10460008 states, matched + 11414174 transitions (= stored+matched) + 41707752 atomic steps +hash conflicts: 2907736 (resolved) + +Stats on memory usage (in Megabytes): + 76.437 equivalent memory usage for states (stored*(State-vector + overhead)) + 58.605 actual memory usage for states (compression: 76.67%) + state-vector as stored = 36 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 524.358 total actual memory usage + +unreached in proctype urcu_reader + line 398, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 61, "(1)" + line 417, "pan.___", state 91, "(1)" + line 398, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 151, "(1)" + line 417, "pan.___", state 181, "(1)" + line 398, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 242, "(1)" + line 417, "pan.___", state 272, "(1)" + line 398, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 360, "(1)" + line 417, "pan.___", state 390, "(1)" + line 539, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 398, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 59, "(1)" + line 412, "pan.___", state 72, "(1)" + line 417, "pan.___", state 89, "(1)" + line 398, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 402, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 153, "(1)" + line 412, "pan.___", state 166, "(1)" + line 651, "pan.___", state 199, "(1)" + line 174, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 240, "(1)" + line 163, "pan.___", state 248, "(1)" + line 167, "pan.___", state 260, "(1)" + line 174, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 927, "(1)" + line 408, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, "pan.___", state 928, "else" + line 408, "pan.___", state 931, "(1)" + line 408, "pan.___", state 932, "(1)" + line 408, "pan.___", state 932, "(1)" + line 412, "pan.___", state 940, "(1)" + line 412, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, "pan.___", state 941, "else" + line 412, "pan.___", state 944, "(1)" + line 412, "pan.___", state 945, "(1)" + line 412, "pan.___", state 945, "(1)" + line 410, "pan.___", state 950, "((i<1))" + line 410, "pan.___", state 950, "((i>=1))" + line 417, "pan.___", state 957, "(1)" + line 417, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, "pan.___", state 958, "else" + line 417, "pan.___", state 961, "(1)" + line 417, "pan.___", state 962, "(1)" + line 417, "pan.___", state 962, "(1)" + line 419, "pan.___", state 965, "(1)" + line 419, "pan.___", state 965, "(1)" + line 402, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1040, "(1)" + line 417, "pan.___", state 1057, "(1)" + line 402, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1130, "(1)" + line 417, "pan.___", state 1147, "(1)" + line 398, "pan.___", state 1166, "(1)" + line 402, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1222, "(1)" + line 417, "pan.___", state 1239, "(1)" + line 402, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 407, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 412, "pan.___", state 1315, "(1)" + line 417, "pan.___", state 1332, "(1)" + line 178, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1378, "(1)" + line 163, "pan.___", state 1386, "(1)" + line 167, "pan.___", state 1398, "(1)" + line 174, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 407, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1595, "(1)" + line 408, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 408, "pan.___", state 1596, "else" + line 408, "pan.___", state 1599, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 408, "pan.___", state 1600, "(1)" + line 412, "pan.___", state 1608, "(1)" + line 412, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 412, "pan.___", state 1609, "else" + line 412, "pan.___", state 1612, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 412, "pan.___", state 1613, "(1)" + line 410, "pan.___", state 1618, "((i<1))" + line 410, "pan.___", state 1618, "((i>=1))" + line 417, "pan.___", state 1625, "(1)" + line 417, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 417, "pan.___", state 1626, "else" + line 417, "pan.___", state 1629, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 417, "pan.___", state 1630, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 419, "pan.___", state 1633, "(1)" + line 178, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 182, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 159, "pan.___", state 1681, "(1)" + line 163, "pan.___", state 1689, "(1)" + line 167, "pan.___", state 1701, "(1)" + line 174, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< !read_free_race) diff --git a/urcu/result-standard-execution-nonest/urcu_free.spin.input b/urcu/result-standard-execution-nonest/urcu_free.spin.input new file mode 100644 index 0000000..e17e80e --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free.spin.input @@ -0,0 +1,722 @@ + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_free.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_free.spin.input.trail new file mode 100644 index 0000000..837f3d9 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free.spin.input.trail @@ -0,0 +1,15043 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 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b/urcu/result-standard-execution-nonest/urcu_free_nested.log new file mode 100644 index 0000000..d503334 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_nested.log @@ -0,0 +1,20 @@ +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_nested.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 742) +Depth= 3880 States= 1e+06 Transitions= 1.18e+07 Memory= 527.190 t= 9.48 R= 1e+05 +Depth= 3880 States= 2e+06 Transitions= 2.39e+07 Memory= 588.225 t= 19.6 R= 1e+05 +Depth= 3880 States= 3e+06 Transitions= 3.61e+07 Memory= 649.260 t= 30.3 R= 1e+05 diff --git a/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input b/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input new file mode 100644 index 0000000..c94928c --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input @@ -0,0 +1,696 @@ +#define READER_NEST_LEVEL 1 + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +#define TEST_SIGNAL +#define TEST_SIGNAL_ON_READ + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE +#define get_pid() ((_pid < 1) -> 0 : 1) +#elif defined(TEST_SIGNAL_ON_READ) +#define get_pid() ((_pid < 2) -> 0 : 1) +#else +#define get_pid() (_pid) +#endif + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb(i, j) +{ + if + :: get_pid() >= NR_READERS -> + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); + :: else -> skip; + fi; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +#define get_readerid() (get_pid()) +#define get_writerid() (get_readerid() + NR_READERS) + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + dispatch_sighand_read_exec(); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 1; + ooo_mem(i); + dispatch_sighand_read_exec(); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + ooo_mem(i); + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + ooo_mem(i); + data_access[get_readerid()] = 1; + ooo_mem(i); + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS + /* Only test progress of one random reader. They are all the + * same. */ + if + :: get_readerid() == 0 -> +progress_reader: + skip; + fi; +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input.trail new file mode 100644 index 0000000..6f29ad2 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_nested.spin.input.trail @@ -0,0 +1,11161 @@ +-2:4:-2 +-4:-4:-4 +1:0:4365 +2:4:4317 +3:4:4320 +4:4:4320 +5:4:4320 +6:4:4323 +7:4:4331 +8:4:4331 +9:4:4331 +10:4:4334 +11:4:4340 +12:4:4344 +13:4:4344 +14:4:4344 +15:4:4347 +16:4:4340 +17:4:4344 +18:4:4344 +19:4:4344 +20:4:4347 +21:4:4355 +22:4:4359 +23:4:4360 +24:0:4365 +25:4:4362 +26:0:4365 +27:3:2331 +28:0:4365 +29:3:2337 +30:0:4365 +31:3:2338 +32:0:4365 +33:3:2339 +34:3:2343 +35:3:2344 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b/urcu/result-standard-execution-nonest/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_mb.log b/urcu/result-standard-execution-nonest/urcu_free_no_mb.log new file mode 100644 index 0000000..c420e43 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_mb.log @@ -0,0 +1,266 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_mb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +pan: claim violated! (at depth 2071) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 72 byte, depth reached 5140, errors: 1 + 264561 states, stored + 3902374 states, matched + 4166935 transitions (= stored+matched) + 15172302 atomic steps +hash conflicts: 196282 (resolved) + +Stats on memory usage (in Megabytes): + 25.231 equivalent memory usage for states (stored*(State-vector + overhead)) + 16.681 actual memory usage for states (compression: 66.12%) + state-vector as stored = 38 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 482.365 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 151, "(1)" + line 419, "pan.___", state 181, "(1)" + line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 242, "(1)" + line 419, "pan.___", state 272, "(1)" + line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 331, "(1)" + line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 360, "(1)" + line 419, "pan.___", state 390, "(1)" + line 541, "pan.___", state 414, "-end-" + (18 of 414 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 421, "pan.___", state 97, "(1)" + line 421, "pan.___", state 97, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 410, "pan.___", state 153, "(1)" + line 414, "pan.___", state 166, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 653, "pan.___", state 199, "(1)" + line 400, "pan.___", state 209, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 223, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 254, "(1)" + line 414, "pan.___", state 267, "(1)" + line 400, "pan.___", state 300, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 314, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 345, "(1)" + line 414, "pan.___", state 358, "(1)" + line 400, "pan.___", state 395, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 409, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 440, "(1)" + line 414, "pan.___", state 453, "(1)" + line 400, "pan.___", state 488, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 502, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 533, "(1)" + line 414, "pan.___", state 546, "(1)" + line 400, "pan.___", state 582, "(1)" + line 404, "pan.___", state 594, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 638, "(1)" + line 404, "pan.___", state 687, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 731, "(1)" + line 404, "pan.___", state 777, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 795, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 821, "(1)" + line 419, "pan.___", state 838, "(1)" + line 404, "pan.___", state 868, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 886, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 912, "(1)" + line 419, "pan.___", state 929, "(1)" + line 404, "pan.___", state 963, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 981, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1007, "(1)" + line 419, "pan.___", state 1024, "(1)" + line 400, "pan.___", state 1050, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1053, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1053, "else" + line 400, "pan.___", state 1056, "(1)" + line 404, "pan.___", state 1064, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1066, "(1)" + line 404, "pan.___", state 1067, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1067, "else" + line 404, "pan.___", state 1070, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 404, "pan.___", state 1071, "(1)" + line 402, "pan.___", state 1076, "((i<1))" + line 402, "pan.___", state 1076, "((i>=1))" + line 409, "pan.___", state 1082, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1095, "(1)" + line 410, "pan.___", state 1096, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1096, "else" + line 410, "pan.___", state 1099, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 410, "pan.___", state 1100, "(1)" + line 414, "pan.___", state 1108, "(1)" + line 414, "pan.___", state 1109, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1109, "else" + line 414, "pan.___", state 1112, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 414, "pan.___", state 1113, "(1)" + line 412, "pan.___", state 1118, "((i<1))" + line 412, "pan.___", state 1118, "((i>=1))" + line 419, "pan.___", state 1125, "(1)" + line 419, "pan.___", state 1126, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1126, "else" + line 419, "pan.___", state 1129, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 419, "pan.___", state 1130, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 421, "pan.___", state 1133, "(1)" + line 404, "pan.___", state 1164, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1208, "(1)" + line 404, "pan.___", state 1254, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1298, "(1)" + line 400, "pan.___", state 1334, "(1)" + line 404, "pan.___", state 1346, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1390, "(1)" + line 404, "pan.___", state 1439, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1483, "(1)" + line 404, "pan.___", state 1529, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1547, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1573, "(1)" + line 419, "pan.___", state 1590, "(1)" + line 404, "pan.___", state 1620, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1638, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1664, "(1)" + line 419, "pan.___", state 1681, "(1)" + line 404, "pan.___", state 1715, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1733, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1759, "(1)" + line 419, "pan.___", state 1776, "(1)" + line 400, "pan.___", state 1802, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1804, "(1)" + line 400, "pan.___", state 1805, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1805, "else" + line 400, "pan.___", state 1808, "(1)" + line 404, "pan.___", state 1816, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1818, "(1)" + line 404, "pan.___", state 1819, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1819, "else" + line 404, "pan.___", state 1822, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 404, "pan.___", state 1823, "(1)" + line 402, "pan.___", state 1828, "((i<1))" + line 402, "pan.___", state 1828, "((i>=1))" + line 409, "pan.___", state 1834, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1847, "(1)" + line 410, "pan.___", state 1848, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1848, "else" + line 410, "pan.___", state 1851, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 410, "pan.___", state 1852, "(1)" + line 414, "pan.___", state 1860, "(1)" + line 414, "pan.___", state 1861, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1861, "else" + line 414, "pan.___", state 1864, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 414, "pan.___", state 1865, "(1)" + line 412, "pan.___", state 1870, "((i<1))" + line 412, "pan.___", state 1870, "((i>=1))" + line 419, "pan.___", state 1877, "(1)" + line 419, "pan.___", state 1878, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1878, "else" + line 419, "pan.___", state 1881, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 419, "pan.___", state 1882, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 421, "pan.___", state 1885, "(1)" + line 404, "pan.___", state 1916, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1960, "(1)" + line 404, "pan.___", state 2007, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2051, "(1)" + line 404, "pan.___", state 2102, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 2146, "(1)" + line 703, "pan.___", state 2192, "-end-" + (144 of 2192 states) +unreached in proctype :init: + line 710, "pan.___", state 9, "((j<2))" + line 710, "pan.___", state 9, "((j>=2))" + line 711, "pan.___", state 20, "((j<2))" + line 711, "pan.___", state 20, "((j>=2))" + line 716, "pan.___", state 33, "((j<2))" + line 716, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 750, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 3.37 seconds +pan: rate 78504.748 states/second +pan: avg transition delay 8.0875e-07 usec +cp .input.spin urcu_free_no_mb.spin.input +cp .input.spin.trail urcu_free_no_mb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input b/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input new file mode 100644 index 0000000..3831d86 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input @@ -0,0 +1,724 @@ +#define NO_RMB +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input.trail new file mode 100644 index 0000000..7b2040a --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_mb.spin.input.trail @@ -0,0 +1,2074 @@ +-2:3:-2 +-4:-4:-4 +1:0:2654 +2:3:2606 +3:3:2609 +4:3:2609 +5:3:2612 +6:3:2620 +7:3:2620 +8:3:2623 +9:3:2629 +10:3:2633 +11:3:2633 +12:3:2636 +13:3:2644 +14:3:2648 +15:3:2649 +16:0:2654 +17:3:2651 +18:0:2654 +19:2:416 +20:0:2654 +21:2:422 +22:0:2654 +23:2:423 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a/urcu/result-standard-execution-nonest/urcu_free_no_rmb.define b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_rmb.log b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.log new file mode 100644 index 0000000..439c78e --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.log @@ -0,0 +1,265 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_rmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +pan: claim violated! (at depth 1726) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3264, errors: 1 + 229629 states, stored + 2119227 states, matched + 2348856 transitions (= stored+matched) + 8294746 atomic steps +hash conflicts: 96242 (resolved) + +Stats on memory usage (in Megabytes): + 18.395 equivalent memory usage for states (stored*(State-vector + overhead)) + 14.410 actual memory usage for states (compression: 78.34%) + state-vector as stored = 38 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 480.119 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 243, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 746, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 759, "(1)" + line 409, "pan.___", state 760, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 760, "else" + line 409, "pan.___", state 763, "(1)" + line 409, "pan.___", state 764, "(1)" + line 409, "pan.___", state 764, "(1)" + line 413, "pan.___", state 772, "(1)" + line 413, "pan.___", state 773, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 773, "else" + line 413, "pan.___", state 776, "(1)" + line 413, "pan.___", state 777, "(1)" + line 413, "pan.___", state 777, "(1)" + line 411, "pan.___", state 782, "((i<1))" + line 411, "pan.___", state 782, "((i>=1))" + line 418, "pan.___", state 789, "(1)" + line 418, "pan.___", state 790, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 790, "else" + line 418, "pan.___", state 793, "(1)" + line 418, "pan.___", state 794, "(1)" + line 418, "pan.___", state 794, "(1)" + line 420, "pan.___", state 797, "(1)" + line 420, "pan.___", state 797, "(1)" + line 403, "pan.___", state 828, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 846, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 872, "(1)" + line 418, "pan.___", state 889, "(1)" + line 403, "pan.___", state 918, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 936, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 962, "(1)" + line 418, "pan.___", state 979, "(1)" + line 399, "pan.___", state 998, "(1)" + line 403, "pan.___", state 1010, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1028, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1054, "(1)" + line 418, "pan.___", state 1071, "(1)" + line 403, "pan.___", state 1103, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1121, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1147, "(1)" + line 418, "pan.___", state 1164, "(1)" + line 179, "pan.___", state 1187, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1200, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 1213, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1330, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1343, "(1)" + line 409, "pan.___", state 1344, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1344, "else" + line 409, "pan.___", state 1347, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 409, "pan.___", state 1348, "(1)" + line 413, "pan.___", state 1356, "(1)" + line 413, "pan.___", state 1357, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1357, "else" + line 413, "pan.___", state 1360, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 413, "pan.___", state 1361, "(1)" + line 411, "pan.___", state 1366, "((i<1))" + line 411, "pan.___", state 1366, "((i>=1))" + line 418, "pan.___", state 1373, "(1)" + line 418, "pan.___", state 1374, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1374, "else" + line 418, "pan.___", state 1377, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 418, "pan.___", state 1378, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 420, "pan.___", state 1381, "(1)" + line 179, "pan.___", state 1406, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1419, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 175, "pan.___", state 1432, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 1.88 seconds +pan: rate 122143.09 states/second +pan: avg transition delay 8.0039e-07 usec +cp .input.spin urcu_free_no_rmb.spin.input +cp .input.spin.trail urcu_free_no_rmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input new file mode 100644 index 0000000..6ccb255 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input @@ -0,0 +1,723 @@ +#define NO_RMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input.trail new file mode 100644 index 0000000..90f91e2 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_rmb.spin.input.trail @@ -0,0 +1,1729 @@ +-2:3:-2 +-4:-4:-4 +1:0:1982 +2:3:1934 +3:3:1937 +4:3:1937 +5:3:1940 +6:3:1948 +7:3:1948 +8:3:1951 +9:3:1957 +10:3:1961 +11:3:1961 +12:3:1964 +13:3:1972 +14:3:1976 +15:3:1977 +16:0:1982 +17:3:1979 +18:0:1982 +19:2:416 +20:0:1982 +21:2:422 +22:0:1982 +23:2:423 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`/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_no_wmb.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +pan: claim violated! (at depth 1614) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 2823, errors: 1 + 81228 states, stored + 752552 states, matched + 833780 transitions (= stored+matched) + 2934533 atomic steps +hash conflicts: 10835 (resolved) + +Stats on memory usage (in Megabytes): + 6.507 equivalent memory usage for states (stored*(State-vector + overhead)) + 5.330 actual memory usage for states (compression: 81.92%) + state-vector as stored = 41 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 471.037 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 331, "(1)" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (18 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 20, "(1)" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 34, "(1)" + line 403, "pan.___", state 35, "(1)" + line 403, "pan.___", state 35, "(1)" + line 401, "pan.___", state 40, "((i<1))" + line 401, "pan.___", state 40, "((i>=1))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 409, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 60, "else" + line 409, "pan.___", state 63, "(1)" + line 409, "pan.___", state 64, "(1)" + line 409, "pan.___", state 64, "(1)" + line 413, "pan.___", state 72, "(1)" + line 413, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 73, "else" + line 413, "pan.___", state 76, "(1)" + line 413, "pan.___", state 77, "(1)" + line 413, "pan.___", state 77, "(1)" + line 411, "pan.___", state 82, "((i<1))" + line 411, "pan.___", state 82, "((i>=1))" + line 418, "pan.___", state 89, "(1)" + line 418, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 90, "else" + line 418, "pan.___", state 93, "(1)" + line 418, "pan.___", state 94, "(1)" + line 418, "pan.___", state 94, "(1)" + line 420, "pan.___", state 97, "(1)" + line 420, "pan.___", state 97, "(1)" + line 369, "pan.___", state 99, "(1)" + line 639, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 637, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 114, "(1)" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 128, "(1)" + line 403, "pan.___", state 129, "(1)" + line 403, "pan.___", state 129, "(1)" + line 401, "pan.___", state 134, "((i<1))" + line 401, "pan.___", state 134, "((i>=1))" + line 409, "pan.___", state 153, "(1)" + line 409, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 154, "else" + line 409, "pan.___", state 157, "(1)" + line 409, "pan.___", state 158, "(1)" + line 409, "pan.___", state 158, "(1)" + line 413, "pan.___", state 166, "(1)" + line 413, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 167, "else" + line 413, "pan.___", state 170, "(1)" + line 413, "pan.___", state 171, "(1)" + line 413, "pan.___", state 171, "(1)" + line 411, "pan.___", state 176, "((i<1))" + line 411, "pan.___", state 176, "((i>=1))" + line 418, "pan.___", state 183, "(1)" + line 418, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 184, "else" + line 418, "pan.___", state 187, "(1)" + line 418, "pan.___", state 188, "(1)" + line 418, "pan.___", state 188, "(1)" + line 420, "pan.___", state 191, "(1)" + line 420, "pan.___", state 191, "(1)" + line 369, "pan.___", state 193, "(1)" + line 652, "pan.___", state 199, "(1)" + line 646, "pan.___", state 202, "((write_lock==0))" + line 646, "pan.___", state 202, "else" + line 644, "pan.___", state 203, "(1)" + line 160, "pan.___", state 209, "(1)" + line 164, "pan.___", state 217, "(1)" + line 164, "pan.___", state 218, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 164, "pan.___", state 218, "else" + line 162, "pan.___", state 223, "((j<1))" + line 162, "pan.___", state 223, "((j>=1))" + line 168, "pan.___", state 229, "(1)" + line 168, "pan.___", state 230, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 168, "pan.___", state 230, "else" + line 160, "pan.___", state 241, "(1)" + line 168, "pan.___", state 261, "(1)" + line 160, "pan.___", state 277, "(1)" + line 164, "pan.___", state 285, "(1)" + line 168, "pan.___", state 297, "(1)" + line 399, "pan.___", state 311, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 325, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 343, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 356, "(1)" + line 413, "pan.___", state 369, "(1)" + line 418, "pan.___", state 386, "(1)" + line 399, "pan.___", state 405, "(1)" + line 403, "pan.___", state 417, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 435, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 461, "(1)" + line 418, "pan.___", state 478, "(1)" + line 403, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 554, "(1)" + line 418, "pan.___", state 571, "(1)" + line 164, "pan.___", state 594, "(1)" + line 168, "pan.___", state 606, "(1)" + line 160, "pan.___", state 618, "(1)" + line 168, "pan.___", state 638, "(1)" + line 164, "pan.___", state 662, "(1)" + line 168, "pan.___", state 674, "(1)" + line 399, "pan.___", state 696, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 698, "(1)" + line 399, "pan.___", state 699, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 399, "pan.___", state 699, "else" + line 399, "pan.___", state 702, "(1)" + line 403, "pan.___", state 710, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 712, "(1)" + line 403, "pan.___", state 713, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 403, "pan.___", state 713, "else" + line 403, "pan.___", state 716, "(1)" + line 403, "pan.___", state 717, "(1)" + line 403, "pan.___", state 717, "(1)" + line 401, "pan.___", state 722, "((i<1))" + line 401, "pan.___", state 722, "((i>=1))" + line 408, "pan.___", state 728, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 741, "(1)" + line 409, "pan.___", state 742, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 742, "else" + line 409, "pan.___", state 745, "(1)" + line 409, "pan.___", state 746, "(1)" + line 409, "pan.___", state 746, "(1)" + line 413, "pan.___", state 754, "(1)" + line 413, "pan.___", state 755, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 755, "else" + line 413, "pan.___", state 758, "(1)" + line 413, "pan.___", state 759, "(1)" + line 413, "pan.___", state 759, "(1)" + line 411, "pan.___", state 764, "((i<1))" + line 411, "pan.___", state 764, "((i>=1))" + line 418, "pan.___", state 771, "(1)" + line 418, "pan.___", state 772, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 772, "else" + line 418, "pan.___", state 775, "(1)" + line 418, "pan.___", state 776, "(1)" + line 418, "pan.___", state 776, "(1)" + line 420, "pan.___", state 779, "(1)" + line 420, "pan.___", state 779, "(1)" + line 403, "pan.___", state 810, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 828, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 854, "(1)" + line 418, "pan.___", state 871, "(1)" + line 403, "pan.___", state 900, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 918, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 944, "(1)" + line 418, "pan.___", state 961, "(1)" + line 399, "pan.___", state 980, "(1)" + line 403, "pan.___", state 992, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1010, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1036, "(1)" + line 418, "pan.___", state 1053, "(1)" + line 403, "pan.___", state 1085, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1103, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1129, "(1)" + line 418, "pan.___", state 1146, "(1)" + line 164, "pan.___", state 1169, "(1)" + line 168, "pan.___", state 1181, "(1)" + line 160, "pan.___", state 1193, "(1)" + line 168, "pan.___", state 1213, "(1)" + line 164, "pan.___", state 1237, "(1)" + line 168, "pan.___", state 1249, "(1)" + line 399, "pan.___", state 1271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 399, "pan.___", state 1273, "(1)" + line 399, "pan.___", state 1274, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 399, "pan.___", state 1274, "else" + line 399, "pan.___", state 1277, "(1)" + line 403, "pan.___", state 1285, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 1287, "(1)" + line 403, "pan.___", state 1288, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 403, "pan.___", state 1288, "else" + line 403, "pan.___", state 1291, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 403, "pan.___", state 1292, "(1)" + line 401, "pan.___", state 1297, "((i<1))" + line 401, "pan.___", state 1297, "((i>=1))" + line 408, "pan.___", state 1303, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1316, "(1)" + line 409, "pan.___", state 1317, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1317, "else" + line 409, "pan.___", state 1320, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 409, "pan.___", state 1321, "(1)" + line 413, "pan.___", state 1329, "(1)" + line 413, "pan.___", state 1330, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1330, "else" + line 413, "pan.___", state 1333, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 413, "pan.___", state 1334, "(1)" + line 411, "pan.___", state 1339, "((i<1))" + line 411, "pan.___", state 1339, "((i>=1))" + line 418, "pan.___", state 1346, "(1)" + line 418, "pan.___", state 1347, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1347, "else" + line 418, "pan.___", state 1350, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 418, "pan.___", state 1351, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 420, "pan.___", state 1354, "(1)" + line 164, "pan.___", state 1379, "(1)" + line 168, "pan.___", state 1391, "(1)" + line 160, "pan.___", state 1403, "(1)" + line 168, "pan.___", state 1423, "(1)" + line 164, "pan.___", state 1447, "(1)" + line 168, "pan.___", state 1459, "(1)" + line 702, "pan.___", state 1484, "-end-" + (160 of 1484 states) +unreached in proctype :init: + line 709, "pan.___", state 9, "((j<2))" + line 709, "pan.___", state 9, "((j>=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 0.66 seconds +pan: rate 123072.73 states/second +pan: avg transition delay 7.9158e-07 usec +cp .input.spin urcu_free_no_wmb.spin.input +cp .input.spin.trail urcu_free_no_wmb.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input b/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input new file mode 100644 index 0000000..df3cc4b --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input @@ -0,0 +1,723 @@ +#define NO_WMB + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input.trail new file mode 100644 index 0000000..fe987f0 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_no_wmb.spin.input.trail @@ -0,0 +1,1617 @@ +-2:3:-2 +-4:-4:-4 +1:0:1946 +2:3:1898 +3:3:1901 +4:3:1901 +5:3:1904 +6:3:1912 +7:3:1912 +8:3:1915 +9:3:1921 +10:3:1925 +11:3:1925 +12:3:1928 +13:3:1936 +14:3:1940 +15:3:1941 +16:0:1946 +17:3:1943 +18:0:1946 +19:2:416 +20:0:1946 +21:2:422 +22:0:1946 +23:2:423 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a/urcu/result-standard-execution-nonest/urcu_free_single_flip.define b/urcu/result-standard-execution-nonest/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu/result-standard-execution-nonest/urcu_free_single_flip.log b/urcu/result-standard-execution-nonest/urcu_free_single_flip.log new file mode 100644 index 0000000..16843a5 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_single_flip.log @@ -0,0 +1,197 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define >> pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_free.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_free_single_flip.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +pan: claim violated! (at depth 1316) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness disabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 2045, errors: 1 + 52434 states, stored + 479392 states, matched + 531826 transitions (= stored+matched) + 1926196 atomic steps +hash conflicts: 6594 (resolved) + +Stats on memory usage (in Megabytes): + 4.200 equivalent memory usage for states (stored*(State-vector + overhead)) + 3.608 actual memory usage for states (compression: 85.89%) + state-vector as stored = 44 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 469.279 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 179, "pan.___", state 990, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1003, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1013, "(1)" + line 164, "pan.___", state 1021, "(1)" + line 168, "pan.___", state 1033, "(1)" + line 175, "pan.___", state 1044, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=2))" + line 710, "pan.___", state 20, "((j<2))" + line 710, "pan.___", state 20, "((j>=2))" + line 715, "pan.___", state 33, "((j<2))" + line 715, "pan.___", state 33, "((j>=2))" + (3 of 46 states) +unreached in proctype :never: + line 749, "pan.___", state 8, "-end-" + (1 of 8 states) + +pan: elapsed time 0.43 seconds +pan: rate 121939.53 states/second +pan: avg transition delay 8.0854e-07 usec +cp .input.spin urcu_free_single_flip.spin.input +cp .input.spin.trail urcu_free_single_flip.spin.input.trail +make[1]: Leaving directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' diff --git a/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input b/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input new file mode 100644 index 0000000..bb95a2d --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input @@ -0,0 +1,723 @@ +#define SINGLE_FLIP + +#define read_free_race (read_generation[0] == last_free_gen) +#define read_free (free_done && data_access[0]) + +//#define TEST_SIGNAL +//#define TEST_SIGNAL_ON_READ +//#define TEST_SIGNAL_ON_WRITE + +#define RCU_GP_CTR_BIT (1 << 7) +#define RCU_GP_CTR_NEST_MASK (RCU_GP_CTR_BIT - 1) + +#ifndef READER_NEST_LEVEL +#define READER_NEST_LEVEL 1 +//#define READER_NEST_LEVEL 2 +#endif + +#define REMOTE_BARRIERS +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input.trail new file mode 100644 index 0000000..a3f64a1 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_free_single_flip.spin.input.trail @@ -0,0 +1,1319 @@ +-2:3:-2 +-4:-4:-4 +1:0:1650 +2:3:1602 +3:3:1605 +4:3:1605 +5:3:1608 +6:3:1616 +7:3:1616 +8:3:1619 +9:3:1625 +10:3:1629 +11:3:1629 +12:3:1632 +13:3:1640 +14:3:1644 +15:3:1645 +16:0:1650 +17:3:1647 +18:0:1650 +19:2:416 +20:0:1650 +21:2:422 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+1311:2:1595 +1312:0:1650 +1313:1:302 +1314:0:1648 +1315:2:1596 +1316:0:1654 +1317:1:34 diff --git a/urcu/result-standard-execution-nonest/urcu_progress.ltl b/urcu/result-standard-execution-nonest/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu/result-standard-execution-nonest/urcu_progress_reader.define b/urcu/result-standard-execution-nonest/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu/result-standard-execution-nonest/urcu_progress_reader.log b/urcu/result-standard-execution-nonest/urcu_progress_reader.log new file mode 100644 index 0000000..8835ef4 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_reader.log @@ -0,0 +1,264 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_reader.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 1767: Claim reached state 9 (line 748) +Depth= 2582 States= 1e+06 Transitions= 1.91e+07 Memory= 498.674 t= 16.1 R= 6e+04 +Depth= 2582 States= 2e+06 Transitions= 3.89e+07 Memory= 531.096 t= 33 R= 6e+04 +Depth= 2582 States= 3e+06 Transitions= 5.89e+07 Memory= 563.518 t= 50.5 R= 6e+04 +pan: resizing hashtable to -w22.. done + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 2582, errors: 0 + 1743405 states, stored (3.27749e+06 visited) + 60942540 states, matched + 64220033 transitions (= visited+matched) +2.3877948e+08 atomic steps +hash conflicts: 25318829 (resolved) + +Stats on memory usage (in Megabytes): + 139.662 equivalent memory usage for states (stored*(State-vector + overhead)) + 113.924 actual memory usage for states (compression: 81.57%) + state-vector as stored = 41 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 603.623 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_progress_reader.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_progress_reader.spin.input.trail new file mode 100644 index 0000000..7c42af1 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_reader.spin.input.trail @@ -0,0 +1,1270 @@ +-2:4:-2 +-4:-4:-4 +1:0:4401 +2:4:4353 +3:4:4356 +4:4:4356 +5:4:4359 +6:4:4367 +7:4:4367 +8:4:4370 +9:4:4376 +10:4:4380 +11:4:4380 +12:4:4383 +13:4:4391 +14:4:4395 +15:4:4396 +16:0:4401 +17:4:4398 +18:0:4401 +19:3:2479 +20:0:4401 +21:3:2485 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+1256:0:4405 +1257:3:4346 +1258:0:4405 +1259:2:1348 +1260:0:4405 +1261:3:4347 +1262:0:4405 +1263:2:1347 +1264:0:4405 +1265:3:4346 +1266:0:4405 +1267:1:104 diff --git a/urcu/result-standard-execution-nonest/urcu_progress_writer.define b/urcu/result-standard-execution-nonest/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu/result-standard-execution-nonest/urcu_progress_writer.log b/urcu/result-standard-execution-nonest/urcu_progress_writer.log new file mode 100644 index 0000000..be944b5 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_writer.log @@ -0,0 +1,264 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 744) +depth 15: Claim reached state 9 (line 749) +depth 205: Claim reached state 9 (line 748) +Depth= 2535 States= 1e+06 Transitions= 1.7e+07 Memory= 489.885 t= 14.4 R= 7e+04 +Depth= 2535 States= 2e+06 Transitions= 3.76e+07 Memory= 523.186 t= 32 R= 6e+04 +Depth= 2535 States= 3e+06 Transitions= 5.78e+07 Memory= 555.901 t= 49.6 R= 6e+04 +pan: resizing hashtable to -w22.. done + +(Spin Version 5.1.7 -- 23 December 2008) + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 2535, errors: 0 + 1687360 states, stored (3.30264e+06 visited) + 60975458 states, matched + 64278093 transitions (= visited+matched) +2.3918285e+08 atomic steps +hash conflicts: 20728375 (resolved) + +Stats on memory usage (in Megabytes): + 135.172 equivalent memory usage for states (stored*(State-vector + overhead)) + 110.532 actual memory usage for states (compression: 81.77%) + state-vector as stored = 41 byte + 28 byte overhead + 32.000 memory used for hash table (-w22) + 457.764 memory used for DFS stack (-m10000000) + 600.205 total actual memory usage + +unreached in proctype urcu_reader + line 399, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 61, "(1)" + line 418, "pan.___", state 91, "(1)" + line 399, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 151, "(1)" + line 418, "pan.___", state 181, "(1)" + line 399, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 242, "(1)" + line 418, "pan.___", state 272, "(1)" + line 399, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 360, "(1)" + line 418, "pan.___", state 390, "(1)" + line 540, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 399, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 59, "(1)" + line 413, "pan.___", state 72, "(1)" + line 418, "pan.___", state 89, "(1)" + line 399, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 403, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 153, "(1)" + line 413, "pan.___", state 166, "(1)" + line 652, "pan.___", state 199, "(1)" + line 175, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 179, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 240, "(1)" + line 164, "pan.___", state 248, "(1)" + line 168, "pan.___", state 260, "(1)" + line 175, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 914, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 927, "(1)" + line 409, "pan.___", state 928, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 928, "else" + line 409, "pan.___", state 931, "(1)" + line 409, "pan.___", state 932, "(1)" + line 409, "pan.___", state 932, "(1)" + line 413, "pan.___", state 940, "(1)" + line 413, "pan.___", state 941, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 941, "else" + line 413, "pan.___", state 944, "(1)" + line 413, "pan.___", state 945, "(1)" + line 413, "pan.___", state 945, "(1)" + line 411, "pan.___", state 950, "((i<1))" + line 411, "pan.___", state 950, "((i>=1))" + line 418, "pan.___", state 957, "(1)" + line 418, "pan.___", state 958, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 958, "else" + line 418, "pan.___", state 961, "(1)" + line 418, "pan.___", state 962, "(1)" + line 418, "pan.___", state 962, "(1)" + line 420, "pan.___", state 965, "(1)" + line 420, "pan.___", state 965, "(1)" + line 403, "pan.___", state 996, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1014, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1040, "(1)" + line 418, "pan.___", state 1057, "(1)" + line 403, "pan.___", state 1086, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1104, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1130, "(1)" + line 418, "pan.___", state 1147, "(1)" + line 399, "pan.___", state 1166, "(1)" + line 403, "pan.___", state 1178, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1196, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1222, "(1)" + line 418, "pan.___", state 1239, "(1)" + line 403, "pan.___", state 1271, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 408, "pan.___", state 1289, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 413, "pan.___", state 1315, "(1)" + line 418, "pan.___", state 1332, "(1)" + line 179, "pan.___", state 1355, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1368, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1378, "(1)" + line 164, "pan.___", state 1386, "(1)" + line 168, "pan.___", state 1398, "(1)" + line 175, "pan.___", state 1409, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 408, "pan.___", state 1582, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1595, "(1)" + line 409, "pan.___", state 1596, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 409, "pan.___", state 1596, "else" + line 409, "pan.___", state 1599, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 409, "pan.___", state 1600, "(1)" + line 413, "pan.___", state 1608, "(1)" + line 413, "pan.___", state 1609, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 413, "pan.___", state 1609, "else" + line 413, "pan.___", state 1612, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 413, "pan.___", state 1613, "(1)" + line 411, "pan.___", state 1618, "((i<1))" + line 411, "pan.___", state 1618, "((i>=1))" + line 418, "pan.___", state 1625, "(1)" + line 418, "pan.___", state 1626, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 418, "pan.___", state 1626, "else" + line 418, "pan.___", state 1629, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 418, "pan.___", state 1630, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 420, "pan.___", state 1633, "(1)" + line 179, "pan.___", state 1658, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 183, "pan.___", state 1671, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 160, "pan.___", state 1681, "(1)" + line 164, "pan.___", state 1689, "(1)" + line 168, "pan.___", state 1701, "(1)" + line 175, "pan.___", state 1712, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_progress_writer.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_progress_writer.spin.input.trail new file mode 100644 index 0000000..e65d663 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_writer.spin.input.trail @@ -0,0 +1,9 @@ +-2:3:-2 +-4:-4:-4 +1:0:2679 +2:1:2673 +3:1:2674 +4:1:2675 +5:1:2676 +6:0:2685 +7:5:1129 diff --git a/urcu/result-standard-execution-nonest/urcu_progress_writer_error.define b/urcu/result-standard-execution-nonest/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS diff --git a/urcu/result-standard-execution-nonest/urcu_progress_writer_error.log b/urcu/result-standard-execution-nonest/urcu_progress_writer_error.log new file mode 100644 index 0000000..80c9c6d --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_writer_error.log @@ -0,0 +1,514 @@ +make[1]: Entering directory `/home/compudj/doc/userspace-rcu/formal-model/urcu' +rm -f pan* trail.out .input.spin* *.spin.trail .input.define +touch .input.define +cat .input.define > pan.ltl +cat DEFINES >> pan.ltl +spin -f "!(`cat urcu_progress.ltl | grep -v ^//`)" >> pan.ltl +cp urcu_progress_writer_error.define .input.define +cat .input.define > .input.spin +cat DEFINES >> .input.spin +cat urcu.spin >> .input.spin +rm -f .input.spin.trail +spin -a -X -N pan.ltl .input.spin +Exit-Status 0 +gcc -O2 -w -DHASH64 -o pan pan.c +./pan -a -f -v -c1 -X -m10000000 -w20 +warning: for p.o. reduction to be valid the never claim must be stutter-invariant +(never claims generated from LTL formulae are stutter-invariant) +depth 0: Claim reached state 5 (line 745) +depth 15: Claim reached state 9 (line 750) +depth 205: Claim reached state 9 (line 749) +pan: acceptance cycle (at depth 1651) +pan: wrote .input.spin.trail + +(Spin Version 5.1.7 -- 23 December 2008) +Warning: Search not completed + + Partial Order Reduction + +Full statespace search for: + never claim + + assertion violations + (if within scope of claim) + acceptance cycles + (fairness enabled) + invalid end states - (disabled by never claim) + +State-vector 56 byte, depth reached 3006, errors: 1 + 19244 states, stored (53713 visited) + 704248 states, matched + 757961 transitions (= visited+matched) + 2831420 atomic steps +hash conflicts: 5063 (resolved) + +Stats on memory usage (in Megabytes): + 1.542 equivalent memory usage for states (stored*(State-vector + overhead)) + 1.605 actual memory usage for states (unsuccessful compression: 104.14%) + state-vector as stored = 59 byte + 28 byte overhead + 8.000 memory used for hash table (-w20) + 457.764 memory used for DFS stack (-m10000000) + 467.326 total actual memory usage + +unreached in proctype urcu_reader + line 400, "pan.___", state 16, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 48, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 61, "(1)" + line 419, "pan.___", state 91, "(1)" + line 400, "pan.___", state 106, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 138, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 151, "(1)" + line 419, "pan.___", state 181, "(1)" + line 400, "pan.___", state 197, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 229, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 242, "(1)" + line 419, "pan.___", state 272, "(1)" + line 400, "pan.___", state 315, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 347, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 360, "(1)" + line 419, "pan.___", state 390, "(1)" + line 541, "pan.___", state 414, "-end-" + (17 of 414 states) +unreached in proctype urcu_writer + line 400, "pan.___", state 14, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 20, "(1)" + line 404, "pan.___", state 28, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 34, "(1)" + line 404, "pan.___", state 35, "(1)" + line 404, "pan.___", state 35, "(1)" + line 402, "pan.___", state 40, "((i<1))" + line 402, "pan.___", state 40, "((i>=1))" + line 409, "pan.___", state 46, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 59, "(1)" + line 410, "pan.___", state 60, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 60, "else" + line 410, "pan.___", state 63, "(1)" + line 410, "pan.___", state 64, "(1)" + line 410, "pan.___", state 64, "(1)" + line 414, "pan.___", state 72, "(1)" + line 414, "pan.___", state 73, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 73, "else" + line 414, "pan.___", state 76, "(1)" + line 414, "pan.___", state 77, "(1)" + line 414, "pan.___", state 77, "(1)" + line 412, "pan.___", state 82, "((i<1))" + line 412, "pan.___", state 82, "((i>=1))" + line 419, "pan.___", state 89, "(1)" + line 419, "pan.___", state 90, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 90, "else" + line 419, "pan.___", state 93, "(1)" + line 419, "pan.___", state 94, "(1)" + line 419, "pan.___", state 94, "(1)" + line 370, "pan.___", state 99, "(1)" + line 640, "pan.___", state 103, "cached_generation_ptr.val[_pid] = (old_gen+1)" + line 638, "pan.___", state 104, "old_gen = cached_generation_ptr.val[_pid]" + line 400, "pan.___", state 108, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 114, "(1)" + line 404, "pan.___", state 122, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 128, "(1)" + line 404, "pan.___", state 129, "(1)" + line 404, "pan.___", state 129, "(1)" + line 402, "pan.___", state 134, "((i<1))" + line 402, "pan.___", state 134, "((i>=1))" + line 410, "pan.___", state 153, "(1)" + line 410, "pan.___", state 154, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 154, "else" + line 410, "pan.___", state 157, "(1)" + line 410, "pan.___", state 158, "(1)" + line 410, "pan.___", state 158, "(1)" + line 414, "pan.___", state 166, "(1)" + line 414, "pan.___", state 167, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 167, "else" + line 414, "pan.___", state 170, "(1)" + line 414, "pan.___", state 171, "(1)" + line 414, "pan.___", state 171, "(1)" + line 412, "pan.___", state 176, "((i<1))" + line 412, "pan.___", state 176, "((i>=1))" + line 419, "pan.___", state 183, "(1)" + line 419, "pan.___", state 184, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 184, "else" + line 419, "pan.___", state 187, "(1)" + line 419, "pan.___", state 188, "(1)" + line 419, "pan.___", state 188, "(1)" + line 421, "pan.___", state 191, "(1)" + line 421, "pan.___", state 191, "(1)" + line 370, "pan.___", state 193, "(1)" + line 653, "pan.___", state 199, "(1)" + line 647, "pan.___", state 202, "((write_lock==0))" + line 647, "pan.___", state 202, "else" + line 645, "pan.___", state 203, "(1)" + line 176, "pan.___", state 208, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 180, "pan.___", state 217, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 225, "((j<1))" + line 178, "pan.___", state 225, "((j>=1))" + line 184, "pan.___", state 230, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 240, "(1)" + line 165, "pan.___", state 248, "(1)" + line 165, "pan.___", state 249, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 165, "pan.___", state 249, "else" + line 163, "pan.___", state 254, "((j<1))" + line 163, "pan.___", state 254, "((j>=1))" + line 169, "pan.___", state 260, "(1)" + line 169, "pan.___", state 261, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 169, "pan.___", state 261, "else" + line 171, "pan.___", state 264, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 171, "pan.___", state 264, "else" + line 176, "pan.___", state 271, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<=1))" + line 184, "pan.___", state 293, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<=1))" + line 169, "pan.___", state 323, "(1)" + line 169, "pan.___", state 324, "(!((cache_dirty_generation_ptr.bitfield&(1<=1))" + line 176, "pan.___", state 338, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 180, "pan.___", state 347, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 178, "pan.___", state 355, "((j<1))" + line 178, "pan.___", state 355, "((j>=1))" + line 184, "pan.___", state 360, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 370, "(1)" + line 165, "pan.___", state 378, "(1)" + line 165, "pan.___", state 379, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 165, "pan.___", state 379, "else" + line 163, "pan.___", state 384, "((j<1))" + line 163, "pan.___", state 384, "((j>=1))" + line 169, "pan.___", state 390, "(1)" + line 169, "pan.___", state 391, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 169, "pan.___", state 391, "else" + line 171, "pan.___", state 394, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 171, "pan.___", state 394, "else" + line 400, "pan.___", state 404, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 410, "(1)" + line 404, "pan.___", state 418, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 424, "(1)" + line 404, "pan.___", state 425, "(1)" + line 404, "pan.___", state 425, "(1)" + line 402, "pan.___", state 430, "((i<1))" + line 402, "pan.___", state 430, "((i>=1))" + line 409, "pan.___", state 436, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 449, "(1)" + line 410, "pan.___", state 450, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 450, "else" + line 410, "pan.___", state 453, "(1)" + line 410, "pan.___", state 454, "(1)" + line 410, "pan.___", state 454, "(1)" + line 414, "pan.___", state 462, "(1)" + line 414, "pan.___", state 463, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 463, "else" + line 414, "pan.___", state 466, "(1)" + line 414, "pan.___", state 467, "(1)" + line 414, "pan.___", state 467, "(1)" + line 412, "pan.___", state 472, "((i<1))" + line 412, "pan.___", state 472, "((i>=1))" + line 419, "pan.___", state 479, "(1)" + line 419, "pan.___", state 480, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 480, "else" + line 419, "pan.___", state 483, "(1)" + line 419, "pan.___", state 484, "(1)" + line 419, "pan.___", state 484, "(1)" + line 421, "pan.___", state 487, "(1)" + line 421, "pan.___", state 487, "(1)" + line 370, "pan.___", state 489, "(1)" + line 662, "pan.___", state 492, "cached_urcu_gp_ctr.val[_pid] = (tmp^(1<<7))" + line 400, "pan.___", state 498, "(1)" + line 400, "pan.___", state 499, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 499, "else" + line 400, "pan.___", state 502, "(1)" + line 404, "pan.___", state 510, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 516, "(1)" + line 404, "pan.___", state 517, "(1)" + line 404, "pan.___", state 517, "(1)" + line 402, "pan.___", state 522, "((i<1))" + line 402, "pan.___", state 522, "((i>=1))" + line 409, "pan.___", state 528, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 541, "(1)" + line 410, "pan.___", state 542, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 542, "else" + line 410, "pan.___", state 545, "(1)" + line 410, "pan.___", state 546, "(1)" + line 410, "pan.___", state 546, "(1)" + line 414, "pan.___", state 554, "(1)" + line 414, "pan.___", state 555, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 555, "else" + line 414, "pan.___", state 558, "(1)" + line 414, "pan.___", state 559, "(1)" + line 414, "pan.___", state 559, "(1)" + line 412, "pan.___", state 564, "((i<1))" + line 412, "pan.___", state 564, "((i>=1))" + line 419, "pan.___", state 571, "(1)" + line 419, "pan.___", state 572, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 572, "else" + line 419, "pan.___", state 575, "(1)" + line 419, "pan.___", state 576, "(1)" + line 419, "pan.___", state 576, "(1)" + line 421, "pan.___", state 579, "(1)" + line 421, "pan.___", state 579, "(1)" + line 370, "pan.___", state 581, "(1)" + line 400, "pan.___", state 589, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 595, "(1)" + line 404, "pan.___", state 603, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 609, "(1)" + line 404, "pan.___", state 610, "(1)" + line 404, "pan.___", state 610, "(1)" + line 402, "pan.___", state 615, "((i<1))" + line 402, "pan.___", state 615, "((i>=1))" + line 409, "pan.___", state 621, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 634, "(1)" + line 410, "pan.___", state 635, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 635, "else" + line 410, "pan.___", state 638, "(1)" + line 410, "pan.___", state 639, "(1)" + line 410, "pan.___", state 639, "(1)" + line 414, "pan.___", state 647, "(1)" + line 414, "pan.___", state 648, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 648, "else" + line 414, "pan.___", state 651, "(1)" + line 414, "pan.___", state 652, "(1)" + line 414, "pan.___", state 652, "(1)" + line 412, "pan.___", state 657, "((i<1))" + line 412, "pan.___", state 657, "((i>=1))" + line 419, "pan.___", state 664, "(1)" + line 419, "pan.___", state 665, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 665, "else" + line 419, "pan.___", state 668, "(1)" + line 419, "pan.___", state 669, "(1)" + line 419, "pan.___", state 669, "(1)" + line 421, "pan.___", state 672, "(1)" + line 421, "pan.___", state 672, "(1)" + line 370, "pan.___", state 674, "(1)" + line 400, "pan.___", state 679, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 681, "(1)" + line 400, "pan.___", state 682, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 682, "else" + line 400, "pan.___", state 685, "(1)" + line 404, "pan.___", state 693, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 695, "(1)" + line 404, "pan.___", state 696, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 696, "else" + line 404, "pan.___", state 699, "(1)" + line 404, "pan.___", state 700, "(1)" + line 404, "pan.___", state 700, "(1)" + line 402, "pan.___", state 705, "((i<1))" + line 402, "pan.___", state 705, "((i>=1))" + line 409, "pan.___", state 711, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 724, "(1)" + line 410, "pan.___", state 725, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 725, "else" + line 410, "pan.___", state 728, "(1)" + line 410, "pan.___", state 729, "(1)" + line 410, "pan.___", state 729, "(1)" + line 414, "pan.___", state 737, "(1)" + line 414, "pan.___", state 738, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 738, "else" + line 414, "pan.___", state 741, "(1)" + line 414, "pan.___", state 742, "(1)" + line 414, "pan.___", state 742, "(1)" + line 412, "pan.___", state 747, "((i<1))" + line 412, "pan.___", state 747, "((i>=1))" + line 419, "pan.___", state 754, "(1)" + line 419, "pan.___", state 755, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 755, "else" + line 419, "pan.___", state 758, "(1)" + line 419, "pan.___", state 759, "(1)" + line 419, "pan.___", state 759, "(1)" + line 421, "pan.___", state 762, "(1)" + line 421, "pan.___", state 762, "(1)" + line 370, "pan.___", state 764, "(1)" + line 430, "pan.___", state 767, "(((tmp2&((1<<7)-1))&&((tmp2^cached_urcu_gp_ctr.val[_pid])&(1<<7))))" + line 430, "pan.___", state 767, "else" + line 400, "pan.___", state 777, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 779, "(1)" + line 400, "pan.___", state 780, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 780, "else" + line 400, "pan.___", state 783, "(1)" + line 404, "pan.___", state 791, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 793, "(1)" + line 404, "pan.___", state 794, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 794, "else" + line 404, "pan.___", state 797, "(1)" + line 404, "pan.___", state 798, "(1)" + line 404, "pan.___", state 798, "(1)" + line 402, "pan.___", state 803, "((i<1))" + line 402, "pan.___", state 803, "((i>=1))" + line 409, "pan.___", state 809, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 822, "(1)" + line 410, "pan.___", state 823, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 823, "else" + line 410, "pan.___", state 826, "(1)" + line 410, "pan.___", state 827, "(1)" + line 410, "pan.___", state 827, "(1)" + line 414, "pan.___", state 835, "(1)" + line 414, "pan.___", state 836, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 836, "else" + line 414, "pan.___", state 839, "(1)" + line 414, "pan.___", state 840, "(1)" + line 414, "pan.___", state 840, "(1)" + line 412, "pan.___", state 845, "((i<1))" + line 412, "pan.___", state 845, "((i>=1))" + line 419, "pan.___", state 852, "(1)" + line 419, "pan.___", state 853, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 853, "else" + line 419, "pan.___", state 856, "(1)" + line 419, "pan.___", state 857, "(1)" + line 419, "pan.___", state 857, "(1)" + line 421, "pan.___", state 860, "(1)" + line 421, "pan.___", state 860, "(1)" + line 370, "pan.___", state 862, "(1)" + line 449, "pan.___", state 870, "((tmp<1))" + line 449, "pan.___", state 870, "((tmp>=1))" + line 462, "pan.___", state 873, "tmp = 0" + line 400, "pan.___", state 877, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 883, "(1)" + line 404, "pan.___", state 891, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 897, "(1)" + line 404, "pan.___", state 898, "(1)" + line 404, "pan.___", state 898, "(1)" + line 402, "pan.___", state 903, "((i<1))" + line 402, "pan.___", state 903, "((i>=1))" + line 409, "pan.___", state 909, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 922, "(1)" + line 410, "pan.___", state 923, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 923, "else" + line 410, "pan.___", state 926, "(1)" + line 410, "pan.___", state 927, "(1)" + line 410, "pan.___", state 927, "(1)" + line 414, "pan.___", state 935, "(1)" + line 414, "pan.___", state 936, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 936, "else" + line 414, "pan.___", state 939, "(1)" + line 414, "pan.___", state 940, "(1)" + line 414, "pan.___", state 940, "(1)" + line 412, "pan.___", state 945, "((i<1))" + line 412, "pan.___", state 945, "((i>=1))" + line 419, "pan.___", state 952, "(1)" + line 419, "pan.___", state 953, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 953, "else" + line 419, "pan.___", state 956, "(1)" + line 419, "pan.___", state 957, "(1)" + line 419, "pan.___", state 957, "(1)" + line 421, "pan.___", state 960, "(1)" + line 421, "pan.___", state 960, "(1)" + line 370, "pan.___", state 962, "(1)" + line 671, "pan.___", state 963, "tmp = cached_urcu_gp_ctr.val[_pid]" + line 400, "pan.___", state 967, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 973, "(1)" + line 404, "pan.___", state 981, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 987, "(1)" + line 404, "pan.___", state 988, "(1)" + line 404, "pan.___", state 988, "(1)" + line 402, "pan.___", state 993, "((i<1))" + line 402, "pan.___", state 993, "((i>=1))" + line 409, "pan.___", state 999, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1012, "(1)" + line 410, "pan.___", state 1013, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1013, "else" + line 410, "pan.___", state 1016, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 410, "pan.___", state 1017, "(1)" + line 414, "pan.___", state 1025, "(1)" + line 414, "pan.___", state 1026, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1026, "else" + line 414, "pan.___", state 1029, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 414, "pan.___", state 1030, "(1)" + line 412, "pan.___", state 1035, "((i<1))" + line 412, "pan.___", state 1035, "((i>=1))" + line 419, "pan.___", state 1042, "(1)" + line 419, "pan.___", state 1043, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1043, "else" + line 419, "pan.___", state 1046, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 419, "pan.___", state 1047, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 421, "pan.___", state 1050, "(1)" + line 370, "pan.___", state 1052, "(1)" + line 400, "pan.___", state 1061, "(1)" + line 404, "pan.___", state 1073, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1091, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1117, "(1)" + line 419, "pan.___", state 1134, "(1)" + line 404, "pan.___", state 1166, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1184, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 414, "pan.___", state 1210, "(1)" + line 419, "pan.___", state 1227, "(1)" + line 400, "pan.___", state 1242, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1256, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 409, "pan.___", state 1274, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1287, "(1)" + line 414, "pan.___", state 1300, "(1)" + line 419, "pan.___", state 1317, "(1)" + line 400, "pan.___", state 1340, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1<<_pid)))" + line 400, "pan.___", state 1342, "(1)" + line 400, "pan.___", state 1343, "((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid)))" + line 400, "pan.___", state 1343, "else" + line 400, "pan.___", state 1346, "(1)" + line 404, "pan.___", state 1354, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 404, "pan.___", state 1356, "(1)" + line 404, "pan.___", state 1357, "((cache_dirty_urcu_active_readers.bitfield&(1<<_pid)))" + line 404, "pan.___", state 1357, "else" + line 404, "pan.___", state 1360, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 404, "pan.___", state 1361, "(1)" + line 402, "pan.___", state 1366, "((i<1))" + line 402, "pan.___", state 1366, "((i>=1))" + line 409, "pan.___", state 1372, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 410, "pan.___", state 1385, "(1)" + line 410, "pan.___", state 1386, "(!((cache_dirty_urcu_gp_ctr.bitfield&(1<<_pid))))" + line 410, "pan.___", state 1386, "else" + line 410, "pan.___", state 1389, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 410, "pan.___", state 1390, "(1)" + line 414, "pan.___", state 1398, "(1)" + line 414, "pan.___", state 1399, "(!((cache_dirty_urcu_active_readers.bitfield&(1<<_pid))))" + line 414, "pan.___", state 1399, "else" + line 414, "pan.___", state 1402, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 414, "pan.___", state 1403, "(1)" + line 412, "pan.___", state 1408, "((i<1))" + line 412, "pan.___", state 1408, "((i>=1))" + line 419, "pan.___", state 1415, "(1)" + line 419, "pan.___", state 1416, "(!((cache_dirty_generation_ptr.bitfield&(1<<_pid))))" + line 419, "pan.___", state 1416, "else" + line 419, "pan.___", state 1419, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 419, "pan.___", state 1420, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 421, "pan.___", state 1423, "(1)" + line 180, "pan.___", state 1448, "cache_dirty_urcu_active_readers.bitfield = (cache_dirty_urcu_active_readers.bitfield&~((1<<_pid)))" + line 184, "pan.___", state 1461, "cache_dirty_generation_ptr.bitfield = (cache_dirty_generation_ptr.bitfield&~((1<<_pid)))" + line 161, "pan.___", state 1471, "(1)" + line 165, "pan.___", state 1479, "(1)" + line 169, "pan.___", state 1491, "(1)" + line 176, "pan.___", state 1502, "cache_dirty_urcu_gp_ctr.bitfield = (cache_dirty_urcu_gp_ctr.bitfield&~((1< 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/result-standard-execution-nonest/urcu_progress_writer_error.spin.input.trail b/urcu/result-standard-execution-nonest/urcu_progress_writer_error.spin.input.trail new file mode 100644 index 0000000..e1188eb --- /dev/null +++ b/urcu/result-standard-execution-nonest/urcu_progress_writer_error.spin.input.trail @@ -0,0 +1,3010 @@ +-2:3:-2 +-4:-4:-4 +1:0:2108 +2:3:2060 +3:3:2063 +4:3:2063 +5:3:2066 +6:3:2074 +7:3:2074 +8:3:2077 +9:3:2083 +10:3:2087 +11:3:2087 +12:3:2090 +13:3:2098 +14:3:2102 +15:3:2103 +16:0:2108 +17:3:2105 +18:0:2108 +19:2:416 +20:0:2108 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a/urcu/urcu.sh b/urcu/urcu.sh new file mode 100644 index 0000000..65ff517 --- /dev/null +++ b/urcu/urcu.sh @@ -0,0 +1,29 @@ +#!/bin/sh +# +# Compiles and runs the urcu.spin Promela model. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# +# Copyright (C) IBM Corporation, 2009 +# Mathieu Desnoyers, 2009 +# +# Authors: Paul E. McKenney +# Mathieu Desnoyers + +# Basic execution, without LTL clauses. See Makefile. + +spin -a urcu.spin +cc -DSAFETY -o pan pan.c +./pan -v -c1 -X -m10000000 -w21 diff --git a/urcu/urcu.spin b/urcu/urcu.spin new file mode 100644 index 0000000..2cfcb70 --- /dev/null +++ b/urcu/urcu.spin @@ -0,0 +1,705 @@ +/* + * mem.spin: Promela code to validate memory barriers with OOO memory. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * Copyright (c) 2009 Mathieu Desnoyers + */ + +/* Promela validation variables. */ + +/* specific defines "included" here */ +/* DEFINES file "included" here */ + +/* All signal readers have same PID and uses same reader variable */ +#ifdef TEST_SIGNAL_ON_WRITE + +#define NR_READERS 1 /* the writer is also a signal reader */ +#define NR_WRITERS 1 + +#define NR_PROCS 1 + +#define get_pid() (0) + +#elif defined(TEST_SIGNAL_ON_READ) + +#define get_pid() ((_pid < 2) -> 0 : 1) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#else + +#define get_pid() (_pid) + +#define NR_READERS 1 +#define NR_WRITERS 1 + +#define NR_PROCS 2 + +#endif + +#define get_readerid() (get_pid()) + +/* + * Each process have its own data in cache. Caches are randomly updated. + * smp_wmb and smp_rmb forces cache updates (write and read), smp_mb forces + * both. + */ + +typedef per_proc_byte { + byte val[NR_PROCS]; +}; + +/* Bitfield has a maximum of 8 procs */ +typedef per_proc_bit { + byte bitfield; +}; + +#define DECLARE_CACHED_VAR(type, x) \ + type mem_##x; \ + per_proc_##type cached_##x; \ + per_proc_bit cache_dirty_##x; + +#define INIT_CACHED_VAR(x, v, j) \ + mem_##x = v; \ + cache_dirty_##x.bitfield = 0; \ + j = 0; \ + do \ + :: j < NR_PROCS -> \ + cached_##x.val[j] = v; \ + j++ \ + :: j >= NR_PROCS -> break \ + od; + +#define IS_CACHE_DIRTY(x, id) (cache_dirty_##x.bitfield & (1 << id)) + +#define READ_CACHED_VAR(x) (cached_##x.val[get_pid()]) + +#define WRITE_CACHED_VAR(x, v) \ + atomic { \ + cached_##x.val[get_pid()] = v; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield | (1 << get_pid()); \ + } + +#define CACHE_WRITE_TO_MEM(x, id) \ + if \ + :: IS_CACHE_DIRTY(x, id) -> \ + mem_##x = cached_##x.val[id]; \ + cache_dirty_##x.bitfield = \ + cache_dirty_##x.bitfield & (~(1 << id)); \ + :: else -> \ + skip \ + fi; + +#define CACHE_READ_FROM_MEM(x, id) \ + if \ + :: !IS_CACHE_DIRTY(x, id) -> \ + cached_##x.val[id] = mem_##x;\ + :: else -> \ + skip \ + fi; + +/* + * May update other caches if cache is dirty, or not. + */ +#define RANDOM_CACHE_WRITE_TO_MEM(x, id)\ + if \ + :: 1 -> CACHE_WRITE_TO_MEM(x, id); \ + :: 1 -> skip \ + fi; + +#define RANDOM_CACHE_READ_FROM_MEM(x, id)\ + if \ + :: 1 -> CACHE_READ_FROM_MEM(x, id); \ + :: 1 -> skip \ + fi; + +/* + * Remote barriers tests the scheme where a signal (or IPI) is sent to all + * reader threads to promote their compiler barrier to a smp_mb(). + */ +#ifdef REMOTE_BARRIERS + +inline smp_rmb_pid(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, i); + } +} + +inline smp_wmb_pid(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, i); + j = 0; + do + :: j < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[j], i); + j++ + :: j >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, i); + } +} + +inline smp_mb_pid(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb_pid(i, j); +#endif +#ifndef NO_RMB + smp_rmb_pid(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(j); +#endif +#endif + } +} + +/* + * Readers do a simple barrier(), writers are doing a smp_mb() _and_ sending a + * signal or IPI to have all readers execute a smp_mb. + * We are not modeling the whole rendez-vous between readers and writers here, + * we just let the writer update each reader's caches remotely. + */ +inline smp_mb_writer(i, j) +{ + smp_mb_pid(get_pid(), j); + i = 0; + do + :: i < NR_READERS -> + smp_mb_pid(i, j); + i++; + :: i >= NR_READERS -> break + od; + smp_mb_pid(get_pid(), j); +} + +inline smp_mb_reader(i, j) +{ + skip; +} + +#else + +inline smp_rmb(i, j) +{ + atomic { + CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_READ_FROM_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline smp_wmb(i, j) +{ + atomic { + CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + CACHE_WRITE_TO_MEM(urcu_active_readers[i], get_pid()); + i++ + :: i >= NR_READERS -> break + od; + CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + } +} + +inline smp_mb(i, j) +{ + atomic { +#ifndef NO_WMB + smp_wmb(i, j); +#endif +#ifndef NO_RMB + smp_rmb(i, j); +#endif +#ifdef NO_WMB +#ifdef NO_RMB + ooo_mem(i); +#endif +#endif + } +} + +inline smp_mb_writer(i, j) +{ + smp_mb(i, j); +} + +inline smp_mb_reader(i, j) +{ + smp_mb(i, j); +} + +#endif + +/* Keep in sync manually with smp_rmb, wmp_wmb, ooo_mem and init() */ +DECLARE_CACHED_VAR(byte, urcu_gp_ctr); +/* Note ! currently only two readers */ +DECLARE_CACHED_VAR(byte, urcu_active_readers[NR_READERS]); +/* pointer generation */ +DECLARE_CACHED_VAR(byte, generation_ptr); + +byte last_free_gen = 0; +bit free_done = 0; +byte read_generation[NR_READERS]; +bit data_access[NR_READERS]; + +bit write_lock = 0; + +bit init_done = 0; + +bit sighand_exec = 0; + +inline wait_init_done() +{ + do + :: init_done == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TEST_SIGNAL + +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> break; + od; +} + +#ifdef TOO_BIG_STATE_SPACE +inline wait_for_sighand_exec() +{ + sighand_exec = 0; + do + :: sighand_exec == 0 -> skip; + :: else -> + if + :: 1 -> break; + :: 1 -> sighand_exec = 0; + skip; + fi; + od; +} +#endif + +#else + +inline wait_for_sighand_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_WRITE +/* Block on signal handler execution */ +inline dispatch_sighand_write_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_write_exec() +{ + skip; +} + +#endif + +#ifdef TEST_SIGNAL_ON_READ +/* Block on signal handler execution */ +inline dispatch_sighand_read_exec() +{ + sighand_exec = 1; + do + :: sighand_exec == 1 -> + skip; + :: else -> + break; + od; +} + +#else + +inline dispatch_sighand_read_exec() +{ + skip; +} + +#endif + + +inline ooo_mem(i) +{ + atomic { + RANDOM_CACHE_WRITE_TO_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_WRITE_TO_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_WRITE_TO_MEM(generation_ptr, get_pid()); + RANDOM_CACHE_READ_FROM_MEM(urcu_gp_ctr, get_pid()); + i = 0; + do + :: i < NR_READERS -> + RANDOM_CACHE_READ_FROM_MEM(urcu_active_readers[i], + get_pid()); + i++ + :: i >= NR_READERS -> break + od; + RANDOM_CACHE_READ_FROM_MEM(generation_ptr, get_pid()); + } +} + +inline wait_for_reader(tmp, tmp2, i, j) +{ + do + :: 1 -> + tmp2 = READ_CACHED_VAR(urcu_active_readers[tmp]); + ooo_mem(i); + dispatch_sighand_write_exec(); + if + :: (tmp2 & RCU_GP_CTR_NEST_MASK) + && ((tmp2 ^ READ_CACHED_VAR(urcu_gp_ctr)) + & RCU_GP_CTR_BIT) -> +#ifndef GEN_ERROR_WRITER_PROGRESS + smp_mb_writer(i, j); +#else + ooo_mem(i); +#endif + dispatch_sighand_write_exec(); + :: else -> + break; + fi; + od; +} + +inline wait_for_quiescent_state(tmp, tmp2, i, j) +{ + tmp = 0; + do + :: tmp < NR_READERS -> + wait_for_reader(tmp, tmp2, i, j); + if + :: (NR_READERS > 1) && (tmp < NR_READERS - 1) + -> ooo_mem(i); + dispatch_sighand_write_exec(); + :: else + -> skip; + fi; + tmp++ + :: tmp >= NR_READERS -> break + od; +} + +/* Model the RCU read-side critical section. */ + +#ifndef TEST_SIGNAL_ON_WRITE + +inline urcu_one_read(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + dispatch_sighand_read_exec(); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + dispatch_sighand_read_exec(); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + dispatch_sighand_read_exec(); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //dispatch_sighand_read_exec(); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read(i, j, nest_i, tmp, tmp2); + od; +} + +#endif //!TEST_SIGNAL_ON_WRITE + +#ifdef TEST_SIGNAL +/* signal handler reader */ + +inline urcu_one_read_sig(i, j, nest_i, tmp, tmp2) +{ + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + ooo_mem(i); + tmp = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + if + :: (!(tmp & RCU_GP_CTR_NEST_MASK)) + -> + tmp2 = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp2); + :: else -> + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], + tmp + 1); + fi; + smp_mb_reader(i, j); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + + read_generation[get_readerid()] = READ_CACHED_VAR(generation_ptr); + data_access[get_readerid()] = 1; + data_access[get_readerid()] = 0; + + nest_i = 0; + do + :: nest_i < READER_NEST_LEVEL -> + smp_mb_reader(i, j); + tmp2 = READ_CACHED_VAR(urcu_active_readers[get_readerid()]); + ooo_mem(i); + WRITE_CACHED_VAR(urcu_active_readers[get_readerid()], tmp2 - 1); + nest_i++; + :: nest_i >= READER_NEST_LEVEL -> break; + od; + //ooo_mem(i); + //smp_mc(i); /* added */ +} + +active proctype urcu_reader_sig() +{ + byte i, j, nest_i; + byte tmp, tmp2; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + +end_reader: + do + :: 1 -> + wait_for_sighand_exec(); + /* + * We do not test reader's progress here, because we are mainly + * interested in writer's progress. The reader never blocks + * anyway. We have to test for reader/writer's progress + * separately, otherwise we could think the writer is doing + * progress when it's blocked by an always progressing reader. + */ +#ifdef READER_PROGRESS +progress_reader: +#endif + urcu_one_read_sig(i, j, nest_i, tmp, tmp2); + od; +} + +#endif + +/* Model the RCU update process. */ + +active proctype urcu_writer() +{ + byte i, j; + byte tmp, tmp2; + byte old_gen; + + wait_init_done(); + + assert(get_pid() < NR_PROCS); + + do + :: (READ_CACHED_VAR(generation_ptr) < 5) -> +#ifdef WRITER_PROGRESS +progress_writer1: +#endif + ooo_mem(i); + dispatch_sighand_write_exec(); + atomic { + old_gen = READ_CACHED_VAR(generation_ptr); + WRITE_CACHED_VAR(generation_ptr, old_gen + 1); + } + ooo_mem(i); + dispatch_sighand_write_exec(); + + do + :: 1 -> + atomic { + if + :: write_lock == 0 -> + write_lock = 1; + break; + :: else -> + skip; + fi; + } + od; + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + ooo_mem(i); + dispatch_sighand_write_exec(); + //smp_mc(i); + wait_for_quiescent_state(tmp, tmp2, i, j); + //smp_mc(i); +#ifndef SINGLE_FLIP + ooo_mem(i); + dispatch_sighand_write_exec(); + tmp = READ_CACHED_VAR(urcu_gp_ctr); + ooo_mem(i); + dispatch_sighand_write_exec(); + WRITE_CACHED_VAR(urcu_gp_ctr, tmp ^ RCU_GP_CTR_BIT); + //smp_mc(i); + ooo_mem(i); + dispatch_sighand_write_exec(); + wait_for_quiescent_state(tmp, tmp2, i, j); +#endif + smp_mb_writer(i, j); + dispatch_sighand_write_exec(); + write_lock = 0; + /* free-up step, e.g., kfree(). */ + atomic { + last_free_gen = old_gen; + free_done = 1; + } + :: else -> break; + od; + /* + * Given the reader loops infinitely, let the writer also busy-loop + * with progress here so, with weak fairness, we can test the + * writer's progress. + */ +end_writer: + do + :: 1 -> +#ifdef WRITER_PROGRESS +progress_writer2: +#endif + dispatch_sighand_write_exec(); + od; +} + +/* Leave after the readers and writers so the pid count is ok. */ +init { + byte i, j; + + atomic { + INIT_CACHED_VAR(urcu_gp_ctr, 1, j); + INIT_CACHED_VAR(generation_ptr, 0, j); + + i = 0; + do + :: i < NR_READERS -> + INIT_CACHED_VAR(urcu_active_readers[i], 0, j); + read_generation[i] = 1; + data_access[i] = 0; + i++; + :: i >= NR_READERS -> break + od; + init_done = 1; + } +} diff --git a/urcu/urcu_free.ltl b/urcu/urcu_free.ltl new file mode 100644 index 0000000..1954414 --- /dev/null +++ b/urcu/urcu_free.ltl @@ -0,0 +1 @@ +[] (read_free -> !read_free_race) diff --git a/urcu/urcu_free_no_mb.define b/urcu/urcu_free_no_mb.define new file mode 100644 index 0000000..136ef67 --- /dev/null +++ b/urcu/urcu_free_no_mb.define @@ -0,0 +1,2 @@ +#define NO_RMB +#define NO_WMB diff --git a/urcu/urcu_free_no_rmb.define b/urcu/urcu_free_no_rmb.define new file mode 100644 index 0000000..73e61a4 --- /dev/null +++ b/urcu/urcu_free_no_rmb.define @@ -0,0 +1 @@ +#define NO_RMB diff --git a/urcu/urcu_free_no_wmb.define b/urcu/urcu_free_no_wmb.define new file mode 100644 index 0000000..710f29d --- /dev/null +++ b/urcu/urcu_free_no_wmb.define @@ -0,0 +1 @@ +#define NO_WMB diff --git a/urcu/urcu_free_single_flip.define b/urcu/urcu_free_single_flip.define new file mode 100644 index 0000000..5e642ef --- /dev/null +++ b/urcu/urcu_free_single_flip.define @@ -0,0 +1 @@ +#define SINGLE_FLIP diff --git a/urcu/urcu_progress.ltl b/urcu/urcu_progress.ltl new file mode 100644 index 0000000..8718641 --- /dev/null +++ b/urcu/urcu_progress.ltl @@ -0,0 +1 @@ +([] <> !np_) diff --git a/urcu/urcu_progress_reader.define b/urcu/urcu_progress_reader.define new file mode 100644 index 0000000..ff3f783 --- /dev/null +++ b/urcu/urcu_progress_reader.define @@ -0,0 +1 @@ +#define READER_PROGRESS diff --git a/urcu/urcu_progress_writer.define b/urcu/urcu_progress_writer.define new file mode 100644 index 0000000..1e4417f --- /dev/null +++ b/urcu/urcu_progress_writer.define @@ -0,0 +1 @@ +#define WRITER_PROGRESS diff --git a/urcu/urcu_progress_writer_error.define b/urcu/urcu_progress_writer_error.define new file mode 100644 index 0000000..8d304f5 --- /dev/null +++ b/urcu/urcu_progress_writer_error.define @@ -0,0 +1,2 @@ +#define WRITER_PROGRESS +#define GEN_ERROR_WRITER_PROGRESS